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409 lines
14 KiB
409 lines
14 KiB
// AsmJit - Machine code generation for C++
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//
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// * Official AsmJit Home Page: https://asmjit.com
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// * Official Github Repository: https://github.com/asmjit/asmjit
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//
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// Copyright (c) 2008-2020 The AsmJit Authors
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//
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// This software is provided 'as-is', without any express or implied
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// warranty. In no event will the authors be held liable for any damages
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// arising from the use of this software.
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//
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// Permission is granted to anyone to use this software for any purpose,
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// including commercial applications, and to alter it and redistribute it
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// freely, subject to the following restrictions:
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//
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// 1. The origin of this software must not be misrepresented; you must not
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// claim that you wrote the original software. If you use this software
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// in a product, an acknowledgment in the product documentation would be
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// appreciated but is not required.
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// 2. Altered source versions must be plainly marked as such, and must not be
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// misrepresented as being the original software.
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// 3. This notice may not be removed or altered from any source distribution.
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#ifndef ASMJIT_CORE_RAASSIGNMENT_P_H_INCLUDED
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#define ASMJIT_CORE_RAASSIGNMENT_P_H_INCLUDED
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#include "../core/api-config.h"
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#ifndef ASMJIT_NO_COMPILER
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#include "../core/radefs_p.h"
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ASMJIT_BEGIN_NAMESPACE
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//! \cond INTERNAL
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//! \addtogroup asmjit_ra
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//! \{
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// ============================================================================
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// [asmjit::RAAssignment]
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// ============================================================================
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class RAAssignment {
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ASMJIT_NONCOPYABLE(RAAssignment)
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public:
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enum Ids : uint32_t {
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kPhysNone = 0xFF,
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kWorkNone = RAWorkReg::kIdNone
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};
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enum DirtyBit : uint32_t {
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kClean = 0,
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kDirty = 1
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};
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struct Layout {
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//! Index of architecture registers per group.
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RARegIndex physIndex;
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//! Count of architecture registers per group.
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RARegCount physCount;
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//! Count of physical registers of all groups.
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uint32_t physTotal;
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//! Count of work registers.
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uint32_t workCount;
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//! WorkRegs data (vector).
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const RAWorkRegs* workRegs;
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inline void reset() noexcept {
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physIndex.reset();
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physCount.reset();
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physTotal = 0;
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workCount = 0;
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workRegs = nullptr;
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}
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};
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struct PhysToWorkMap {
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//! Assigned registers (each bit represents one physical reg).
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RARegMask assigned;
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//! Dirty registers (spill slot out of sync or no spill slot).
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RARegMask dirty;
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//! PhysReg to WorkReg mapping.
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uint32_t workIds[1 /* ... */];
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static inline size_t sizeOf(size_t count) noexcept {
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return sizeof(PhysToWorkMap) - sizeof(uint32_t) + count * sizeof(uint32_t);
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}
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inline void reset(size_t count) noexcept {
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assigned.reset();
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dirty.reset();
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for (size_t i = 0; i < count; i++)
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workIds[i] = kWorkNone;
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}
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inline void copyFrom(const PhysToWorkMap* other, size_t count) noexcept {
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size_t size = sizeOf(count);
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memcpy(this, other, size);
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}
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};
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struct WorkToPhysMap {
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//! WorkReg to PhysReg mapping
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uint8_t physIds[1 /* ... */];
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static inline size_t sizeOf(size_t count) noexcept {
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return size_t(count) * sizeof(uint8_t);
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}
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inline void reset(size_t count) noexcept {
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for (size_t i = 0; i < count; i++)
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physIds[i] = kPhysNone;
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}
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inline void copyFrom(const WorkToPhysMap* other, size_t count) noexcept {
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size_t size = sizeOf(count);
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if (ASMJIT_LIKELY(size))
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memcpy(this, other, size);
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}
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};
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//! Physical registers layout.
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Layout _layout;
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//! WorkReg to PhysReg mapping.
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WorkToPhysMap* _workToPhysMap;
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//! PhysReg to WorkReg mapping and assigned/dirty bits.
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PhysToWorkMap* _physToWorkMap;
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//! Optimization to translate PhysRegs to WorkRegs faster.
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uint32_t* _physToWorkIds[BaseReg::kGroupVirt];
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//! \name Construction & Destruction
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//! \{
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inline RAAssignment() noexcept {
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_layout.reset();
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resetMaps();
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}
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inline void initLayout(const RARegCount& physCount, const RAWorkRegs& workRegs) noexcept {
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// Layout must be initialized before data.
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ASMJIT_ASSERT(_physToWorkMap == nullptr);
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ASMJIT_ASSERT(_workToPhysMap == nullptr);
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_layout.physIndex.buildIndexes(physCount);
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_layout.physCount = physCount;
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_layout.physTotal = uint32_t(_layout.physIndex[BaseReg::kGroupVirt - 1]) +
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uint32_t(_layout.physCount[BaseReg::kGroupVirt - 1]) ;
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_layout.workCount = workRegs.size();
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_layout.workRegs = &workRegs;
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}
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inline void initMaps(PhysToWorkMap* physToWorkMap, WorkToPhysMap* workToPhysMap) noexcept {
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_physToWorkMap = physToWorkMap;
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_workToPhysMap = workToPhysMap;
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for (uint32_t group = 0; group < BaseReg::kGroupVirt; group++)
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_physToWorkIds[group] = physToWorkMap->workIds + _layout.physIndex.get(group);
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}
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inline void resetMaps() noexcept {
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_physToWorkMap = nullptr;
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_workToPhysMap = nullptr;
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for (uint32_t group = 0; group < BaseReg::kGroupVirt; group++)
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_physToWorkIds[group] = nullptr;
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}
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//! \}
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//! \name Accessors
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//! \{
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inline PhysToWorkMap* physToWorkMap() const noexcept { return _physToWorkMap; }
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inline WorkToPhysMap* workToPhysMap() const noexcept { return _workToPhysMap; }
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inline RARegMask& assigned() noexcept { return _physToWorkMap->assigned; }
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inline const RARegMask& assigned() const noexcept { return _physToWorkMap->assigned; }
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inline uint32_t assigned(uint32_t group) const noexcept { return _physToWorkMap->assigned[group]; }
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inline RARegMask& dirty() noexcept { return _physToWorkMap->dirty; }
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inline const RARegMask& dirty() const noexcept { return _physToWorkMap->dirty; }
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inline uint32_t dirty(uint32_t group) const noexcept { return _physToWorkMap->dirty[group]; }
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inline uint32_t workToPhysId(uint32_t group, uint32_t workId) const noexcept {
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DebugUtils::unused(group);
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ASMJIT_ASSERT(workId != kWorkNone);
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ASMJIT_ASSERT(workId < _layout.workCount);
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return _workToPhysMap->physIds[workId];
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}
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inline uint32_t physToWorkId(uint32_t group, uint32_t physId) const noexcept {
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ASMJIT_ASSERT(physId < Globals::kMaxPhysRegs);
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return _physToWorkIds[group][physId];
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}
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inline bool isPhysAssigned(uint32_t group, uint32_t physId) const noexcept {
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ASMJIT_ASSERT(physId < Globals::kMaxPhysRegs);
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return Support::bitTest(_physToWorkMap->assigned[group], physId);
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}
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inline bool isPhysDirty(uint32_t group, uint32_t physId) const noexcept {
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ASMJIT_ASSERT(physId < Globals::kMaxPhysRegs);
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return Support::bitTest(_physToWorkMap->dirty[group], physId);
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}
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//! \}
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//! \name Assignment
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//! \{
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// These are low-level allocation helpers that are used to update the current
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// mappings between physical and virt/work registers and also to update masks
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// that represent allocated and dirty registers. These functions don't emit
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// any code; they are only used to update and keep all mappings in sync.
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//! Assign [VirtReg/WorkReg] to a physical register.
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ASMJIT_INLINE void assign(uint32_t group, uint32_t workId, uint32_t physId, uint32_t dirty) noexcept {
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ASMJIT_ASSERT(workToPhysId(group, workId) == kPhysNone);
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ASMJIT_ASSERT(physToWorkId(group, physId) == kWorkNone);
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ASMJIT_ASSERT(!isPhysAssigned(group, physId));
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ASMJIT_ASSERT(!isPhysDirty(group, physId));
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_workToPhysMap->physIds[workId] = uint8_t(physId);
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_physToWorkIds[group][physId] = workId;
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uint32_t regMask = Support::bitMask(physId);
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_physToWorkMap->assigned[group] |= regMask;
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_physToWorkMap->dirty[group] |= regMask & Support::bitMaskFromBool<uint32_t>(dirty);
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verify();
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}
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//! Reassign [VirtReg/WorkReg] to `dstPhysId` from `srcPhysId`.
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ASMJIT_INLINE void reassign(uint32_t group, uint32_t workId, uint32_t dstPhysId, uint32_t srcPhysId) noexcept {
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ASMJIT_ASSERT(dstPhysId != srcPhysId);
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ASMJIT_ASSERT(workToPhysId(group, workId) == srcPhysId);
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ASMJIT_ASSERT(physToWorkId(group, srcPhysId) == workId);
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ASMJIT_ASSERT(isPhysAssigned(group, srcPhysId) == true);
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ASMJIT_ASSERT(isPhysAssigned(group, dstPhysId) == false);
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_workToPhysMap->physIds[workId] = uint8_t(dstPhysId);
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_physToWorkIds[group][srcPhysId] = kWorkNone;
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_physToWorkIds[group][dstPhysId] = workId;
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uint32_t srcMask = Support::bitMask(srcPhysId);
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uint32_t dstMask = Support::bitMask(dstPhysId);
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uint32_t dirty = (_physToWorkMap->dirty[group] & srcMask) != 0;
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uint32_t regMask = dstMask | srcMask;
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_physToWorkMap->assigned[group] ^= regMask;
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_physToWorkMap->dirty[group] ^= regMask & Support::bitMaskFromBool<uint32_t>(dirty);
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verify();
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}
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ASMJIT_INLINE void swap(uint32_t group, uint32_t aWorkId, uint32_t aPhysId, uint32_t bWorkId, uint32_t bPhysId) noexcept {
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ASMJIT_ASSERT(aPhysId != bPhysId);
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ASMJIT_ASSERT(workToPhysId(group, aWorkId) == aPhysId);
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ASMJIT_ASSERT(workToPhysId(group, bWorkId) == bPhysId);
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ASMJIT_ASSERT(physToWorkId(group, aPhysId) == aWorkId);
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ASMJIT_ASSERT(physToWorkId(group, bPhysId) == bWorkId);
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ASMJIT_ASSERT(isPhysAssigned(group, aPhysId));
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ASMJIT_ASSERT(isPhysAssigned(group, bPhysId));
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_workToPhysMap->physIds[aWorkId] = uint8_t(bPhysId);
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_workToPhysMap->physIds[bWorkId] = uint8_t(aPhysId);
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_physToWorkIds[group][aPhysId] = bWorkId;
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_physToWorkIds[group][bPhysId] = aWorkId;
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uint32_t aMask = Support::bitMask(aPhysId);
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uint32_t bMask = Support::bitMask(bPhysId);
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uint32_t flipMask = Support::bitMaskFromBool<uint32_t>(
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((_physToWorkMap->dirty[group] & aMask) != 0) ^
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((_physToWorkMap->dirty[group] & bMask) != 0));
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uint32_t regMask = aMask | bMask;
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_physToWorkMap->dirty[group] ^= regMask & flipMask;
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verify();
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}
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//! Unassign [VirtReg/WorkReg] from a physical register.
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ASMJIT_INLINE void unassign(uint32_t group, uint32_t workId, uint32_t physId) noexcept {
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ASMJIT_ASSERT(physId < Globals::kMaxPhysRegs);
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ASMJIT_ASSERT(workToPhysId(group, workId) == physId);
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ASMJIT_ASSERT(physToWorkId(group, physId) == workId);
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ASMJIT_ASSERT(isPhysAssigned(group, physId));
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_workToPhysMap->physIds[workId] = kPhysNone;
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_physToWorkIds[group][physId] = kWorkNone;
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uint32_t regMask = Support::bitMask(physId);
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_physToWorkMap->assigned[group] &= ~regMask;
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_physToWorkMap->dirty[group] &= ~regMask;
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verify();
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}
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inline void makeClean(uint32_t group, uint32_t workId, uint32_t physId) noexcept {
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DebugUtils::unused(workId);
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uint32_t regMask = Support::bitMask(physId);
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_physToWorkMap->dirty[group] &= ~regMask;
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}
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inline void makeDirty(uint32_t group, uint32_t workId, uint32_t physId) noexcept {
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DebugUtils::unused(workId);
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uint32_t regMask = Support::bitMask(physId);
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_physToWorkMap->dirty[group] |= regMask;
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}
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//! \}
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//! \name Utilities
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//! \{
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inline void swap(RAAssignment& other) noexcept {
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std::swap(_workToPhysMap, other._workToPhysMap);
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std::swap(_physToWorkMap, other._physToWorkMap);
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for (uint32_t group = 0; group < BaseReg::kGroupVirt; group++)
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std::swap(_physToWorkIds[group], other._physToWorkIds[group]);
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}
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inline void copyFrom(const PhysToWorkMap* physToWorkMap, const WorkToPhysMap* workToPhysMap) noexcept {
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memcpy(_physToWorkMap, physToWorkMap, PhysToWorkMap::sizeOf(_layout.physTotal));
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memcpy(_workToPhysMap, workToPhysMap, WorkToPhysMap::sizeOf(_layout.workCount));
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}
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inline void copyFrom(const RAAssignment& other) noexcept {
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copyFrom(other.physToWorkMap(), other.workToPhysMap());
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}
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// Not really useful outside of debugging.
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bool equals(const RAAssignment& other) const noexcept {
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// Layout should always match.
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if (_layout.physIndex != other._layout.physIndex ||
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_layout.physCount != other._layout.physCount ||
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_layout.physTotal != other._layout.physTotal ||
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_layout.workCount != other._layout.workCount ||
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_layout.workRegs != other._layout.workRegs)
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return false;
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uint32_t physTotal = _layout.physTotal;
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uint32_t workCount = _layout.workCount;
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for (uint32_t physId = 0; physId < physTotal; physId++) {
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uint32_t thisWorkId = _physToWorkMap->workIds[physId];
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uint32_t otherWorkId = other._physToWorkMap->workIds[physId];
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if (thisWorkId != otherWorkId)
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return false;
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}
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for (uint32_t workId = 0; workId < workCount; workId++) {
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uint32_t thisPhysId = _workToPhysMap->physIds[workId];
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uint32_t otherPhysId = other._workToPhysMap->physIds[workId];
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if (thisPhysId != otherPhysId)
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return false;
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}
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if (_physToWorkMap->assigned != other._physToWorkMap->assigned ||
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_physToWorkMap->dirty != other._physToWorkMap->dirty )
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return false;
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return true;
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}
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#if defined(ASMJIT_BUILD_DEBUG)
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ASMJIT_NOINLINE void verify() noexcept {
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// Verify WorkToPhysMap.
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{
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for (uint32_t workId = 0; workId < _layout.workCount; workId++) {
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uint32_t physId = _workToPhysMap->physIds[workId];
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if (physId != kPhysNone) {
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const RAWorkReg* workReg = _layout.workRegs->at(workId);
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uint32_t group = workReg->group();
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ASMJIT_ASSERT(_physToWorkIds[group][physId] == workId);
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}
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}
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}
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// Verify PhysToWorkMap.
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{
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for (uint32_t group = 0; group < BaseReg::kGroupVirt; group++) {
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uint32_t physCount = _layout.physCount[group];
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for (uint32_t physId = 0; physId < physCount; physId++) {
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uint32_t workId = _physToWorkIds[group][physId];
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if (workId != kWorkNone) {
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ASMJIT_ASSERT(_workToPhysMap->physIds[workId] == physId);
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}
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}
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}
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}
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}
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#else
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inline void verify() noexcept {}
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#endif
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//! \}
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};
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//! \}
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//! \endcond
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ASMJIT_END_NAMESPACE
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#endif // !ASMJIT_NO_COMPILER
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#endif // ASMJIT_CORE_RAASSIGNMENT_P_H_INCLUDED
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