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532 lines
19 KiB
532 lines
19 KiB
// AsmJit - Machine code generation for C++
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//
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// * Official AsmJit Home Page: https://asmjit.com
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// * Official Github Repository: https://github.com/asmjit/asmjit
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//
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// Copyright (c) 2008-2020 The AsmJit Authors
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//
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// This software is provided 'as-is', without any express or implied
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// warranty. In no event will the authors be held liable for any damages
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// arising from the use of this software.
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//
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// Permission is granted to anyone to use this software for any purpose,
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// including commercial applications, and to alter it and redistribute it
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// freely, subject to the following restrictions:
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//
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// 1. The origin of this software must not be misrepresented; you must not
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// claim that you wrote the original software. If you use this software
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// in a product, an acknowledgment in the product documentation would be
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// appreciated but is not required.
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// 2. Altered source versions must be plainly marked as such, and must not be
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// misrepresented as being the original software.
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// 3. This notice may not be removed or altered from any source distribution.
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#include "../core/api-build_p.h"
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#ifdef ASMJIT_BUILD_X86
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#include "../x86/x86func_p.h"
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#include "../x86/x86emithelper_p.h"
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#include "../x86/x86operand.h"
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ASMJIT_BEGIN_SUB_NAMESPACE(x86)
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// ============================================================================
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// [asmjit::x86::FuncInternal - Init]
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// ============================================================================
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namespace FuncInternal {
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static inline bool shouldThreatAsCDeclIn64BitMode(uint32_t ccId) noexcept {
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return ccId == CallConv::kIdCDecl ||
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ccId == CallConv::kIdStdCall ||
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ccId == CallConv::kIdThisCall ||
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ccId == CallConv::kIdFastCall ||
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ccId == CallConv::kIdRegParm1 ||
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ccId == CallConv::kIdRegParm2 ||
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ccId == CallConv::kIdRegParm3;
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}
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ASMJIT_FAVOR_SIZE Error initCallConv(CallConv& cc, uint32_t ccId, const Environment& environment) noexcept {
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constexpr uint32_t kGroupGp = Reg::kGroupGp;
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constexpr uint32_t kGroupVec = Reg::kGroupVec;
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constexpr uint32_t kGroupMm = Reg::kGroupMm;
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constexpr uint32_t kGroupKReg = Reg::kGroupKReg;
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constexpr uint32_t kZax = Gp::kIdAx;
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constexpr uint32_t kZbx = Gp::kIdBx;
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constexpr uint32_t kZcx = Gp::kIdCx;
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constexpr uint32_t kZdx = Gp::kIdDx;
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constexpr uint32_t kZsp = Gp::kIdSp;
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constexpr uint32_t kZbp = Gp::kIdBp;
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constexpr uint32_t kZsi = Gp::kIdSi;
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constexpr uint32_t kZdi = Gp::kIdDi;
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bool winABI = environment.isPlatformWindows() || environment.isAbiMSVC();
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cc.setArch(environment.arch());
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cc.setSaveRestoreRegSize(Reg::kGroupVec, 16);
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cc.setSaveRestoreRegSize(Reg::kGroupMm, 8);
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cc.setSaveRestoreRegSize(Reg::kGroupKReg, 8);
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cc.setSaveRestoreAlignment(Reg::kGroupVec, 16);
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cc.setSaveRestoreAlignment(Reg::kGroupMm, 8);
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cc.setSaveRestoreAlignment(Reg::kGroupKReg, 8);
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if (environment.is32Bit()) {
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bool isStandardCallConv = true;
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cc.setSaveRestoreRegSize(Reg::kGroupGp, 4);
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cc.setSaveRestoreAlignment(Reg::kGroupGp, 4);
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cc.setPreservedRegs(Reg::kGroupGp, Support::bitMask(Gp::kIdBx, Gp::kIdSp, Gp::kIdBp, Gp::kIdSi, Gp::kIdDi));
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cc.setNaturalStackAlignment(4);
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switch (ccId) {
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case CallConv::kIdCDecl:
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break;
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case CallConv::kIdStdCall:
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cc.setFlags(CallConv::kFlagCalleePopsStack);
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break;
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case CallConv::kIdFastCall:
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cc.setFlags(CallConv::kFlagCalleePopsStack);
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cc.setPassedOrder(kGroupGp, kZcx, kZdx);
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break;
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case CallConv::kIdVectorCall:
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cc.setFlags(CallConv::kFlagCalleePopsStack);
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cc.setPassedOrder(kGroupGp, kZcx, kZdx);
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cc.setPassedOrder(kGroupVec, 0, 1, 2, 3, 4, 5);
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break;
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case CallConv::kIdThisCall:
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// NOTE: Even MINGW (starting with GCC 4.7.0) now uses __thiscall on MS Windows,
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// so we won't bail to any other calling convention if __thiscall was specified.
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if (winABI) {
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cc.setFlags(CallConv::kFlagCalleePopsStack);
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cc.setPassedOrder(kGroupGp, kZcx);
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}
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else {
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ccId = CallConv::kIdCDecl;
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}
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break;
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case CallConv::kIdRegParm1:
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cc.setPassedOrder(kGroupGp, kZax);
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break;
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case CallConv::kIdRegParm2:
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cc.setPassedOrder(kGroupGp, kZax, kZdx);
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break;
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case CallConv::kIdRegParm3:
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cc.setPassedOrder(kGroupGp, kZax, kZdx, kZcx);
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break;
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case CallConv::kIdLightCall2:
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case CallConv::kIdLightCall3:
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case CallConv::kIdLightCall4: {
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uint32_t n = (ccId - CallConv::kIdLightCall2) + 2;
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cc.setFlags(CallConv::kFlagPassFloatsByVec);
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cc.setPassedOrder(kGroupGp, kZax, kZdx, kZcx, kZsi, kZdi);
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cc.setPassedOrder(kGroupMm, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPassedOrder(kGroupVec, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPassedOrder(kGroupKReg, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPreservedRegs(kGroupGp, Support::lsbMask<uint32_t>(8));
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cc.setPreservedRegs(kGroupVec, Support::lsbMask<uint32_t>(8) & ~Support::lsbMask<uint32_t>(n));
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cc.setNaturalStackAlignment(16);
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isStandardCallConv = false;
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break;
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}
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default:
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return DebugUtils::errored(kErrorInvalidArgument);
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}
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if (isStandardCallConv) {
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// MMX arguments is something where compiler vendors disagree. For example
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// GCC and MSVC would pass first three via registers and the rest via stack,
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// however Clang passes all via stack. Returning MMX registers is even more
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// fun, where GCC uses MM0, but Clang uses EAX:EDX pair. I'm not sure it's
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// something we should be worried about as MMX is deprecated anyway.
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cc.setPassedOrder(kGroupMm, 0, 1, 2);
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// Vector arguments (XMM|YMM|ZMM) are passed via registers. However, if the
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// function is variadic then they have to be passed via stack.
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cc.setPassedOrder(kGroupVec, 0, 1, 2);
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// Functions with variable arguments always use stack for MM and vector
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// arguments.
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cc.addFlags(CallConv::kFlagPassVecByStackIfVA);
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}
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if (ccId == CallConv::kIdCDecl) {
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cc.addFlags(CallConv::kFlagVarArgCompatible);
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}
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}
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else {
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cc.setSaveRestoreRegSize(Reg::kGroupGp, 8);
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cc.setSaveRestoreAlignment(Reg::kGroupGp, 8);
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// Preprocess the calling convention into a common id as many conventions
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// are normally ignored even by C/C++ compilers and treated as `__cdecl`.
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if (shouldThreatAsCDeclIn64BitMode(ccId))
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ccId = winABI ? CallConv::kIdX64Windows : CallConv::kIdX64SystemV;
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switch (ccId) {
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case CallConv::kIdX64SystemV: {
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cc.setFlags(CallConv::kFlagPassFloatsByVec |
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CallConv::kFlagPassMmxByXmm |
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CallConv::kFlagVarArgCompatible);
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cc.setNaturalStackAlignment(16);
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cc.setRedZoneSize(128);
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cc.setPassedOrder(kGroupGp, kZdi, kZsi, kZdx, kZcx, 8, 9);
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cc.setPassedOrder(kGroupVec, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPreservedRegs(kGroupGp, Support::bitMask(kZbx, kZsp, kZbp, 12, 13, 14, 15));
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break;
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}
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case CallConv::kIdX64Windows: {
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cc.setStrategy(CallConv::kStrategyX64Windows);
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cc.setFlags(CallConv::kFlagPassFloatsByVec |
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CallConv::kFlagIndirectVecArgs |
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CallConv::kFlagPassMmxByGp |
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CallConv::kFlagVarArgCompatible);
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cc.setNaturalStackAlignment(16);
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// Maximum 4 arguments in registers, each adds 8 bytes to the spill zone.
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cc.setSpillZoneSize(4 * 8);
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cc.setPassedOrder(kGroupGp, kZcx, kZdx, 8, 9);
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cc.setPassedOrder(kGroupVec, 0, 1, 2, 3);
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cc.setPreservedRegs(kGroupGp, Support::bitMask(kZbx, kZsp, kZbp, kZsi, kZdi, 12, 13, 14, 15));
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cc.setPreservedRegs(kGroupVec, Support::bitMask(6, 7, 8, 9, 10, 11, 12, 13, 14, 15));
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break;
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}
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case CallConv::kIdVectorCall: {
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cc.setStrategy(CallConv::kStrategyX64VectorCall);
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cc.setFlags(CallConv::kFlagPassFloatsByVec |
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CallConv::kFlagPassMmxByGp );
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cc.setNaturalStackAlignment(16);
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// Maximum 6 arguments in registers, each adds 8 bytes to the spill zone.
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cc.setSpillZoneSize(6 * 8);
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cc.setPassedOrder(kGroupGp, kZcx, kZdx, 8, 9);
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cc.setPassedOrder(kGroupVec, 0, 1, 2, 3, 4, 5);
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cc.setPreservedRegs(kGroupGp, Support::bitMask(kZbx, kZsp, kZbp, kZsi, kZdi, 12, 13, 14, 15));
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cc.setPreservedRegs(kGroupVec, Support::bitMask(6, 7, 8, 9, 10, 11, 12, 13, 14, 15));
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break;
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}
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case CallConv::kIdLightCall2:
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case CallConv::kIdLightCall3:
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case CallConv::kIdLightCall4: {
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uint32_t n = (ccId - CallConv::kIdLightCall2) + 2;
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cc.setFlags(CallConv::kFlagPassFloatsByVec);
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cc.setNaturalStackAlignment(16);
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cc.setPassedOrder(kGroupGp, kZax, kZdx, kZcx, kZsi, kZdi);
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cc.setPassedOrder(kGroupMm, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPassedOrder(kGroupVec, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPassedOrder(kGroupKReg, 0, 1, 2, 3, 4, 5, 6, 7);
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cc.setPreservedRegs(kGroupGp, Support::lsbMask<uint32_t>(16));
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cc.setPreservedRegs(kGroupVec, ~Support::lsbMask<uint32_t>(n));
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break;
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}
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default:
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return DebugUtils::errored(kErrorInvalidArgument);
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}
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}
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cc.setId(ccId);
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return kErrorOk;
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}
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ASMJIT_FAVOR_SIZE void unpackValues(FuncDetail& func, FuncValuePack& pack) noexcept {
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uint32_t typeId = pack[0].typeId();
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switch (typeId) {
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case Type::kIdI64:
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case Type::kIdU64: {
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if (Environment::is32Bit(func.callConv().arch())) {
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// Convert a 64-bit return value to two 32-bit return values.
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pack[0].initTypeId(Type::kIdU32);
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pack[1].initTypeId(typeId - 2);
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break;
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}
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break;
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}
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}
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}
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ASMJIT_FAVOR_SIZE Error initFuncDetail(FuncDetail& func, const FuncSignature& signature, uint32_t registerSize) noexcept {
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const CallConv& cc = func.callConv();
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uint32_t arch = cc.arch();
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uint32_t stackOffset = cc._spillZoneSize;
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uint32_t argCount = func.argCount();
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// Up to two return values can be returned in GP registers.
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static const uint8_t gpReturnIndexes[4] = {
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uint8_t(Gp::kIdAx),
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uint8_t(Gp::kIdDx),
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uint8_t(BaseReg::kIdBad),
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uint8_t(BaseReg::kIdBad)
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};
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if (func.hasRet()) {
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unpackValues(func, func._rets);
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for (uint32_t valueIndex = 0; valueIndex < Globals::kMaxValuePack; valueIndex++) {
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uint32_t typeId = func._rets[valueIndex].typeId();
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// Terminate at the first void type (end of the pack).
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if (!typeId)
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break;
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switch (typeId) {
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case Type::kIdI64:
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case Type::kIdU64: {
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if (gpReturnIndexes[valueIndex] != BaseReg::kIdBad)
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func._rets[valueIndex].initReg(Reg::kTypeGpq, gpReturnIndexes[valueIndex], typeId);
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else
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return DebugUtils::errored(kErrorInvalidState);
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break;
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}
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case Type::kIdI8:
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case Type::kIdI16:
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case Type::kIdI32: {
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if (gpReturnIndexes[valueIndex] != BaseReg::kIdBad)
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func._rets[valueIndex].initReg(Reg::kTypeGpd, gpReturnIndexes[valueIndex], Type::kIdI32);
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else
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return DebugUtils::errored(kErrorInvalidState);
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break;
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}
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case Type::kIdU8:
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case Type::kIdU16:
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case Type::kIdU32: {
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if (gpReturnIndexes[valueIndex] != BaseReg::kIdBad)
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func._rets[valueIndex].initReg(Reg::kTypeGpd, gpReturnIndexes[valueIndex], Type::kIdU32);
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else
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return DebugUtils::errored(kErrorInvalidState);
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break;
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}
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case Type::kIdF32:
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case Type::kIdF64: {
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uint32_t regType = Environment::is32Bit(arch) ? Reg::kTypeSt : Reg::kTypeXmm;
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func._rets[valueIndex].initReg(regType, valueIndex, typeId);
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break;
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}
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case Type::kIdF80: {
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// 80-bit floats are always returned by FP0.
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func._rets[valueIndex].initReg(Reg::kTypeSt, valueIndex, typeId);
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break;
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}
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case Type::kIdMmx32:
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case Type::kIdMmx64: {
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// MM registers are returned through XMM (SystemV) or GPQ (Win64).
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uint32_t regType = Reg::kTypeMm;
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uint32_t regIndex = valueIndex;
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if (Environment::is64Bit(arch)) {
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regType = cc.strategy() == CallConv::kStrategyDefault ? Reg::kTypeXmm : Reg::kTypeGpq;
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regIndex = cc.strategy() == CallConv::kStrategyDefault ? valueIndex : gpReturnIndexes[valueIndex];
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if (regIndex == BaseReg::kIdBad)
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return DebugUtils::errored(kErrorInvalidState);
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}
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func._rets[valueIndex].initReg(regType, regIndex, typeId);
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break;
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}
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default: {
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func._rets[valueIndex].initReg(vecTypeIdToRegType(typeId), valueIndex, typeId);
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break;
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}
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}
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}
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}
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switch (cc.strategy()) {
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case CallConv::kStrategyDefault: {
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uint32_t gpzPos = 0;
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uint32_t vecPos = 0;
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for (uint32_t argIndex = 0; argIndex < argCount; argIndex++) {
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unpackValues(func, func._args[argIndex]);
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for (uint32_t valueIndex = 0; valueIndex < Globals::kMaxValuePack; valueIndex++) {
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FuncValue& arg = func._args[argIndex][valueIndex];
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// Terminate if there are no more arguments in the pack.
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if (!arg)
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break;
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uint32_t typeId = arg.typeId();
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if (Type::isInt(typeId)) {
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uint32_t regId = BaseReg::kIdBad;
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if (gpzPos < CallConv::kMaxRegArgsPerGroup)
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regId = cc._passedOrder[Reg::kGroupGp].id[gpzPos];
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if (regId != BaseReg::kIdBad) {
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uint32_t regType = (typeId <= Type::kIdU32) ? Reg::kTypeGpd : Reg::kTypeGpq;
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arg.assignRegData(regType, regId);
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func.addUsedRegs(Reg::kGroupGp, Support::bitMask(regId));
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gpzPos++;
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}
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else {
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uint32_t size = Support::max<uint32_t>(Type::sizeOf(typeId), registerSize);
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arg.assignStackOffset(int32_t(stackOffset));
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stackOffset += size;
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}
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continue;
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}
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if (Type::isFloat(typeId) || Type::isVec(typeId)) {
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uint32_t regId = BaseReg::kIdBad;
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if (vecPos < CallConv::kMaxRegArgsPerGroup)
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regId = cc._passedOrder[Reg::kGroupVec].id[vecPos];
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if (Type::isFloat(typeId)) {
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// If this is a float, but `kFlagPassFloatsByVec` is false, we have
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// to use stack instead. This should be only used by 32-bit calling
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// conventions.
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if (!cc.hasFlag(CallConv::kFlagPassFloatsByVec))
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regId = BaseReg::kIdBad;
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}
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else {
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// Pass vector registers via stack if this is a variable arguments
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// function. This should be only used by 32-bit calling conventions.
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if (signature.hasVarArgs() && cc.hasFlag(CallConv::kFlagPassVecByStackIfVA))
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regId = BaseReg::kIdBad;
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}
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if (regId != BaseReg::kIdBad) {
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arg.initTypeId(typeId);
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arg.assignRegData(vecTypeIdToRegType(typeId), regId);
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func.addUsedRegs(Reg::kGroupVec, Support::bitMask(regId));
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vecPos++;
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}
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else {
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uint32_t size = Type::sizeOf(typeId);
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arg.assignStackOffset(int32_t(stackOffset));
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stackOffset += size;
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}
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continue;
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}
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}
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}
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break;
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}
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case CallConv::kStrategyX64Windows:
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case CallConv::kStrategyX64VectorCall: {
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// Both X64 and VectorCall behave similarly - arguments are indexed
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// from left to right. The position of the argument determines in
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// which register the argument is allocated, so it's either GP or
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// one of XMM/YMM/ZMM registers.
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//
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// [ X64 ] [VecCall]
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// Index: #0 #1 #2 #3 #4 #5
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//
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// GP : RCX RDX R8 R9
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// VEC : XMM0 XMM1 XMM2 XMM3 XMM4 XMM5
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//
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// For example function `f(int a, double b, int c, double d)` will be:
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//
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// (a) (b) (c) (d)
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// RCX XMM1 R8 XMM3
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//
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// Unused vector registers are used by HVA.
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bool isVectorCall = (cc.strategy() == CallConv::kStrategyX64VectorCall);
|
|
|
|
for (uint32_t argIndex = 0; argIndex < argCount; argIndex++) {
|
|
unpackValues(func, func._args[argIndex]);
|
|
|
|
for (uint32_t valueIndex = 0; valueIndex < Globals::kMaxValuePack; valueIndex++) {
|
|
FuncValue& arg = func._args[argIndex][valueIndex];
|
|
|
|
// Terminate if there are no more arguments in the pack.
|
|
if (!arg)
|
|
break;
|
|
|
|
uint32_t typeId = arg.typeId();
|
|
uint32_t size = Type::sizeOf(typeId);
|
|
|
|
if (Type::isInt(typeId) || Type::isMmx(typeId)) {
|
|
uint32_t regId = BaseReg::kIdBad;
|
|
|
|
if (argIndex < CallConv::kMaxRegArgsPerGroup)
|
|
regId = cc._passedOrder[Reg::kGroupGp].id[argIndex];
|
|
|
|
if (regId != BaseReg::kIdBad) {
|
|
uint32_t regType = (size <= 4 && !Type::isMmx(typeId)) ? Reg::kTypeGpd : Reg::kTypeGpq;
|
|
arg.assignRegData(regType, regId);
|
|
func.addUsedRegs(Reg::kGroupGp, Support::bitMask(regId));
|
|
}
|
|
else {
|
|
arg.assignStackOffset(int32_t(stackOffset));
|
|
stackOffset += 8;
|
|
}
|
|
continue;
|
|
}
|
|
|
|
if (Type::isFloat(typeId) || Type::isVec(typeId)) {
|
|
uint32_t regId = BaseReg::kIdBad;
|
|
|
|
if (argIndex < CallConv::kMaxRegArgsPerGroup)
|
|
regId = cc._passedOrder[Reg::kGroupVec].id[argIndex];
|
|
|
|
if (regId != BaseReg::kIdBad) {
|
|
// X64-ABI doesn't allow vector types (XMM|YMM|ZMM) to be passed
|
|
// via registers, however, VectorCall was designed for that purpose.
|
|
if (Type::isFloat(typeId) || isVectorCall) {
|
|
uint32_t regType = vecTypeIdToRegType(typeId);
|
|
arg.assignRegData(regType, regId);
|
|
func.addUsedRegs(Reg::kGroupVec, Support::bitMask(regId));
|
|
continue;
|
|
}
|
|
}
|
|
|
|
// Passed via stack if the argument is float/double or indirectly.
|
|
// The trap is - if the argument is passed indirectly, the address
|
|
// can be passed via register, if the argument's index has GP one.
|
|
if (Type::isFloat(typeId)) {
|
|
arg.assignStackOffset(int32_t(stackOffset));
|
|
}
|
|
else {
|
|
uint32_t gpRegId = cc._passedOrder[Reg::kGroupGp].id[argIndex];
|
|
if (gpRegId != BaseReg::kIdBad)
|
|
arg.assignRegData(Reg::kTypeGpq, gpRegId);
|
|
else
|
|
arg.assignStackOffset(int32_t(stackOffset));
|
|
arg.addFlags(FuncValue::kFlagIsIndirect);
|
|
}
|
|
|
|
// Always 8 bytes (float/double/pointer).
|
|
stackOffset += 8;
|
|
continue;
|
|
}
|
|
}
|
|
}
|
|
break;
|
|
}
|
|
}
|
|
|
|
func._argStackSize = stackOffset;
|
|
return kErrorOk;
|
|
}
|
|
|
|
} // {FuncInternal}
|
|
|
|
ASMJIT_END_SUB_NAMESPACE
|
|
|
|
#endif // ASMJIT_BUILD_X86
|