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316 lines
10 KiB
316 lines
10 KiB
// AsmJit - Machine code generation for C++
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//
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// * Official AsmJit Home Page: https://asmjit.com
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// * Official Github Repository: https://github.com/asmjit/asmjit
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//
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// Copyright (c) 2008-2020 The AsmJit Authors
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//
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// This software is provided 'as-is', without any express or implied
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// warranty. In no event will the authors be held liable for any damages
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// arising from the use of this software.
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//
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// Permission is granted to anyone to use this software for any purpose,
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// including commercial applications, and to alter it and redistribute it
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// freely, subject to the following restrictions:
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//
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// 1. The origin of this software must not be misrepresented; you must not
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// claim that you wrote the original software. If you use this software
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// in a product, an acknowledgment in the product documentation would be
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// appreciated but is not required.
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// 2. Altered source versions must be plainly marked as such, and must not be
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// misrepresented as being the original software.
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// 3. This notice may not be removed or altered from any source distribution.
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#include "../core/api-build_p.h"
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#include "../core/funcargscontext_p.h"
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ASMJIT_BEGIN_NAMESPACE
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//! \cond INTERNAL
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//! \addtogroup asmjit_core
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//! \{
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FuncArgsContext::FuncArgsContext() noexcept {
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for (uint32_t group = 0; group < BaseReg::kGroupVirt; group++)
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_workData[group].reset();
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}
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ASMJIT_FAVOR_SIZE Error FuncArgsContext::initWorkData(const FuncFrame& frame, const FuncArgsAssignment& args, const RAConstraints* constraints) noexcept {
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// The code has to be updated if this changes.
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ASMJIT_ASSERT(BaseReg::kGroupVirt == 4);
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uint32_t i;
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uint32_t arch = frame.arch();
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const FuncDetail& func = *args.funcDetail();
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_archTraits = &ArchTraits::byArch(arch);
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_constraints = constraints;
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_arch = uint8_t(arch);
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// Initialize `_archRegs`.
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for (i = 0; i < BaseReg::kGroupVirt; i++)
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_workData[i]._archRegs = _constraints->availableRegs(i);
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if (frame.hasPreservedFP())
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_workData[BaseReg::kGroupGp]._archRegs &= ~Support::bitMask(archTraits().fpRegId());
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// Extract information from all function arguments/assignments and build Var[] array.
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uint32_t varId = 0;
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for (uint32_t argIndex = 0; argIndex < Globals::kMaxFuncArgs; argIndex++) {
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for (uint32_t valueIndex = 0; valueIndex < Globals::kMaxValuePack; valueIndex++) {
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const FuncValue& dst_ = args.arg(argIndex, valueIndex);
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if (!dst_.isAssigned())
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continue;
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const FuncValue& src_ = func.arg(argIndex, valueIndex);
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if (ASMJIT_UNLIKELY(!src_.isAssigned()))
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return DebugUtils::errored(kErrorInvalidState);
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Var& var = _vars[varId];
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var.init(src_, dst_);
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FuncValue& src = var.cur;
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FuncValue& dst = var.out;
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uint32_t dstGroup = 0xFFFFFFFFu;
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uint32_t dstId = BaseReg::kIdBad;
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WorkData* dstWd = nullptr;
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// Not supported.
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if (src.isIndirect())
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return DebugUtils::errored(kErrorInvalidAssignment);
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if (dst.isReg()) {
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uint32_t dstType = dst.regType();
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if (ASMJIT_UNLIKELY(!archTraits().hasRegType(dstType)))
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return DebugUtils::errored(kErrorInvalidRegType);
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// Copy TypeId from source if the destination doesn't have it. The RA
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// used by BaseCompiler would never leave TypeId undefined, but users
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// of FuncAPI can just assign phys regs without specifying the type.
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if (!dst.hasTypeId())
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dst.setTypeId(archTraits().regTypeToTypeId(dst.regType()));
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dstGroup = archTraits().regTypeToGroup(dstType);
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if (ASMJIT_UNLIKELY(dstGroup >= BaseReg::kGroupVirt))
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return DebugUtils::errored(kErrorInvalidRegGroup);
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dstWd = &_workData[dstGroup];
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dstId = dst.regId();
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if (ASMJIT_UNLIKELY(dstId >= 32 || !Support::bitTest(dstWd->archRegs(), dstId)))
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return DebugUtils::errored(kErrorInvalidPhysId);
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if (ASMJIT_UNLIKELY(Support::bitTest(dstWd->dstRegs(), dstId)))
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return DebugUtils::errored(kErrorOverlappedRegs);
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dstWd->_dstRegs |= Support::bitMask(dstId);
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dstWd->_dstShuf |= Support::bitMask(dstId);
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dstWd->_usedRegs |= Support::bitMask(dstId);
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}
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else {
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if (!dst.hasTypeId())
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dst.setTypeId(src.typeId());
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RegInfo regInfo = getSuitableRegForMemToMemMove(arch, dst.typeId(), src.typeId());
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if (ASMJIT_UNLIKELY(!regInfo.isValid()))
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return DebugUtils::errored(kErrorInvalidState);
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_stackDstMask = uint8_t(_stackDstMask | Support::bitMask(regInfo.group()));
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}
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if (src.isReg()) {
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uint32_t srcId = src.regId();
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uint32_t srcGroup = archTraits().regTypeToGroup(src.regType());
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if (dstGroup == srcGroup) {
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dstWd->assign(varId, srcId);
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// The best case, register is allocated where it is expected to be.
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if (dstId == srcId)
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var.markDone();
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}
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else {
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if (ASMJIT_UNLIKELY(srcGroup >= BaseReg::kGroupVirt))
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return DebugUtils::errored(kErrorInvalidState);
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WorkData& srcData = _workData[srcGroup];
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srcData.assign(varId, srcId);
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}
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}
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else {
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if (dstWd)
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dstWd->_numStackArgs++;
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_hasStackSrc = true;
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}
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varId++;
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}
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}
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// Initialize WorkData::workRegs.
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for (i = 0; i < BaseReg::kGroupVirt; i++) {
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_workData[i]._workRegs = (_workData[i].archRegs() & (frame.dirtyRegs(i) | ~frame.preservedRegs(i))) | _workData[i].dstRegs() | _workData[i].assignedRegs();
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}
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// Create a variable that represents `SARegId` if necessary.
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bool saRegRequired = _hasStackSrc && frame.hasDynamicAlignment() && !frame.hasPreservedFP();
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WorkData& gpRegs = _workData[BaseReg::kGroupGp];
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uint32_t saCurRegId = frame.saRegId();
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uint32_t saOutRegId = args.saRegId();
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if (saCurRegId != BaseReg::kIdBad) {
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// Check if the provided `SARegId` doesn't collide with input registers.
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if (ASMJIT_UNLIKELY(gpRegs.isAssigned(saCurRegId)))
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return DebugUtils::errored(kErrorOverlappedRegs);
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}
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if (saOutRegId != BaseReg::kIdBad) {
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// Check if the provided `SARegId` doesn't collide with argument assignments.
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if (ASMJIT_UNLIKELY(Support::bitTest(gpRegs.dstRegs(), saOutRegId)))
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return DebugUtils::errored(kErrorOverlappedRegs);
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saRegRequired = true;
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}
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if (saRegRequired) {
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uint32_t ptrTypeId = Environment::is32Bit(arch) ? Type::kIdU32 : Type::kIdU64;
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uint32_t ptrRegType = Environment::is32Bit(arch) ? BaseReg::kTypeGp32 : BaseReg::kTypeGp64;
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_saVarId = uint8_t(varId);
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_hasPreservedFP = frame.hasPreservedFP();
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Var& var = _vars[varId];
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var.reset();
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if (saCurRegId == BaseReg::kIdBad) {
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if (saOutRegId != BaseReg::kIdBad && !gpRegs.isAssigned(saOutRegId)) {
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saCurRegId = saOutRegId;
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}
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else {
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uint32_t availableRegs = gpRegs.availableRegs();
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if (!availableRegs)
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availableRegs = gpRegs.archRegs() & ~gpRegs.workRegs();
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if (ASMJIT_UNLIKELY(!availableRegs))
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return DebugUtils::errored(kErrorNoMorePhysRegs);
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saCurRegId = Support::ctz(availableRegs);
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}
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}
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var.cur.initReg(ptrRegType, saCurRegId, ptrTypeId);
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gpRegs.assign(varId, saCurRegId);
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gpRegs._workRegs |= Support::bitMask(saCurRegId);
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if (saOutRegId != BaseReg::kIdBad) {
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var.out.initReg(ptrRegType, saOutRegId, ptrTypeId);
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gpRegs._dstRegs |= Support::bitMask(saOutRegId);
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gpRegs._workRegs |= Support::bitMask(saOutRegId);
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}
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else {
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var.markDone();
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}
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varId++;
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}
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_varCount = varId;
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// Detect register swaps.
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for (varId = 0; varId < _varCount; varId++) {
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Var& var = _vars[varId];
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if (var.cur.isReg() && var.out.isReg()) {
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uint32_t srcId = var.cur.regId();
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uint32_t dstId = var.out.regId();
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uint32_t group = archTraits().regTypeToGroup(var.cur.regType());
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if (group != archTraits().regTypeToGroup(var.out.regType()))
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continue;
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WorkData& wd = _workData[group];
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if (wd.isAssigned(dstId)) {
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Var& other = _vars[wd._physToVarId[dstId]];
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if (archTraits().regTypeToGroup(other.out.regType()) == group && other.out.regId() == srcId) {
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wd._numSwaps++;
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_regSwapsMask = uint8_t(_regSwapsMask | Support::bitMask(group));
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}
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}
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}
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}
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return kErrorOk;
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}
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ASMJIT_FAVOR_SIZE Error FuncArgsContext::markDstRegsDirty(FuncFrame& frame) noexcept {
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for (uint32_t i = 0; i < BaseReg::kGroupVirt; i++) {
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WorkData& wd = _workData[i];
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uint32_t regs = wd.usedRegs() | wd._dstShuf;
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wd._workRegs |= regs;
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frame.addDirtyRegs(i, regs);
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}
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return kErrorOk;
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}
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ASMJIT_FAVOR_SIZE Error FuncArgsContext::markScratchRegs(FuncFrame& frame) noexcept {
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uint32_t groupMask = 0;
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// Handle stack to stack moves.
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groupMask |= _stackDstMask;
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// Handle register swaps.
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groupMask |= _regSwapsMask & ~Support::bitMask(BaseReg::kGroupGp);
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if (!groupMask)
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return kErrorOk;
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// Selects one dirty register per affected group that can be used as a scratch register.
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for (uint32_t group = 0; group < BaseReg::kGroupVirt; group++) {
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if (Support::bitTest(groupMask, group)) {
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WorkData& wd = _workData[group];
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// Initially, pick some clobbered or dirty register.
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uint32_t workRegs = wd.workRegs();
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uint32_t regs = workRegs & ~(wd.usedRegs() | wd._dstShuf);
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// If that didn't work out pick some register which is not in 'used'.
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if (!regs)
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regs = workRegs & ~wd.usedRegs();
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// If that didn't work out pick any other register that is allocable.
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// This last resort case will, however, result in marking one more
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// register dirty.
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if (!regs)
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regs = wd.archRegs() & ~workRegs;
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// If that didn't work out we will have to use XORs instead of MOVs.
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if (!regs)
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continue;
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uint32_t regMask = Support::blsi(regs);
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wd._workRegs |= regMask;
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frame.addDirtyRegs(group, regMask);
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}
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}
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return kErrorOk;
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}
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ASMJIT_FAVOR_SIZE Error FuncArgsContext::markStackArgsReg(FuncFrame& frame) noexcept {
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if (_saVarId != kVarIdNone) {
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const Var& var = _vars[_saVarId];
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frame.setSARegId(var.cur.regId());
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}
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else if (frame.hasPreservedFP()) {
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frame.setSARegId(archTraits().fpRegId());
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}
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return kErrorOk;
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}
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//! \}
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//! \endcond
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ASMJIT_END_NAMESPACE
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