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223 lines
7.1 KiB
223 lines
7.1 KiB
4 years ago
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#------------------------------------------------------------------------------
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#
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# Copyright (c) 2006 - 2013, Intel Corporation. All rights reserved.<BR>
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# This program and the accompanying materials
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# are licensed and made available under the terms and conditions of the BSD License
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# which accompanies this distribution. The full text of the license may be found at
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# http://opensource.org/licenses/bsd-license.php.
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#
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# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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#
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# Module Name:
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#
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# Thunk16.S
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#
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# Abstract:
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#
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# Real mode thunk
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#
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#------------------------------------------------------------------------------
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#include <Library/BaseLib.h>
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ASM_GLOBAL ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)
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ASM_GLOBAL ASM_PFX(InternalAsmThunk16)
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# define the structure of IA32_REGS
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.set _EDI, 0 #size 4
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.set _ESI, 4 #size 4
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.set _EBP, 8 #size 4
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.set _ESP, 12 #size 4
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.set _EBX, 16 #size 4
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.set _EDX, 20 #size 4
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.set _ECX, 24 #size 4
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.set _EAX, 28 #size 4
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.set _DS, 32 #size 2
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.set _ES, 34 #size 2
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.set _FS, 36 #size 2
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.set _GS, 38 #size 2
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.set _EFLAGS, 40 #size 4
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.set _EIP, 44 #size 4
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.set _CS, 48 #size 2
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.set _SS, 50 #size 2
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.set IA32_REGS_SIZE, 52
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.text
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.code16
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ASM_PFX(m16Start):
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SavedGdt: .space 6
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ASM_PFX(BackFromUserCode):
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push %ss
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push %cs
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calll L_Base1 # push eip
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L_Base1:
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pushfl
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cli # disable interrupts
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push %gs
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push %fs
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push %es
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push %ds
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pushal
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.byte 0x66, 0xba # mov edx, imm32
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ASM_PFX(ThunkAttr): .space 4
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl
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jz 1f
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movw $0x2401, %ax
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int $0x15
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cli # disable interrupts
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jnc 2f
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1:
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testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl
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jz 2f
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inb $0x92, %al
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orb $2, %al
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outb %al, $0x92 # deactivate A20M#
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2:
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xorl %eax, %eax
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movw %ss, %ax
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leal IA32_REGS_SIZE(%esp), %ebp
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mov %ebp, (_ESP - IA32_REGS_SIZE)(%bp)
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mov (_EIP - IA32_REGS_SIZE)(%bp), %bx
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shll $4, %eax
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addl %eax, %ebp
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.byte 0x66, 0xb8 # mov eax, imm32
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SavedCr4: .space 4
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movl %eax, %cr4
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lgdtl %cs:(SavedGdt - L_Base1)(%bx)
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.byte 0x66, 0xb8 # mov eax, imm32
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SavedCr0: .space 4
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movl %eax, %cr0
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.byte 0xb8 # mov ax, imm16
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SavedSs: .space 2
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movl %eax, %ss
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.byte 0x66, 0xbc # mov esp, imm32
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SavedEsp: .space 4
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lretl # return to protected mode
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_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)
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.word 0x8
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_16Idtr: .word 0x3ff
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.long 0
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_16Gdtr: .word GdtEnd - _NullSegDesc - 1
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_16GdtrBase: .long _NullSegDesc
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ASM_PFX(ToUserCode):
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movw %ss, %dx
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movw %cx, %ss # set new segment selectors
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movw %cx, %ds
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movw %cx, %es
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movw %cx, %fs
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movw %cx, %gs
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movl %eax, %cr0 # real mode starts at next instruction
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# which (per SDM) *must* be a far JMP.
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ljmpw $0,$0 # will be filled in by InternalAsmThunk16
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L_Base: # to point here.
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movl %ebp, %cr4
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movw %si, %ss # set up 16-bit stack segment
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xchgl %ebx, %esp # set up 16-bit stack pointer
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movw IA32_REGS_SIZE(%esp), %bp # get BackToUserCode address from stack
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mov %dx, %cs:(SavedSs - ASM_PFX(BackFromUserCode))(%bp)
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mov %ebx, %cs:(SavedEsp - ASM_PFX(BackFromUserCode))(%bp)
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lidtl %cs:(_16Idtr - ASM_PFX(BackFromUserCode))(%bp)
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popal
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pop %ds
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pop %es
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pop %fs
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pop %gs
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popfl
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lretl # transfer control to user code
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_NullSegDesc: .quad 0
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_16CsDesc:
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.word -1
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.word 0
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.byte 0
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.byte 0x9b
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.byte 0x8f # 16-bit segment, 4GB limit
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.byte 0
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_16DsDesc:
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.word -1
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.word 0
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.byte 0
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.byte 0x93
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.byte 0x8f # 16-bit segment, 4GB limit
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.byte 0
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GdtEnd:
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.code32
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#
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# @param RegSet The pointer to a IA32_DWORD_REGS structure
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# @param Transition The pointer to the transition code
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# @return The address of the 16-bit stack after returning from user code
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#
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ASM_PFX(InternalAsmThunk16):
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push %ebp
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push %ebx
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push %esi
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push %edi
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push %ds
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push %es
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push %fs
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push %gs
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movl 36(%esp), %esi # esi <- RegSet
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movzwl _SS(%esi), %edx
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mov _ESP(%esi), %edi
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add $(-(IA32_REGS_SIZE + 4)), %edi
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movl %edi, %ebx # ebx <- stack offset
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imul $0x10, %edx, %eax
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push $(IA32_REGS_SIZE / 4)
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addl %eax, %edi # edi <- linear address of 16-bit stack
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pop %ecx
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rep
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movsl # copy RegSet
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movl 40(%esp), %eax # eax <- address of transition code
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movl %edx, %esi # esi <- 16-bit stack segment
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lea (SavedCr0 - ASM_PFX(m16Start))(%eax), %edx
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movl %eax, %ecx
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andl $0xf, %ecx
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shll $12, %eax
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lea (ASM_PFX(BackFromUserCode) - ASM_PFX(m16Start))(%ecx), %ecx
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movw %cx, %ax
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stosl # [edi] <- return address of user code
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addl $(L_Base - ASM_PFX(BackFromUserCode)), %eax
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movl %eax, (L_Base - SavedCr0 - 4)(%edx)
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sgdtl (SavedGdt - SavedCr0)(%edx)
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sidtl 0x24(%esp)
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movl %cr0, %eax
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movl %eax, (%edx) # save CR0 in SavedCr0
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andl $0x7ffffffe, %eax # clear PE, PG bits
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movl %cr4, %ebp
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mov %ebp, (SavedCr4 - SavedCr0)(%edx)
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andl $0xffffffcf, %ebp # clear PAE, PSE bits
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pushl $0x10
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pop %ecx # ecx <- selector for data segments
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lgdtl (_16Gdtr - SavedCr0)(%edx)
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pushfl
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lcall *(_EntryPoint - SavedCr0)(%edx)
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popfl
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lidtl 0x24(%esp)
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lea -IA32_REGS_SIZE(%ebp), %eax
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pop %gs
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pop %fs
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pop %es
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pop %ds
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pop %edi
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pop %esi
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pop %ebx
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pop %ebp
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ret
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.const:
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ASM_PFX(m16Size): .word ASM_PFX(InternalAsmThunk16) - ASM_PFX(m16Start)
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ASM_PFX(mThunk16Attr): .word ASM_PFX(ThunkAttr) - ASM_PFX(m16Start)
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ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)
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ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)
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ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)
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