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189 lines
6.0 KiB
189 lines
6.0 KiB
/** @file
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This file declares Sec Platform Information PPI.
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This service is the primary handoff state into the PEI Foundation.
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The Security (SEC) component creates the early, transitory memory
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environment and also encapsulates knowledge of at least the
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location of the Boot Firmware Volume (BFV).
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Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials are licensed and made available under
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the terms and conditions of the BSD License that accompanies this distribution.
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The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php.
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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@par Revision Reference:
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This PPI is introduced in PI Version 1.0.
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**/
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#ifndef __SEC_PLATFORM_INFORMATION_PPI_H__
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#define __SEC_PLATFORM_INFORMATION_PPI_H__
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#include <Pi/PiPeiCis.h>
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#define EFI_SEC_PLATFORM_INFORMATION_GUID \
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{ \
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0x6f8c2b35, 0xfef4, 0x448d, {0x82, 0x56, 0xe1, 0x1b, 0x19, 0xd6, 0x10, 0x77 } \
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}
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typedef struct _EFI_SEC_PLATFORM_INFORMATION_PPI EFI_SEC_PLATFORM_INFORMATION_PPI;
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///
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/// EFI_HEALTH_FLAGS
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/// Contains information generated by microcode, hardware, and/or the Itanium
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/// processor PAL code about the state of the processor upon reset.
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///
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typedef union {
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struct {
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///
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/// A 2-bit field indicating self-test state after reset.
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///
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UINT32 Status : 2;
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///
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/// A 1-bit field indicating whether testing has occurred.
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/// If this field is zero, the processor has not been tested,
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/// and no further fields in the self-test State parameter are valid.
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///
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UINT32 Tested : 1;
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///
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/// Reserved 13 bits.
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///
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UINT32 Reserved1 :13;
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///
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/// A 1-bit field. If set to 1, this indicates that virtual
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/// memory features are not available.
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///
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UINT32 VirtualMemoryUnavailable : 1;
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///
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/// A 1-bit field. If set to 1, this indicates that IA-32 execution
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/// is not available.
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///
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UINT32 Ia32ExecutionUnavailable : 1;
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///
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/// A 1-bit field. If set to 1, this indicates that the floating
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/// point unit is not available.
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///
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UINT32 FloatingPointUnavailable : 1;
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///
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/// A 1-bit field. If set to 1, this indicates miscellaneous
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/// functional failure other than vm, ia, or fp.
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/// The test status field provides additional information on
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/// test failures when the State field returns a value of
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/// performance restricted or functionally restricted.
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/// The value returned is implementation dependent.
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///
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UINT32 MiscFeaturesUnavailable : 1;
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///
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/// Reserved 12 bits.
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///
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UINT32 Reserved2 :12;
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} Bits;
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UINT32 Uint32;
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} EFI_HEALTH_FLAGS;
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#define NORMAL_BOOT_CALL 0x0
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#define RECOVERY_CHECK_CALL 0x3
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typedef EFI_HEALTH_FLAGS X64_HANDOFF_STATUS;
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typedef EFI_HEALTH_FLAGS IA32_HANDOFF_STATUS;
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///
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/// The hand-off status structure for Itanium architecture.
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///
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typedef struct {
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///
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/// SALE_ENTRY state : 3 = Recovery_Check
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/// and 0 = RESET or Normal_Boot phase.
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///
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UINT8 BootPhase;
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///
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/// Firmware status on entry to SALE.
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///
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UINT8 FWStatus;
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UINT16 Reserved1;
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UINT32 Reserved2;
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///
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/// Geographically significant unique processor ID assigned by PAL.
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///
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UINT16 ProcId;
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UINT16 Reserved3;
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UINT8 IdMask;
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UINT8 EidMask;
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UINT16 Reserved4;
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///
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/// Address to make PAL calls.
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///
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UINT64 PalCallAddress;
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///
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/// If the entry state is RECOVERY_CHECK, this contains the PAL_RESET
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/// return address, and if entry state is RESET, this contains
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/// address for PAL_authentication call.
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///
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UINT64 PalSpecialAddress;
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///
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/// GR35 from PALE_EXIT state.
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///
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UINT64 SelfTestStatus;
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///
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/// GR37 from PALE_EXIT state.
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///
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UINT64 SelfTestControl;
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UINT64 MemoryBufferRequired;
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} ITANIUM_HANDOFF_STATUS;
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///
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/// EFI_SEC_PLATFORM_INFORMATION_RECORD.
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///
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typedef union {
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IA32_HANDOFF_STATUS IA32HealthFlags;
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X64_HANDOFF_STATUS x64HealthFlags;
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ITANIUM_HANDOFF_STATUS ItaniumHealthFlags;
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} EFI_SEC_PLATFORM_INFORMATION_RECORD;
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/**
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This interface conveys state information out of the Security (SEC) phase into PEI.
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This service is published by the SEC phase. The SEC phase handoff has an optional
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EFI_PEI_PPI_DESCRIPTOR list as its final argument when control is passed from SEC into the
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PEI Foundation. As such, if the platform supports the built-in self test (BIST) on IA-32 Intel
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architecture or the PAL-A handoff state for Itanium architecture, this information is encapsulated
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into the data structure abstracted by this service. This information is collected for the boot-strap
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processor (BSP) on IA-32. For Itanium architecture, it is available on all processors that execute
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the PEI Foundation.
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@param PeiServices The pointer to the PEI Services Table.
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@param StructureSize The pointer to the variable describing size of the input buffer.
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@param PlatformInformationRecord The pointer to the EFI_SEC_PLATFORM_INFORMATION_RECORD.
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@retval EFI_SUCCESS The data was successfully returned.
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@retval EFI_BUFFER_TOO_SMALL The buffer was too small. The current buffer size needed to
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hold the record is returned in StructureSize.
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**/
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typedef
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EFI_STATUS
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(EFIAPI *EFI_SEC_PLATFORM_INFORMATION)(
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IN CONST EFI_PEI_SERVICES **PeiServices,
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IN OUT UINT64 *StructureSize,
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OUT EFI_SEC_PLATFORM_INFORMATION_RECORD *PlatformInformationRecord
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);
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///
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/// This service abstracts platform-specific information. It is necessary
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/// to convey this information to the PEI Foundation so that it can
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/// discover where to begin dispatching PEIMs.
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///
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struct _EFI_SEC_PLATFORM_INFORMATION_PPI {
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EFI_SEC_PLATFORM_INFORMATION PlatformInformation;
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};
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extern EFI_GUID gEfiSecPlatformInformationPpiGuid;
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#endif
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