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638 lines
22 KiB
638 lines
22 KiB
/** @file
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Main file for Mm shell Debug1 function.
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(C) Copyright 2015 Hewlett-Packard Development Company, L.P.<BR>
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Copyright (c) 2005 - 2017, Intel Corporation. All rights reserved.<BR>
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This program and the accompanying materials
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are licensed and made available under the terms and conditions of the BSD License
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which accompanies this distribution. The full text of the license may be found at
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http://opensource.org/licenses/bsd-license.php
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THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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**/
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#include "UefiShellDebug1CommandsLib.h"
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#include <Library/ShellLib.h>
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#include <Library/IoLib.h>
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#include <Protocol/PciRootBridgeIo.h>
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#include <Protocol/DeviceIo.h>
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typedef enum {
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ShellMmMemory,
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ShellMmMemoryMappedIo,
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ShellMmIo,
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ShellMmPci,
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ShellMmPciExpress
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} SHELL_MM_ACCESS_TYPE;
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CONST UINT16 mShellMmAccessTypeStr[] = {
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STRING_TOKEN (STR_MM_MEM),
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STRING_TOKEN (STR_MM_MMIO),
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STRING_TOKEN (STR_MM_IO),
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STRING_TOKEN (STR_MM_PCI),
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STRING_TOKEN (STR_MM_PCIE)
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};
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STATIC CONST SHELL_PARAM_ITEM ParamList[] = {
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{L"-mmio", TypeFlag},
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{L"-mem", TypeFlag},
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{L"-io", TypeFlag},
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{L"-pci", TypeFlag},
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{L"-pcie", TypeFlag},
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{L"-n", TypeFlag},
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{L"-w", TypeValue},
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{NULL, TypeMax}
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};
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CONST UINT64 mShellMmMaxNumber[] = {
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0, MAX_UINT8, MAX_UINT16, 0, MAX_UINT32, 0, 0, 0, MAX_UINT64
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};
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CONST EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH mShellMmRootBridgeIoWidth[] = {
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0, EfiPciWidthUint8, EfiPciWidthUint16, 0, EfiPciWidthUint32, 0, 0, 0, EfiPciWidthUint64
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};
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CONST EFI_CPU_IO_PROTOCOL_WIDTH mShellMmCpuIoWidth[] = {
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0, EfiCpuIoWidthUint8, EfiCpuIoWidthUint16, 0, EfiCpuIoWidthUint32, 0, 0, 0, EfiCpuIoWidthUint64
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};
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/**
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Extract the PCI segment, bus, device, function, register from
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from a PCI or PCIE format of address..
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@param[in] PciFormat Whether the address is of PCI format of PCIE format.
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@param[in] Address PCI or PCIE address.
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@param[out] Segment PCI segment number.
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@param[out] Bus PCI bus number.
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@param[out] Device PCI device number.
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@param[out] Function PCI function number.
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@param[out] Register PCI register offset.
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**/
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VOID
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ShellMmDecodePciAddress (
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IN BOOLEAN PciFormat,
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IN UINT64 Address,
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OUT UINT32 *Segment,
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OUT UINT8 *Bus,
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OUT UINT8 *Device, OPTIONAL
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OUT UINT8 *Function, OPTIONAL
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OUT UINT32 *Register OPTIONAL
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)
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{
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if (PciFormat) {
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//
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// PCI Configuration Space.The address will have the format ssssbbddffrr,
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// where ssss = Segment, bb = Bus, dd = Device, ff = Function and rr = Register.
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//
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*Segment = (UINT32) (RShiftU64 (Address, 32) & 0xFFFF);
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*Bus = (UINT8) (((UINT32) Address) >> 24);
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if (Device != NULL) {
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*Device = (UINT8) (((UINT32) Address) >> 16);
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}
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if (Function != NULL) {
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*Function = (UINT8) (((UINT32) Address) >> 8);
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}
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if (Register != NULL) {
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*Register = (UINT8) Address;
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}
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} else {
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//
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// PCI Express Configuration Space.The address will have the format ssssssbbddffrrr,
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// where ssss = Segment, bb = Bus, dd = Device, ff = Function and rrr = Register.
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//
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*Segment = (UINT32) (RShiftU64 (Address, 36) & 0xFFFF);
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*Bus = (UINT8) RShiftU64 (Address, 28);
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if (Device != NULL) {
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*Device = (UINT8) (((UINT32) Address) >> 20);
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}
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if (Function != NULL) {
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*Function = (UINT8) (((UINT32) Address) >> 12);
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}
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if (Register != NULL) {
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*Register = (UINT32) (Address & 0xFFF);
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}
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}
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}
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/**
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Read or write some data from or into the Address.
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@param[in] AccessType Access type.
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@param[in] PciRootBridgeIo PciRootBridgeIo instance.
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@param[in] CpuIo CpuIo instance.
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@param[in] Read TRUE for read, FALSE for write.
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@param[in] Addresss The memory location to access.
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@param[in] Size The size of Buffer in Width sized units.
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@param[in, out] Buffer The buffer to read into or write from.
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**/
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VOID
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ShellMmAccess (
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IN SHELL_MM_ACCESS_TYPE AccessType,
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IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo,
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IN EFI_CPU_IO2_PROTOCOL *CpuIo,
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IN BOOLEAN Read,
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IN UINT64 Address,
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IN UINTN Size,
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IN OUT VOID *Buffer
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)
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{
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EFI_STATUS Status;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM RootBridgeIoMem;
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EFI_CPU_IO_PROTOCOL_IO_MEM CpuIoMem;
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UINT32 Segment;
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UINT8 Bus;
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UINT8 Device;
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UINT8 Function;
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UINT32 Register;
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if (AccessType == ShellMmMemory) {
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if (Read) {
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CopyMem (Buffer, (VOID *) (UINTN) Address, Size);
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} else {
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CopyMem ((VOID *) (UINTN) Address, Buffer, Size);
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}
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} else {
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RootBridgeIoMem = NULL;
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CpuIoMem = NULL;
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switch (AccessType) {
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case ShellMmPci:
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case ShellMmPciExpress:
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ASSERT (PciRootBridgeIo != NULL);
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ShellMmDecodePciAddress ((BOOLEAN) (AccessType == ShellMmPci), Address, &Segment, &Bus, &Device, &Function, &Register);
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if (Read) {
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Status = PciRootBridgeIo->Pci.Read (
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PciRootBridgeIo, mShellMmRootBridgeIoWidth[Size],
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EFI_PCI_ADDRESS (Bus, Device, Function, Register),
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1, Buffer
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);
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} else {
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Status = PciRootBridgeIo->Pci.Write (
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PciRootBridgeIo, mShellMmRootBridgeIoWidth[Size],
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EFI_PCI_ADDRESS (Bus, Device, Function, Register),
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1, Buffer
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);
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}
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ASSERT_EFI_ERROR (Status);
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return;
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case ShellMmMemoryMappedIo:
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if (PciRootBridgeIo != NULL) {
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RootBridgeIoMem = Read ? PciRootBridgeIo->Mem.Read : PciRootBridgeIo->Mem.Write;
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}
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if (CpuIo != NULL) {
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CpuIoMem = Read ? CpuIo->Mem.Read : CpuIo->Mem.Write;
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}
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break;
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case ShellMmIo:
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if (PciRootBridgeIo != NULL) {
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RootBridgeIoMem = Read ? PciRootBridgeIo->Io.Read : PciRootBridgeIo->Io.Write;
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}
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if (CpuIo != NULL) {
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CpuIoMem = Read ? CpuIo->Io.Read : CpuIo->Io.Write;
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}
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break;
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default:
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ASSERT (FALSE);
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break;
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}
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Status = EFI_UNSUPPORTED;
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if (RootBridgeIoMem != NULL) {
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Status = RootBridgeIoMem (PciRootBridgeIo, mShellMmRootBridgeIoWidth[Size], Address, 1, Buffer);
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}
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if (EFI_ERROR (Status) && (CpuIoMem != NULL)) {
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Status = CpuIoMem (CpuIo, mShellMmCpuIoWidth[Size], Address, 1, Buffer);
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}
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if (EFI_ERROR (Status)) {
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if (AccessType == ShellMmIo) {
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switch (Size) {
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case 1:
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if (Read) {
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*(UINT8 *) Buffer = IoRead8 ((UINTN) Address);
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} else {
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IoWrite8 ((UINTN) Address, *(UINT8 *) Buffer);
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}
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break;
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case 2:
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if (Read) {
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*(UINT16 *) Buffer = IoRead16 ((UINTN) Address);
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} else {
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IoWrite16 ((UINTN) Address, *(UINT16 *) Buffer);
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}
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break;
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case 4:
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if (Read) {
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*(UINT32 *) Buffer = IoRead32 ((UINTN) Address);
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} else {
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IoWrite32 ((UINTN) Address, *(UINT32 *) Buffer);
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}
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break;
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case 8:
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if (Read) {
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*(UINT64 *) Buffer = IoRead64 ((UINTN) Address);
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} else {
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IoWrite64 ((UINTN) Address, *(UINT64 *) Buffer);
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}
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break;
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default:
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ASSERT (FALSE);
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break;
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}
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} else {
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switch (Size) {
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case 1:
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if (Read) {
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*(UINT8 *) Buffer = MmioRead8 ((UINTN) Address);
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} else {
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MmioWrite8 ((UINTN) Address, *(UINT8 *) Buffer);
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}
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break;
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case 2:
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if (Read) {
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*(UINT16 *) Buffer = MmioRead16 ((UINTN) Address);
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} else {
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MmioWrite16 ((UINTN) Address, *(UINT16 *) Buffer);
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}
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break;
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case 4:
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if (Read) {
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*(UINT32 *) Buffer = MmioRead32 ((UINTN) Address);
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} else {
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MmioWrite32 ((UINTN) Address, *(UINT32 *) Buffer);
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}
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break;
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case 8:
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if (Read) {
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*(UINT64 *) Buffer = MmioRead64 ((UINTN) Address);
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} else {
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MmioWrite64 ((UINTN) Address, *(UINT64 *) Buffer);
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}
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break;
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default:
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ASSERT (FALSE);
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break;
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}
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}
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}
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}
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}
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/**
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Find the CpuIo instance and PciRootBridgeIo instance in the platform.
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If there are multiple PciRootBridgeIo instances, the instance which manages
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the Address is returned.
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@param[in] AccessType Access type.
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@param[in] Address Address to access.
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@param[out] CpuIo Return the CpuIo instance.
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@param[out] PciRootBridgeIo Return the proper PciRootBridgeIo instance.
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@retval TRUE There are PciRootBridgeIo instances in the platform.
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@retval FALSE There isn't PciRootBridgeIo instance in the platform.
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**/
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BOOLEAN
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ShellMmLocateIoProtocol (
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IN SHELL_MM_ACCESS_TYPE AccessType,
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IN UINT64 Address,
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OUT EFI_CPU_IO2_PROTOCOL **CpuIo,
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OUT EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL **PciRootBridgeIo
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)
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{
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EFI_STATUS Status;
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UINTN Index;
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UINTN HandleCount;
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EFI_HANDLE *HandleBuffer;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *Io;
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UINT32 Segment;
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UINT8 Bus;
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EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptors;
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Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **) CpuIo);
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if (EFI_ERROR (Status)) {
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*CpuIo = NULL;
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}
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*PciRootBridgeIo = NULL;
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HandleBuffer = NULL;
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Status = gBS->LocateHandleBuffer (
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ByProtocol,
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&gEfiPciRootBridgeIoProtocolGuid,
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NULL,
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&HandleCount,
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&HandleBuffer
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);
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if (EFI_ERROR (Status) || (HandleCount == 0) || (HandleBuffer == NULL)) {
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return FALSE;
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}
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Segment = 0;
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Bus = 0;
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if ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) {
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ShellMmDecodePciAddress ((BOOLEAN) (AccessType == ShellMmPci), Address, &Segment, &Bus, NULL, NULL, NULL);
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}
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//
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// Find the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL of the specified segment & bus number
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//
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for (Index = 0; (Index < HandleCount) && (*PciRootBridgeIo == NULL); Index++) {
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Status = gBS->HandleProtocol (
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HandleBuffer[Index],
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&gEfiPciRootBridgeIoProtocolGuid,
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(VOID *) &Io
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);
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if (EFI_ERROR (Status)) {
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continue;
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}
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if ((((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) && (Io->SegmentNumber == Segment)) ||
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((AccessType == ShellMmIo) || (AccessType == ShellMmMemoryMappedIo))
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) {
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Status = Io->Configuration (Io, (VOID **) &Descriptors);
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if (!EFI_ERROR (Status)) {
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while (Descriptors->Desc != ACPI_END_TAG_DESCRIPTOR) {
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//
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// Compare the segment and bus range for PCI/PCIE access
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//
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if ((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_BUS) &&
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((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) &&
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((Bus >= Descriptors->AddrRangeMin) && (Bus <= Descriptors->AddrRangeMax))
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) {
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*PciRootBridgeIo = Io;
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break;
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//
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// Compare the address range for MMIO/IO access
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//
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} else if ((((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_IO) && (AccessType == ShellMmIo)) ||
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((Descriptors->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) && (AccessType == ShellMmMemoryMappedIo))
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) && ((Address >= Descriptors->AddrRangeMin) && (Address <= Descriptors->AddrRangeMax))
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) {
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*PciRootBridgeIo = Io;
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break;
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}
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Descriptors++;
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}
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}
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}
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}
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if (HandleBuffer != NULL) {
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FreePool (HandleBuffer);
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}
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return TRUE;
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}
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/**
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Function for 'mm' command.
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@param[in] ImageHandle Handle to the Image (NULL if Internal).
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@param[in] SystemTable Pointer to the System Table (NULL if Internal).
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**/
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SHELL_STATUS
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EFIAPI
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ShellCommandRunMm (
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IN EFI_HANDLE ImageHandle,
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IN EFI_SYSTEM_TABLE *SystemTable
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)
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{
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EFI_STATUS Status;
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EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;
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EFI_CPU_IO2_PROTOCOL *CpuIo;
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UINT64 Address;
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UINT64 Value;
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SHELL_MM_ACCESS_TYPE AccessType;
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UINT64 Buffer;
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UINTN Index;
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UINTN Size;
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BOOLEAN Complete;
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CHAR16 *InputStr;
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BOOLEAN Interactive;
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LIST_ENTRY *Package;
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CHAR16 *ProblemParam;
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SHELL_STATUS ShellStatus;
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CONST CHAR16 *Temp;
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BOOLEAN HasPciRootBridgeIo;
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|
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Value = 0;
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Address = 0;
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ShellStatus = SHELL_SUCCESS;
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InputStr = NULL;
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Size = 1;
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AccessType = ShellMmMemory;
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|
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//
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// Parse arguments
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//
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Status = ShellCommandLineParse (ParamList, &Package, &ProblemParam, TRUE);
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if (EFI_ERROR (Status)) {
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if (Status == EFI_VOLUME_CORRUPTED && ProblemParam != NULL) {
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ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM), gShellDebug1HiiHandle, L"mm", ProblemParam);
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FreePool (ProblemParam);
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ShellStatus = SHELL_INVALID_PARAMETER;
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goto Done;
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} else {
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ASSERT (FALSE);
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}
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} else {
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if (ShellCommandLineGetCount (Package) < 2) {
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ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_FEW), gShellDebug1HiiHandle, L"mm");
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ShellStatus = SHELL_INVALID_PARAMETER;
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goto Done;
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} else if (ShellCommandLineGetCount (Package) > 3) {
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ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
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ShellStatus = SHELL_INVALID_PARAMETER;
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goto Done;
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} else if (ShellCommandLineGetFlag (Package, L"-w") && ShellCommandLineGetValue (Package, L"-w") == NULL) {
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ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_NO_VALUE), gShellDebug1HiiHandle, L"mm", L"-w");
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ShellStatus = SHELL_INVALID_PARAMETER;
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goto Done;
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} else {
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if (ShellCommandLineGetFlag (Package, L"-mmio")) {
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AccessType = ShellMmMemoryMappedIo;
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if (ShellCommandLineGetFlag (Package, L"-mem")
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|| ShellCommandLineGetFlag (Package, L"-io")
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|| ShellCommandLineGetFlag (Package, L"-pci")
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|| ShellCommandLineGetFlag (Package, L"-pcie")
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) {
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ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
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ShellStatus = SHELL_INVALID_PARAMETER;
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goto Done;
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}
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} else if (ShellCommandLineGetFlag (Package, L"-mem")) {
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AccessType = ShellMmMemory;
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if (ShellCommandLineGetFlag (Package, L"-io")
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|| ShellCommandLineGetFlag (Package, L"-pci")
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|| ShellCommandLineGetFlag (Package, L"-pcie")
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) {
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ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
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ShellStatus = SHELL_INVALID_PARAMETER;
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goto Done;
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}
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} else if (ShellCommandLineGetFlag (Package, L"-io")) {
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AccessType = ShellMmIo;
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if (ShellCommandLineGetFlag (Package, L"-pci")
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|| ShellCommandLineGetFlag (Package, L"-pcie")
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) {
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ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
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ShellStatus = SHELL_INVALID_PARAMETER;
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goto Done;
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}
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} else if (ShellCommandLineGetFlag (Package, L"-pci")) {
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AccessType = ShellMmPci;
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if (ShellCommandLineGetFlag (Package, L"-pcie")
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) {
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ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_TOO_MANY), gShellDebug1HiiHandle, L"mm");
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ShellStatus = SHELL_INVALID_PARAMETER;
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goto Done;
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}
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} else if (ShellCommandLineGetFlag (Package, L"-pcie")) {
|
|
AccessType = ShellMmPciExpress;
|
|
}
|
|
}
|
|
|
|
//
|
|
// Non interactive for a script file or for the specific parameter
|
|
//
|
|
Interactive = TRUE;
|
|
if (gEfiShellProtocol->BatchIsActive () || ShellCommandLineGetFlag (Package, L"-n")) {
|
|
Interactive = FALSE;
|
|
}
|
|
|
|
Temp = ShellCommandLineGetValue (Package, L"-w");
|
|
if (Temp != NULL) {
|
|
Size = ShellStrToUintn (Temp);
|
|
}
|
|
if ((Size != 1) && (Size != 2) && (Size != 4) && (Size != 8)) {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PROBLEM_VAL), gShellDebug1HiiHandle, L"mm", Temp, L"-w");
|
|
ShellStatus = SHELL_INVALID_PARAMETER;
|
|
goto Done;
|
|
}
|
|
|
|
Temp = ShellCommandLineGetRawValue (Package, 1);
|
|
Status = ShellConvertStringToUint64 (Temp, &Address, TRUE, FALSE);
|
|
if (EFI_ERROR (Status)) {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);
|
|
ShellStatus = SHELL_INVALID_PARAMETER;
|
|
goto Done;
|
|
}
|
|
|
|
if ((Address & (Size - 1)) != 0) {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_NOT_ALIGNED), gShellDebug1HiiHandle, L"mm", Address);
|
|
ShellStatus = SHELL_INVALID_PARAMETER;
|
|
goto Done;
|
|
}
|
|
|
|
//
|
|
// locate IO protocol interface
|
|
//
|
|
HasPciRootBridgeIo = ShellMmLocateIoProtocol (AccessType, Address, &CpuIo, &PciRootBridgeIo);
|
|
if ((AccessType == ShellMmPci) || (AccessType == ShellMmPciExpress)) {
|
|
if (!HasPciRootBridgeIo) {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PCIRBIO_NF), gShellDebug1HiiHandle, L"mm");
|
|
ShellStatus = SHELL_NOT_FOUND;
|
|
goto Done;
|
|
}
|
|
if (PciRootBridgeIo == NULL) {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_PCIE_ADDRESS_RANGE), gShellDebug1HiiHandle, L"mm", Address);
|
|
ShellStatus = SHELL_INVALID_PARAMETER;
|
|
goto Done;
|
|
}
|
|
}
|
|
|
|
//
|
|
// Mode 1: Directly set a value
|
|
//
|
|
Temp = ShellCommandLineGetRawValue (Package, 2);
|
|
if (Temp != NULL) {
|
|
Status = ShellConvertStringToUint64 (Temp, &Value, TRUE, FALSE);
|
|
if (EFI_ERROR (Status)) {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);
|
|
ShellStatus = SHELL_INVALID_PARAMETER;
|
|
goto Done;
|
|
}
|
|
|
|
if (Value > mShellMmMaxNumber[Size]) {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_GEN_PARAM_INV), gShellDebug1HiiHandle, L"mm", Temp);
|
|
ShellStatus = SHELL_INVALID_PARAMETER;
|
|
goto Done;
|
|
}
|
|
|
|
ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, FALSE, Address, Size, &Value);
|
|
goto Done;
|
|
}
|
|
|
|
//
|
|
// Mode 2: Directly show a value
|
|
//
|
|
if (!Interactive) {
|
|
if (!gEfiShellProtocol->BatchIsActive ()) {
|
|
ShellPrintHiiEx (-1, -1, NULL, mShellMmAccessTypeStr[AccessType], gShellDebug1HiiHandle);
|
|
}
|
|
ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, TRUE, Address, Size, &Buffer);
|
|
|
|
if (!gEfiShellProtocol->BatchIsActive ()) {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS), gShellDebug1HiiHandle, Address);
|
|
}
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_BUF), gShellDebug1HiiHandle, Size * 2, Buffer & mShellMmMaxNumber[Size]);
|
|
ShellPrintEx (-1, -1, L"\r\n");
|
|
goto Done;
|
|
}
|
|
|
|
//
|
|
// Mode 3: Show or set values in interactive mode
|
|
//
|
|
Complete = FALSE;
|
|
do {
|
|
ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, TRUE, Address, Size, &Buffer);
|
|
ShellPrintHiiEx (-1, -1, NULL, mShellMmAccessTypeStr[AccessType], gShellDebug1HiiHandle);
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ADDRESS), gShellDebug1HiiHandle, Address);
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_BUF), gShellDebug1HiiHandle, Size * 2, Buffer & mShellMmMaxNumber[Size]);
|
|
ShellPrintEx (-1, -1, L" > ");
|
|
//
|
|
// wait user input to modify
|
|
//
|
|
if (InputStr != NULL) {
|
|
FreePool (InputStr);
|
|
InputStr = NULL;
|
|
}
|
|
ShellPromptForResponse (ShellPromptResponseTypeFreeform, NULL, (VOID**) &InputStr);
|
|
|
|
if (InputStr != NULL) {
|
|
//
|
|
// skip space characters
|
|
//
|
|
for (Index = 0; InputStr[Index] == ' '; Index++);
|
|
|
|
if (InputStr[Index] != CHAR_NULL) {
|
|
if ((InputStr[Index] == '.') || (InputStr[Index] == 'q') || (InputStr[Index] == 'Q')) {
|
|
Complete = TRUE;
|
|
} else if (!EFI_ERROR (ShellConvertStringToUint64 (InputStr + Index, &Buffer, TRUE, TRUE)) &&
|
|
(Buffer <= mShellMmMaxNumber[Size])
|
|
) {
|
|
ShellMmAccess (AccessType, PciRootBridgeIo, CpuIo, FALSE, Address, Size, &Buffer);
|
|
} else {
|
|
ShellPrintHiiEx (-1, -1, NULL, STRING_TOKEN (STR_MM_ERROR), gShellDebug1HiiHandle, L"mm");
|
|
continue;
|
|
}
|
|
}
|
|
}
|
|
|
|
Address += Size;
|
|
ShellPrintEx (-1, -1, L"\r\n");
|
|
} while (!Complete);
|
|
}
|
|
ASSERT (ShellStatus == SHELL_SUCCESS);
|
|
|
|
Done:
|
|
if (InputStr != NULL) {
|
|
FreePool (InputStr);
|
|
}
|
|
if (Package != NULL) {
|
|
ShellCommandLineFreeVarList (Package);
|
|
}
|
|
return ShellStatus;
|
|
}
|