From 2271f9a0fcc5e64115def96a18a9678ad743045e Mon Sep 17 00:00:00 2001 From: _xeroxz Date: Sat, 6 Feb 2021 04:14:16 +0000 Subject: [PATCH] Update VMCS-GUEST.md --- VMCS-GUEST.md | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/VMCS-GUEST.md b/VMCS-GUEST.md index ce66bec..cdd34a9 100644 --- a/VMCS-GUEST.md +++ b/VMCS-GUEST.md @@ -43,9 +43,9 @@ guest cr4: 0x00000000000026F8 0b0010 0110 1111 1000 ##### Checks on Guest MSRs * If the “load debug controls” VM-entry control is 1, bits reserved in the IA32_DEBUGCTL MSR must be 0 in the -field for that register. The first processors to support the virtual-machine extensions supported only the 1- -setting of this control and thus performed this check unconditionally. +field for that register. (this is not set in vm entry control fields in my vmcs...) :white_check_mark: +#### 26.3.1.2 Checks on Guest Segment Registers -#### 26.3.1.2 Checks on Guest Segment Registers \ No newline at end of file +This section specifies the checks on the fields for CS, SS, DS, ES, FS, GS, TR, and LDTR. \ No newline at end of file