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This file details the changelog of Capstone.
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---------------------------------
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Version 4.0.1: January 10th, 2019
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[ Core ]
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- Fix some issues for packaging (Debian, Gentoo).
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- Better support for building with Mingw.
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- cstool has new option -s to turn on skipdata mode.
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- cstool -v now report build settings of the core.
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- Add suite/capstone_get_setup.c so users can integrate with their own code
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to retrieve Capstone settings at build time.
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[ Arm ]
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- Fix 4.0 regression: the `tbh [r0, r1, lsl #1]` instruction sets the operand.shift.value back again (see #1317)
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- Remove ARM_REG_PC group for BX instruction.
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[ X86 ]
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- Fix: endbr32 and endbr64 instructions are now properly decoded in both CS_MODE_32 and CS_MODE_64 (#1129)
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[ M680X ]
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- Fix some issues reported by clang-analyzer (#1329).
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[ Python ]
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- Fix skipdata setup.
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- Add getter/setter for skipdata_mnem, skipdata_callback.
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---------------------------------
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Version 4.0: December 18th, 2018
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[ Core ]
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- New APIs: cs_regs_access()
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- Add new options for cs_option(): CS_OPT_MNEMONIC & CS_OPT_UNSIGNED & CS_OPT_SYNTAX_MASM.
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- Various updates & bugfixes for all architectures.
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- Add 4 new architectures: EVM, M68K, M680X & TMS320C64x.
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- Add new group types: CS_GRP_PRIVILEGE & CS_GRP_BRANCH_RELATIVE.
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- Add new error types: CS_ERR_X86_MASM.
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[ X86 ]
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- Add XOP code condition type in x86_xop_cc.
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- Add some info on encoding to cs_x86 in cs_x86_encoding.
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- Add register flags update in cs_x86.{eflags, fpu_flags}
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- Change cs_x86.disp type from int32_t to int64_t.
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- Add new groups: X86_GRP_VM & X86_GRP_FPU.
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- Lots of new instructions (AVX)
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[ ARM64 ]
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- Add instruction ARM64_INS_NEGS & ARM64_INS_NGCS.
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[ Mips ]
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- Add mode CS_MODE_MIPS2.
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[ PPC ]
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- Change cs_ppc_op.imm type from int32_t to int64_t.
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- Add new groups: PPC_GRP_ICBT, PPC_GRP_P8ALTIVEC, PPC_GRP_P8VECTOR & PPC_GRP_QPX.
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- Lots of new instructions (QPX among them)
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[ Sparc ]
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- Change cs_sparc_op.imm type from int32_t to int64_t.
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[ Binding ]
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- New bindings: PowerShell & VB6
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---------------------------------
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Version 3.0.5: July 18th, 2018
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[ Core ]
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- Fix the include path for Android builds when building cstool.
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- Add posibility to disable universal build for Mac OS.
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- cstool: Separate instruction bytes by spaces.
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- Fix code path of pkg-config in Cmake.
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- Update XCode project for XCode 9.1.
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- Add Cortex-M support to cstool.
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- Cmake forces to be build using MT with MSVC.
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- Better support for Mac OS kernel.
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[ X86 ]
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- Fix some issues in handling EVEX & VEX3 instructions.
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- Fix immediate operand for AND instruction in ATT mode.
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- Fix ATT syntax when imm operand is 0.
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- Better handle XACQUIRE/XRELEASE.
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- Fix imm operand of RETF.
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[ ARM ]
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- Fix an integer overlow bug.
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[ ARM64 ]
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- Bug fix for incorrect operand type in certain load/store instructions.
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[ Mips ]
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- Mode CS_MODE_MIPS32R6 automatically sets CS_MODE_32
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[ PPC ]
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- Fix endian check.
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[ Sparc ]
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- Fix an integer overlow bug.
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[ SystemZ ]
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- Fix an integer overlow bug.
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[ Python binding ]
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- Raise error on accessing irrelevant data fields if skipdata & detail modes are enable.
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---------------------------------
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Version 3.0.5-rc3: July 31st, 2017
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[ Core ]
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- Fix compilation for MacOS kernel extension
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- cstool to support armbe and arm64be modes
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- Add nmake.bat for Windows build
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- Fix an integer overflow for Windows kernel driver
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- Support to embedded Capstone into MacOS kernel
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- cstool: fix mips64 mode
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- Fix a compiling error in MS Visual Studio 2015
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- Install pkgconfig file with CMake build
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- Fix SOVERSION property of CMake build
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- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
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- Fix MingW build
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- Better handle CMake installation for Linux 64bit
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[ X86 ]
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- Support BND prefix of Intel MPX extension
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- Correct operand size for CALL/JMP in 64bit mode with prefix 0x66
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- LOCK NOP is a valid instruction
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- Fix ATT syntax for instruction with zero offset segment register
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- LES/LDS are invalid in 64bit mode
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- Fix number of operands for some MOV instructions
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[ ARM ]
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- Fix POP reg to update SP register
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- Update flags for UADD8 instruction
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[ ARM64 ]
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- Better performance with new lookup table
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- Handle system registers added in ARMv8.1/2
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[ Java binding ]
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- Better handle input with invalid code
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[ Visual Basic binding ]
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- New binding
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---------------------------------
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Version 3.0.5-rc2: March 2nd, 2017
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[ Core ]
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- Fix build for Visual Studio 2012
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- Fix X86_REL_ADDR macro
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- Add CS_VERSION_MAJOR, CS_VERSION_MINOR, CS_VERSION_EXTRA
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- Better support for embedding Capstone into Windows kernel drivers
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- Support to embedded Capstone into MacOS kernel
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- Support MacOS 10.11 and up
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- Better support for Cygwin
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- Support build packages for FreeBSD & DragonflyBSD
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- Add a command-line tool "cstool"
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- Properly handle switching to Endian mode at run-time for Arm, Arm64, Mips & Sparc
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[ X86 ]
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- Some random 16-bit code can be handled wrongly.
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- Remove abundant operand type X86_OP_FP
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- Fix instructions MOVQ, LOOP, LOOPE, LOOPNE, CALL/JMP rel16, REPNE LODSD, MOV *AX, MOFFS, FAR JMP/CALL
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- Add X86_REG_EFLAGS for STC and STD
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- Fix instruction attributes for SYSEXIT, MOVW, ROL, LGS, SLDT
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- Rename registers ST0-ST7 to be consistent with asm output
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[ ARM ]
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- Properly handle IT instruction
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- Fix LDRSB
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- Fix writeback for LDR
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- Fix Thumb BigEndian setup
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[ ARM64 ]
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- Fix arith extender
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- Fix writeback for LDR
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- Rename enum arm64_mrs_reg to arm64_sysreg
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[ PowerPC ]
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- Print 0 offset for memory operand
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[ Sparc ]
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- Fix POPC instruction
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[ Python binding ]
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- Better PyPy support
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- Add __version__
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- Better support for Python 3
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- Fix CS_SKIPDATA_CALLBACK prototype
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- Cast skipdata function inside binding to simplify the API
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[ Java binding ]
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- Better handle input with invalid code
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[ PowerShell ]
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- New binding
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---------------------------------
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Version 3.0.4: July 15th, 2015
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[ Library ]
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- Improve cross-compile for Android using Android NDK.
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- Support cross-compile for AArch64 Android (with Linux GCC).
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- Removed osxkernel_inttypes.h that is incompatible with BSD license.
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- Make it possible to compile with CC having a space inside (like "ccache gcc").
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[ X86 ]
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- Fix a null pointer dereference bug on handling code with special prefixes.
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- Properly handle AL/AX/EAX operand for OUT instruction in AT&T syntax.
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- Print immediate operand in positive form in some algorithm instructions.
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- Properly decode some SSE instructions.
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[ PowerPC ]
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- Fixed a memory corruption bug.
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- Fixed a memory corruption bug for the engine built in DIET mode.
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[ Mips ]
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- Fixed instruction ID of SUBU instruction.
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- Fixed a memory corruption bug.
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[ Arm ]
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- Fixed a memory corruption bug on IT instruction.
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[ XCore ]
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- Fixed a memory corruption bug when instruction has a memory operand.
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[ Python ]
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- Support Virtualenv.
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- setup.py supports option --user if not in a virtualenv to allow for local usage.
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- Properly handle the destruction of Cs object in the case the shared library
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was already unloaded.
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---------------------------------
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Version 3.0.3: May 08th, 2015
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[ Library ]
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- Support to embed into Mac OS X kernel extensions.
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- Now it is possible to compile Capstone with older C compilers, such as
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GCC 4.8 on Ubuntu 12.04.
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- Add "test_iter" to MSVC project.
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[ X86 ]
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- All shifted instructions SHL, SHR, SAL, SAR, RCL, RCR, ROL & ROR now support
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$1 as first operand in *AT&T* syntax (so we have "rcll $1, %edx" instead of
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"rcll %edx").
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- CMPXCHG16B is a valid instruction with LOCK prefix.
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- Fixed a segfault on the input of 0xF3.
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[ Arm ]
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- BLX instruction modifies PC & LR registers.
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[ Sparc ]
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- Improved displacement decoding for sparc banching instructions.
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[ Python binding ]
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- Fix for Cython so it can properly initialize.
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- X86Op.avx_zero_mask now has c_bool type, but not c_uint8 type.
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- Properly support compile with Cygwin & install binding (setup.py).
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---------------------------------
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Version 3.0.2: March 11th, 2015
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[ Library ]
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- On *nix, only export symbols that are part of the API (instead of all
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the internal symbols).
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[ X86 ]
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- Do not consider 0xF2 as REPNE prefix if it is a part of instruction encoding.
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- Fix implicit registers read/written & instruction groups of some instructions.
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- More flexible on the order of prefixes, so better handle some tricky
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instructions.
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- REPNE prefix can go with STOS & MOVS instructions.
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- Fix a compilation bug for X86_REDUCE mode.
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- Fix operand size of instructions with operand PTR []
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[ Arm ]
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- Fix a bug where arm_op_mem.disp is wrongly calculated (in DETAIL mode).
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- Fix a bug on handling the If-Then block.
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[ Mips ]
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- Sanity check for the input size for MIPS64 mode.
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[ MSVC ]
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- Compile capstone.dll with static runtime MSVCR built in.
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[ Python binding ]
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- Fix a compiling issue of Cython binding with gcc 4.9.
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---------------------------------
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Version 3.0.1: February 03rd, 2015
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[ X86 ]
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- Properly handle LOCK, REP, REPE & REPNE prefixes.
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- Handle undocumented immediates for SSE's (V)CMPPS/PD/SS/SD instructions.
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- Print LJUMP/LCALL without * as prefix for Intel syntax.
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- Handle REX prefix properly for segment/MMX related instructions (x86_64).
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- Instruction with length > 15 is consider invalid.
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- Handle some tricky encodings for instructions MOVSXD, FXCH, FCOM, FCOMP,
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FSTP, FSTPNCE, NOP.
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- Handle some tricky code for some X86_64 instructions with REX prefix.
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- Add missing operands in detail mode for PUSH , POP , IN/OUT reg, reg
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- MOV32ms & MOV32sm should reference word rather than dword.
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[ Arm64 ]
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- BL & BLR instructions do not read SP register.
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- Print absolute (rather than relative) address for instructions B, BL,
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CBNZ, ADR.
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[ Arm ]
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- Instructions ADC & SBC do not update flags.
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- BL & BLX do not read SP, but PC register.
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- Alias LDR instruction with operands [sp], 4 to POP.
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- Print immediate operand of MVN instruction in positive hexadecimal form.
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[ PowerPC ]
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- Fix some compilation bugs when DIET mode is enable.
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- Populate SLWI/SRWI instruction details with SH operand.
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[ Python binding ]
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- Fix a Cython bug when CsInsn.bytes returns a shorten array of bytes.
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- Fixed a memory leak for Cython disasm functions when we immaturely quit
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the enumeration of disassembled instructions.
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|
- Fix a NULL memory access issue when SKIPDATA & Detail modes are enable
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at the same time.
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- Fix a memory leaking bug when when we stop enumeration over the disassembled
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instructions prematurely.
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|
|
- Export generic operand types & groups (CS_OP_xxx & CS_GRP_xxx).
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|
|
---------------------------------
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|
|
Version 3.0: November 19th, 2014
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|
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|
|
[ API ]
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|
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|
|
- New API: cs_disasm_iter & cs_malloc. See docs/README for tutorials.
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|
|
- Renamed cs_disasm_ex to cs_disasm (cs_disasm_ex is still supported, but
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marked obsolete to be removed in future)
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|
|
- Support SKIPDATA mode, so Capstone can jump over unknown data and keep going
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from the next legitimate instruction. See docs/README for tutorials.
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|
- More details provided in cs_detail struct for all architectures.
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- API version was bumped to 3.0.
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[ Bindings ]
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- Python binding supports Python3 (besides Python2).
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- Support Ocaml binding.
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|
|
- Java: add close() method to be used to deinitialize a Capstone object when
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|
|
no longer use it.
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|
[ Architectures ]
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|
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|
|
- New architectures: Sparc, SystemZ & XCore.
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|
|
- Important bugfixes for Arm, Arm64, Mips, PowerPC & X86.
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|
|
- Support more instructions for Arm, Arm64, Mips, PowerPC & X86.
|
|
|
- Always expose absolute addresses rather than relative addresses (Arm, Arm64,
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|
|
Mips, PPC, Sparc, X86).
|
|
|
- Use common instruction operand types REG, IMM, MEM & FP across all
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|
|
architectures (to enable cross-architecture analysis).
|
|
|
- Use common instruction group types across all architectures (to enable
|
|
|
cross-architecture analysis).
|
|
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|
|
[ X86 ]
|
|
|
|
|
|
- X86 engine is mature & handles all the malware tricks (that we are aware of).
|
|
|
- Added a lot of new instructions (such as AVX512, 3DNow, etc).
|
|
|
- Add prefix symbols X86_PREFIX_REP/REPNE/LOCK/CS/DS/SS/FS/GS/ES/OPSIZE/ADDRSIZE.
|
|
|
- Print immediate in positive form & hexadecimal for AND/OR/XOR instructions.
|
|
|
- More friendly disassembly for JMP16i (in the form segment:offset)
|
|
|
|
|
|
|
|
|
[ Mips ]
|
|
|
|
|
|
- Engine added supports for new hardware modes: Mips32R6 (CS_MODE_MIPS32R6) &
|
|
|
MipsGP64 (CS_MODE_MIPSGP64).
|
|
|
- Removed the ABI-only mode CS_MODE_N64.
|
|
|
- New modes CS_MODE_MIPS32 & CS_MODE_MIPS64 (to use instead of CS_MODE_32 &
|
|
|
CS_MODE_64).
|
|
|
|
|
|
|
|
|
[ ARM ]
|
|
|
|
|
|
- Support new mode CS_MODE_V8 for Armv8 A32 encodings.
|
|
|
- Print immediate in positive form & hexadecimal for AND/ORR/EOR/BIC instructions
|
|
|
|
|
|
|
|
|
[ ARM64 ]
|
|
|
|
|
|
- Print immediate in hexadecimal for AND/ORR/EOR/TST instructions.
|
|
|
|
|
|
|
|
|
[ PowerPC ]
|
|
|
|
|
|
- Do not print a dot in front of absolute address.
|
|
|
|
|
|
|
|
|
[ Other features ]
|
|
|
|
|
|
- Support for Microsoft Visual Studio (so enable Windows native compilation).
|
|
|
- Support CMake compilation.
|
|
|
- Cross-compile for Android.
|
|
|
- Build libraries/tests using XCode project
|
|
|
- Much faster, while consuming less memory for all architectures.
|
|
|
|
|
|
---------------------------------
|
|
|
Version 2.1.2: April 3rd, 2014
|
|
|
|
|
|
This is a stable release to fix some bugs deep in the core. There is no update
|
|
|
to any architectures or bindings, so bindings version 2.1 can be used with this
|
|
|
version 2.1.2 just fine.
|
|
|
|
|
|
[ Core changes]
|
|
|
|
|
|
- Support cross-compilation for all iDevices (iPhone/iPad/iPod).
|
|
|
- X86: do not print memory offset in negative form.
|
|
|
- Fix a bug in X86 when Capstone cannot handle short instruction.
|
|
|
- Print negative number above -9 without prefix 0x (arm64, mips, arm).
|
|
|
- Correct the SONAME setup for library versioning (Linux, *BSD, Solaris).
|
|
|
- Set library versioning for dylib of OSX.
|
|
|
|
|
|
---------------------------------
|
|
|
Version 2.1.1: March 13th, 2014
|
|
|
|
|
|
This is a stable release to fix some bugs deep in the core. There is no update
|
|
|
to any architectures or bindings, so bindings version 2.1 can be used with this
|
|
|
version 2.1.1 just fine.
|
|
|
|
|
|
[ Core changes]
|
|
|
|
|
|
- Fix a buffer overflow bug in Thumb mode (ARM). Some special input can
|
|
|
trigger this flaw.
|
|
|
- Fix a crash issue when embedding Capstone into OSX kernel. This should
|
|
|
also enable Capstone to be embedded into other systems with limited stack
|
|
|
memory size such as Linux kernel or some firmwares.
|
|
|
- Use a proper SONAME for library versioning (Linux).
|
|
|
|
|
|
---------------------------------
|
|
|
Version 2.1: March 5th, 2014
|
|
|
|
|
|
[ API changes ]
|
|
|
|
|
|
- API version has been bumped to 2.1.
|
|
|
- Change prototype of cs_close() to be able to invalidate closed handle.
|
|
|
See http://capstone-engine.org/version_2.1_API.html for more information.
|
|
|
- Extend cs_support() to handle more query types, not only about supported
|
|
|
architectures. This change is backward compatible, however, so existent code
|
|
|
do not need to be modified to support this.
|
|
|
- New query type CS_SUPPORT_DIET for cs_support() to ask about diet status of
|
|
|
the engine.
|
|
|
- New error code CS_ERR_DIET to report errors about newly added diet mode.
|
|
|
- New error code CS_ERR_VERSION to report issue of incompatible versions between
|
|
|
bindings & core engine.
|
|
|
|
|
|
|
|
|
[ Core changes ]
|
|
|
|
|
|
- On memory usage, Capstone uses about 40% less memory, while still faster
|
|
|
than version 2.0.
|
|
|
- All architectures are much smaller: binaries size reduce at least 30%.
|
|
|
Especially, X86-only binary reduces from 1.9MB to just 720KB.
|
|
|
- Support "diet" mode, in which engine size is further reduced (by around 40%)
|
|
|
for embedding purpose. The price to pay is that we have to sacrifice some
|
|
|
non-critical data fields. See http://capstone-engine.org/diet.html for more
|
|
|
details.
|
|
|
|
|
|
|
|
|
[ Architectures ]
|
|
|
|
|
|
- Update all 5 architectures to fix bugs.
|
|
|
- PowerPC:
|
|
|
- New instructions: FMR & MSYNC.
|
|
|
- Mips:
|
|
|
- New instruction: DLSA
|
|
|
- X86:
|
|
|
- Properly handle AVX-512 instructions.
|
|
|
- New instructions: PSETPM, SALC, INT1, GETSEC.
|
|
|
- Fix some memory leaking issues in case of prefixed instructions such
|
|
|
as LOCK, REP, REPNE.
|
|
|
|
|
|
|
|
|
[ Python binding ]
|
|
|
|
|
|
- Verify the core version at initialization time. Refuse to run if its version
|
|
|
is different from the core's version.
|
|
|
- New API disasm_lite() added to Cs class. This light API only returns tuples of
|
|
|
(address, size, mnemonic, op_str), rather than list of CsInsn objects. This
|
|
|
improves performance by around 30% in some benchmarks.
|
|
|
- New API version_bind() returns binding's version, which might differ from
|
|
|
the core's API version if the binding is out-of-date.
|
|
|
- New API debug() returns information on Cython support, diet status & archs
|
|
|
compiled in.
|
|
|
- Fixed some memory leaking bugs for Cython binding.
|
|
|
- Fix a bug crashing Cython code when accessing @regs_read/regs_write/groups.
|
|
|
- Support diet mode.
|
|
|
|
|
|
|
|
|
[ Java binding ]
|
|
|
|
|
|
- Fix some memory leaking bugs.
|
|
|
- New API version() returns combined version.
|
|
|
- Support diet mode.
|
|
|
- Better support for detail option.
|
|
|
|
|
|
|
|
|
[ Miscellaneous ]
|
|
|
|
|
|
- make.sh now can uninstall the core engine. This is done with:
|
|
|
|
|
|
$ sudo ./make.sh uninstall
|
|
|
|
|
|
----------------------------------
|
|
|
Version 2.0: January 22nd, 2014
|
|
|
|
|
|
Release 2.0 deprecates verison 1.0 and brings a lot of crucial changes.
|
|
|
|
|
|
[ API changes ]
|
|
|
|
|
|
- API version has been bumped to 2.0 (see cs_version() API)
|
|
|
- New API cs_strerror(errno) returns a string describing error code given
|
|
|
in its only argument.
|
|
|
- cs_version() now returns combined version encoding both major & minor versions.
|
|
|
- New option CS_OPT_MODE allows to change engine’s mode at run-time with
|
|
|
cs_option().
|
|
|
- New option CS_OPT_MEM allows to specify user-defined functions for dynamically
|
|
|
memory management used internally by Capstone. This is useful to embed Capstone
|
|
|
into special environments such as kernel or firware.
|
|
|
- New API cs_support() can be used to check if this lib supports a particular
|
|
|
architecture (this is necessary since we now allow to choose which architectures
|
|
|
to compile in).
|
|
|
- The detail option is OFF by default now. To get detail information, it should be
|
|
|
explicitly turned ON. The details then can be accessed using cs_insn.detail
|
|
|
pointer (to newly added structure cs_detail)
|
|
|
|
|
|
|
|
|
[ Core changes ]
|
|
|
|
|
|
- On memory usage, Capstone uses much less memory, but a lot faster now.
|
|
|
- User now can choose which architectures to be supported by modifying config.mk
|
|
|
before compiling/installing.
|
|
|
|
|
|
|
|
|
[ Architectures ]
|
|
|
|
|
|
- Arm
|
|
|
- Support Big-Endian mode (besides Little-Endian mode).
|
|
|
- Support friendly register, so instead of output sub "r12,r11,0x14",
|
|
|
we have "sub ip,fp,0x14".
|
|
|
- Arm64: support Big-Endian mode (besides Little-Endian mode).
|
|
|
- PowerPC: newly added.
|
|
|
- Mips: support friendly register, so instead of output "srl $2,$1,0x1f",
|
|
|
we have "srl $v0,$at,0x1f".
|
|
|
- X86: bug fixes.
|
|
|
|
|
|
|
|
|
[ Python binding ]
|
|
|
|
|
|
- Python binding is vastly improved in performance: around 3 ~ 4 times faster
|
|
|
than in 1.0.
|
|
|
- Cython support has been added, which can further speed up over the default
|
|
|
pure Python binding (up to 30% in some cases)
|
|
|
- Function cs_disasm_quick() & Cs.disasm() now use generator (rather than a list)
|
|
|
to return succesfully disassembled instructions. This improves the performance
|
|
|
and reduces memory usage.
|
|
|
|
|
|
|
|
|
[ Java binding ]
|
|
|
|
|
|
- Better performance & bug fixes.
|
|
|
|
|
|
|
|
|
[ Miscellaneous ]
|
|
|
|
|
|
- Fixed some installation issues with Gentoo Linux.
|
|
|
- Capstone now can easily compile/install on all *nix, including Linux, OSX,
|
|
|
{Net, Free, Open}BSD & Solaris.
|
|
|
|
|
|
----------------------------------
|
|
|
[Version 1.0]: December 18th, 2013
|
|
|
|
|
|
- Initial public release.
|
|
|
|