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capstone/contrib/sysz_update/0007-capstone-generate-GenI...

111 lines
4.1 KiB

From b42f9f2014ec49a22077b6610863d9341a74e142 Mon Sep 17 00:00:00 2001
From: mephi42 <mephi42@gmail.com>
Date: Fri, 17 Aug 2018 11:07:39 +0200
Subject: [PATCH 7/7] capstone: generate *GenInsnNameMaps.inc
---
lib/Target/SystemZ/CMakeLists.txt | 1 +
utils/TableGen/InstrInfoEmitter.cpp | 29 +++++++++++++++++++++++++++++
utils/TableGen/TableGen.cpp | 6 ++++++
utils/TableGen/TableGenBackends.h | 1 +
4 files changed, 37 insertions(+)
diff --git a/lib/Target/SystemZ/CMakeLists.txt b/lib/Target/SystemZ/CMakeLists.txt
index 4b5d9c4a3b2..2c64e0a94b8 100644
--- a/lib/Target/SystemZ/CMakeLists.txt
+++ b/lib/Target/SystemZ/CMakeLists.txt
@@ -7,6 +7,7 @@ tablegen(LLVM SystemZGenDAGISel.inc -gen-dag-isel)
tablegen(LLVM SystemZGenDisassemblerTables.inc -gen-disassembler)
tablegen(LLVM SystemZGenInstrInfo.inc -gen-instr-info)
tablegen(LLVM SystemZMappingInsn.inc -mapping-insn)
+tablegen(LLVM SystemZGenInsnNameMaps.inc -gen-insn-name-maps)
tablegen(LLVM SystemZGenMCCodeEmitter.inc -gen-emitter)
tablegen(LLVM SystemZGenRegisterInfo.inc -gen-register-info)
tablegen(LLVM SystemZGenSubtargetInfo.inc -gen-subtarget)
diff --git a/utils/TableGen/InstrInfoEmitter.cpp b/utils/TableGen/InstrInfoEmitter.cpp
index 14ab1ea8a72..ccf8170ca62 100644
--- a/utils/TableGen/InstrInfoEmitter.cpp
+++ b/utils/TableGen/InstrInfoEmitter.cpp
@@ -837,6 +837,35 @@ void EmitMappingInsn(RecordKeeper &RK, raw_ostream &OS) {
<< "},\n";
}
}
+
+std::string GetMnemonic(const CodeGenInstruction *Inst) {
+ std::string Mnemonic = Inst->AsmString;
+
+ for (size_t i = 0; i < Mnemonic.length(); i++) {
+ if (Mnemonic[i] == '\t') {
+ return Mnemonic.substr(0, i);
+ }
+ }
+ return Mnemonic;
+}
+
+void EmitInsnNameMaps(RecordKeeper &RK, raw_ostream &OS) {
+ OS << "// This is auto-gen data for Capstone engine (www.capstone-engine.org)\n"
+ "// By Nguyen Anh Quynh <aquynh@gmail.com>\n"
+ "\n";
+ CodeGenTarget Target(RK);
+ std::map<std::string, std::string> M;
+ for (const CodeGenInstruction *Inst : Target.getInstructionsByEnumValue()) {
+ if (Inst->TheDef->getValueAsBit("isPseudo") ||
+ Inst->TheDef->getValueAsBit("isCodeGenOnly")) {
+ continue;
+ }
+ M[GetPublicName(Inst)] = GetMnemonic(Inst);
+ }
+ for (auto &P : M) {
+ OS << "\t{ " << P.first << ", \"" << P.second << "\" },\n";
+ }
+}
#endif
} // end llvm namespace
diff --git a/utils/TableGen/TableGen.cpp b/utils/TableGen/TableGen.cpp
index bbb4e860536..27c6603de5a 100644
--- a/utils/TableGen/TableGen.cpp
+++ b/utils/TableGen/TableGen.cpp
@@ -28,6 +28,7 @@ enum ActionType {
GenRegisterInfo,
GenInstrInfo,
MappingInsn,
+ GenInsnNameMaps,
GenInstrDocs,
GenAsmWriter,
GenAsmMatcher,
@@ -68,6 +69,8 @@ namespace {
"Generate instruction descriptions"),
clEnumValN(MappingInsn, "mapping-insn",
""),
+ clEnumValN(GenInsnNameMaps, "gen-insn-name-maps",
+ ""),
clEnumValN(GenInstrDocs, "gen-instr-docs",
"Generate instruction documentation"),
clEnumValN(GenCallingConv, "gen-callingconv",
@@ -141,6 +144,9 @@ bool LLVMTableGenMain(raw_ostream &OS, RecordKeeper &Records) {
case MappingInsn:
EmitMappingInsn(Records, OS);
break;
+ case GenInsnNameMaps:
+ EmitInsnNameMaps(Records, OS);
+ break;
case GenInstrDocs:
EmitInstrDocs(Records, OS);
break;
diff --git a/utils/TableGen/TableGenBackends.h b/utils/TableGen/TableGenBackends.h
index a41e46b1db0..5656e5be849 100644
--- a/utils/TableGen/TableGenBackends.h
+++ b/utils/TableGen/TableGenBackends.h
@@ -76,6 +76,7 @@ void EmitDisassembler(RecordKeeper &RK, raw_ostream &OS);
void EmitFastISel(RecordKeeper &RK, raw_ostream &OS);
void EmitInstrInfo(RecordKeeper &RK, raw_ostream &OS);
void EmitMappingInsn(RecordKeeper &RK, raw_ostream &OS);
+void EmitInsnNameMaps(RecordKeeper &RK, raw_ostream &OS);
void EmitInstrDocs(RecordKeeper &RK, raw_ostream &OS);
void EmitPseudoLowering(RecordKeeper &RK, raw_ostream &OS);
void EmitCompressInst(RecordKeeper &RK, raw_ostream &OS);
--
2.19.1