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238 lines
4.8 KiB
238 lines
4.8 KiB
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#include <stdio.h>
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#include <stdlib.h>
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#include <inttypes.h>
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#include <assert.h>
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#include <capstone/capstone.h>
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struct platform {
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cs_arch arch;
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cs_mode mode;
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char *comment;
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};
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FILE * outfile = NULL;
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struct platform platforms[] = {
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{
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// item 0
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CS_ARCH_X86,
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CS_MODE_32,
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"X86 32 (Intel syntax)"
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},
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{
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// item 1
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CS_ARCH_X86,
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CS_MODE_64,
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"X86 64 (Intel syntax)"
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},
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{
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// item 2
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CS_ARCH_ARM,
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CS_MODE_ARM,
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"ARM"
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},
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{
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// item 3
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CS_ARCH_ARM,
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CS_MODE_THUMB,
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"THUMB"
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},
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{
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// item 4
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CS_ARCH_ARM,
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(cs_mode)(CS_MODE_ARM + CS_MODE_V8),
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"Arm-V8"
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},
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{
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// item 5
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CS_ARCH_ARM,
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(cs_mode)(CS_MODE_THUMB+CS_MODE_V8),
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"THUMB+V8"
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},
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{
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// item 6
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CS_ARCH_ARM,
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(cs_mode)(CS_MODE_THUMB + CS_MODE_MCLASS),
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"Thumb-MClass"
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},
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{
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// item 7
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CS_ARCH_ARM64,
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(cs_mode)0,
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"ARM-64"
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},
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{
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// item 8
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32 + CS_MODE_BIG_ENDIAN),
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"MIPS-32 (Big-endian)"
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},
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{
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// item 9
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO),
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"MIPS-32 (micro)"
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},
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{
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//item 10
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CS_ARCH_MIPS,
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CS_MODE_MIPS64,
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"MIPS-64-EL (Little-endian)"
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},
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{
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//item 11
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CS_ARCH_MIPS,
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CS_MODE_MIPS32,
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"MIPS-32-EL (Little-endian)"
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},
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{
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//item 12
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS64 + CS_MODE_BIG_ENDIAN),
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"MIPS-64 (Big-endian)"
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},
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{
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//item 13
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN),
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"MIPS-32 | Micro (Big-endian)"
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},
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{
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//item 14
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CS_ARCH_PPC,
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CS_MODE_BIG_ENDIAN,
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"PPC-64"
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},
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{
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//item 15
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CS_ARCH_SPARC,
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CS_MODE_BIG_ENDIAN,
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"Sparc"
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},
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{
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//item 16
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CS_ARCH_SPARC,
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(cs_mode)(CS_MODE_BIG_ENDIAN + CS_MODE_V9),
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"SparcV9"
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},
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{
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//item 17
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CS_ARCH_SYSZ,
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(cs_mode)0,
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"SystemZ"
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},
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{
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//item 18
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CS_ARCH_XCORE,
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(cs_mode)0,
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"XCore"
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},
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{
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//item 19
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_BIG_ENDIAN),
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"MIPS-32R6 (Big-endian)"
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},
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{
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//item 20
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO + CS_MODE_BIG_ENDIAN),
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"MIPS-32R6 (Micro+Big-endian)"
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},
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{
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//item 21
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CS_ARCH_MIPS,
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CS_MODE_MIPS32R6,
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"MIPS-32R6 (Little-endian)"
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},
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{
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//item 22
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CS_ARCH_MIPS,
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(cs_mode)(CS_MODE_MIPS32R6 + CS_MODE_MICRO),
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"MIPS-32R6 (Micro+Little-endian)"
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},
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{
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//item 23
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CS_ARCH_M68K,
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(cs_mode)0,
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"M68K"
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},
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{
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//item 24
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CS_ARCH_M680X,
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(cs_mode)CS_MODE_M680X_6809,
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"M680X_M6809"
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},
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{
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//item 25
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CS_ARCH_EVM,
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(cs_mode)0,
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"EVM"
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},
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};
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void LLVMFuzzerInit();
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int LLVMFuzzerReturnOneInput(const uint8_t *Data, size_t Size, char * AssemblyText);
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int LLVMFuzzerTestOneInput(const uint8_t *Data, size_t Size) {
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csh handle;
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cs_insn *insn;
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cs_err err;
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const uint8_t **Datap = &Data;
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size_t * Sizep = &Size;
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uint64_t address = 0x1000;
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char LLVMAssemblyText[80];
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char CapstoneAssemblyText[80];
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if (Size < 1) {
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// 1 byte for arch choice
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return 0;
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} else if (Size > 0x1000) {
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//limit input to 4kb
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Size = 0x1000;
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}
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if (outfile == NULL) {
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// we compute the output
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outfile = fopen("/dev/null", "w");
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if (outfile == NULL) {
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return 0;
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}
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LLVMFuzzerInit();
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}
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if (Data[0] >= sizeof(platforms)/sizeof(platforms[0])) {
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return 0;
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}
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if (LLVMFuzzerReturnOneInput(Data, Size, LLVMAssemblyText) == 1) {
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return 0;
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}
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err = cs_open(platforms[Data[0]].arch, platforms[Data[0]].mode, &handle);
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if (err) {
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return 0;
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}
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insn = cs_malloc(handle);
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Data++;
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Size--;
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assert(insn);
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if (cs_disasm_iter(handle, Datap, Sizep, &address, insn)) {
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snprintf(CapstoneAssemblyText, 80, "\t%s\t%s", insn->mnemonic, insn->op_str);
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if (strcmp(CapstoneAssemblyText, LLVMAssemblyText) != 0) {
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printf("capstone %s != llvm %s", CapstoneAssemblyText, LLVMAssemblyText);
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abort();
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}
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} else {
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printf("capstone failed with llvm %s", LLVMAssemblyText);
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abort();
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}
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cs_free(insn, 1);
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cs_close(&handle);
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return 0;
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}
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