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/******************************************************************************
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Copyright (C), 2001-2011, Hisilicon Tech. Co., Ltd.
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******************************************************************************
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File Name : hi_defines.h
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Version : Initial Draft
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Author : Hisilicon multimedia software group
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Created : 2005/4/23
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Last Modified :
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Description : The common data type defination
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Function List :
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History :
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******************************************************************************/
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#ifndef __HI_DEFINES_H__
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#define __HI_DEFINES_H__
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#ifdef __cplusplus
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#if __cplusplus
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extern "C"{
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#endif
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#endif /* __cplusplus */
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#define HI3536_V100 0x35360100
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#define HI3521A_V100 0x3521a100
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#define HI3520D_V300 0x3520d300
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#define HI3531A_V100 0x3531a100
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#define HI35xx_Vxxx 0x35000000
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#ifndef HICHIP
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#define HICHIP HI3521A_V100
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#endif
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#if HICHIP==HI3536_V100
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#define CHIP_NAME "Hi3536"
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#define MPP_VER_PRIX "_MPP_V"
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#elif HICHIP==HI3521A_V100
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#define CHIP_NAME "Hi3521A"
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#define MPP_VER_PRIX "_MPP_V"
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#elif HICHIP==HI35xx_Vxxx
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#error HuHu, I am an dummy chip
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#else
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#error HICHIP define may be error
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#endif
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#define LINE_LEN_BIT 5
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#define LINE_LEN (1<<LINE_LEN_BIT)
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#define LINE_BASE_MASK (~(LINE_LEN-1))
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static inline void InvalidateDcache(unsigned long addr, unsigned long len)
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{
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unsigned long end;
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//TODO: cache刷新需要重写
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return ;
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addr &= LINE_BASE_MASK;
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len >>= LINE_LEN_BIT;
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end = addr + len*LINE_LEN;
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while(addr != end)
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{
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asm("mcr p15, 0, %0, c7, c6, 1"::"r"(addr));
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addr += LINE_LEN;
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}
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return;
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}
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static inline void FlushDcache(unsigned long addr, unsigned long len)
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{
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unsigned long end;
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//TODO: cache刷新需要重写
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return ;
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addr &= LINE_BASE_MASK;
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len >>= LINE_LEN_BIT;
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end = addr + len*LINE_LEN;
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while(addr != end)
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{
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asm("mcr p15, 0, %0, c7, c10, 1"::"r"(addr));
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addr += LINE_LEN;
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}
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return;
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}
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#define DEFAULT_ALIGN 16
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#define MAX_MMZ_NAME_LEN 16
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#define MAX_NODE_NUM 16
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/* For VDA */
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#define VDA_MAX_NODE_NUM 32
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#define VDA_MAX_INTERNAL 256
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#define VDA_CHN_NUM_MAX 128
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#define VDA_MAX_WIDTH 960
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#define VDA_MAX_HEIGHT 960
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#define VDA_MIN_WIDTH 32
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#define VDA_MIN_HEIGHT 32
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/* For VENC */
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#define VENC_MAX_NAME_LEN 16
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#define VENC_MAX_CHN_NUM 128
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#define VENC_MAX_GRP_NUM 128
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#define H264E_MAX_WIDTH 2592
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#define H264E_MAX_HEIGHT 2592
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#define H264E_MIN_WIDTH 160
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#define H264E_MIN_HEIGHT 64
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#define H265E_MAX_WIDTH 2592
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#define H265E_MAX_HEIGHT 2592
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#define H265E_MIN_WIDTH 128
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#define H265E_MIN_HEIGHT 128
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#define JPEGE_MAX_WIDTH 8192
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#define JPEGE_MAX_HEIGHT 8192
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#define JPEGE_MIN_WIDTH 32
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#define JPEGE_MIN_HEIGHT 32
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#define VENC_MAX_ROI_NUM 8 /* 最大支持8个ROI区域 */
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#define H264E_MIN_HW_INDEX 0
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#define H264E_MAX_HW_INDEX 11
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#define H264E_MIN_VW_INDEX 0
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#define H264E_MAX_VW_INDEX 5
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#define MPEG4E_MAX_HW_INDEX 1
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#define MPEG4E_MAX_VW_INDEX 0
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/*For RC*/
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#define RC_TEXTURE_THR_SIZE 12
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#define RC_RQRATIO_SIZE 8
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/* For VDEC */
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#define VDEC_MAX_COMPRESS_WIDTH 1920
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#define VDEC_MAX_CHN_NUM 64
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#define VDH_VEDU_CHN 0 /*VDH 与VEDU临界通道*/
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#define VEDU_MAX_CHN_NUM 65 // 与VFMW通道数一致，因为VEDU通道号与VFMW通道号一致
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#define MAX_VDEC_CHN VDEC_MAX_CHN_NUM
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#define BUF_RESERVE_LENTH 64 /*reserve 64byte for hardware*/
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#define H264D_MAX_SLICENUM 137
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#define VEDU_H264D_ERRRATE 10
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#define VEDU_H264D_FULLERR 100
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#define H265_WIDTH_ALIGN 64
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#define H265_HEIGHT_ALIGN 64
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#define JPEG_WIDTH_ALIGN 64
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#define H264_WIDTH_ALIGN 16
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#define H264_HEIGHT_ALIGN 32
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/* for VDH-H264 */
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#define VDH_H264D_MAX_WIDTH 4096
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#define VDH_H264D_MAX_HEIGHT 4096
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#define VDH_H264D_MIN_WIDTH 80
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#define VDH_H264D_MIN_HEIGHT 64
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#define VDH_H264D_MAX_SPS 32
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#define VDH_H264D_MIN_SPS 1
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#define VDH_H264D_MAX_PPS 256
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#define VDH_H264D_MIN_PPS 1
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#define VDH_H264D_MAX_SLICE 136
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#define VDH_H264D_MIN_SLICE 1
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/* for VDH-HEVC */
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#define VDH_H265D_MAX_WIDTH 4096
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#define VDH_H265D_MAX_HEIGHT 4096
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#define VDH_H265D_MIN_WIDTH 128
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#define VDH_H265D_MIN_HEIGHT 128
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#define VDH_H265D_MAX_VPS 16
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#define VDH_H265D_MIN_VPS 1
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#define VDH_H265D_MAX_SPS 16
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#define VDH_H265D_MIN_SPS 1
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#define VDH_H265D_MAX_PPS 64
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#define VDH_H265D_MIN_PPS 1
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#define VDH_H265D_MAX_SLICE 200
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#define VDH_H265D_MIN_SLICE 1
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/* for VDH-MPEG4 */
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#define VDH_MPEG4D_MAX_WIDTH 4096
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#define VDH_MPEG4D_MAX_HEIGHT 4096
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#define VDH_MPEG4D_MIN_WIDTH 64
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#define VDH_MPEG4D_MIN_HEIGHT 64
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/* for VEDU-H264 */
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#define VEDU_H264D_MAX_WIDTH 4096
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#define VEDU_H264D_MAX_HEIGHT 4096
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#define VEDU_H264D_MIN_WIDTH 80
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#define VEDU_H264D_MIN_HEIGHT 64
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/* for JPEG */
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#define JPEGD_MAX_WIDTH 8192
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#define JPEGD_MAX_HEIGHT 8192
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#define JPEGD_MIN_WIDTH 8
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#define JPEGD_MIN_HEIGHT 8
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/* for VPSS */
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#define VPSS_MIN_WIDTH 64
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#define VPSS_MIN_HEIGHT 64
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#define VPSS_MAX_WIDTH 4096
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#define VPSS_MAX_HEIGHT 4096
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#define VPSS_MAX_DEI_WIDTH 1280
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#define VPSS_MAX_PRESCALE_WIDTH 2560
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#define VPSS_MAX_GRP_NUM 256
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#define VPSS_VGS_GRP_NO 240
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#define VPSS_MAX_PHY_CHN_NUM 4
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#define VPSS_MAX_EXT_CHN_NUM 0
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#define VPSS_MAX_CHN_NUM (VPSS_MAX_PHY_CHN_NUM + VPSS_MAX_EXT_CHN_NUM)
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#define VPSS_CHN0 0
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#define VPSS_CHN1 1
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#define VPSS_CHN2 2
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#define VPSS_CHN3 3
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#define VPSS_INVALID_CHN -1
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#define VPSS_LUMA_STAT_NUM 64
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#define VPSS_MAX_SPLIT_NODE_NUM 4
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/* For PCIV */
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#define PCIV_MAX_CHN_NUM 128 /* max pciv channel number in each pciv device */
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/* for REGION */
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#define RGN_HANDLE_MAX 1024
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#define OVERLAY_MAX_NUM_VENC 8
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#define OVERLAY_MAX_NUM_VPSS 8
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#define OVERLAYEX_MAX_NUM_PCIV 1
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#define COVER_MAX_NUM_VPSS 4
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#define LINE_MAX_NUM_VPSS 4
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#define MASAIC_MAX_NUM_VPSS 4
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#define OVERLAYEX_MAX_NUM_VPSS 8
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#define COVEREX_MAX_NUM_VPSS 4
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#define COVEREX_MAX_NUM_VO 4
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#define OVERLAYEX_MAX_NUM_VO 1
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#define LINE_MAX_NUM_VO 4
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#if 0
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#define MAX_COVER_NUM 4
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#define MAX_VIOVERLAY_NUM 8
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#define MAX_COVEREX_REGION_NUM 16
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#define MAX_REGION_NUM 8
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#define OVERLAY_START_X_ALIGN 8
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#define OVERLAY_START_Y_ALIGN 2
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#define MAX_VIOVERLAY_ALPHA 255
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#endif
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/* number of channle and device on video input unit of chip
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* Note! VIU_MAX_CHN_NUM is NOT equal to VIU_MAX_DEV_NUM
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* multiplied by VIU_MAX_CHN_NUM, because all VI devices
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* can't work at mode of 4 channles at the same time.
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*/
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#define VIU_MAX_DEV_NUM 4
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#define VIU_MAX_WAY_NUM_PER_DEV 4
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#define VIU_MAX_CHN_NUM_PER_DEV 4
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#define VIU_MAX_PHYCHN_NUM 16
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#define VIU_EXT_CHN_START (VIU_MAX_PHYCHN_NUM + VIU_MAX_CAS_CHN_NUM)
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#define VIU_MAX_EXT_CHN_NUM 0
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#define VIU_MAX_EXTCHN_BIND_PER_CHN 0
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#define VIU_MAX_CAS_CHN_NUM 0
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#define VIU_SUB_CHN_START 16 /* useless in 3521A */
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#define VIU_CAS_CHN_START 16 /* 定义级联通道起始宏*/
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#define VIU_MAX_CHN_NUM (VIU_MAX_PHYCHN_NUM + VIU_MAX_CAS_CHN_NUM + VIU_MAX_EXT_CHN_NUM)
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#define VIU_CHNID_DEV_FACTOR 2 /* useless in 3521A */
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#define COVER_MAX_NUM_VI 4
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#define COVEREX_MAX_NUM_VI 0
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#define OVERLAY_MAX_NUM_VI 0
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#define OVERLAYEX_MAX_NUM_VI 0
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/* max number of VBI region*/
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#define VIU_MAX_VBI_NUM 2
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/* max length of one VBI region (by word)*/
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#define VIU_MAX_VBI_LEN 0x20
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/*get the subchn index by main chn */
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#define SUBCHN(ViChn) (ViChn + 16)
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/* define cascade chn */
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#define VI_CAS_CHN_1 1
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#define VI_CAS_CHN_2 2
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#define VO_MIN_CHN_WIDTH 32 /* channel minimal width */
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#define VO_MIN_CHN_HEIGHT 32 /* channel minimal height */
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#define VO_MAX_ZOOM_RATIO 1000 /* max zoom ratio, 1000 means 100% scale */
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#if 0
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/* For VOU */
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#define VO_MAX_DEV_NUM 6 /* we have three VO physical device(HD,AD,SD) and three virtual device(VD1,VD2,VD3) */
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#define VO_MAX_PHY_DEV 3 /* max physical device number(HD,AD,SD) */
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#define VO_MAX_CHN_NUM 64 /* max channel number of each device */
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#define VO_SYNC_MAX_GRP 16 /* we limit total sync group as 16 on three device */
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#define VO_SYNC_MAX_CHN 64 /* each sync group can accommodate 64 channels */
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#define VO_MIN_TOLERATE 1 /* min play toleration 1ms */
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#define VO_MAX_TOLERATE 100000 /* max play toleration 100s */
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#define VO_MAX_SOLIDDRAW 128 /* max draw region number */
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#define VO_MIN_DISP_BUF 5 /* min display buffer number */
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#define VO_MAX_DISP_BUF 15 /* max display buffer number */
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#define VO_MIN_VIRT_BUF 3 /* min virtual device buffer number */
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#define VO_MAX_VIRT_BUF 15 /* max virtual device buffer number */
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#define VIVO_CSCD_VBI_ID 0
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#define VIVO_CSCD_VBI_X 0
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#define VIVO_CSCD_VBI_Y 0
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#define VIVO_CSCD_VBI_LEN 2
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#define VIVO_CSCD_VBI_LOC VI_VBI_LOCAL_ODD_FRONT
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#define VIVO_CSCD_VBI_DATA_WORD 0
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#define VIVO_CSCD_VBI_DATA_BIT (0x01 << 31)
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#endif
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#define VO_MAX_DEV_NUM 6 /* max dev num */
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#define VO_MAX_LAYER_NUM 7 /* max layer num */
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#define VHD_MAX_CHN_NUM 32 /* max VHD chn num */
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#define VO_MAX_CHN_NUM VHD_MAX_CHN_NUM /* max chn num */
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#define VO_MAX_LAYER_IN_DEV 2 /* max layer num of each dev */
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#define VO_MAX_CAS_DEV_NUM 2 /* max cascade dev num*/
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#define VO_CAS_DEV_1 7 /* cascade display device 1 */
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#define VO_CAS_DEV_2 8 /* cascade display device 2 */
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#define VO_CAS_MAX_PAT 128 /* cascade pattern max number */
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#define VO_CAS_MAX_POS_32RGN 32 /* cascade position max number */
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#define VO_CAS_MAX_POS_64RGN 64 /* cascade position max number */
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#define VO_MAX_VIRT_DEV_NUM 4 /* max virtual dev num*/
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#define VO_VIRT_DEV_0 2 /* virtual display device 1 */
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#define VO_VIRT_DEV_1 3 /* virtual display device 2 */
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#define VO_VIRT_DEV_2 4 /* virtual display device 3 */
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#define VO_VIRT_DEV_3 5 /* virtual display device 4 */
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#define VO_MAX_GFX_LAYER_PER_DEV 2
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#define VO_MAX_GRAPHICS_LAYER_NUM 3
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#define MDDRC_ZONE_MAX_NUM 32
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#define VO_MAX_WBC_NUM 1
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#define VO_MAX_PRIORITY 2
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/* the startup condition of video compress */
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#define VIDEO_COMPRESS_WIDTH_THRESHOLD 352
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#define VO_MIN_TOLERATE 1 /* min play toleration 1ms */
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#define VO_MAX_TOLERATE 100000 /* max play toleration 100s */
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#define AI_DEV_MAX_NUM 2
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#define AO_DEV_MIN_NUM 0
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#define AO_DEV_MAX_NUM 2
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#define AIO_MAX_NUM 2
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#define AIO_MAX_CHN_NUM 16
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#define AENC_MAX_CHN_NUM 32
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#define ADEC_MAX_CHN_NUM 32
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#define RGN_MIN_WIDTH 2
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#define RGN_MIN_HEIGHT 2
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#define RGN_MAX_WIDTH 4096
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#define RGN_MAX_HEIGHT 4096
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#define RGN_ALIGN 2
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/* VB size calculate for compressed frame.
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[param input]
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w: width
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h: height
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fmt: pixel format, 0: SP420, 1: SP422
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z: compress mode, 0: no compress, 1: default compress
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[param output]
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size: vb blk size
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*/
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#define VB_W_ALIGN 16
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#define VB_H_ALIGN 32
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#define VB_ALIGN(x, a) ((a) * (((x) + (a) - 1) / (a)))
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/* VB size calculate for compressed frame.
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[param input]
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w: width
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h: height
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fmt: pixel format, 0: SP420, 1: SP422
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z: compress mode, 0: no compress, 1: default compress
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[param output]
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size: vb blk size
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*/
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#define VB_HEADER_STRIDE 16
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#define VB_PIC_Y_HEADER_SIZE(Width, Height, size)\
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do{\
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size = VB_HEADER_STRIDE * (Height);\
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}while(0)
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#define VB_PIC_HEADER_SIZE(Width, Height, Type, size)\
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do{\
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if (PIXEL_FORMAT_YUV_SEMIPLANAR_422 == Type)\
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{\
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size = VB_HEADER_STRIDE * (Height) * 2;\
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}\
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else\
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{\
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size = (VB_HEADER_STRIDE * (Height) * 3) >> 1;\
|
|
|
}\
|
|
|
}while(0)
|
|
|
|
|
|
|
|
|
#define VB_PIC_BLK_SIZE(Width, Height, Type, size)\
|
|
|
do{\
|
|
|
unsigned int u32AlignWidth;\
|
|
|
unsigned int u32AlignHeight;\
|
|
|
if (Type==PT_H264 || Type==PT_MP4VIDEO || Type==PT_MPEG2VIDEO)\
|
|
|
{\
|
|
|
u32AlignWidth = VB_ALIGN(Width,16);\
|
|
|
u32AlignHeight= VB_ALIGN(Height,32);\
|
|
|
size = ( (u32AlignWidth * u32AlignHeight) * 3) >> 1;\
|
|
|
}\
|
|
|
else if (Type==PT_H265)\
|
|
|
{\
|
|
|
u32AlignWidth = VB_ALIGN(Width,64);\
|
|
|
u32AlignHeight= VB_ALIGN(Height,64);\
|
|
|
size = ( (u32AlignWidth * u32AlignHeight) * 3) >> 1;\
|
|
|
}\
|
|
|
else\
|
|
|
{\
|
|
|
u32AlignWidth = VB_ALIGN(Width,64);\
|
|
|
u32AlignHeight= VB_ALIGN(Height,16);\
|
|
|
size = (u32AlignWidth * u32AlignHeight * 3) >> 1;\
|
|
|
}\
|
|
|
}while(0)
|
|
|
|
|
|
|
|
|
|
|
|
#define VB_PMV_BLK_SIZE(Width, Height, enType, size)\
|
|
|
do{\
|
|
|
unsigned int WidthInMb, HeightInMb;\
|
|
|
unsigned int ColMbSize;\
|
|
|
WidthInMb = (enType == PT_H265) ? ((Width + 63) >> 4) : ((Width + 15) >> 4);\
|
|
|
HeightInMb = (enType == PT_H265) ? ((Height + 63) >> 4) : ((Height + 15) >> 4);\
|
|
|
ColMbSize = (enType == PT_H265) ? (4*4) : (16*4);\
|
|
|
size = VB_ALIGN((ColMbSize * WidthInMb * HeightInMb), 128);\
|
|
|
}while(0)
|
|
|
|
|
|
|
|
|
#ifdef __cplusplus
|
|
|
#if __cplusplus
|
|
|
}
|
|
|
#endif
|
|
|
#endif /* __cplusplus */
|
|
|
|
|
|
#endif /* __HI_DEFINES_H__ */
|
|
|
|
