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100 lines
3.1 KiB
100 lines
3.1 KiB
4 years ago
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//===-- AArch64MCTargetDesc.cpp - AArch64 Target Descriptions ---*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file provides AArch64 specific target descriptions.
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//
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//===----------------------------------------------------------------------===//
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#include "AArch64MCTargetDesc.h"
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#include "AArch64ELFStreamer.h"
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#include "AArch64MCAsmInfo.h"
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#include "llvm/ADT/STLExtras.h"
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#include "llvm/MC/MCInstrInfo.h"
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#include "llvm/MC/MCRegisterInfo.h"
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#include "llvm/MC/MCStreamer.h"
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#include "llvm/MC/MCSubtargetInfo.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/TargetRegistry.h"
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using namespace llvm_ks;
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#define GET_INSTRINFO_MC_DESC
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#include "AArch64GenInstrInfo.inc"
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#define GET_SUBTARGETINFO_MC_DESC
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#include "AArch64GenSubtargetInfo.inc"
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#define GET_REGINFO_MC_DESC
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#include "AArch64GenRegisterInfo.inc"
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static MCInstrInfo *createAArch64MCInstrInfo() {
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MCInstrInfo *X = new MCInstrInfo();
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InitAArch64MCInstrInfo(X);
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return X;
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}
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static MCSubtargetInfo *
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createAArch64MCSubtargetInfo(const Triple &TT, StringRef CPU, StringRef FS) {
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if (CPU.empty())
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CPU = "generic";
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return createAArch64MCSubtargetInfoImpl(TT, CPU, FS);
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}
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static MCRegisterInfo *createAArch64MCRegisterInfo(const Triple &Triple) {
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MCRegisterInfo *X = new MCRegisterInfo();
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InitAArch64MCRegisterInfo(X, AArch64::LR);
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return X;
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}
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static MCAsmInfo *createAArch64MCAsmInfo(const MCRegisterInfo &MRI,
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const Triple &TheTriple) {
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MCAsmInfo *MAI;
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if (TheTriple.isOSBinFormatMachO())
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MAI = new AArch64MCAsmInfoDarwin();
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else {
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assert(TheTriple.isOSBinFormatELF() && "Only expect Darwin or ELF");
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MAI = new AArch64MCAsmInfoELF(TheTriple);
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}
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// Initial state of the frame pointer is SP.
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unsigned Reg = MRI.getDwarfRegNum(AArch64::SP, true);
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MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(nullptr, Reg, 0);
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MAI->addInitialFrameState(Inst);
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return MAI;
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}
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// Force static initialization.
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extern "C" void LLVMInitializeAArch64TargetMC() {
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for (Target *T :
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{&TheAArch64leTarget, &TheAArch64beTarget, &TheARM64Target}) {
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// Register the MC asm info.
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RegisterMCAsmInfoFn X(*T, createAArch64MCAsmInfo);
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// Register the MC instruction info.
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TargetRegistry::RegisterMCInstrInfo(*T, createAArch64MCInstrInfo);
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// Register the MC register info.
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TargetRegistry::RegisterMCRegInfo(*T, createAArch64MCRegisterInfo);
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// Register the MC subtarget info.
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TargetRegistry::RegisterMCSubtargetInfo(*T, createAArch64MCSubtargetInfo);
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// Register the MC Code Emitter
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TargetRegistry::RegisterMCCodeEmitter(*T, createAArch64MCCodeEmitter);
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}
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// Register the asm backend.
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for (Target *T : {&TheAArch64leTarget, &TheARM64Target})
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TargetRegistry::RegisterMCAsmBackend(*T, createAArch64leAsmBackend);
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TargetRegistry::RegisterMCAsmBackend(TheAArch64beTarget,
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createAArch64beAsmBackend);
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}
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