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219 lines
6.7 KiB
219 lines
6.7 KiB
4 years ago
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//===----- HexagonMCChecker.h - Instruction bundle checking ---------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This implements the checking of insns inside a bundle according to the
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// packet constraint rules of the Hexagon ISA.
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//
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//===----------------------------------------------------------------------===//
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#ifndef HEXAGONMCCHECKER_H
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#define HEXAGONMCCHECKER_H
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#include <map>
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#include <set>
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#include <queue>
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#include "MCTargetDesc/HexagonMCShuffler.h"
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using namespace llvm_ks;
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namespace llvm_ks {
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class MCOperandInfo;
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typedef struct {
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unsigned Error, Warning, ShuffleError;
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unsigned Register;
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} ErrInfo_T;
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class HexagonMCErrInfo {
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public:
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enum {
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CHECK_SUCCESS = 0,
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// Errors.
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CHECK_ERROR_BRANCHES = 0x00001,
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CHECK_ERROR_NEWP = 0x00002,
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CHECK_ERROR_NEWV = 0x00004,
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CHECK_ERROR_REGISTERS = 0x00008,
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CHECK_ERROR_READONLY = 0x00010,
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CHECK_ERROR_LOOP = 0x00020,
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CHECK_ERROR_ENDLOOP = 0x00040,
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CHECK_ERROR_SOLO = 0x00080,
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CHECK_ERROR_SHUFFLE = 0x00100,
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CHECK_ERROR_NOSLOTS = 0x00200,
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CHECK_ERROR_UNKNOWN = 0x00400,
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// Warnings.
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CHECK_WARN_CURRENT = 0x10000,
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CHECK_WARN_TEMPORARY = 0x20000
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};
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ErrInfo_T s;
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void reset() {
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s.Error = CHECK_SUCCESS;
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s.Warning = CHECK_SUCCESS;
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s.ShuffleError = HexagonShuffler::SHUFFLE_SUCCESS;
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s.Register = Hexagon::NoRegister;
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};
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HexagonMCErrInfo() {
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reset();
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};
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void setError(unsigned e, unsigned r = Hexagon::NoRegister)
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{ s.Error = e; s.Register = r; };
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void setWarning(unsigned w, unsigned r = Hexagon::NoRegister)
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{ s.Warning = w; s.Register = r; };
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void setShuffleError(unsigned e) { s.ShuffleError = e; };
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};
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/// Check for a valid bundle.
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class HexagonMCChecker {
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/// Insn bundle.
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MCInst& MCB;
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MCInst& MCBDX;
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const MCRegisterInfo& RI;
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MCInstrInfo const &MCII;
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MCSubtargetInfo const &STI;
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bool bLoadErrInfo;
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/// Set of definitions: register #, if predicated, if predicated true.
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typedef std::pair<unsigned, bool> PredSense;
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static const PredSense Unconditional;
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typedef std::multiset<PredSense> PredSet;
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typedef std::multiset<PredSense>::iterator PredSetIterator;
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typedef llvm_ks::DenseMap<unsigned, PredSet>::iterator DefsIterator;
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llvm_ks::DenseMap<unsigned, PredSet> Defs;
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/// Information about how a new-value register is defined or used:
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/// PredReg = predicate register, 0 if use/def not predicated,
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/// Cond = true/false for if(PredReg)/if(!PredReg) respectively,
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/// IsFloat = true if definition produces a floating point value
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/// (not valid for uses),
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/// IsNVJ = true if the use is a new-value branch (not valid for
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/// definitions).
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struct NewSense {
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unsigned PredReg;
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bool IsFloat, IsNVJ, Cond;
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// The special-case "constructors":
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static NewSense Jmp(bool isNVJ) {
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NewSense NS = { /*PredReg=*/ 0, /*IsFloat=*/ false, /*IsNVJ=*/ isNVJ,
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/*Cond=*/ false };
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return NS;
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}
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static NewSense Use(unsigned PR, bool True) {
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NewSense NS = { /*PredReg=*/ PR, /*IsFloat=*/ false, /*IsNVJ=*/ false,
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/*Cond=*/ True };
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return NS;
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}
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static NewSense Def(unsigned PR, bool True, bool Float) {
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NewSense NS = { /*PredReg=*/ PR, /*IsFloat=*/ Float, /*IsNVJ=*/ false,
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/*Cond=*/ True };
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return NS;
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}
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};
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/// Set of definitions that produce new register:
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typedef llvm_ks::SmallVector<NewSense,2> NewSenseList;
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typedef llvm_ks::DenseMap<unsigned, NewSenseList>::iterator NewDefsIterator;
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llvm_ks::DenseMap<unsigned, NewSenseList> NewDefs;
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/// Set of weak definitions whose clashes should be enforced selectively.
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typedef std::set<unsigned>::iterator SoftDefsIterator;
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std::set<unsigned> SoftDefs;
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/// Set of current definitions committed to the register file.
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typedef std::set<unsigned>::iterator CurDefsIterator;
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std::set<unsigned> CurDefs;
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/// Set of temporary definitions not committed to the register file.
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typedef std::set<unsigned>::iterator TmpDefsIterator;
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std::set<unsigned> TmpDefs;
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/// Set of new predicates used.
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typedef std::set<unsigned>::iterator NewPredsIterator;
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std::set<unsigned> NewPreds;
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/// Set of predicates defined late.
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typedef std::multiset<unsigned>::iterator LatePredsIterator;
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std::multiset<unsigned> LatePreds;
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/// Set of uses.
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typedef std::set<unsigned>::iterator UsesIterator;
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std::set<unsigned> Uses;
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/// Set of new values used: new register, if new-value jump.
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typedef llvm_ks::DenseMap<unsigned, NewSense>::iterator NewUsesIterator;
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llvm_ks::DenseMap<unsigned, NewSense> NewUses;
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/// Pre-defined set of read-only registers.
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typedef std::set<unsigned>::iterator ReadOnlyIterator;
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std::set<unsigned> ReadOnly;
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std::queue<ErrInfo_T> ErrInfoQ;
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HexagonMCErrInfo CrntErrInfo;
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void getErrInfo() {
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if (bLoadErrInfo == true) {
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if (ErrInfoQ.empty()) {
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CrntErrInfo.reset();
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} else {
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CrntErrInfo.s = ErrInfoQ.front();
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ErrInfoQ.pop();
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}
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}
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bLoadErrInfo = false;
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}
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void init();
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void init(MCInst const&);
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// Checks performed.
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bool checkBranches();
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bool checkPredicates();
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bool checkNewValues();
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bool checkRegisters();
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bool checkSolo();
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bool checkShuffle();
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bool checkSlots();
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static void compoundRegisterMap(unsigned&);
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bool isPredicateRegister(unsigned R) const {
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return (Hexagon::P0 == R || Hexagon::P1 == R ||
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Hexagon::P2 == R || Hexagon::P3 == R);
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};
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bool isLoopRegister(unsigned R) const {
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return (Hexagon::SA0 == R || Hexagon::LC0 == R ||
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Hexagon::SA1 == R || Hexagon::LC1 == R);
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};
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bool hasValidNewValueDef(const NewSense &Use,
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const NewSenseList &Defs) const;
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public:
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explicit HexagonMCChecker(MCInstrInfo const &MCII, MCSubtargetInfo const &STI, MCInst& mcb, MCInst &mcbdx,
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const MCRegisterInfo& ri);
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bool check();
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/// add a new error/warning
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void addErrInfo(HexagonMCErrInfo &err) { ErrInfoQ.push(err.s); };
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/// Return the error code for the last operation in the insn bundle.
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unsigned getError() { getErrInfo(); return CrntErrInfo.s.Error; };
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unsigned getWarning() { getErrInfo(); return CrntErrInfo.s.Warning; };
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unsigned getShuffleError() { getErrInfo(); return CrntErrInfo.s.ShuffleError; };
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unsigned getErrRegister() { getErrInfo(); return CrntErrInfo.s.Register; };
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bool getNextErrInfo() {
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bLoadErrInfo = true;
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return (ErrInfoQ.empty()) ? false : (getErrInfo(), true);
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}
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};
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}
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#endif // HEXAGONMCCHECKER_H
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