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4326 lines
130 KiB
4326 lines
130 KiB
3 years ago
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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
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|* *|
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|* Machine Code Emitter *|
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|* *|
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|* Automatically generated file, do not edit! *|
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|* *|
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\*===----------------------------------------------------------------------===*/
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uint64_t PPCMCCodeEmitter::getBinaryCodeForInstr(const MCInst &MI,
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SmallVectorImpl<MCFixup> &Fixups,
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const MCSubtargetInfo &STI) const {
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static const uint64_t InstBits[] = {
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(2080375316), // ADD4
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UINT64_C(2080375316), // ADD4TLS
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UINT64_C(2080375317), // ADD4o
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UINT64_C(2080375316), // ADD8
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UINT64_C(2080375316), // ADD8TLS
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UINT64_C(2080375316), // ADD8TLS_
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UINT64_C(2080375317), // ADD8o
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UINT64_C(2080374804), // ADDC
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UINT64_C(2080374804), // ADDC8
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UINT64_C(2080374805), // ADDC8o
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UINT64_C(2080374805), // ADDCo
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UINT64_C(2080375060), // ADDE
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UINT64_C(2080375060), // ADDE8
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UINT64_C(2080375061), // ADDE8o
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UINT64_C(2080375061), // ADDEo
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UINT64_C(939524096), // ADDI
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UINT64_C(939524096), // ADDI8
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UINT64_C(805306368), // ADDIC
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UINT64_C(805306368), // ADDIC8
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UINT64_C(872415232), // ADDICo
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UINT64_C(1006632960), // ADDIS
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UINT64_C(1006632960), // ADDIS8
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UINT64_C(0), // ADDISdtprelHA
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UINT64_C(0), // ADDISdtprelHA32
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UINT64_C(0), // ADDISgotTprelHA
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UINT64_C(0), // ADDIStlsgdHA
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UINT64_C(0), // ADDIStlsldHA
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UINT64_C(0), // ADDIStocHA
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UINT64_C(0), // ADDIdtprelL
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UINT64_C(0), // ADDIdtprelL32
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UINT64_C(0), // ADDItlsgdL
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UINT64_C(0), // ADDItlsgdL32
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UINT64_C(0), // ADDItlsgdLADDR
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UINT64_C(0), // ADDItlsgdLADDR32
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UINT64_C(0), // ADDItlsldL
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UINT64_C(0), // ADDItlsldL32
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UINT64_C(0), // ADDItlsldLADDR
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UINT64_C(0), // ADDItlsldLADDR32
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UINT64_C(0), // ADDItocL
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UINT64_C(2080375252), // ADDME
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UINT64_C(2080375252), // ADDME8
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UINT64_C(2080375253), // ADDME8o
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UINT64_C(2080375253), // ADDMEo
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UINT64_C(2080375188), // ADDZE
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UINT64_C(2080375188), // ADDZE8
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UINT64_C(2080375189), // ADDZE8o
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UINT64_C(2080375189), // ADDZEo
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UINT64_C(0), // ADJCALLSTACKDOWN
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UINT64_C(0), // ADJCALLSTACKUP
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UINT64_C(2080374840), // AND
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UINT64_C(2080374840), // AND8
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UINT64_C(2080374841), // AND8o
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UINT64_C(2080374904), // ANDC
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UINT64_C(2080374904), // ANDC8
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UINT64_C(2080374905), // ANDC8o
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UINT64_C(2080374905), // ANDCo
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UINT64_C(1946157056), // ANDISo
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UINT64_C(1946157056), // ANDISo8
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UINT64_C(1879048192), // ANDIo
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UINT64_C(1879048192), // ANDIo8
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UINT64_C(0), // ANDIo_1_EQ_BIT
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UINT64_C(0), // ANDIo_1_EQ_BIT8
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UINT64_C(0), // ANDIo_1_GT_BIT
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UINT64_C(0), // ANDIo_1_GT_BIT8
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UINT64_C(2080374841), // ANDo
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UINT64_C(0), // ATOMIC_CMP_SWAP_I16
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UINT64_C(0), // ATOMIC_CMP_SWAP_I32
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UINT64_C(0), // ATOMIC_CMP_SWAP_I64
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UINT64_C(0), // ATOMIC_CMP_SWAP_I8
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UINT64_C(0), // ATOMIC_LOAD_ADD_I16
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UINT64_C(0), // ATOMIC_LOAD_ADD_I32
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UINT64_C(0), // ATOMIC_LOAD_ADD_I64
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UINT64_C(0), // ATOMIC_LOAD_ADD_I8
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UINT64_C(0), // ATOMIC_LOAD_AND_I16
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UINT64_C(0), // ATOMIC_LOAD_AND_I32
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UINT64_C(0), // ATOMIC_LOAD_AND_I64
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UINT64_C(0), // ATOMIC_LOAD_AND_I8
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UINT64_C(0), // ATOMIC_LOAD_NAND_I16
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UINT64_C(0), // ATOMIC_LOAD_NAND_I32
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UINT64_C(0), // ATOMIC_LOAD_NAND_I64
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UINT64_C(0), // ATOMIC_LOAD_NAND_I8
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UINT64_C(0), // ATOMIC_LOAD_OR_I16
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UINT64_C(0), // ATOMIC_LOAD_OR_I32
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UINT64_C(0), // ATOMIC_LOAD_OR_I64
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UINT64_C(0), // ATOMIC_LOAD_OR_I8
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UINT64_C(0), // ATOMIC_LOAD_SUB_I16
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UINT64_C(0), // ATOMIC_LOAD_SUB_I32
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UINT64_C(0), // ATOMIC_LOAD_SUB_I64
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UINT64_C(0), // ATOMIC_LOAD_SUB_I8
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UINT64_C(0), // ATOMIC_LOAD_XOR_I16
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UINT64_C(0), // ATOMIC_LOAD_XOR_I32
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UINT64_C(0), // ATOMIC_LOAD_XOR_I64
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UINT64_C(0), // ATOMIC_LOAD_XOR_I8
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UINT64_C(0), // ATOMIC_SWAP_I16
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UINT64_C(0), // ATOMIC_SWAP_I32
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UINT64_C(0), // ATOMIC_SWAP_I64
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UINT64_C(0), // ATOMIC_SWAP_I8
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UINT64_C(512), // ATTN
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UINT64_C(1207959552), // B
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UINT64_C(1207959554), // BA
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UINT64_C(1098907648), // BC
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UINT64_C(1073741824), // BCC
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UINT64_C(1073741826), // BCCA
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UINT64_C(1275069472), // BCCCTR
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UINT64_C(1275069472), // BCCCTR8
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UINT64_C(1275069473), // BCCCTRL
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UINT64_C(1275069473), // BCCCTRL8
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UINT64_C(1073741825), // BCCL
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UINT64_C(1073741827), // BCCLA
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UINT64_C(1275068448), // BCCLR
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UINT64_C(1275068449), // BCCLRL
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UINT64_C(1300235296), // BCCTR
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UINT64_C(1300235296), // BCCTR8
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UINT64_C(1283458080), // BCCTR8n
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UINT64_C(1300235297), // BCCTRL
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UINT64_C(1300235297), // BCCTRL8
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UINT64_C(1283458081), // BCCTRL8n
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UINT64_C(1283458081), // BCCTRLn
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UINT64_C(1283458080), // BCCTRn
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UINT64_C(1098907649), // BCL
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UINT64_C(1300234272), // BCLR
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UINT64_C(1300234273), // BCLRL
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UINT64_C(1283457057), // BCLRLn
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UINT64_C(1283457056), // BCLRn
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UINT64_C(1117716481), // BCLalways
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UINT64_C(1082130433), // BCLn
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UINT64_C(1317012512), // BCTR
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UINT64_C(1317012512), // BCTR8
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UINT64_C(1317012513), // BCTRL
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UINT64_C(1317012513), // BCTRL8
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UINT64_C(5656525675654283264), // BCTRL8_LDinto_toc
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UINT64_C(1082130432), // BCn
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UINT64_C(1107296256), // BDNZ
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UINT64_C(1107296256), // BDNZ8
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UINT64_C(1107296258), // BDNZA
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UINT64_C(1124073474), // BDNZAm
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UINT64_C(1126170626), // BDNZAp
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UINT64_C(1107296257), // BDNZL
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UINT64_C(1107296259), // BDNZLA
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UINT64_C(1124073475), // BDNZLAm
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UINT64_C(1126170627), // BDNZLAp
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UINT64_C(1308622880), // BDNZLR
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UINT64_C(1308622880), // BDNZLR8
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UINT64_C(1308622881), // BDNZLRL
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UINT64_C(1325400097), // BDNZLRLm
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UINT64_C(1327497249), // BDNZLRLp
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UINT64_C(1325400096), // BDNZLRm
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UINT64_C(1327497248), // BDNZLRp
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UINT64_C(1124073473), // BDNZLm
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UINT64_C(1126170625), // BDNZLp
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UINT64_C(1124073472), // BDNZm
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UINT64_C(1126170624), // BDNZp
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UINT64_C(1111490560), // BDZ
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UINT64_C(1111490560), // BDZ8
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UINT64_C(1111490562), // BDZA
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UINT64_C(1128267778), // BDZAm
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UINT64_C(1130364930), // BDZAp
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UINT64_C(1111490561), // BDZL
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UINT64_C(1111490563), // BDZLA
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UINT64_C(1128267779), // BDZLAm
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UINT64_C(1130364931), // BDZLAp
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UINT64_C(1312817184), // BDZLR
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UINT64_C(1312817184), // BDZLR8
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UINT64_C(1312817185), // BDZLRL
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UINT64_C(1329594401), // BDZLRLm
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UINT64_C(1331691553), // BDZLRLp
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UINT64_C(1329594400), // BDZLRm
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UINT64_C(1331691552), // BDZLRp
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UINT64_C(1128267777), // BDZLm
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UINT64_C(1130364929), // BDZLp
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UINT64_C(1128267776), // BDZm
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UINT64_C(1130364928), // BDZp
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UINT64_C(1207959553), // BL
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UINT64_C(1207959553), // BL8
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UINT64_C(5188146776636391424), // BL8_NOP
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UINT64_C(5188146776636391424), // BL8_NOP_TLS
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UINT64_C(1207959553), // BL8_TLS
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UINT64_C(1207959553), // BL8_TLS_
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UINT64_C(1207959555), // BLA
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UINT64_C(1207959555), // BLA8
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UINT64_C(5188146785226326016), // BLA8_NOP
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UINT64_C(1317011488), // BLR
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UINT64_C(1317011488), // BLR8
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UINT64_C(1317011489), // BLRL
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UINT64_C(1207959553), // BL_TLS
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UINT64_C(2080375288), // BPERMD
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UINT64_C(268435983), // BRINC
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UINT64_C(2080375644), // CLRBHRB
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(2080375800), // CMPB
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UINT64_C(2080375800), // CMPB8
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UINT64_C(2082471936), // CMPD
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UINT64_C(740294656), // CMPDI
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UINT64_C(2082472000), // CMPLD
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UINT64_C(673185792), // CMPLDI
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UINT64_C(2080374848), // CMPLW
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UINT64_C(671088640), // CMPLWI
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UINT64_C(2080374784), // CMPW
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UINT64_C(738197504), // CMPWI
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UINT64_C(2080374900), // CNTLZD
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UINT64_C(2080374901), // CNTLZDo
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UINT64_C(2080374836), // CNTLZW
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UINT64_C(2080374836), // CNTLZW8
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UINT64_C(2080374837), // CNTLZW8o
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UINT64_C(2080374837), // CNTLZWo
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UINT64_C(1288057410), // CR6SET
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UINT64_C(1288057218), // CR6UNSET
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UINT64_C(1275068930), // CRAND
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UINT64_C(1275068674), // CRANDC
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UINT64_C(1275068994), // CREQV
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UINT64_C(1275068866), // CRNAND
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UINT64_C(1275068482), // CRNOR
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UINT64_C(1275069314), // CROR
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UINT64_C(1275069250), // CRORC
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UINT64_C(1275068994), // CRSET
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UINT64_C(1275068802), // CRUNSET
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UINT64_C(1275068802), // CRXOR
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UINT64_C(2080376300), // DCBA
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UINT64_C(2080374956), // DCBF
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UINT64_C(2080375724), // DCBI
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UINT64_C(2080374892), // DCBST
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UINT64_C(2080375340), // DCBT
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(2080375276), // DCBTST
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(0),
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UINT64_C(2080376812), // DCBZ
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UINT64_C(2082473964), // DCBZL
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UINT64_C(2080375692), // DCCCI
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UINT64_C(2080375762), // DIVD
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UINT64_C(2080375634), // DIVDE
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UINT64_C(2080375570), // DIVDEU
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UINT64_C(2080375571), // DIVDEUo
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UINT64_C(2080375635), // DIVDEo
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UINT64_C(2080375698), // DIVDU
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UINT64_C(2080375699), // DIVDUo
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UINT64_C(2080375763), // DIVDo
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UINT64_C(2080375766), // DIVW
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UINT64_C(2080375638), // DIVWE
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UINT64_C(2080375574), // DIVWEU
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UINT64_C(2080375575), // DIVWEUo
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UINT64_C(2080375639), // DIVWEo
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UINT64_C(2080375702), // DIVWU
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UINT64_C(2080375703), // DIVWUo
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UINT64_C(2080375767), // DIVWo
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UINT64_C(2080376428), // DSS
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UINT64_C(2113930860), // DSSALL
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UINT64_C(2080375468), // DST
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UINT64_C(2080375468), // DST64
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UINT64_C(2080375532), // DSTST
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UINT64_C(2080375532), // DSTST64
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UINT64_C(2113929964), // DSTSTT
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UINT64_C(2113929964), // DSTSTT64
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UINT64_C(2113929900), // DSTT
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UINT64_C(2113929900), // DSTT64
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UINT64_C(0), // DYNALLOC
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UINT64_C(0), // DYNALLOC8
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UINT64_C(0), // DYNAREAOFFSET
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UINT64_C(0), // DYNAREAOFFSET8
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UINT64_C(0), // EH_SjLj_LongJmp32
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UINT64_C(0), // EH_SjLj_LongJmp64
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UINT64_C(0), // EH_SjLj_SetJmp32
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UINT64_C(0), // EH_SjLj_SetJmp64
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UINT64_C(0), // EH_SjLj_Setup
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UINT64_C(2080375352), // EQV
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UINT64_C(2080375352), // EQV8
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UINT64_C(2080375353), // EQV8o
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UINT64_C(2080375353), // EQVo
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UINT64_C(268435976), // EVABS
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UINT64_C(268435970), // EVADDIW
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UINT64_C(268436681), // EVADDSMIAAW
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UINT64_C(268436673), // EVADDSSIAAW
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UINT64_C(268436680), // EVADDUMIAAW
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||
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UINT64_C(268436672), // EVADDUSIAAW
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UINT64_C(268435968), // EVADDW
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UINT64_C(268435985), // EVAND
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||
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UINT64_C(268435986), // EVANDC
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||
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UINT64_C(268436020), // EVCMPEQ
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||
|
UINT64_C(268436017), // EVCMPGTS
|
||
|
UINT64_C(268436016), // EVCMPGTU
|
||
|
UINT64_C(268436019), // EVCMPLTS
|
||
|
UINT64_C(268436018), // EVCMPLTU
|
||
|
UINT64_C(268435982), // EVCNTLSW
|
||
|
UINT64_C(268435981), // EVCNTLZW
|
||
|
UINT64_C(268436678), // EVDIVWS
|
||
|
UINT64_C(268436679), // EVDIVWU
|
||
|
UINT64_C(268435993), // EVEQV
|
||
|
UINT64_C(268435978), // EVEXTSB
|
||
|
UINT64_C(268435979), // EVEXTSH
|
||
|
UINT64_C(268436225), // EVLDD
|
||
|
UINT64_C(268436224), // EVLDDX
|
||
|
UINT64_C(268436229), // EVLDH
|
||
|
UINT64_C(268436228), // EVLDHX
|
||
|
UINT64_C(268436227), // EVLDW
|
||
|
UINT64_C(268436226), // EVLDWX
|
||
|
UINT64_C(268436233), // EVLHHESPLAT
|
||
|
UINT64_C(268436232), // EVLHHESPLATX
|
||
|
UINT64_C(268436239), // EVLHHOSSPLAT
|
||
|
UINT64_C(268436238), // EVLHHOSSPLATX
|
||
|
UINT64_C(268436237), // EVLHHOUSPLAT
|
||
|
UINT64_C(268436236), // EVLHHOUSPLATX
|
||
|
UINT64_C(268436241), // EVLWHE
|
||
|
UINT64_C(268436240), // EVLWHEX
|
||
|
UINT64_C(268436247), // EVLWHOS
|
||
|
UINT64_C(268436246), // EVLWHOSX
|
||
|
UINT64_C(268436245), // EVLWHOU
|
||
|
UINT64_C(268436244), // EVLWHOUX
|
||
|
UINT64_C(268436253), // EVLWHSPLAT
|
||
|
UINT64_C(268436252), // EVLWHSPLATX
|
||
|
UINT64_C(268436249), // EVLWWSPLAT
|
||
|
UINT64_C(268436248), // EVLWWSPLATX
|
||
|
UINT64_C(268436012), // EVMERGEHI
|
||
|
UINT64_C(268436014), // EVMERGEHILO
|
||
|
UINT64_C(268436013), // EVMERGELO
|
||
|
UINT64_C(268436015), // EVMERGELOHI
|
||
|
UINT64_C(268436779), // EVMHEGSMFAA
|
||
|
UINT64_C(268436907), // EVMHEGSMFAN
|
||
|
UINT64_C(268436777), // EVMHEGSMIAA
|
||
|
UINT64_C(268436905), // EVMHEGSMIAN
|
||
|
UINT64_C(268436776), // EVMHEGUMIAA
|
||
|
UINT64_C(268436904), // EVMHEGUMIAN
|
||
|
UINT64_C(268436491), // EVMHESMF
|
||
|
UINT64_C(268436523), // EVMHESMFA
|
||
|
UINT64_C(268436747), // EVMHESMFAAW
|
||
|
UINT64_C(268436875), // EVMHESMFANW
|
||
|
UINT64_C(268436489), // EVMHESMI
|
||
|
UINT64_C(268436521), // EVMHESMIA
|
||
|
UINT64_C(268436745), // EVMHESMIAAW
|
||
|
UINT64_C(268436873), // EVMHESMIANW
|
||
|
UINT64_C(268436483), // EVMHESSF
|
||
|
UINT64_C(268436515), // EVMHESSFA
|
||
|
UINT64_C(268436739), // EVMHESSFAAW
|
||
|
UINT64_C(268436867), // EVMHESSFANW
|
||
|
UINT64_C(268436737), // EVMHESSIAAW
|
||
|
UINT64_C(268436865), // EVMHESSIANW
|
||
|
UINT64_C(268436488), // EVMHEUMI
|
||
|
UINT64_C(268436520), // EVMHEUMIA
|
||
|
UINT64_C(268436744), // EVMHEUMIAAW
|
||
|
UINT64_C(268436872), // EVMHEUMIANW
|
||
|
UINT64_C(268436736), // EVMHEUSIAAW
|
||
|
UINT64_C(268436864), // EVMHEUSIANW
|
||
|
UINT64_C(268436783), // EVMHOGSMFAA
|
||
|
UINT64_C(268436911), // EVMHOGSMFAN
|
||
|
UINT64_C(268436781), // EVMHOGSMIAA
|
||
|
UINT64_C(268436909), // EVMHOGSMIAN
|
||
|
UINT64_C(268436780), // EVMHOGUMIAA
|
||
|
UINT64_C(268436908), // EVMHOGUMIAN
|
||
|
UINT64_C(268436495), // EVMHOSMF
|
||
|
UINT64_C(268436527), // EVMHOSMFA
|
||
|
UINT64_C(268436751), // EVMHOSMFAAW
|
||
|
UINT64_C(268436879), // EVMHOSMFANW
|
||
|
UINT64_C(268436493), // EVMHOSMI
|
||
|
UINT64_C(268436525), // EVMHOSMIA
|
||
|
UINT64_C(268436749), // EVMHOSMIAAW
|
||
|
UINT64_C(268436877), // EVMHOSMIANW
|
||
|
UINT64_C(268436487), // EVMHOSSF
|
||
|
UINT64_C(268436519), // EVMHOSSFA
|
||
|
UINT64_C(268436743), // EVMHOSSFAAW
|
||
|
UINT64_C(268436871), // EVMHOSSFANW
|
||
|
UINT64_C(268436741), // EVMHOSSIAAW
|
||
|
UINT64_C(268436869), // EVMHOSSIANW
|
||
|
UINT64_C(268436492), // EVMHOUMI
|
||
|
UINT64_C(268436524), // EVMHOUMIA
|
||
|
UINT64_C(268436748), // EVMHOUMIAAW
|
||
|
UINT64_C(268436876), // EVMHOUMIANW
|
||
|
UINT64_C(268436740), // EVMHOUSIAAW
|
||
|
UINT64_C(268436868), // EVMHOUSIANW
|
||
|
UINT64_C(268436676), // EVMRA
|
||
|
UINT64_C(268436559), // EVMWHSMF
|
||
|
UINT64_C(268436591), // EVMWHSMFA
|
||
|
UINT64_C(268436557), // EVMWHSMI
|
||
|
UINT64_C(268436589), // EVMWHSMIA
|
||
|
UINT64_C(268436551), // EVMWHSSF
|
||
|
UINT64_C(268436583), // EVMWHSSFA
|
||
|
UINT64_C(268436556), // EVMWHUMI
|
||
|
UINT64_C(268436588), // EVMWHUMIA
|
||
|
UINT64_C(268436809), // EVMWLSMIAAW
|
||
|
UINT64_C(268436937), // EVMWLSMIANW
|
||
|
UINT64_C(268436801), // EVMWLSSIAAW
|
||
|
UINT64_C(268436929), // EVMWLSSIANW
|
||
|
UINT64_C(268436552), // EVMWLUMI
|
||
|
UINT64_C(268436584), // EVMWLUMIA
|
||
|
UINT64_C(268436808), // EVMWLUMIAAW
|
||
|
UINT64_C(268436936), // EVMWLUMIANW
|
||
|
UINT64_C(268436800), // EVMWLUSIAAW
|
||
|
UINT64_C(268436928), // EVMWLUSIANW
|
||
|
UINT64_C(268436571), // EVMWSMF
|
||
|
UINT64_C(268436603), // EVMWSMFA
|
||
|
UINT64_C(268436827), // EVMWSMFAA
|
||
|
UINT64_C(268436955), // EVMWSMFAN
|
||
|
UINT64_C(268436569), // EVMWSMI
|
||
|
UINT64_C(268436601), // EVMWSMIA
|
||
|
UINT64_C(268436825), // EVMWSMIAA
|
||
|
UINT64_C(268436953), // EVMWSMIAN
|
||
|
UINT64_C(268436563), // EVMWSSF
|
||
|
UINT64_C(268436595), // EVMWSSFA
|
||
|
UINT64_C(268436819), // EVMWSSFAA
|
||
|
UINT64_C(268436947), // EVMWSSFAN
|
||
|
UINT64_C(268436568), // EVMWUMI
|
||
|
UINT64_C(268436600), // EVMWUMIA
|
||
|
UINT64_C(268436824), // EVMWUMIAA
|
||
|
UINT64_C(268436952), // EVMWUMIAN
|
||
|
UINT64_C(268435998), // EVNAND
|
||
|
UINT64_C(268435977), // EVNEG
|
||
|
UINT64_C(268435992), // EVNOR
|
||
|
UINT64_C(268435991), // EVOR
|
||
|
UINT64_C(268435995), // EVORC
|
||
|
UINT64_C(268436008), // EVRLW
|
||
|
UINT64_C(268436010), // EVRLWI
|
||
|
UINT64_C(268435980), // EVRNDW
|
||
|
UINT64_C(268436004), // EVSLW
|
||
|
UINT64_C(268436006), // EVSLWI
|
||
|
UINT64_C(268436011), // EVSPLATFI
|
||
|
UINT64_C(268436009), // EVSPLATI
|
||
|
UINT64_C(268436003), // EVSRWIS
|
||
|
UINT64_C(268436002), // EVSRWIU
|
||
|
UINT64_C(268436001), // EVSRWS
|
||
|
UINT64_C(268436000), // EVSRWU
|
||
|
UINT64_C(268436257), // EVSTDD
|
||
|
UINT64_C(268436256), // EVSTDDX
|
||
|
UINT64_C(268436261), // EVSTDH
|
||
|
UINT64_C(268436260), // EVSTDHX
|
||
|
UINT64_C(268436259), // EVSTDW
|
||
|
UINT64_C(268436258), // EVSTDWX
|
||
|
UINT64_C(268436273), // EVSTWHE
|
||
|
UINT64_C(268436272), // EVSTWHEX
|
||
|
UINT64_C(268436277), // EVSTWHO
|
||
|
UINT64_C(268436276), // EVSTWHOX
|
||
|
UINT64_C(268436281), // EVSTWWE
|
||
|
UINT64_C(268436280), // EVSTWWEX
|
||
|
UINT64_C(268436285), // EVSTWWO
|
||
|
UINT64_C(268436284), // EVSTWWOX
|
||
|
UINT64_C(268436683), // EVSUBFSMIAAW
|
||
|
UINT64_C(268436675), // EVSUBFSSIAAW
|
||
|
UINT64_C(268436682), // EVSUBFUMIAAW
|
||
|
UINT64_C(268436674), // EVSUBFUSIAAW
|
||
|
UINT64_C(268435972), // EVSUBFW
|
||
|
UINT64_C(268435974), // EVSUBIFW
|
||
|
UINT64_C(268435990), // EVXOR
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(2080376692), // EXTSB
|
||
|
UINT64_C(2080376692), // EXTSB8
|
||
|
UINT64_C(2080376692), // EXTSB8_32_64
|
||
|
UINT64_C(2080376693), // EXTSB8o
|
||
|
UINT64_C(2080376693), // EXTSBo
|
||
|
UINT64_C(2080376628), // EXTSH
|
||
|
UINT64_C(2080376628), // EXTSH8
|
||
|
UINT64_C(2080376628), // EXTSH8_32_64
|
||
|
UINT64_C(2080376629), // EXTSH8o
|
||
|
UINT64_C(2080376629), // EXTSHo
|
||
|
UINT64_C(2080376756), // EXTSW
|
||
|
UINT64_C(2080376756), // EXTSW_32_64
|
||
|
UINT64_C(2080376757), // EXTSW_32_64o
|
||
|
UINT64_C(2080376757), // EXTSWo
|
||
|
UINT64_C(2080376492), // EnforceIEIO
|
||
|
UINT64_C(4227858960), // FABSD
|
||
|
UINT64_C(4227858961), // FABSDo
|
||
|
UINT64_C(4227858960), // FABSS
|
||
|
UINT64_C(4227858961), // FABSSo
|
||
|
UINT64_C(4227858474), // FADD
|
||
|
UINT64_C(3959423018), // FADDS
|
||
|
UINT64_C(3959423019), // FADDSo
|
||
|
UINT64_C(4227858475), // FADDo
|
||
|
UINT64_C(0), // FADDrtz
|
||
|
UINT64_C(4227860124), // FCFID
|
||
|
UINT64_C(3959424668), // FCFIDS
|
||
|
UINT64_C(3959424669), // FCFIDSo
|
||
|
UINT64_C(4227860380), // FCFIDU
|
||
|
UINT64_C(3959424924), // FCFIDUS
|
||
|
UINT64_C(3959424925), // FCFIDUSo
|
||
|
UINT64_C(4227860381), // FCFIDUo
|
||
|
UINT64_C(4227860125), // FCFIDo
|
||
|
UINT64_C(4227858432), // FCMPUD
|
||
|
UINT64_C(4227858432), // FCMPUS
|
||
|
UINT64_C(4227858448), // FCPSGND
|
||
|
UINT64_C(4227858449), // FCPSGNDo
|
||
|
UINT64_C(4227858448), // FCPSGNS
|
||
|
UINT64_C(4227858449), // FCPSGNSo
|
||
|
UINT64_C(4227860060), // FCTID
|
||
|
UINT64_C(4227860318), // FCTIDUZ
|
||
|
UINT64_C(4227860319), // FCTIDUZo
|
||
|
UINT64_C(4227860062), // FCTIDZ
|
||
|
UINT64_C(4227860063), // FCTIDZo
|
||
|
UINT64_C(4227860061), // FCTIDo
|
||
|
UINT64_C(4227858460), // FCTIW
|
||
|
UINT64_C(4227858718), // FCTIWUZ
|
||
|
UINT64_C(4227858719), // FCTIWUZo
|
||
|
UINT64_C(4227858462), // FCTIWZ
|
||
|
UINT64_C(4227858463), // FCTIWZo
|
||
|
UINT64_C(4227858461), // FCTIWo
|
||
|
UINT64_C(4227858468), // FDIV
|
||
|
UINT64_C(3959423012), // FDIVS
|
||
|
UINT64_C(3959423013), // FDIVSo
|
||
|
UINT64_C(4227858469), // FDIVo
|
||
|
UINT64_C(4227858490), // FMADD
|
||
|
UINT64_C(3959423034), // FMADDS
|
||
|
UINT64_C(3959423035), // FMADDSo
|
||
|
UINT64_C(4227858491), // FMADDo
|
||
|
UINT64_C(4227858576), // FMR
|
||
|
UINT64_C(4227858577), // FMRo
|
||
|
UINT64_C(4227858488), // FMSUB
|
||
|
UINT64_C(3959423032), // FMSUBS
|
||
|
UINT64_C(3959423033), // FMSUBSo
|
||
|
UINT64_C(4227858489), // FMSUBo
|
||
|
UINT64_C(4227858482), // FMUL
|
||
|
UINT64_C(3959423026), // FMULS
|
||
|
UINT64_C(3959423027), // FMULSo
|
||
|
UINT64_C(4227858483), // FMULo
|
||
|
UINT64_C(4227858704), // FNABSD
|
||
|
UINT64_C(4227858705), // FNABSDo
|
||
|
UINT64_C(4227858704), // FNABSS
|
||
|
UINT64_C(4227858705), // FNABSSo
|
||
|
UINT64_C(4227858512), // FNEGD
|
||
|
UINT64_C(4227858513), // FNEGDo
|
||
|
UINT64_C(4227858512), // FNEGS
|
||
|
UINT64_C(4227858513), // FNEGSo
|
||
|
UINT64_C(4227858494), // FNMADD
|
||
|
UINT64_C(3959423038), // FNMADDS
|
||
|
UINT64_C(3959423039), // FNMADDSo
|
||
|
UINT64_C(4227858495), // FNMADDo
|
||
|
UINT64_C(4227858492), // FNMSUB
|
||
|
UINT64_C(3959423036), // FNMSUBS
|
||
|
UINT64_C(3959423037), // FNMSUBSo
|
||
|
UINT64_C(4227858493), // FNMSUBo
|
||
|
UINT64_C(4227858480), // FRE
|
||
|
UINT64_C(3959423024), // FRES
|
||
|
UINT64_C(3959423025), // FRESo
|
||
|
UINT64_C(4227858481), // FREo
|
||
|
UINT64_C(4227859408), // FRIMD
|
||
|
UINT64_C(4227859409), // FRIMDo
|
||
|
UINT64_C(4227859408), // FRIMS
|
||
|
UINT64_C(4227859409), // FRIMSo
|
||
|
UINT64_C(4227859216), // FRIND
|
||
|
UINT64_C(4227859217), // FRINDo
|
||
|
UINT64_C(4227859216), // FRINS
|
||
|
UINT64_C(4227859217), // FRINSo
|
||
|
UINT64_C(4227859344), // FRIPD
|
||
|
UINT64_C(4227859345), // FRIPDo
|
||
|
UINT64_C(4227859344), // FRIPS
|
||
|
UINT64_C(4227859345), // FRIPSo
|
||
|
UINT64_C(4227859280), // FRIZD
|
||
|
UINT64_C(4227859281), // FRIZDo
|
||
|
UINT64_C(4227859280), // FRIZS
|
||
|
UINT64_C(4227859281), // FRIZSo
|
||
|
UINT64_C(4227858456), // FRSP
|
||
|
UINT64_C(4227858457), // FRSPo
|
||
|
UINT64_C(4227858484), // FRSQRTE
|
||
|
UINT64_C(3959423028), // FRSQRTES
|
||
|
UINT64_C(3959423029), // FRSQRTESo
|
||
|
UINT64_C(4227858485), // FRSQRTEo
|
||
|
UINT64_C(4227858478), // FSELD
|
||
|
UINT64_C(4227858479), // FSELDo
|
||
|
UINT64_C(4227858478), // FSELS
|
||
|
UINT64_C(4227858479), // FSELSo
|
||
|
UINT64_C(4227858476), // FSQRT
|
||
|
UINT64_C(3959423020), // FSQRTS
|
||
|
UINT64_C(3959423021), // FSQRTSo
|
||
|
UINT64_C(4227858477), // FSQRTo
|
||
|
UINT64_C(4227858472), // FSUB
|
||
|
UINT64_C(3959423016), // FSUBS
|
||
|
UINT64_C(3959423017), // FSUBSo
|
||
|
UINT64_C(4227858473), // FSUBo
|
||
|
UINT64_C(0), // GETtlsADDR
|
||
|
UINT64_C(0), // GETtlsADDR32
|
||
|
UINT64_C(0), // GETtlsldADDR
|
||
|
UINT64_C(0), // GETtlsldADDR32
|
||
|
UINT64_C(2080376748), // ICBI
|
||
|
UINT64_C(2080374828), // ICBT
|
||
|
UINT64_C(2080376716), // ICCCI
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(2080374814), // ISEL
|
||
|
UINT64_C(2080374814), // ISEL8
|
||
|
UINT64_C(1275068716), // ISYNC
|
||
|
UINT64_C(939524096), // LA
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(2080374888), // LBARX
|
||
|
UINT64_C(2080374889), // LBARXL
|
||
|
UINT64_C(2281701376), // LBZ
|
||
|
UINT64_C(2281701376), // LBZ8
|
||
|
UINT64_C(2080376490), // LBZCIX
|
||
|
UINT64_C(2348810240), // LBZU
|
||
|
UINT64_C(2348810240), // LBZU8
|
||
|
UINT64_C(2080375022), // LBZUX
|
||
|
UINT64_C(2080375022), // LBZUX8
|
||
|
UINT64_C(2080374958), // LBZX
|
||
|
UINT64_C(2080374958), // LBZX8
|
||
|
UINT64_C(3892314112), // LD
|
||
|
UINT64_C(2080374952), // LDARX
|
||
|
UINT64_C(2080374953), // LDARXL
|
||
|
UINT64_C(2080375848), // LDBRX
|
||
|
UINT64_C(2080376554), // LDCIX
|
||
|
UINT64_C(3892314113), // LDU
|
||
|
UINT64_C(2080374890), // LDUX
|
||
|
UINT64_C(2080374826), // LDX
|
||
|
UINT64_C(0), // LDgotTprelL
|
||
|
UINT64_C(0), // LDgotTprelL32
|
||
|
UINT64_C(0), // LDtoc
|
||
|
UINT64_C(0), // LDtocBA
|
||
|
UINT64_C(0), // LDtocCPT
|
||
|
UINT64_C(0), // LDtocJTI
|
||
|
UINT64_C(0), // LDtocL
|
||
|
UINT64_C(3355443200), // LFD
|
||
|
UINT64_C(3422552064), // LFDU
|
||
|
UINT64_C(2080376046), // LFDUX
|
||
|
UINT64_C(2080375982), // LFDX
|
||
|
UINT64_C(2080376494), // LFIWAX
|
||
|
UINT64_C(2080376558), // LFIWZX
|
||
|
UINT64_C(3221225472), // LFS
|
||
|
UINT64_C(3288334336), // LFSU
|
||
|
UINT64_C(2080375918), // LFSUX
|
||
|
UINT64_C(2080375854), // LFSX
|
||
|
UINT64_C(2818572288), // LHA
|
||
|
UINT64_C(2818572288), // LHA8
|
||
|
UINT64_C(2080375016), // LHARX
|
||
|
UINT64_C(2080375017), // LHARXL
|
||
|
UINT64_C(2885681152), // LHAU
|
||
|
UINT64_C(2885681152), // LHAU8
|
||
|
UINT64_C(2080375534), // LHAUX
|
||
|
UINT64_C(2080375534), // LHAUX8
|
||
|
UINT64_C(2080375470), // LHAX
|
||
|
UINT64_C(2080375470), // LHAX8
|
||
|
UINT64_C(2080376364), // LHBRX
|
||
|
UINT64_C(2080376364), // LHBRX8
|
||
|
UINT64_C(2684354560), // LHZ
|
||
|
UINT64_C(2684354560), // LHZ8
|
||
|
UINT64_C(2080376426), // LHZCIX
|
||
|
UINT64_C(2751463424), // LHZU
|
||
|
UINT64_C(2751463424), // LHZU8
|
||
|
UINT64_C(2080375406), // LHZUX
|
||
|
UINT64_C(2080375406), // LHZUX8
|
||
|
UINT64_C(2080375342), // LHZX
|
||
|
UINT64_C(2080375342), // LHZX8
|
||
|
UINT64_C(939524096), // LI
|
||
|
UINT64_C(939524096), // LI8
|
||
|
UINT64_C(1006632960), // LIS
|
||
|
UINT64_C(1006632960), // LIS8
|
||
|
UINT64_C(3087007744), // LMW
|
||
|
UINT64_C(2080375978), // LSWI
|
||
|
UINT64_C(2080374798), // LVEBX
|
||
|
UINT64_C(2080374862), // LVEHX
|
||
|
UINT64_C(2080374926), // LVEWX
|
||
|
UINT64_C(2080374796), // LVSL
|
||
|
UINT64_C(2080374860), // LVSR
|
||
|
UINT64_C(2080374990), // LVX
|
||
|
UINT64_C(2080375502), // LVXL
|
||
|
UINT64_C(3892314114), // LWA
|
||
|
UINT64_C(2080374824), // LWARX
|
||
|
UINT64_C(2080374825), // LWARXL
|
||
|
UINT64_C(2080375530), // LWAUX
|
||
|
UINT64_C(2080375466), // LWAX
|
||
|
UINT64_C(2080375466), // LWAX_32
|
||
|
UINT64_C(3892314114), // LWA_32
|
||
|
UINT64_C(2080375852), // LWBRX
|
||
|
UINT64_C(2080375852), // LWBRX8
|
||
|
UINT64_C(2147483648), // LWZ
|
||
|
UINT64_C(2147483648), // LWZ8
|
||
|
UINT64_C(2080376362), // LWZCIX
|
||
|
UINT64_C(2214592512), // LWZU
|
||
|
UINT64_C(2214592512), // LWZU8
|
||
|
UINT64_C(2080374894), // LWZUX
|
||
|
UINT64_C(2080374894), // LWZUX8
|
||
|
UINT64_C(2080374830), // LWZX
|
||
|
UINT64_C(2080374830), // LWZX8
|
||
|
UINT64_C(0), // LWZtoc
|
||
|
UINT64_C(2080375960), // LXSDX
|
||
|
UINT64_C(2080374936), // LXSIWAX
|
||
|
UINT64_C(2080374808), // LXSIWZX
|
||
|
UINT64_C(2080375832), // LXSSPX
|
||
|
UINT64_C(2080376472), // LXVD2X
|
||
|
UINT64_C(2080375448), // LXVDSX
|
||
|
UINT64_C(2080376344), // LXVW4X
|
||
|
UINT64_C(2080376492), // MBAR
|
||
|
UINT64_C(1275068416), // MCRF
|
||
|
UINT64_C(4227858560), // MCRFS
|
||
|
UINT64_C(2080375388), // MFBHRBE
|
||
|
UINT64_C(2080374822), // MFCR
|
||
|
UINT64_C(2080374822), // MFCR8
|
||
|
UINT64_C(2080965286), // MFCTR
|
||
|
UINT64_C(2080965286), // MFCTR8
|
||
|
UINT64_C(2080375430), // MFDCR
|
||
|
UINT64_C(4227859598), // MFFS
|
||
|
UINT64_C(4227859599), // MFFSo
|
||
|
UINT64_C(2080899750), // MFLR
|
||
|
UINT64_C(2080899750), // MFLR8
|
||
|
UINT64_C(2080374950), // MFMSR
|
||
|
UINT64_C(2081423398), // MFOCRF
|
||
|
UINT64_C(2081423398), // MFOCRF8
|
||
|
UINT64_C(2080375462), // MFSPR
|
||
|
UINT64_C(2080375462), // MFSPR8
|
||
|
UINT64_C(2080375974), // MFSR
|
||
|
UINT64_C(2080376102), // MFSRIN
|
||
|
UINT64_C(2080375526), // MFTB
|
||
|
UINT64_C(2081178278), // MFTB8
|
||
|
UINT64_C(2080391846), // MFVRSAVE
|
||
|
UINT64_C(2080391846), // MFVRSAVEv
|
||
|
UINT64_C(268436996), // MFVSCR
|
||
|
UINT64_C(2080374886), // MFVSRD
|
||
|
UINT64_C(2080375014), // MFVSRWZ
|
||
|
UINT64_C(2080375980), // MSYNC
|
||
|
UINT64_C(2080375072), // MTCRF
|
||
|
UINT64_C(2080375072), // MTCRF8
|
||
|
UINT64_C(2080965542), // MTCTR
|
||
|
UINT64_C(2080965542), // MTCTR8
|
||
|
UINT64_C(2080965542), // MTCTR8loop
|
||
|
UINT64_C(2080965542), // MTCTRloop
|
||
|
UINT64_C(2080375686), // MTDCR
|
||
|
UINT64_C(4227858572), // MTFSB0
|
||
|
UINT64_C(4227858508), // MTFSB1
|
||
|
UINT64_C(4227859854), // MTFSF
|
||
|
UINT64_C(4227858700), // MTFSFI
|
||
|
UINT64_C(4227858701), // MTFSFIo
|
||
|
UINT64_C(4227859854), // MTFSFb
|
||
|
UINT64_C(4227859855), // MTFSFo
|
||
|
UINT64_C(2080900006), // MTLR
|
||
|
UINT64_C(2080900006), // MTLR8
|
||
|
UINT64_C(2080375076), // MTMSR
|
||
|
UINT64_C(2080375140), // MTMSRD
|
||
|
UINT64_C(2081423648), // MTOCRF
|
||
|
UINT64_C(2081423648), // MTOCRF8
|
||
|
UINT64_C(2080375718), // MTSPR
|
||
|
UINT64_C(2080375718), // MTSPR8
|
||
|
UINT64_C(2080375204), // MTSR
|
||
|
UINT64_C(2080375268), // MTSRIN
|
||
|
UINT64_C(2080392102), // MTVRSAVE
|
||
|
UINT64_C(2080392102), // MTVRSAVEv
|
||
|
UINT64_C(268437060), // MTVSCR
|
||
|
UINT64_C(2080375142), // MTVSRD
|
||
|
UINT64_C(2080375206), // MTVSRWA
|
||
|
UINT64_C(2080375270), // MTVSRWZ
|
||
|
UINT64_C(2080374930), // MULHD
|
||
|
UINT64_C(2080374802), // MULHDU
|
||
|
UINT64_C(2080374803), // MULHDUo
|
||
|
UINT64_C(2080374931), // MULHDo
|
||
|
UINT64_C(2080374934), // MULHW
|
||
|
UINT64_C(2080374806), // MULHWU
|
||
|
UINT64_C(2080374807), // MULHWUo
|
||
|
UINT64_C(2080374935), // MULHWo
|
||
|
UINT64_C(2080375250), // MULLD
|
||
|
UINT64_C(2080375251), // MULLDo
|
||
|
UINT64_C(469762048), // MULLI
|
||
|
UINT64_C(469762048), // MULLI8
|
||
|
UINT64_C(2080375254), // MULLW
|
||
|
UINT64_C(2080375255), // MULLWo
|
||
|
UINT64_C(0), // MoveGOTtoLR
|
||
|
UINT64_C(0), // MovePCtoLR
|
||
|
UINT64_C(0), // MovePCtoLR8
|
||
|
UINT64_C(2080375736), // NAND
|
||
|
UINT64_C(2080375736), // NAND8
|
||
|
UINT64_C(2080375737), // NAND8o
|
||
|
UINT64_C(2080375737), // NANDo
|
||
|
UINT64_C(2080374992), // NEG
|
||
|
UINT64_C(2080374992), // NEG8
|
||
|
UINT64_C(2080374993), // NEG8o
|
||
|
UINT64_C(2080374993), // NEGo
|
||
|
UINT64_C(1610612736), // NOP
|
||
|
UINT64_C(1612775424), // NOP_GT_PWR6
|
||
|
UINT64_C(1614938112), // NOP_GT_PWR7
|
||
|
UINT64_C(2080375032), // NOR
|
||
|
UINT64_C(2080375032), // NOR8
|
||
|
UINT64_C(2080375033), // NOR8o
|
||
|
UINT64_C(2080375033), // NORo
|
||
|
UINT64_C(2080375672), // OR
|
||
|
UINT64_C(2080375672), // OR8
|
||
|
UINT64_C(2080375673), // OR8o
|
||
|
UINT64_C(2080375608), // ORC
|
||
|
UINT64_C(2080375608), // ORC8
|
||
|
UINT64_C(2080375609), // ORC8o
|
||
|
UINT64_C(2080375609), // ORCo
|
||
|
UINT64_C(1610612736), // ORI
|
||
|
UINT64_C(1610612736), // ORI8
|
||
|
UINT64_C(1677721600), // ORIS
|
||
|
UINT64_C(1677721600), // ORIS8
|
||
|
UINT64_C(2080375673), // ORo
|
||
|
UINT64_C(2080375796), // POPCNTD
|
||
|
UINT64_C(2080375540), // POPCNTW
|
||
|
UINT64_C(0), // PPC32GOT
|
||
|
UINT64_C(0), // PPC32PICGOT
|
||
|
UINT64_C(268435466), // QVALIGNI
|
||
|
UINT64_C(268435466), // QVALIGNIb
|
||
|
UINT64_C(268435466), // QVALIGNIs
|
||
|
UINT64_C(268435530), // QVESPLATI
|
||
|
UINT64_C(268435530), // QVESPLATIb
|
||
|
UINT64_C(268435530), // QVESPLATIs
|
||
|
UINT64_C(268435984), // QVFABS
|
||
|
UINT64_C(268435984), // QVFABSs
|
||
|
UINT64_C(268435498), // QVFADD
|
||
|
UINT64_C(42), // QVFADDS
|
||
|
UINT64_C(42), // QVFADDSs
|
||
|
UINT64_C(268437148), // QVFCFID
|
||
|
UINT64_C(1692), // QVFCFIDS
|
||
|
UINT64_C(268437404), // QVFCFIDU
|
||
|
UINT64_C(1948), // QVFCFIDUS
|
||
|
UINT64_C(268437148), // QVFCFIDb
|
||
|
UINT64_C(268435456), // QVFCMPEQ
|
||
|
UINT64_C(268435456), // QVFCMPEQb
|
||
|
UINT64_C(268435456), // QVFCMPEQbs
|
||
|
UINT64_C(268435520), // QVFCMPGT
|
||
|
UINT64_C(268435520), // QVFCMPGTb
|
||
|
UINT64_C(268435520), // QVFCMPGTbs
|
||
|
UINT64_C(268435648), // QVFCMPLT
|
||
|
UINT64_C(268435648), // QVFCMPLTb
|
||
|
UINT64_C(268435648), // QVFCMPLTbs
|
||
|
UINT64_C(268435472), // QVFCPSGN
|
||
|
UINT64_C(268435472), // QVFCPSGNs
|
||
|
UINT64_C(268437084), // QVFCTID
|
||
|
UINT64_C(268437340), // QVFCTIDU
|
||
|
UINT64_C(268437342), // QVFCTIDUZ
|
||
|
UINT64_C(268437086), // QVFCTIDZ
|
||
|
UINT64_C(268437084), // QVFCTIDb
|
||
|
UINT64_C(268435484), // QVFCTIW
|
||
|
UINT64_C(268435740), // QVFCTIWU
|
||
|
UINT64_C(268435742), // QVFCTIWUZ
|
||
|
UINT64_C(268435486), // QVFCTIWZ
|
||
|
UINT64_C(268435464), // QVFLOGICAL
|
||
|
UINT64_C(268435464), // QVFLOGICALb
|
||
|
UINT64_C(268435464), // QVFLOGICALs
|
||
|
UINT64_C(268435514), // QVFMADD
|
||
|
UINT64_C(58), // QVFMADDS
|
||
|
UINT64_C(58), // QVFMADDSs
|
||
|
UINT64_C(268435600), // QVFMR
|
||
|
UINT64_C(268435600), // QVFMRb
|
||
|
UINT64_C(268435600), // QVFMRs
|
||
|
UINT64_C(268435512), // QVFMSUB
|
||
|
UINT64_C(56), // QVFMSUBS
|
||
|
UINT64_C(56), // QVFMSUBSs
|
||
|
UINT64_C(268435506), // QVFMUL
|
||
|
UINT64_C(50), // QVFMULS
|
||
|
UINT64_C(50), // QVFMULSs
|
||
|
UINT64_C(268435728), // QVFNABS
|
||
|
UINT64_C(268435728), // QVFNABSs
|
||
|
UINT64_C(268435536), // QVFNEG
|
||
|
UINT64_C(268435536), // QVFNEGs
|
||
|
UINT64_C(268435518), // QVFNMADD
|
||
|
UINT64_C(62), // QVFNMADDS
|
||
|
UINT64_C(62), // QVFNMADDSs
|
||
|
UINT64_C(268435516), // QVFNMSUB
|
||
|
UINT64_C(60), // QVFNMSUBS
|
||
|
UINT64_C(60), // QVFNMSUBSs
|
||
|
UINT64_C(268435468), // QVFPERM
|
||
|
UINT64_C(268435468), // QVFPERMs
|
||
|
UINT64_C(268435504), // QVFRE
|
||
|
UINT64_C(48), // QVFRES
|
||
|
UINT64_C(48), // QVFRESs
|
||
|
UINT64_C(268436432), // QVFRIM
|
||
|
UINT64_C(268436432), // QVFRIMs
|
||
|
UINT64_C(268436240), // QVFRIN
|
||
|
UINT64_C(268436240), // QVFRINs
|
||
|
UINT64_C(268436368), // QVFRIP
|
||
|
UINT64_C(268436368), // QVFRIPs
|
||
|
UINT64_C(268436304), // QVFRIZ
|
||
|
UINT64_C(268436304), // QVFRIZs
|
||
|
UINT64_C(268435480), // QVFRSP
|
||
|
UINT64_C(268435480), // QVFRSPs
|
||
|
UINT64_C(268435508), // QVFRSQRTE
|
||
|
UINT64_C(52), // QVFRSQRTES
|
||
|
UINT64_C(52), // QVFRSQRTESs
|
||
|
UINT64_C(268435502), // QVFSEL
|
||
|
UINT64_C(268435502), // QVFSELb
|
||
|
UINT64_C(268435502), // QVFSELbb
|
||
|
UINT64_C(268435502), // QVFSELbs
|
||
|
UINT64_C(268435496), // QVFSUB
|
||
|
UINT64_C(40), // QVFSUBS
|
||
|
UINT64_C(40), // QVFSUBSs
|
||
|
UINT64_C(268435584), // QVFTSTNAN
|
||
|
UINT64_C(268435584), // QVFTSTNANb
|
||
|
UINT64_C(268435584), // QVFTSTNANbs
|
||
|
UINT64_C(268435474), // QVFXMADD
|
||
|
UINT64_C(18), // QVFXMADDS
|
||
|
UINT64_C(268435490), // QVFXMUL
|
||
|
UINT64_C(34), // QVFXMULS
|
||
|
UINT64_C(268435462), // QVFXXCPNMADD
|
||
|
UINT64_C(6), // QVFXXCPNMADDS
|
||
|
UINT64_C(268435458), // QVFXXMADD
|
||
|
UINT64_C(2), // QVFXXMADDS
|
||
|
UINT64_C(268435478), // QVFXXNPMADD
|
||
|
UINT64_C(22), // QVFXXNPMADDS
|
||
|
UINT64_C(268435722), // QVGPCI
|
||
|
UINT64_C(2080374990), // QVLFCDUX
|
||
|
UINT64_C(2080374991), // QVLFCDUXA
|
||
|
UINT64_C(2080374926), // QVLFCDX
|
||
|
UINT64_C(2080374927), // QVLFCDXA
|
||
|
UINT64_C(2080374862), // QVLFCSUX
|
||
|
UINT64_C(2080374863), // QVLFCSUXA
|
||
|
UINT64_C(2080374798), // QVLFCSX
|
||
|
UINT64_C(2080374799), // QVLFCSXA
|
||
|
UINT64_C(2080374798), // QVLFCSXs
|
||
|
UINT64_C(2080376014), // QVLFDUX
|
||
|
UINT64_C(2080376015), // QVLFDUXA
|
||
|
UINT64_C(2080375950), // QVLFDX
|
||
|
UINT64_C(2080375951), // QVLFDXA
|
||
|
UINT64_C(2080375950), // QVLFDXb
|
||
|
UINT64_C(2080376526), // QVLFIWAX
|
||
|
UINT64_C(2080376527), // QVLFIWAXA
|
||
|
UINT64_C(2080376462), // QVLFIWZX
|
||
|
UINT64_C(2080376463), // QVLFIWZXA
|
||
|
UINT64_C(2080375886), // QVLFSUX
|
||
|
UINT64_C(2080375887), // QVLFSUXA
|
||
|
UINT64_C(2080375822), // QVLFSX
|
||
|
UINT64_C(2080375823), // QVLFSXA
|
||
|
UINT64_C(2080375822), // QVLFSXb
|
||
|
UINT64_C(2080375822), // QVLFSXs
|
||
|
UINT64_C(2080375948), // QVLPCLDX
|
||
|
UINT64_C(2080375820), // QVLPCLSX
|
||
|
UINT64_C(2080375820), // QVLPCLSXint
|
||
|
UINT64_C(2080374924), // QVLPCRDX
|
||
|
UINT64_C(2080374796), // QVLPCRSX
|
||
|
UINT64_C(2080375246), // QVSTFCDUX
|
||
|
UINT64_C(2080375247), // QVSTFCDUXA
|
||
|
UINT64_C(2080375242), // QVSTFCDUXI
|
||
|
UINT64_C(2080375243), // QVSTFCDUXIA
|
||
|
UINT64_C(2080375182), // QVSTFCDX
|
||
|
UINT64_C(2080375183), // QVSTFCDXA
|
||
|
UINT64_C(2080375178), // QVSTFCDXI
|
||
|
UINT64_C(2080375179), // QVSTFCDXIA
|
||
|
UINT64_C(2080375118), // QVSTFCSUX
|
||
|
UINT64_C(2080375119), // QVSTFCSUXA
|
||
|
UINT64_C(2080375114), // QVSTFCSUXI
|
||
|
UINT64_C(2080375115), // QVSTFCSUXIA
|
||
|
UINT64_C(2080375054), // QVSTFCSX
|
||
|
UINT64_C(2080375055), // QVSTFCSXA
|
||
|
UINT64_C(2080375050), // QVSTFCSXI
|
||
|
UINT64_C(2080375051), // QVSTFCSXIA
|
||
|
UINT64_C(2080375054), // QVSTFCSXs
|
||
|
UINT64_C(2080376270), // QVSTFDUX
|
||
|
UINT64_C(2080376271), // QVSTFDUXA
|
||
|
UINT64_C(2080376266), // QVSTFDUXI
|
||
|
UINT64_C(2080376267), // QVSTFDUXIA
|
||
|
UINT64_C(2080376206), // QVSTFDX
|
||
|
UINT64_C(2080376207), // QVSTFDXA
|
||
|
UINT64_C(2080376202), // QVSTFDXI
|
||
|
UINT64_C(2080376203), // QVSTFDXIA
|
||
|
UINT64_C(2080376206), // QVSTFDXb
|
||
|
UINT64_C(2080376718), // QVSTFIWX
|
||
|
UINT64_C(2080376719), // QVSTFIWXA
|
||
|
UINT64_C(2080376142), // QVSTFSUX
|
||
|
UINT64_C(2080376143), // QVSTFSUXA
|
||
|
UINT64_C(2080376138), // QVSTFSUXI
|
||
|
UINT64_C(2080376139), // QVSTFSUXIA
|
||
|
UINT64_C(2080376142), // QVSTFSUXs
|
||
|
UINT64_C(2080376078), // QVSTFSX
|
||
|
UINT64_C(2080376079), // QVSTFSXA
|
||
|
UINT64_C(2080376074), // QVSTFSXI
|
||
|
UINT64_C(2080376075), // QVSTFSXIA
|
||
|
UINT64_C(2080376078), // QVSTFSXs
|
||
|
UINT64_C(0), // RESTORE_CR
|
||
|
UINT64_C(0), // RESTORE_CRBIT
|
||
|
UINT64_C(0), // RESTORE_VRSAVE
|
||
|
UINT64_C(1275068518), // RFCI
|
||
|
UINT64_C(1275068494), // RFDI
|
||
|
UINT64_C(1275068708), // RFEBB
|
||
|
UINT64_C(1275068516), // RFI
|
||
|
UINT64_C(1275068452), // RFID
|
||
|
UINT64_C(1275068492), // RFMCI
|
||
|
UINT64_C(2013265936), // RLDCL
|
||
|
UINT64_C(2013265937), // RLDCLo
|
||
|
UINT64_C(2013265938), // RLDCR
|
||
|
UINT64_C(2013265939), // RLDCRo
|
||
|
UINT64_C(2013265928), // RLDIC
|
||
|
UINT64_C(2013265920), // RLDICL
|
||
|
UINT64_C(2013265920), // RLDICL_32_64
|
||
|
UINT64_C(2013265921), // RLDICLo
|
||
|
UINT64_C(2013265924), // RLDICR
|
||
|
UINT64_C(2013265925), // RLDICRo
|
||
|
UINT64_C(2013265929), // RLDICo
|
||
|
UINT64_C(2013265932), // RLDIMI
|
||
|
UINT64_C(2013265933), // RLDIMIo
|
||
|
UINT64_C(1342177280), // RLWIMI
|
||
|
UINT64_C(1342177280), // RLWIMI8
|
||
|
UINT64_C(1342177281), // RLWIMI8o
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(1342177281), // RLWIMIo
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(1409286144), // RLWINM
|
||
|
UINT64_C(1409286144), // RLWINM8
|
||
|
UINT64_C(1409286145), // RLWINM8o
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(1409286145), // RLWINMo
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(1543503872), // RLWNM
|
||
|
UINT64_C(1543503872), // RLWNM8
|
||
|
UINT64_C(1543503873), // RLWNM8o
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(1543503873), // RLWNMo
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0), // ReadTB
|
||
|
UINT64_C(1140850690), // SC
|
||
|
UINT64_C(0), // SELECT_CC_F4
|
||
|
UINT64_C(0), // SELECT_CC_F8
|
||
|
UINT64_C(0), // SELECT_CC_I4
|
||
|
UINT64_C(0), // SELECT_CC_I8
|
||
|
UINT64_C(0), // SELECT_CC_QBRC
|
||
|
UINT64_C(0), // SELECT_CC_QFRC
|
||
|
UINT64_C(0), // SELECT_CC_QSRC
|
||
|
UINT64_C(0), // SELECT_CC_VRRC
|
||
|
UINT64_C(0), // SELECT_CC_VSFRC
|
||
|
UINT64_C(0), // SELECT_CC_VSRC
|
||
|
UINT64_C(0), // SELECT_CC_VSSRC
|
||
|
UINT64_C(0), // SELECT_F4
|
||
|
UINT64_C(0), // SELECT_F8
|
||
|
UINT64_C(0), // SELECT_I4
|
||
|
UINT64_C(0), // SELECT_I8
|
||
|
UINT64_C(0), // SELECT_QBRC
|
||
|
UINT64_C(0), // SELECT_QFRC
|
||
|
UINT64_C(0), // SELECT_QSRC
|
||
|
UINT64_C(0), // SELECT_VRRC
|
||
|
UINT64_C(0), // SELECT_VSFRC
|
||
|
UINT64_C(0), // SELECT_VSRC
|
||
|
UINT64_C(0), // SELECT_VSSRC
|
||
|
UINT64_C(2080375780), // SLBIA
|
||
|
UINT64_C(2080375652), // SLBIE
|
||
|
UINT64_C(2080376614), // SLBMFEE
|
||
|
UINT64_C(2080375588), // SLBMTE
|
||
|
UINT64_C(2080374838), // SLD
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(2080374839), // SLDo
|
||
|
UINT64_C(2080374832), // SLW
|
||
|
UINT64_C(2080374832), // SLW8
|
||
|
UINT64_C(2080374833), // SLW8o
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(2080374833), // SLWo
|
||
|
UINT64_C(0), // SPILL_CR
|
||
|
UINT64_C(0), // SPILL_CRBIT
|
||
|
UINT64_C(0), // SPILL_VRSAVE
|
||
|
UINT64_C(2080376372), // SRAD
|
||
|
UINT64_C(2080376436), // SRADI
|
||
|
UINT64_C(2080376437), // SRADIo
|
||
|
UINT64_C(2080376373), // SRADo
|
||
|
UINT64_C(2080376368), // SRAW
|
||
|
UINT64_C(2080376432), // SRAWI
|
||
|
UINT64_C(2080376433), // SRAWIo
|
||
|
UINT64_C(2080376369), // SRAWo
|
||
|
UINT64_C(2080375862), // SRD
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(2080375863), // SRDo
|
||
|
UINT64_C(2080375856), // SRW
|
||
|
UINT64_C(2080375856), // SRW8
|
||
|
UINT64_C(2080375857), // SRW8o
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(2080375857), // SRWo
|
||
|
UINT64_C(2550136832), // STB
|
||
|
UINT64_C(2550136832), // STB8
|
||
|
UINT64_C(2080376746), // STBCIX
|
||
|
UINT64_C(2080376173), // STBCX
|
||
|
UINT64_C(2617245696), // STBU
|
||
|
UINT64_C(2617245696), // STBU8
|
||
|
UINT64_C(2080375278), // STBUX
|
||
|
UINT64_C(2080375278), // STBUX8
|
||
|
UINT64_C(2080375214), // STBX
|
||
|
UINT64_C(2080375214), // STBX8
|
||
|
UINT64_C(4160749568), // STD
|
||
|
UINT64_C(2080376104), // STDBRX
|
||
|
UINT64_C(2080376810), // STDCIX
|
||
|
UINT64_C(2080375213), // STDCX
|
||
|
UINT64_C(4160749569), // STDU
|
||
|
UINT64_C(2080375146), // STDUX
|
||
|
UINT64_C(2080375082), // STDX
|
||
|
UINT64_C(3623878656), // STFD
|
||
|
UINT64_C(3690987520), // STFDU
|
||
|
UINT64_C(2080376302), // STFDUX
|
||
|
UINT64_C(2080376238), // STFDX
|
||
|
UINT64_C(2080376750), // STFIWX
|
||
|
UINT64_C(3489660928), // STFS
|
||
|
UINT64_C(3556769792), // STFSU
|
||
|
UINT64_C(2080376174), // STFSUX
|
||
|
UINT64_C(2080376110), // STFSX
|
||
|
UINT64_C(2952790016), // STH
|
||
|
UINT64_C(2952790016), // STH8
|
||
|
UINT64_C(2080376620), // STHBRX
|
||
|
UINT64_C(2080376682), // STHCIX
|
||
|
UINT64_C(2080376237), // STHCX
|
||
|
UINT64_C(3019898880), // STHU
|
||
|
UINT64_C(3019898880), // STHU8
|
||
|
UINT64_C(2080375662), // STHUX
|
||
|
UINT64_C(2080375662), // STHUX8
|
||
|
UINT64_C(2080375598), // STHX
|
||
|
UINT64_C(2080375598), // STHX8
|
||
|
UINT64_C(3154116608), // STMW
|
||
|
UINT64_C(2080376234), // STSWI
|
||
|
UINT64_C(2080375054), // STVEBX
|
||
|
UINT64_C(2080375118), // STVEHX
|
||
|
UINT64_C(2080375182), // STVEWX
|
||
|
UINT64_C(2080375246), // STVX
|
||
|
UINT64_C(2080375758), // STVXL
|
||
|
UINT64_C(2415919104), // STW
|
||
|
UINT64_C(2415919104), // STW8
|
||
|
UINT64_C(2080376108), // STWBRX
|
||
|
UINT64_C(2080376618), // STWCIX
|
||
|
UINT64_C(2080375085), // STWCX
|
||
|
UINT64_C(2483027968), // STWU
|
||
|
UINT64_C(2483027968), // STWU8
|
||
|
UINT64_C(2080375150), // STWUX
|
||
|
UINT64_C(2080375150), // STWUX8
|
||
|
UINT64_C(2080375086), // STWX
|
||
|
UINT64_C(2080375086), // STWX8
|
||
|
UINT64_C(2080376216), // STXSDX
|
||
|
UINT64_C(2080375064), // STXSIWX
|
||
|
UINT64_C(2080376088), // STXSSPX
|
||
|
UINT64_C(2080376728), // STXVD2X
|
||
|
UINT64_C(2080376600), // STXVW4X
|
||
|
UINT64_C(2080374864), // SUBF
|
||
|
UINT64_C(2080374864), // SUBF8
|
||
|
UINT64_C(2080374865), // SUBF8o
|
||
|
UINT64_C(2080374800), // SUBFC
|
||
|
UINT64_C(2080374800), // SUBFC8
|
||
|
UINT64_C(2080374801), // SUBFC8o
|
||
|
UINT64_C(2080374801), // SUBFCo
|
||
|
UINT64_C(2080375056), // SUBFE
|
||
|
UINT64_C(2080375056), // SUBFE8
|
||
|
UINT64_C(2080375057), // SUBFE8o
|
||
|
UINT64_C(2080375057), // SUBFEo
|
||
|
UINT64_C(536870912), // SUBFIC
|
||
|
UINT64_C(536870912), // SUBFIC8
|
||
|
UINT64_C(2080375248), // SUBFME
|
||
|
UINT64_C(2080375248), // SUBFME8
|
||
|
UINT64_C(2080375249), // SUBFME8o
|
||
|
UINT64_C(2080375249), // SUBFMEo
|
||
|
UINT64_C(2080375184), // SUBFZE
|
||
|
UINT64_C(2080375184), // SUBFZE8
|
||
|
UINT64_C(2080375185), // SUBFZE8o
|
||
|
UINT64_C(2080375185), // SUBFZEo
|
||
|
UINT64_C(2080374865), // SUBFo
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(0),
|
||
|
UINT64_C(2080375980), // SYNC
|
||
|
UINT64_C(2080376605), // TABORT
|
||
|
UINT64_C(2080376413), // TABORTDC
|
||
|
UINT64_C(2080376541), // TABORTDCI
|
||
|
UINT64_C(2080376349), // TABORTWC
|
||
|
UINT64_C(2080376477), // TABORTWCI
|
||
|
UINT64_C(1207959552), // TAILB
|
||
|
UINT64_C(1207959552), // TAILB8
|
||
|
UINT64_C(1207959552), // TAILBA
|
||
|
UINT64_C(1207959552), // TAILBA8
|
||
|
UINT64_C(1317012512), // TAILBCTR
|
||
|
UINT64_C(1317012512), // TAILBCTR8
|
||
|
UINT64_C(2080376093), // TBEGIN
|
||
|
UINT64_C(2080376220), // TCHECK
|
||
|
UINT64_C(0), // TCHECK_RET
|
||
|
UINT64_C(0), // TCRETURNai
|
||
|
UINT64_C(0), // TCRETURNai8
|
||
|
UINT64_C(0), // TCRETURNdi
|
||
|
UINT64_C(0), // TCRETURNdi8
|
||
|
UINT64_C(0), // TCRETURNri
|
||
|
UINT64_C(0), // TCRETURNri8
|
||
|
UINT64_C(2080374920), // TD
|
||
|
UINT64_C(134217728), // TDI
|
||
|
UINT64_C(2080376157), // TEND
|
||
|
UINT64_C(2080375524), // TLBIA
|
||
|
UINT64_C(2080375396), // TLBIE
|
||
|
UINT64_C(2080375332), // TLBIEL
|
||
|
UINT64_C(2080376356), // TLBIVAX
|
||
|
UINT64_C(2080376740), // TLBLD
|
||
|
UINT64_C(2080376804), // TLBLI
|
||
|
UINT64_C(2080376676), // TLBRE
|
||
|
UINT64_C(2080376676), // TLBRE2
|
||
|
UINT64_C(2080376612), // TLBSX
|
||
|
UINT64_C(2080376612), // TLBSX2
|
||
|
UINT64_C(2080376613), // TLBSX2D
|
||
|
UINT64_C(2080375916), // TLBSYNC
|
||
|
UINT64_C(2080376740), // TLBWE
|
||
|
UINT64_C(2080376740), // TLBWE2
|
||
|
UINT64_C(2145386504), // TRAP
|
||
|
UINT64_C(2080376797), // TRECHKPT
|
||
|
UINT64_C(2080376669), // TRECLAIM
|
||
|
UINT64_C(2080376285), // TSR
|
||
|
UINT64_C(2080374792), // TW
|
||
|
UINT64_C(201326592), // TWI
|
||
|
UINT64_C(0), // UPDATE_VRSAVE
|
||
|
UINT64_C(0), // UpdateGBR
|
||
|
UINT64_C(268435776), // VADDCUQ
|
||
|
UINT64_C(268435840), // VADDCUW
|
||
|
UINT64_C(268435517), // VADDECUQ
|
||
|
UINT64_C(268435516), // VADDEUQM
|
||
|
UINT64_C(268435466), // VADDFP
|
||
|
UINT64_C(268436224), // VADDSBS
|
||
|
UINT64_C(268436288), // VADDSHS
|
||
|
UINT64_C(268436352), // VADDSWS
|
||
|
UINT64_C(268435456), // VADDUBM
|
||
|
UINT64_C(268435968), // VADDUBS
|
||
|
UINT64_C(268435648), // VADDUDM
|
||
|
UINT64_C(268435520), // VADDUHM
|
||
|
UINT64_C(268436032), // VADDUHS
|
||
|
UINT64_C(268435712), // VADDUQM
|
||
|
UINT64_C(268435584), // VADDUWM
|
||
|
UINT64_C(268436096), // VADDUWS
|
||
|
UINT64_C(268436484), // VAND
|
||
|
UINT64_C(268436548), // VANDC
|
||
|
UINT64_C(268436738), // VAVGSB
|
||
|
UINT64_C(268436802), // VAVGSH
|
||
|
UINT64_C(268436866), // VAVGSW
|
||
|
UINT64_C(268436482), // VAVGUB
|
||
|
UINT64_C(268436546), // VAVGUH
|
||
|
UINT64_C(268436610), // VAVGUW
|
||
|
UINT64_C(268436812), // VBPERMQ
|
||
|
UINT64_C(268436298), // VCFSX
|
||
|
UINT64_C(268436298), // VCFSX_0
|
||
|
UINT64_C(268436234), // VCFUX
|
||
|
UINT64_C(268436234), // VCFUX_0
|
||
|
UINT64_C(268436744), // VCIPHER
|
||
|
UINT64_C(268436745), // VCIPHERLAST
|
||
|
UINT64_C(268437250), // VCLZB
|
||
|
UINT64_C(268437442), // VCLZD
|
||
|
UINT64_C(268437314), // VCLZH
|
||
|
UINT64_C(268437378), // VCLZW
|
||
|
UINT64_C(268436422), // VCMPBFP
|
||
|
UINT64_C(268437446), // VCMPBFPo
|
||
|
UINT64_C(268435654), // VCMPEQFP
|
||
|
UINT64_C(268436678), // VCMPEQFPo
|
||
|
UINT64_C(268435462), // VCMPEQUB
|
||
|
UINT64_C(268436486), // VCMPEQUBo
|
||
|
UINT64_C(268435655), // VCMPEQUD
|
||
|
UINT64_C(268436679), // VCMPEQUDo
|
||
|
UINT64_C(268435526), // VCMPEQUH
|
||
|
UINT64_C(268436550), // VCMPEQUHo
|
||
|
UINT64_C(268435590), // VCMPEQUW
|
||
|
UINT64_C(268436614), // VCMPEQUWo
|
||
|
UINT64_C(268435910), // VCMPGEFP
|
||
|
UINT64_C(268436934), // VCMPGEFPo
|
||
|
UINT64_C(268436166), // VCMPGTFP
|
||
|
UINT64_C(268437190), // VCMPGTFPo
|
||
|
UINT64_C(268436230), // VCMPGTSB
|
||
|
UINT64_C(268437254), // VCMPGTSBo
|
||
|
UINT64_C(268436423), // VCMPGTSD
|
||
|
UINT64_C(268437447), // VCMPGTSDo
|
||
|
UINT64_C(268436294), // VCMPGTSH
|
||
|
UINT64_C(268437318), // VCMPGTSHo
|
||
|
UINT64_C(268436358), // VCMPGTSW
|
||
|
UINT64_C(268437382), // VCMPGTSWo
|
||
|
UINT64_C(268435974), // VCMPGTUB
|
||
|
UINT64_C(268436998), // VCMPGTUBo
|
||
|
UINT64_C(268436167), // VCMPGTUD
|
||
|
UINT64_C(268437191), // VCMPGTUDo
|
||
|
UINT64_C(268436038), // VCMPGTUH
|
||
|
UINT64_C(268437062), // VCMPGTUHo
|
||
|
UINT64_C(268436102), // VCMPGTUW
|
||
|
UINT64_C(268437126), // VCMPGTUWo
|
||
|
UINT64_C(268436426), // VCTSXS
|
||
|
UINT64_C(268436426), // VCTSXS_0
|
||
|
UINT64_C(268436362), // VCTUXS
|
||
|
UINT64_C(268436362), // VCTUXS_0
|
||
|
UINT64_C(268437124), // VEQV
|
||
|
UINT64_C(268435850), // VEXPTEFP
|
||
|
UINT64_C(268436748), // VGBBD
|
||
|
UINT64_C(268435914), // VLOGEFP
|
||
|
UINT64_C(268435502), // VMADDFP
|
||
|
UINT64_C(268436490), // VMAXFP
|
||
|
UINT64_C(268435714), // VMAXSB
|
||
|
UINT64_C(268435906), // VMAXSD
|
||
|
UINT64_C(268435778), // VMAXSH
|
||
|
UINT64_C(268435842), // VMAXSW
|
||
|
UINT64_C(268435458), // VMAXUB
|
||
|
UINT64_C(268435650), // VMAXUD
|
||
|
UINT64_C(268435522), // VMAXUH
|
||
|
UINT64_C(268435586), // VMAXUW
|
||
|
UINT64_C(268435488), // VMHADDSHS
|
||
|
UINT64_C(268435489), // VMHRADDSHS
|
||
|
UINT64_C(268436554), // VMINFP
|
||
|
UINT64_C(268436226), // VMINSB
|
||
|
UINT64_C(268436418), // VMINSD
|
||
|
UINT64_C(268436290), // VMINSH
|
||
|
UINT64_C(268436354), // VMINSW
|
||
|
UINT64_C(268435970), // VMINUB
|
||
|
UINT64_C(268436162), // VMINUD
|
||
|
UINT64_C(268436034), // VMINUH
|
||
|
UINT64_C(268436098), // VMINUW
|
||
|
UINT64_C(268435490), // VMLADDUHM
|
||
|
UINT64_C(268437388), // VMRGEW
|
||
|
UINT64_C(268435468), // VMRGHB
|
||
|
UINT64_C(268435532), // VMRGHH
|
||
|
UINT64_C(268435596), // VMRGHW
|
||
|
UINT64_C(268435724), // VMRGLB
|
||
|
UINT64_C(268435788), // VMRGLH
|
||
|
UINT64_C(268435852), // VMRGLW
|
||
|
UINT64_C(268437132), // VMRGOW
|
||
|
UINT64_C(268435493), // VMSUMMBM
|
||
|
UINT64_C(268435496), // VMSUMSHM
|
||
|
UINT64_C(268435497), // VMSUMSHS
|
||
|
UINT64_C(268435492), // VMSUMUBM
|
||
|
UINT64_C(268435494), // VMSUMUHM
|
||
|
UINT64_C(268435495), // VMSUMUHS
|
||
|
UINT64_C(268436232), // VMULESB
|
||
|
UINT64_C(268436296), // VMULESH
|
||
|
UINT64_C(268436360), // VMULESW
|
||
|
UINT64_C(268435976), // VMULEUB
|
||
|
UINT64_C(268436040), // VMULEUH
|
||
|
UINT64_C(268436104), // VMULEUW
|
||
|
UINT64_C(268435720), // VMULOSB
|
||
|
UINT64_C(268435784), // VMULOSH
|
||
|
UINT64_C(268435848), // VMULOSW
|
||
|
UINT64_C(268435464), // VMULOUB
|
||
|
UINT64_C(268435528), // VMULOUH
|
||
|
UINT64_C(268435592), // VMULOUW
|
||
|
UINT64_C(268435593), // VMULUWM
|
||
|
UINT64_C(268436868), // VNAND
|
||
|
UINT64_C(268436808), // VNCIPHER
|
||
|
UINT64_C(268436809), // VNCIPHERLAST
|
||
|
UINT64_C(268435503), // VNMSUBFP
|
||
|
UINT64_C(268436740), // VNOR
|
||
|
UINT64_C(268436612), // VOR
|
||
|
UINT64_C(268436804), // VORC
|
||
|
UINT64_C(268435499), // VPERM
|
||
|
UINT64_C(268435501), // VPERMXOR
|
||
|
UINT64_C(268436238), // VPKPX
|
||
|
UINT64_C(268436942), // VPKSDSS
|
||
|
UINT64_C(268436814), // VPKSDUS
|
||
|
UINT64_C(268435854), // VPKSHSS
|
||
|
UINT64_C(268435726), // VPKSHUS
|
||
|
UINT64_C(268435918), // VPKSWSS
|
||
|
UINT64_C(268435790), // VPKSWUS
|
||
|
UINT64_C(268436558), // VPKUDUM
|
||
|
UINT64_C(268436686), // VPKUDUS
|
||
|
UINT64_C(268435470), // VPKUHUM
|
||
|
UINT64_C(268435598), // VPKUHUS
|
||
|
UINT64_C(268435534), // VPKUWUM
|
||
|
UINT64_C(268435662), // VPKUWUS
|
||
|
UINT64_C(268436488), // VPMSUMB
|
||
|
UINT64_C(268436680), // VPMSUMD
|
||
|
UINT64_C(268436552), // VPMSUMH
|
||
|
UINT64_C(268436616), // VPMSUMW
|
||
|
UINT64_C(268437251), // VPOPCNTB
|
||
|
UINT64_C(268437443), // VPOPCNTD
|
||
|
UINT64_C(268437315), // VPOPCNTH
|
||
|
UINT64_C(268437379), // VPOPCNTW
|
||
|
UINT64_C(268435722), // VREFP
|
||
|
UINT64_C(268436170), // VRFIM
|
||
|
UINT64_C(268435978), // VRFIN
|
||
|
UINT64_C(268436106), // VRFIP
|
||
|
UINT64_C(268436042), // VRFIZ
|
||
|
UINT64_C(268435460), // VRLB
|
||
|
UINT64_C(268435652), // VRLD
|
||
|
UINT64_C(268435524), // VRLH
|
||
|
UINT64_C(268435588), // VRLW
|
||
|
UINT64_C(268435786), // VRSQRTEFP
|
||
|
UINT64_C(268436936), // VSBOX
|
||
|
UINT64_C(268435498), // VSEL
|
||
|
UINT64_C(268437186), // VSHASIGMAD
|
||
|
UINT64_C(268437122), // VSHASIGMAW
|
||
|
UINT64_C(268435908), // VSL
|
||
|
UINT64_C(268435716), // VSLB
|
||
|
UINT64_C(268436932), // VSLD
|
||
|
UINT64_C(268435500), // VSLDOI
|
||
|
UINT64_C(268435780), // VSLH
|
||
|
UINT64_C(268436492), // VSLO
|
||
|
UINT64_C(268435844), // VSLW
|
||
|
UINT64_C(268435980), // VSPLTB
|
||
|
UINT64_C(268436044), // VSPLTH
|
||
|
UINT64_C(268436236), // VSPLTISB
|
||
|
UINT64_C(268436300), // VSPLTISH
|
||
|
UINT64_C(268436364), // VSPLTISW
|
||
|
UINT64_C(268436108), // VSPLTW
|
||
|
UINT64_C(268436164), // VSR
|
||
|
UINT64_C(268436228), // VSRAB
|
||
|
UINT64_C(268436420), // VSRAD
|
||
|
UINT64_C(268436292), // VSRAH
|
||
|
UINT64_C(268436356), // VSRAW
|
||
|
UINT64_C(268435972), // VSRB
|
||
|
UINT64_C(268437188), // VSRD
|
||
|
UINT64_C(268436036), // VSRH
|
||
|
UINT64_C(268436556), // VSRO
|
||
|
UINT64_C(268436100), // VSRW
|
||
|
UINT64_C(268436800), // VSUBCUQ
|
||
|
UINT64_C(268436864), // VSUBCUW
|
||
|
UINT64_C(268435519), // VSUBECUQ
|
||
|
UINT64_C(268435518), // VSUBEUQM
|
||
|
UINT64_C(268435530), // VSUBFP
|
||
|
UINT64_C(268437248), // VSUBSBS
|
||
|
UINT64_C(268437312), // VSUBSHS
|
||
|
UINT64_C(268437376), // VSUBSWS
|
||
|
UINT64_C(268436480), // VSUBUBM
|
||
|
UINT64_C(268436992), // VSUBUBS
|
||
|
UINT64_C(268436672), // VSUBUDM
|
||
|
UINT64_C(268436544), // VSUBUHM
|
||
|
UINT64_C(268437056), // VSUBUHS
|
||
|
UINT64_C(268436736), // VSUBUQM
|
||
|
UINT64_C(268436608), // VSUBUWM
|
||
|
UINT64_C(268437120), // VSUBUWS
|
||
|
UINT64_C(268437128), // VSUM2SWS
|
||
|
UINT64_C(268437256), // VSUM4SBS
|
||
|
UINT64_C(268437064), // VSUM4SHS
|
||
|
UINT64_C(268437000), // VSUM4UBS
|
||
|
UINT64_C(268437384), // VSUMSWS
|
||
|
UINT64_C(268436302), // VUPKHPX
|
||
|
UINT64_C(268435982), // VUPKHSB
|
||
|
UINT64_C(268436046), // VUPKHSH
|
||
|
UINT64_C(268437070), // VUPKHSW
|
||
|
UINT64_C(268436430), // VUPKLPX
|
||
|
UINT64_C(268436110), // VUPKLSB
|
||
|
UINT64_C(268436174), // VUPKLSH
|
||
|
UINT64_C(268437198), // VUPKLSW
|
||
|
UINT64_C(268436676), // VXOR
|
||
|
UINT64_C(268436676), // V_SET0
|
||
|
UINT64_C(268436676), // V_SET0B
|
||
|
UINT64_C(268436676), // V_SET0H
|
||
|
UINT64_C(270467980), // V_SETALLONES
|
||
|
UINT64_C(270467980), // V_SETALLONESB
|
||
|
UINT64_C(270467980), // V_SETALLONESH
|
||
|
UINT64_C(2080374908), // WAIT
|
||
|
UINT64_C(2080375046), // WRTEE
|
||
|
UINT64_C(2080375110), // WRTEEI
|
||
|
UINT64_C(2080375416), // XOR
|
||
|
UINT64_C(2080375416), // XOR8
|
||
|
UINT64_C(2080375417), // XOR8o
|
||
|
UINT64_C(1744830464), // XORI
|
||
|
UINT64_C(1744830464), // XORI8
|
||
|
UINT64_C(1811939328), // XORIS
|
||
|
UINT64_C(1811939328), // XORIS8
|
||
|
UINT64_C(2080375417), // XORo
|
||
|
UINT64_C(4026533220), // XSABSDP
|
||
|
UINT64_C(4026532096), // XSADDDP
|
||
|
UINT64_C(4026531840), // XSADDSP
|
||
|
UINT64_C(4026532184), // XSCMPODP
|
||
|
UINT64_C(4026532120), // XSCMPUDP
|
||
|
UINT64_C(4026533248), // XSCPSGNDP
|
||
|
UINT64_C(4026532900), // XSCVDPSP
|
||
|
UINT64_C(4026532908), // XSCVDPSPN
|
||
|
UINT64_C(4026533216), // XSCVDPSXDS
|
||
|
UINT64_C(4026532192), // XSCVDPSXWS
|
||
|
UINT64_C(4026533152), // XSCVDPUXDS
|
||
|
UINT64_C(4026532128), // XSCVDPUXWS
|
||
|
UINT64_C(4026533156), // XSCVSPDP
|
||
|
UINT64_C(4026533164), // XSCVSPDPN
|
||
|
UINT64_C(4026533344), // XSCVSXDDP
|
||
|
UINT64_C(4026533088), // XSCVSXDSP
|
||
|
UINT64_C(4026533280), // XSCVUXDDP
|
||
|
UINT64_C(4026533024), // XSCVUXDSP
|
||
|
UINT64_C(4026532288), // XSDIVDP
|
||
|
UINT64_C(4026532032), // XSDIVSP
|
||
|
UINT64_C(4026532104), // XSMADDADP
|
||
|
UINT64_C(4026531848), // XSMADDASP
|
||
|
UINT64_C(4026532168), // XSMADDMDP
|
||
|
UINT64_C(4026531912), // XSMADDMSP
|
||
|
UINT64_C(4026533120), // XSMAXDP
|
||
|
UINT64_C(4026533184), // XSMINDP
|
||
|
UINT64_C(4026532232), // XSMSUBADP
|
||
|
UINT64_C(4026531976), // XSMSUBASP
|
||
|
UINT64_C(4026532296), // XSMSUBMDP
|
||
|
UINT64_C(4026532040), // XSMSUBMSP
|
||
|
UINT64_C(4026532224), // XSMULDP
|
||
|
UINT64_C(4026531968), // XSMULSP
|
||
|
UINT64_C(4026533284), // XSNABSDP
|
||
|
UINT64_C(4026533348), // XSNEGDP
|
||
|
UINT64_C(4026533128), // XSNMADDADP
|
||
|
UINT64_C(4026532872), // XSNMADDASP
|
||
|
UINT64_C(4026533192), // XSNMADDMDP
|
||
|
UINT64_C(4026532936), // XSNMADDMSP
|
||
|
UINT64_C(4026533256), // XSNMSUBADP
|
||
|
UINT64_C(4026533000), // XSNMSUBASP
|
||
|
UINT64_C(4026533320), // XSNMSUBMDP
|
||
|
UINT64_C(4026533064), // XSNMSUBMSP
|
||
|
UINT64_C(4026532132), // XSRDPI
|
||
|
UINT64_C(4026532268), // XSRDPIC
|
||
|
UINT64_C(4026532324), // XSRDPIM
|
||
|
UINT64_C(4026532260), // XSRDPIP
|
||
|
UINT64_C(4026532196), // XSRDPIZ
|
||
|
UINT64_C(4026532200), // XSREDP
|
||
|
UINT64_C(4026531944), // XSRESP
|
||
|
UINT64_C(4026532136), // XSRSQRTEDP
|
||
|
UINT64_C(4026531880), // XSRSQRTESP
|
||
|
UINT64_C(4026532140), // XSSQRTDP
|
||
|
UINT64_C(4026531884), // XSSQRTSP
|
||
|
UINT64_C(4026532160), // XSSUBDP
|
||
|
UINT64_C(4026531904), // XSSUBSP
|
||
|
UINT64_C(4026532328), // XSTDIVDP
|
||
|
UINT64_C(4026532264), // XSTSQRTDP
|
||
|
UINT64_C(4026533732), // XVABSDP
|
||
|
UINT64_C(4026533476), // XVABSSP
|
||
|
UINT64_C(4026532608), // XVADDDP
|
||
|
UINT64_C(4026532352), // XVADDSP
|
||
|
UINT64_C(4026532632), // XVCMPEQDP
|
||
|
UINT64_C(4026533656), // XVCMPEQDPo
|
||
|
UINT64_C(4026532376), // XVCMPEQSP
|
||
|
UINT64_C(4026533400), // XVCMPEQSPo
|
||
|
UINT64_C(4026532760), // XVCMPGEDP
|
||
|
UINT64_C(4026533784), // XVCMPGEDPo
|
||
|
UINT64_C(4026532504), // XVCMPGESP
|
||
|
UINT64_C(4026533528), // XVCMPGESPo
|
||
|
UINT64_C(4026532696), // XVCMPGTDP
|
||
|
UINT64_C(4026533720), // XVCMPGTDPo
|
||
|
UINT64_C(4026532440), // XVCMPGTSP
|
||
|
UINT64_C(4026533464), // XVCMPGTSPo
|
||
|
UINT64_C(4026533760), // XVCPSGNDP
|
||
|
UINT64_C(4026533504), // XVCPSGNSP
|
||
|
UINT64_C(4026533412), // XVCVDPSP
|
||
|
UINT64_C(4026533728), // XVCVDPSXDS
|
||
|
UINT64_C(4026532704), // XVCVDPSXWS
|
||
|
UINT64_C(4026533664), // XVCVDPUXDS
|
||
|
UINT64_C(4026532640), // XVCVDPUXWS
|
||
|
UINT64_C(4026533668), // XVCVSPDP
|
||
|
UINT64_C(4026533472), // XVCVSPSXDS
|
||
|
UINT64_C(4026532448), // XVCVSPSXWS
|
||
|
UINT64_C(4026533408), // XVCVSPUXDS
|
||
|
UINT64_C(4026532384), // XVCVSPUXWS
|
||
|
UINT64_C(4026533856), // XVCVSXDDP
|
||
|
UINT64_C(4026533600), // XVCVSXDSP
|
||
|
UINT64_C(4026532832), // XVCVSXWDP
|
||
|
UINT64_C(4026532576), // XVCVSXWSP
|
||
|
UINT64_C(4026533792), // XVCVUXDDP
|
||
|
UINT64_C(4026533536), // XVCVUXDSP
|
||
|
UINT64_C(4026532768), // XVCVUXWDP
|
||
|
UINT64_C(4026532512), // XVCVUXWSP
|
||
|
UINT64_C(4026532800), // XVDIVDP
|
||
|
UINT64_C(4026532544), // XVDIVSP
|
||
|
UINT64_C(4026532616), // XVMADDADP
|
||
|
UINT64_C(4026532360), // XVMADDASP
|
||
|
UINT64_C(4026532680), // XVMADDMDP
|
||
|
UINT64_C(4026532424), // XVMADDMSP
|
||
|
UINT64_C(4026533632), // XVMAXDP
|
||
|
UINT64_C(4026533376), // XVMAXSP
|
||
|
UINT64_C(4026533696), // XVMINDP
|
||
|
UINT64_C(4026533440), // XVMINSP
|
||
|
UINT64_C(4026532744), // XVMSUBADP
|
||
|
UINT64_C(4026532488), // XVMSUBASP
|
||
|
UINT64_C(4026532808), // XVMSUBMDP
|
||
|
UINT64_C(4026532552), // XVMSUBMSP
|
||
|
UINT64_C(4026532736), // XVMULDP
|
||
|
UINT64_C(4026532480), // XVMULSP
|
||
|
UINT64_C(4026533796), // XVNABSDP
|
||
|
UINT64_C(4026533540), // XVNABSSP
|
||
|
UINT64_C(4026533860), // XVNEGDP
|
||
|
UINT64_C(4026533604), // XVNEGSP
|
||
|
UINT64_C(4026533640), // XVNMADDADP
|
||
|
UINT64_C(4026533384), // XVNMADDASP
|
||
|
UINT64_C(4026533704), // XVNMADDMDP
|
||
|
UINT64_C(4026533448), // XVNMADDMSP
|
||
|
UINT64_C(4026533768), // XVNMSUBADP
|
||
|
UINT64_C(4026533512), // XVNMSUBASP
|
||
|
UINT64_C(4026533832), // XVNMSUBMDP
|
||
|
UINT64_C(4026533576), // XVNMSUBMSP
|
||
|
UINT64_C(4026532644), // XVRDPI
|
||
|
UINT64_C(4026532780), // XVRDPIC
|
||
|
UINT64_C(4026532836), // XVRDPIM
|
||
|
UINT64_C(4026532772), // XVRDPIP
|
||
|
UINT64_C(4026532708), // XVRDPIZ
|
||
|
UINT64_C(4026532712), // XVREDP
|
||
|
UINT64_C(4026532456), // XVRESP
|
||
|
UINT64_C(4026532388), // XVRSPI
|
||
|
UINT64_C(4026532524), // XVRSPIC
|
||
|
UINT64_C(4026532580), // XVRSPIM
|
||
|
UINT64_C(4026532516), // XVRSPIP
|
||
|
UINT64_C(4026532452), // XVRSPIZ
|
||
|
UINT64_C(4026532648), // XVRSQRTEDP
|
||
|
UINT64_C(4026532392), // XVRSQRTESP
|
||
|
UINT64_C(4026532652), // XVSQRTDP
|
||
|
UINT64_C(4026532396), // XVSQRTSP
|
||
|
UINT64_C(4026532672), // XVSUBDP
|
||
|
UINT64_C(4026532416), // XVSUBSP
|
||
|
UINT64_C(4026532840), // XVTDIVDP
|
||
|
UINT64_C(4026532584), // XVTDIVSP
|
||
|
UINT64_C(4026532776), // XVTSQRTDP
|
||
|
UINT64_C(4026532520), // XVTSQRTSP
|
||
|
UINT64_C(4026532880), // XXLAND
|
||
|
UINT64_C(4026532944), // XXLANDC
|
||
|
UINT64_C(4026533328), // XXLEQV
|
||
|
UINT64_C(4026533264), // XXLNAND
|
||
|
UINT64_C(4026533136), // XXLNOR
|
||
|
UINT64_C(4026533008), // XXLOR
|
||
|
UINT64_C(4026533200), // XXLORC
|
||
|
UINT64_C(4026533008), // XXLORf
|
||
|
UINT64_C(4026533072), // XXLXOR
|
||
|
UINT64_C(4026531984), // XXMRGHW
|
||
|
UINT64_C(4026532240), // XXMRGLW
|
||
|
UINT64_C(4026531920), // XXPERMDI
|
||
|
UINT64_C(4026531888), // XXSEL
|
||
|
UINT64_C(4026531856), // XXSLDWI
|
||
|
UINT64_C(4026532496), // XXSPLTW
|
||
|
UINT64_C(1073741824), // gBC
|
||
|
UINT64_C(1073741826), // gBCA
|
||
|
UINT64_C(1275069472), // gBCCTR
|
||
|
UINT64_C(1275069473), // gBCCTRL
|
||
|
UINT64_C(1073741825), // gBCL
|
||
|
UINT64_C(1073741827), // gBCLA
|
||
|
UINT64_C(1275068448), // gBCLR
|
||
|
UINT64_C(1275068449), // gBCLRL
|
||
|
UINT64_C(0)
|
||
|
};
|
||
|
const unsigned opcode = MI.getOpcode();
|
||
|
uint64_t Value = InstBits[opcode];
|
||
|
uint64_t op = 0;
|
||
|
(void)op; // suppress warning
|
||
|
switch (opcode) {
|
||
|
case PPC::ADDISdtprelHA:
|
||
|
case PPC::ADDISdtprelHA32:
|
||
|
case PPC::ADDISgotTprelHA:
|
||
|
case PPC::ADDIStlsgdHA:
|
||
|
case PPC::ADDIStlsldHA:
|
||
|
case PPC::ADDIStocHA:
|
||
|
case PPC::ADDIdtprelL:
|
||
|
case PPC::ADDIdtprelL32:
|
||
|
case PPC::ADDItlsgdL:
|
||
|
case PPC::ADDItlsgdL32:
|
||
|
case PPC::ADDItlsgdLADDR:
|
||
|
case PPC::ADDItlsgdLADDR32:
|
||
|
case PPC::ADDItlsldL:
|
||
|
case PPC::ADDItlsldL32:
|
||
|
case PPC::ADDItlsldLADDR:
|
||
|
case PPC::ADDItlsldLADDR32:
|
||
|
case PPC::ADDItocL:
|
||
|
case PPC::ADJCALLSTACKDOWN:
|
||
|
case PPC::ADJCALLSTACKUP:
|
||
|
case PPC::ANDIo_1_EQ_BIT:
|
||
|
case PPC::ANDIo_1_EQ_BIT8:
|
||
|
case PPC::ANDIo_1_GT_BIT:
|
||
|
case PPC::ANDIo_1_GT_BIT8:
|
||
|
case PPC::ATOMIC_CMP_SWAP_I16:
|
||
|
case PPC::ATOMIC_CMP_SWAP_I32:
|
||
|
case PPC::ATOMIC_CMP_SWAP_I64:
|
||
|
case PPC::ATOMIC_CMP_SWAP_I8:
|
||
|
case PPC::ATOMIC_LOAD_ADD_I16:
|
||
|
case PPC::ATOMIC_LOAD_ADD_I32:
|
||
|
case PPC::ATOMIC_LOAD_ADD_I64:
|
||
|
case PPC::ATOMIC_LOAD_ADD_I8:
|
||
|
case PPC::ATOMIC_LOAD_AND_I16:
|
||
|
case PPC::ATOMIC_LOAD_AND_I32:
|
||
|
case PPC::ATOMIC_LOAD_AND_I64:
|
||
|
case PPC::ATOMIC_LOAD_AND_I8:
|
||
|
case PPC::ATOMIC_LOAD_NAND_I16:
|
||
|
case PPC::ATOMIC_LOAD_NAND_I32:
|
||
|
case PPC::ATOMIC_LOAD_NAND_I64:
|
||
|
case PPC::ATOMIC_LOAD_NAND_I8:
|
||
|
case PPC::ATOMIC_LOAD_OR_I16:
|
||
|
case PPC::ATOMIC_LOAD_OR_I32:
|
||
|
case PPC::ATOMIC_LOAD_OR_I64:
|
||
|
case PPC::ATOMIC_LOAD_OR_I8:
|
||
|
case PPC::ATOMIC_LOAD_SUB_I16:
|
||
|
case PPC::ATOMIC_LOAD_SUB_I32:
|
||
|
case PPC::ATOMIC_LOAD_SUB_I64:
|
||
|
case PPC::ATOMIC_LOAD_SUB_I8:
|
||
|
case PPC::ATOMIC_LOAD_XOR_I16:
|
||
|
case PPC::ATOMIC_LOAD_XOR_I32:
|
||
|
case PPC::ATOMIC_LOAD_XOR_I64:
|
||
|
case PPC::ATOMIC_LOAD_XOR_I8:
|
||
|
case PPC::ATOMIC_SWAP_I16:
|
||
|
case PPC::ATOMIC_SWAP_I32:
|
||
|
case PPC::ATOMIC_SWAP_I64:
|
||
|
case PPC::ATOMIC_SWAP_I8:
|
||
|
case PPC::ATTN:
|
||
|
case PPC::BCTR:
|
||
|
case PPC::BCTR8:
|
||
|
case PPC::BCTRL:
|
||
|
case PPC::BCTRL8:
|
||
|
case PPC::BDNZLR:
|
||
|
case PPC::BDNZLR8:
|
||
|
case PPC::BDNZLRL:
|
||
|
case PPC::BDNZLRLm:
|
||
|
case PPC::BDNZLRLp:
|
||
|
case PPC::BDNZLRm:
|
||
|
case PPC::BDNZLRp:
|
||
|
case PPC::BDZLR:
|
||
|
case PPC::BDZLR8:
|
||
|
case PPC::BDZLRL:
|
||
|
case PPC::BDZLRLm:
|
||
|
case PPC::BDZLRLp:
|
||
|
case PPC::BDZLRm:
|
||
|
case PPC::BDZLRp:
|
||
|
case PPC::BLR:
|
||
|
case PPC::BLR8:
|
||
|
case PPC::BLRL:
|
||
|
case PPC::CLRBHRB:
|
||
|
case PPC::CR6SET:
|
||
|
case PPC::CR6UNSET:
|
||
|
case PPC::DSSALL:
|
||
|
case PPC::DYNALLOC:
|
||
|
case PPC::DYNALLOC8:
|
||
|
case PPC::DYNAREAOFFSET:
|
||
|
case PPC::DYNAREAOFFSET8:
|
||
|
case PPC::EH_SjLj_LongJmp32:
|
||
|
case PPC::EH_SjLj_LongJmp64:
|
||
|
case PPC::EH_SjLj_SetJmp32:
|
||
|
case PPC::EH_SjLj_SetJmp64:
|
||
|
case PPC::EH_SjLj_Setup:
|
||
|
case PPC::EnforceIEIO:
|
||
|
case PPC::FADDrtz:
|
||
|
case PPC::GETtlsADDR:
|
||
|
case PPC::GETtlsADDR32:
|
||
|
case PPC::GETtlsldADDR:
|
||
|
case PPC::GETtlsldADDR32:
|
||
|
case PPC::ISYNC:
|
||
|
case PPC::LDgotTprelL:
|
||
|
case PPC::LDgotTprelL32:
|
||
|
case PPC::LDtoc:
|
||
|
case PPC::LDtocBA:
|
||
|
case PPC::LDtocCPT:
|
||
|
case PPC::LDtocJTI:
|
||
|
case PPC::LDtocL:
|
||
|
case PPC::LWZtoc:
|
||
|
case PPC::MSYNC:
|
||
|
case PPC::MoveGOTtoLR:
|
||
|
case PPC::MovePCtoLR:
|
||
|
case PPC::MovePCtoLR8:
|
||
|
case PPC::NOP:
|
||
|
case PPC::NOP_GT_PWR6:
|
||
|
case PPC::NOP_GT_PWR7:
|
||
|
case PPC::PPC32GOT:
|
||
|
case PPC::PPC32PICGOT:
|
||
|
case PPC::RESTORE_CR:
|
||
|
case PPC::RESTORE_CRBIT:
|
||
|
case PPC::RESTORE_VRSAVE:
|
||
|
case PPC::RFCI:
|
||
|
case PPC::RFDI:
|
||
|
case PPC::RFI:
|
||
|
case PPC::RFID:
|
||
|
case PPC::RFMCI:
|
||
|
case PPC::ReadTB:
|
||
|
case PPC::SELECT_CC_F4:
|
||
|
case PPC::SELECT_CC_F8:
|
||
|
case PPC::SELECT_CC_I4:
|
||
|
case PPC::SELECT_CC_I8:
|
||
|
case PPC::SELECT_CC_QBRC:
|
||
|
case PPC::SELECT_CC_QFRC:
|
||
|
case PPC::SELECT_CC_QSRC:
|
||
|
case PPC::SELECT_CC_VRRC:
|
||
|
case PPC::SELECT_CC_VSFRC:
|
||
|
case PPC::SELECT_CC_VSRC:
|
||
|
case PPC::SELECT_CC_VSSRC:
|
||
|
case PPC::SELECT_F4:
|
||
|
case PPC::SELECT_F8:
|
||
|
case PPC::SELECT_I4:
|
||
|
case PPC::SELECT_I8:
|
||
|
case PPC::SELECT_QBRC:
|
||
|
case PPC::SELECT_QFRC:
|
||
|
case PPC::SELECT_QSRC:
|
||
|
case PPC::SELECT_VRRC:
|
||
|
case PPC::SELECT_VSFRC:
|
||
|
case PPC::SELECT_VSRC:
|
||
|
case PPC::SELECT_VSSRC:
|
||
|
case PPC::SLBIA:
|
||
|
case PPC::SPILL_CR:
|
||
|
case PPC::SPILL_CRBIT:
|
||
|
case PPC::SPILL_VRSAVE:
|
||
|
case PPC::TAILBCTR:
|
||
|
case PPC::TAILBCTR8:
|
||
|
case PPC::TCHECK_RET:
|
||
|
case PPC::TCRETURNai:
|
||
|
case PPC::TCRETURNai8:
|
||
|
case PPC::TCRETURNdi:
|
||
|
case PPC::TCRETURNdi8:
|
||
|
case PPC::TCRETURNri:
|
||
|
case PPC::TCRETURNri8:
|
||
|
case PPC::TLBIA:
|
||
|
case PPC::TLBRE:
|
||
|
case PPC::TLBSYNC:
|
||
|
case PPC::TLBWE:
|
||
|
case PPC::TRAP:
|
||
|
case PPC::TRECHKPT:
|
||
|
case PPC::UPDATE_VRSAVE:
|
||
|
case PPC::UpdateGBR: {
|
||
|
break;
|
||
|
}
|
||
|
case PPC::DCBA:
|
||
|
case PPC::DCBF:
|
||
|
case PPC::DCBI:
|
||
|
case PPC::DCBST:
|
||
|
case PPC::DCBZ:
|
||
|
case PPC::DCBZL:
|
||
|
case PPC::DCCCI:
|
||
|
case PPC::ICBI:
|
||
|
case PPC::ICCCI:
|
||
|
case PPC::TLBIVAX:
|
||
|
case PPC::TLBSX: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::SRADI:
|
||
|
case PPC::SRADIo: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: SH
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::CNTLZD:
|
||
|
case PPC::CNTLZDo:
|
||
|
case PPC::CNTLZW:
|
||
|
case PPC::CNTLZW8:
|
||
|
case PPC::CNTLZW8o:
|
||
|
case PPC::CNTLZWo:
|
||
|
case PPC::EXTSB:
|
||
|
case PPC::EXTSB8:
|
||
|
case PPC::EXTSB8_32_64:
|
||
|
case PPC::EXTSB8o:
|
||
|
case PPC::EXTSBo:
|
||
|
case PPC::EXTSH:
|
||
|
case PPC::EXTSH8:
|
||
|
case PPC::EXTSH8_32_64:
|
||
|
case PPC::EXTSH8o:
|
||
|
case PPC::EXTSHo:
|
||
|
case PPC::EXTSW:
|
||
|
case PPC::EXTSW_32_64:
|
||
|
case PPC::EXTSW_32_64o:
|
||
|
case PPC::EXTSWo:
|
||
|
case PPC::POPCNTD:
|
||
|
case PPC::POPCNTW:
|
||
|
case PPC::QVLPCLSXint: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::AND:
|
||
|
case PPC::AND8:
|
||
|
case PPC::AND8o:
|
||
|
case PPC::ANDC:
|
||
|
case PPC::ANDC8:
|
||
|
case PPC::ANDC8o:
|
||
|
case PPC::ANDCo:
|
||
|
case PPC::ANDo:
|
||
|
case PPC::BPERMD:
|
||
|
case PPC::CMPB:
|
||
|
case PPC::CMPB8:
|
||
|
case PPC::EQV:
|
||
|
case PPC::EQV8:
|
||
|
case PPC::EQV8o:
|
||
|
case PPC::EQVo:
|
||
|
case PPC::NAND:
|
||
|
case PPC::NAND8:
|
||
|
case PPC::NAND8o:
|
||
|
case PPC::NANDo:
|
||
|
case PPC::NOR:
|
||
|
case PPC::NOR8:
|
||
|
case PPC::NOR8o:
|
||
|
case PPC::NORo:
|
||
|
case PPC::OR:
|
||
|
case PPC::OR8:
|
||
|
case PPC::OR8o:
|
||
|
case PPC::ORC:
|
||
|
case PPC::ORC8:
|
||
|
case PPC::ORC8o:
|
||
|
case PPC::ORCo:
|
||
|
case PPC::ORo:
|
||
|
case PPC::SLD:
|
||
|
case PPC::SLDo:
|
||
|
case PPC::SLW:
|
||
|
case PPC::SLW8:
|
||
|
case PPC::SLW8o:
|
||
|
case PPC::SLWo:
|
||
|
case PPC::SRAD:
|
||
|
case PPC::SRADo:
|
||
|
case PPC::SRAW:
|
||
|
case PPC::SRAWI:
|
||
|
case PPC::SRAWIo:
|
||
|
case PPC::SRAWo:
|
||
|
case PPC::SRD:
|
||
|
case PPC::SRDo:
|
||
|
case PPC::SRW:
|
||
|
case PPC::SRW8:
|
||
|
case PPC::SRW8o:
|
||
|
case PPC::SRWo:
|
||
|
case PPC::XOR:
|
||
|
case PPC::XOR8:
|
||
|
case PPC::XOR8o:
|
||
|
case PPC::XORo: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::LBZ:
|
||
|
case PPC::LBZ8:
|
||
|
case PPC::LFD:
|
||
|
case PPC::LFS:
|
||
|
case PPC::LHA:
|
||
|
case PPC::LHA8:
|
||
|
case PPC::LHZ:
|
||
|
case PPC::LHZ8:
|
||
|
case PPC::LMW:
|
||
|
case PPC::LWZ:
|
||
|
case PPC::LWZ8:
|
||
|
case PPC::STB:
|
||
|
case PPC::STB8:
|
||
|
case PPC::STFD:
|
||
|
case PPC::STFS:
|
||
|
case PPC::STH:
|
||
|
case PPC::STH8:
|
||
|
case PPC::STMW:
|
||
|
case PPC::STW:
|
||
|
case PPC::STW8: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: Addr
|
||
|
op = getMemRIEncoding(MI, 1, Fixups, STI);
|
||
|
Value |= op & UINT64_C(2097151);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::LBZU:
|
||
|
case PPC::LBZU8:
|
||
|
case PPC::LFDU:
|
||
|
case PPC::LFSU:
|
||
|
case PPC::LHAU:
|
||
|
case PPC::LHAU8:
|
||
|
case PPC::LHZU:
|
||
|
case PPC::LHZU8:
|
||
|
case PPC::LWZU:
|
||
|
case PPC::LWZU8: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: Addr
|
||
|
op = getMemRIEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= op & UINT64_C(2097151);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::LI:
|
||
|
case PPC::LI8:
|
||
|
case PPC::LIS:
|
||
|
case PPC::LIS8: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: B
|
||
|
op = getImm16Encoding(MI, 1, Fixups, STI);
|
||
|
Value |= op & UINT64_C(65535);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::ADDI:
|
||
|
case PPC::ADDI8:
|
||
|
case PPC::ADDIC:
|
||
|
case PPC::ADDIC8:
|
||
|
case PPC::ADDICo:
|
||
|
case PPC::ADDIS:
|
||
|
case PPC::ADDIS8:
|
||
|
case PPC::LA:
|
||
|
case PPC::MULLI:
|
||
|
case PPC::MULLI8:
|
||
|
case PPC::SUBFIC:
|
||
|
case PPC::SUBFIC8:
|
||
|
case PPC::TDI:
|
||
|
case PPC::TWI: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: C
|
||
|
op = getImm16Encoding(MI, 2, Fixups, STI);
|
||
|
Value |= op & UINT64_C(65535);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::TEND: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 25;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::TABORT:
|
||
|
case PPC::TRECLAIM: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::STBU:
|
||
|
case PPC::STBU8:
|
||
|
case PPC::STFDU:
|
||
|
case PPC::STFSU:
|
||
|
case PPC::STHU:
|
||
|
case PPC::STHU8:
|
||
|
case PPC::STWU:
|
||
|
case PPC::STWU8: {
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: Addr
|
||
|
op = getMemRIEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= op & UINT64_C(2097151);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::SLBIE:
|
||
|
case PPC::TLBIEL:
|
||
|
case PPC::TLBLD:
|
||
|
case PPC::TLBLI: {
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::ANDISo:
|
||
|
case PPC::ANDISo8:
|
||
|
case PPC::ANDIo:
|
||
|
case PPC::ANDIo8:
|
||
|
case PPC::ORI:
|
||
|
case PPC::ORI8:
|
||
|
case PPC::ORIS:
|
||
|
case PPC::ORIS8:
|
||
|
case PPC::XORI:
|
||
|
case PPC::XORI8:
|
||
|
case PPC::XORIS:
|
||
|
case PPC::XORIS8: {
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: C
|
||
|
op = getImm16Encoding(MI, 2, Fixups, STI);
|
||
|
Value |= op & UINT64_C(65535);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BDNZA:
|
||
|
case PPC::BDNZAm:
|
||
|
case PPC::BDNZAp:
|
||
|
case PPC::BDNZLA:
|
||
|
case PPC::BDNZLAm:
|
||
|
case PPC::BDNZLAp:
|
||
|
case PPC::BDZA:
|
||
|
case PPC::BDZAm:
|
||
|
case PPC::BDZAp:
|
||
|
case PPC::BDZLA:
|
||
|
case PPC::BDZLAm:
|
||
|
case PPC::BDZLAp: {
|
||
|
// op: BD
|
||
|
op = getAbsCondBrEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16383)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BCLalways:
|
||
|
case PPC::BDNZ:
|
||
|
case PPC::BDNZ8:
|
||
|
case PPC::BDNZL:
|
||
|
case PPC::BDNZLm:
|
||
|
case PPC::BDNZLp:
|
||
|
case PPC::BDNZm:
|
||
|
case PPC::BDNZp:
|
||
|
case PPC::BDZ:
|
||
|
case PPC::BDZ8:
|
||
|
case PPC::BDZL:
|
||
|
case PPC::BDZLm:
|
||
|
case PPC::BDZLp:
|
||
|
case PPC::BDZm:
|
||
|
case PPC::BDZp: {
|
||
|
// op: BD
|
||
|
op = getCondBrEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16383)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::TCHECK: {
|
||
|
// op: BF
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MCRF:
|
||
|
case PPC::MCRFS: {
|
||
|
// op: BF
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
// op: BFA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 18;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::FCMPUD:
|
||
|
case PPC::FCMPUS: {
|
||
|
// op: BF
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
// op: FRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: FRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::CMPDI:
|
||
|
case PPC::CMPLDI:
|
||
|
case PPC::CMPLWI:
|
||
|
case PPC::CMPWI: {
|
||
|
// op: BF
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: I
|
||
|
op = getImm16Encoding(MI, 2, Fixups, STI);
|
||
|
Value |= op & UINT64_C(65535);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::CMPD:
|
||
|
case PPC::CMPLD:
|
||
|
case PPC::CMPLW:
|
||
|
case PPC::CMPW: {
|
||
|
// op: BF
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTFSFI:
|
||
|
case PPC::MTFSFIo: {
|
||
|
// op: BF
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
// op: W
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 16;
|
||
|
// op: U
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(15)) << 12;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BCCTR:
|
||
|
case PPC::BCCTR8:
|
||
|
case PPC::BCCTR8n:
|
||
|
case PPC::BCCTRL:
|
||
|
case PPC::BCCTRL8:
|
||
|
case PPC::BCCTRL8n:
|
||
|
case PPC::BCCTRLn:
|
||
|
case PPC::BCCTRn:
|
||
|
case PPC::BCLR:
|
||
|
case PPC::BCLRL:
|
||
|
case PPC::BCLRLn:
|
||
|
case PPC::BCLRn: {
|
||
|
// op: BI
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BC:
|
||
|
case PPC::BCL:
|
||
|
case PPC::BCLn:
|
||
|
case PPC::BCn: {
|
||
|
// op: BI
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: BD
|
||
|
op = getCondBrEncoding(MI, 1, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16383)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BCCCTR:
|
||
|
case PPC::BCCCTR8:
|
||
|
case PPC::BCCCTRL:
|
||
|
case PPC::BCCCTRL8:
|
||
|
case PPC::BCCLR:
|
||
|
case PPC::BCCLRL: {
|
||
|
// op: BIBO
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(96)) << 11;
|
||
|
// op: CR
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 18;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BCCA:
|
||
|
case PPC::BCCLA: {
|
||
|
// op: BIBO
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(96)) << 11;
|
||
|
// op: CR
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 18;
|
||
|
// op: BD
|
||
|
op = getAbsCondBrEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16383)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BCC:
|
||
|
case PPC::BCCL: {
|
||
|
// op: BIBO
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(96)) << 11;
|
||
|
// op: CR
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 18;
|
||
|
// op: BD
|
||
|
op = getCondBrEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16383)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::gBCA:
|
||
|
case PPC::gBCLA: {
|
||
|
// op: BO
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: BI
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: BD
|
||
|
op = getAbsCondBrEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16383)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::gBC:
|
||
|
case PPC::gBCL: {
|
||
|
// op: BO
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: BI
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: BD
|
||
|
op = getCondBrEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16383)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::gBCCTR:
|
||
|
case PPC::gBCCTRL:
|
||
|
case PPC::gBCLR:
|
||
|
case PPC::gBCLRL: {
|
||
|
// op: BO
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: BI
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: BH
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(3)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::XSCMPODP:
|
||
|
case PPC::XSCMPUDP:
|
||
|
case PPC::XSTDIVDP:
|
||
|
case PPC::XVTDIVDP:
|
||
|
case PPC::XVTDIVSP: {
|
||
|
// op: CR
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
// op: XA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(32)) >> 3;
|
||
|
// op: XB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::XSTSQRTDP:
|
||
|
case PPC::XVTSQRTDP:
|
||
|
case PPC::XVTSQRTSP: {
|
||
|
// op: CR
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
// op: XB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::CRAND:
|
||
|
case PPC::CRANDC:
|
||
|
case PPC::CREQV:
|
||
|
case PPC::CRNAND:
|
||
|
case PPC::CRNOR:
|
||
|
case PPC::CROR:
|
||
|
case PPC::CRORC:
|
||
|
case PPC::CRXOR: {
|
||
|
// op: CRD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: CRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: CRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::CRSET:
|
||
|
case PPC::CRUNSET: {
|
||
|
// op: CRD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::ICBT: {
|
||
|
// op: CT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(15)) << 21;
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BCTRL8_LDinto_toc: {
|
||
|
// op: DS_RA
|
||
|
op = getMemRIXEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(524287)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::WRTEEI: {
|
||
|
// op: E
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 15;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTFSFb: {
|
||
|
// op: FM
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(255)) << 17;
|
||
|
// op: rT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTFSB0:
|
||
|
case PPC::MTFSB1: {
|
||
|
// op: FM
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::FADD:
|
||
|
case PPC::FADDS:
|
||
|
case PPC::FADDSo:
|
||
|
case PPC::FADDo:
|
||
|
case PPC::FDIV:
|
||
|
case PPC::FDIVS:
|
||
|
case PPC::FDIVSo:
|
||
|
case PPC::FDIVo:
|
||
|
case PPC::FSUB:
|
||
|
case PPC::FSUBS:
|
||
|
case PPC::FSUBSo:
|
||
|
case PPC::FSUBo:
|
||
|
case PPC::QVFADD:
|
||
|
case PPC::QVFADDS:
|
||
|
case PPC::QVFADDSs:
|
||
|
case PPC::QVFCMPEQ:
|
||
|
case PPC::QVFCMPEQb:
|
||
|
case PPC::QVFCMPEQbs:
|
||
|
case PPC::QVFCMPGT:
|
||
|
case PPC::QVFCMPGTb:
|
||
|
case PPC::QVFCMPGTbs:
|
||
|
case PPC::QVFCMPLT:
|
||
|
case PPC::QVFCMPLTb:
|
||
|
case PPC::QVFCMPLTbs:
|
||
|
case PPC::QVFCPSGN:
|
||
|
case PPC::QVFCPSGNs:
|
||
|
case PPC::QVFSUB:
|
||
|
case PPC::QVFSUBS:
|
||
|
case PPC::QVFSUBSs:
|
||
|
case PPC::QVFTSTNAN:
|
||
|
case PPC::QVFTSTNANb:
|
||
|
case PPC::QVFTSTNANbs: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: FRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::QVALIGNI:
|
||
|
case PPC::QVALIGNIb:
|
||
|
case PPC::QVALIGNIs: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: FRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
// op: idx
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(3)) << 9;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::QVFLOGICAL:
|
||
|
case PPC::QVFLOGICALb:
|
||
|
case PPC::QVFLOGICALs: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: FRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
// op: tttt
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(15)) << 7;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::FMUL:
|
||
|
case PPC::FMULS:
|
||
|
case PPC::FMULSo:
|
||
|
case PPC::FMULo:
|
||
|
case PPC::QVFMUL:
|
||
|
case PPC::QVFMULS:
|
||
|
case PPC::QVFMULSs:
|
||
|
case PPC::QVFXMUL:
|
||
|
case PPC::QVFXMULS: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: FRC
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::FMADD:
|
||
|
case PPC::FMADDS:
|
||
|
case PPC::FMADDSo:
|
||
|
case PPC::FMADDo:
|
||
|
case PPC::FMSUB:
|
||
|
case PPC::FMSUBS:
|
||
|
case PPC::FMSUBSo:
|
||
|
case PPC::FMSUBo:
|
||
|
case PPC::FNMADD:
|
||
|
case PPC::FNMADDS:
|
||
|
case PPC::FNMADDSo:
|
||
|
case PPC::FNMADDo:
|
||
|
case PPC::FNMSUB:
|
||
|
case PPC::FNMSUBS:
|
||
|
case PPC::FNMSUBSo:
|
||
|
case PPC::FNMSUBo:
|
||
|
case PPC::FSELD:
|
||
|
case PPC::FSELDo:
|
||
|
case PPC::FSELS:
|
||
|
case PPC::FSELSo: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: FRC
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
// op: FRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::QVFMADD:
|
||
|
case PPC::QVFMADDS:
|
||
|
case PPC::QVFMADDSs:
|
||
|
case PPC::QVFMSUB:
|
||
|
case PPC::QVFMSUBS:
|
||
|
case PPC::QVFMSUBSs:
|
||
|
case PPC::QVFNMADD:
|
||
|
case PPC::QVFNMADDS:
|
||
|
case PPC::QVFNMADDSs:
|
||
|
case PPC::QVFNMSUB:
|
||
|
case PPC::QVFNMSUBS:
|
||
|
case PPC::QVFNMSUBSs:
|
||
|
case PPC::QVFPERM:
|
||
|
case PPC::QVFPERMs:
|
||
|
case PPC::QVFSEL:
|
||
|
case PPC::QVFSELb:
|
||
|
case PPC::QVFSELbb:
|
||
|
case PPC::QVFSELbs:
|
||
|
case PPC::QVFXMADD:
|
||
|
case PPC::QVFXMADDS:
|
||
|
case PPC::QVFXXCPNMADD:
|
||
|
case PPC::QVFXXCPNMADDS:
|
||
|
case PPC::QVFXXMADD:
|
||
|
case PPC::QVFXXMADDS:
|
||
|
case PPC::QVFXXNPMADD:
|
||
|
case PPC::QVFXXNPMADDS: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: FRC
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
// op: FRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::QVESPLATI:
|
||
|
case PPC::QVESPLATIb:
|
||
|
case PPC::QVESPLATIs: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FRA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: idx
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(3)) << 9;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::QVFABS:
|
||
|
case PPC::QVFABSs:
|
||
|
case PPC::QVFCFID:
|
||
|
case PPC::QVFCFIDS:
|
||
|
case PPC::QVFCFIDU:
|
||
|
case PPC::QVFCFIDUS:
|
||
|
case PPC::QVFCFIDb:
|
||
|
case PPC::QVFCTID:
|
||
|
case PPC::QVFCTIDU:
|
||
|
case PPC::QVFCTIDUZ:
|
||
|
case PPC::QVFCTIDZ:
|
||
|
case PPC::QVFCTIDb:
|
||
|
case PPC::QVFCTIW:
|
||
|
case PPC::QVFCTIWU:
|
||
|
case PPC::QVFCTIWUZ:
|
||
|
case PPC::QVFCTIWZ:
|
||
|
case PPC::QVFMR:
|
||
|
case PPC::QVFMRb:
|
||
|
case PPC::QVFMRs:
|
||
|
case PPC::QVFNABS:
|
||
|
case PPC::QVFNABSs:
|
||
|
case PPC::QVFNEG:
|
||
|
case PPC::QVFNEGs:
|
||
|
case PPC::QVFRE:
|
||
|
case PPC::QVFRES:
|
||
|
case PPC::QVFRESs:
|
||
|
case PPC::QVFRIM:
|
||
|
case PPC::QVFRIMs:
|
||
|
case PPC::QVFRIN:
|
||
|
case PPC::QVFRINs:
|
||
|
case PPC::QVFRIP:
|
||
|
case PPC::QVFRIPs:
|
||
|
case PPC::QVFRIZ:
|
||
|
case PPC::QVFRIZs:
|
||
|
case PPC::QVFRSP:
|
||
|
case PPC::QVFRSPs:
|
||
|
case PPC::QVFRSQRTE:
|
||
|
case PPC::QVFRSQRTES:
|
||
|
case PPC::QVFRSQRTESs: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::QVGPCI: {
|
||
|
// op: FRT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: idx
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(4095)) << 9;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTCRF:
|
||
|
case PPC::MTCRF8: {
|
||
|
// op: FXM
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(255)) << 12;
|
||
|
// op: rS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::SYNC:
|
||
|
case PPC::WAIT: {
|
||
|
// op: L
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(3)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::TSR: {
|
||
|
// op: L
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTFSF:
|
||
|
case PPC::MTFSFo: {
|
||
|
// op: L
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 25;
|
||
|
// op: FLM
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(255)) << 17;
|
||
|
// op: W
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 16;
|
||
|
// op: FRB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::SC: {
|
||
|
// op: LEV
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(127)) << 5;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BA:
|
||
|
case PPC::BLA:
|
||
|
case PPC::BLA8:
|
||
|
case PPC::TAILBA:
|
||
|
case PPC::TAILBA8: {
|
||
|
// op: LI
|
||
|
op = getAbsDirectBrEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16777215)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BLA8_NOP: {
|
||
|
// op: LI
|
||
|
op = getAbsDirectBrEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16777215)) << 34;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::B:
|
||
|
case PPC::BL:
|
||
|
case PPC::BL8:
|
||
|
case PPC::TAILB:
|
||
|
case PPC::TAILB8: {
|
||
|
// op: LI
|
||
|
op = getDirectBrEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16777215)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BL8_NOP: {
|
||
|
// op: LI
|
||
|
op = getDirectBrEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16777215)) << 34;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BL8_TLS:
|
||
|
case PPC::BL8_TLS_:
|
||
|
case PPC::BL_TLS: {
|
||
|
// op: LI
|
||
|
op = getTLSCallEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16777215)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::BL8_NOP_TLS: {
|
||
|
// op: LI
|
||
|
op = getTLSCallEncoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(16777215)) << 34;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MBAR: {
|
||
|
// op: MO
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::TBEGIN: {
|
||
|
// op: R
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::RLWINM:
|
||
|
case PPC::RLWINM8:
|
||
|
case PPC::RLWINM8o:
|
||
|
case PPC::RLWINMo:
|
||
|
case PPC::RLWNM:
|
||
|
case PPC::RLWNM8:
|
||
|
case PPC::RLWNM8o:
|
||
|
case PPC::RLWNMo: {
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
// op: MB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
// op: ME
|
||
|
op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 1;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::RLDCL:
|
||
|
case PPC::RLDCLo:
|
||
|
case PPC::RLDCR:
|
||
|
case PPC::RLDCRo: {
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
// op: MBE
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
Value |= op & UINT64_C(32);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::RLDIC:
|
||
|
case PPC::RLDICL:
|
||
|
case PPC::RLDICL_32_64:
|
||
|
case PPC::RLDICLo:
|
||
|
case PPC::RLDICR:
|
||
|
case PPC::RLDICRo:
|
||
|
case PPC::RLDICo: {
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: SH
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
// op: MBE
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
Value |= op & UINT64_C(32);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::RLWIMI:
|
||
|
case PPC::RLWIMI8:
|
||
|
case PPC::RLWIMI8o:
|
||
|
case PPC::RLWIMIo: {
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
// op: MB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
// op: ME
|
||
|
op = getMachineOpValue(MI, MI.getOperand(5), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 1;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::RLDIMI:
|
||
|
case PPC::RLDIMIo: {
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: SH
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
// op: MBE
|
||
|
op = getMachineOpValue(MI, MI.getOperand(4), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
Value |= op & UINT64_C(32);
|
||
|
break;
|
||
|
}
|
||
|
case PPC::WRTEE: {
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTMSR:
|
||
|
case PPC::MTMSRD: {
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: L
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFSRIN:
|
||
|
case PPC::MTSRIN: {
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFSR:
|
||
|
case PPC::MTSR: {
|
||
|
// op: RS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: SR
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(15)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFFS:
|
||
|
case PPC::MFFSo:
|
||
|
case PPC::MFMSR: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::FCPSGND:
|
||
|
case PPC::FCPSGNDo:
|
||
|
case PPC::FCPSGNS:
|
||
|
case PPC::FCPSGNSo:
|
||
|
case PPC::LBARX:
|
||
|
case PPC::LBARXL:
|
||
|
case PPC::LBZCIX:
|
||
|
case PPC::LBZX:
|
||
|
case PPC::LBZX8:
|
||
|
case PPC::LDARX:
|
||
|
case PPC::LDARXL:
|
||
|
case PPC::LDBRX:
|
||
|
case PPC::LDCIX:
|
||
|
case PPC::LDX:
|
||
|
case PPC::LFDX:
|
||
|
case PPC::LFIWAX:
|
||
|
case PPC::LFIWZX:
|
||
|
case PPC::LFSX:
|
||
|
case PPC::LHARX:
|
||
|
case PPC::LHARXL:
|
||
|
case PPC::LHAX:
|
||
|
case PPC::LHAX8:
|
||
|
case PPC::LHBRX:
|
||
|
case PPC::LHBRX8:
|
||
|
case PPC::LHZCIX:
|
||
|
case PPC::LHZX:
|
||
|
case PPC::LHZX8:
|
||
|
case PPC::LSWI:
|
||
|
case PPC::LVEBX:
|
||
|
case PPC::LVEHX:
|
||
|
case PPC::LVEWX:
|
||
|
case PPC::LVSL:
|
||
|
case PPC::LVSR:
|
||
|
case PPC::LVX:
|
||
|
case PPC::LVXL:
|
||
|
case PPC::LWARX:
|
||
|
case PPC::LWARXL:
|
||
|
case PPC::LWAX:
|
||
|
case PPC::LWAX_32:
|
||
|
case PPC::LWBRX:
|
||
|
case PPC::LWBRX8:
|
||
|
case PPC::LWZCIX:
|
||
|
case PPC::LWZX:
|
||
|
case PPC::LWZX8:
|
||
|
case PPC::QVLFCDUX:
|
||
|
case PPC::QVLFCDUXA:
|
||
|
case PPC::QVLFCDX:
|
||
|
case PPC::QVLFCDXA:
|
||
|
case PPC::QVLFCSUX:
|
||
|
case PPC::QVLFCSUXA:
|
||
|
case PPC::QVLFCSX:
|
||
|
case PPC::QVLFCSXA:
|
||
|
case PPC::QVLFCSXs:
|
||
|
case PPC::QVLFDUXA:
|
||
|
case PPC::QVLFDX:
|
||
|
case PPC::QVLFDXA:
|
||
|
case PPC::QVLFDXb:
|
||
|
case PPC::QVLFIWAX:
|
||
|
case PPC::QVLFIWAXA:
|
||
|
case PPC::QVLFIWZX:
|
||
|
case PPC::QVLFIWZXA:
|
||
|
case PPC::QVLFSUXA:
|
||
|
case PPC::QVLFSX:
|
||
|
case PPC::QVLFSXA:
|
||
|
case PPC::QVLFSXb:
|
||
|
case PPC::QVLFSXs:
|
||
|
case PPC::QVLPCLDX:
|
||
|
case PPC::QVLPCLSX:
|
||
|
case PPC::QVLPCRDX:
|
||
|
case PPC::QVLPCRSX:
|
||
|
case PPC::QVSTFCDUX:
|
||
|
case PPC::QVSTFCDUXA:
|
||
|
case PPC::QVSTFCDUXI:
|
||
|
case PPC::QVSTFCDUXIA:
|
||
|
case PPC::QVSTFCDX:
|
||
|
case PPC::QVSTFCDXA:
|
||
|
case PPC::QVSTFCDXI:
|
||
|
case PPC::QVSTFCDXIA:
|
||
|
case PPC::QVSTFCSUX:
|
||
|
case PPC::QVSTFCSUXA:
|
||
|
case PPC::QVSTFCSUXI:
|
||
|
case PPC::QVSTFCSUXIA:
|
||
|
case PPC::QVSTFCSX:
|
||
|
case PPC::QVSTFCSXA:
|
||
|
case PPC::QVSTFCSXI:
|
||
|
case PPC::QVSTFCSXIA:
|
||
|
case PPC::QVSTFCSXs:
|
||
|
case PPC::QVSTFDUXA:
|
||
|
case PPC::QVSTFDUXI:
|
||
|
case PPC::QVSTFDUXIA:
|
||
|
case PPC::QVSTFDX:
|
||
|
case PPC::QVSTFDXA:
|
||
|
case PPC::QVSTFDXI:
|
||
|
case PPC::QVSTFDXIA:
|
||
|
case PPC::QVSTFDXb:
|
||
|
case PPC::QVSTFIWX:
|
||
|
case PPC::QVSTFIWXA:
|
||
|
case PPC::QVSTFSUXA:
|
||
|
case PPC::QVSTFSUXI:
|
||
|
case PPC::QVSTFSUXIA:
|
||
|
case PPC::QVSTFSX:
|
||
|
case PPC::QVSTFSXA:
|
||
|
case PPC::QVSTFSXI:
|
||
|
case PPC::QVSTFSXIA:
|
||
|
case PPC::QVSTFSXs:
|
||
|
case PPC::STBCIX:
|
||
|
case PPC::STBCX:
|
||
|
case PPC::STBX:
|
||
|
case PPC::STBX8:
|
||
|
case PPC::STDBRX:
|
||
|
case PPC::STDCIX:
|
||
|
case PPC::STDCX:
|
||
|
case PPC::STDX:
|
||
|
case PPC::STFDX:
|
||
|
case PPC::STFIWX:
|
||
|
case PPC::STFSX:
|
||
|
case PPC::STHBRX:
|
||
|
case PPC::STHCIX:
|
||
|
case PPC::STHCX:
|
||
|
case PPC::STHX:
|
||
|
case PPC::STHX8:
|
||
|
case PPC::STSWI:
|
||
|
case PPC::STVEBX:
|
||
|
case PPC::STVEHX:
|
||
|
case PPC::STVEWX:
|
||
|
case PPC::STVX:
|
||
|
case PPC::STVXL:
|
||
|
case PPC::STWBRX:
|
||
|
case PPC::STWCIX:
|
||
|
case PPC::STWCX:
|
||
|
case PPC::STWX:
|
||
|
case PPC::STWX8:
|
||
|
case PPC::TD:
|
||
|
case PPC::TLBSX2:
|
||
|
case PPC::TLBSX2D:
|
||
|
case PPC::TW: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::TLBRE2:
|
||
|
case PPC::TLBWE2: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: WS
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::LBZUX:
|
||
|
case PPC::LBZUX8:
|
||
|
case PPC::LDUX:
|
||
|
case PPC::LFDUX:
|
||
|
case PPC::LFSUX:
|
||
|
case PPC::LHAUX:
|
||
|
case PPC::LHAUX8:
|
||
|
case PPC::LHZUX:
|
||
|
case PPC::LHZUX8:
|
||
|
case PPC::LWAUX:
|
||
|
case PPC::LWZUX:
|
||
|
case PPC::LWZUX8:
|
||
|
case PPC::QVLFDUX:
|
||
|
case PPC::QVLFSUX:
|
||
|
case PPC::TABORTDC:
|
||
|
case PPC::TABORTDCI:
|
||
|
case PPC::TABORTWC:
|
||
|
case PPC::TABORTWCI: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::FABSD:
|
||
|
case PPC::FABSDo:
|
||
|
case PPC::FABSS:
|
||
|
case PPC::FABSSo:
|
||
|
case PPC::FCFID:
|
||
|
case PPC::FCFIDS:
|
||
|
case PPC::FCFIDSo:
|
||
|
case PPC::FCFIDU:
|
||
|
case PPC::FCFIDUS:
|
||
|
case PPC::FCFIDUSo:
|
||
|
case PPC::FCFIDUo:
|
||
|
case PPC::FCFIDo:
|
||
|
case PPC::FCTID:
|
||
|
case PPC::FCTIDUZ:
|
||
|
case PPC::FCTIDUZo:
|
||
|
case PPC::FCTIDZ:
|
||
|
case PPC::FCTIDZo:
|
||
|
case PPC::FCTIDo:
|
||
|
case PPC::FCTIW:
|
||
|
case PPC::FCTIWUZ:
|
||
|
case PPC::FCTIWUZo:
|
||
|
case PPC::FCTIWZ:
|
||
|
case PPC::FCTIWZo:
|
||
|
case PPC::FCTIWo:
|
||
|
case PPC::FMR:
|
||
|
case PPC::FMRo:
|
||
|
case PPC::FNABSD:
|
||
|
case PPC::FNABSDo:
|
||
|
case PPC::FNABSS:
|
||
|
case PPC::FNABSSo:
|
||
|
case PPC::FNEGD:
|
||
|
case PPC::FNEGDo:
|
||
|
case PPC::FNEGS:
|
||
|
case PPC::FNEGSo:
|
||
|
case PPC::FRE:
|
||
|
case PPC::FRES:
|
||
|
case PPC::FRESo:
|
||
|
case PPC::FREo:
|
||
|
case PPC::FRIMD:
|
||
|
case PPC::FRIMDo:
|
||
|
case PPC::FRIMS:
|
||
|
case PPC::FRIMSo:
|
||
|
case PPC::FRIND:
|
||
|
case PPC::FRINDo:
|
||
|
case PPC::FRINS:
|
||
|
case PPC::FRINSo:
|
||
|
case PPC::FRIPD:
|
||
|
case PPC::FRIPDo:
|
||
|
case PPC::FRIPS:
|
||
|
case PPC::FRIPSo:
|
||
|
case PPC::FRIZD:
|
||
|
case PPC::FRIZDo:
|
||
|
case PPC::FRIZS:
|
||
|
case PPC::FRIZSo:
|
||
|
case PPC::FRSP:
|
||
|
case PPC::FRSPo:
|
||
|
case PPC::FRSQRTE:
|
||
|
case PPC::FRSQRTES:
|
||
|
case PPC::FRSQRTESo:
|
||
|
case PPC::FRSQRTEo:
|
||
|
case PPC::FSQRT:
|
||
|
case PPC::FSQRTS:
|
||
|
case PPC::FSQRTSo:
|
||
|
case PPC::FSQRTo:
|
||
|
case PPC::SLBMFEE:
|
||
|
case PPC::SLBMTE:
|
||
|
case PPC::TLBIE: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::LD:
|
||
|
case PPC::LWA:
|
||
|
case PPC::LWA_32:
|
||
|
case PPC::STD: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: DS_RA
|
||
|
op = getMemRIXEncoding(MI, 1, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(524287)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::LDU: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: DS_RA
|
||
|
op = getMemRIXEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(524287)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::QVSTFDUX:
|
||
|
case PPC::QVSTFSUX:
|
||
|
case PPC::QVSTFSUXs:
|
||
|
case PPC::STBUX:
|
||
|
case PPC::STBUX8:
|
||
|
case PPC::STDUX:
|
||
|
case PPC::STFDUX:
|
||
|
case PPC::STFSUX:
|
||
|
case PPC::STHUX:
|
||
|
case PPC::STHUX8:
|
||
|
case PPC::STWUX:
|
||
|
case PPC::STWUX8: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::STDU: {
|
||
|
// op: RST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: DS_RA
|
||
|
op = getMemRIXEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(524287)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFCR:
|
||
|
case PPC::MFCR8:
|
||
|
case PPC::MFCTR:
|
||
|
case PPC::MFCTR8:
|
||
|
case PPC::MFLR:
|
||
|
case PPC::MFLR8:
|
||
|
case PPC::MFTB8:
|
||
|
case PPC::MFVRSAVE:
|
||
|
case PPC::MFVRSAVEv:
|
||
|
case PPC::MTCTR:
|
||
|
case PPC::MTCTR8:
|
||
|
case PPC::MTCTR8loop:
|
||
|
case PPC::MTCTRloop:
|
||
|
case PPC::MTLR:
|
||
|
case PPC::MTLR8:
|
||
|
case PPC::MTVRSAVE:
|
||
|
case PPC::MTVRSAVEv: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::EVLHHESPLAT:
|
||
|
case PPC::EVLHHOSSPLAT:
|
||
|
case PPC::EVLHHOUSPLAT: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: D
|
||
|
op = getSPE2DisEncoding(MI, 1, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 20;
|
||
|
Value |= (op & UINT64_C(2)) << 18;
|
||
|
Value |= (op & UINT64_C(4)) << 16;
|
||
|
Value |= (op & UINT64_C(8)) << 14;
|
||
|
Value |= (op & UINT64_C(16)) << 12;
|
||
|
Value |= (op & UINT64_C(32)) << 10;
|
||
|
Value |= (op & UINT64_C(64)) << 8;
|
||
|
Value |= (op & UINT64_C(128)) << 6;
|
||
|
Value |= (op & UINT64_C(256)) << 4;
|
||
|
Value |= (op & UINT64_C(512)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::EVLWHE:
|
||
|
case PPC::EVLWHOS:
|
||
|
case PPC::EVLWHOU:
|
||
|
case PPC::EVLWHSPLAT:
|
||
|
case PPC::EVLWWSPLAT:
|
||
|
case PPC::EVSTWHE:
|
||
|
case PPC::EVSTWHO:
|
||
|
case PPC::EVSTWWE:
|
||
|
case PPC::EVSTWWO: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: D
|
||
|
op = getSPE4DisEncoding(MI, 1, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 20;
|
||
|
Value |= (op & UINT64_C(2)) << 18;
|
||
|
Value |= (op & UINT64_C(4)) << 16;
|
||
|
Value |= (op & UINT64_C(8)) << 14;
|
||
|
Value |= (op & UINT64_C(16)) << 12;
|
||
|
Value |= (op & UINT64_C(32)) << 10;
|
||
|
Value |= (op & UINT64_C(64)) << 8;
|
||
|
Value |= (op & UINT64_C(128)) << 6;
|
||
|
Value |= (op & UINT64_C(256)) << 4;
|
||
|
Value |= (op & UINT64_C(512)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::EVLDD:
|
||
|
case PPC::EVLDH:
|
||
|
case PPC::EVLDW:
|
||
|
case PPC::EVSTDD:
|
||
|
case PPC::EVSTDH:
|
||
|
case PPC::EVSTDW: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: D
|
||
|
op = getSPE8DisEncoding(MI, 1, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 20;
|
||
|
Value |= (op & UINT64_C(2)) << 18;
|
||
|
Value |= (op & UINT64_C(4)) << 16;
|
||
|
Value |= (op & UINT64_C(8)) << 14;
|
||
|
Value |= (op & UINT64_C(16)) << 12;
|
||
|
Value |= (op & UINT64_C(32)) << 10;
|
||
|
Value |= (op & UINT64_C(64)) << 8;
|
||
|
Value |= (op & UINT64_C(128)) << 6;
|
||
|
Value |= (op & UINT64_C(256)) << 4;
|
||
|
Value |= (op & UINT64_C(512)) << 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFBHRBE: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: Entry
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1023)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::ADDME:
|
||
|
case PPC::ADDME8:
|
||
|
case PPC::ADDME8o:
|
||
|
case PPC::ADDMEo:
|
||
|
case PPC::ADDZE:
|
||
|
case PPC::ADDZE8:
|
||
|
case PPC::ADDZE8o:
|
||
|
case PPC::ADDZEo:
|
||
|
case PPC::EVABS:
|
||
|
case PPC::EVADDSMIAAW:
|
||
|
case PPC::EVADDSSIAAW:
|
||
|
case PPC::EVADDUMIAAW:
|
||
|
case PPC::EVADDUSIAAW:
|
||
|
case PPC::EVCNTLSW:
|
||
|
case PPC::EVCNTLZW:
|
||
|
case PPC::EVEXTSB:
|
||
|
case PPC::EVEXTSH:
|
||
|
case PPC::EVMRA:
|
||
|
case PPC::EVNEG:
|
||
|
case PPC::EVRNDW:
|
||
|
case PPC::EVSPLATFI:
|
||
|
case PPC::EVSPLATI:
|
||
|
case PPC::EVSUBFSMIAAW:
|
||
|
case PPC::EVSUBFSSIAAW:
|
||
|
case PPC::EVSUBFUMIAAW:
|
||
|
case PPC::EVSUBFUSIAAW:
|
||
|
case PPC::NEG:
|
||
|
case PPC::NEG8:
|
||
|
case PPC::NEG8o:
|
||
|
case PPC::NEGo:
|
||
|
case PPC::SUBFME:
|
||
|
case PPC::SUBFME8:
|
||
|
case PPC::SUBFME8o:
|
||
|
case PPC::SUBFMEo:
|
||
|
case PPC::SUBFZE:
|
||
|
case PPC::SUBFZE8:
|
||
|
case PPC::SUBFZE8o:
|
||
|
case PPC::SUBFZEo: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::ADD4:
|
||
|
case PPC::ADD4o:
|
||
|
case PPC::ADD8:
|
||
|
case PPC::ADD8o:
|
||
|
case PPC::ADDC:
|
||
|
case PPC::ADDC8:
|
||
|
case PPC::ADDC8o:
|
||
|
case PPC::ADDCo:
|
||
|
case PPC::ADDE:
|
||
|
case PPC::ADDE8:
|
||
|
case PPC::ADDE8o:
|
||
|
case PPC::ADDEo:
|
||
|
case PPC::BRINC:
|
||
|
case PPC::DIVD:
|
||
|
case PPC::DIVDE:
|
||
|
case PPC::DIVDEU:
|
||
|
case PPC::DIVDEUo:
|
||
|
case PPC::DIVDEo:
|
||
|
case PPC::DIVDU:
|
||
|
case PPC::DIVDUo:
|
||
|
case PPC::DIVDo:
|
||
|
case PPC::DIVW:
|
||
|
case PPC::DIVWE:
|
||
|
case PPC::DIVWEU:
|
||
|
case PPC::DIVWEUo:
|
||
|
case PPC::DIVWEo:
|
||
|
case PPC::DIVWU:
|
||
|
case PPC::DIVWUo:
|
||
|
case PPC::DIVWo:
|
||
|
case PPC::EVADDIW:
|
||
|
case PPC::EVADDW:
|
||
|
case PPC::EVAND:
|
||
|
case PPC::EVANDC:
|
||
|
case PPC::EVDIVWS:
|
||
|
case PPC::EVDIVWU:
|
||
|
case PPC::EVEQV:
|
||
|
case PPC::EVLDDX:
|
||
|
case PPC::EVLDHX:
|
||
|
case PPC::EVLDWX:
|
||
|
case PPC::EVLHHESPLATX:
|
||
|
case PPC::EVLHHOSSPLATX:
|
||
|
case PPC::EVLHHOUSPLATX:
|
||
|
case PPC::EVLWHEX:
|
||
|
case PPC::EVLWHOSX:
|
||
|
case PPC::EVLWHOUX:
|
||
|
case PPC::EVLWHSPLATX:
|
||
|
case PPC::EVLWWSPLATX:
|
||
|
case PPC::EVMERGEHI:
|
||
|
case PPC::EVMERGEHILO:
|
||
|
case PPC::EVMERGELO:
|
||
|
case PPC::EVMERGELOHI:
|
||
|
case PPC::EVMHEGSMFAA:
|
||
|
case PPC::EVMHEGSMFAN:
|
||
|
case PPC::EVMHEGSMIAA:
|
||
|
case PPC::EVMHEGSMIAN:
|
||
|
case PPC::EVMHEGUMIAA:
|
||
|
case PPC::EVMHEGUMIAN:
|
||
|
case PPC::EVMHESMF:
|
||
|
case PPC::EVMHESMFA:
|
||
|
case PPC::EVMHESMFAAW:
|
||
|
case PPC::EVMHESMFANW:
|
||
|
case PPC::EVMHESMI:
|
||
|
case PPC::EVMHESMIA:
|
||
|
case PPC::EVMHESMIAAW:
|
||
|
case PPC::EVMHESMIANW:
|
||
|
case PPC::EVMHESSF:
|
||
|
case PPC::EVMHESSFA:
|
||
|
case PPC::EVMHESSFAAW:
|
||
|
case PPC::EVMHESSFANW:
|
||
|
case PPC::EVMHESSIAAW:
|
||
|
case PPC::EVMHESSIANW:
|
||
|
case PPC::EVMHEUMI:
|
||
|
case PPC::EVMHEUMIA:
|
||
|
case PPC::EVMHEUMIAAW:
|
||
|
case PPC::EVMHEUMIANW:
|
||
|
case PPC::EVMHEUSIAAW:
|
||
|
case PPC::EVMHEUSIANW:
|
||
|
case PPC::EVMHOGSMFAA:
|
||
|
case PPC::EVMHOGSMFAN:
|
||
|
case PPC::EVMHOGSMIAA:
|
||
|
case PPC::EVMHOGSMIAN:
|
||
|
case PPC::EVMHOGUMIAA:
|
||
|
case PPC::EVMHOGUMIAN:
|
||
|
case PPC::EVMHOSMF:
|
||
|
case PPC::EVMHOSMFA:
|
||
|
case PPC::EVMHOSMFAAW:
|
||
|
case PPC::EVMHOSMFANW:
|
||
|
case PPC::EVMHOSMI:
|
||
|
case PPC::EVMHOSMIA:
|
||
|
case PPC::EVMHOSMIAAW:
|
||
|
case PPC::EVMHOSMIANW:
|
||
|
case PPC::EVMHOSSF:
|
||
|
case PPC::EVMHOSSFA:
|
||
|
case PPC::EVMHOSSFAAW:
|
||
|
case PPC::EVMHOSSFANW:
|
||
|
case PPC::EVMHOSSIAAW:
|
||
|
case PPC::EVMHOSSIANW:
|
||
|
case PPC::EVMHOUMI:
|
||
|
case PPC::EVMHOUMIA:
|
||
|
case PPC::EVMHOUMIAAW:
|
||
|
case PPC::EVMHOUMIANW:
|
||
|
case PPC::EVMHOUSIAAW:
|
||
|
case PPC::EVMHOUSIANW:
|
||
|
case PPC::EVMWHSMF:
|
||
|
case PPC::EVMWHSMFA:
|
||
|
case PPC::EVMWHSMI:
|
||
|
case PPC::EVMWHSMIA:
|
||
|
case PPC::EVMWHSSF:
|
||
|
case PPC::EVMWHSSFA:
|
||
|
case PPC::EVMWHUMI:
|
||
|
case PPC::EVMWHUMIA:
|
||
|
case PPC::EVMWLSMIAAW:
|
||
|
case PPC::EVMWLSMIANW:
|
||
|
case PPC::EVMWLSSIAAW:
|
||
|
case PPC::EVMWLSSIANW:
|
||
|
case PPC::EVMWLUMI:
|
||
|
case PPC::EVMWLUMIA:
|
||
|
case PPC::EVMWLUMIAAW:
|
||
|
case PPC::EVMWLUMIANW:
|
||
|
case PPC::EVMWLUSIAAW:
|
||
|
case PPC::EVMWLUSIANW:
|
||
|
case PPC::EVMWSMF:
|
||
|
case PPC::EVMWSMFA:
|
||
|
case PPC::EVMWSMFAA:
|
||
|
case PPC::EVMWSMFAN:
|
||
|
case PPC::EVMWSMI:
|
||
|
case PPC::EVMWSMIA:
|
||
|
case PPC::EVMWSMIAA:
|
||
|
case PPC::EVMWSMIAN:
|
||
|
case PPC::EVMWSSF:
|
||
|
case PPC::EVMWSSFA:
|
||
|
case PPC::EVMWSSFAA:
|
||
|
case PPC::EVMWSSFAN:
|
||
|
case PPC::EVMWUMI:
|
||
|
case PPC::EVMWUMIA:
|
||
|
case PPC::EVMWUMIAA:
|
||
|
case PPC::EVMWUMIAN:
|
||
|
case PPC::EVNAND:
|
||
|
case PPC::EVNOR:
|
||
|
case PPC::EVOR:
|
||
|
case PPC::EVORC:
|
||
|
case PPC::EVRLW:
|
||
|
case PPC::EVRLWI:
|
||
|
case PPC::EVSLW:
|
||
|
case PPC::EVSLWI:
|
||
|
case PPC::EVSRWIS:
|
||
|
case PPC::EVSRWIU:
|
||
|
case PPC::EVSRWS:
|
||
|
case PPC::EVSRWU:
|
||
|
case PPC::EVSTDDX:
|
||
|
case PPC::EVSTDHX:
|
||
|
case PPC::EVSTDWX:
|
||
|
case PPC::EVSTWHEX:
|
||
|
case PPC::EVSTWHOX:
|
||
|
case PPC::EVSTWWEX:
|
||
|
case PPC::EVSTWWOX:
|
||
|
case PPC::EVSUBFW:
|
||
|
case PPC::EVSUBIFW:
|
||
|
case PPC::EVXOR:
|
||
|
case PPC::MULHD:
|
||
|
case PPC::MULHDU:
|
||
|
case PPC::MULHDUo:
|
||
|
case PPC::MULHDo:
|
||
|
case PPC::MULHW:
|
||
|
case PPC::MULHWU:
|
||
|
case PPC::MULHWUo:
|
||
|
case PPC::MULHWo:
|
||
|
case PPC::MULLD:
|
||
|
case PPC::MULLDo:
|
||
|
case PPC::MULLW:
|
||
|
case PPC::MULLWo:
|
||
|
case PPC::SUBF:
|
||
|
case PPC::SUBF8:
|
||
|
case PPC::SUBF8o:
|
||
|
case PPC::SUBFC:
|
||
|
case PPC::SUBFC8:
|
||
|
case PPC::SUBFC8o:
|
||
|
case PPC::SUBFCo:
|
||
|
case PPC::SUBFE:
|
||
|
case PPC::SUBFE8:
|
||
|
case PPC::SUBFE8o:
|
||
|
case PPC::SUBFEo:
|
||
|
case PPC::SUBFo: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::ISEL:
|
||
|
case PPC::ISEL8: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
// op: COND
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::ADD4TLS:
|
||
|
case PPC::ADD8TLS:
|
||
|
case PPC::ADD8TLS_: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RB
|
||
|
op = getTLSRegEncoding(MI, 2, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFDCR:
|
||
|
case PPC::MFSPR:
|
||
|
case PPC::MFSPR8:
|
||
|
case PPC::MFTB:
|
||
|
case PPC::MTDCR: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: SPR
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(992)) << 6;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTSPR:
|
||
|
case PPC::MTSPR8: {
|
||
|
// op: RT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: SPR
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(992)) << 6;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::RFEBB: {
|
||
|
// op: S
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFOCRF:
|
||
|
case PPC::MFOCRF8: {
|
||
|
// op: ST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FXM
|
||
|
op = get_crbitm_encoding(MI, 1, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(255)) << 12;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTOCRF:
|
||
|
case PPC::MTOCRF8: {
|
||
|
// op: ST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: FXM
|
||
|
op = get_crbitm_encoding(MI, 0, Fixups, STI);
|
||
|
Value |= (op & UINT64_C(255)) << 12;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::DSS: {
|
||
|
// op: STRM
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(3)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::DST:
|
||
|
case PPC::DST64:
|
||
|
case PPC::DSTST:
|
||
|
case PPC::DSTST64:
|
||
|
case PPC::DSTSTT:
|
||
|
case PPC::DSTSTT64:
|
||
|
case PPC::DSTT:
|
||
|
case PPC::DSTT64: {
|
||
|
// op: STRM
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(3)) << 21;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::DCBT:
|
||
|
case PPC::DCBTST: {
|
||
|
// op: TH
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTVSCR: {
|
||
|
// op: VB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFVSCR:
|
||
|
case PPC::V_SETALLONES:
|
||
|
case PPC::V_SETALLONESB:
|
||
|
case PPC::V_SETALLONESH: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::VSPLTISB:
|
||
|
case PPC::VSPLTISH:
|
||
|
case PPC::VSPLTISW: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: IMM
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::VSBOX: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: VA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::VSHASIGMAD:
|
||
|
case PPC::VSHASIGMAW: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: VA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: ST
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(1)) << 15;
|
||
|
// op: SIX
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(15)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::VADDCUQ:
|
||
|
case PPC::VADDCUW:
|
||
|
case PPC::VADDFP:
|
||
|
case PPC::VADDSBS:
|
||
|
case PPC::VADDSHS:
|
||
|
case PPC::VADDSWS:
|
||
|
case PPC::VADDUBM:
|
||
|
case PPC::VADDUBS:
|
||
|
case PPC::VADDUDM:
|
||
|
case PPC::VADDUHM:
|
||
|
case PPC::VADDUHS:
|
||
|
case PPC::VADDUQM:
|
||
|
case PPC::VADDUWM:
|
||
|
case PPC::VADDUWS:
|
||
|
case PPC::VAND:
|
||
|
case PPC::VANDC:
|
||
|
case PPC::VAVGSB:
|
||
|
case PPC::VAVGSH:
|
||
|
case PPC::VAVGSW:
|
||
|
case PPC::VAVGUB:
|
||
|
case PPC::VAVGUH:
|
||
|
case PPC::VAVGUW:
|
||
|
case PPC::VBPERMQ:
|
||
|
case PPC::VCFSX:
|
||
|
case PPC::VCFUX:
|
||
|
case PPC::VCIPHER:
|
||
|
case PPC::VCIPHERLAST:
|
||
|
case PPC::VCMPBFP:
|
||
|
case PPC::VCMPBFPo:
|
||
|
case PPC::VCMPEQFP:
|
||
|
case PPC::VCMPEQFPo:
|
||
|
case PPC::VCMPEQUB:
|
||
|
case PPC::VCMPEQUBo:
|
||
|
case PPC::VCMPEQUD:
|
||
|
case PPC::VCMPEQUDo:
|
||
|
case PPC::VCMPEQUH:
|
||
|
case PPC::VCMPEQUHo:
|
||
|
case PPC::VCMPEQUW:
|
||
|
case PPC::VCMPEQUWo:
|
||
|
case PPC::VCMPGEFP:
|
||
|
case PPC::VCMPGEFPo:
|
||
|
case PPC::VCMPGTFP:
|
||
|
case PPC::VCMPGTFPo:
|
||
|
case PPC::VCMPGTSB:
|
||
|
case PPC::VCMPGTSBo:
|
||
|
case PPC::VCMPGTSD:
|
||
|
case PPC::VCMPGTSDo:
|
||
|
case PPC::VCMPGTSH:
|
||
|
case PPC::VCMPGTSHo:
|
||
|
case PPC::VCMPGTSW:
|
||
|
case PPC::VCMPGTSWo:
|
||
|
case PPC::VCMPGTUB:
|
||
|
case PPC::VCMPGTUBo:
|
||
|
case PPC::VCMPGTUD:
|
||
|
case PPC::VCMPGTUDo:
|
||
|
case PPC::VCMPGTUH:
|
||
|
case PPC::VCMPGTUHo:
|
||
|
case PPC::VCMPGTUW:
|
||
|
case PPC::VCMPGTUWo:
|
||
|
case PPC::VCTSXS:
|
||
|
case PPC::VCTUXS:
|
||
|
case PPC::VEQV:
|
||
|
case PPC::VMAXFP:
|
||
|
case PPC::VMAXSB:
|
||
|
case PPC::VMAXSD:
|
||
|
case PPC::VMAXSH:
|
||
|
case PPC::VMAXSW:
|
||
|
case PPC::VMAXUB:
|
||
|
case PPC::VMAXUD:
|
||
|
case PPC::VMAXUH:
|
||
|
case PPC::VMAXUW:
|
||
|
case PPC::VMINFP:
|
||
|
case PPC::VMINSB:
|
||
|
case PPC::VMINSD:
|
||
|
case PPC::VMINSH:
|
||
|
case PPC::VMINSW:
|
||
|
case PPC::VMINUB:
|
||
|
case PPC::VMINUD:
|
||
|
case PPC::VMINUH:
|
||
|
case PPC::VMINUW:
|
||
|
case PPC::VMRGEW:
|
||
|
case PPC::VMRGHB:
|
||
|
case PPC::VMRGHH:
|
||
|
case PPC::VMRGHW:
|
||
|
case PPC::VMRGLB:
|
||
|
case PPC::VMRGLH:
|
||
|
case PPC::VMRGLW:
|
||
|
case PPC::VMRGOW:
|
||
|
case PPC::VMULESB:
|
||
|
case PPC::VMULESH:
|
||
|
case PPC::VMULESW:
|
||
|
case PPC::VMULEUB:
|
||
|
case PPC::VMULEUH:
|
||
|
case PPC::VMULEUW:
|
||
|
case PPC::VMULOSB:
|
||
|
case PPC::VMULOSH:
|
||
|
case PPC::VMULOSW:
|
||
|
case PPC::VMULOUB:
|
||
|
case PPC::VMULOUH:
|
||
|
case PPC::VMULOUW:
|
||
|
case PPC::VMULUWM:
|
||
|
case PPC::VNAND:
|
||
|
case PPC::VNCIPHER:
|
||
|
case PPC::VNCIPHERLAST:
|
||
|
case PPC::VNOR:
|
||
|
case PPC::VOR:
|
||
|
case PPC::VORC:
|
||
|
case PPC::VPKPX:
|
||
|
case PPC::VPKSDSS:
|
||
|
case PPC::VPKSDUS:
|
||
|
case PPC::VPKSHSS:
|
||
|
case PPC::VPKSHUS:
|
||
|
case PPC::VPKSWSS:
|
||
|
case PPC::VPKSWUS:
|
||
|
case PPC::VPKUDUM:
|
||
|
case PPC::VPKUDUS:
|
||
|
case PPC::VPKUHUM:
|
||
|
case PPC::VPKUHUS:
|
||
|
case PPC::VPKUWUM:
|
||
|
case PPC::VPKUWUS:
|
||
|
case PPC::VPMSUMB:
|
||
|
case PPC::VPMSUMD:
|
||
|
case PPC::VPMSUMH:
|
||
|
case PPC::VPMSUMW:
|
||
|
case PPC::VRLB:
|
||
|
case PPC::VRLD:
|
||
|
case PPC::VRLH:
|
||
|
case PPC::VRLW:
|
||
|
case PPC::VSL:
|
||
|
case PPC::VSLB:
|
||
|
case PPC::VSLD:
|
||
|
case PPC::VSLH:
|
||
|
case PPC::VSLO:
|
||
|
case PPC::VSLW:
|
||
|
case PPC::VSPLTB:
|
||
|
case PPC::VSPLTH:
|
||
|
case PPC::VSPLTW:
|
||
|
case PPC::VSR:
|
||
|
case PPC::VSRAB:
|
||
|
case PPC::VSRAD:
|
||
|
case PPC::VSRAH:
|
||
|
case PPC::VSRAW:
|
||
|
case PPC::VSRB:
|
||
|
case PPC::VSRD:
|
||
|
case PPC::VSRH:
|
||
|
case PPC::VSRO:
|
||
|
case PPC::VSRW:
|
||
|
case PPC::VSUBCUQ:
|
||
|
case PPC::VSUBCUW:
|
||
|
case PPC::VSUBFP:
|
||
|
case PPC::VSUBSBS:
|
||
|
case PPC::VSUBSHS:
|
||
|
case PPC::VSUBSWS:
|
||
|
case PPC::VSUBUBM:
|
||
|
case PPC::VSUBUBS:
|
||
|
case PPC::VSUBUDM:
|
||
|
case PPC::VSUBUHM:
|
||
|
case PPC::VSUBUHS:
|
||
|
case PPC::VSUBUQM:
|
||
|
case PPC::VSUBUWM:
|
||
|
case PPC::VSUBUWS:
|
||
|
case PPC::VSUM2SWS:
|
||
|
case PPC::VSUM4SBS:
|
||
|
case PPC::VSUM4SHS:
|
||
|
case PPC::VSUM4UBS:
|
||
|
case PPC::VSUMSWS:
|
||
|
case PPC::VXOR: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: VA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: VB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::VSLDOI: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: VA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: VB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
// op: SH
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(15)) << 6;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::VADDECUQ:
|
||
|
case PPC::VADDEUQM:
|
||
|
case PPC::VMHADDSHS:
|
||
|
case PPC::VMHRADDSHS:
|
||
|
case PPC::VMLADDUHM:
|
||
|
case PPC::VMSUMMBM:
|
||
|
case PPC::VMSUMSHM:
|
||
|
case PPC::VMSUMSHS:
|
||
|
case PPC::VMSUMUBM:
|
||
|
case PPC::VMSUMUHM:
|
||
|
case PPC::VMSUMUHS:
|
||
|
case PPC::VPERM:
|
||
|
case PPC::VPERMXOR:
|
||
|
case PPC::VSEL:
|
||
|
case PPC::VSUBECUQ:
|
||
|
case PPC::VSUBEUQM: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: VA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: VB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
// op: VC
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::VMADDFP:
|
||
|
case PPC::VNMSUBFP: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: VA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: VC
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
// op: VB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::VCFSX_0:
|
||
|
case PPC::VCFUX_0:
|
||
|
case PPC::VCLZB:
|
||
|
case PPC::VCLZD:
|
||
|
case PPC::VCLZH:
|
||
|
case PPC::VCLZW:
|
||
|
case PPC::VCTSXS_0:
|
||
|
case PPC::VCTUXS_0:
|
||
|
case PPC::VEXPTEFP:
|
||
|
case PPC::VGBBD:
|
||
|
case PPC::VLOGEFP:
|
||
|
case PPC::VPOPCNTB:
|
||
|
case PPC::VPOPCNTD:
|
||
|
case PPC::VPOPCNTH:
|
||
|
case PPC::VPOPCNTW:
|
||
|
case PPC::VREFP:
|
||
|
case PPC::VRFIM:
|
||
|
case PPC::VRFIN:
|
||
|
case PPC::VRFIP:
|
||
|
case PPC::VRFIZ:
|
||
|
case PPC::VRSQRTEFP:
|
||
|
case PPC::VUPKHPX:
|
||
|
case PPC::VUPKHSB:
|
||
|
case PPC::VUPKHSH:
|
||
|
case PPC::VUPKHSW:
|
||
|
case PPC::VUPKLPX:
|
||
|
case PPC::VUPKLSB:
|
||
|
case PPC::VUPKLSH:
|
||
|
case PPC::VUPKLSW: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
// op: VB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::V_SET0:
|
||
|
case PPC::V_SET0B:
|
||
|
case PPC::V_SET0H: {
|
||
|
// op: VD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MTVSRD:
|
||
|
case PPC::MTVSRWA:
|
||
|
case PPC::MTVSRWZ: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::LXSDX:
|
||
|
case PPC::LXSIWAX:
|
||
|
case PPC::LXSIWZX:
|
||
|
case PPC::LXSSPX:
|
||
|
case PPC::LXVD2X:
|
||
|
case PPC::LXVDSX:
|
||
|
case PPC::LXVW4X:
|
||
|
case PPC::STXSDX:
|
||
|
case PPC::STXSIWX:
|
||
|
case PPC::STXSSPX:
|
||
|
case PPC::STXVD2X:
|
||
|
case PPC::STXVW4X: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: B
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::XSADDDP:
|
||
|
case PPC::XSADDSP:
|
||
|
case PPC::XSCPSGNDP:
|
||
|
case PPC::XSDIVDP:
|
||
|
case PPC::XSDIVSP:
|
||
|
case PPC::XSMAXDP:
|
||
|
case PPC::XSMINDP:
|
||
|
case PPC::XSMULDP:
|
||
|
case PPC::XSMULSP:
|
||
|
case PPC::XSSUBDP:
|
||
|
case PPC::XSSUBSP:
|
||
|
case PPC::XVADDDP:
|
||
|
case PPC::XVADDSP:
|
||
|
case PPC::XVCMPEQDP:
|
||
|
case PPC::XVCMPEQDPo:
|
||
|
case PPC::XVCMPEQSP:
|
||
|
case PPC::XVCMPEQSPo:
|
||
|
case PPC::XVCMPGEDP:
|
||
|
case PPC::XVCMPGEDPo:
|
||
|
case PPC::XVCMPGESP:
|
||
|
case PPC::XVCMPGESPo:
|
||
|
case PPC::XVCMPGTDP:
|
||
|
case PPC::XVCMPGTDPo:
|
||
|
case PPC::XVCMPGTSP:
|
||
|
case PPC::XVCMPGTSPo:
|
||
|
case PPC::XVCPSGNDP:
|
||
|
case PPC::XVCPSGNSP:
|
||
|
case PPC::XVDIVDP:
|
||
|
case PPC::XVDIVSP:
|
||
|
case PPC::XVMAXDP:
|
||
|
case PPC::XVMAXSP:
|
||
|
case PPC::XVMINDP:
|
||
|
case PPC::XVMINSP:
|
||
|
case PPC::XVMULDP:
|
||
|
case PPC::XVMULSP:
|
||
|
case PPC::XVSUBDP:
|
||
|
case PPC::XVSUBSP:
|
||
|
case PPC::XXLAND:
|
||
|
case PPC::XXLANDC:
|
||
|
case PPC::XXLEQV:
|
||
|
case PPC::XXLNAND:
|
||
|
case PPC::XXLNOR:
|
||
|
case PPC::XXLOR:
|
||
|
case PPC::XXLORC:
|
||
|
case PPC::XXLORf:
|
||
|
case PPC::XXLXOR:
|
||
|
case PPC::XXMRGHW:
|
||
|
case PPC::XXMRGLW: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: XA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(32)) >> 3;
|
||
|
// op: XB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::XXPERMDI:
|
||
|
case PPC::XXSLDWI: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: XA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(32)) >> 3;
|
||
|
// op: XB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
// op: D
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(3)) << 8;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::XXSEL: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: XA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(32)) >> 3;
|
||
|
// op: XB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
// op: XC
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 6;
|
||
|
Value |= (op & UINT64_C(32)) >> 2;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::XSMADDADP:
|
||
|
case PPC::XSMADDASP:
|
||
|
case PPC::XSMADDMDP:
|
||
|
case PPC::XSMADDMSP:
|
||
|
case PPC::XSMSUBADP:
|
||
|
case PPC::XSMSUBASP:
|
||
|
case PPC::XSMSUBMDP:
|
||
|
case PPC::XSMSUBMSP:
|
||
|
case PPC::XSNMADDADP:
|
||
|
case PPC::XSNMADDASP:
|
||
|
case PPC::XSNMADDMDP:
|
||
|
case PPC::XSNMADDMSP:
|
||
|
case PPC::XSNMSUBADP:
|
||
|
case PPC::XSNMSUBASP:
|
||
|
case PPC::XSNMSUBMDP:
|
||
|
case PPC::XSNMSUBMSP:
|
||
|
case PPC::XVMADDADP:
|
||
|
case PPC::XVMADDASP:
|
||
|
case PPC::XVMADDMDP:
|
||
|
case PPC::XVMADDMSP:
|
||
|
case PPC::XVMSUBADP:
|
||
|
case PPC::XVMSUBASP:
|
||
|
case PPC::XVMSUBMDP:
|
||
|
case PPC::XVMSUBMSP:
|
||
|
case PPC::XVNMADDADP:
|
||
|
case PPC::XVNMADDASP:
|
||
|
case PPC::XVNMADDMDP:
|
||
|
case PPC::XVNMADDMSP:
|
||
|
case PPC::XVNMSUBADP:
|
||
|
case PPC::XVNMSUBASP:
|
||
|
case PPC::XVNMSUBMDP:
|
||
|
case PPC::XVNMSUBMSP: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: XA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
Value |= (op & UINT64_C(32)) >> 3;
|
||
|
// op: XB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(3), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::XSABSDP:
|
||
|
case PPC::XSCVDPSP:
|
||
|
case PPC::XSCVDPSPN:
|
||
|
case PPC::XSCVDPSXDS:
|
||
|
case PPC::XSCVDPSXWS:
|
||
|
case PPC::XSCVDPUXDS:
|
||
|
case PPC::XSCVDPUXWS:
|
||
|
case PPC::XSCVSPDP:
|
||
|
case PPC::XSCVSPDPN:
|
||
|
case PPC::XSCVSXDDP:
|
||
|
case PPC::XSCVSXDSP:
|
||
|
case PPC::XSCVUXDDP:
|
||
|
case PPC::XSCVUXDSP:
|
||
|
case PPC::XSNABSDP:
|
||
|
case PPC::XSNEGDP:
|
||
|
case PPC::XSRDPI:
|
||
|
case PPC::XSRDPIC:
|
||
|
case PPC::XSRDPIM:
|
||
|
case PPC::XSRDPIP:
|
||
|
case PPC::XSRDPIZ:
|
||
|
case PPC::XSREDP:
|
||
|
case PPC::XSRESP:
|
||
|
case PPC::XSRSQRTEDP:
|
||
|
case PPC::XSRSQRTESP:
|
||
|
case PPC::XSSQRTDP:
|
||
|
case PPC::XSSQRTSP:
|
||
|
case PPC::XVABSDP:
|
||
|
case PPC::XVABSSP:
|
||
|
case PPC::XVCVDPSP:
|
||
|
case PPC::XVCVDPSXDS:
|
||
|
case PPC::XVCVDPSXWS:
|
||
|
case PPC::XVCVDPUXDS:
|
||
|
case PPC::XVCVDPUXWS:
|
||
|
case PPC::XVCVSPDP:
|
||
|
case PPC::XVCVSPSXDS:
|
||
|
case PPC::XVCVSPSXWS:
|
||
|
case PPC::XVCVSPUXDS:
|
||
|
case PPC::XVCVSPUXWS:
|
||
|
case PPC::XVCVSXDDP:
|
||
|
case PPC::XVCVSXDSP:
|
||
|
case PPC::XVCVSXWDP:
|
||
|
case PPC::XVCVSXWSP:
|
||
|
case PPC::XVCVUXDDP:
|
||
|
case PPC::XVCVUXDSP:
|
||
|
case PPC::XVCVUXWDP:
|
||
|
case PPC::XVCVUXWSP:
|
||
|
case PPC::XVNABSDP:
|
||
|
case PPC::XVNABSSP:
|
||
|
case PPC::XVNEGDP:
|
||
|
case PPC::XVNEGSP:
|
||
|
case PPC::XVRDPI:
|
||
|
case PPC::XVRDPIC:
|
||
|
case PPC::XVRDPIM:
|
||
|
case PPC::XVRDPIP:
|
||
|
case PPC::XVRDPIZ:
|
||
|
case PPC::XVREDP:
|
||
|
case PPC::XVRESP:
|
||
|
case PPC::XVRSPI:
|
||
|
case PPC::XVRSPIC:
|
||
|
case PPC::XVRSPIM:
|
||
|
case PPC::XVRSPIP:
|
||
|
case PPC::XVRSPIZ:
|
||
|
case PPC::XVRSQRTEDP:
|
||
|
case PPC::XVRSQRTESP:
|
||
|
case PPC::XVSQRTDP:
|
||
|
case PPC::XVSQRTSP: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: XB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::XXSPLTW: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: XB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
Value |= (op & UINT64_C(32)) >> 4;
|
||
|
// op: D
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(3)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::MFVSRD:
|
||
|
case PPC::MFVSRWZ: {
|
||
|
// op: XT
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 21;
|
||
|
Value |= (op & UINT64_C(32)) >> 5;
|
||
|
// op: A
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
break;
|
||
|
}
|
||
|
case PPC::EVCMPEQ:
|
||
|
case PPC::EVCMPGTS:
|
||
|
case PPC::EVCMPGTU:
|
||
|
case PPC::EVCMPLTS:
|
||
|
case PPC::EVCMPLTU: {
|
||
|
// op: crD
|
||
|
op = getMachineOpValue(MI, MI.getOperand(0), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(7)) << 23;
|
||
|
// op: RA
|
||
|
op = getMachineOpValue(MI, MI.getOperand(1), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 16;
|
||
|
// op: RB
|
||
|
op = getMachineOpValue(MI, MI.getOperand(2), Fixups, STI);
|
||
|
Value |= (op & UINT64_C(31)) << 11;
|
||
|
break;
|
||
|
}
|
||
|
default:
|
||
|
std::string msg;
|
||
|
raw_string_ostream Msg(msg);
|
||
|
Msg << "Not supported instr: " << MI;
|
||
|
report_fatal_error(Msg.str());
|
||
|
}
|
||
|
return Value;
|
||
|
}
|
||
|
|