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78 lines
3.2 KiB
78 lines
3.2 KiB
4 years ago
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//===- ARMTargetStreamer.cpp - ARMTargetStreamer class --*- C++ -*---------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the ARMTargetStreamer class.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/ADT/MapVector.h"
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#include "llvm/MC/ConstantPools.h"
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#include "llvm/MC/MCContext.h"
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#include "llvm/MC/MCExpr.h"
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#include "llvm/MC/MCStreamer.h"
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using namespace llvm_ks;
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//
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// ARMTargetStreamer Implemenation
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//
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ARMTargetStreamer::ARMTargetStreamer(MCStreamer &S)
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: MCTargetStreamer(S), ConstantPools(new AssemblerConstantPools()) {}
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ARMTargetStreamer::~ARMTargetStreamer() {}
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// The constant pool handling is shared by all ARMTargetStreamer
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// implementations.
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const MCExpr *ARMTargetStreamer::addConstantPoolEntry(const MCExpr *Expr, SMLoc Loc) {
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return ConstantPools->addEntry(Streamer, Expr, 4, Loc);
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}
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void ARMTargetStreamer::emitCurrentConstantPool() {
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ConstantPools->emitForCurrentSection(Streamer);
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}
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// finish() - write out any non-empty assembler constant pools.
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void ARMTargetStreamer::finish() { ConstantPools->emitAll(Streamer); }
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// reset() - Reset any state
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void ARMTargetStreamer::reset() {}
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// The remaining callbacks should be handled separately by each
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// streamer.
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void ARMTargetStreamer::emitFnStart() {}
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void ARMTargetStreamer::emitFnEnd() {}
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void ARMTargetStreamer::emitCantUnwind() {}
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void ARMTargetStreamer::emitPersonality(const MCSymbol *Personality) {}
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void ARMTargetStreamer::emitPersonalityIndex(unsigned Index) {}
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void ARMTargetStreamer::emitHandlerData() {}
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void ARMTargetStreamer::emitSetFP(unsigned FpReg, unsigned SpReg,
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int64_t Offset) {}
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void ARMTargetStreamer::emitMovSP(unsigned Reg, int64_t Offset) {}
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void ARMTargetStreamer::emitPad(int64_t Offset) {}
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void ARMTargetStreamer::emitRegSave(const SmallVectorImpl<unsigned> &RegList,
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bool isVector) {}
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void ARMTargetStreamer::emitUnwindRaw(int64_t StackOffset,
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const SmallVectorImpl<uint8_t> &Opcodes) {
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}
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void ARMTargetStreamer::switchVendor(StringRef Vendor) {}
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void ARMTargetStreamer::emitAttribute(unsigned Attribute, unsigned Value) {}
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void ARMTargetStreamer::emitTextAttribute(unsigned Attribute,
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StringRef String) {}
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void ARMTargetStreamer::emitIntTextAttribute(unsigned Attribute,
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unsigned IntValue,
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StringRef StringValue) {}
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void ARMTargetStreamer::emitArch(unsigned Arch) {}
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void ARMTargetStreamer::emitArchExtension(unsigned ArchExt) {}
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void ARMTargetStreamer::emitObjectArch(unsigned Arch) {}
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void ARMTargetStreamer::emitFPU(unsigned FPU) {}
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void ARMTargetStreamer::finishAttributeSection() {}
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void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {}
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void
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ARMTargetStreamer::AnnotateTLSDescriptorSequence(const MCSymbolRefExpr *SRE) {}
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void ARMTargetStreamer::emitThumbSet(MCSymbol *Symbol, const MCExpr *Value) {}
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