/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Instruction Enum Values *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_INSTRINFO_ENUM #undef GET_INSTRINFO_ENUM namespace llvm_ks { namespace Mips { enum { PHI = 0, INLINEASM = 1, CFI_INSTRUCTION = 2, EH_LABEL = 3, GC_LABEL = 4, KILL = 5, EXTRACT_SUBREG = 6, INSERT_SUBREG = 7, IMPLICIT_DEF = 8, SUBREG_TO_REG = 9, COPY_TO_REGCLASS = 10, DBG_VALUE = 11, REG_SEQUENCE = 12, COPY = 13, BUNDLE = 14, LIFETIME_START = 15, LIFETIME_END = 16, STACKMAP = 17, PATCHPOINT = 18, LOAD_STACK_GUARD = 19, STATEPOINT = 20, LOCAL_ESCAPE = 21, FAULTING_LOAD_OP = 22, G_ADD = 23, ABSMacro = 24, ABSQ_S_PH = 25, ABSQ_S_PH_MM = 26, ABSQ_S_QB = 27, ABSQ_S_QB_MMR2 = 28, ABSQ_S_W = 29, ABSQ_S_W_MM = 30, ABS_D_MMR6 = 31, ABS_S_MMR6 = 32, ADD = 33, ADDIUPC = 34, ADDIUPC_MM = 35, ADDIUPC_MMR6 = 36, ADDIUR1SP_MM = 37, ADDIUR2_MM = 38, ADDIUS5_MM = 39, ADDIUSP_MM = 40, ADDIU_MMR6 = 41, ADDQH_PH = 42, ADDQH_PH_MMR2 = 43, ADDQH_R_PH = 44, ADDQH_R_PH_MMR2 = 45, ADDQH_R_W = 46, ADDQH_R_W_MMR2 = 47, ADDQH_W = 48, ADDQH_W_MMR2 = 49, ADDQ_PH = 50, ADDQ_PH_MM = 51, ADDQ_S_PH = 52, ADDQ_S_PH_MM = 53, ADDQ_S_W = 54, ADDQ_S_W_MM = 55, ADDSC = 56, ADDSC_MM = 57, ADDS_A_B = 58, ADDS_A_D = 59, ADDS_A_H = 60, ADDS_A_W = 61, ADDS_S_B = 62, ADDS_S_D = 63, ADDS_S_H = 64, ADDS_S_W = 65, ADDS_U_B = 66, ADDS_U_D = 67, ADDS_U_H = 68, ADDS_U_W = 69, ADDU16_MM = 70, ADDU16_MMR6 = 71, ADDUH_QB = 72, ADDUH_QB_MMR2 = 73, ADDUH_R_QB = 74, ADDUH_R_QB_MMR2 = 75, ADDU_MMR6 = 76, ADDU_PH = 77, ADDU_PH_MMR2 = 78, ADDU_QB = 79, ADDU_QB_MM = 80, ADDU_S_PH = 81, ADDU_S_PH_MMR2 = 82, ADDU_S_QB = 83, ADDU_S_QB_MM = 84, ADDVI_B = 85, ADDVI_D = 86, ADDVI_H = 87, ADDVI_W = 88, ADDV_B = 89, ADDV_D = 90, ADDV_H = 91, ADDV_W = 92, ADDWC = 93, ADDWC_MM = 94, ADD_A_B = 95, ADD_A_D = 96, ADD_A_H = 97, ADD_A_W = 98, ADD_MM = 99, ADD_MMR6 = 100, ADDi = 101, ADDi_MM = 102, ADDiu = 103, ADDiu_MM = 104, ADDu = 105, ADDu_MM = 106, ADJCALLSTACKDOWN = 107, ADJCALLSTACKUP = 108, ALIGN = 109, ALIGN_MMR6 = 110, ALUIPC = 111, ALUIPC_MMR6 = 112, AND = 113, AND16_MM = 114, AND16_MMR6 = 115, AND64 = 116, ANDI16_MM = 117, ANDI16_MMR6 = 118, ANDI_B = 119, ANDI_MMR6 = 120, AND_MM = 121, AND_MMR6 = 122, AND_V = 123, AND_V_D_PSEUDO = 124, AND_V_H_PSEUDO = 125, AND_V_W_PSEUDO = 126, ANDi = 127, ANDi64 = 128, ANDi_MM = 129, APPEND = 130, ASUB_S_B = 131, ASUB_S_D = 132, ASUB_S_H = 133, ASUB_S_W = 134, ASUB_U_B = 135, ASUB_U_D = 136, ASUB_U_H = 137, ASUB_U_W = 138, ATOMIC_CMP_SWAP_I16 = 139, ATOMIC_CMP_SWAP_I32 = 140, ATOMIC_CMP_SWAP_I64 = 141, ATOMIC_CMP_SWAP_I8 = 142, ATOMIC_LOAD_ADD_I16 = 143, ATOMIC_LOAD_ADD_I32 = 144, ATOMIC_LOAD_ADD_I64 = 145, ATOMIC_LOAD_ADD_I8 = 146, ATOMIC_LOAD_AND_I16 = 147, ATOMIC_LOAD_AND_I32 = 148, ATOMIC_LOAD_AND_I64 = 149, ATOMIC_LOAD_AND_I8 = 150, ATOMIC_LOAD_NAND_I16 = 151, ATOMIC_LOAD_NAND_I32 = 152, ATOMIC_LOAD_NAND_I64 = 153, ATOMIC_LOAD_NAND_I8 = 154, ATOMIC_LOAD_OR_I16 = 155, ATOMIC_LOAD_OR_I32 = 156, ATOMIC_LOAD_OR_I64 = 157, ATOMIC_LOAD_OR_I8 = 158, ATOMIC_LOAD_SUB_I16 = 159, ATOMIC_LOAD_SUB_I32 = 160, ATOMIC_LOAD_SUB_I64 = 161, ATOMIC_LOAD_SUB_I8 = 162, ATOMIC_LOAD_XOR_I16 = 163, ATOMIC_LOAD_XOR_I32 = 164, ATOMIC_LOAD_XOR_I64 = 165, ATOMIC_LOAD_XOR_I8 = 166, ATOMIC_SWAP_I16 = 167, ATOMIC_SWAP_I32 = 168, ATOMIC_SWAP_I64 = 169, ATOMIC_SWAP_I8 = 170, AUI = 171, AUIPC = 172, AUIPC_MMR6 = 173, AUI_MMR6 = 174, AVER_S_B = 175, AVER_S_D = 176, AVER_S_H = 177, AVER_S_W = 178, AVER_U_B = 179, AVER_U_D = 180, AVER_U_H = 181, AVER_U_W = 182, AVE_S_B = 183, AVE_S_D = 184, AVE_S_H = 185, AVE_S_W = 186, AVE_U_B = 187, AVE_U_D = 188, AVE_U_H = 189, AVE_U_W = 190, AddiuRxImmX16 = 191, AddiuRxPcImmX16 = 192, AddiuRxRxImm16 = 193, AddiuRxRxImmX16 = 194, AddiuRxRyOffMemX16 = 195, AddiuSpImm16 = 196, AddiuSpImmX16 = 197, AdduRxRyRz16 = 198, AndRxRxRy16 = 199, B = 200, B16_MM = 201, BADDu = 202, BAL = 203, BALC = 204, BALC_MMR6 = 205, BALIGN = 206, BAL_BR = 207, BBIT0 = 208, BBIT032 = 209, BBIT1 = 210, BBIT132 = 211, BC = 212, BC16_MMR6 = 213, BC1EQZ = 214, BC1F = 215, BC1FL = 216, BC1F_MM = 217, BC1NEZ = 218, BC1T = 219, BC1TL = 220, BC1T_MM = 221, BC2EQZ = 222, BC2NEZ = 223, BCLRI_B = 224, BCLRI_D = 225, BCLRI_H = 226, BCLRI_W = 227, BCLR_B = 228, BCLR_D = 229, BCLR_H = 230, BCLR_W = 231, BC_MMR6 = 232, BEQ = 233, BEQ64 = 234, BEQC = 235, BEQL = 236, BEQZ16_MM = 237, BEQZALC = 238, BEQZALC_MMR6 = 239, BEQZC = 240, BEQZC16_MMR6 = 241, BEQZC_MM = 242, BEQ_MM = 243, BGE = 244, BGEC = 245, BGEImmMacro = 246, BGEL = 247, BGELImmMacro = 248, BGEU = 249, BGEUC = 250, BGEUImmMacro = 251, BGEUL = 252, BGEULImmMacro = 253, BGEZ = 254, BGEZ64 = 255, BGEZAL = 256, BGEZALC = 257, BGEZALC_MMR6 = 258, BGEZALL = 259, BGEZALS_MM = 260, BGEZAL_MM = 261, BGEZC = 262, BGEZL = 263, BGEZ_MM = 264, BGT = 265, BGTImmMacro = 266, BGTL = 267, BGTLImmMacro = 268, BGTU = 269, BGTUImmMacro = 270, BGTUL = 271, BGTULImmMacro = 272, BGTZ = 273, BGTZ64 = 274, BGTZALC = 275, BGTZALC_MMR6 = 276, BGTZC = 277, BGTZL = 278, BGTZ_MM = 279, BINSLI_B = 280, BINSLI_D = 281, BINSLI_H = 282, BINSLI_W = 283, BINSL_B = 284, BINSL_D = 285, BINSL_H = 286, BINSL_W = 287, BINSRI_B = 288, BINSRI_D = 289, BINSRI_H = 290, BINSRI_W = 291, BINSR_B = 292, BINSR_D = 293, BINSR_H = 294, BINSR_W = 295, BITREV = 296, BITSWAP = 297, BITSWAP_MMR6 = 298, BLE = 299, BLEImmMacro = 300, BLEL = 301, BLELImmMacro = 302, BLEU = 303, BLEUImmMacro = 304, BLEUL = 305, BLEULImmMacro = 306, BLEZ = 307, BLEZ64 = 308, BLEZALC = 309, BLEZALC_MMR6 = 310, BLEZC = 311, BLEZL = 312, BLEZ_MM = 313, BLT = 314, BLTC = 315, BLTImmMacro = 316, BLTL = 317, BLTLImmMacro = 318, BLTU = 319, BLTUC = 320, BLTUImmMacro = 321, BLTUL = 322, BLTULImmMacro = 323, BLTZ = 324, BLTZ64 = 325, BLTZAL = 326, BLTZALC = 327, BLTZALC_MMR6 = 328, BLTZALL = 329, BLTZALS_MM = 330, BLTZAL_MM = 331, BLTZC = 332, BLTZL = 333, BLTZ_MM = 334, BMNZI_B = 335, BMNZ_V = 336, BMZI_B = 337, BMZ_V = 338, BNE = 339, BNE64 = 340, BNEC = 341, BNEGI_B = 342, BNEGI_D = 343, BNEGI_H = 344, BNEGI_W = 345, BNEG_B = 346, BNEG_D = 347, BNEG_H = 348, BNEG_W = 349, BNEL = 350, BNEZ16_MM = 351, BNEZALC = 352, BNEZALC_MMR6 = 353, BNEZC = 354, BNEZC16_MMR6 = 355, BNEZC_MM = 356, BNE_MM = 357, BNVC = 358, BNZ_B = 359, BNZ_D = 360, BNZ_H = 361, BNZ_V = 362, BNZ_W = 363, BOVC = 364, BPOSGE32 = 365, BPOSGE32_PSEUDO = 366, BREAK = 367, BREAK16_MM = 368, BREAK16_MMR6 = 369, BREAK_MM = 370, BREAK_MMR6 = 371, BSELI_B = 372, BSEL_D_PSEUDO = 373, BSEL_FD_PSEUDO = 374, BSEL_FW_PSEUDO = 375, BSEL_H_PSEUDO = 376, BSEL_V = 377, BSEL_W_PSEUDO = 378, BSETI_B = 379, BSETI_D = 380, BSETI_H = 381, BSETI_W = 382, BSET_B = 383, BSET_D = 384, BSET_H = 385, BSET_W = 386, BZ_B = 387, BZ_D = 388, BZ_H = 389, BZ_V = 390, BZ_W = 391, B_MMR6_Pseudo = 392, B_MM_Pseudo = 393, BeqImm = 394, BeqzRxImm16 = 395, BeqzRxImmX16 = 396, Bimm16 = 397, BimmX16 = 398, BneImm = 399, BnezRxImm16 = 400, BnezRxImmX16 = 401, Break16 = 402, Bteqz16 = 403, BteqzT8CmpX16 = 404, BteqzT8CmpiX16 = 405, BteqzT8SltX16 = 406, BteqzT8SltiX16 = 407, BteqzT8SltiuX16 = 408, BteqzT8SltuX16 = 409, BteqzX16 = 410, Btnez16 = 411, BtnezT8CmpX16 = 412, BtnezT8CmpiX16 = 413, BtnezT8SltX16 = 414, BtnezT8SltiX16 = 415, BtnezT8SltiuX16 = 416, BtnezT8SltuX16 = 417, BtnezX16 = 418, BuildPairF64 = 419, BuildPairF64_64 = 420, CACHE = 421, CACHEE = 422, CACHEE_MM = 423, CACHEE_MMR6 = 424, CACHE_MM = 425, CACHE_MMR6 = 426, CACHE_R6 = 427, CEIL_L_D64 = 428, CEIL_L_D_MMR6 = 429, CEIL_L_S = 430, CEIL_L_S_MMR6 = 431, CEIL_W_D32 = 432, CEIL_W_D64 = 433, CEIL_W_D_MMR6 = 434, CEIL_W_MM = 435, CEIL_W_S = 436, CEIL_W_S_MM = 437, CEIL_W_S_MMR6 = 438, CEQI_B = 439, CEQI_D = 440, CEQI_H = 441, CEQI_W = 442, CEQ_B = 443, CEQ_D = 444, CEQ_H = 445, CEQ_W = 446, CFC1 = 447, CFC1_MM = 448, CFCMSA = 449, CINS = 450, CINS32 = 451, CLASS_D = 452, CLASS_D_MMR6 = 453, CLASS_S = 454, CLASS_S_MMR6 = 455, CLEI_S_B = 456, CLEI_S_D = 457, CLEI_S_H = 458, CLEI_S_W = 459, CLEI_U_B = 460, CLEI_U_D = 461, CLEI_U_H = 462, CLEI_U_W = 463, CLE_S_B = 464, CLE_S_D = 465, CLE_S_H = 466, CLE_S_W = 467, CLE_U_B = 468, CLE_U_D = 469, CLE_U_H = 470, CLE_U_W = 471, CLO = 472, CLO_MM = 473, CLO_MMR6 = 474, CLO_R6 = 475, CLTI_S_B = 476, CLTI_S_D = 477, CLTI_S_H = 478, CLTI_S_W = 479, CLTI_U_B = 480, CLTI_U_D = 481, CLTI_U_H = 482, CLTI_U_W = 483, CLT_S_B = 484, CLT_S_D = 485, CLT_S_H = 486, CLT_S_W = 487, CLT_U_B = 488, CLT_U_D = 489, CLT_U_H = 490, CLT_U_W = 491, CLZ = 492, CLZ_MM = 493, CLZ_MMR6 = 494, CLZ_R6 = 495, CMPGDU_EQ_QB = 496, CMPGDU_LE_QB = 497, CMPGDU_LT_QB = 498, CMPGU_EQ_QB = 499, CMPGU_LE_QB = 500, CMPGU_LT_QB = 501, CMPU_EQ_QB = 502, CMPU_LE_QB = 503, CMPU_LT_QB = 504, CMP_AF_D_MMR6 = 505, CMP_AF_S_MMR6 = 506, CMP_EQ_D = 507, CMP_EQ_D_MMR6 = 508, CMP_EQ_PH = 509, CMP_EQ_S = 510, CMP_EQ_S_MMR6 = 511, CMP_F_D = 512, CMP_F_S = 513, CMP_LE_D = 514, CMP_LE_D_MMR6 = 515, CMP_LE_PH = 516, CMP_LE_S = 517, CMP_LE_S_MMR6 = 518, CMP_LT_D = 519, CMP_LT_D_MMR6 = 520, CMP_LT_PH = 521, CMP_LT_S = 522, CMP_LT_S_MMR6 = 523, CMP_SAF_D = 524, CMP_SAF_D_MMR6 = 525, CMP_SAF_S = 526, CMP_SAF_S_MMR6 = 527, CMP_SEQ_D = 528, CMP_SEQ_D_MMR6 = 529, CMP_SEQ_S = 530, CMP_SEQ_S_MMR6 = 531, CMP_SLE_D = 532, CMP_SLE_D_MMR6 = 533, CMP_SLE_S = 534, CMP_SLE_S_MMR6 = 535, CMP_SLT_D = 536, CMP_SLT_D_MMR6 = 537, CMP_SLT_S = 538, CMP_SLT_S_MMR6 = 539, CMP_SUEQ_D = 540, CMP_SUEQ_D_MMR6 = 541, CMP_SUEQ_S = 542, CMP_SUEQ_S_MMR6 = 543, CMP_SULE_D = 544, CMP_SULE_D_MMR6 = 545, CMP_SULE_S = 546, CMP_SULE_S_MMR6 = 547, CMP_SULT_D = 548, CMP_SULT_D_MMR6 = 549, CMP_SULT_S = 550, CMP_SULT_S_MMR6 = 551, CMP_SUN_D = 552, CMP_SUN_D_MMR6 = 553, CMP_SUN_S = 554, CMP_SUN_S_MMR6 = 555, CMP_UEQ_D = 556, CMP_UEQ_D_MMR6 = 557, CMP_UEQ_S = 558, CMP_UEQ_S_MMR6 = 559, CMP_ULE_D = 560, CMP_ULE_D_MMR6 = 561, CMP_ULE_S = 562, CMP_ULE_S_MMR6 = 563, CMP_ULT_D = 564, CMP_ULT_D_MMR6 = 565, CMP_ULT_S = 566, CMP_ULT_S_MMR6 = 567, CMP_UN_D = 568, CMP_UN_D_MMR6 = 569, CMP_UN_S = 570, CMP_UN_S_MMR6 = 571, CONSTPOOL_ENTRY = 572, COPY_FD_PSEUDO = 573, COPY_FW_PSEUDO = 574, COPY_S_B = 575, COPY_S_D = 576, COPY_S_H = 577, COPY_S_W = 578, COPY_U_B = 579, COPY_U_H = 580, COPY_U_W = 581, CTC1 = 582, CTC1_MM = 583, CTCMSA = 584, CVT_D32_S = 585, CVT_D32_W = 586, CVT_D32_W_MM = 587, CVT_D64_L = 588, CVT_D64_S = 589, CVT_D64_W = 590, CVT_D_L_MMR6 = 591, CVT_D_S_MM = 592, CVT_D_S_MMR6 = 593, CVT_D_W_MMR6 = 594, CVT_L_D64 = 595, CVT_L_D64_MM = 596, CVT_L_D_MMR6 = 597, CVT_L_S = 598, CVT_L_S_MM = 599, CVT_L_S_MMR6 = 600, CVT_S_D32 = 601, CVT_S_D32_MM = 602, CVT_S_D64 = 603, CVT_S_D_MMR6 = 604, CVT_S_L = 605, CVT_S_L_MMR6 = 606, CVT_S_W = 607, CVT_S_W_MM = 608, CVT_S_W_MMR6 = 609, CVT_W_D32 = 610, CVT_W_D64 = 611, CVT_W_D_MMR6 = 612, CVT_W_MM = 613, CVT_W_S = 614, CVT_W_S_MM = 615, CVT_W_S_MMR6 = 616, C_EQ_D32 = 617, C_EQ_D64 = 618, C_EQ_S = 619, C_F_D32 = 620, C_F_D64 = 621, C_F_S = 622, C_LE_D32 = 623, C_LE_D64 = 624, C_LE_S = 625, C_LT_D32 = 626, C_LT_D64 = 627, C_LT_S = 628, C_NGE_D32 = 629, C_NGE_D64 = 630, C_NGE_S = 631, C_NGLE_D32 = 632, C_NGLE_D64 = 633, C_NGLE_S = 634, C_NGL_D32 = 635, C_NGL_D64 = 636, C_NGL_S = 637, C_NGT_D32 = 638, C_NGT_D64 = 639, C_NGT_S = 640, C_OLE_D32 = 641, C_OLE_D64 = 642, C_OLE_S = 643, C_OLT_D32 = 644, C_OLT_D64 = 645, C_OLT_S = 646, C_SEQ_D32 = 647, C_SEQ_D64 = 648, C_SEQ_S = 649, C_SF_D32 = 650, C_SF_D64 = 651, C_SF_S = 652, C_UEQ_D32 = 653, C_UEQ_D64 = 654, C_UEQ_S = 655, C_ULE_D32 = 656, C_ULE_D64 = 657, C_ULE_S = 658, C_ULT_D32 = 659, C_ULT_D64 = 660, C_ULT_S = 661, C_UN_D32 = 662, C_UN_D64 = 663, C_UN_S = 664, CmpRxRy16 = 665, CmpiRxImm16 = 666, CmpiRxImmX16 = 667, Constant32 = 668, DADD = 669, DADDi = 670, DADDiu = 671, DADDu = 672, DAHI = 673, DAHI_MM64R6 = 674, DALIGN = 675, DALIGN_MM64R6 = 676, DATI = 677, DATI_MM64R6 = 678, DAUI = 679, DAUI_MM64R6 = 680, DBITSWAP = 681, DCLO = 682, DCLO_R6 = 683, DCLZ = 684, DCLZ_R6 = 685, DDIV = 686, DDIVU = 687, DDIVU_MM64R6 = 688, DDIV_MM64R6 = 689, DERET = 690, DERET_MM = 691, DERET_MMR6 = 692, DEXT = 693, DEXTM = 694, DEXTM_MM64R6 = 695, DEXTU = 696, DEXTU_MM64R6 = 697, DEXT_MM64R6 = 698, DI = 699, DINS = 700, DINSM = 701, DINSU = 702, DIV = 703, DIVU = 704, DIVU_MMR6 = 705, DIV_MMR6 = 706, DIV_S_B = 707, DIV_S_D = 708, DIV_S_H = 709, DIV_S_W = 710, DIV_U_B = 711, DIV_U_D = 712, DIV_U_H = 713, DIV_U_W = 714, DI_MM = 715, DI_MMR6 = 716, DLSA = 717, DLSA_R6 = 718, DMFC0 = 719, DMFC1 = 720, DMFC2 = 721, DMFC2_OCTEON = 722, DMOD = 723, DMODU = 724, DMODU_MM64R6 = 725, DMOD_MM64R6 = 726, DMTC0 = 727, DMTC1 = 728, DMTC2 = 729, DMTC2_OCTEON = 730, DMUH = 731, DMUHU = 732, DMUL = 733, DMULT = 734, DMULTu = 735, DMULU = 736, DMUL_R6 = 737, DOTP_S_D = 738, DOTP_S_H = 739, DOTP_S_W = 740, DOTP_U_D = 741, DOTP_U_H = 742, DOTP_U_W = 743, DPADD_S_D = 744, DPADD_S_H = 745, DPADD_S_W = 746, DPADD_U_D = 747, DPADD_U_H = 748, DPADD_U_W = 749, DPAQX_SA_W_PH = 750, DPAQX_SA_W_PH_MMR2 = 751, DPAQX_S_W_PH = 752, DPAQX_S_W_PH_MMR2 = 753, DPAQ_SA_L_W = 754, DPAQ_SA_L_W_MM = 755, DPAQ_S_W_PH = 756, DPAQ_S_W_PH_MM = 757, DPAU_H_QBL = 758, DPAU_H_QBL_MM = 759, DPAU_H_QBR = 760, DPAU_H_QBR_MM = 761, DPAX_W_PH = 762, DPAX_W_PH_MMR2 = 763, DPA_W_PH = 764, DPA_W_PH_MMR2 = 765, DPOP = 766, DPSQX_SA_W_PH = 767, DPSQX_SA_W_PH_MMR2 = 768, DPSQX_S_W_PH = 769, DPSQX_S_W_PH_MMR2 = 770, DPSQ_SA_L_W = 771, DPSQ_SA_L_W_MM = 772, DPSQ_S_W_PH = 773, DPSQ_S_W_PH_MM = 774, DPSUB_S_D = 775, DPSUB_S_H = 776, DPSUB_S_W = 777, DPSUB_U_D = 778, DPSUB_U_H = 779, DPSUB_U_W = 780, DPSU_H_QBL = 781, DPSU_H_QBL_MM = 782, DPSU_H_QBR = 783, DPSU_H_QBR_MM = 784, DPSX_W_PH = 785, DPSX_W_PH_MMR2 = 786, DPS_W_PH = 787, DPS_W_PH_MMR2 = 788, DROL = 789, DROLImm = 790, DROR = 791, DRORImm = 792, DROTR = 793, DROTR32 = 794, DROTRV = 795, DSBH = 796, DSDIV = 797, DSDivMacro = 798, DSHD = 799, DSLL = 800, DSLL32 = 801, DSLL64_32 = 802, DSLLV = 803, DSRA = 804, DSRA32 = 805, DSRAV = 806, DSRL = 807, DSRL32 = 808, DSRLV = 809, DSUB = 810, DSUBu = 811, DUDIV = 812, DUDivMacro = 813, DivRxRy16 = 814, DivuRxRy16 = 815, EHB = 816, EHB_MM = 817, EHB_MMR6 = 818, EI = 819, EI_MM = 820, EI_MMR6 = 821, ERET = 822, ERETNC = 823, ERETNC_MMR6 = 824, ERET_MM = 825, ERET_MMR6 = 826, ERet = 827, EXT = 828, EXTP = 829, EXTPDP = 830, EXTPDPV = 831, EXTPDPV_MM = 832, EXTPDP_MM = 833, EXTPV = 834, EXTPV_MM = 835, EXTP_MM = 836, EXTRV_RS_W = 837, EXTRV_RS_W_MM = 838, EXTRV_R_W = 839, EXTRV_R_W_MM = 840, EXTRV_S_H = 841, EXTRV_S_H_MM = 842, EXTRV_W = 843, EXTRV_W_MM = 844, EXTR_RS_W = 845, EXTR_RS_W_MM = 846, EXTR_R_W = 847, EXTR_R_W_MM = 848, EXTR_S_H = 849, EXTR_S_H_MM = 850, EXTR_W = 851, EXTR_W_MM = 852, EXTS = 853, EXTS32 = 854, EXT_MM = 855, ExtractElementF64 = 856, ExtractElementF64_64 = 857, FABS_D = 858, FABS_D32 = 859, FABS_D64 = 860, FABS_MM = 861, FABS_S = 862, FABS_S_MM = 863, FABS_W = 864, FADD_D = 865, FADD_D32 = 866, FADD_D64 = 867, FADD_D_MMR6 = 868, FADD_MM = 869, FADD_S = 870, FADD_S_MM = 871, FADD_S_MMR6 = 872, FADD_W = 873, FCAF_D = 874, FCAF_W = 875, FCEQ_D = 876, FCEQ_W = 877, FCLASS_D = 878, FCLASS_W = 879, FCLE_D = 880, FCLE_W = 881, FCLT_D = 882, FCLT_W = 883, FCMP_D32 = 884, FCMP_D32_MM = 885, FCMP_D64 = 886, FCMP_S32 = 887, FCMP_S32_MM = 888, FCNE_D = 889, FCNE_W = 890, FCOR_D = 891, FCOR_W = 892, FCUEQ_D = 893, FCUEQ_W = 894, FCULE_D = 895, FCULE_W = 896, FCULT_D = 897, FCULT_W = 898, FCUNE_D = 899, FCUNE_W = 900, FCUN_D = 901, FCUN_W = 902, FDIV_D = 903, FDIV_D32 = 904, FDIV_D64 = 905, FDIV_D_MMR6 = 906, FDIV_MM = 907, FDIV_S = 908, FDIV_S_MM = 909, FDIV_S_MMR6 = 910, FDIV_W = 911, FEXDO_H = 912, FEXDO_W = 913, FEXP2_D = 914, FEXP2_D_1_PSEUDO = 915, FEXP2_W = 916, FEXP2_W_1_PSEUDO = 917, FEXUPL_D = 918, FEXUPL_W = 919, FEXUPR_D = 920, FEXUPR_W = 921, FFINT_S_D = 922, FFINT_S_W = 923, FFINT_U_D = 924, FFINT_U_W = 925, FFQL_D = 926, FFQL_W = 927, FFQR_D = 928, FFQR_W = 929, FILL_B = 930, FILL_D = 931, FILL_FD_PSEUDO = 932, FILL_FW_PSEUDO = 933, FILL_H = 934, FILL_W = 935, FLOG2_D = 936, FLOG2_W = 937, FLOOR_L_D64 = 938, FLOOR_L_D_MMR6 = 939, FLOOR_L_S = 940, FLOOR_L_S_MMR6 = 941, FLOOR_W_D32 = 942, FLOOR_W_D64 = 943, FLOOR_W_D_MMR6 = 944, FLOOR_W_MM = 945, FLOOR_W_S = 946, FLOOR_W_S_MM = 947, FLOOR_W_S_MMR6 = 948, FMADD_D = 949, FMADD_W = 950, FMAX_A_D = 951, FMAX_A_W = 952, FMAX_D = 953, FMAX_W = 954, FMIN_A_D = 955, FMIN_A_W = 956, FMIN_D = 957, FMIN_W = 958, FMOV_D32 = 959, FMOV_D32_MM = 960, FMOV_D64 = 961, FMOV_D_MMR6 = 962, FMOV_S = 963, FMOV_S_MM = 964, FMOV_S_MMR6 = 965, FMSUB_D = 966, FMSUB_W = 967, FMUL_D = 968, FMUL_D32 = 969, FMUL_D64 = 970, FMUL_D_MMR6 = 971, FMUL_MM = 972, FMUL_S = 973, FMUL_S_MM = 974, FMUL_S_MMR6 = 975, FMUL_W = 976, FNEG_D32 = 977, FNEG_D64 = 978, FNEG_D_MMR6 = 979, FNEG_MM = 980, FNEG_S = 981, FNEG_S_MM = 982, FNEG_S_MMR6 = 983, FRCP_D = 984, FRCP_W = 985, FRINT_D = 986, FRINT_W = 987, FRSQRT_D = 988, FRSQRT_W = 989, FSAF_D = 990, FSAF_W = 991, FSEQ_D = 992, FSEQ_W = 993, FSLE_D = 994, FSLE_W = 995, FSLT_D = 996, FSLT_W = 997, FSNE_D = 998, FSNE_W = 999, FSOR_D = 1000, FSOR_W = 1001, FSQRT_D = 1002, FSQRT_D32 = 1003, FSQRT_D64 = 1004, FSQRT_MM = 1005, FSQRT_S = 1006, FSQRT_S_MM = 1007, FSQRT_W = 1008, FSUB_D = 1009, FSUB_D32 = 1010, FSUB_D64 = 1011, FSUB_D_MMR6 = 1012, FSUB_MM = 1013, FSUB_S = 1014, FSUB_S_MM = 1015, FSUB_S_MMR6 = 1016, FSUB_W = 1017, FSUEQ_D = 1018, FSUEQ_W = 1019, FSULE_D = 1020, FSULE_W = 1021, FSULT_D = 1022, FSULT_W = 1023, FSUNE_D = 1024, FSUNE_W = 1025, FSUN_D = 1026, FSUN_W = 1027, FTINT_S_D = 1028, FTINT_S_W = 1029, FTINT_U_D = 1030, FTINT_U_W = 1031, FTQ_H = 1032, FTQ_W = 1033, FTRUNC_S_D = 1034, FTRUNC_S_W = 1035, FTRUNC_U_D = 1036, FTRUNC_U_W = 1037, GotPrologue16 = 1038, HADD_S_D = 1039, HADD_S_H = 1040, HADD_S_W = 1041, HADD_U_D = 1042, HADD_U_H = 1043, HADD_U_W = 1044, HSUB_S_D = 1045, HSUB_S_H = 1046, HSUB_S_W = 1047, HSUB_U_D = 1048, HSUB_U_H = 1049, HSUB_U_W = 1050, ILVEV_B = 1051, ILVEV_D = 1052, ILVEV_H = 1053, ILVEV_W = 1054, ILVL_B = 1055, ILVL_D = 1056, ILVL_H = 1057, ILVL_W = 1058, ILVOD_B = 1059, ILVOD_D = 1060, ILVOD_H = 1061, ILVOD_W = 1062, ILVR_B = 1063, ILVR_D = 1064, ILVR_H = 1065, ILVR_W = 1066, INS = 1067, INSERT_B = 1068, INSERT_B_VIDX64_PSEUDO = 1069, INSERT_B_VIDX_PSEUDO = 1070, INSERT_D = 1071, INSERT_D_VIDX64_PSEUDO = 1072, INSERT_D_VIDX_PSEUDO = 1073, INSERT_FD_PSEUDO = 1074, INSERT_FD_VIDX64_PSEUDO = 1075, INSERT_FD_VIDX_PSEUDO = 1076, INSERT_FW_PSEUDO = 1077, INSERT_FW_VIDX64_PSEUDO = 1078, INSERT_FW_VIDX_PSEUDO = 1079, INSERT_H = 1080, INSERT_H_VIDX64_PSEUDO = 1081, INSERT_H_VIDX_PSEUDO = 1082, INSERT_W = 1083, INSERT_W_VIDX64_PSEUDO = 1084, INSERT_W_VIDX_PSEUDO = 1085, INSV = 1086, INSVE_B = 1087, INSVE_D = 1088, INSVE_H = 1089, INSVE_W = 1090, INSV_MM = 1091, INS_MM = 1092, J = 1093, JAL = 1094, JALR = 1095, JALR16_MM = 1096, JALR64 = 1097, JALR64Pseudo = 1098, JALRC16_MMR6 = 1099, JALRPseudo = 1100, JALRS16_MM = 1101, JALRS_MM = 1102, JALR_HB = 1103, JALR_MM = 1104, JALS_MM = 1105, JALX = 1106, JALX_MM = 1107, JAL_MM = 1108, JIALC = 1109, JIALC_MMR6 = 1110, JIC = 1111, JIC_MMR6 = 1112, JR = 1113, JR16_MM = 1114, JR64 = 1115, JRADDIUSP = 1116, JRC16_MM = 1117, JRC16_MMR6 = 1118, JRCADDIUSP_MMR6 = 1119, JR_HB = 1120, JR_HB_R6 = 1121, JR_MM = 1122, J_MM = 1123, Jal16 = 1124, JalB16 = 1125, JalOneReg = 1126, JalTwoReg = 1127, JrRa16 = 1128, JrcRa16 = 1129, JrcRx16 = 1130, JumpLinkReg16 = 1131, LB = 1132, LB64 = 1133, LBE = 1134, LBE_MM = 1135, LBE_MMR6 = 1136, LBU16_MM = 1137, LBUE_MMR6 = 1138, LBUX = 1139, LBUX_MM = 1140, LBU_MMR6 = 1141, LB_MM = 1142, LB_MMR6 = 1143, LBu = 1144, LBu64 = 1145, LBuE = 1146, LBuE_MM = 1147, LBu_MM = 1148, LD = 1149, LDC1 = 1150, LDC164 = 1151, LDC1_MM = 1152, LDC2 = 1153, LDC2_R6 = 1154, LDC3 = 1155, LDI_B = 1156, LDI_D = 1157, LDI_H = 1158, LDI_W = 1159, LDL = 1160, LDPC = 1161, LDR = 1162, LDXC1 = 1163, LDXC164 = 1164, LD_B = 1165, LD_D = 1166, LD_H = 1167, LD_W = 1168, LEA_ADDiu = 1169, LEA_ADDiu64 = 1170, LEA_ADDiu_MM = 1171, LH = 1172, LH64 = 1173, LHE = 1174, LHE_MM = 1175, LHU16_MM = 1176, LHX = 1177, LHX_MM = 1178, LH_MM = 1179, LHu = 1180, LHu64 = 1181, LHuE = 1182, LHuE_MM = 1183, LHu_MM = 1184, LI16_MM = 1185, LI16_MMR6 = 1186, LL = 1187, LLD = 1188, LLD_R6 = 1189, LLE = 1190, LLE_MM = 1191, LLE_MMR6 = 1192, LL_MM = 1193, LL_R6 = 1194, LOAD_ACC128 = 1195, LOAD_ACC64 = 1196, LOAD_ACC64DSP = 1197, LOAD_CCOND_DSP = 1198, LONG_BRANCH_ADDiu = 1199, LONG_BRANCH_DADDiu = 1200, LONG_BRANCH_LUi = 1201, LSA = 1202, LSA_MMR6 = 1203, LSA_R6 = 1204, LUI_MMR6 = 1205, LUXC1 = 1206, LUXC164 = 1207, LUXC1_MM = 1208, LUi = 1209, LUi64 = 1210, LUi_MM = 1211, LW = 1212, LW16_MM = 1213, LW64 = 1214, LWC1 = 1215, LWC1_MM = 1216, LWC2 = 1217, LWC2_R6 = 1218, LWC3 = 1219, LWE = 1220, LWE_MM = 1221, LWE_MMR6 = 1222, LWGP_MM = 1223, LWL = 1224, LWL64 = 1225, LWLE = 1226, LWLE_MM = 1227, LWL_MM = 1228, LWM16_MM = 1229, LWM16_MMR6 = 1230, LWM32_MM = 1231, LWM_MM = 1232, LWPC = 1233, LWPC_MMR6 = 1234, LWP_MM = 1235, LWR = 1236, LWR64 = 1237, LWRE = 1238, LWRE_MM = 1239, LWR_MM = 1240, LWSP_MM = 1241, LWUPC = 1242, LWU_MM = 1243, LWX = 1244, LWXC1 = 1245, LWXC1_MM = 1246, LWXS_MM = 1247, LWX_MM = 1248, LW_MM = 1249, LW_MMR6 = 1250, LWu = 1251, LbRxRyOffMemX16 = 1252, LbuRxRyOffMemX16 = 1253, LhRxRyOffMemX16 = 1254, LhuRxRyOffMemX16 = 1255, LiRxImm16 = 1256, LiRxImmAlignX16 = 1257, LiRxImmX16 = 1258, LoadAddrImm32 = 1259, LoadAddrImm64 = 1260, LoadAddrReg32 = 1261, LoadAddrReg64 = 1262, LoadImm32 = 1263, LoadImm64 = 1264, LwConstant32 = 1265, LwRxPcTcp16 = 1266, LwRxPcTcpX16 = 1267, LwRxRyOffMemX16 = 1268, LwRxSpImmX16 = 1269, MADD = 1270, MADDF_D = 1271, MADDF_D_MMR6 = 1272, MADDF_S = 1273, MADDF_S_MMR6 = 1274, MADDR_Q_H = 1275, MADDR_Q_W = 1276, MADDU = 1277, MADDU_DSP = 1278, MADDU_DSP_MM = 1279, MADDU_MM = 1280, MADDV_B = 1281, MADDV_D = 1282, MADDV_H = 1283, MADDV_W = 1284, MADD_D32 = 1285, MADD_D32_MM = 1286, MADD_D64 = 1287, MADD_DSP = 1288, MADD_DSP_MM = 1289, MADD_MM = 1290, MADD_Q_H = 1291, MADD_Q_W = 1292, MADD_S = 1293, MADD_S_MM = 1294, MAQ_SA_W_PHL = 1295, MAQ_SA_W_PHL_MM = 1296, MAQ_SA_W_PHR = 1297, MAQ_SA_W_PHR_MM = 1298, MAQ_S_W_PHL = 1299, MAQ_S_W_PHL_MM = 1300, MAQ_S_W_PHR = 1301, MAQ_S_W_PHR_MM = 1302, MAXA_D = 1303, MAXA_D_MMR6 = 1304, MAXA_S = 1305, MAXA_S_MMR6 = 1306, MAXI_S_B = 1307, MAXI_S_D = 1308, MAXI_S_H = 1309, MAXI_S_W = 1310, MAXI_U_B = 1311, MAXI_U_D = 1312, MAXI_U_H = 1313, MAXI_U_W = 1314, MAX_A_B = 1315, MAX_A_D = 1316, MAX_A_H = 1317, MAX_A_W = 1318, MAX_D = 1319, MAX_D_MMR6 = 1320, MAX_S = 1321, MAX_S_B = 1322, MAX_S_D = 1323, MAX_S_H = 1324, MAX_S_MMR6 = 1325, MAX_S_W = 1326, MAX_U_B = 1327, MAX_U_D = 1328, MAX_U_H = 1329, MAX_U_W = 1330, MFC0 = 1331, MFC1 = 1332, MFC1_MM = 1333, MFC2 = 1334, MFHC1_D32 = 1335, MFHC1_D64 = 1336, MFHC1_MM = 1337, MFHI = 1338, MFHI16_MM = 1339, MFHI64 = 1340, MFHI_DSP = 1341, MFHI_DSP_MM = 1342, MFHI_MM = 1343, MFLO = 1344, MFLO16_MM = 1345, MFLO64 = 1346, MFLO_DSP = 1347, MFLO_DSP_MM = 1348, MFLO_MM = 1349, MINA_D = 1350, MINA_D_MMR6 = 1351, MINA_S = 1352, MINA_S_MMR6 = 1353, MINI_S_B = 1354, MINI_S_D = 1355, MINI_S_H = 1356, MINI_S_W = 1357, MINI_U_B = 1358, MINI_U_D = 1359, MINI_U_H = 1360, MINI_U_W = 1361, MIN_A_B = 1362, MIN_A_D = 1363, MIN_A_H = 1364, MIN_A_W = 1365, MIN_D = 1366, MIN_D_MMR6 = 1367, MIN_S = 1368, MIN_S_B = 1369, MIN_S_D = 1370, MIN_S_H = 1371, MIN_S_MMR6 = 1372, MIN_S_W = 1373, MIN_U_B = 1374, MIN_U_D = 1375, MIN_U_H = 1376, MIN_U_W = 1377, MIPSeh_return32 = 1378, MIPSeh_return64 = 1379, MOD = 1380, MODSUB = 1381, MODU = 1382, MODU_MMR6 = 1383, MOD_MMR6 = 1384, MOD_S_B = 1385, MOD_S_D = 1386, MOD_S_H = 1387, MOD_S_W = 1388, MOD_U_B = 1389, MOD_U_D = 1390, MOD_U_H = 1391, MOD_U_W = 1392, MOVE16_MM = 1393, MOVE16_MMR6 = 1394, MOVEP_MM = 1395, MOVE_V = 1396, MOVF_D32 = 1397, MOVF_D32_MM = 1398, MOVF_D64 = 1399, MOVF_I = 1400, MOVF_I64 = 1401, MOVF_I_MM = 1402, MOVF_S = 1403, MOVF_S_MM = 1404, MOVN_I64_D64 = 1405, MOVN_I64_I = 1406, MOVN_I64_I64 = 1407, MOVN_I64_S = 1408, MOVN_I_D32 = 1409, MOVN_I_D32_MM = 1410, MOVN_I_D64 = 1411, MOVN_I_I = 1412, MOVN_I_I64 = 1413, MOVN_I_MM = 1414, MOVN_I_S = 1415, MOVN_I_S_MM = 1416, MOVT_D32 = 1417, MOVT_D32_MM = 1418, MOVT_D64 = 1419, MOVT_I = 1420, MOVT_I64 = 1421, MOVT_I_MM = 1422, MOVT_S = 1423, MOVT_S_MM = 1424, MOVZ_I64_D64 = 1425, MOVZ_I64_I = 1426, MOVZ_I64_I64 = 1427, MOVZ_I64_S = 1428, MOVZ_I_D32 = 1429, MOVZ_I_D32_MM = 1430, MOVZ_I_D64 = 1431, MOVZ_I_I = 1432, MOVZ_I_I64 = 1433, MOVZ_I_MM = 1434, MOVZ_I_S = 1435, MOVZ_I_S_MM = 1436, MSUB = 1437, MSUBF_D = 1438, MSUBF_D_MMR6 = 1439, MSUBF_S = 1440, MSUBF_S_MMR6 = 1441, MSUBR_Q_H = 1442, MSUBR_Q_W = 1443, MSUBU = 1444, MSUBU_DSP = 1445, MSUBU_DSP_MM = 1446, MSUBU_MM = 1447, MSUBV_B = 1448, MSUBV_D = 1449, MSUBV_H = 1450, MSUBV_W = 1451, MSUB_D32 = 1452, MSUB_D32_MM = 1453, MSUB_D64 = 1454, MSUB_DSP = 1455, MSUB_DSP_MM = 1456, MSUB_MM = 1457, MSUB_Q_H = 1458, MSUB_Q_W = 1459, MSUB_S = 1460, MSUB_S_MM = 1461, MTC0 = 1462, MTC1 = 1463, MTC1_MM = 1464, MTC2 = 1465, MTHC1_D32 = 1466, MTHC1_D64 = 1467, MTHC1_MM = 1468, MTHI = 1469, MTHI64 = 1470, MTHI_DSP = 1471, MTHI_DSP_MM = 1472, MTHI_MM = 1473, MTHLIP = 1474, MTHLIP_MM = 1475, MTLO = 1476, MTLO64 = 1477, MTLO_DSP = 1478, MTLO_DSP_MM = 1479, MTLO_MM = 1480, MTM0 = 1481, MTM1 = 1482, MTM2 = 1483, MTP0 = 1484, MTP1 = 1485, MTP2 = 1486, MUH = 1487, MUHU = 1488, MUHU_MMR6 = 1489, MUH_MMR6 = 1490, MUL = 1491, MULEQ_S_W_PHL = 1492, MULEQ_S_W_PHL_MM = 1493, MULEQ_S_W_PHR = 1494, MULEQ_S_W_PHR_MM = 1495, MULEU_S_PH_QBL = 1496, MULEU_S_PH_QBL_MM = 1497, MULEU_S_PH_QBR = 1498, MULEU_S_PH_QBR_MM = 1499, MULQ_RS_PH = 1500, MULQ_RS_PH_MM = 1501, MULQ_RS_W = 1502, MULQ_RS_W_MMR2 = 1503, MULQ_S_PH = 1504, MULQ_S_PH_MMR2 = 1505, MULQ_S_W = 1506, MULQ_S_W_MMR2 = 1507, MULR_Q_H = 1508, MULR_Q_W = 1509, MULSAQ_S_W_PH = 1510, MULSA_W_PH = 1511, MULT = 1512, MULTU_DSP = 1513, MULTU_DSP_MM = 1514, MULT_DSP = 1515, MULT_DSP_MM = 1516, MULT_MM = 1517, MULTu = 1518, MULTu_MM = 1519, MULU = 1520, MULU_MMR6 = 1521, MULV_B = 1522, MULV_D = 1523, MULV_H = 1524, MULV_W = 1525, MUL_MM = 1526, MUL_MMR6 = 1527, MUL_PH = 1528, MUL_PH_MMR2 = 1529, MUL_Q_H = 1530, MUL_Q_W = 1531, MUL_R6 = 1532, MUL_S_PH = 1533, MUL_S_PH_MMR2 = 1534, Mfhi16 = 1535, Mflo16 = 1536, Move32R16 = 1537, MoveR3216 = 1538, MultRxRy16 = 1539, MultRxRyRz16 = 1540, MultuRxRy16 = 1541, MultuRxRyRz16 = 1542, NLOC_B = 1543, NLOC_D = 1544, NLOC_H = 1545, NLOC_W = 1546, NLZC_B = 1547, NLZC_D = 1548, NLZC_H = 1549, NLZC_W = 1550, NMADD_D32 = 1551, NMADD_D32_MM = 1552, NMADD_D64 = 1553, NMADD_S = 1554, NMADD_S_MM = 1555, NMSUB_D32 = 1556, NMSUB_D32_MM = 1557, NMSUB_D64 = 1558, NMSUB_S = 1559, NMSUB_S_MM = 1560, NOP = 1561, NOR = 1562, NOR64 = 1563, NORI_B = 1564, NORImm = 1565, NOR_MM = 1566, NOR_MMR6 = 1567, NOR_V = 1568, NOR_V_D_PSEUDO = 1569, NOR_V_H_PSEUDO = 1570, NOR_V_W_PSEUDO = 1571, NOT16_MM = 1572, NOT16_MMR6 = 1573, NegRxRy16 = 1574, NotRxRy16 = 1575, OR = 1576, OR16_MM = 1577, OR16_MMR6 = 1578, OR64 = 1579, ORI_B = 1580, ORI_MMR6 = 1581, OR_MM = 1582, OR_MMR6 = 1583, OR_V = 1584, OR_V_D_PSEUDO = 1585, OR_V_H_PSEUDO = 1586, OR_V_W_PSEUDO = 1587, ORi = 1588, ORi64 = 1589, ORi_MM = 1590, OrRxRxRy16 = 1591, PACKRL_PH = 1592, PACKRL_PH_MM = 1593, PAUSE = 1594, PAUSE_MM = 1595, PAUSE_MMR6 = 1596, PCKEV_B = 1597, PCKEV_D = 1598, PCKEV_H = 1599, PCKEV_W = 1600, PCKOD_B = 1601, PCKOD_D = 1602, PCKOD_H = 1603, PCKOD_W = 1604, PCNT_B = 1605, PCNT_D = 1606, PCNT_H = 1607, PCNT_W = 1608, PICK_PH = 1609, PICK_PH_MM = 1610, PICK_QB = 1611, PICK_QB_MM = 1612, POP = 1613, PRECEQU_PH_QBL = 1614, PRECEQU_PH_QBLA = 1615, PRECEQU_PH_QBLA_MM = 1616, PRECEQU_PH_QBL_MM = 1617, PRECEQU_PH_QBR = 1618, PRECEQU_PH_QBRA = 1619, PRECEQU_PH_QBRA_MM = 1620, PRECEQU_PH_QBR_MM = 1621, PRECEQ_W_PHL = 1622, PRECEQ_W_PHL_MM = 1623, PRECEQ_W_PHR = 1624, PRECEQ_W_PHR_MM = 1625, PRECEU_PH_QBL = 1626, PRECEU_PH_QBLA = 1627, PRECEU_PH_QBLA_MM = 1628, PRECEU_PH_QBL_MM = 1629, PRECEU_PH_QBR = 1630, PRECEU_PH_QBRA = 1631, PRECEU_PH_QBRA_MM = 1632, PRECEU_PH_QBR_MM = 1633, PRECRQU_S_QB_PH = 1634, PRECRQU_S_QB_PH_MM = 1635, PRECRQ_PH_W = 1636, PRECRQ_PH_W_MM = 1637, PRECRQ_QB_PH = 1638, PRECRQ_QB_PH_MM = 1639, PRECRQ_RS_PH_W = 1640, PRECRQ_RS_PH_W_MM = 1641, PRECR_QB_PH = 1642, PRECR_QB_PH_MMR2 = 1643, PRECR_SRA_PH_W = 1644, PRECR_SRA_PH_W_MMR2 = 1645, PRECR_SRA_R_PH_W = 1646, PRECR_SRA_R_PH_W_MMR2 = 1647, PREF = 1648, PREFE = 1649, PREFE_MM = 1650, PREFE_MMR6 = 1651, PREFX_MM = 1652, PREF_MM = 1653, PREF_MMR6 = 1654, PREF_R6 = 1655, PREPEND = 1656, PREPEND_MMR2 = 1657, PseudoCMPU_EQ_QB = 1658, PseudoCMPU_LE_QB = 1659, PseudoCMPU_LT_QB = 1660, PseudoCMP_EQ_PH = 1661, PseudoCMP_LE_PH = 1662, PseudoCMP_LT_PH = 1663, PseudoCVT_D32_W = 1664, PseudoCVT_D64_L = 1665, PseudoCVT_D64_W = 1666, PseudoCVT_S_L = 1667, PseudoCVT_S_W = 1668, PseudoDMULT = 1669, PseudoDMULTu = 1670, PseudoDSDIV = 1671, PseudoDUDIV = 1672, PseudoIndirectBranch = 1673, PseudoIndirectBranch64 = 1674, PseudoMADD = 1675, PseudoMADDU = 1676, PseudoMFHI = 1677, PseudoMFHI64 = 1678, PseudoMFLO = 1679, PseudoMFLO64 = 1680, PseudoMSUB = 1681, PseudoMSUBU = 1682, PseudoMTLOHI = 1683, PseudoMTLOHI64 = 1684, PseudoMTLOHI_DSP = 1685, PseudoMULT = 1686, PseudoMULTu = 1687, PseudoPICK_PH = 1688, PseudoPICK_QB = 1689, PseudoReturn = 1690, PseudoReturn64 = 1691, PseudoSDIV = 1692, PseudoSELECTFP_F_D32 = 1693, PseudoSELECTFP_F_D64 = 1694, PseudoSELECTFP_F_I = 1695, PseudoSELECTFP_F_I64 = 1696, PseudoSELECTFP_F_S = 1697, PseudoSELECTFP_T_D32 = 1698, PseudoSELECTFP_T_D64 = 1699, PseudoSELECTFP_T_I = 1700, PseudoSELECTFP_T_I64 = 1701, PseudoSELECTFP_T_S = 1702, PseudoSELECT_D32 = 1703, PseudoSELECT_D64 = 1704, PseudoSELECT_I = 1705, PseudoSELECT_I64 = 1706, PseudoSELECT_S = 1707, PseudoUDIV = 1708, RADDU_W_QB = 1709, RADDU_W_QB_MM = 1710, RDDSP = 1711, RDDSP_MM = 1712, RDHWR = 1713, RDHWR64 = 1714, RDHWR_MM = 1715, RDHWR_MMR6 = 1716, RDPGPR_MMR6 = 1717, RECIP_D_MMR6 = 1718, RECIP_S_MMR6 = 1719, REPLV_PH = 1720, REPLV_PH_MM = 1721, REPLV_QB = 1722, REPLV_QB_MM = 1723, REPL_PH = 1724, REPL_PH_MM = 1725, REPL_QB = 1726, REPL_QB_MM = 1727, RINT_D = 1728, RINT_D_MMR6 = 1729, RINT_S = 1730, RINT_S_MMR6 = 1731, ROL = 1732, ROLImm = 1733, ROR = 1734, RORImm = 1735, ROTR = 1736, ROTRV = 1737, ROTRV_MM = 1738, ROTR_MM = 1739, ROUND_L_D64 = 1740, ROUND_L_D_MMR6 = 1741, ROUND_L_S = 1742, ROUND_L_S_MMR6 = 1743, ROUND_W_D32 = 1744, ROUND_W_D64 = 1745, ROUND_W_D_MMR6 = 1746, ROUND_W_MM = 1747, ROUND_W_S = 1748, ROUND_W_S_MM = 1749, ROUND_W_S_MMR6 = 1750, RSQRT_D_MMR6 = 1751, RSQRT_S_MMR6 = 1752, Restore16 = 1753, RestoreX16 = 1754, RetRA = 1755, RetRA16 = 1756, SAT_S_B = 1757, SAT_S_D = 1758, SAT_S_H = 1759, SAT_S_W = 1760, SAT_U_B = 1761, SAT_U_D = 1762, SAT_U_H = 1763, SAT_U_W = 1764, SB = 1765, SB16_MM = 1766, SB16_MMR6 = 1767, SB64 = 1768, SBE = 1769, SBE_MM = 1770, SBE_MMR6 = 1771, SB_MM = 1772, SB_MMR6 = 1773, SC = 1774, SCD = 1775, SCD_R6 = 1776, SCE = 1777, SCE_MM = 1778, SCE_MMR6 = 1779, SC_MM = 1780, SC_R6 = 1781, SD = 1782, SDBBP = 1783, SDBBP16_MM = 1784, SDBBP16_MMR6 = 1785, SDBBP_MM = 1786, SDBBP_MMR6 = 1787, SDBBP_R6 = 1788, SDC1 = 1789, SDC164 = 1790, SDC1_MM = 1791, SDC2 = 1792, SDC2_R6 = 1793, SDC3 = 1794, SDIV = 1795, SDIV_MM = 1796, SDL = 1797, SDR = 1798, SDXC1 = 1799, SDXC164 = 1800, SDivMacro = 1801, SEB = 1802, SEB64 = 1803, SEB_MM = 1804, SEB_MMR6 = 1805, SEH = 1806, SEH64 = 1807, SEH_MM = 1808, SEH_MMR6 = 1809, SELENZ_D_MMR6 = 1810, SELENZ_S_MMR6 = 1811, SELEQZ = 1812, SELEQZ64 = 1813, SELEQZ_D = 1814, SELEQZ_D_MMR6 = 1815, SELEQZ_MMR6 = 1816, SELEQZ_S = 1817, SELEQZ_S_MMR6 = 1818, SELNEZ = 1819, SELNEZ64 = 1820, SELNEZ_D = 1821, SELNEZ_MMR6 = 1822, SELNEZ_S = 1823, SEL_D = 1824, SEL_D_MMR6 = 1825, SEL_S = 1826, SEL_S_MMR6 = 1827, SEQ = 1828, SEQi = 1829, SH = 1830, SH16_MM = 1831, SH16_MMR6 = 1832, SH64 = 1833, SHE = 1834, SHE_MM = 1835, SHE_MMR6 = 1836, SHF_B = 1837, SHF_H = 1838, SHF_W = 1839, SHILO = 1840, SHILOV = 1841, SHILOV_MM = 1842, SHILO_MM = 1843, SHLLV_PH = 1844, SHLLV_PH_MM = 1845, SHLLV_QB = 1846, SHLLV_QB_MM = 1847, SHLLV_S_PH = 1848, SHLLV_S_PH_MM = 1849, SHLLV_S_W = 1850, SHLLV_S_W_MM = 1851, SHLL_PH = 1852, SHLL_PH_MM = 1853, SHLL_QB = 1854, SHLL_QB_MM = 1855, SHLL_S_PH = 1856, SHLL_S_PH_MM = 1857, SHLL_S_W = 1858, SHLL_S_W_MM = 1859, SHRAV_PH = 1860, SHRAV_PH_MM = 1861, SHRAV_QB = 1862, SHRAV_QB_MMR2 = 1863, SHRAV_R_PH = 1864, SHRAV_R_PH_MM = 1865, SHRAV_R_QB = 1866, SHRAV_R_QB_MMR2 = 1867, SHRAV_R_W = 1868, SHRAV_R_W_MM = 1869, SHRA_PH = 1870, SHRA_PH_MM = 1871, SHRA_QB = 1872, SHRA_QB_MMR2 = 1873, SHRA_R_PH = 1874, SHRA_R_PH_MM = 1875, SHRA_R_QB = 1876, SHRA_R_QB_MMR2 = 1877, SHRA_R_W = 1878, SHRA_R_W_MM = 1879, SHRLV_PH = 1880, SHRLV_PH_MMR2 = 1881, SHRLV_QB = 1882, SHRLV_QB_MM = 1883, SHRL_PH = 1884, SHRL_PH_MMR2 = 1885, SHRL_QB = 1886, SHRL_QB_MM = 1887, SH_MM = 1888, SH_MMR6 = 1889, SLDI_B = 1890, SLDI_D = 1891, SLDI_H = 1892, SLDI_W = 1893, SLD_B = 1894, SLD_D = 1895, SLD_H = 1896, SLD_W = 1897, SLL = 1898, SLL16_MM = 1899, SLL16_MMR6 = 1900, SLL64_32 = 1901, SLL64_64 = 1902, SLLI_B = 1903, SLLI_D = 1904, SLLI_H = 1905, SLLI_W = 1906, SLLV = 1907, SLLV_MM = 1908, SLL_B = 1909, SLL_D = 1910, SLL_H = 1911, SLL_MM = 1912, SLL_MMR6 = 1913, SLL_W = 1914, SLT = 1915, SLT64 = 1916, SLT_MM = 1917, SLTi = 1918, SLTi64 = 1919, SLTi_MM = 1920, SLTiu = 1921, SLTiu64 = 1922, SLTiu_MM = 1923, SLTu = 1924, SLTu64 = 1925, SLTu_MM = 1926, SNE = 1927, SNEi = 1928, SNZ_B_PSEUDO = 1929, SNZ_D_PSEUDO = 1930, SNZ_H_PSEUDO = 1931, SNZ_V_PSEUDO = 1932, SNZ_W_PSEUDO = 1933, SPLATI_B = 1934, SPLATI_D = 1935, SPLATI_H = 1936, SPLATI_W = 1937, SPLAT_B = 1938, SPLAT_D = 1939, SPLAT_H = 1940, SPLAT_W = 1941, SQRT_D_MMR6 = 1942, SQRT_S_MMR6 = 1943, SRA = 1944, SRAI_B = 1945, SRAI_D = 1946, SRAI_H = 1947, SRAI_W = 1948, SRARI_B = 1949, SRARI_D = 1950, SRARI_H = 1951, SRARI_W = 1952, SRAR_B = 1953, SRAR_D = 1954, SRAR_H = 1955, SRAR_W = 1956, SRAV = 1957, SRAV_MM = 1958, SRA_B = 1959, SRA_D = 1960, SRA_H = 1961, SRA_MM = 1962, SRA_W = 1963, SRL = 1964, SRL16_MM = 1965, SRL16_MMR6 = 1966, SRLI_B = 1967, SRLI_D = 1968, SRLI_H = 1969, SRLI_W = 1970, SRLRI_B = 1971, SRLRI_D = 1972, SRLRI_H = 1973, SRLRI_W = 1974, SRLR_B = 1975, SRLR_D = 1976, SRLR_H = 1977, SRLR_W = 1978, SRLV = 1979, SRLV_MM = 1980, SRL_B = 1981, SRL_D = 1982, SRL_H = 1983, SRL_MM = 1984, SRL_W = 1985, SSNOP = 1986, SSNOP_MM = 1987, SSNOP_MMR6 = 1988, STORE_ACC128 = 1989, STORE_ACC64 = 1990, STORE_ACC64DSP = 1991, STORE_CCOND_DSP = 1992, ST_B = 1993, ST_D = 1994, ST_H = 1995, ST_W = 1996, SUB = 1997, SUBQH_PH = 1998, SUBQH_PH_MMR2 = 1999, SUBQH_R_PH = 2000, SUBQH_R_PH_MMR2 = 2001, SUBQH_R_W = 2002, SUBQH_R_W_MMR2 = 2003, SUBQH_W = 2004, SUBQH_W_MMR2 = 2005, SUBQ_PH = 2006, SUBQ_PH_MM = 2007, SUBQ_S_PH = 2008, SUBQ_S_PH_MM = 2009, SUBQ_S_W = 2010, SUBQ_S_W_MM = 2011, SUBSUS_U_B = 2012, SUBSUS_U_D = 2013, SUBSUS_U_H = 2014, SUBSUS_U_W = 2015, SUBSUU_S_B = 2016, SUBSUU_S_D = 2017, SUBSUU_S_H = 2018, SUBSUU_S_W = 2019, SUBS_S_B = 2020, SUBS_S_D = 2021, SUBS_S_H = 2022, SUBS_S_W = 2023, SUBS_U_B = 2024, SUBS_U_D = 2025, SUBS_U_H = 2026, SUBS_U_W = 2027, SUBU16_MM = 2028, SUBU16_MMR6 = 2029, SUBUH_QB = 2030, SUBUH_QB_MMR2 = 2031, SUBUH_R_QB = 2032, SUBUH_R_QB_MMR2 = 2033, SUBU_MMR6 = 2034, SUBU_PH = 2035, SUBU_PH_MMR2 = 2036, SUBU_QB = 2037, SUBU_QB_MM = 2038, SUBU_S_PH = 2039, SUBU_S_PH_MMR2 = 2040, SUBU_S_QB = 2041, SUBU_S_QB_MM = 2042, SUBVI_B = 2043, SUBVI_D = 2044, SUBVI_H = 2045, SUBVI_W = 2046, SUBV_B = 2047, SUBV_D = 2048, SUBV_H = 2049, SUBV_W = 2050, SUB_MM = 2051, SUB_MMR6 = 2052, SUBu = 2053, SUBu_MM = 2054, SUXC1 = 2055, SUXC164 = 2056, SUXC1_MM = 2057, SW = 2058, SW16_MM = 2059, SW16_MMR6 = 2060, SW64 = 2061, SWC1 = 2062, SWC1_MM = 2063, SWC2 = 2064, SWC2_R6 = 2065, SWC3 = 2066, SWE = 2067, SWE_MM = 2068, SWE_MMR6 = 2069, SWL = 2070, SWL64 = 2071, SWLE = 2072, SWLE_MM = 2073, SWL_MM = 2074, SWM16_MM = 2075, SWM16_MMR6 = 2076, SWM32_MM = 2077, SWM_MM = 2078, SWP_MM = 2079, SWR = 2080, SWR64 = 2081, SWRE = 2082, SWRE_MM = 2083, SWR_MM = 2084, SWSP_MM = 2085, SWSP_MMR6 = 2086, SWXC1 = 2087, SWXC1_MM = 2088, SW_MM = 2089, SW_MMR6 = 2090, SYNC = 2091, SYNCI = 2092, SYNCI_MMR6 = 2093, SYNC_MM = 2094, SYNC_MMR6 = 2095, SYSCALL = 2096, SYSCALL_MM = 2097, SZ_B_PSEUDO = 2098, SZ_D_PSEUDO = 2099, SZ_H_PSEUDO = 2100, SZ_V_PSEUDO = 2101, SZ_W_PSEUDO = 2102, Save16 = 2103, SaveX16 = 2104, SbRxRyOffMemX16 = 2105, SebRx16 = 2106, SehRx16 = 2107, SelBeqZ = 2108, SelBneZ = 2109, SelTBteqZCmp = 2110, SelTBteqZCmpi = 2111, SelTBteqZSlt = 2112, SelTBteqZSlti = 2113, SelTBteqZSltiu = 2114, SelTBteqZSltu = 2115, SelTBtneZCmp = 2116, SelTBtneZCmpi = 2117, SelTBtneZSlt = 2118, SelTBtneZSlti = 2119, SelTBtneZSltiu = 2120, SelTBtneZSltu = 2121, ShRxRyOffMemX16 = 2122, SllX16 = 2123, SllvRxRy16 = 2124, SltCCRxRy16 = 2125, SltRxRy16 = 2126, SltiCCRxImmX16 = 2127, SltiRxImm16 = 2128, SltiRxImmX16 = 2129, SltiuCCRxImmX16 = 2130, SltiuRxImm16 = 2131, SltiuRxImmX16 = 2132, SltuCCRxRy16 = 2133, SltuRxRy16 = 2134, SltuRxRyRz16 = 2135, SraX16 = 2136, SravRxRy16 = 2137, SrlX16 = 2138, SrlvRxRy16 = 2139, SubuRxRyRz16 = 2140, SwRxRyOffMemX16 = 2141, SwRxSpImmX16 = 2142, TAILCALL = 2143, TAILCALL64_R = 2144, TAILCALL_R = 2145, TEQ = 2146, TEQI = 2147, TEQI_MM = 2148, TEQ_MM = 2149, TGE = 2150, TGEI = 2151, TGEIU = 2152, TGEIU_MM = 2153, TGEI_MM = 2154, TGEU = 2155, TGEU_MM = 2156, TGE_MM = 2157, TLBINV = 2158, TLBINVF = 2159, TLBP = 2160, TLBP_MM = 2161, TLBR = 2162, TLBR_MM = 2163, TLBWI = 2164, TLBWI_MM = 2165, TLBWR = 2166, TLBWR_MM = 2167, TLT = 2168, TLTI = 2169, TLTIU_MM = 2170, TLTI_MM = 2171, TLTU = 2172, TLTU_MM = 2173, TLT_MM = 2174, TNE = 2175, TNEI = 2176, TNEI_MM = 2177, TNE_MM = 2178, TRAP = 2179, TRUNC_L_D64 = 2180, TRUNC_L_D_MMR6 = 2181, TRUNC_L_S = 2182, TRUNC_L_S_MMR6 = 2183, TRUNC_W_D32 = 2184, TRUNC_W_D64 = 2185, TRUNC_W_D_MMR6 = 2186, TRUNC_W_MM = 2187, TRUNC_W_S = 2188, TRUNC_W_S_MM = 2189, TRUNC_W_S_MMR6 = 2190, TTLTIU = 2191, UDIV = 2192, UDIV_MM = 2193, UDivMacro = 2194, Ulh = 2195, Ulhu = 2196, Ulw = 2197, V3MULU = 2198, VMM0 = 2199, VMULU = 2200, VSHF_B = 2201, VSHF_D = 2202, VSHF_H = 2203, VSHF_W = 2204, WAIT = 2205, WAIT_MM = 2206, WAIT_MMR6 = 2207, WRDSP = 2208, WRDSP_MM = 2209, WRPGPR_MMR6 = 2210, WSBH = 2211, WSBH_MM = 2212, WSBH_MMR6 = 2213, XOR = 2214, XOR16_MM = 2215, XOR16_MMR6 = 2216, XOR64 = 2217, XORI_B = 2218, XORI_MMR6 = 2219, XOR_MM = 2220, XOR_MMR6 = 2221, XOR_V = 2222, XOR_V_D_PSEUDO = 2223, XOR_V_H_PSEUDO = 2224, XOR_V_W_PSEUDO = 2225, XORi = 2226, XORi64 = 2227, XORi_MM = 2228, XorRxRxRy16 = 2229, INSTRUCTION_LIST_END = 2230 }; namespace Sched { enum { NoInstrModel = 0, IIPseudo = 1, II_ABS = 2, II_ADDU = 3, II_ADDIU = 4, II_AND = 5, II_ANDI = 6, IIM16Alu = 7, II_B = 8, II_BADDU = 9, II_BCCZAL = 10, II_BBIT = 11, II_BC = 12, II_BC1F = 13, II_BC1FL = 14, II_BC1T = 15, II_BC1TL = 16, II_BCC = 17, II_BCCZ = 18, II_BCCZC = 19, II_BCCZALS = 20, II_CEIL = 21, II_CFC1 = 22, II_CLO = 23, II_CLZ = 24, II_CTC1 = 25, II_CVT = 26, II_C_CC_D = 27, II_C_CC_S = 28, II_DADD = 29, II_DADDIU = 30, II_DADDU = 31, II_EXT = 32, II_INS = 33, II_DMFC1 = 34, II_DMTC1 = 35, II_DMUL = 36, II_DMULT = 37, II_DMULTU = 38, II_POP = 39, II_DROTR = 40, II_DROTR32 = 41, II_DROTRV = 42, II_DDIV = 43, II_DSLL = 44, II_DSLL32 = 45, II_DSLLV = 46, II_DSRA = 47, II_DSRA32 = 48, II_DSRAV = 49, II_DSRL = 50, II_DSRL32 = 51, II_DSRLV = 52, II_DSUB = 53, II_DSUBU = 54, II_DDIVU = 55, II_ADD_D = 56, II_ADD_S = 57, II_DIV_D = 58, II_DIV_S = 59, II_FLOOR = 60, II_MOV_D = 61, II_MOV_S = 62, II_MUL_D = 63, II_MUL_S = 64, II_NEG = 65, II_SQRT_D = 66, II_SQRT_S = 67, II_SUB_D = 68, II_SUB_S = 69, II_J = 70, II_JAL = 71, II_JALR = 72, II_JALRS = 73, II_JALS = 74, II_JR = 75, II_JRADDIUSP = 76, II_JRC = 77, II_JALRC = 78, II_LB = 79, II_LBU = 80, II_LD = 81, II_LDC1 = 82, II_LDL = 83, II_LDR = 84, II_LDXC1 = 85, II_LH = 86, II_LHU = 87, II_LUI = 88, II_LUXC1 = 89, II_LW = 90, II_LWC1 = 91, II_LWL = 92, II_LWR = 93, II_LWU = 94, II_LWXC1 = 95, II_MADD = 96, II_MADDU = 97, II_MADD_D = 98, II_MADD_S = 99, II_MFC1 = 100, II_MFHC1 = 101, II_MFHI_MFLO = 102, II_MOVF_D = 103, II_MOVF = 104, II_MOVF_S = 105, II_MOVN_D = 106, II_MOVN = 107, II_MOVN_S = 108, II_MOVT_D = 109, II_MOVT = 110, II_MOVT_S = 111, II_MOVZ_D = 112, II_MOVZ = 113, II_MOVZ_S = 114, II_MSUB = 115, II_MSUBU = 116, II_MSUB_D = 117, II_MSUB_S = 118, II_MTC1 = 119, II_MTHC1 = 120, II_MTHI_MTLO = 121, II_MUL = 122, II_MULT = 123, II_MULTU = 124, II_NMADD_D = 125, II_NMADD_S = 126, II_NMSUB_D = 127, II_NMSUB_S = 128, II_NOR = 129, II_OR = 130, II_ORI = 131, II_IndirectBranchPseudo = 132, II_ReturnPseudo = 133, II_DIV = 134, II_DIVU = 135, II_RDHWR = 136, II_ROUND = 137, II_ROTR = 138, II_ROTRV = 139, II_TRUNC = 140, II_RESTORE = 141, II_SB = 142, II_SD = 143, II_SDC1 = 144, II_SDL = 145, II_SDR = 146, II_SDXC1 = 147, II_SEB = 148, II_SEH = 149, II_SEQ_SNE = 150, II_SEQI_SNEI = 151, II_SH = 152, II_SLL = 153, II_SLLV = 154, II_SLT_SLTU = 155, II_SLTI_SLTIU = 156, II_SRA = 157, II_SRAV = 158, II_SRL = 159, II_SRLV = 160, II_SUBU = 161, II_SUXC1 = 162, II_SW = 163, II_SWC1 = 164, II_SWL = 165, II_SWR = 166, II_SWXC1 = 167, II_SAVE = 168, II_WSBH = 169, II_XOR = 170, II_XORI = 171, ADD_A_B_ADD_A_D_ADD_A_H_ADD_A_W = 172, ADDS_A_B_ADDS_A_D_ADDS_A_H_ADDS_A_W_ADDS_S_B_ADDS_S_D_ADDS_S_H_ADDS_S_W_ADDS_U_B_ADDS_U_D_ADDS_U_H_ADDS_U_W = 173, ADDVI_B_ADDVI_D_ADDVI_H_ADDVI_W_ADDV_B_ADDV_D_ADDV_H_ADDV_W = 174, ASUB_S_B_ASUB_S_D_ASUB_S_H_ASUB_S_W_ASUB_U_B_ASUB_U_D_ASUB_U_H_ASUB_U_W = 175, AVER_S_B_AVER_S_D_AVER_S_H_AVER_S_W_AVER_U_B_AVER_U_D_AVER_U_H_AVER_U_W_AVE_S_B_AVE_S_D_AVE_S_H_AVE_S_W_AVE_U_B_AVE_U_D_AVE_U_H_AVE_U_W = 176, MOVE_V = 177, LDI_B_LDI_D_LDI_H_LDI_W = 178, AND_V_NOR_V_OR_V_XOR_V = 179, ANDI_B_NORI_B_ORI_B_XORI_B = 180, ST_B_ST_D_ST_H_ST_W = 181, LD_B_LD_D_LD_H_LD_W = 182, SCHED_LIST_END = 183 }; } // end Sched namespace } // end Mips namespace } // end llvm namespace #endif // GET_INSTRINFO_ENUM /*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ |* *| |* Target Instruction Descriptors *| |* *| |* Automatically generated file, do not edit! *| |* *| \*===----------------------------------------------------------------------===*/ #ifdef GET_INSTRINFO_MC_DESC #undef GET_INSTRINFO_MC_DESC namespace llvm_ks { static const MCPhysReg ImplicitList1[] = { Mips::DSPOutFlag20, 0 }; static const MCPhysReg ImplicitList2[] = { Mips::DSPCarry, 0 }; static const MCPhysReg ImplicitList3[] = { Mips::SP, 0 }; static const MCPhysReg ImplicitList4[] = { Mips::AT, 0 }; static const MCPhysReg ImplicitList5[] = { Mips::RA, 0 }; static const MCPhysReg ImplicitList6[] = { Mips::DSPPos, 0 }; static const MCPhysReg ImplicitList7[] = { Mips::T8, 0 }; static const MCPhysReg ImplicitList8[] = { Mips::DSPCCond, 0 }; static const MCPhysReg ImplicitList9[] = { Mips::HI0, Mips::LO0, Mips::P0, Mips::P1, Mips::P2, 0 }; static const MCPhysReg ImplicitList10[] = { Mips::HI0_64, Mips::LO0_64, 0 }; static const MCPhysReg ImplicitList11[] = { Mips::DSPOutFlag16_19, 0 }; static const MCPhysReg ImplicitList12[] = { Mips::HI0, Mips::LO0, 0 }; static const MCPhysReg ImplicitList13[] = { Mips::DSPEFI, 0 }; static const MCPhysReg ImplicitList14[] = { Mips::DSPPos, Mips::DSPEFI, 0 }; static const MCPhysReg ImplicitList15[] = { Mips::DSPOutFlag23, 0 }; static const MCPhysReg ImplicitList16[] = { Mips::FCC0, 0 }; static const MCPhysReg ImplicitList17[] = { Mips::DSPPos, Mips::DSPSCount, 0 }; static const MCPhysReg ImplicitList18[] = { Mips::AC0, 0 }; static const MCPhysReg ImplicitList19[] = { Mips::AC0_64, 0 }; static const MCPhysReg ImplicitList20[] = { Mips::V0, Mips::V1, 0 }; static const MCPhysReg ImplicitList21[] = { Mips::HI0, 0 }; static const MCPhysReg ImplicitList22[] = { Mips::HI0_64, 0 }; static const MCPhysReg ImplicitList23[] = { Mips::LO0, 0 }; static const MCPhysReg ImplicitList24[] = { Mips::LO0_64, 0 }; static const MCPhysReg ImplicitList25[] = { Mips::MPL0, Mips::P0, Mips::P1, Mips::P2, 0 }; static const MCPhysReg ImplicitList26[] = { Mips::MPL1, Mips::P0, Mips::P1, Mips::P2, 0 }; static const MCPhysReg ImplicitList27[] = { Mips::MPL2, Mips::P0, Mips::P1, Mips::P2, 0 }; static const MCPhysReg ImplicitList28[] = { Mips::P0, 0 }; static const MCPhysReg ImplicitList29[] = { Mips::P1, 0 }; static const MCPhysReg ImplicitList30[] = { Mips::P2, 0 }; static const MCPhysReg ImplicitList31[] = { Mips::DSPOutFlag21, 0 }; static const MCPhysReg ImplicitList32[] = { Mips::DSPOutFlag22, 0 }; static const MCPhysReg ImplicitList33[] = { Mips::P0, Mips::P1, Mips::P2, 0 }; static const MCPhysReg ImplicitList34[] = { Mips::MPL1, Mips::MPL2, Mips::P0, Mips::P1, Mips::P2, 0 }; static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, }; static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, }; static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<InitMCInstrInfo(MipsInsts, NULL, NULL, 2230); } } // end llvm namespace #endif // GET_INSTRINFO_MC_DESC #ifdef GET_INSTRINFO_HEADER #undef GET_INSTRINFO_HEADER namespace llvm_ks { struct MipsGenInstrInfo : public TargetInstrInfo { explicit MipsGenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1); ~MipsGenInstrInfo() override {} }; } // end llvm namespace #endif // GET_INSTRINFO_HEADER #ifdef GET_INSTRINFO_OPERAND_ENUM #undef GET_INSTRINFO_OPERAND_ENUM namespace llvm_ks { namespace Mips { namespace OpName { enum { OPERAND_LAST }; } // end namespace OpName } // end namespace Mips } // end namespace llvm_ks #endif //GET_INSTRINFO_OPERAND_ENUM #ifdef GET_INSTRINFO_NAMED_OPS #undef GET_INSTRINFO_NAMED_OPS namespace llvm_ks { namespace Mips { LLVM_READONLY int16_t getNamedOperandIdx(uint16_t Opcode, uint16_t NamedIdx) { return -1; } } // end namespace Mips } // end namespace llvm_ks #endif //GET_INSTRINFO_NAMED_OPS #ifdef GET_INSTRINFO_OPERAND_TYPES_ENUM #undef GET_INSTRINFO_OPERAND_TYPES_ENUM namespace llvm_ks { namespace Mips { namespace OpTypes { enum OperandType { InvertedImOperand = 0, InvertedImOperand64 = 1, PtrRC = 2, brtarget = 3, brtarget10_mm = 4, brtarget21 = 5, brtarget26 = 6, brtarget26_mm = 7, brtarget7_mm = 8, brtarget_mm = 9, calloffset16 = 10, calltarget = 11, calltarget_mm = 12, condcode = 13, cpinst_operand = 14, f32imm = 15, f64imm = 16, i16imm = 17, i1imm = 18, i32imm = 19, i64imm = 20, i8imm = 21, imm32 = 22, imm64 = 23, jmpoffset16 = 24, jmptarget = 25, jmptarget_mm = 26, li_simm7 = 27, mem = 28, mem16 = 29, mem16_ea = 30, mem_ea = 31, mem_mm_12 = 32, mem_mm_16 = 33, mem_mm_4 = 34, mem_mm_4_lsl1 = 35, mem_mm_4_lsl2 = 36, mem_mm_4sp = 37, mem_mm_9 = 38, mem_mm_gp_imm7_lsl2 = 39, mem_mm_sp_imm5_lsl2 = 40, mem_msa = 41, mem_simm11 = 42, mem_simm16 = 43, mem_simm9 = 44, mem_simm9gpr = 45, movep_regpair = 46, pcrel16 = 47, reglist = 48, reglist16 = 49, regpair = 50, simm10 = 51, simm10_64 = 52, simm11 = 53, simm12 = 54, simm16 = 55, simm16_64 = 56, simm18_lsl3 = 57, simm19_lsl2 = 58, simm20 = 59, simm23_lsl2 = 60, simm32 = 61, simm3_lsa2 = 62, simm4 = 63, simm5 = 64, simm6 = 65, simm7 = 66, simm9 = 67, simm9_addiusp = 68, size_ins = 69, uimm1 = 70, uimm10 = 71, uimm16 = 72, uimm16_64 = 73, uimm16_64_relaxed = 74, uimm16_relaxed = 75, uimm2 = 76, uimm20 = 77, uimm2_plus1 = 78, uimm3 = 79, uimm3_shift = 80, uimm4 = 81, uimm4_andi = 82, uimm4_ptr = 83, uimm5 = 84, uimm5_64 = 85, uimm5_64_report_uimm6 = 86, uimm5_lsl2 = 87, uimm5_plus1 = 88, uimm5_plus32 = 89, uimm5_plus32_normalize = 90, uimm5_plus32_normalize_64 = 91, uimm5_plus33 = 92, uimm6 = 93, uimm6_lsl2 = 94, uimm6_ptr = 95, uimm7 = 96, uimm8 = 97, uimmz = 98, vsplat_simm10 = 99, vsplat_simm5 = 100, vsplat_uimm1 = 101, vsplat_uimm2 = 102, vsplat_uimm3 = 103, vsplat_uimm4 = 104, vsplat_uimm5 = 105, vsplat_uimm6 = 106, vsplat_uimm8 = 107, OPERAND_TYPE_LIST_END }; } // end namespace OpTypes } // end namespace Mips } // end namespace llvm_ks #endif // GET_INSTRINFO_OPERAND_TYPES_ENUM #ifdef GET_INSTRMAP_INFO #undef GET_INSTRMAP_INFO namespace llvm_ks { namespace Mips { enum Arch { Arch_dsp, Arch_mmdsp, Arch_mipsr6, Arch_micromipsr6, Arch_se, Arch_micromips }; // Dsp2MicroMips LLVM_READONLY int Dsp2MicroMips(uint16_t Opcode, enum Arch inArch) { static const uint16_t Dsp2MicroMipsTable[][3] = { { Mips::ABSQ_S_PH, Mips::ABSQ_S_PH, Mips::ABSQ_S_PH_MM }, { Mips::ABSQ_S_QB, Mips::ABSQ_S_QB, Mips::ABSQ_S_QB_MMR2 }, { Mips::ABSQ_S_W, Mips::ABSQ_S_W, Mips::ABSQ_S_W_MM }, { Mips::ADDQH_PH, Mips::ADDQH_PH, Mips::ADDQH_PH_MMR2 }, { Mips::ADDQH_R_PH, Mips::ADDQH_R_PH, Mips::ADDQH_R_PH_MMR2 }, { Mips::ADDQH_R_W, Mips::ADDQH_R_W, Mips::ADDQH_R_W_MMR2 }, { Mips::ADDQH_W, Mips::ADDQH_W, Mips::ADDQH_W_MMR2 }, { Mips::ADDQ_PH, Mips::ADDQ_PH, Mips::ADDQ_PH_MM }, { Mips::ADDQ_S_PH, Mips::ADDQ_S_PH, Mips::ADDQ_S_PH_MM }, { Mips::ADDQ_S_W, Mips::ADDQ_S_W, Mips::ADDQ_S_W_MM }, { Mips::ADDSC, Mips::ADDSC, Mips::ADDSC_MM }, { Mips::ADDUH_QB, Mips::ADDUH_QB, Mips::ADDUH_QB_MMR2 }, { Mips::ADDUH_R_QB, Mips::ADDUH_R_QB, Mips::ADDUH_R_QB_MMR2 }, { Mips::ADDU_PH, Mips::ADDU_PH, Mips::ADDU_PH_MMR2 }, { Mips::ADDU_QB, Mips::ADDU_QB, Mips::ADDU_QB_MM }, { Mips::ADDU_S_PH, Mips::ADDU_S_PH, Mips::ADDU_S_PH_MMR2 }, { Mips::ADDU_S_QB, Mips::ADDU_S_QB, Mips::ADDU_S_QB_MM }, { Mips::ADDWC, Mips::ADDWC, Mips::ADDWC_MM }, { Mips::DPAQX_SA_W_PH, Mips::DPAQX_SA_W_PH, Mips::DPAQX_SA_W_PH_MMR2 }, { Mips::DPAQX_S_W_PH, Mips::DPAQX_S_W_PH, Mips::DPAQX_S_W_PH_MMR2 }, { Mips::DPAQ_SA_L_W, Mips::DPAQ_SA_L_W, Mips::DPAQ_SA_L_W_MM }, { Mips::DPAQ_S_W_PH, Mips::DPAQ_S_W_PH, Mips::DPAQ_S_W_PH_MM }, { Mips::DPAU_H_QBL, Mips::DPAU_H_QBL, Mips::DPAU_H_QBL_MM }, { Mips::DPAU_H_QBR, Mips::DPAU_H_QBR, Mips::DPAU_H_QBR_MM }, { Mips::DPAX_W_PH, Mips::DPAX_W_PH, Mips::DPAX_W_PH_MMR2 }, { Mips::DPA_W_PH, Mips::DPA_W_PH, Mips::DPA_W_PH_MMR2 }, { Mips::DPSQX_SA_W_PH, Mips::DPSQX_SA_W_PH, Mips::DPSQX_SA_W_PH_MMR2 }, { Mips::DPSQX_S_W_PH, Mips::DPSQX_S_W_PH, Mips::DPSQX_S_W_PH_MMR2 }, { Mips::DPSQ_SA_L_W, Mips::DPSQ_SA_L_W, Mips::DPSQ_SA_L_W_MM }, { Mips::DPSQ_S_W_PH, Mips::DPSQ_S_W_PH, Mips::DPSQ_S_W_PH_MM }, { Mips::DPSU_H_QBL, Mips::DPSU_H_QBL, Mips::DPSU_H_QBL_MM }, { Mips::DPSU_H_QBR, Mips::DPSU_H_QBR, Mips::DPSU_H_QBR_MM }, { Mips::DPSX_W_PH, Mips::DPSX_W_PH, Mips::DPSX_W_PH_MMR2 }, { Mips::DPS_W_PH, Mips::DPS_W_PH, Mips::DPS_W_PH_MMR2 }, { Mips::EXTP, Mips::EXTP, Mips::EXTP_MM }, { Mips::EXTPDP, Mips::EXTPDP, Mips::EXTPDP_MM }, { Mips::EXTPDPV, Mips::EXTPDPV, Mips::EXTPDPV_MM }, { Mips::EXTPV, Mips::EXTPV, Mips::EXTPV_MM }, { Mips::EXTRV_RS_W, Mips::EXTRV_RS_W, Mips::EXTRV_RS_W_MM }, { Mips::EXTRV_R_W, Mips::EXTRV_R_W, Mips::EXTRV_R_W_MM }, { Mips::EXTRV_S_H, Mips::EXTRV_S_H, Mips::EXTRV_S_H_MM }, { Mips::EXTRV_W, Mips::EXTRV_W, Mips::EXTRV_W_MM }, { Mips::EXTR_RS_W, Mips::EXTR_RS_W, Mips::EXTR_RS_W_MM }, { Mips::EXTR_R_W, Mips::EXTR_R_W, Mips::EXTR_R_W_MM }, { Mips::EXTR_S_H, Mips::EXTR_S_H, Mips::EXTR_S_H_MM }, { Mips::EXTR_W, Mips::EXTR_W, Mips::EXTR_W_MM }, { Mips::INSV, Mips::INSV, Mips::INSV_MM }, { Mips::LBUX, Mips::LBUX, Mips::LBUX_MM }, { Mips::LHX, Mips::LHX, Mips::LHX_MM }, { Mips::LWX, Mips::LWX, Mips::LWX_MM }, { Mips::MADDU_DSP, Mips::MADDU_DSP, Mips::MADDU_DSP_MM }, { Mips::MADD_DSP, Mips::MADD_DSP, Mips::MADD_DSP_MM }, { Mips::MAQ_SA_W_PHL, Mips::MAQ_SA_W_PHL, Mips::MAQ_SA_W_PHL_MM }, { Mips::MAQ_SA_W_PHR, Mips::MAQ_SA_W_PHR, Mips::MAQ_SA_W_PHR_MM }, { Mips::MAQ_S_W_PHL, Mips::MAQ_S_W_PHL, Mips::MAQ_S_W_PHL_MM }, { Mips::MAQ_S_W_PHR, Mips::MAQ_S_W_PHR, Mips::MAQ_S_W_PHR_MM }, { Mips::MFHI_DSP, Mips::MFHI_DSP, Mips::MFHI_DSP_MM }, { Mips::MFLO_DSP, Mips::MFLO_DSP, Mips::MFLO_DSP_MM }, { Mips::MSUBU_DSP, Mips::MSUBU_DSP, Mips::MSUBU_DSP_MM }, { Mips::MSUB_DSP, Mips::MSUB_DSP, Mips::MSUB_DSP_MM }, { Mips::MTHI_DSP, Mips::MTHI_DSP, Mips::MTHI_DSP_MM }, { Mips::MTHLIP, Mips::MTHLIP, Mips::MTHLIP_MM }, { Mips::MTLO_DSP, Mips::MTLO_DSP, Mips::MTLO_DSP_MM }, { Mips::MULEQ_S_W_PHL, Mips::MULEQ_S_W_PHL, Mips::MULEQ_S_W_PHL_MM }, { Mips::MULEQ_S_W_PHR, Mips::MULEQ_S_W_PHR, Mips::MULEQ_S_W_PHR_MM }, { Mips::MULEU_S_PH_QBL, Mips::MULEU_S_PH_QBL, Mips::MULEU_S_PH_QBL_MM }, { Mips::MULEU_S_PH_QBR, Mips::MULEU_S_PH_QBR, Mips::MULEU_S_PH_QBR_MM }, { Mips::MULQ_RS_PH, Mips::MULQ_RS_PH, Mips::MULQ_RS_PH_MM }, { Mips::MULQ_RS_W, Mips::MULQ_RS_W, Mips::MULQ_RS_W_MMR2 }, { Mips::MULQ_S_PH, Mips::MULQ_S_PH, Mips::MULQ_S_PH_MMR2 }, { Mips::MULQ_S_W, Mips::MULQ_S_W, Mips::MULQ_S_W_MMR2 }, { Mips::MULTU_DSP, Mips::MULTU_DSP, Mips::MULTU_DSP_MM }, { Mips::MULT_DSP, Mips::MULT_DSP, Mips::MULT_DSP_MM }, { Mips::MUL_PH, Mips::MUL_PH, Mips::MUL_PH_MMR2 }, { Mips::MUL_S_PH, Mips::MUL_S_PH, Mips::MUL_S_PH_MMR2 }, { Mips::PACKRL_PH, Mips::PACKRL_PH, Mips::PACKRL_PH_MM }, { Mips::PICK_PH, Mips::PICK_PH, Mips::PICK_PH_MM }, { Mips::PICK_QB, Mips::PICK_QB, Mips::PICK_QB_MM }, { Mips::PRECEQU_PH_QBL, Mips::PRECEQU_PH_QBL, Mips::PRECEQU_PH_QBL_MM }, { Mips::PRECEQU_PH_QBLA, Mips::PRECEQU_PH_QBLA, Mips::PRECEQU_PH_QBLA_MM }, { Mips::PRECEQU_PH_QBR, Mips::PRECEQU_PH_QBR, Mips::PRECEQU_PH_QBR_MM }, { Mips::PRECEQU_PH_QBRA, Mips::PRECEQU_PH_QBRA, Mips::PRECEQU_PH_QBRA_MM }, { Mips::PRECEQ_W_PHL, Mips::PRECEQ_W_PHL, Mips::PRECEQ_W_PHL_MM }, { Mips::PRECEQ_W_PHR, Mips::PRECEQ_W_PHR, Mips::PRECEQ_W_PHR_MM }, { Mips::PRECEU_PH_QBL, Mips::PRECEU_PH_QBL, Mips::PRECEU_PH_QBL_MM }, { Mips::PRECEU_PH_QBLA, Mips::PRECEU_PH_QBLA, Mips::PRECEU_PH_QBLA_MM }, { Mips::PRECEU_PH_QBR, Mips::PRECEU_PH_QBR, Mips::PRECEU_PH_QBR_MM }, { Mips::PRECEU_PH_QBRA, Mips::PRECEU_PH_QBRA, Mips::PRECEU_PH_QBRA_MM }, { Mips::PRECRQU_S_QB_PH, Mips::PRECRQU_S_QB_PH, Mips::PRECRQU_S_QB_PH_MM }, { Mips::PRECRQ_PH_W, Mips::PRECRQ_PH_W, Mips::PRECRQ_PH_W_MM }, { Mips::PRECRQ_QB_PH, Mips::PRECRQ_QB_PH, Mips::PRECRQ_QB_PH_MM }, { Mips::PRECRQ_RS_PH_W, Mips::PRECRQ_RS_PH_W, Mips::PRECRQ_RS_PH_W_MM }, { Mips::PRECR_QB_PH, Mips::PRECR_QB_PH, Mips::PRECR_QB_PH_MMR2 }, { Mips::PRECR_SRA_PH_W, Mips::PRECR_SRA_PH_W, Mips::PRECR_SRA_PH_W_MMR2 }, { Mips::PRECR_SRA_R_PH_W, Mips::PRECR_SRA_R_PH_W, Mips::PRECR_SRA_R_PH_W_MMR2 }, { Mips::PREPEND, Mips::PREPEND, Mips::PREPEND_MMR2 }, { Mips::RADDU_W_QB, Mips::RADDU_W_QB, Mips::RADDU_W_QB_MM }, { Mips::RDDSP, Mips::RDDSP, Mips::RDDSP_MM }, { Mips::REPLV_PH, Mips::REPLV_PH, Mips::REPLV_PH_MM }, { Mips::REPLV_QB, Mips::REPLV_QB, Mips::REPLV_QB_MM }, { Mips::REPL_PH, Mips::REPL_PH, Mips::REPL_PH_MM }, { Mips::REPL_QB, Mips::REPL_QB, Mips::REPL_QB_MM }, { Mips::SHILO, Mips::SHILO, Mips::SHILO_MM }, { Mips::SHILOV, Mips::SHILOV, Mips::SHILOV_MM }, { Mips::SHLLV_PH, Mips::SHLLV_PH, Mips::SHLLV_PH_MM }, { Mips::SHLLV_QB, Mips::SHLLV_QB, Mips::SHLLV_QB_MM }, { Mips::SHLLV_S_PH, Mips::SHLLV_S_PH, Mips::SHLLV_S_PH_MM }, { Mips::SHLLV_S_W, Mips::SHLLV_S_W, Mips::SHLLV_S_W_MM }, { Mips::SHLL_PH, Mips::SHLL_PH, Mips::SHLL_PH_MM }, { Mips::SHLL_QB, Mips::SHLL_QB, Mips::SHLL_QB_MM }, { Mips::SHLL_S_PH, Mips::SHLL_S_PH, Mips::SHLL_S_PH_MM }, { Mips::SHLL_S_W, Mips::SHLL_S_W, Mips::SHLL_S_W_MM }, { Mips::SHRAV_PH, Mips::SHRAV_PH, Mips::SHRAV_PH_MM }, { Mips::SHRAV_QB, Mips::SHRAV_QB, Mips::SHRAV_QB_MMR2 }, { Mips::SHRAV_R_PH, Mips::SHRAV_R_PH, Mips::SHRAV_R_PH_MM }, { Mips::SHRAV_R_QB, Mips::SHRAV_R_QB, Mips::SHRAV_R_QB_MMR2 }, { Mips::SHRAV_R_W, Mips::SHRAV_R_W, Mips::SHRAV_R_W_MM }, { Mips::SHRA_PH, Mips::SHRA_PH, Mips::SHRA_PH_MM }, { Mips::SHRA_QB, Mips::SHRA_QB, Mips::SHRA_QB_MMR2 }, { Mips::SHRA_R_PH, Mips::SHRA_R_PH, Mips::SHRA_R_PH_MM }, { Mips::SHRA_R_QB, Mips::SHRA_R_QB, Mips::SHRA_R_QB_MMR2 }, { Mips::SHRA_R_W, Mips::SHRA_R_W, Mips::SHRA_R_W_MM }, { Mips::SHRLV_PH, Mips::SHRLV_PH, Mips::SHRLV_PH_MMR2 }, { Mips::SHRLV_QB, Mips::SHRLV_QB, Mips::SHRLV_QB_MM }, { Mips::SHRL_PH, Mips::SHRL_PH, Mips::SHRL_PH_MMR2 }, { Mips::SHRL_QB, Mips::SHRL_QB, Mips::SHRL_QB_MM }, { Mips::SUBQH_PH, Mips::SUBQH_PH, Mips::SUBQH_PH_MMR2 }, { Mips::SUBQH_R_PH, Mips::SUBQH_R_PH, Mips::SUBQH_R_PH_MMR2 }, { Mips::SUBQH_R_W, Mips::SUBQH_R_W, Mips::SUBQH_R_W_MMR2 }, { Mips::SUBQH_W, Mips::SUBQH_W, Mips::SUBQH_W_MMR2 }, { Mips::SUBQ_PH, Mips::SUBQ_PH, Mips::SUBQ_PH_MM }, { Mips::SUBQ_S_PH, Mips::SUBQ_S_PH, Mips::SUBQ_S_PH_MM }, { Mips::SUBQ_S_W, Mips::SUBQ_S_W, Mips::SUBQ_S_W_MM }, { Mips::SUBUH_QB, Mips::SUBUH_QB, Mips::SUBUH_QB_MMR2 }, { Mips::SUBUH_R_QB, Mips::SUBUH_R_QB, Mips::SUBUH_R_QB_MMR2 }, { Mips::SUBU_PH, Mips::SUBU_PH, Mips::SUBU_PH_MMR2 }, { Mips::SUBU_QB, Mips::SUBU_QB, Mips::SUBU_QB_MM }, { Mips::SUBU_S_PH, Mips::SUBU_S_PH, Mips::SUBU_S_PH_MMR2 }, { Mips::SUBU_S_QB, Mips::SUBU_S_QB, Mips::SUBU_S_QB_MM }, }; // End of Dsp2MicroMipsTable unsigned mid; unsigned start = 0; unsigned end = 139; while (start < end) { mid = start + (end - start)/2; if (Opcode == Dsp2MicroMipsTable[mid][0]) { break; } if (Opcode < Dsp2MicroMipsTable[mid][0]) end = mid; else start = mid + 1; } if (start == end) return -1; // Instruction doesn't exist in this table. if (inArch == Arch_dsp) return Dsp2MicroMipsTable[mid][1]; if (inArch == Arch_mmdsp) return Dsp2MicroMipsTable[mid][2]; return -1;} // MipsR62MicroMipsR6 LLVM_READONLY int MipsR62MicroMipsR6(uint16_t Opcode, enum Arch inArch) { static const uint16_t MipsR62MicroMipsR6Table[][3] = { { Mips::ADDIUPC, Mips::ADDIUPC, Mips::ADDIUPC_MMR6 }, { Mips::ALIGN, Mips::ALIGN, Mips::ALIGN_MMR6 }, { Mips::ALUIPC, Mips::ALUIPC, Mips::ALUIPC_MMR6 }, { Mips::AUI, Mips::AUI, Mips::AUI_MMR6 }, { Mips::AUIPC, Mips::AUIPC, Mips::AUIPC_MMR6 }, { Mips::BALC, Mips::BALC, Mips::BALC_MMR6 }, { Mips::BC, Mips::BC, Mips::BC_MMR6 }, { Mips::BEQZALC, Mips::BEQZALC, Mips::BEQZALC_MMR6 }, { Mips::BGEZALC, Mips::BGEZALC, Mips::BGEZALC_MMR6 }, { Mips::BGTZALC, Mips::BGTZALC, Mips::BGTZALC_MMR6 }, { Mips::BITSWAP, Mips::BITSWAP, Mips::BITSWAP_MMR6 }, { Mips::BLEZALC, Mips::BLEZALC, Mips::BLEZALC_MMR6 }, { Mips::BLTZALC, Mips::BLTZALC, Mips::BLTZALC_MMR6 }, { Mips::BNEZALC, Mips::BNEZALC, Mips::BNEZALC_MMR6 }, { Mips::CACHE_R6, Mips::CACHE_R6, Mips::CACHE_MMR6 }, { Mips::CLO_R6, Mips::CLO_R6, Mips::CLO_MMR6 }, { Mips::CLZ_R6, Mips::CLZ_R6, Mips::CLZ_MMR6 }, { Mips::DIV, Mips::DIV, Mips::DIV_MMR6 }, { Mips::DIVU, Mips::DIVU, Mips::DIVU_MMR6 }, { Mips::JIALC, Mips::JIALC, Mips::JIALC_MMR6 }, { Mips::JIC, Mips::JIC, Mips::JIC_MMR6 }, { Mips::LSA_R6, Mips::LSA_R6, Mips::LSA_MMR6 }, { Mips::LWPC, Mips::LWPC, Mips::LWPC_MMR6 }, { Mips::MOD, Mips::MOD, Mips::MOD_MMR6 }, { Mips::MODU, Mips::MODU, Mips::MODU_MMR6 }, { Mips::MUH, Mips::MUH, Mips::MUH_MMR6 }, { Mips::MUHU, Mips::MUHU, Mips::MUHU_MMR6 }, { Mips::MULU, Mips::MULU, Mips::MULU_MMR6 }, { Mips::MUL_R6, Mips::MUL_R6, Mips::MUL_MMR6 }, { Mips::PREF_R6, Mips::PREF_R6, Mips::PREF_MMR6 }, { Mips::SELEQZ, Mips::SELEQZ, Mips::SELEQZ_MMR6 }, { Mips::SELNEZ, Mips::SELNEZ, Mips::SELNEZ_MMR6 }, }; // End of MipsR62MicroMipsR6Table unsigned mid; unsigned start = 0; unsigned end = 32; while (start < end) { mid = start + (end - start)/2; if (Opcode == MipsR62MicroMipsR6Table[mid][0]) { break; } if (Opcode < MipsR62MicroMipsR6Table[mid][0]) end = mid; else start = mid + 1; } if (start == end) return -1; // Instruction doesn't exist in this table. if (inArch == Arch_mipsr6) return MipsR62MicroMipsR6Table[mid][1]; if (inArch == Arch_micromipsr6) return MipsR62MicroMipsR6Table[mid][2]; return -1;} // Std2MicroMips LLVM_READONLY int Std2MicroMips(uint16_t Opcode, enum Arch inArch) { static const uint16_t Std2MicroMipsTable[][3] = { { Mips::ADD, Mips::ADD, Mips::ADD_MM }, { Mips::ADDi, Mips::ADDi, Mips::ADDi_MM }, { Mips::ADDiu, Mips::ADDiu, Mips::ADDiu_MM }, { Mips::ADDu, Mips::ADDu, Mips::ADDu_MM }, { Mips::AND, Mips::AND, Mips::AND_MM }, { Mips::ANDi, Mips::ANDi, Mips::ANDi_MM }, { Mips::BC1F, Mips::BC1F, Mips::BC1F_MM }, { Mips::BC1FL, Mips::BC1FL, (uint16_t)-1U }, { Mips::BC1T, Mips::BC1T, Mips::BC1T_MM }, { Mips::BC1TL, Mips::BC1TL, (uint16_t)-1U }, { Mips::BEQ, Mips::BEQ, Mips::BEQ_MM }, { Mips::BEQL, Mips::BEQL, (uint16_t)-1U }, { Mips::BGEZ, Mips::BGEZ, Mips::BGEZ_MM }, { Mips::BGEZAL, Mips::BGEZAL, Mips::BGEZAL_MM }, { Mips::BGEZALL, Mips::BGEZALL, (uint16_t)-1U }, { Mips::BGEZL, Mips::BGEZL, (uint16_t)-1U }, { Mips::BGTZ, Mips::BGTZ, Mips::BGTZ_MM }, { Mips::BGTZL, Mips::BGTZL, (uint16_t)-1U }, { Mips::BLEZ, Mips::BLEZ, Mips::BLEZ_MM }, { Mips::BLEZL, Mips::BLEZL, (uint16_t)-1U }, { Mips::BLTZ, Mips::BLTZ, Mips::BLTZ_MM }, { Mips::BLTZAL, Mips::BLTZAL, Mips::BLTZAL_MM }, { Mips::BLTZALL, Mips::BLTZALL, (uint16_t)-1U }, { Mips::BLTZL, Mips::BLTZL, (uint16_t)-1U }, { Mips::BNE, Mips::BNE, Mips::BNE_MM }, { Mips::BNEL, Mips::BNEL, (uint16_t)-1U }, { Mips::BREAK, Mips::BREAK, Mips::BREAK_MM }, { Mips::CACHE, Mips::CACHE, Mips::CACHE_MM }, { Mips::CEIL_W_D32, Mips::CEIL_W_D32, Mips::CEIL_W_MM }, { Mips::CEIL_W_S, Mips::CEIL_W_S, Mips::CEIL_W_S_MM }, { Mips::CFC1, Mips::CFC1, Mips::CFC1_MM }, { Mips::CLO, Mips::CLO, Mips::CLO_MM }, { Mips::CLZ, Mips::CLZ, Mips::CLZ_MM }, { Mips::CTC1, Mips::CTC1, Mips::CTC1_MM }, { Mips::CVT_D32_S, Mips::CVT_D32_S, Mips::CVT_D_S_MM }, { Mips::CVT_D32_W, Mips::CVT_D32_W, Mips::CVT_D32_W_MM }, { Mips::CVT_L_D64, Mips::CVT_L_D64, Mips::CVT_L_D64_MM }, { Mips::CVT_L_S, Mips::CVT_L_S, Mips::CVT_L_S_MM }, { Mips::CVT_S_D32, Mips::CVT_S_D32, Mips::CVT_S_D32_MM }, { Mips::CVT_S_W, Mips::CVT_S_W, Mips::CVT_S_W_MM }, { Mips::CVT_W_D32, Mips::CVT_W_D32, Mips::CVT_W_MM }, { Mips::CVT_W_S, Mips::CVT_W_S, Mips::CVT_W_S_MM }, { Mips::DERET, Mips::DERET, Mips::DERET_MM }, { Mips::DI, Mips::DI, Mips::DI_MM }, { Mips::EHB, Mips::EHB, Mips::EHB_MM }, { Mips::EI, Mips::EI, Mips::EI_MM }, { Mips::ERET, Mips::ERET, Mips::ERET_MM }, { Mips::ERETNC, Mips::ERETNC, (uint16_t)-1U }, { Mips::EXT, Mips::EXT, Mips::EXT_MM }, { Mips::FABS_D32, Mips::FABS_D32, Mips::FABS_MM }, { Mips::FABS_S, Mips::FABS_S, Mips::FABS_S_MM }, { Mips::FADD_D32, Mips::FADD_D32, Mips::FADD_MM }, { Mips::FADD_S, Mips::FADD_S, Mips::FADD_S_MM }, { Mips::FCMP_D32, Mips::FCMP_D32, Mips::FCMP_D32_MM }, { Mips::FCMP_S32, Mips::FCMP_S32, Mips::FCMP_S32_MM }, { Mips::FDIV_D32, Mips::FDIV_D32, Mips::FDIV_MM }, { Mips::FDIV_S, Mips::FDIV_S, Mips::FDIV_S_MM }, { Mips::FLOOR_W_D32, Mips::FLOOR_W_D32, Mips::FLOOR_W_MM }, { Mips::FLOOR_W_S, Mips::FLOOR_W_S, Mips::FLOOR_W_S_MM }, { Mips::FMOV_D32, Mips::FMOV_D32, Mips::FMOV_D32_MM }, { Mips::FMOV_S, Mips::FMOV_S, Mips::FMOV_S_MM }, { Mips::FMUL_D32, Mips::FMUL_D32, Mips::FMUL_MM }, { Mips::FMUL_S, Mips::FMUL_S, Mips::FMUL_S_MM }, { Mips::FNEG_D32, Mips::FNEG_D32, Mips::FNEG_MM }, { Mips::FNEG_S, Mips::FNEG_S, Mips::FNEG_S_MM }, { Mips::FSQRT_D32, Mips::FSQRT_D32, Mips::FSQRT_MM }, { Mips::FSQRT_S, Mips::FSQRT_S, Mips::FSQRT_S_MM }, { Mips::FSUB_D32, Mips::FSUB_D32, Mips::FSUB_MM }, { Mips::FSUB_S, Mips::FSUB_S, Mips::FSUB_S_MM }, { Mips::INS, Mips::INS, Mips::INS_MM }, { Mips::J, Mips::J, Mips::J_MM }, { Mips::JAL, Mips::JAL, Mips::JAL_MM }, { Mips::JALX, Mips::JALX, Mips::JALX_MM }, { Mips::JR, Mips::JR, Mips::JR_MM }, { Mips::LB, Mips::LB, Mips::LB_MM }, { Mips::LBu, Mips::LBu, Mips::LBu_MM }, { Mips::LDC1, Mips::LDC1, Mips::LDC1_MM }, { Mips::LEA_ADDiu, Mips::LEA_ADDiu, Mips::LEA_ADDiu_MM }, { Mips::LH, Mips::LH, Mips::LH_MM }, { Mips::LHu, Mips::LHu, Mips::LHu_MM }, { Mips::LUXC1, Mips::LUXC1, Mips::LUXC1_MM }, { Mips::LUi, Mips::LUi, Mips::LUi_MM }, { Mips::LW, Mips::LW, Mips::LW_MM }, { Mips::LWC1, Mips::LWC1, Mips::LWC1_MM }, { Mips::LWXC1, Mips::LWXC1, Mips::LWXC1_MM }, { Mips::MADD, Mips::MADD, Mips::MADD_MM }, { Mips::MADDU, Mips::MADDU, Mips::MADDU_MM }, { Mips::MADD_D32, Mips::MADD_D32, Mips::MADD_D32_MM }, { Mips::MADD_S, Mips::MADD_S, Mips::MADD_S_MM }, { Mips::MFC1, Mips::MFC1, Mips::MFC1_MM }, { Mips::MFHC1_D32, Mips::MFHC1_D32, Mips::MFHC1_MM }, { Mips::MFHI, Mips::MFHI, Mips::MFHI_MM }, { Mips::MFLO, Mips::MFLO, Mips::MFLO_MM }, { Mips::MOVF_D32, Mips::MOVF_D32, Mips::MOVF_D32_MM }, { Mips::MOVF_I, Mips::MOVF_I, Mips::MOVF_I_MM }, { Mips::MOVF_S, Mips::MOVF_S, Mips::MOVF_S_MM }, { Mips::MOVN_I_D32, Mips::MOVN_I_D32, Mips::MOVN_I_D32_MM }, { Mips::MOVN_I_I, Mips::MOVN_I_I, Mips::MOVN_I_MM }, { Mips::MOVN_I_S, Mips::MOVN_I_S, Mips::MOVN_I_S_MM }, { Mips::MOVT_D32, Mips::MOVT_D32, Mips::MOVT_D32_MM }, { Mips::MOVT_I, Mips::MOVT_I, Mips::MOVT_I_MM }, { Mips::MOVT_S, Mips::MOVT_S, Mips::MOVT_S_MM }, { Mips::MOVZ_I_D32, Mips::MOVZ_I_D32, Mips::MOVZ_I_D32_MM }, { Mips::MOVZ_I_I, Mips::MOVZ_I_I, Mips::MOVZ_I_MM }, { Mips::MOVZ_I_S, Mips::MOVZ_I_S, Mips::MOVZ_I_S_MM }, { Mips::MSUB, Mips::MSUB, Mips::MSUB_MM }, { Mips::MSUBU, Mips::MSUBU, Mips::MSUBU_MM }, { Mips::MSUB_D32, Mips::MSUB_D32, Mips::MSUB_D32_MM }, { Mips::MSUB_S, Mips::MSUB_S, Mips::MSUB_S_MM }, { Mips::MTC1, Mips::MTC1, Mips::MTC1_MM }, { Mips::MTHC1_D32, Mips::MTHC1_D32, Mips::MTHC1_MM }, { Mips::MTHI, Mips::MTHI, Mips::MTHI_MM }, { Mips::MTLO, Mips::MTLO, Mips::MTLO_MM }, { Mips::MUL, Mips::MUL, Mips::MUL_MM }, { Mips::MULT, Mips::MULT, Mips::MULT_MM }, { Mips::MULTu, Mips::MULTu, Mips::MULTu_MM }, { Mips::NMADD_D32, Mips::NMADD_D32, Mips::NMADD_D32_MM }, { Mips::NMADD_S, Mips::NMADD_S, Mips::NMADD_S_MM }, { Mips::NMSUB_D32, Mips::NMSUB_D32, Mips::NMSUB_D32_MM }, { Mips::NMSUB_S, Mips::NMSUB_S, Mips::NMSUB_S_MM }, { Mips::NOR, Mips::NOR, Mips::NOR_MM }, { Mips::OR, Mips::OR, Mips::OR_MM }, { Mips::ORi, Mips::ORi, Mips::ORi_MM }, { Mips::PAUSE, Mips::PAUSE, Mips::PAUSE_MM }, { Mips::PREF, Mips::PREF, Mips::PREF_MM }, { Mips::RDHWR, Mips::RDHWR, Mips::RDHWR_MM }, { Mips::ROTR, Mips::ROTR, Mips::ROTR_MM }, { Mips::ROTRV, Mips::ROTRV, Mips::ROTRV_MM }, { Mips::ROUND_W_D32, Mips::ROUND_W_D32, Mips::ROUND_W_MM }, { Mips::ROUND_W_S, Mips::ROUND_W_S, Mips::ROUND_W_S_MM }, { Mips::SB, Mips::SB, Mips::SB_MM }, { Mips::SDBBP, Mips::SDBBP, Mips::SDBBP_MM }, { Mips::SDC1, Mips::SDC1, Mips::SDC1_MM }, { Mips::SDIV, Mips::SDIV, Mips::SDIV_MM }, { Mips::SEB, Mips::SEB, Mips::SEB_MM }, { Mips::SEH, Mips::SEH, Mips::SEH_MM }, { Mips::SH, Mips::SH, Mips::SH_MM }, { Mips::SLL, Mips::SLL, Mips::SLL_MM }, { Mips::SLLV, Mips::SLLV, Mips::SLLV_MM }, { Mips::SLT, Mips::SLT, Mips::SLT_MM }, { Mips::SLTi, Mips::SLTi, Mips::SLTi_MM }, { Mips::SLTiu, Mips::SLTiu, Mips::SLTiu_MM }, { Mips::SLTu, Mips::SLTu, Mips::SLTu_MM }, { Mips::SRA, Mips::SRA, Mips::SRA_MM }, { Mips::SRAV, Mips::SRAV, Mips::SRAV_MM }, { Mips::SRL, Mips::SRL, Mips::SRL_MM }, { Mips::SRLV, Mips::SRLV, Mips::SRLV_MM }, { Mips::SSNOP, Mips::SSNOP, Mips::SSNOP_MM }, { Mips::SUB, Mips::SUB, Mips::SUB_MM }, { Mips::SUBu, Mips::SUBu, Mips::SUBu_MM }, { Mips::SUXC1, Mips::SUXC1, Mips::SUXC1_MM }, { Mips::SW, Mips::SW, Mips::SW_MM }, { Mips::SWC1, Mips::SWC1, Mips::SWC1_MM }, { Mips::SWXC1, Mips::SWXC1, Mips::SWXC1_MM }, { Mips::SYNC, Mips::SYNC, Mips::SYNC_MM }, { Mips::SYNCI, Mips::SYNCI, (uint16_t)-1U }, { Mips::SYSCALL, Mips::SYSCALL, Mips::SYSCALL_MM }, { Mips::TEQ, Mips::TEQ, Mips::TEQ_MM }, { Mips::TEQI, Mips::TEQI, Mips::TEQI_MM }, { Mips::TGE, Mips::TGE, Mips::TGE_MM }, { Mips::TGEI, Mips::TGEI, Mips::TGEI_MM }, { Mips::TGEIU, Mips::TGEIU, Mips::TGEIU_MM }, { Mips::TGEU, Mips::TGEU, Mips::TGEU_MM }, { Mips::TLBP, Mips::TLBP, Mips::TLBP_MM }, { Mips::TLBR, Mips::TLBR, Mips::TLBR_MM }, { Mips::TLBWI, Mips::TLBWI, Mips::TLBWI_MM }, { Mips::TLBWR, Mips::TLBWR, Mips::TLBWR_MM }, { Mips::TLT, Mips::TLT, Mips::TLT_MM }, { Mips::TLTI, Mips::TLTI, Mips::TLTI_MM }, { Mips::TLTU, Mips::TLTU, Mips::TLTU_MM }, { Mips::TNE, Mips::TNE, Mips::TNE_MM }, { Mips::TNEI, Mips::TNEI, Mips::TNEI_MM }, { Mips::TRUNC_W_D32, Mips::TRUNC_W_D32, Mips::TRUNC_W_MM }, { Mips::TRUNC_W_S, Mips::TRUNC_W_S, Mips::TRUNC_W_S_MM }, { Mips::TTLTIU, Mips::TTLTIU, Mips::TLTIU_MM }, { Mips::UDIV, Mips::UDIV, Mips::UDIV_MM }, { Mips::WSBH, Mips::WSBH, Mips::WSBH_MM }, { Mips::XOR, Mips::XOR, Mips::XOR_MM }, { Mips::XORi, Mips::XORi, Mips::XORi_MM }, }; // End of Std2MicroMipsTable unsigned mid; unsigned start = 0; unsigned end = 179; while (start < end) { mid = start + (end - start)/2; if (Opcode == Std2MicroMipsTable[mid][0]) { break; } if (Opcode < Std2MicroMipsTable[mid][0]) end = mid; else start = mid + 1; } if (start == end) return -1; // Instruction doesn't exist in this table. if (inArch == Arch_se) return Std2MicroMipsTable[mid][1]; if (inArch == Arch_micromips) return Std2MicroMipsTable[mid][2]; return -1;} // Std2MicroMipsR6 LLVM_READONLY int Std2MicroMipsR6(uint16_t Opcode, enum Arch inArch) { static const uint16_t Std2MicroMipsR6Table[][3] = { { Mips::ADD, Mips::ADD, Mips::ADD_MMR6 }, { Mips::ADDiu, Mips::ADDiu, Mips::ADDIU_MMR6 }, { Mips::ADDu, Mips::ADDu, Mips::ADDU_MMR6 }, { Mips::AND, Mips::AND, Mips::AND_MMR6 }, { Mips::ANDi, Mips::ANDi, Mips::ANDI_MMR6 }, { Mips::BREAK, Mips::BREAK, Mips::BREAK_MMR6 }, { Mips::CEIL_W_D64, Mips::CEIL_W_D64, Mips::CEIL_W_D_MMR6 }, { Mips::CEIL_W_S, Mips::CEIL_W_S, Mips::CEIL_W_S_MMR6 }, { Mips::CVT_W_D64, Mips::CVT_W_D64, Mips::CVT_W_D_MMR6 }, { Mips::DI, Mips::DI, Mips::DI_MMR6 }, { Mips::EI, Mips::EI, Mips::EI_MMR6 }, { Mips::FLOOR_W_D64, Mips::FLOOR_W_D64, Mips::FLOOR_W_D_MMR6 }, { Mips::FLOOR_W_S, Mips::FLOOR_W_S, Mips::FLOOR_W_S_MMR6 }, { Mips::FSQRT_S, Mips::FSQRT_S, Mips::SQRT_S_MMR6 }, { Mips::LW, Mips::LW, Mips::LW_MMR6 }, { Mips::NOR, Mips::NOR, Mips::NOR_MMR6 }, { Mips::OR, Mips::OR, Mips::OR_MMR6 }, { Mips::ORi, Mips::ORi, Mips::ORI_MMR6 }, { Mips::PAUSE, Mips::PAUSE, Mips::PAUSE_MMR6 }, { Mips::ROUND_W_D64, Mips::ROUND_W_D64, Mips::ROUND_W_D_MMR6 }, { Mips::ROUND_W_S, Mips::ROUND_W_S, Mips::ROUND_W_S_MMR6 }, { Mips::SB, Mips::SB, Mips::SB_MMR6 }, { Mips::SEB, Mips::SEB, Mips::SEB_MMR6 }, { Mips::SEH, Mips::SEH, Mips::SEH_MMR6 }, { Mips::SSNOP, Mips::SSNOP, Mips::SSNOP_MMR6 }, { Mips::SYNC, Mips::SYNC, Mips::SYNC_MMR6 }, { Mips::SYNCI, Mips::SYNCI, Mips::SYNCI_MMR6 }, { Mips::TRUNC_W_D64, Mips::TRUNC_W_D64, Mips::TRUNC_W_D_MMR6 }, { Mips::TRUNC_W_S, Mips::TRUNC_W_S, Mips::TRUNC_W_S_MMR6 }, { Mips::XOR, Mips::XOR, Mips::XOR_MMR6 }, { Mips::XORi, Mips::XORi, Mips::XORI_MMR6 }, }; // End of Std2MicroMipsR6Table unsigned mid; unsigned start = 0; unsigned end = 31; while (start < end) { mid = start + (end - start)/2; if (Opcode == Std2MicroMipsR6Table[mid][0]) { break; } if (Opcode < Std2MicroMipsR6Table[mid][0]) end = mid; else start = mid + 1; } if (start == end) return -1; // Instruction doesn't exist in this table. if (inArch == Arch_se) return Std2MicroMipsR6Table[mid][1]; if (inArch == Arch_micromipsr6) return Std2MicroMipsR6Table[mid][2]; return -1;} } // End Mips namespace } // End llvm namespace #endif // GET_INSTRMAP_INFO