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keystone/llvm/lib/Target/X86/X86GenInstrInfo.inc

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/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* Target Instruction Enum Values *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
#ifdef GET_INSTRINFO_ENUM
#undef GET_INSTRINFO_ENUM
namespace llvm_ks {
namespace X86 {
enum {
PHI = 0,
INLINEASM = 1,
CFI_INSTRUCTION = 2,
EH_LABEL = 3,
GC_LABEL = 4,
KILL = 5,
EXTRACT_SUBREG = 6,
INSERT_SUBREG = 7,
IMPLICIT_DEF = 8,
SUBREG_TO_REG = 9,
COPY_TO_REGCLASS = 10,
DBG_VALUE = 11,
REG_SEQUENCE = 12,
COPY = 13,
BUNDLE = 14,
LIFETIME_START = 15,
LIFETIME_END = 16,
STACKMAP = 17,
PATCHPOINT = 18,
LOAD_STACK_GUARD = 19,
STATEPOINT = 20,
LOCAL_ESCAPE = 21,
FAULTING_LOAD_OP = 22,
G_ADD = 23,
AAA = 24,
AAD8i8 = 25,
AAM8i8 = 26,
AAS = 27,
ABS_F = 28,
ABS_Fp32 = 29,
ABS_Fp64 = 30,
ABS_Fp80 = 31,
ACQUIRE_MOV16rm = 32,
ACQUIRE_MOV32rm = 33,
ACQUIRE_MOV64rm = 34,
ACQUIRE_MOV8rm = 35,
ADC16i16 = 36,
ADC16mi = 37,
ADC16mi8 = 38,
ADC16mr = 39,
ADC16ri = 40,
ADC16ri8 = 41,
ADC16rm = 42,
ADC16rr = 43,
ADC16rr_REV = 44,
ADC32i32 = 45,
ADC32mi = 46,
ADC32mi8 = 47,
ADC32mr = 48,
ADC32ri = 49,
ADC32ri8 = 50,
ADC32rm = 51,
ADC32rr = 52,
ADC32rr_REV = 53,
ADC64i32 = 54,
ADC64mi32 = 55,
ADC64mi8 = 56,
ADC64mr = 57,
ADC64ri32 = 58,
ADC64ri8 = 59,
ADC64rm = 60,
ADC64rr = 61,
ADC64rr_REV = 62,
ADC8i8 = 63,
ADC8mi = 64,
ADC8mi8 = 65,
ADC8mr = 66,
ADC8ri = 67,
ADC8ri8 = 68,
ADC8rm = 69,
ADC8rr = 70,
ADC8rr_REV = 71,
ADCX32rm = 72,
ADCX32rr = 73,
ADCX64rm = 74,
ADCX64rr = 75,
ADD16i16 = 76,
ADD16mi = 77,
ADD16mi8 = 78,
ADD16mr = 79,
ADD16ri = 80,
ADD16ri8 = 81,
ADD16ri8_DB = 82,
ADD16ri_DB = 83,
ADD16rm = 84,
ADD16rr = 85,
ADD16rr_DB = 86,
ADD16rr_REV = 87,
ADD32i32 = 88,
ADD32mi = 89,
ADD32mi8 = 90,
ADD32mr = 91,
ADD32ri = 92,
ADD32ri8 = 93,
ADD32ri8_DB = 94,
ADD32ri_DB = 95,
ADD32rm = 96,
ADD32rr = 97,
ADD32rr_DB = 98,
ADD32rr_REV = 99,
ADD64i32 = 100,
ADD64mi32 = 101,
ADD64mi8 = 102,
ADD64mr = 103,
ADD64ri32 = 104,
ADD64ri32_DB = 105,
ADD64ri8 = 106,
ADD64ri8_DB = 107,
ADD64rm = 108,
ADD64rr = 109,
ADD64rr_DB = 110,
ADD64rr_REV = 111,
ADD8i8 = 112,
ADD8mi = 113,
ADD8mi8 = 114,
ADD8mr = 115,
ADD8ri = 116,
ADD8ri8 = 117,
ADD8rm = 118,
ADD8rr = 119,
ADD8rr_REV = 120,
ADDPDrm = 121,
ADDPDrr = 122,
ADDPSrm = 123,
ADDPSrr = 124,
ADDSDrm = 125,
ADDSDrm_Int = 126,
ADDSDrr = 127,
ADDSDrr_Int = 128,
ADDSSrm = 129,
ADDSSrm_Int = 130,
ADDSSrr = 131,
ADDSSrr_Int = 132,
ADDSUBPDrm = 133,
ADDSUBPDrr = 134,
ADDSUBPSrm = 135,
ADDSUBPSrr = 136,
ADD_F32m = 137,
ADD_F64m = 138,
ADD_FI16m = 139,
ADD_FI32m = 140,
ADD_FPrST0 = 141,
ADD_FST0r = 142,
ADD_Fp32 = 143,
ADD_Fp32m = 144,
ADD_Fp64 = 145,
ADD_Fp64m = 146,
ADD_Fp64m32 = 147,
ADD_Fp80 = 148,
ADD_Fp80m32 = 149,
ADD_Fp80m64 = 150,
ADD_FpI16m32 = 151,
ADD_FpI16m64 = 152,
ADD_FpI16m80 = 153,
ADD_FpI32m32 = 154,
ADD_FpI32m64 = 155,
ADD_FpI32m80 = 156,
ADD_FrST0 = 157,
ADJCALLSTACKDOWN32 = 158,
ADJCALLSTACKDOWN64 = 159,
ADJCALLSTACKUP32 = 160,
ADJCALLSTACKUP64 = 161,
ADOX32rm = 162,
ADOX32rr = 163,
ADOX64rm = 164,
ADOX64rr = 165,
AESDECLASTrm = 166,
AESDECLASTrr = 167,
AESDECrm = 168,
AESDECrr = 169,
AESENCLASTrm = 170,
AESENCLASTrr = 171,
AESENCrm = 172,
AESENCrr = 173,
AESIMCrm = 174,
AESIMCrr = 175,
AESKEYGENASSIST128rm = 176,
AESKEYGENASSIST128rr = 177,
AND16i16 = 178,
AND16mi = 179,
AND16mi8 = 180,
AND16mr = 181,
AND16ri = 182,
AND16ri8 = 183,
AND16rm = 184,
AND16rr = 185,
AND16rr_REV = 186,
AND32i32 = 187,
AND32mi = 188,
AND32mi8 = 189,
AND32mr = 190,
AND32ri = 191,
AND32ri8 = 192,
AND32rm = 193,
AND32rr = 194,
AND32rr_REV = 195,
AND64i32 = 196,
AND64mi32 = 197,
AND64mi8 = 198,
AND64mr = 199,
AND64ri32 = 200,
AND64ri8 = 201,
AND64rm = 202,
AND64rr = 203,
AND64rr_REV = 204,
AND8i8 = 205,
AND8mi = 206,
AND8mi8 = 207,
AND8mr = 208,
AND8ri = 209,
AND8ri8 = 210,
AND8rm = 211,
AND8rr = 212,
AND8rr_REV = 213,
ANDN32rm = 214,
ANDN32rr = 215,
ANDN64rm = 216,
ANDN64rr = 217,
ANDNPDrm = 218,
ANDNPDrr = 219,
ANDNPSrm = 220,
ANDNPSrr = 221,
ANDPDrm = 222,
ANDPDrr = 223,
ANDPSrm = 224,
ANDPSrr = 225,
ARPL16mr = 226,
ARPL16rr = 227,
AVX2_SETALLONES = 228,
AVX512_512_SET0 = 229,
AVX_SET0 = 230,
BEXTR32rm = 231,
BEXTR32rr = 232,
BEXTR64rm = 233,
BEXTR64rr = 234,
BEXTRI32mi = 235,
BEXTRI32ri = 236,
BEXTRI64mi = 237,
BEXTRI64ri = 238,
BLCFILL32rm = 239,
BLCFILL32rr = 240,
BLCFILL64rm = 241,
BLCFILL64rr = 242,
BLCI32rm = 243,
BLCI32rr = 244,
BLCI64rm = 245,
BLCI64rr = 246,
BLCIC32rm = 247,
BLCIC32rr = 248,
BLCIC64rm = 249,
BLCIC64rr = 250,
BLCMSK32rm = 251,
BLCMSK32rr = 252,
BLCMSK64rm = 253,
BLCMSK64rr = 254,
BLCS32rm = 255,
BLCS32rr = 256,
BLCS64rm = 257,
BLCS64rr = 258,
BLENDPDrmi = 259,
BLENDPDrri = 260,
BLENDPSrmi = 261,
BLENDPSrri = 262,
BLENDVPDrm0 = 263,
BLENDVPDrr0 = 264,
BLENDVPSrm0 = 265,
BLENDVPSrr0 = 266,
BLSFILL32rm = 267,
BLSFILL32rr = 268,
BLSFILL64rm = 269,
BLSFILL64rr = 270,
BLSI32rm = 271,
BLSI32rr = 272,
BLSI64rm = 273,
BLSI64rr = 274,
BLSIC32rm = 275,
BLSIC32rr = 276,
BLSIC64rm = 277,
BLSIC64rr = 278,
BLSMSK32rm = 279,
BLSMSK32rr = 280,
BLSMSK64rm = 281,
BLSMSK64rr = 282,
BLSR32rm = 283,
BLSR32rr = 284,
BLSR64rm = 285,
BLSR64rr = 286,
BNDCL32rm = 287,
BNDCL32rr = 288,
BNDCL64rm = 289,
BNDCL64rr = 290,
BNDCN32rm = 291,
BNDCN32rr = 292,
BNDCN64rm = 293,
BNDCN64rr = 294,
BNDCU32rm = 295,
BNDCU32rr = 296,
BNDCU64rm = 297,
BNDCU64rr = 298,
BNDLDXrm = 299,
BNDMK32rm = 300,
BNDMK64rm = 301,
BNDMOVMR32mr = 302,
BNDMOVMR64mr = 303,
BNDMOVMRrr = 304,
BNDMOVRM32rm = 305,
BNDMOVRM64rm = 306,
BNDMOVRMrr = 307,
BNDSTXmr = 308,
BOUNDS16rm = 309,
BOUNDS32rm = 310,
BSF16rm = 311,
BSF16rr = 312,
BSF32rm = 313,
BSF32rr = 314,
BSF64rm = 315,
BSF64rr = 316,
BSR16rm = 317,
BSR16rr = 318,
BSR32rm = 319,
BSR32rr = 320,
BSR64rm = 321,
BSR64rr = 322,
BSWAP32r = 323,
BSWAP64r = 324,
BT16mi8 = 325,
BT16mr = 326,
BT16ri8 = 327,
BT16rr = 328,
BT32mi8 = 329,
BT32mr = 330,
BT32ri8 = 331,
BT32rr = 332,
BT64mi8 = 333,
BT64mr = 334,
BT64ri8 = 335,
BT64rr = 336,
BTC16mi8 = 337,
BTC16mr = 338,
BTC16ri8 = 339,
BTC16rr = 340,
BTC32mi8 = 341,
BTC32mr = 342,
BTC32ri8 = 343,
BTC32rr = 344,
BTC64mi8 = 345,
BTC64mr = 346,
BTC64ri8 = 347,
BTC64rr = 348,
BTR16mi8 = 349,
BTR16mr = 350,
BTR16ri8 = 351,
BTR16rr = 352,
BTR32mi8 = 353,
BTR32mr = 354,
BTR32ri8 = 355,
BTR32rr = 356,
BTR64mi8 = 357,
BTR64mr = 358,
BTR64ri8 = 359,
BTR64rr = 360,
BTS16mi8 = 361,
BTS16mr = 362,
BTS16ri8 = 363,
BTS16rr = 364,
BTS32mi8 = 365,
BTS32mr = 366,
BTS32ri8 = 367,
BTS32rr = 368,
BTS64mi8 = 369,
BTS64mr = 370,
BTS64ri8 = 371,
BTS64rr = 372,
BZHI32rm = 373,
BZHI32rr = 374,
BZHI64rm = 375,
BZHI64rr = 376,
CALL16m = 377,
CALL16r = 378,
CALL32m = 379,
CALL32r = 380,
CALL64m = 381,
CALL64pcrel32 = 382,
CALL64r = 383,
CALLpcrel16 = 384,
CALLpcrel32 = 385,
CATCHPAD = 386,
CATCHRET = 387,
CBW = 388,
CDQ = 389,
CDQE = 390,
CHS_F = 391,
CHS_Fp32 = 392,
CHS_Fp64 = 393,
CHS_Fp80 = 394,
CLAC = 395,
CLC = 396,
CLD = 397,
CLEANUPRET = 398,
CLFLUSH = 399,
CLFLUSHOPT = 400,
CLGI = 401,
CLI = 402,
CLTS = 403,
CLWB = 404,
CLZEROr = 405,
CMC = 406,
CMOVA16rm = 407,
CMOVA16rr = 408,
CMOVA32rm = 409,
CMOVA32rr = 410,
CMOVA64rm = 411,
CMOVA64rr = 412,
CMOVAE16rm = 413,
CMOVAE16rr = 414,
CMOVAE32rm = 415,
CMOVAE32rr = 416,
CMOVAE64rm = 417,
CMOVAE64rr = 418,
CMOVB16rm = 419,
CMOVB16rr = 420,
CMOVB32rm = 421,
CMOVB32rr = 422,
CMOVB64rm = 423,
CMOVB64rr = 424,
CMOVBE16rm = 425,
CMOVBE16rr = 426,
CMOVBE32rm = 427,
CMOVBE32rr = 428,
CMOVBE64rm = 429,
CMOVBE64rr = 430,
CMOVBE_F = 431,
CMOVBE_Fp32 = 432,
CMOVBE_Fp64 = 433,
CMOVBE_Fp80 = 434,
CMOVB_F = 435,
CMOVB_Fp32 = 436,
CMOVB_Fp64 = 437,
CMOVB_Fp80 = 438,
CMOVE16rm = 439,
CMOVE16rr = 440,
CMOVE32rm = 441,
CMOVE32rr = 442,
CMOVE64rm = 443,
CMOVE64rr = 444,
CMOVE_F = 445,
CMOVE_Fp32 = 446,
CMOVE_Fp64 = 447,
CMOVE_Fp80 = 448,
CMOVG16rm = 449,
CMOVG16rr = 450,
CMOVG32rm = 451,
CMOVG32rr = 452,
CMOVG64rm = 453,
CMOVG64rr = 454,
CMOVGE16rm = 455,
CMOVGE16rr = 456,
CMOVGE32rm = 457,
CMOVGE32rr = 458,
CMOVGE64rm = 459,
CMOVGE64rr = 460,
CMOVL16rm = 461,
CMOVL16rr = 462,
CMOVL32rm = 463,
CMOVL32rr = 464,
CMOVL64rm = 465,
CMOVL64rr = 466,
CMOVLE16rm = 467,
CMOVLE16rr = 468,
CMOVLE32rm = 469,
CMOVLE32rr = 470,
CMOVLE64rm = 471,
CMOVLE64rr = 472,
CMOVNBE_F = 473,
CMOVNBE_Fp32 = 474,
CMOVNBE_Fp64 = 475,
CMOVNBE_Fp80 = 476,
CMOVNB_F = 477,
CMOVNB_Fp32 = 478,
CMOVNB_Fp64 = 479,
CMOVNB_Fp80 = 480,
CMOVNE16rm = 481,
CMOVNE16rr = 482,
CMOVNE32rm = 483,
CMOVNE32rr = 484,
CMOVNE64rm = 485,
CMOVNE64rr = 486,
CMOVNE_F = 487,
CMOVNE_Fp32 = 488,
CMOVNE_Fp64 = 489,
CMOVNE_Fp80 = 490,
CMOVNO16rm = 491,
CMOVNO16rr = 492,
CMOVNO32rm = 493,
CMOVNO32rr = 494,
CMOVNO64rm = 495,
CMOVNO64rr = 496,
CMOVNP16rm = 497,
CMOVNP16rr = 498,
CMOVNP32rm = 499,
CMOVNP32rr = 500,
CMOVNP64rm = 501,
CMOVNP64rr = 502,
CMOVNP_F = 503,
CMOVNP_Fp32 = 504,
CMOVNP_Fp64 = 505,
CMOVNP_Fp80 = 506,
CMOVNS16rm = 507,
CMOVNS16rr = 508,
CMOVNS32rm = 509,
CMOVNS32rr = 510,
CMOVNS64rm = 511,
CMOVNS64rr = 512,
CMOVO16rm = 513,
CMOVO16rr = 514,
CMOVO32rm = 515,
CMOVO32rr = 516,
CMOVO64rm = 517,
CMOVO64rr = 518,
CMOVP16rm = 519,
CMOVP16rr = 520,
CMOVP32rm = 521,
CMOVP32rr = 522,
CMOVP64rm = 523,
CMOVP64rr = 524,
CMOVP_F = 525,
CMOVP_Fp32 = 526,
CMOVP_Fp64 = 527,
CMOVP_Fp80 = 528,
CMOVS16rm = 529,
CMOVS16rr = 530,
CMOVS32rm = 531,
CMOVS32rr = 532,
CMOVS64rm = 533,
CMOVS64rr = 534,
CMOV_FR128 = 535,
CMOV_FR32 = 536,
CMOV_FR64 = 537,
CMOV_GR16 = 538,
CMOV_GR32 = 539,
CMOV_GR8 = 540,
CMOV_RFP32 = 541,
CMOV_RFP64 = 542,
CMOV_RFP80 = 543,
CMOV_V16F32 = 544,
CMOV_V16I1 = 545,
CMOV_V2F64 = 546,
CMOV_V2I64 = 547,
CMOV_V32I1 = 548,
CMOV_V4F32 = 549,
CMOV_V4F64 = 550,
CMOV_V4I64 = 551,
CMOV_V64I1 = 552,
CMOV_V8F32 = 553,
CMOV_V8F64 = 554,
CMOV_V8I1 = 555,
CMOV_V8I64 = 556,
CMP16i16 = 557,
CMP16mi = 558,
CMP16mi8 = 559,
CMP16mr = 560,
CMP16ri = 561,
CMP16ri8 = 562,
CMP16rm = 563,
CMP16rr = 564,
CMP16rr_REV = 565,
CMP32i32 = 566,
CMP32mi = 567,
CMP32mi8 = 568,
CMP32mr = 569,
CMP32ri = 570,
CMP32ri8 = 571,
CMP32rm = 572,
CMP32rr = 573,
CMP32rr_REV = 574,
CMP64i32 = 575,
CMP64mi32 = 576,
CMP64mi8 = 577,
CMP64mr = 578,
CMP64ri32 = 579,
CMP64ri8 = 580,
CMP64rm = 581,
CMP64rr = 582,
CMP64rr_REV = 583,
CMP8i8 = 584,
CMP8mi = 585,
CMP8mi8 = 586,
CMP8mr = 587,
CMP8ri = 588,
CMP8ri8 = 589,
CMP8rm = 590,
CMP8rr = 591,
CMP8rr_REV = 592,
CMPPDrmi = 593,
CMPPDrmi_alt = 594,
CMPPDrri = 595,
CMPPDrri_alt = 596,
CMPPSrmi = 597,
CMPPSrmi_alt = 598,
CMPPSrri = 599,
CMPPSrri_alt = 600,
CMPSB = 601,
CMPSDrm = 602,
CMPSDrm_alt = 603,
CMPSDrr = 604,
CMPSDrr_alt = 605,
CMPSL = 606,
CMPSQ = 607,
CMPSSrm = 608,
CMPSSrm_alt = 609,
CMPSSrr = 610,
CMPSSrr_alt = 611,
CMPSW = 612,
CMPXCHG16B = 613,
CMPXCHG16rm = 614,
CMPXCHG16rr = 615,
CMPXCHG32rm = 616,
CMPXCHG32rr = 617,
CMPXCHG64rm = 618,
CMPXCHG64rr = 619,
CMPXCHG8B = 620,
CMPXCHG8rm = 621,
CMPXCHG8rr = 622,
COMISDrm = 623,
COMISDrr = 624,
COMISSrm = 625,
COMISSrr = 626,
COMP_FST0r = 627,
COM_FIPr = 628,
COM_FIr = 629,
COM_FST0r = 630,
COS_F = 631,
COS_Fp32 = 632,
COS_Fp64 = 633,
COS_Fp80 = 634,
CPUID = 635,
CQO = 636,
CRC32r32m16 = 637,
CRC32r32m32 = 638,
CRC32r32m8 = 639,
CRC32r32r16 = 640,
CRC32r32r32 = 641,
CRC32r32r8 = 642,
CRC32r64m64 = 643,
CRC32r64m8 = 644,
CRC32r64r64 = 645,
CRC32r64r8 = 646,
CS_PREFIX = 647,
CVTDQ2PDrm = 648,
CVTDQ2PDrr = 649,
CVTDQ2PSrm = 650,
CVTDQ2PSrr = 651,
CVTPD2DQrm = 652,
CVTPD2DQrr = 653,
CVTPD2PSrm = 654,
CVTPD2PSrr = 655,
CVTPS2DQrm = 656,
CVTPS2DQrr = 657,
CVTPS2PDrm = 658,
CVTPS2PDrr = 659,
CVTSD2SI64rm = 660,
CVTSD2SI64rr = 661,
CVTSD2SIrm = 662,
CVTSD2SIrr = 663,
CVTSD2SSrm = 664,
CVTSD2SSrr = 665,
CVTSI2SD64rm = 666,
CVTSI2SD64rr = 667,
CVTSI2SDrm = 668,
CVTSI2SDrr = 669,
CVTSI2SS64rm = 670,
CVTSI2SS64rr = 671,
CVTSI2SSrm = 672,
CVTSI2SSrr = 673,
CVTSS2SDrm = 674,
CVTSS2SDrr = 675,
CVTSS2SI64rm = 676,
CVTSS2SI64rr = 677,
CVTSS2SIrm = 678,
CVTSS2SIrr = 679,
CVTTPD2DQrm = 680,
CVTTPD2DQrr = 681,
CVTTPS2DQrm = 682,
CVTTPS2DQrr = 683,
CVTTSD2SI64rm = 684,
CVTTSD2SI64rr = 685,
CVTTSD2SIrm = 686,
CVTTSD2SIrr = 687,
CVTTSS2SI64rm = 688,
CVTTSS2SI64rr = 689,
CVTTSS2SIrm = 690,
CVTTSS2SIrr = 691,
CWD = 692,
CWDE = 693,
DAA = 694,
DAS = 695,
DATA16_PREFIX = 696,
DEC16m = 697,
DEC16r = 698,
DEC16r_alt = 699,
DEC32m = 700,
DEC32r = 701,
DEC32r_alt = 702,
DEC64m = 703,
DEC64r = 704,
DEC8m = 705,
DEC8r = 706,
DIV16m = 707,
DIV16r = 708,
DIV32m = 709,
DIV32r = 710,
DIV64m = 711,
DIV64r = 712,
DIV8m = 713,
DIV8r = 714,
DIVPDrm = 715,
DIVPDrr = 716,
DIVPSrm = 717,
DIVPSrr = 718,
DIVR_F32m = 719,
DIVR_F64m = 720,
DIVR_FI16m = 721,
DIVR_FI32m = 722,
DIVR_FPrST0 = 723,
DIVR_FST0r = 724,
DIVR_Fp32m = 725,
DIVR_Fp64m = 726,
DIVR_Fp64m32 = 727,
DIVR_Fp80m32 = 728,
DIVR_Fp80m64 = 729,
DIVR_FpI16m32 = 730,
DIVR_FpI16m64 = 731,
DIVR_FpI16m80 = 732,
DIVR_FpI32m32 = 733,
DIVR_FpI32m64 = 734,
DIVR_FpI32m80 = 735,
DIVR_FrST0 = 736,
DIVSDrm = 737,
DIVSDrm_Int = 738,
DIVSDrr = 739,
DIVSDrr_Int = 740,
DIVSSrm = 741,
DIVSSrm_Int = 742,
DIVSSrr = 743,
DIVSSrr_Int = 744,
DIV_F32m = 745,
DIV_F64m = 746,
DIV_FI16m = 747,
DIV_FI32m = 748,
DIV_FPrST0 = 749,
DIV_FST0r = 750,
DIV_Fp32 = 751,
DIV_Fp32m = 752,
DIV_Fp64 = 753,
DIV_Fp64m = 754,
DIV_Fp64m32 = 755,
DIV_Fp80 = 756,
DIV_Fp80m32 = 757,
DIV_Fp80m64 = 758,
DIV_FpI16m32 = 759,
DIV_FpI16m64 = 760,
DIV_FpI16m80 = 761,
DIV_FpI32m32 = 762,
DIV_FpI32m64 = 763,
DIV_FpI32m80 = 764,
DIV_FrST0 = 765,
DPPDrmi = 766,
DPPDrri = 767,
DPPSrmi = 768,
DPPSrri = 769,
DS_PREFIX = 770,
EH_RESTORE = 771,
EH_RETURN = 772,
EH_RETURN64 = 773,
EH_SjLj_LongJmp32 = 774,
EH_SjLj_LongJmp64 = 775,
EH_SjLj_SetJmp32 = 776,
EH_SjLj_SetJmp64 = 777,
EH_SjLj_Setup = 778,
ENCLS = 779,
ENCLU = 780,
ENTER = 781,
ES_PREFIX = 782,
EXTRACTPSmr = 783,
EXTRACTPSrr = 784,
EXTRQ = 785,
EXTRQI = 786,
F2XM1 = 787,
FARCALL16i = 788,
FARCALL16m = 789,
FARCALL32i = 790,
FARCALL32m = 791,
FARCALL64 = 792,
FARJMP16i = 793,
FARJMP16m = 794,
FARJMP32i = 795,
FARJMP32m = 796,
FARJMP64 = 797,
FBLDm = 798,
FBSTPm = 799,
FCOM32m = 800,
FCOM64m = 801,
FCOMP32m = 802,
FCOMP64m = 803,
FCOMPP = 804,
FDECSTP = 805,
FEMMS = 806,
FFREE = 807,
FICOM16m = 808,
FICOM32m = 809,
FICOMP16m = 810,
FICOMP32m = 811,
FINCSTP = 812,
FLDCW16m = 813,
FLDENVm = 814,
FLDL2E = 815,
FLDL2T = 816,
FLDLG2 = 817,
FLDLN2 = 818,
FLDPI = 819,
FNCLEX = 820,
FNINIT = 821,
FNOP = 822,
FNSTCW16m = 823,
FNSTSW16r = 824,
FNSTSWm = 825,
FP32_TO_INT16_IN_MEM = 826,
FP32_TO_INT32_IN_MEM = 827,
FP32_TO_INT64_IN_MEM = 828,
FP64_TO_INT16_IN_MEM = 829,
FP64_TO_INT32_IN_MEM = 830,
FP64_TO_INT64_IN_MEM = 831,
FP80_TO_INT16_IN_MEM = 832,
FP80_TO_INT32_IN_MEM = 833,
FP80_TO_INT64_IN_MEM = 834,
FPATAN = 835,
FPREM = 836,
FPREM1 = 837,
FPTAN = 838,
FP_FFREEP = 839,
FRNDINT = 840,
FRSTORm = 841,
FSAVEm = 842,
FSCALE = 843,
FSETPM = 844,
FSINCOS = 845,
FSTENVm = 846,
FS_PREFIX = 847,
FXAM = 848,
FXRSTOR = 849,
FXRSTOR64 = 850,
FXSAVE = 851,
FXSAVE64 = 852,
FXTRACT = 853,
FYL2X = 854,
FYL2XP1 = 855,
FsANDNPDrm = 856,
FsANDNPDrr = 857,
FsANDNPSrm = 858,
FsANDNPSrr = 859,
FsANDPDrm = 860,
FsANDPDrr = 861,
FsANDPSrm = 862,
FsANDPSrr = 863,
FsFLD0SD = 864,
FsFLD0SS = 865,
FsMOVAPDrm = 866,
FsMOVAPSrm = 867,
FsORPDrm = 868,
FsORPDrr = 869,
FsORPSrm = 870,
FsORPSrr = 871,
FsVMOVAPDrm = 872,
FsVMOVAPSrm = 873,
FsXORPDrm = 874,
FsXORPDrr = 875,
FsXORPSrm = 876,
FsXORPSrr = 877,
FvANDNPDrm = 878,
FvANDNPDrr = 879,
FvANDNPSrm = 880,
FvANDNPSrr = 881,
FvANDPDrm = 882,
FvANDPDrr = 883,
FvANDPSrm = 884,
FvANDPSrr = 885,
FvORPDrm = 886,
FvORPDrr = 887,
FvORPSrm = 888,
FvORPSrr = 889,
FvXORPDrm = 890,
FvXORPDrr = 891,
FvXORPSrm = 892,
FvXORPSrr = 893,
GETSEC = 894,
GS_PREFIX = 895,
HADDPDrm = 896,
HADDPDrr = 897,
HADDPSrm = 898,
HADDPSrr = 899,
HLT = 900,
HSUBPDrm = 901,
HSUBPDrr = 902,
HSUBPSrm = 903,
HSUBPSrr = 904,
IDIV16m = 905,
IDIV16r = 906,
IDIV32m = 907,
IDIV32r = 908,
IDIV64m = 909,
IDIV64r = 910,
IDIV8m = 911,
IDIV8r = 912,
ILD_F16m = 913,
ILD_F32m = 914,
ILD_F64m = 915,
ILD_Fp16m32 = 916,
ILD_Fp16m64 = 917,
ILD_Fp16m80 = 918,
ILD_Fp32m32 = 919,
ILD_Fp32m64 = 920,
ILD_Fp32m80 = 921,
ILD_Fp64m32 = 922,
ILD_Fp64m64 = 923,
ILD_Fp64m80 = 924,
IMUL16m = 925,
IMUL16r = 926,
IMUL16rm = 927,
IMUL16rmi = 928,
IMUL16rmi8 = 929,
IMUL16rr = 930,
IMUL16rri = 931,
IMUL16rri8 = 932,
IMUL32m = 933,
IMUL32r = 934,
IMUL32rm = 935,
IMUL32rmi = 936,
IMUL32rmi8 = 937,
IMUL32rr = 938,
IMUL32rri = 939,
IMUL32rri8 = 940,
IMUL64m = 941,
IMUL64r = 942,
IMUL64rm = 943,
IMUL64rmi32 = 944,
IMUL64rmi8 = 945,
IMUL64rr = 946,
IMUL64rri32 = 947,
IMUL64rri8 = 948,
IMUL8m = 949,
IMUL8r = 950,
IN16ri = 951,
IN16rr = 952,
IN32ri = 953,
IN32rr = 954,
IN8ri = 955,
IN8rr = 956,
INC16m = 957,
INC16r = 958,
INC16r_alt = 959,
INC32m = 960,
INC32r = 961,
INC32r_alt = 962,
INC64m = 963,
INC64r = 964,
INC8m = 965,
INC8r = 966,
INSB = 967,
INSERTPSrm = 968,
INSERTPSrr = 969,
INSERTQ = 970,
INSERTQI = 971,
INSL = 972,
INSW = 973,
INT = 974,
INT1 = 975,
INT3 = 976,
INTO = 977,
INVD = 978,
INVEPT32 = 979,
INVEPT64 = 980,
INVLPG = 981,
INVLPGA32 = 982,
INVLPGA64 = 983,
INVPCID32 = 984,
INVPCID64 = 985,
INVVPID32 = 986,
INVVPID64 = 987,
IRET = 988,
IRET16 = 989,
IRET32 = 990,
IRET64 = 991,
ISTT_FP16m = 992,
ISTT_FP32m = 993,
ISTT_FP64m = 994,
ISTT_Fp16m32 = 995,
ISTT_Fp16m64 = 996,
ISTT_Fp16m80 = 997,
ISTT_Fp32m32 = 998,
ISTT_Fp32m64 = 999,
ISTT_Fp32m80 = 1000,
ISTT_Fp64m32 = 1001,
ISTT_Fp64m64 = 1002,
ISTT_Fp64m80 = 1003,
IST_F16m = 1004,
IST_F32m = 1005,
IST_FP16m = 1006,
IST_FP32m = 1007,
IST_FP64m = 1008,
IST_Fp16m32 = 1009,
IST_Fp16m64 = 1010,
IST_Fp16m80 = 1011,
IST_Fp32m32 = 1012,
IST_Fp32m64 = 1013,
IST_Fp32m80 = 1014,
IST_Fp64m32 = 1015,
IST_Fp64m64 = 1016,
IST_Fp64m80 = 1017,
Int_CMPSDrm = 1018,
Int_CMPSDrr = 1019,
Int_CMPSSrm = 1020,
Int_CMPSSrr = 1021,
Int_COMISDrm = 1022,
Int_COMISDrr = 1023,
Int_COMISSrm = 1024,
Int_COMISSrr = 1025,
Int_CVTSD2SSrm = 1026,
Int_CVTSD2SSrr = 1027,
Int_CVTSI2SD64rm = 1028,
Int_CVTSI2SD64rr = 1029,
Int_CVTSI2SDrm = 1030,
Int_CVTSI2SDrr = 1031,
Int_CVTSI2SS64rm = 1032,
Int_CVTSI2SS64rr = 1033,
Int_CVTSI2SSrm = 1034,
Int_CVTSI2SSrr = 1035,
Int_CVTSS2SDrm = 1036,
Int_CVTSS2SDrr = 1037,
Int_CVTTSD2SI64rm = 1038,
Int_CVTTSD2SI64rr = 1039,
Int_CVTTSD2SIrm = 1040,
Int_CVTTSD2SIrr = 1041,
Int_CVTTSS2SI64rm = 1042,
Int_CVTTSS2SI64rr = 1043,
Int_CVTTSS2SIrm = 1044,
Int_CVTTSS2SIrr = 1045,
Int_MemBarrier = 1046,
Int_UCOMISDrm = 1047,
Int_UCOMISDrr = 1048,
Int_UCOMISSrm = 1049,
Int_UCOMISSrr = 1050,
Int_VCMPSDrm = 1051,
Int_VCMPSDrr = 1052,
Int_VCMPSSrm = 1053,
Int_VCMPSSrr = 1054,
Int_VCOMISDZrm = 1055,
Int_VCOMISDZrr = 1056,
Int_VCOMISDrm = 1057,
Int_VCOMISDrr = 1058,
Int_VCOMISSZrm = 1059,
Int_VCOMISSZrr = 1060,
Int_VCOMISSrm = 1061,
Int_VCOMISSrr = 1062,
Int_VCVTSD2SSrm = 1063,
Int_VCVTSD2SSrr = 1064,
Int_VCVTSI2SD64Zrm = 1065,
Int_VCVTSI2SD64Zrr = 1066,
Int_VCVTSI2SD64rm = 1067,
Int_VCVTSI2SD64rr = 1068,
Int_VCVTSI2SDZrm = 1069,
Int_VCVTSI2SDZrr = 1070,
Int_VCVTSI2SDrm = 1071,
Int_VCVTSI2SDrr = 1072,
Int_VCVTSI2SS64Zrm = 1073,
Int_VCVTSI2SS64Zrr = 1074,
Int_VCVTSI2SS64rm = 1075,
Int_VCVTSI2SS64rr = 1076,
Int_VCVTSI2SSZrm = 1077,
Int_VCVTSI2SSZrr = 1078,
Int_VCVTSI2SSrm = 1079,
Int_VCVTSI2SSrr = 1080,
Int_VCVTSS2SDrm = 1081,
Int_VCVTSS2SDrr = 1082,
Int_VCVTTSD2SI64rm = 1083,
Int_VCVTTSD2SI64rr = 1084,
Int_VCVTTSD2SIrm = 1085,
Int_VCVTTSD2SIrr = 1086,
Int_VCVTTSS2SI64rm = 1087,
Int_VCVTTSS2SI64rr = 1088,
Int_VCVTTSS2SIrm = 1089,
Int_VCVTTSS2SIrr = 1090,
Int_VCVTUSI2SDZrm = 1091,
Int_VCVTUSI2SDZrr = 1092,
Int_VUCOMISDZrm = 1093,
Int_VUCOMISDZrr = 1094,
Int_VUCOMISDrm = 1095,
Int_VUCOMISDrr = 1096,
Int_VUCOMISSZrm = 1097,
Int_VUCOMISSZrr = 1098,
Int_VUCOMISSrm = 1099,
Int_VUCOMISSrr = 1100,
JAE_1 = 1101,
JAE_2 = 1102,
JAE_4 = 1103,
JA_1 = 1104,
JA_2 = 1105,
JA_4 = 1106,
JBE_1 = 1107,
JBE_2 = 1108,
JBE_4 = 1109,
JB_1 = 1110,
JB_2 = 1111,
JB_4 = 1112,
JCXZ = 1113,
JECXZ = 1114,
JE_1 = 1115,
JE_2 = 1116,
JE_4 = 1117,
JGE_1 = 1118,
JGE_2 = 1119,
JGE_4 = 1120,
JG_1 = 1121,
JG_2 = 1122,
JG_4 = 1123,
JLE_1 = 1124,
JLE_2 = 1125,
JLE_4 = 1126,
JL_1 = 1127,
JL_2 = 1128,
JL_4 = 1129,
JMP16m = 1130,
JMP16r = 1131,
JMP32m = 1132,
JMP32r = 1133,
JMP64m = 1134,
JMP64r = 1135,
JMP_1 = 1136,
JMP_2 = 1137,
JMP_4 = 1138,
JNE_1 = 1139,
JNE_2 = 1140,
JNE_4 = 1141,
JNO_1 = 1142,
JNO_2 = 1143,
JNO_4 = 1144,
JNP_1 = 1145,
JNP_2 = 1146,
JNP_4 = 1147,
JNS_1 = 1148,
JNS_2 = 1149,
JNS_4 = 1150,
JO_1 = 1151,
JO_2 = 1152,
JO_4 = 1153,
JP_1 = 1154,
JP_2 = 1155,
JP_4 = 1156,
JRCXZ = 1157,
JS_1 = 1158,
JS_2 = 1159,
JS_4 = 1160,
KADDBrr = 1161,
KADDDrr = 1162,
KADDQrr = 1163,
KADDWrr = 1164,
KANDBrr = 1165,
KANDDrr = 1166,
KANDNBrr = 1167,
KANDNDrr = 1168,
KANDNQrr = 1169,
KANDNWrr = 1170,
KANDQrr = 1171,
KANDWrr = 1172,
KMOVBkk = 1173,
KMOVBkm = 1174,
KMOVBkr = 1175,
KMOVBmk = 1176,
KMOVBrk = 1177,
KMOVDkk = 1178,
KMOVDkm = 1179,
KMOVDkr = 1180,
KMOVDmk = 1181,
KMOVDrk = 1182,
KMOVQkk = 1183,
KMOVQkm = 1184,
KMOVQkr = 1185,
KMOVQmk = 1186,
KMOVQrk = 1187,
KMOVWkk = 1188,
KMOVWkm = 1189,
KMOVWkr = 1190,
KMOVWmk = 1191,
KMOVWrk = 1192,
KNOTBrr = 1193,
KNOTDrr = 1194,
KNOTQrr = 1195,
KNOTWrr = 1196,
KORBrr = 1197,
KORDrr = 1198,
KORQrr = 1199,
KORTESTBrr = 1200,
KORTESTDrr = 1201,
KORTESTQrr = 1202,
KORTESTWrr = 1203,
KORWrr = 1204,
KSET0B = 1205,
KSET0D = 1206,
KSET0Q = 1207,
KSET0W = 1208,
KSET1B = 1209,
KSET1D = 1210,
KSET1Q = 1211,
KSET1W = 1212,
KSHIFTLBri = 1213,
KSHIFTLDri = 1214,
KSHIFTLQri = 1215,
KSHIFTLWri = 1216,
KSHIFTRBri = 1217,
KSHIFTRDri = 1218,
KSHIFTRQri = 1219,
KSHIFTRWri = 1220,
KTESTBrr = 1221,
KTESTDrr = 1222,
KTESTQrr = 1223,
KTESTWrr = 1224,
KUNPCKBWrr = 1225,
KUNPCKDQrr = 1226,
KUNPCKWDrr = 1227,
KXNORBrr = 1228,
KXNORDrr = 1229,
KXNORQrr = 1230,
KXNORWrr = 1231,
KXORBrr = 1232,
KXORDrr = 1233,
KXORQrr = 1234,
KXORWrr = 1235,
LAHF = 1236,
LAR16rm = 1237,
LAR16rr = 1238,
LAR32rm = 1239,
LAR32rr = 1240,
LAR64rm = 1241,
LAR64rr = 1242,
LCMPXCHG16 = 1243,
LCMPXCHG16B = 1244,
LCMPXCHG32 = 1245,
LCMPXCHG64 = 1246,
LCMPXCHG8 = 1247,
LCMPXCHG8B = 1248,
LDDQUrm = 1249,
LDMXCSR = 1250,
LDS16rm = 1251,
LDS32rm = 1252,
LD_F0 = 1253,
LD_F1 = 1254,
LD_F32m = 1255,
LD_F64m = 1256,
LD_F80m = 1257,
LD_Fp032 = 1258,
LD_Fp064 = 1259,
LD_Fp080 = 1260,
LD_Fp132 = 1261,
LD_Fp164 = 1262,
LD_Fp180 = 1263,
LD_Fp32m = 1264,
LD_Fp32m64 = 1265,
LD_Fp32m80 = 1266,
LD_Fp64m = 1267,
LD_Fp64m80 = 1268,
LD_Fp80m = 1269,
LD_Frr = 1270,
LEA16r = 1271,
LEA32r = 1272,
LEA64_32r = 1273,
LEA64r = 1274,
LEAVE = 1275,
LEAVE64 = 1276,
LES16rm = 1277,
LES32rm = 1278,
LFENCE = 1279,
LFS16rm = 1280,
LFS32rm = 1281,
LFS64rm = 1282,
LGDT16m = 1283,
LGDT32m = 1284,
LGDT64m = 1285,
LGS16rm = 1286,
LGS32rm = 1287,
LGS64rm = 1288,
LIDT16m = 1289,
LIDT32m = 1290,
LIDT64m = 1291,
LLDT16m = 1292,
LLDT16r = 1293,
LMSW16m = 1294,
LMSW16r = 1295,
LOCK_ADD16mi = 1296,
LOCK_ADD16mi8 = 1297,
LOCK_ADD16mr = 1298,
LOCK_ADD32mi = 1299,
LOCK_ADD32mi8 = 1300,
LOCK_ADD32mr = 1301,
LOCK_ADD64mi32 = 1302,
LOCK_ADD64mi8 = 1303,
LOCK_ADD64mr = 1304,
LOCK_ADD8mi = 1305,
LOCK_ADD8mr = 1306,
LOCK_AND16mi = 1307,
LOCK_AND16mi8 = 1308,
LOCK_AND16mr = 1309,
LOCK_AND32mi = 1310,
LOCK_AND32mi8 = 1311,
LOCK_AND32mr = 1312,
LOCK_AND64mi32 = 1313,
LOCK_AND64mi8 = 1314,
LOCK_AND64mr = 1315,
LOCK_AND8mi = 1316,
LOCK_AND8mr = 1317,
LOCK_DEC16m = 1318,
LOCK_DEC32m = 1319,
LOCK_DEC64m = 1320,
LOCK_DEC8m = 1321,
LOCK_INC16m = 1322,
LOCK_INC32m = 1323,
LOCK_INC64m = 1324,
LOCK_INC8m = 1325,
LOCK_OR16mi = 1326,
LOCK_OR16mi8 = 1327,
LOCK_OR16mr = 1328,
LOCK_OR32mi = 1329,
LOCK_OR32mi8 = 1330,
LOCK_OR32mr = 1331,
LOCK_OR64mi32 = 1332,
LOCK_OR64mi8 = 1333,
LOCK_OR64mr = 1334,
LOCK_OR8mi = 1335,
LOCK_OR8mr = 1336,
LOCK_PREFIX = 1337,
LOCK_SUB16mi = 1338,
LOCK_SUB16mi8 = 1339,
LOCK_SUB16mr = 1340,
LOCK_SUB32mi = 1341,
LOCK_SUB32mi8 = 1342,
LOCK_SUB32mr = 1343,
LOCK_SUB64mi32 = 1344,
LOCK_SUB64mi8 = 1345,
LOCK_SUB64mr = 1346,
LOCK_SUB8mi = 1347,
LOCK_SUB8mr = 1348,
LOCK_XOR16mi = 1349,
LOCK_XOR16mi8 = 1350,
LOCK_XOR16mr = 1351,
LOCK_XOR32mi = 1352,
LOCK_XOR32mi8 = 1353,
LOCK_XOR32mr = 1354,
LOCK_XOR64mi32 = 1355,
LOCK_XOR64mi8 = 1356,
LOCK_XOR64mr = 1357,
LOCK_XOR8mi = 1358,
LOCK_XOR8mr = 1359,
LODSB = 1360,
LODSL = 1361,
LODSQ = 1362,
LODSW = 1363,
LOOP = 1364,
LOOPE = 1365,
LOOPNE = 1366,
LRETIL = 1367,
LRETIQ = 1368,
LRETIW = 1369,
LRETL = 1370,
LRETQ = 1371,
LRETW = 1372,
LSL16rm = 1373,
LSL16rr = 1374,
LSL32rm = 1375,
LSL32rr = 1376,
LSL64rm = 1377,
LSL64rr = 1378,
LSS16rm = 1379,
LSS32rm = 1380,
LSS64rm = 1381,
LTRm = 1382,
LTRr = 1383,
LXADD16 = 1384,
LXADD32 = 1385,
LXADD64 = 1386,
LXADD8 = 1387,
LZCNT16rm = 1388,
LZCNT16rr = 1389,
LZCNT32rm = 1390,
LZCNT32rr = 1391,
LZCNT64rm = 1392,
LZCNT64rr = 1393,
MASKMOVDQU = 1394,
MASKMOVDQU64 = 1395,
MAXCPDrm = 1396,
MAXCPDrr = 1397,
MAXCPSrm = 1398,
MAXCPSrr = 1399,
MAXCSDrm = 1400,
MAXCSDrr = 1401,
MAXCSSrm = 1402,
MAXCSSrr = 1403,
MAXPDrm = 1404,
MAXPDrr = 1405,
MAXPSrm = 1406,
MAXPSrr = 1407,
MAXSDrm = 1408,
MAXSDrm_Int = 1409,
MAXSDrr = 1410,
MAXSDrr_Int = 1411,
MAXSSrm = 1412,
MAXSSrm_Int = 1413,
MAXSSrr = 1414,
MAXSSrr_Int = 1415,
MFENCE = 1416,
MINCPDrm = 1417,
MINCPDrr = 1418,
MINCPSrm = 1419,
MINCPSrr = 1420,
MINCSDrm = 1421,
MINCSDrr = 1422,
MINCSSrm = 1423,
MINCSSrr = 1424,
MINPDrm = 1425,
MINPDrr = 1426,
MINPSrm = 1427,
MINPSrr = 1428,
MINSDrm = 1429,
MINSDrm_Int = 1430,
MINSDrr = 1431,
MINSDrr_Int = 1432,
MINSSrm = 1433,
MINSSrm_Int = 1434,
MINSSrr = 1435,
MINSSrr_Int = 1436,
MMX_CVTPD2PIirm = 1437,
MMX_CVTPD2PIirr = 1438,
MMX_CVTPI2PDirm = 1439,
MMX_CVTPI2PDirr = 1440,
MMX_CVTPI2PSirm = 1441,
MMX_CVTPI2PSirr = 1442,
MMX_CVTPS2PIirm = 1443,
MMX_CVTPS2PIirr = 1444,
MMX_CVTTPD2PIirm = 1445,
MMX_CVTTPD2PIirr = 1446,
MMX_CVTTPS2PIirm = 1447,
MMX_CVTTPS2PIirr = 1448,
MMX_EMMS = 1449,
MMX_MASKMOVQ = 1450,
MMX_MASKMOVQ64 = 1451,
MMX_MOVD64from64rm = 1452,
MMX_MOVD64from64rr = 1453,
MMX_MOVD64grr = 1454,
MMX_MOVD64mr = 1455,
MMX_MOVD64rm = 1456,
MMX_MOVD64rr = 1457,
MMX_MOVD64to64rm = 1458,
MMX_MOVD64to64rr = 1459,
MMX_MOVDQ2Qrr = 1460,
MMX_MOVFR642Qrr = 1461,
MMX_MOVNTQmr = 1462,
MMX_MOVQ2DQrr = 1463,
MMX_MOVQ2FR64rr = 1464,
MMX_MOVQ64mr = 1465,
MMX_MOVQ64rm = 1466,
MMX_MOVQ64rr = 1467,
MMX_MOVQ64rr_REV = 1468,
MMX_PABSBrm64 = 1469,
MMX_PABSBrr64 = 1470,
MMX_PABSDrm64 = 1471,
MMX_PABSDrr64 = 1472,
MMX_PABSWrm64 = 1473,
MMX_PABSWrr64 = 1474,
MMX_PACKSSDWirm = 1475,
MMX_PACKSSDWirr = 1476,
MMX_PACKSSWBirm = 1477,
MMX_PACKSSWBirr = 1478,
MMX_PACKUSWBirm = 1479,
MMX_PACKUSWBirr = 1480,
MMX_PADDBirm = 1481,
MMX_PADDBirr = 1482,
MMX_PADDDirm = 1483,
MMX_PADDDirr = 1484,
MMX_PADDQirm = 1485,
MMX_PADDQirr = 1486,
MMX_PADDSBirm = 1487,
MMX_PADDSBirr = 1488,
MMX_PADDSWirm = 1489,
MMX_PADDSWirr = 1490,
MMX_PADDUSBirm = 1491,
MMX_PADDUSBirr = 1492,
MMX_PADDUSWirm = 1493,
MMX_PADDUSWirr = 1494,
MMX_PADDWirm = 1495,
MMX_PADDWirr = 1496,
MMX_PALIGNR64irm = 1497,
MMX_PALIGNR64irr = 1498,
MMX_PANDNirm = 1499,
MMX_PANDNirr = 1500,
MMX_PANDirm = 1501,
MMX_PANDirr = 1502,
MMX_PAVGBirm = 1503,
MMX_PAVGBirr = 1504,
MMX_PAVGWirm = 1505,
MMX_PAVGWirr = 1506,
MMX_PCMPEQBirm = 1507,
MMX_PCMPEQBirr = 1508,
MMX_PCMPEQDirm = 1509,
MMX_PCMPEQDirr = 1510,
MMX_PCMPEQWirm = 1511,
MMX_PCMPEQWirr = 1512,
MMX_PCMPGTBirm = 1513,
MMX_PCMPGTBirr = 1514,
MMX_PCMPGTDirm = 1515,
MMX_PCMPGTDirr = 1516,
MMX_PCMPGTWirm = 1517,
MMX_PCMPGTWirr = 1518,
MMX_PEXTRWirri = 1519,
MMX_PHADDSWrm64 = 1520,
MMX_PHADDSWrr64 = 1521,
MMX_PHADDWrm64 = 1522,
MMX_PHADDWrr64 = 1523,
MMX_PHADDrm64 = 1524,
MMX_PHADDrr64 = 1525,
MMX_PHSUBDrm64 = 1526,
MMX_PHSUBDrr64 = 1527,
MMX_PHSUBSWrm64 = 1528,
MMX_PHSUBSWrr64 = 1529,
MMX_PHSUBWrm64 = 1530,
MMX_PHSUBWrr64 = 1531,
MMX_PINSRWirmi = 1532,
MMX_PINSRWirri = 1533,
MMX_PMADDUBSWrm64 = 1534,
MMX_PMADDUBSWrr64 = 1535,
MMX_PMADDWDirm = 1536,
MMX_PMADDWDirr = 1537,
MMX_PMAXSWirm = 1538,
MMX_PMAXSWirr = 1539,
MMX_PMAXUBirm = 1540,
MMX_PMAXUBirr = 1541,
MMX_PMINSWirm = 1542,
MMX_PMINSWirr = 1543,
MMX_PMINUBirm = 1544,
MMX_PMINUBirr = 1545,
MMX_PMOVMSKBrr = 1546,
MMX_PMULHRSWrm64 = 1547,
MMX_PMULHRSWrr64 = 1548,
MMX_PMULHUWirm = 1549,
MMX_PMULHUWirr = 1550,
MMX_PMULHWirm = 1551,
MMX_PMULHWirr = 1552,
MMX_PMULLWirm = 1553,
MMX_PMULLWirr = 1554,
MMX_PMULUDQirm = 1555,
MMX_PMULUDQirr = 1556,
MMX_PORirm = 1557,
MMX_PORirr = 1558,
MMX_PSADBWirm = 1559,
MMX_PSADBWirr = 1560,
MMX_PSHUFBrm64 = 1561,
MMX_PSHUFBrr64 = 1562,
MMX_PSHUFWmi = 1563,
MMX_PSHUFWri = 1564,
MMX_PSIGNBrm64 = 1565,
MMX_PSIGNBrr64 = 1566,
MMX_PSIGNDrm64 = 1567,
MMX_PSIGNDrr64 = 1568,
MMX_PSIGNWrm64 = 1569,
MMX_PSIGNWrr64 = 1570,
MMX_PSLLDri = 1571,
MMX_PSLLDrm = 1572,
MMX_PSLLDrr = 1573,
MMX_PSLLQri = 1574,
MMX_PSLLQrm = 1575,
MMX_PSLLQrr = 1576,
MMX_PSLLWri = 1577,
MMX_PSLLWrm = 1578,
MMX_PSLLWrr = 1579,
MMX_PSRADri = 1580,
MMX_PSRADrm = 1581,
MMX_PSRADrr = 1582,
MMX_PSRAWri = 1583,
MMX_PSRAWrm = 1584,
MMX_PSRAWrr = 1585,
MMX_PSRLDri = 1586,
MMX_PSRLDrm = 1587,
MMX_PSRLDrr = 1588,
MMX_PSRLQri = 1589,
MMX_PSRLQrm = 1590,
MMX_PSRLQrr = 1591,
MMX_PSRLWri = 1592,
MMX_PSRLWrm = 1593,
MMX_PSRLWrr = 1594,
MMX_PSUBBirm = 1595,
MMX_PSUBBirr = 1596,
MMX_PSUBDirm = 1597,
MMX_PSUBDirr = 1598,
MMX_PSUBQirm = 1599,
MMX_PSUBQirr = 1600,
MMX_PSUBSBirm = 1601,
MMX_PSUBSBirr = 1602,
MMX_PSUBSWirm = 1603,
MMX_PSUBSWirr = 1604,
MMX_PSUBUSBirm = 1605,
MMX_PSUBUSBirr = 1606,
MMX_PSUBUSWirm = 1607,
MMX_PSUBUSWirr = 1608,
MMX_PSUBWirm = 1609,
MMX_PSUBWirr = 1610,
MMX_PUNPCKHBWirm = 1611,
MMX_PUNPCKHBWirr = 1612,
MMX_PUNPCKHDQirm = 1613,
MMX_PUNPCKHDQirr = 1614,
MMX_PUNPCKHWDirm = 1615,
MMX_PUNPCKHWDirr = 1616,
MMX_PUNPCKLBWirm = 1617,
MMX_PUNPCKLBWirr = 1618,
MMX_PUNPCKLDQirm = 1619,
MMX_PUNPCKLDQirr = 1620,
MMX_PUNPCKLWDirm = 1621,
MMX_PUNPCKLWDirr = 1622,
MMX_PXORirm = 1623,
MMX_PXORirr = 1624,
MONITOR = 1625,
MONITORXrrr = 1626,
MONITORrrr = 1627,
MONTMUL = 1628,
MORESTACK_RET = 1629,
MORESTACK_RET_RESTORE_R10 = 1630,
MOV16ao16 = 1631,
MOV16ao32 = 1632,
MOV16ao64 = 1633,
MOV16mi = 1634,
MOV16mr = 1635,
MOV16ms = 1636,
MOV16o16a = 1637,
MOV16o32a = 1638,
MOV16o64a = 1639,
MOV16ri = 1640,
MOV16ri_alt = 1641,
MOV16rm = 1642,
MOV16rr = 1643,
MOV16rr_REV = 1644,
MOV16rs = 1645,
MOV16sm = 1646,
MOV16sr = 1647,
MOV32ao16 = 1648,
MOV32ao32 = 1649,
MOV32ao64 = 1650,
MOV32cr = 1651,
MOV32dr = 1652,
MOV32mi = 1653,
MOV32mr = 1654,
MOV32ms = 1655,
MOV32o16a = 1656,
MOV32o32a = 1657,
MOV32o64a = 1658,
MOV32r0 = 1659,
MOV32r1 = 1660,
MOV32r_1 = 1661,
MOV32rc = 1662,
MOV32rd = 1663,
MOV32ri = 1664,
MOV32ri64 = 1665,
MOV32ri_alt = 1666,
MOV32rm = 1667,
MOV32rr = 1668,
MOV32rr_REV = 1669,
MOV32rs = 1670,
MOV32sm = 1671,
MOV32sr = 1672,
MOV64ao32 = 1673,
MOV64ao64 = 1674,
MOV64cr = 1675,
MOV64dr = 1676,
MOV64mi32 = 1677,
MOV64mr = 1678,
MOV64ms = 1679,
MOV64o32a = 1680,
MOV64o64a = 1681,
MOV64rc = 1682,
MOV64rd = 1683,
MOV64ri = 1684,
MOV64ri32 = 1685,
MOV64rm = 1686,
MOV64rr = 1687,
MOV64rr_REV = 1688,
MOV64rs = 1689,
MOV64sm = 1690,
MOV64sr = 1691,
MOV64toPQIrm = 1692,
MOV64toPQIrr = 1693,
MOV64toSDrm = 1694,
MOV64toSDrr = 1695,
MOV8ao16 = 1696,
MOV8ao32 = 1697,
MOV8ao64 = 1698,
MOV8mi = 1699,
MOV8mr = 1700,
MOV8mr_NOREX = 1701,
MOV8o16a = 1702,
MOV8o32a = 1703,
MOV8o64a = 1704,
MOV8ri = 1705,
MOV8ri_alt = 1706,
MOV8rm = 1707,
MOV8rm_NOREX = 1708,
MOV8rr = 1709,
MOV8rr_NOREX = 1710,
MOV8rr_REV = 1711,
MOVAPDmr = 1712,
MOVAPDrm = 1713,
MOVAPDrr = 1714,
MOVAPDrr_REV = 1715,
MOVAPSmr = 1716,
MOVAPSrm = 1717,
MOVAPSrr = 1718,
MOVAPSrr_REV = 1719,
MOVBE16mr = 1720,
MOVBE16rm = 1721,
MOVBE32mr = 1722,
MOVBE32rm = 1723,
MOVBE64mr = 1724,
MOVBE64rm = 1725,
MOVDDUPrm = 1726,
MOVDDUPrr = 1727,
MOVDI2PDIrm = 1728,
MOVDI2PDIrr = 1729,
MOVDI2SSrm = 1730,
MOVDI2SSrr = 1731,
MOVDQAmr = 1732,
MOVDQArm = 1733,
MOVDQArr = 1734,
MOVDQArr_REV = 1735,
MOVDQUmr = 1736,
MOVDQUrm = 1737,
MOVDQUrr = 1738,
MOVDQUrr_REV = 1739,
MOVHLPSrr = 1740,
MOVHPDmr = 1741,
MOVHPDrm = 1742,
MOVHPSmr = 1743,
MOVHPSrm = 1744,
MOVLHPSrr = 1745,
MOVLPDmr = 1746,
MOVLPDrm = 1747,
MOVLPSmr = 1748,
MOVLPSrm = 1749,
MOVMSKPDrr = 1750,
MOVMSKPSrr = 1751,
MOVNTDQArm = 1752,
MOVNTDQmr = 1753,
MOVNTI_64mr = 1754,
MOVNTImr = 1755,
MOVNTPDmr = 1756,
MOVNTPSmr = 1757,
MOVNTSD = 1758,
MOVNTSS = 1759,
MOVPC32r = 1760,
MOVPDI2DImr = 1761,
MOVPDI2DIrr = 1762,
MOVPQI2QImr = 1763,
MOVPQI2QIrr = 1764,
MOVPQIto64rm = 1765,
MOVPQIto64rr = 1766,
MOVQI2PQIrm = 1767,
MOVSB = 1768,
MOVSDmr = 1769,
MOVSDrm = 1770,
MOVSDrr = 1771,
MOVSDrr_REV = 1772,
MOVSDto64mr = 1773,
MOVSDto64rr = 1774,
MOVSHDUPrm = 1775,
MOVSHDUPrr = 1776,
MOVSL = 1777,
MOVSLDUPrm = 1778,
MOVSLDUPrr = 1779,
MOVSQ = 1780,
MOVSS2DImr = 1781,
MOVSS2DIrr = 1782,
MOVSSmr = 1783,
MOVSSrm = 1784,
MOVSSrr = 1785,
MOVSSrr_REV = 1786,
MOVSW = 1787,
MOVSX16rm8 = 1788,
MOVSX16rr8 = 1789,
MOVSX32_NOREXrm8 = 1790,
MOVSX32_NOREXrr8 = 1791,
MOVSX32rm16 = 1792,
MOVSX32rm8 = 1793,
MOVSX32rr16 = 1794,
MOVSX32rr8 = 1795,
MOVSX64rm16 = 1796,
MOVSX64rm32 = 1797,
MOVSX64rm8 = 1798,
MOVSX64rr16 = 1799,
MOVSX64rr32 = 1800,
MOVSX64rr8 = 1801,
MOVUPDmr = 1802,
MOVUPDrm = 1803,
MOVUPDrr = 1804,
MOVUPDrr_REV = 1805,
MOVUPSmr = 1806,
MOVUPSrm = 1807,
MOVUPSrr = 1808,
MOVUPSrr_REV = 1809,
MOVZPQILo2PQIrm = 1810,
MOVZPQILo2PQIrr = 1811,
MOVZQI2PQIrm = 1812,
MOVZX16rm8 = 1813,
MOVZX16rr8 = 1814,
MOVZX32_NOREXrm8 = 1815,
MOVZX32_NOREXrr8 = 1816,
MOVZX32rm16 = 1817,
MOVZX32rm8 = 1818,
MOVZX32rr16 = 1819,
MOVZX32rr8 = 1820,
MOVZX64rm16 = 1821,
MOVZX64rm8 = 1822,
MOVZX64rr16 = 1823,
MOVZX64rr8 = 1824,
MPSADBWrmi = 1825,
MPSADBWrri = 1826,
MUL16m = 1827,
MUL16r = 1828,
MUL32m = 1829,
MUL32r = 1830,
MUL64m = 1831,
MUL64r = 1832,
MUL8m = 1833,
MUL8r = 1834,
MULPDrm = 1835,
MULPDrr = 1836,
MULPSrm = 1837,
MULPSrr = 1838,
MULSDrm = 1839,
MULSDrm_Int = 1840,
MULSDrr = 1841,
MULSDrr_Int = 1842,
MULSSrm = 1843,
MULSSrm_Int = 1844,
MULSSrr = 1845,
MULSSrr_Int = 1846,
MULX32rm = 1847,
MULX32rr = 1848,
MULX64rm = 1849,
MULX64rr = 1850,
MUL_F32m = 1851,
MUL_F64m = 1852,
MUL_FI16m = 1853,
MUL_FI32m = 1854,
MUL_FPrST0 = 1855,
MUL_FST0r = 1856,
MUL_Fp32 = 1857,
MUL_Fp32m = 1858,
MUL_Fp64 = 1859,
MUL_Fp64m = 1860,
MUL_Fp64m32 = 1861,
MUL_Fp80 = 1862,
MUL_Fp80m32 = 1863,
MUL_Fp80m64 = 1864,
MUL_FpI16m32 = 1865,
MUL_FpI16m64 = 1866,
MUL_FpI16m80 = 1867,
MUL_FpI32m32 = 1868,
MUL_FpI32m64 = 1869,
MUL_FpI32m80 = 1870,
MUL_FrST0 = 1871,
MWAITXrr = 1872,
MWAITrr = 1873,
NEG16m = 1874,
NEG16r = 1875,
NEG32m = 1876,
NEG32r = 1877,
NEG64m = 1878,
NEG64r = 1879,
NEG8m = 1880,
NEG8r = 1881,
NOOP = 1882,
NOOP18_16m4 = 1883,
NOOP18_16m5 = 1884,
NOOP18_16m6 = 1885,
NOOP18_16m7 = 1886,
NOOP18_16r4 = 1887,
NOOP18_16r5 = 1888,
NOOP18_16r6 = 1889,
NOOP18_16r7 = 1890,
NOOP18_m4 = 1891,
NOOP18_m5 = 1892,
NOOP18_m6 = 1893,
NOOP18_m7 = 1894,
NOOP18_r4 = 1895,
NOOP18_r5 = 1896,
NOOP18_r6 = 1897,
NOOP18_r7 = 1898,
NOOP19rr = 1899,
NOOPL = 1900,
NOOPL_19 = 1901,
NOOPL_1c = 1902,
NOOPL_1d = 1903,
NOOPL_1e = 1904,
NOOPW = 1905,
NOOPW_19 = 1906,
NOOPW_1c = 1907,
NOOPW_1d = 1908,
NOOPW_1e = 1909,
NOT16m = 1910,
NOT16r = 1911,
NOT32m = 1912,
NOT32r = 1913,
NOT64m = 1914,
NOT64r = 1915,
NOT8m = 1916,
NOT8r = 1917,
OR16i16 = 1918,
OR16mi = 1919,
OR16mi8 = 1920,
OR16mr = 1921,
OR16ri = 1922,
OR16ri8 = 1923,
OR16rm = 1924,
OR16rr = 1925,
OR16rr_REV = 1926,
OR32i32 = 1927,
OR32mi = 1928,
OR32mi8 = 1929,
OR32mr = 1930,
OR32mrLocked = 1931,
OR32ri = 1932,
OR32ri8 = 1933,
OR32rm = 1934,
OR32rr = 1935,
OR32rr_REV = 1936,
OR64i32 = 1937,
OR64mi32 = 1938,
OR64mi8 = 1939,
OR64mr = 1940,
OR64ri32 = 1941,
OR64ri8 = 1942,
OR64rm = 1943,
OR64rr = 1944,
OR64rr_REV = 1945,
OR8i8 = 1946,
OR8mi = 1947,
OR8mi8 = 1948,
OR8mr = 1949,
OR8ri = 1950,
OR8ri8 = 1951,
OR8rm = 1952,
OR8rr = 1953,
OR8rr_REV = 1954,
ORPDrm = 1955,
ORPDrr = 1956,
ORPSrm = 1957,
ORPSrr = 1958,
OUT16ir = 1959,
OUT16rr = 1960,
OUT32ir = 1961,
OUT32rr = 1962,
OUT8ir = 1963,
OUT8rr = 1964,
OUTSB = 1965,
OUTSL = 1966,
OUTSW = 1967,
PABSBrm128 = 1968,
PABSBrr128 = 1969,
PABSDrm128 = 1970,
PABSDrr128 = 1971,
PABSWrm128 = 1972,
PABSWrr128 = 1973,
PACKSSDWrm = 1974,
PACKSSDWrr = 1975,
PACKSSWBrm = 1976,
PACKSSWBrr = 1977,
PACKUSDWrm = 1978,
PACKUSDWrr = 1979,
PACKUSWBrm = 1980,
PACKUSWBrr = 1981,
PADDBrm = 1982,
PADDBrr = 1983,
PADDDrm = 1984,
PADDDrr = 1985,
PADDQrm = 1986,
PADDQrr = 1987,
PADDSBrm = 1988,
PADDSBrr = 1989,
PADDSWrm = 1990,
PADDSWrr = 1991,
PADDUSBrm = 1992,
PADDUSBrr = 1993,
PADDUSWrm = 1994,
PADDUSWrr = 1995,
PADDWrm = 1996,
PADDWrr = 1997,
PALIGNR128rm = 1998,
PALIGNR128rr = 1999,
PANDNrm = 2000,
PANDNrr = 2001,
PANDrm = 2002,
PANDrr = 2003,
PAUSE = 2004,
PAVGBrm = 2005,
PAVGBrr = 2006,
PAVGUSBrm = 2007,
PAVGUSBrr = 2008,
PAVGWrm = 2009,
PAVGWrr = 2010,
PBLENDVBrm0 = 2011,
PBLENDVBrr0 = 2012,
PBLENDWrmi = 2013,
PBLENDWrri = 2014,
PCLMULQDQrm = 2015,
PCLMULQDQrr = 2016,
PCMPEQBrm = 2017,
PCMPEQBrr = 2018,
PCMPEQDrm = 2019,
PCMPEQDrr = 2020,
PCMPEQQrm = 2021,
PCMPEQQrr = 2022,
PCMPEQWrm = 2023,
PCMPEQWrr = 2024,
PCMPESTRIMEM = 2025,
PCMPESTRIREG = 2026,
PCMPESTRIrm = 2027,
PCMPESTRIrr = 2028,
PCMPESTRM128MEM = 2029,
PCMPESTRM128REG = 2030,
PCMPESTRM128rm = 2031,
PCMPESTRM128rr = 2032,
PCMPGTBrm = 2033,
PCMPGTBrr = 2034,
PCMPGTDrm = 2035,
PCMPGTDrr = 2036,
PCMPGTQrm = 2037,
PCMPGTQrr = 2038,
PCMPGTWrm = 2039,
PCMPGTWrr = 2040,
PCMPISTRIMEM = 2041,
PCMPISTRIREG = 2042,
PCMPISTRIrm = 2043,
PCMPISTRIrr = 2044,
PCMPISTRM128MEM = 2045,
PCMPISTRM128REG = 2046,
PCMPISTRM128rm = 2047,
PCMPISTRM128rr = 2048,
PCOMMIT = 2049,
PDEP32rm = 2050,
PDEP32rr = 2051,
PDEP64rm = 2052,
PDEP64rr = 2053,
PEXT32rm = 2054,
PEXT32rr = 2055,
PEXT64rm = 2056,
PEXT64rr = 2057,
PEXTRBmr = 2058,
PEXTRBrr = 2059,
PEXTRDmr = 2060,
PEXTRDrr = 2061,
PEXTRQmr = 2062,
PEXTRQrr = 2063,
PEXTRWmr = 2064,
PEXTRWri = 2065,
PEXTRWrr_REV = 2066,
PF2IDrm = 2067,
PF2IDrr = 2068,
PF2IWrm = 2069,
PF2IWrr = 2070,
PFACCrm = 2071,
PFACCrr = 2072,
PFADDrm = 2073,
PFADDrr = 2074,
PFCMPEQrm = 2075,
PFCMPEQrr = 2076,
PFCMPGErm = 2077,
PFCMPGErr = 2078,
PFCMPGTrm = 2079,
PFCMPGTrr = 2080,
PFMAXrm = 2081,
PFMAXrr = 2082,
PFMINrm = 2083,
PFMINrr = 2084,
PFMULrm = 2085,
PFMULrr = 2086,
PFNACCrm = 2087,
PFNACCrr = 2088,
PFPNACCrm = 2089,
PFPNACCrr = 2090,
PFRCPIT1rm = 2091,
PFRCPIT1rr = 2092,
PFRCPIT2rm = 2093,
PFRCPIT2rr = 2094,
PFRCPrm = 2095,
PFRCPrr = 2096,
PFRSQIT1rm = 2097,
PFRSQIT1rr = 2098,
PFRSQRTrm = 2099,
PFRSQRTrr = 2100,
PFSUBRrm = 2101,
PFSUBRrr = 2102,
PFSUBrm = 2103,
PFSUBrr = 2104,
PHADDDrm = 2105,
PHADDDrr = 2106,
PHADDSWrm128 = 2107,
PHADDSWrr128 = 2108,
PHADDWrm = 2109,
PHADDWrr = 2110,
PHMINPOSUWrm128 = 2111,
PHMINPOSUWrr128 = 2112,
PHSUBDrm = 2113,
PHSUBDrr = 2114,
PHSUBSWrm128 = 2115,
PHSUBSWrr128 = 2116,
PHSUBWrm = 2117,
PHSUBWrr = 2118,
PI2FDrm = 2119,
PI2FDrr = 2120,
PI2FWrm = 2121,
PI2FWrr = 2122,
PINSRBrm = 2123,
PINSRBrr = 2124,
PINSRDrm = 2125,
PINSRDrr = 2126,
PINSRQrm = 2127,
PINSRQrr = 2128,
PINSRWrmi = 2129,
PINSRWrri = 2130,
PMADDUBSWrm128 = 2131,
PMADDUBSWrr128 = 2132,
PMADDWDrm = 2133,
PMADDWDrr = 2134,
PMAXSBrm = 2135,
PMAXSBrr = 2136,
PMAXSDrm = 2137,
PMAXSDrr = 2138,
PMAXSWrm = 2139,
PMAXSWrr = 2140,
PMAXUBrm = 2141,
PMAXUBrr = 2142,
PMAXUDrm = 2143,
PMAXUDrr = 2144,
PMAXUWrm = 2145,
PMAXUWrr = 2146,
PMINSBrm = 2147,
PMINSBrr = 2148,
PMINSDrm = 2149,
PMINSDrr = 2150,
PMINSWrm = 2151,
PMINSWrr = 2152,
PMINUBrm = 2153,
PMINUBrr = 2154,
PMINUDrm = 2155,
PMINUDrr = 2156,
PMINUWrm = 2157,
PMINUWrr = 2158,
PMOVMSKBrr = 2159,
PMOVSXBDrm = 2160,
PMOVSXBDrr = 2161,
PMOVSXBQrm = 2162,
PMOVSXBQrr = 2163,
PMOVSXBWrm = 2164,
PMOVSXBWrr = 2165,
PMOVSXDQrm = 2166,
PMOVSXDQrr = 2167,
PMOVSXWDrm = 2168,
PMOVSXWDrr = 2169,
PMOVSXWQrm = 2170,
PMOVSXWQrr = 2171,
PMOVZXBDrm = 2172,
PMOVZXBDrr = 2173,
PMOVZXBQrm = 2174,
PMOVZXBQrr = 2175,
PMOVZXBWrm = 2176,
PMOVZXBWrr = 2177,
PMOVZXDQrm = 2178,
PMOVZXDQrr = 2179,
PMOVZXWDrm = 2180,
PMOVZXWDrr = 2181,
PMOVZXWQrm = 2182,
PMOVZXWQrr = 2183,
PMULDQrm = 2184,
PMULDQrr = 2185,
PMULHRSWrm128 = 2186,
PMULHRSWrr128 = 2187,
PMULHRWrm = 2188,
PMULHRWrr = 2189,
PMULHUWrm = 2190,
PMULHUWrr = 2191,
PMULHWrm = 2192,
PMULHWrr = 2193,
PMULLDrm = 2194,
PMULLDrr = 2195,
PMULLWrm = 2196,
PMULLWrr = 2197,
PMULUDQrm = 2198,
PMULUDQrr = 2199,
POP16r = 2200,
POP16rmm = 2201,
POP16rmr = 2202,
POP32r = 2203,
POP32rmm = 2204,
POP32rmr = 2205,
POP64r = 2206,
POP64rmm = 2207,
POP64rmr = 2208,
POPA16 = 2209,
POPA32 = 2210,
POPCNT16rm = 2211,
POPCNT16rr = 2212,
POPCNT32rm = 2213,
POPCNT32rr = 2214,
POPCNT64rm = 2215,
POPCNT64rr = 2216,
POPDS16 = 2217,
POPDS32 = 2218,
POPES16 = 2219,
POPES32 = 2220,
POPF16 = 2221,
POPF32 = 2222,
POPF64 = 2223,
POPFS16 = 2224,
POPFS32 = 2225,
POPFS64 = 2226,
POPGS16 = 2227,
POPGS32 = 2228,
POPGS64 = 2229,
POPSS16 = 2230,
POPSS32 = 2231,
PORrm = 2232,
PORrr = 2233,
PREFETCH = 2234,
PREFETCHNTA = 2235,
PREFETCHT0 = 2236,
PREFETCHT1 = 2237,
PREFETCHT2 = 2238,
PREFETCHW = 2239,
PSADBWrm = 2240,
PSADBWrr = 2241,
PSHUFBrm = 2242,
PSHUFBrr = 2243,
PSHUFDmi = 2244,
PSHUFDri = 2245,
PSHUFHWmi = 2246,
PSHUFHWri = 2247,
PSHUFLWmi = 2248,
PSHUFLWri = 2249,
PSIGNBrm = 2250,
PSIGNBrr = 2251,
PSIGNDrm = 2252,
PSIGNDrr = 2253,
PSIGNWrm = 2254,
PSIGNWrr = 2255,
PSLLDQri = 2256,
PSLLDri = 2257,
PSLLDrm = 2258,
PSLLDrr = 2259,
PSLLQri = 2260,
PSLLQrm = 2261,
PSLLQrr = 2262,
PSLLWri = 2263,
PSLLWrm = 2264,
PSLLWrr = 2265,
PSRADri = 2266,
PSRADrm = 2267,
PSRADrr = 2268,
PSRAWri = 2269,
PSRAWrm = 2270,
PSRAWrr = 2271,
PSRLDQri = 2272,
PSRLDri = 2273,
PSRLDrm = 2274,
PSRLDrr = 2275,
PSRLQri = 2276,
PSRLQrm = 2277,
PSRLQrr = 2278,
PSRLWri = 2279,
PSRLWrm = 2280,
PSRLWrr = 2281,
PSUBBrm = 2282,
PSUBBrr = 2283,
PSUBDrm = 2284,
PSUBDrr = 2285,
PSUBQrm = 2286,
PSUBQrr = 2287,
PSUBSBrm = 2288,
PSUBSBrr = 2289,
PSUBSWrm = 2290,
PSUBSWrr = 2291,
PSUBUSBrm = 2292,
PSUBUSBrr = 2293,
PSUBUSWrm = 2294,
PSUBUSWrr = 2295,
PSUBWrm = 2296,
PSUBWrr = 2297,
PSWAPDrm = 2298,
PSWAPDrr = 2299,
PTESTrm = 2300,
PTESTrr = 2301,
PUNPCKHBWrm = 2302,
PUNPCKHBWrr = 2303,
PUNPCKHDQrm = 2304,
PUNPCKHDQrr = 2305,
PUNPCKHQDQrm = 2306,
PUNPCKHQDQrr = 2307,
PUNPCKHWDrm = 2308,
PUNPCKHWDrr = 2309,
PUNPCKLBWrm = 2310,
PUNPCKLBWrr = 2311,
PUNPCKLDQrm = 2312,
PUNPCKLDQrr = 2313,
PUNPCKLQDQrm = 2314,
PUNPCKLQDQrr = 2315,
PUNPCKLWDrm = 2316,
PUNPCKLWDrr = 2317,
PUSH16i8 = 2318,
PUSH16r = 2319,
PUSH16rmm = 2320,
PUSH16rmr = 2321,
PUSH32i8 = 2322,
PUSH32r = 2323,
PUSH32rmm = 2324,
PUSH32rmr = 2325,
PUSH64i32 = 2326,
PUSH64i8 = 2327,
PUSH64r = 2328,
PUSH64rmm = 2329,
PUSH64rmr = 2330,
PUSHA16 = 2331,
PUSHA32 = 2332,
PUSHCS16 = 2333,
PUSHCS32 = 2334,
PUSHDS16 = 2335,
PUSHDS32 = 2336,
PUSHES16 = 2337,
PUSHES32 = 2338,
PUSHF16 = 2339,
PUSHF32 = 2340,
PUSHF64 = 2341,
PUSHFS16 = 2342,
PUSHFS32 = 2343,
PUSHFS64 = 2344,
PUSHGS16 = 2345,
PUSHGS32 = 2346,
PUSHGS64 = 2347,
PUSHSS16 = 2348,
PUSHSS32 = 2349,
PUSHi16 = 2350,
PUSHi32 = 2351,
PXORrm = 2352,
PXORrr = 2353,
RCL16m1 = 2354,
RCL16mCL = 2355,
RCL16mi = 2356,
RCL16r1 = 2357,
RCL16rCL = 2358,
RCL16ri = 2359,
RCL32m1 = 2360,
RCL32mCL = 2361,
RCL32mi = 2362,
RCL32r1 = 2363,
RCL32rCL = 2364,
RCL32ri = 2365,
RCL64m1 = 2366,
RCL64mCL = 2367,
RCL64mi = 2368,
RCL64r1 = 2369,
RCL64rCL = 2370,
RCL64ri = 2371,
RCL8m1 = 2372,
RCL8mCL = 2373,
RCL8mi = 2374,
RCL8r1 = 2375,
RCL8rCL = 2376,
RCL8ri = 2377,
RCPPSm = 2378,
RCPPSr = 2379,
RCPSSm = 2380,
RCPSSm_Int = 2381,
RCPSSr = 2382,
RCPSSr_Int = 2383,
RCR16m1 = 2384,
RCR16mCL = 2385,
RCR16mi = 2386,
RCR16r1 = 2387,
RCR16rCL = 2388,
RCR16ri = 2389,
RCR32m1 = 2390,
RCR32mCL = 2391,
RCR32mi = 2392,
RCR32r1 = 2393,
RCR32rCL = 2394,
RCR32ri = 2395,
RCR64m1 = 2396,
RCR64mCL = 2397,
RCR64mi = 2398,
RCR64r1 = 2399,
RCR64rCL = 2400,
RCR64ri = 2401,
RCR8m1 = 2402,
RCR8mCL = 2403,
RCR8mi = 2404,
RCR8r1 = 2405,
RCR8rCL = 2406,
RCR8ri = 2407,
RDFLAGS32 = 2408,
RDFLAGS64 = 2409,
RDFSBASE = 2410,
RDFSBASE64 = 2411,
RDGSBASE = 2412,
RDGSBASE64 = 2413,
RDMSR = 2414,
RDPKRU = 2415,
RDPKRUr = 2416,
RDPMC = 2417,
RDRAND16r = 2418,
RDRAND32r = 2419,
RDRAND64r = 2420,
RDSEED16r = 2421,
RDSEED32r = 2422,
RDSEED64r = 2423,
RDTSC = 2424,
RDTSCP = 2425,
RELEASE_ADD32mi = 2426,
RELEASE_ADD32mr = 2427,
RELEASE_ADD64mi32 = 2428,
RELEASE_ADD64mr = 2429,
RELEASE_ADD8mi = 2430,
RELEASE_ADD8mr = 2431,
RELEASE_AND32mi = 2432,
RELEASE_AND32mr = 2433,
RELEASE_AND64mi32 = 2434,
RELEASE_AND64mr = 2435,
RELEASE_AND8mi = 2436,
RELEASE_AND8mr = 2437,
RELEASE_DEC16m = 2438,
RELEASE_DEC32m = 2439,
RELEASE_DEC64m = 2440,
RELEASE_DEC8m = 2441,
RELEASE_FADD32mr = 2442,
RELEASE_FADD64mr = 2443,
RELEASE_INC16m = 2444,
RELEASE_INC32m = 2445,
RELEASE_INC64m = 2446,
RELEASE_INC8m = 2447,
RELEASE_MOV16mi = 2448,
RELEASE_MOV16mr = 2449,
RELEASE_MOV32mi = 2450,
RELEASE_MOV32mr = 2451,
RELEASE_MOV64mi32 = 2452,
RELEASE_MOV64mr = 2453,
RELEASE_MOV8mi = 2454,
RELEASE_MOV8mr = 2455,
RELEASE_OR32mi = 2456,
RELEASE_OR32mr = 2457,
RELEASE_OR64mi32 = 2458,
RELEASE_OR64mr = 2459,
RELEASE_OR8mi = 2460,
RELEASE_OR8mr = 2461,
RELEASE_XOR32mi = 2462,
RELEASE_XOR32mr = 2463,
RELEASE_XOR64mi32 = 2464,
RELEASE_XOR64mr = 2465,
RELEASE_XOR8mi = 2466,
RELEASE_XOR8mr = 2467,
REPNE_PREFIX = 2468,
REP_MOVSB_32 = 2469,
REP_MOVSB_64 = 2470,
REP_MOVSD_32 = 2471,
REP_MOVSD_64 = 2472,
REP_MOVSQ_64 = 2473,
REP_MOVSW_32 = 2474,
REP_MOVSW_64 = 2475,
REP_PREFIX = 2476,
REP_STOSB_32 = 2477,
REP_STOSB_64 = 2478,
REP_STOSD_32 = 2479,
REP_STOSD_64 = 2480,
REP_STOSQ_64 = 2481,
REP_STOSW_32 = 2482,
REP_STOSW_64 = 2483,
RETIL = 2484,
RETIQ = 2485,
RETIW = 2486,
RETL = 2487,
RETQ = 2488,
RETW = 2489,
REX64_PREFIX = 2490,
ROL16m1 = 2491,
ROL16mCL = 2492,
ROL16mi = 2493,
ROL16r1 = 2494,
ROL16rCL = 2495,
ROL16ri = 2496,
ROL32m1 = 2497,
ROL32mCL = 2498,
ROL32mi = 2499,
ROL32r1 = 2500,
ROL32rCL = 2501,
ROL32ri = 2502,
ROL64m1 = 2503,
ROL64mCL = 2504,
ROL64mi = 2505,
ROL64r1 = 2506,
ROL64rCL = 2507,
ROL64ri = 2508,
ROL8m1 = 2509,
ROL8mCL = 2510,
ROL8mi = 2511,
ROL8r1 = 2512,
ROL8rCL = 2513,
ROL8ri = 2514,
ROR16m1 = 2515,
ROR16mCL = 2516,
ROR16mi = 2517,
ROR16r1 = 2518,
ROR16rCL = 2519,
ROR16ri = 2520,
ROR32m1 = 2521,
ROR32mCL = 2522,
ROR32mi = 2523,
ROR32r1 = 2524,
ROR32rCL = 2525,
ROR32ri = 2526,
ROR64m1 = 2527,
ROR64mCL = 2528,
ROR64mi = 2529,
ROR64r1 = 2530,
ROR64rCL = 2531,
ROR64ri = 2532,
ROR8m1 = 2533,
ROR8mCL = 2534,
ROR8mi = 2535,
ROR8r1 = 2536,
ROR8rCL = 2537,
ROR8ri = 2538,
RORX32mi = 2539,
RORX32ri = 2540,
RORX64mi = 2541,
RORX64ri = 2542,
ROUNDPDm = 2543,
ROUNDPDr = 2544,
ROUNDPSm = 2545,
ROUNDPSr = 2546,
ROUNDSDm = 2547,
ROUNDSDr = 2548,
ROUNDSDr_Int = 2549,
ROUNDSSm = 2550,
ROUNDSSr = 2551,
ROUNDSSr_Int = 2552,
RSM = 2553,
RSQRTPSm = 2554,
RSQRTPSr = 2555,
RSQRTSSm = 2556,
RSQRTSSm_Int = 2557,
RSQRTSSr = 2558,
RSQRTSSr_Int = 2559,
SAHF = 2560,
SALC = 2561,
SAR16m1 = 2562,
SAR16mCL = 2563,
SAR16mi = 2564,
SAR16r1 = 2565,
SAR16rCL = 2566,
SAR16ri = 2567,
SAR32m1 = 2568,
SAR32mCL = 2569,
SAR32mi = 2570,
SAR32r1 = 2571,
SAR32rCL = 2572,
SAR32ri = 2573,
SAR64m1 = 2574,
SAR64mCL = 2575,
SAR64mi = 2576,
SAR64r1 = 2577,
SAR64rCL = 2578,
SAR64ri = 2579,
SAR8m1 = 2580,
SAR8mCL = 2581,
SAR8mi = 2582,
SAR8r1 = 2583,
SAR8rCL = 2584,
SAR8ri = 2585,
SARX32rm = 2586,
SARX32rr = 2587,
SARX64rm = 2588,
SARX64rr = 2589,
SBB16i16 = 2590,
SBB16mi = 2591,
SBB16mi8 = 2592,
SBB16mr = 2593,
SBB16ri = 2594,
SBB16ri8 = 2595,
SBB16rm = 2596,
SBB16rr = 2597,
SBB16rr_REV = 2598,
SBB32i32 = 2599,
SBB32mi = 2600,
SBB32mi8 = 2601,
SBB32mr = 2602,
SBB32ri = 2603,
SBB32ri8 = 2604,
SBB32rm = 2605,
SBB32rr = 2606,
SBB32rr_REV = 2607,
SBB64i32 = 2608,
SBB64mi32 = 2609,
SBB64mi8 = 2610,
SBB64mr = 2611,
SBB64ri32 = 2612,
SBB64ri8 = 2613,
SBB64rm = 2614,
SBB64rr = 2615,
SBB64rr_REV = 2616,
SBB8i8 = 2617,
SBB8mi = 2618,
SBB8mi8 = 2619,
SBB8mr = 2620,
SBB8ri = 2621,
SBB8ri8 = 2622,
SBB8rm = 2623,
SBB8rr = 2624,
SBB8rr_REV = 2625,
SCASB = 2626,
SCASL = 2627,
SCASQ = 2628,
SCASW = 2629,
SEG_ALLOCA_32 = 2630,
SEG_ALLOCA_64 = 2631,
SEH_EndPrologue = 2632,
SEH_Epilogue = 2633,
SEH_PushFrame = 2634,
SEH_PushReg = 2635,
SEH_SaveReg = 2636,
SEH_SaveXMM = 2637,
SEH_SetFrame = 2638,
SEH_StackAlloc = 2639,
SETAEm = 2640,
SETAEr = 2641,
SETAm = 2642,
SETAr = 2643,
SETBEm = 2644,
SETBEr = 2645,
SETB_C16r = 2646,
SETB_C32r = 2647,
SETB_C64r = 2648,
SETB_C8r = 2649,
SETBm = 2650,
SETBr = 2651,
SETEm = 2652,
SETEr = 2653,
SETGEm = 2654,
SETGEr = 2655,
SETGm = 2656,
SETGr = 2657,
SETLEm = 2658,
SETLEr = 2659,
SETLm = 2660,
SETLr = 2661,
SETNEm = 2662,
SETNEr = 2663,
SETNOm = 2664,
SETNOr = 2665,
SETNPm = 2666,
SETNPr = 2667,
SETNSm = 2668,
SETNSr = 2669,
SETOm = 2670,
SETOr = 2671,
SETPm = 2672,
SETPr = 2673,
SETSm = 2674,
SETSr = 2675,
SFENCE = 2676,
SGDT16m = 2677,
SGDT32m = 2678,
SGDT64m = 2679,
SHA1MSG1rm = 2680,
SHA1MSG1rr = 2681,
SHA1MSG2rm = 2682,
SHA1MSG2rr = 2683,
SHA1NEXTErm = 2684,
SHA1NEXTErr = 2685,
SHA1RNDS4rmi = 2686,
SHA1RNDS4rri = 2687,
SHA256MSG1rm = 2688,
SHA256MSG1rr = 2689,
SHA256MSG2rm = 2690,
SHA256MSG2rr = 2691,
SHA256RNDS2rm = 2692,
SHA256RNDS2rr = 2693,
SHL16m1 = 2694,
SHL16mCL = 2695,
SHL16mi = 2696,
SHL16r1 = 2697,
SHL16rCL = 2698,
SHL16ri = 2699,
SHL32m1 = 2700,
SHL32mCL = 2701,
SHL32mi = 2702,
SHL32r1 = 2703,
SHL32rCL = 2704,
SHL32ri = 2705,
SHL64m1 = 2706,
SHL64mCL = 2707,
SHL64mi = 2708,
SHL64r1 = 2709,
SHL64rCL = 2710,
SHL64ri = 2711,
SHL8m1 = 2712,
SHL8mCL = 2713,
SHL8mi = 2714,
SHL8r1 = 2715,
SHL8rCL = 2716,
SHL8ri = 2717,
SHLD16mrCL = 2718,
SHLD16mri8 = 2719,
SHLD16rrCL = 2720,
SHLD16rri8 = 2721,
SHLD32mrCL = 2722,
SHLD32mri8 = 2723,
SHLD32rrCL = 2724,
SHLD32rri8 = 2725,
SHLD64mrCL = 2726,
SHLD64mri8 = 2727,
SHLD64rrCL = 2728,
SHLD64rri8 = 2729,
SHLX32rm = 2730,
SHLX32rr = 2731,
SHLX64rm = 2732,
SHLX64rr = 2733,
SHR16m1 = 2734,
SHR16mCL = 2735,
SHR16mi = 2736,
SHR16r1 = 2737,
SHR16rCL = 2738,
SHR16ri = 2739,
SHR32m1 = 2740,
SHR32mCL = 2741,
SHR32mi = 2742,
SHR32r1 = 2743,
SHR32rCL = 2744,
SHR32ri = 2745,
SHR64m1 = 2746,
SHR64mCL = 2747,
SHR64mi = 2748,
SHR64r1 = 2749,
SHR64rCL = 2750,
SHR64ri = 2751,
SHR8m1 = 2752,
SHR8mCL = 2753,
SHR8mi = 2754,
SHR8r1 = 2755,
SHR8rCL = 2756,
SHR8ri = 2757,
SHRD16mrCL = 2758,
SHRD16mri8 = 2759,
SHRD16rrCL = 2760,
SHRD16rri8 = 2761,
SHRD32mrCL = 2762,
SHRD32mri8 = 2763,
SHRD32rrCL = 2764,
SHRD32rri8 = 2765,
SHRD64mrCL = 2766,
SHRD64mri8 = 2767,
SHRD64rrCL = 2768,
SHRD64rri8 = 2769,
SHRX32rm = 2770,
SHRX32rr = 2771,
SHRX64rm = 2772,
SHRX64rr = 2773,
SHUFPDrmi = 2774,
SHUFPDrri = 2775,
SHUFPSrmi = 2776,
SHUFPSrri = 2777,
SIDT16m = 2778,
SIDT32m = 2779,
SIDT64m = 2780,
SIN_F = 2781,
SIN_Fp32 = 2782,
SIN_Fp64 = 2783,
SIN_Fp80 = 2784,
SKINIT = 2785,
SLDT16m = 2786,
SLDT16r = 2787,
SLDT32r = 2788,
SLDT64m = 2789,
SLDT64r = 2790,
SMSW16m = 2791,
SMSW16r = 2792,
SMSW32r = 2793,
SMSW64r = 2794,
SQRTPDm = 2795,
SQRTPDr = 2796,
SQRTPSm = 2797,
SQRTPSr = 2798,
SQRTSDm = 2799,
SQRTSDm_Int = 2800,
SQRTSDr = 2801,
SQRTSDr_Int = 2802,
SQRTSSm = 2803,
SQRTSSm_Int = 2804,
SQRTSSr = 2805,
SQRTSSr_Int = 2806,
SQRT_F = 2807,
SQRT_Fp32 = 2808,
SQRT_Fp64 = 2809,
SQRT_Fp80 = 2810,
SS_PREFIX = 2811,
STAC = 2812,
STC = 2813,
STD = 2814,
STGI = 2815,
STI = 2816,
STMXCSR = 2817,
STOSB = 2818,
STOSL = 2819,
STOSQ = 2820,
STOSW = 2821,
STR16r = 2822,
STR32r = 2823,
STR64r = 2824,
STRm = 2825,
ST_F32m = 2826,
ST_F64m = 2827,
ST_FCOMPST0r = 2828,
ST_FCOMPST0r_alt = 2829,
ST_FCOMST0r = 2830,
ST_FP32m = 2831,
ST_FP64m = 2832,
ST_FP80m = 2833,
ST_FPNCEST0r = 2834,
ST_FPST0r = 2835,
ST_FPST0r_alt = 2836,
ST_FPrr = 2837,
ST_FXCHST0r = 2838,
ST_FXCHST0r_alt = 2839,
ST_Fp32m = 2840,
ST_Fp64m = 2841,
ST_Fp64m32 = 2842,
ST_Fp80m32 = 2843,
ST_Fp80m64 = 2844,
ST_FpP32m = 2845,
ST_FpP64m = 2846,
ST_FpP64m32 = 2847,
ST_FpP80m = 2848,
ST_FpP80m32 = 2849,
ST_FpP80m64 = 2850,
ST_Frr = 2851,
SUB16i16 = 2852,
SUB16mi = 2853,
SUB16mi8 = 2854,
SUB16mr = 2855,
SUB16ri = 2856,
SUB16ri8 = 2857,
SUB16rm = 2858,
SUB16rr = 2859,
SUB16rr_REV = 2860,
SUB32i32 = 2861,
SUB32mi = 2862,
SUB32mi8 = 2863,
SUB32mr = 2864,
SUB32ri = 2865,
SUB32ri8 = 2866,
SUB32rm = 2867,
SUB32rr = 2868,
SUB32rr_REV = 2869,
SUB64i32 = 2870,
SUB64mi32 = 2871,
SUB64mi8 = 2872,
SUB64mr = 2873,
SUB64ri32 = 2874,
SUB64ri8 = 2875,
SUB64rm = 2876,
SUB64rr = 2877,
SUB64rr_REV = 2878,
SUB8i8 = 2879,
SUB8mi = 2880,
SUB8mi8 = 2881,
SUB8mr = 2882,
SUB8ri = 2883,
SUB8ri8 = 2884,
SUB8rm = 2885,
SUB8rr = 2886,
SUB8rr_REV = 2887,
SUBPDrm = 2888,
SUBPDrr = 2889,
SUBPSrm = 2890,
SUBPSrr = 2891,
SUBR_F32m = 2892,
SUBR_F64m = 2893,
SUBR_FI16m = 2894,
SUBR_FI32m = 2895,
SUBR_FPrST0 = 2896,
SUBR_FST0r = 2897,
SUBR_Fp32m = 2898,
SUBR_Fp64m = 2899,
SUBR_Fp64m32 = 2900,
SUBR_Fp80m32 = 2901,
SUBR_Fp80m64 = 2902,
SUBR_FpI16m32 = 2903,
SUBR_FpI16m64 = 2904,
SUBR_FpI16m80 = 2905,
SUBR_FpI32m32 = 2906,
SUBR_FpI32m64 = 2907,
SUBR_FpI32m80 = 2908,
SUBR_FrST0 = 2909,
SUBSDrm = 2910,
SUBSDrm_Int = 2911,
SUBSDrr = 2912,
SUBSDrr_Int = 2913,
SUBSSrm = 2914,
SUBSSrm_Int = 2915,
SUBSSrr = 2916,
SUBSSrr_Int = 2917,
SUB_F32m = 2918,
SUB_F64m = 2919,
SUB_FI16m = 2920,
SUB_FI32m = 2921,
SUB_FPrST0 = 2922,
SUB_FST0r = 2923,
SUB_Fp32 = 2924,
SUB_Fp32m = 2925,
SUB_Fp64 = 2926,
SUB_Fp64m = 2927,
SUB_Fp64m32 = 2928,
SUB_Fp80 = 2929,
SUB_Fp80m32 = 2930,
SUB_Fp80m64 = 2931,
SUB_FpI16m32 = 2932,
SUB_FpI16m64 = 2933,
SUB_FpI16m80 = 2934,
SUB_FpI32m32 = 2935,
SUB_FpI32m64 = 2936,
SUB_FpI32m80 = 2937,
SUB_FrST0 = 2938,
SWAPGS = 2939,
SYSCALL = 2940,
SYSENTER = 2941,
SYSEXIT = 2942,
SYSEXIT64 = 2943,
SYSRET = 2944,
SYSRET64 = 2945,
T1MSKC32rm = 2946,
T1MSKC32rr = 2947,
T1MSKC64rm = 2948,
T1MSKC64rr = 2949,
TAILJMPd = 2950,
TAILJMPd64 = 2951,
TAILJMPd64_REX = 2952,
TAILJMPm = 2953,
TAILJMPm64 = 2954,
TAILJMPm64_REX = 2955,
TAILJMPr = 2956,
TAILJMPr64 = 2957,
TAILJMPr64_REX = 2958,
TCRETURNdi = 2959,
TCRETURNdi64 = 2960,
TCRETURNmi = 2961,
TCRETURNmi64 = 2962,
TCRETURNri = 2963,
TCRETURNri64 = 2964,
TEST16i16 = 2965,
TEST16mi = 2966,
TEST16ri = 2967,
TEST16rm = 2968,
TEST16rr = 2969,
TEST32i32 = 2970,
TEST32mi = 2971,
TEST32ri = 2972,
TEST32rm = 2973,
TEST32rr = 2974,
TEST64i32 = 2975,
TEST64mi32 = 2976,
TEST64ri32 = 2977,
TEST64rm = 2978,
TEST64rr = 2979,
TEST8i8 = 2980,
TEST8mi = 2981,
TEST8ri = 2982,
TEST8ri_NOREX = 2983,
TEST8rm = 2984,
TEST8rr = 2985,
TLSCall_32 = 2986,
TLSCall_64 = 2987,
TLS_addr32 = 2988,
TLS_addr64 = 2989,
TLS_base_addr32 = 2990,
TLS_base_addr64 = 2991,
TRAP = 2992,
TST_F = 2993,
TST_Fp32 = 2994,
TST_Fp64 = 2995,
TST_Fp80 = 2996,
TZCNT16rm = 2997,
TZCNT16rr = 2998,
TZCNT32rm = 2999,
TZCNT32rr = 3000,
TZCNT64rm = 3001,
TZCNT64rr = 3002,
TZMSK32rm = 3003,
TZMSK32rr = 3004,
TZMSK64rm = 3005,
TZMSK64rr = 3006,
UCOMISDrm = 3007,
UCOMISDrr = 3008,
UCOMISSrm = 3009,
UCOMISSrr = 3010,
UCOM_FIPr = 3011,
UCOM_FIr = 3012,
UCOM_FPPr = 3013,
UCOM_FPr = 3014,
UCOM_FpIr32 = 3015,
UCOM_FpIr64 = 3016,
UCOM_FpIr80 = 3017,
UCOM_Fpr32 = 3018,
UCOM_Fpr64 = 3019,
UCOM_Fpr80 = 3020,
UCOM_Fr = 3021,
UD2B = 3022,
UNPCKHPDrm = 3023,
UNPCKHPDrr = 3024,
UNPCKHPSrm = 3025,
UNPCKHPSrr = 3026,
UNPCKLPDrm = 3027,
UNPCKLPDrr = 3028,
UNPCKLPSrm = 3029,
UNPCKLPSrr = 3030,
VAARG_64 = 3031,
VADDPDYrm = 3032,
VADDPDYrr = 3033,
VADDPDZ128rm = 3034,
VADDPDZ128rmb = 3035,
VADDPDZ128rmbk = 3036,
VADDPDZ128rmbkz = 3037,
VADDPDZ128rmk = 3038,
VADDPDZ128rmkz = 3039,
VADDPDZ128rr = 3040,
VADDPDZ128rrk = 3041,
VADDPDZ128rrkz = 3042,
VADDPDZ256rm = 3043,
VADDPDZ256rmb = 3044,
VADDPDZ256rmbk = 3045,
VADDPDZ256rmbkz = 3046,
VADDPDZ256rmk = 3047,
VADDPDZ256rmkz = 3048,
VADDPDZ256rr = 3049,
VADDPDZ256rrk = 3050,
VADDPDZ256rrkz = 3051,
VADDPDZrb = 3052,
VADDPDZrbk = 3053,
VADDPDZrbkz = 3054,
VADDPDZrm = 3055,
VADDPDZrmb = 3056,
VADDPDZrmbk = 3057,
VADDPDZrmbkz = 3058,
VADDPDZrmk = 3059,
VADDPDZrmkz = 3060,
VADDPDZrr = 3061,
VADDPDZrrk = 3062,
VADDPDZrrkz = 3063,
VADDPDrm = 3064,
VADDPDrr = 3065,
VADDPSYrm = 3066,
VADDPSYrr = 3067,
VADDPSZ128rm = 3068,
VADDPSZ128rmb = 3069,
VADDPSZ128rmbk = 3070,
VADDPSZ128rmbkz = 3071,
VADDPSZ128rmk = 3072,
VADDPSZ128rmkz = 3073,
VADDPSZ128rr = 3074,
VADDPSZ128rrk = 3075,
VADDPSZ128rrkz = 3076,
VADDPSZ256rm = 3077,
VADDPSZ256rmb = 3078,
VADDPSZ256rmbk = 3079,
VADDPSZ256rmbkz = 3080,
VADDPSZ256rmk = 3081,
VADDPSZ256rmkz = 3082,
VADDPSZ256rr = 3083,
VADDPSZ256rrk = 3084,
VADDPSZ256rrkz = 3085,
VADDPSZrb = 3086,
VADDPSZrbk = 3087,
VADDPSZrbkz = 3088,
VADDPSZrm = 3089,
VADDPSZrmb = 3090,
VADDPSZrmbk = 3091,
VADDPSZrmbkz = 3092,
VADDPSZrmk = 3093,
VADDPSZrmkz = 3094,
VADDPSZrr = 3095,
VADDPSZrrk = 3096,
VADDPSZrrkz = 3097,
VADDPSrm = 3098,
VADDPSrr = 3099,
VADDSDZrm = 3100,
VADDSDZrm_Int = 3101,
VADDSDZrm_Intk = 3102,
VADDSDZrm_Intkz = 3103,
VADDSDZrr = 3104,
VADDSDZrr_Int = 3105,
VADDSDZrr_Intk = 3106,
VADDSDZrr_Intkz = 3107,
VADDSDZrrb = 3108,
VADDSDZrrbk = 3109,
VADDSDZrrbkz = 3110,
VADDSDrm = 3111,
VADDSDrm_Int = 3112,
VADDSDrr = 3113,
VADDSDrr_Int = 3114,
VADDSSZrm = 3115,
VADDSSZrm_Int = 3116,
VADDSSZrm_Intk = 3117,
VADDSSZrm_Intkz = 3118,
VADDSSZrr = 3119,
VADDSSZrr_Int = 3120,
VADDSSZrr_Intk = 3121,
VADDSSZrr_Intkz = 3122,
VADDSSZrrb = 3123,
VADDSSZrrbk = 3124,
VADDSSZrrbkz = 3125,
VADDSSrm = 3126,
VADDSSrm_Int = 3127,
VADDSSrr = 3128,
VADDSSrr_Int = 3129,
VADDSUBPDYrm = 3130,
VADDSUBPDYrr = 3131,
VADDSUBPDrm = 3132,
VADDSUBPDrr = 3133,
VADDSUBPSYrm = 3134,
VADDSUBPSYrr = 3135,
VADDSUBPSrm = 3136,
VADDSUBPSrr = 3137,
VAESDECLASTrm = 3138,
VAESDECLASTrr = 3139,
VAESDECrm = 3140,
VAESDECrr = 3141,
VAESENCLASTrm = 3142,
VAESENCLASTrr = 3143,
VAESENCrm = 3144,
VAESENCrr = 3145,
VAESIMCrm = 3146,
VAESIMCrr = 3147,
VAESKEYGENASSIST128rm = 3148,
VAESKEYGENASSIST128rr = 3149,
VALIGNDZ128rmbi = 3150,
VALIGNDZ128rmbik = 3151,
VALIGNDZ128rmbikz = 3152,
VALIGNDZ128rmi = 3153,
VALIGNDZ128rmik = 3154,
VALIGNDZ128rmikz = 3155,
VALIGNDZ128rri = 3156,
VALIGNDZ128rrik = 3157,
VALIGNDZ128rrikz = 3158,
VALIGNDZ256rmbi = 3159,
VALIGNDZ256rmbik = 3160,
VALIGNDZ256rmbikz = 3161,
VALIGNDZ256rmi = 3162,
VALIGNDZ256rmik = 3163,
VALIGNDZ256rmikz = 3164,
VALIGNDZ256rri = 3165,
VALIGNDZ256rrik = 3166,
VALIGNDZ256rrikz = 3167,
VALIGNDZrmbi = 3168,
VALIGNDZrmbik = 3169,
VALIGNDZrmbikz = 3170,
VALIGNDZrmi = 3171,
VALIGNDZrmik = 3172,
VALIGNDZrmikz = 3173,
VALIGNDZrri = 3174,
VALIGNDZrrik = 3175,
VALIGNDZrrikz = 3176,
VALIGNQZ128rmbi = 3177,
VALIGNQZ128rmbik = 3178,
VALIGNQZ128rmbikz = 3179,
VALIGNQZ128rmi = 3180,
VALIGNQZ128rmik = 3181,
VALIGNQZ128rmikz = 3182,
VALIGNQZ128rri = 3183,
VALIGNQZ128rrik = 3184,
VALIGNQZ128rrikz = 3185,
VALIGNQZ256rmbi = 3186,
VALIGNQZ256rmbik = 3187,
VALIGNQZ256rmbikz = 3188,
VALIGNQZ256rmi = 3189,
VALIGNQZ256rmik = 3190,
VALIGNQZ256rmikz = 3191,
VALIGNQZ256rri = 3192,
VALIGNQZ256rrik = 3193,
VALIGNQZ256rrikz = 3194,
VALIGNQZrmbi = 3195,
VALIGNQZrmbik = 3196,
VALIGNQZrmbikz = 3197,
VALIGNQZrmi = 3198,
VALIGNQZrmik = 3199,
VALIGNQZrmikz = 3200,
VALIGNQZrri = 3201,
VALIGNQZrrik = 3202,
VALIGNQZrrikz = 3203,
VANDNPDYrm = 3204,
VANDNPDYrr = 3205,
VANDNPDZ128rm = 3206,
VANDNPDZ128rmb = 3207,
VANDNPDZ128rmbk = 3208,
VANDNPDZ128rmbkz = 3209,
VANDNPDZ128rmk = 3210,
VANDNPDZ128rmkz = 3211,
VANDNPDZ128rr = 3212,
VANDNPDZ128rrk = 3213,
VANDNPDZ128rrkz = 3214,
VANDNPDZ256rm = 3215,
VANDNPDZ256rmb = 3216,
VANDNPDZ256rmbk = 3217,
VANDNPDZ256rmbkz = 3218,
VANDNPDZ256rmk = 3219,
VANDNPDZ256rmkz = 3220,
VANDNPDZ256rr = 3221,
VANDNPDZ256rrk = 3222,
VANDNPDZ256rrkz = 3223,
VANDNPDZrm = 3224,
VANDNPDZrmb = 3225,
VANDNPDZrmbk = 3226,
VANDNPDZrmbkz = 3227,
VANDNPDZrmk = 3228,
VANDNPDZrmkz = 3229,
VANDNPDZrr = 3230,
VANDNPDZrrk = 3231,
VANDNPDZrrkz = 3232,
VANDNPDrm = 3233,
VANDNPDrr = 3234,
VANDNPSYrm = 3235,
VANDNPSYrr = 3236,
VANDNPSZ128rm = 3237,
VANDNPSZ128rmb = 3238,
VANDNPSZ128rmbk = 3239,
VANDNPSZ128rmbkz = 3240,
VANDNPSZ128rmk = 3241,
VANDNPSZ128rmkz = 3242,
VANDNPSZ128rr = 3243,
VANDNPSZ128rrk = 3244,
VANDNPSZ128rrkz = 3245,
VANDNPSZ256rm = 3246,
VANDNPSZ256rmb = 3247,
VANDNPSZ256rmbk = 3248,
VANDNPSZ256rmbkz = 3249,
VANDNPSZ256rmk = 3250,
VANDNPSZ256rmkz = 3251,
VANDNPSZ256rr = 3252,
VANDNPSZ256rrk = 3253,
VANDNPSZ256rrkz = 3254,
VANDNPSZrm = 3255,
VANDNPSZrmb = 3256,
VANDNPSZrmbk = 3257,
VANDNPSZrmbkz = 3258,
VANDNPSZrmk = 3259,
VANDNPSZrmkz = 3260,
VANDNPSZrr = 3261,
VANDNPSZrrk = 3262,
VANDNPSZrrkz = 3263,
VANDNPSrm = 3264,
VANDNPSrr = 3265,
VANDPDYrm = 3266,
VANDPDYrr = 3267,
VANDPDZ128rm = 3268,
VANDPDZ128rmb = 3269,
VANDPDZ128rmbk = 3270,
VANDPDZ128rmbkz = 3271,
VANDPDZ128rmk = 3272,
VANDPDZ128rmkz = 3273,
VANDPDZ128rr = 3274,
VANDPDZ128rrk = 3275,
VANDPDZ128rrkz = 3276,
VANDPDZ256rm = 3277,
VANDPDZ256rmb = 3278,
VANDPDZ256rmbk = 3279,
VANDPDZ256rmbkz = 3280,
VANDPDZ256rmk = 3281,
VANDPDZ256rmkz = 3282,
VANDPDZ256rr = 3283,
VANDPDZ256rrk = 3284,
VANDPDZ256rrkz = 3285,
VANDPDZrm = 3286,
VANDPDZrmb = 3287,
VANDPDZrmbk = 3288,
VANDPDZrmbkz = 3289,
VANDPDZrmk = 3290,
VANDPDZrmkz = 3291,
VANDPDZrr = 3292,
VANDPDZrrk = 3293,
VANDPDZrrkz = 3294,
VANDPDrm = 3295,
VANDPDrr = 3296,
VANDPSYrm = 3297,
VANDPSYrr = 3298,
VANDPSZ128rm = 3299,
VANDPSZ128rmb = 3300,
VANDPSZ128rmbk = 3301,
VANDPSZ128rmbkz = 3302,
VANDPSZ128rmk = 3303,
VANDPSZ128rmkz = 3304,
VANDPSZ128rr = 3305,
VANDPSZ128rrk = 3306,
VANDPSZ128rrkz = 3307,
VANDPSZ256rm = 3308,
VANDPSZ256rmb = 3309,
VANDPSZ256rmbk = 3310,
VANDPSZ256rmbkz = 3311,
VANDPSZ256rmk = 3312,
VANDPSZ256rmkz = 3313,
VANDPSZ256rr = 3314,
VANDPSZ256rrk = 3315,
VANDPSZ256rrkz = 3316,
VANDPSZrm = 3317,
VANDPSZrmb = 3318,
VANDPSZrmbk = 3319,
VANDPSZrmbkz = 3320,
VANDPSZrmk = 3321,
VANDPSZrmkz = 3322,
VANDPSZrr = 3323,
VANDPSZrrk = 3324,
VANDPSZrrkz = 3325,
VANDPSrm = 3326,
VANDPSrr = 3327,
VASTART_SAVE_XMM_REGS = 3328,
VBLENDMPDZ128rm = 3329,
VBLENDMPDZ128rmb = 3330,
VBLENDMPDZ128rmbk = 3331,
VBLENDMPDZ128rmk = 3332,
VBLENDMPDZ128rmkz = 3333,
VBLENDMPDZ128rr = 3334,
VBLENDMPDZ128rrk = 3335,
VBLENDMPDZ128rrkz = 3336,
VBLENDMPDZ256rm = 3337,
VBLENDMPDZ256rmb = 3338,
VBLENDMPDZ256rmbk = 3339,
VBLENDMPDZ256rmk = 3340,
VBLENDMPDZ256rmkz = 3341,
VBLENDMPDZ256rr = 3342,
VBLENDMPDZ256rrk = 3343,
VBLENDMPDZ256rrkz = 3344,
VBLENDMPDZrm = 3345,
VBLENDMPDZrmb = 3346,
VBLENDMPDZrmbk = 3347,
VBLENDMPDZrmk = 3348,
VBLENDMPDZrmkz = 3349,
VBLENDMPDZrr = 3350,
VBLENDMPDZrrk = 3351,
VBLENDMPDZrrkz = 3352,
VBLENDMPSZ128rm = 3353,
VBLENDMPSZ128rmb = 3354,
VBLENDMPSZ128rmbk = 3355,
VBLENDMPSZ128rmk = 3356,
VBLENDMPSZ128rmkz = 3357,
VBLENDMPSZ128rr = 3358,
VBLENDMPSZ128rrk = 3359,
VBLENDMPSZ128rrkz = 3360,
VBLENDMPSZ256rm = 3361,
VBLENDMPSZ256rmb = 3362,
VBLENDMPSZ256rmbk = 3363,
VBLENDMPSZ256rmk = 3364,
VBLENDMPSZ256rmkz = 3365,
VBLENDMPSZ256rr = 3366,
VBLENDMPSZ256rrk = 3367,
VBLENDMPSZ256rrkz = 3368,
VBLENDMPSZrm = 3369,
VBLENDMPSZrmb = 3370,
VBLENDMPSZrmbk = 3371,
VBLENDMPSZrmk = 3372,
VBLENDMPSZrmkz = 3373,
VBLENDMPSZrr = 3374,
VBLENDMPSZrrk = 3375,
VBLENDMPSZrrkz = 3376,
VBLENDPDYrmi = 3377,
VBLENDPDYrri = 3378,
VBLENDPDrmi = 3379,
VBLENDPDrri = 3380,
VBLENDPSYrmi = 3381,
VBLENDPSYrri = 3382,
VBLENDPSrmi = 3383,
VBLENDPSrri = 3384,
VBLENDVPDYrm = 3385,
VBLENDVPDYrr = 3386,
VBLENDVPDrm = 3387,
VBLENDVPDrr = 3388,
VBLENDVPSYrm = 3389,
VBLENDVPSYrr = 3390,
VBLENDVPSrm = 3391,
VBLENDVPSrr = 3392,
VBROADCASTF128 = 3393,
VBROADCASTF32X4Z256rm = 3394,
VBROADCASTF32X4Z256rmk = 3395,
VBROADCASTF32X4Z256rmkz = 3396,
VBROADCASTF32X4rm = 3397,
VBROADCASTF32X4rmk = 3398,
VBROADCASTF32X4rmkz = 3399,
VBROADCASTF32X8rm = 3400,
VBROADCASTF32X8rmk = 3401,
VBROADCASTF32X8rmkz = 3402,
VBROADCASTF64X2Z128rm = 3403,
VBROADCASTF64X2Z128rmk = 3404,
VBROADCASTF64X2Z128rmkz = 3405,
VBROADCASTF64X2rm = 3406,
VBROADCASTF64X2rmk = 3407,
VBROADCASTF64X2rmkz = 3408,
VBROADCASTF64X4rm = 3409,
VBROADCASTF64X4rmk = 3410,
VBROADCASTF64X4rmkz = 3411,
VBROADCASTI128 = 3412,
VBROADCASTI32X4Z256rm = 3413,
VBROADCASTI32X4Z256rmk = 3414,
VBROADCASTI32X4Z256rmkz = 3415,
VBROADCASTI32X4rm = 3416,
VBROADCASTI32X4rmk = 3417,
VBROADCASTI32X4rmkz = 3418,
VBROADCASTI32X8rm = 3419,
VBROADCASTI32X8rmk = 3420,
VBROADCASTI32X8rmkz = 3421,
VBROADCASTI64X2Z128rm = 3422,
VBROADCASTI64X2Z128rmk = 3423,
VBROADCASTI64X2Z128rmkz = 3424,
VBROADCASTI64X2rm = 3425,
VBROADCASTI64X2rmk = 3426,
VBROADCASTI64X2rmkz = 3427,
VBROADCASTI64X4rm = 3428,
VBROADCASTI64X4rmk = 3429,
VBROADCASTI64X4rmkz = 3430,
VBROADCASTSDYrm = 3431,
VBROADCASTSDYrr = 3432,
VBROADCASTSDZ256m = 3433,
VBROADCASTSDZ256mk = 3434,
VBROADCASTSDZ256mkz = 3435,
VBROADCASTSDZ256r = 3436,
VBROADCASTSDZ256rk = 3437,
VBROADCASTSDZ256rkz = 3438,
VBROADCASTSDZm = 3439,
VBROADCASTSDZmk = 3440,
VBROADCASTSDZmkz = 3441,
VBROADCASTSDZr = 3442,
VBROADCASTSDZrk = 3443,
VBROADCASTSDZrkz = 3444,
VBROADCASTSSYrm = 3445,
VBROADCASTSSYrr = 3446,
VBROADCASTSSZ128m = 3447,
VBROADCASTSSZ128mk = 3448,
VBROADCASTSSZ128mkz = 3449,
VBROADCASTSSZ128r = 3450,
VBROADCASTSSZ128rk = 3451,
VBROADCASTSSZ128rkz = 3452,
VBROADCASTSSZ256m = 3453,
VBROADCASTSSZ256mk = 3454,
VBROADCASTSSZ256mkz = 3455,
VBROADCASTSSZ256r = 3456,
VBROADCASTSSZ256rk = 3457,
VBROADCASTSSZ256rkz = 3458,
VBROADCASTSSZm = 3459,
VBROADCASTSSZmk = 3460,
VBROADCASTSSZmkz = 3461,
VBROADCASTSSZr = 3462,
VBROADCASTSSZrk = 3463,
VBROADCASTSSZrkz = 3464,
VBROADCASTSSrm = 3465,
VBROADCASTSSrr = 3466,
VCMPPDYrmi = 3467,
VCMPPDYrmi_alt = 3468,
VCMPPDYrri = 3469,
VCMPPDYrri_alt = 3470,
VCMPPDZ128rmbi = 3471,
VCMPPDZ128rmbi_alt = 3472,
VCMPPDZ128rmbi_altk = 3473,
VCMPPDZ128rmbik = 3474,
VCMPPDZ128rmi = 3475,
VCMPPDZ128rmi_alt = 3476,
VCMPPDZ128rmi_altk = 3477,
VCMPPDZ128rmik = 3478,
VCMPPDZ128rri = 3479,
VCMPPDZ128rri_alt = 3480,
VCMPPDZ128rri_altk = 3481,
VCMPPDZ128rrik = 3482,
VCMPPDZ256rmbi = 3483,
VCMPPDZ256rmbi_alt = 3484,
VCMPPDZ256rmbi_altk = 3485,
VCMPPDZ256rmbik = 3486,
VCMPPDZ256rmi = 3487,
VCMPPDZ256rmi_alt = 3488,
VCMPPDZ256rmi_altk = 3489,
VCMPPDZ256rmik = 3490,
VCMPPDZ256rri = 3491,
VCMPPDZ256rri_alt = 3492,
VCMPPDZ256rri_altk = 3493,
VCMPPDZ256rrik = 3494,
VCMPPDZrmbi = 3495,
VCMPPDZrmbi_alt = 3496,
VCMPPDZrmbi_altk = 3497,
VCMPPDZrmbik = 3498,
VCMPPDZrmi = 3499,
VCMPPDZrmi_alt = 3500,
VCMPPDZrmi_altk = 3501,
VCMPPDZrmik = 3502,
VCMPPDZrri = 3503,
VCMPPDZrri_alt = 3504,
VCMPPDZrri_altk = 3505,
VCMPPDZrrib = 3506,
VCMPPDZrrib_alt = 3507,
VCMPPDZrrib_altk = 3508,
VCMPPDZrribk = 3509,
VCMPPDZrrik = 3510,
VCMPPDrmi = 3511,
VCMPPDrmi_alt = 3512,
VCMPPDrri = 3513,
VCMPPDrri_alt = 3514,
VCMPPSYrmi = 3515,
VCMPPSYrmi_alt = 3516,
VCMPPSYrri = 3517,
VCMPPSYrri_alt = 3518,
VCMPPSZ128rmbi = 3519,
VCMPPSZ128rmbi_alt = 3520,
VCMPPSZ128rmbi_altk = 3521,
VCMPPSZ128rmbik = 3522,
VCMPPSZ128rmi = 3523,
VCMPPSZ128rmi_alt = 3524,
VCMPPSZ128rmi_altk = 3525,
VCMPPSZ128rmik = 3526,
VCMPPSZ128rri = 3527,
VCMPPSZ128rri_alt = 3528,
VCMPPSZ128rri_altk = 3529,
VCMPPSZ128rrik = 3530,
VCMPPSZ256rmbi = 3531,
VCMPPSZ256rmbi_alt = 3532,
VCMPPSZ256rmbi_altk = 3533,
VCMPPSZ256rmbik = 3534,
VCMPPSZ256rmi = 3535,
VCMPPSZ256rmi_alt = 3536,
VCMPPSZ256rmi_altk = 3537,
VCMPPSZ256rmik = 3538,
VCMPPSZ256rri = 3539,
VCMPPSZ256rri_alt = 3540,
VCMPPSZ256rri_altk = 3541,
VCMPPSZ256rrik = 3542,
VCMPPSZrmbi = 3543,
VCMPPSZrmbi_alt = 3544,
VCMPPSZrmbi_altk = 3545,
VCMPPSZrmbik = 3546,
VCMPPSZrmi = 3547,
VCMPPSZrmi_alt = 3548,
VCMPPSZrmi_altk = 3549,
VCMPPSZrmik = 3550,
VCMPPSZrri = 3551,
VCMPPSZrri_alt = 3552,
VCMPPSZrri_altk = 3553,
VCMPPSZrrib = 3554,
VCMPPSZrrib_alt = 3555,
VCMPPSZrrib_altk = 3556,
VCMPPSZrribk = 3557,
VCMPPSZrrik = 3558,
VCMPPSrmi = 3559,
VCMPPSrmi_alt = 3560,
VCMPPSrri = 3561,
VCMPPSrri_alt = 3562,
VCMPSDZrm = 3563,
VCMPSDZrm_Int = 3564,
VCMPSDZrm_Intk = 3565,
VCMPSDZrmi_alt = 3566,
VCMPSDZrmi_altk = 3567,
VCMPSDZrr = 3568,
VCMPSDZrr_Int = 3569,
VCMPSDZrr_Intk = 3570,
VCMPSDZrrb_Int = 3571,
VCMPSDZrrb_Intk = 3572,
VCMPSDZrrb_alt = 3573,
VCMPSDZrrb_altk = 3574,
VCMPSDZrri_alt = 3575,
VCMPSDZrri_altk = 3576,
VCMPSDrm = 3577,
VCMPSDrm_alt = 3578,
VCMPSDrr = 3579,
VCMPSDrr_alt = 3580,
VCMPSSZrm = 3581,
VCMPSSZrm_Int = 3582,
VCMPSSZrm_Intk = 3583,
VCMPSSZrmi_alt = 3584,
VCMPSSZrmi_altk = 3585,
VCMPSSZrr = 3586,
VCMPSSZrr_Int = 3587,
VCMPSSZrr_Intk = 3588,
VCMPSSZrrb_Int = 3589,
VCMPSSZrrb_Intk = 3590,
VCMPSSZrrb_alt = 3591,
VCMPSSZrrb_altk = 3592,
VCMPSSZrri_alt = 3593,
VCMPSSZrri_altk = 3594,
VCMPSSrm = 3595,
VCMPSSrm_alt = 3596,
VCMPSSrr = 3597,
VCMPSSrr_alt = 3598,
VCOMISDZrb = 3599,
VCOMISDZrm = 3600,
VCOMISDZrr = 3601,
VCOMISDrm = 3602,
VCOMISDrr = 3603,
VCOMISSZrb = 3604,
VCOMISSZrm = 3605,
VCOMISSZrr = 3606,
VCOMISSrm = 3607,
VCOMISSrr = 3608,
VCOMPRESSPDZ128mr = 3609,
VCOMPRESSPDZ128mrk = 3610,
VCOMPRESSPDZ128rr = 3611,
VCOMPRESSPDZ128rrk = 3612,
VCOMPRESSPDZ128rrkz = 3613,
VCOMPRESSPDZ256mr = 3614,
VCOMPRESSPDZ256mrk = 3615,
VCOMPRESSPDZ256rr = 3616,
VCOMPRESSPDZ256rrk = 3617,
VCOMPRESSPDZ256rrkz = 3618,
VCOMPRESSPDZmr = 3619,
VCOMPRESSPDZmrk = 3620,
VCOMPRESSPDZrr = 3621,
VCOMPRESSPDZrrk = 3622,
VCOMPRESSPDZrrkz = 3623,
VCOMPRESSPSZ128mr = 3624,
VCOMPRESSPSZ128mrk = 3625,
VCOMPRESSPSZ128rr = 3626,
VCOMPRESSPSZ128rrk = 3627,
VCOMPRESSPSZ128rrkz = 3628,
VCOMPRESSPSZ256mr = 3629,
VCOMPRESSPSZ256mrk = 3630,
VCOMPRESSPSZ256rr = 3631,
VCOMPRESSPSZ256rrk = 3632,
VCOMPRESSPSZ256rrkz = 3633,
VCOMPRESSPSZmr = 3634,
VCOMPRESSPSZmrk = 3635,
VCOMPRESSPSZrr = 3636,
VCOMPRESSPSZrrk = 3637,
VCOMPRESSPSZrrkz = 3638,
VCVTDQ2PDYrm = 3639,
VCVTDQ2PDYrr = 3640,
VCVTDQ2PDZ128rm = 3641,
VCVTDQ2PDZ128rmb = 3642,
VCVTDQ2PDZ128rmbk = 3643,
VCVTDQ2PDZ128rmbkz = 3644,
VCVTDQ2PDZ128rmk = 3645,
VCVTDQ2PDZ128rmkz = 3646,
VCVTDQ2PDZ128rr = 3647,
VCVTDQ2PDZ128rrk = 3648,
VCVTDQ2PDZ128rrkz = 3649,
VCVTDQ2PDZ256rm = 3650,
VCVTDQ2PDZ256rmb = 3651,
VCVTDQ2PDZ256rmbk = 3652,
VCVTDQ2PDZ256rmbkz = 3653,
VCVTDQ2PDZ256rmk = 3654,
VCVTDQ2PDZ256rmkz = 3655,
VCVTDQ2PDZ256rr = 3656,
VCVTDQ2PDZ256rrk = 3657,
VCVTDQ2PDZ256rrkz = 3658,
VCVTDQ2PDZrm = 3659,
VCVTDQ2PDZrmb = 3660,
VCVTDQ2PDZrmbk = 3661,
VCVTDQ2PDZrmbkz = 3662,
VCVTDQ2PDZrmk = 3663,
VCVTDQ2PDZrmkz = 3664,
VCVTDQ2PDZrr = 3665,
VCVTDQ2PDZrrk = 3666,
VCVTDQ2PDZrrkz = 3667,
VCVTDQ2PDrm = 3668,
VCVTDQ2PDrr = 3669,
VCVTDQ2PSYrm = 3670,
VCVTDQ2PSYrr = 3671,
VCVTDQ2PSZ128rm = 3672,
VCVTDQ2PSZ128rmb = 3673,
VCVTDQ2PSZ128rmbk = 3674,
VCVTDQ2PSZ128rmbkz = 3675,
VCVTDQ2PSZ128rmk = 3676,
VCVTDQ2PSZ128rmkz = 3677,
VCVTDQ2PSZ128rr = 3678,
VCVTDQ2PSZ128rrk = 3679,
VCVTDQ2PSZ128rrkz = 3680,
VCVTDQ2PSZ256rm = 3681,
VCVTDQ2PSZ256rmb = 3682,
VCVTDQ2PSZ256rmbk = 3683,
VCVTDQ2PSZ256rmbkz = 3684,
VCVTDQ2PSZ256rmk = 3685,
VCVTDQ2PSZ256rmkz = 3686,
VCVTDQ2PSZ256rr = 3687,
VCVTDQ2PSZ256rrk = 3688,
VCVTDQ2PSZ256rrkz = 3689,
VCVTDQ2PSZrm = 3690,
VCVTDQ2PSZrmb = 3691,
VCVTDQ2PSZrmbk = 3692,
VCVTDQ2PSZrmbkz = 3693,
VCVTDQ2PSZrmk = 3694,
VCVTDQ2PSZrmkz = 3695,
VCVTDQ2PSZrr = 3696,
VCVTDQ2PSZrrb = 3697,
VCVTDQ2PSZrrbk = 3698,
VCVTDQ2PSZrrbkz = 3699,
VCVTDQ2PSZrrk = 3700,
VCVTDQ2PSZrrkz = 3701,
VCVTDQ2PSrm = 3702,
VCVTDQ2PSrr = 3703,
VCVTPD2DQXrm = 3704,
VCVTPD2DQYrm = 3705,
VCVTPD2DQYrr = 3706,
VCVTPD2DQZ128rm = 3707,
VCVTPD2DQZ128rmb = 3708,
VCVTPD2DQZ128rmbk = 3709,
VCVTPD2DQZ128rmbkz = 3710,
VCVTPD2DQZ128rmk = 3711,
VCVTPD2DQZ128rmkz = 3712,
VCVTPD2DQZ128rr = 3713,
VCVTPD2DQZ128rrk = 3714,
VCVTPD2DQZ128rrkz = 3715,
VCVTPD2DQZ256rm = 3716,
VCVTPD2DQZ256rmb = 3717,
VCVTPD2DQZ256rmbk = 3718,
VCVTPD2DQZ256rmbkz = 3719,
VCVTPD2DQZ256rmk = 3720,
VCVTPD2DQZ256rmkz = 3721,
VCVTPD2DQZ256rr = 3722,
VCVTPD2DQZ256rrk = 3723,
VCVTPD2DQZ256rrkz = 3724,
VCVTPD2DQZrm = 3725,
VCVTPD2DQZrmb = 3726,
VCVTPD2DQZrmbk = 3727,
VCVTPD2DQZrmbkz = 3728,
VCVTPD2DQZrmk = 3729,
VCVTPD2DQZrmkz = 3730,
VCVTPD2DQZrr = 3731,
VCVTPD2DQZrrb = 3732,
VCVTPD2DQZrrbk = 3733,
VCVTPD2DQZrrbkz = 3734,
VCVTPD2DQZrrk = 3735,
VCVTPD2DQZrrkz = 3736,
VCVTPD2DQrr = 3737,
VCVTPD2PSXrm = 3738,
VCVTPD2PSYrm = 3739,
VCVTPD2PSYrr = 3740,
VCVTPD2PSZ128rm = 3741,
VCVTPD2PSZ128rmb = 3742,
VCVTPD2PSZ128rmbk = 3743,
VCVTPD2PSZ128rmbkz = 3744,
VCVTPD2PSZ128rmk = 3745,
VCVTPD2PSZ128rmkz = 3746,
VCVTPD2PSZ128rr = 3747,
VCVTPD2PSZ128rrk = 3748,
VCVTPD2PSZ128rrkz = 3749,
VCVTPD2PSZ256rm = 3750,
VCVTPD2PSZ256rmb = 3751,
VCVTPD2PSZ256rmbk = 3752,
VCVTPD2PSZ256rmbkz = 3753,
VCVTPD2PSZ256rmk = 3754,
VCVTPD2PSZ256rmkz = 3755,
VCVTPD2PSZ256rr = 3756,
VCVTPD2PSZ256rrk = 3757,
VCVTPD2PSZ256rrkz = 3758,
VCVTPD2PSZrm = 3759,
VCVTPD2PSZrmb = 3760,
VCVTPD2PSZrmbk = 3761,
VCVTPD2PSZrmbkz = 3762,
VCVTPD2PSZrmk = 3763,
VCVTPD2PSZrmkz = 3764,
VCVTPD2PSZrr = 3765,
VCVTPD2PSZrrb = 3766,
VCVTPD2PSZrrbk = 3767,
VCVTPD2PSZrrbkz = 3768,
VCVTPD2PSZrrk = 3769,
VCVTPD2PSZrrkz = 3770,
VCVTPD2PSrr = 3771,
VCVTPD2QQZ128rm = 3772,
VCVTPD2QQZ128rmb = 3773,
VCVTPD2QQZ128rmbk = 3774,
VCVTPD2QQZ128rmbkz = 3775,
VCVTPD2QQZ128rmk = 3776,
VCVTPD2QQZ128rmkz = 3777,
VCVTPD2QQZ128rr = 3778,
VCVTPD2QQZ128rrk = 3779,
VCVTPD2QQZ128rrkz = 3780,
VCVTPD2QQZ256rm = 3781,
VCVTPD2QQZ256rmb = 3782,
VCVTPD2QQZ256rmbk = 3783,
VCVTPD2QQZ256rmbkz = 3784,
VCVTPD2QQZ256rmk = 3785,
VCVTPD2QQZ256rmkz = 3786,
VCVTPD2QQZ256rr = 3787,
VCVTPD2QQZ256rrk = 3788,
VCVTPD2QQZ256rrkz = 3789,
VCVTPD2QQZrm = 3790,
VCVTPD2QQZrmb = 3791,
VCVTPD2QQZrmbk = 3792,
VCVTPD2QQZrmbkz = 3793,
VCVTPD2QQZrmk = 3794,
VCVTPD2QQZrmkz = 3795,
VCVTPD2QQZrr = 3796,
VCVTPD2QQZrrb = 3797,
VCVTPD2QQZrrbk = 3798,
VCVTPD2QQZrrbkz = 3799,
VCVTPD2QQZrrk = 3800,
VCVTPD2QQZrrkz = 3801,
VCVTPD2UDQZ128rm = 3802,
VCVTPD2UDQZ128rmb = 3803,
VCVTPD2UDQZ128rmbk = 3804,
VCVTPD2UDQZ128rmbkz = 3805,
VCVTPD2UDQZ128rmk = 3806,
VCVTPD2UDQZ128rmkz = 3807,
VCVTPD2UDQZ128rr = 3808,
VCVTPD2UDQZ128rrk = 3809,
VCVTPD2UDQZ128rrkz = 3810,
VCVTPD2UDQZ256rm = 3811,
VCVTPD2UDQZ256rmb = 3812,
VCVTPD2UDQZ256rmbk = 3813,
VCVTPD2UDQZ256rmbkz = 3814,
VCVTPD2UDQZ256rmk = 3815,
VCVTPD2UDQZ256rmkz = 3816,
VCVTPD2UDQZ256rr = 3817,
VCVTPD2UDQZ256rrk = 3818,
VCVTPD2UDQZ256rrkz = 3819,
VCVTPD2UDQZrm = 3820,
VCVTPD2UDQZrmb = 3821,
VCVTPD2UDQZrmbk = 3822,
VCVTPD2UDQZrmbkz = 3823,
VCVTPD2UDQZrmk = 3824,
VCVTPD2UDQZrmkz = 3825,
VCVTPD2UDQZrr = 3826,
VCVTPD2UDQZrrb = 3827,
VCVTPD2UDQZrrbk = 3828,
VCVTPD2UDQZrrbkz = 3829,
VCVTPD2UDQZrrk = 3830,
VCVTPD2UDQZrrkz = 3831,
VCVTPD2UQQZ128rm = 3832,
VCVTPD2UQQZ128rmb = 3833,
VCVTPD2UQQZ128rmbk = 3834,
VCVTPD2UQQZ128rmbkz = 3835,
VCVTPD2UQQZ128rmk = 3836,
VCVTPD2UQQZ128rmkz = 3837,
VCVTPD2UQQZ128rr = 3838,
VCVTPD2UQQZ128rrk = 3839,
VCVTPD2UQQZ128rrkz = 3840,
VCVTPD2UQQZ256rm = 3841,
VCVTPD2UQQZ256rmb = 3842,
VCVTPD2UQQZ256rmbk = 3843,
VCVTPD2UQQZ256rmbkz = 3844,
VCVTPD2UQQZ256rmk = 3845,
VCVTPD2UQQZ256rmkz = 3846,
VCVTPD2UQQZ256rr = 3847,
VCVTPD2UQQZ256rrk = 3848,
VCVTPD2UQQZ256rrkz = 3849,
VCVTPD2UQQZrm = 3850,
VCVTPD2UQQZrmb = 3851,
VCVTPD2UQQZrmbk = 3852,
VCVTPD2UQQZrmbkz = 3853,
VCVTPD2UQQZrmk = 3854,
VCVTPD2UQQZrmkz = 3855,
VCVTPD2UQQZrr = 3856,
VCVTPD2UQQZrrb = 3857,
VCVTPD2UQQZrrbk = 3858,
VCVTPD2UQQZrrbkz = 3859,
VCVTPD2UQQZrrk = 3860,
VCVTPD2UQQZrrkz = 3861,
VCVTPH2PSYrm = 3862,
VCVTPH2PSYrr = 3863,
VCVTPH2PSZ128rm = 3864,
VCVTPH2PSZ128rmk = 3865,
VCVTPH2PSZ128rmkz = 3866,
VCVTPH2PSZ128rr = 3867,
VCVTPH2PSZ128rrk = 3868,
VCVTPH2PSZ128rrkz = 3869,
VCVTPH2PSZ256rm = 3870,
VCVTPH2PSZ256rmk = 3871,
VCVTPH2PSZ256rmkz = 3872,
VCVTPH2PSZ256rr = 3873,
VCVTPH2PSZ256rrk = 3874,
VCVTPH2PSZ256rrkz = 3875,
VCVTPH2PSZrb = 3876,
VCVTPH2PSZrbk = 3877,
VCVTPH2PSZrbkz = 3878,
VCVTPH2PSZrm = 3879,
VCVTPH2PSZrmk = 3880,
VCVTPH2PSZrmkz = 3881,
VCVTPH2PSZrr = 3882,
VCVTPH2PSZrrk = 3883,
VCVTPH2PSZrrkz = 3884,
VCVTPH2PSrm = 3885,
VCVTPH2PSrr = 3886,
VCVTPS2DQYrm = 3887,
VCVTPS2DQYrr = 3888,
VCVTPS2DQZ128rm = 3889,
VCVTPS2DQZ128rmb = 3890,
VCVTPS2DQZ128rmbk = 3891,
VCVTPS2DQZ128rmbkz = 3892,
VCVTPS2DQZ128rmk = 3893,
VCVTPS2DQZ128rmkz = 3894,
VCVTPS2DQZ128rr = 3895,
VCVTPS2DQZ128rrk = 3896,
VCVTPS2DQZ128rrkz = 3897,
VCVTPS2DQZ256rm = 3898,
VCVTPS2DQZ256rmb = 3899,
VCVTPS2DQZ256rmbk = 3900,
VCVTPS2DQZ256rmbkz = 3901,
VCVTPS2DQZ256rmk = 3902,
VCVTPS2DQZ256rmkz = 3903,
VCVTPS2DQZ256rr = 3904,
VCVTPS2DQZ256rrk = 3905,
VCVTPS2DQZ256rrkz = 3906,
VCVTPS2DQZrm = 3907,
VCVTPS2DQZrmb = 3908,
VCVTPS2DQZrmbk = 3909,
VCVTPS2DQZrmbkz = 3910,
VCVTPS2DQZrmk = 3911,
VCVTPS2DQZrmkz = 3912,
VCVTPS2DQZrr = 3913,
VCVTPS2DQZrrb = 3914,
VCVTPS2DQZrrbk = 3915,
VCVTPS2DQZrrbkz = 3916,
VCVTPS2DQZrrk = 3917,
VCVTPS2DQZrrkz = 3918,
VCVTPS2DQrm = 3919,
VCVTPS2DQrr = 3920,
VCVTPS2PDYrm = 3921,
VCVTPS2PDYrr = 3922,
VCVTPS2PDZ128rm = 3923,
VCVTPS2PDZ128rmb = 3924,
VCVTPS2PDZ128rmbk = 3925,
VCVTPS2PDZ128rmbkz = 3926,
VCVTPS2PDZ128rmk = 3927,
VCVTPS2PDZ128rmkz = 3928,
VCVTPS2PDZ128rr = 3929,
VCVTPS2PDZ128rrk = 3930,
VCVTPS2PDZ128rrkz = 3931,
VCVTPS2PDZ256rm = 3932,
VCVTPS2PDZ256rmb = 3933,
VCVTPS2PDZ256rmbk = 3934,
VCVTPS2PDZ256rmbkz = 3935,
VCVTPS2PDZ256rmk = 3936,
VCVTPS2PDZ256rmkz = 3937,
VCVTPS2PDZ256rr = 3938,
VCVTPS2PDZ256rrk = 3939,
VCVTPS2PDZ256rrkz = 3940,
VCVTPS2PDZrm = 3941,
VCVTPS2PDZrmb = 3942,
VCVTPS2PDZrmbk = 3943,
VCVTPS2PDZrmbkz = 3944,
VCVTPS2PDZrmk = 3945,
VCVTPS2PDZrmkz = 3946,
VCVTPS2PDZrr = 3947,
VCVTPS2PDZrrb = 3948,
VCVTPS2PDZrrbk = 3949,
VCVTPS2PDZrrbkz = 3950,
VCVTPS2PDZrrk = 3951,
VCVTPS2PDZrrkz = 3952,
VCVTPS2PDrm = 3953,
VCVTPS2PDrr = 3954,
VCVTPS2PHYmr = 3955,
VCVTPS2PHYrr = 3956,
VCVTPS2PHZ128mr = 3957,
VCVTPS2PHZ128mrk = 3958,
VCVTPS2PHZ128rr = 3959,
VCVTPS2PHZ128rrk = 3960,
VCVTPS2PHZ128rrkz = 3961,
VCVTPS2PHZ256mr = 3962,
VCVTPS2PHZ256mrk = 3963,
VCVTPS2PHZ256rr = 3964,
VCVTPS2PHZ256rrk = 3965,
VCVTPS2PHZ256rrkz = 3966,
VCVTPS2PHZmr = 3967,
VCVTPS2PHZmrk = 3968,
VCVTPS2PHZrb = 3969,
VCVTPS2PHZrbk = 3970,
VCVTPS2PHZrbkz = 3971,
VCVTPS2PHZrr = 3972,
VCVTPS2PHZrrk = 3973,
VCVTPS2PHZrrkz = 3974,
VCVTPS2PHmr = 3975,
VCVTPS2PHrr = 3976,
VCVTPS2QQZ128rm = 3977,
VCVTPS2QQZ128rmb = 3978,
VCVTPS2QQZ128rmbk = 3979,
VCVTPS2QQZ128rmbkz = 3980,
VCVTPS2QQZ128rmk = 3981,
VCVTPS2QQZ128rmkz = 3982,
VCVTPS2QQZ128rr = 3983,
VCVTPS2QQZ128rrk = 3984,
VCVTPS2QQZ128rrkz = 3985,
VCVTPS2QQZ256rm = 3986,
VCVTPS2QQZ256rmb = 3987,
VCVTPS2QQZ256rmbk = 3988,
VCVTPS2QQZ256rmbkz = 3989,
VCVTPS2QQZ256rmk = 3990,
VCVTPS2QQZ256rmkz = 3991,
VCVTPS2QQZ256rr = 3992,
VCVTPS2QQZ256rrk = 3993,
VCVTPS2QQZ256rrkz = 3994,
VCVTPS2QQZrm = 3995,
VCVTPS2QQZrmb = 3996,
VCVTPS2QQZrmbk = 3997,
VCVTPS2QQZrmbkz = 3998,
VCVTPS2QQZrmk = 3999,
VCVTPS2QQZrmkz = 4000,
VCVTPS2QQZrr = 4001,
VCVTPS2QQZrrb = 4002,
VCVTPS2QQZrrbk = 4003,
VCVTPS2QQZrrbkz = 4004,
VCVTPS2QQZrrk = 4005,
VCVTPS2QQZrrkz = 4006,
VCVTPS2UDQZ128rm = 4007,
VCVTPS2UDQZ128rmb = 4008,
VCVTPS2UDQZ128rmbk = 4009,
VCVTPS2UDQZ128rmbkz = 4010,
VCVTPS2UDQZ128rmk = 4011,
VCVTPS2UDQZ128rmkz = 4012,
VCVTPS2UDQZ128rr = 4013,
VCVTPS2UDQZ128rrk = 4014,
VCVTPS2UDQZ128rrkz = 4015,
VCVTPS2UDQZ256rm = 4016,
VCVTPS2UDQZ256rmb = 4017,
VCVTPS2UDQZ256rmbk = 4018,
VCVTPS2UDQZ256rmbkz = 4019,
VCVTPS2UDQZ256rmk = 4020,
VCVTPS2UDQZ256rmkz = 4021,
VCVTPS2UDQZ256rr = 4022,
VCVTPS2UDQZ256rrk = 4023,
VCVTPS2UDQZ256rrkz = 4024,
VCVTPS2UDQZrm = 4025,
VCVTPS2UDQZrmb = 4026,
VCVTPS2UDQZrmbk = 4027,
VCVTPS2UDQZrmbkz = 4028,
VCVTPS2UDQZrmk = 4029,
VCVTPS2UDQZrmkz = 4030,
VCVTPS2UDQZrr = 4031,
VCVTPS2UDQZrrb = 4032,
VCVTPS2UDQZrrbk = 4033,
VCVTPS2UDQZrrbkz = 4034,
VCVTPS2UDQZrrk = 4035,
VCVTPS2UDQZrrkz = 4036,
VCVTPS2UQQZ128rm = 4037,
VCVTPS2UQQZ128rmb = 4038,
VCVTPS2UQQZ128rmbk = 4039,
VCVTPS2UQQZ128rmbkz = 4040,
VCVTPS2UQQZ128rmk = 4041,
VCVTPS2UQQZ128rmkz = 4042,
VCVTPS2UQQZ128rr = 4043,
VCVTPS2UQQZ128rrk = 4044,
VCVTPS2UQQZ128rrkz = 4045,
VCVTPS2UQQZ256rm = 4046,
VCVTPS2UQQZ256rmb = 4047,
VCVTPS2UQQZ256rmbk = 4048,
VCVTPS2UQQZ256rmbkz = 4049,
VCVTPS2UQQZ256rmk = 4050,
VCVTPS2UQQZ256rmkz = 4051,
VCVTPS2UQQZ256rr = 4052,
VCVTPS2UQQZ256rrk = 4053,
VCVTPS2UQQZ256rrkz = 4054,
VCVTPS2UQQZrm = 4055,
VCVTPS2UQQZrmb = 4056,
VCVTPS2UQQZrmbk = 4057,
VCVTPS2UQQZrmbkz = 4058,
VCVTPS2UQQZrmk = 4059,
VCVTPS2UQQZrmkz = 4060,
VCVTPS2UQQZrr = 4061,
VCVTPS2UQQZrrb = 4062,
VCVTPS2UQQZrrbk = 4063,
VCVTPS2UQQZrrbkz = 4064,
VCVTPS2UQQZrrk = 4065,
VCVTPS2UQQZrrkz = 4066,
VCVTQQ2PDZ128rm = 4067,
VCVTQQ2PDZ128rmb = 4068,
VCVTQQ2PDZ128rmbk = 4069,
VCVTQQ2PDZ128rmbkz = 4070,
VCVTQQ2PDZ128rmk = 4071,
VCVTQQ2PDZ128rmkz = 4072,
VCVTQQ2PDZ128rr = 4073,
VCVTQQ2PDZ128rrk = 4074,
VCVTQQ2PDZ128rrkz = 4075,
VCVTQQ2PDZ256rm = 4076,
VCVTQQ2PDZ256rmb = 4077,
VCVTQQ2PDZ256rmbk = 4078,
VCVTQQ2PDZ256rmbkz = 4079,
VCVTQQ2PDZ256rmk = 4080,
VCVTQQ2PDZ256rmkz = 4081,
VCVTQQ2PDZ256rr = 4082,
VCVTQQ2PDZ256rrk = 4083,
VCVTQQ2PDZ256rrkz = 4084,
VCVTQQ2PDZrm = 4085,
VCVTQQ2PDZrmb = 4086,
VCVTQQ2PDZrmbk = 4087,
VCVTQQ2PDZrmbkz = 4088,
VCVTQQ2PDZrmk = 4089,
VCVTQQ2PDZrmkz = 4090,
VCVTQQ2PDZrr = 4091,
VCVTQQ2PDZrrb = 4092,
VCVTQQ2PDZrrbk = 4093,
VCVTQQ2PDZrrbkz = 4094,
VCVTQQ2PDZrrk = 4095,
VCVTQQ2PDZrrkz = 4096,
VCVTQQ2PSZ128rm = 4097,
VCVTQQ2PSZ128rmb = 4098,
VCVTQQ2PSZ128rmbk = 4099,
VCVTQQ2PSZ128rmbkz = 4100,
VCVTQQ2PSZ128rmk = 4101,
VCVTQQ2PSZ128rmkz = 4102,
VCVTQQ2PSZ128rr = 4103,
VCVTQQ2PSZ128rrk = 4104,
VCVTQQ2PSZ128rrkz = 4105,
VCVTQQ2PSZ256rm = 4106,
VCVTQQ2PSZ256rmb = 4107,
VCVTQQ2PSZ256rmbk = 4108,
VCVTQQ2PSZ256rmbkz = 4109,
VCVTQQ2PSZ256rmk = 4110,
VCVTQQ2PSZ256rmkz = 4111,
VCVTQQ2PSZ256rr = 4112,
VCVTQQ2PSZ256rrk = 4113,
VCVTQQ2PSZ256rrkz = 4114,
VCVTQQ2PSZrm = 4115,
VCVTQQ2PSZrmb = 4116,
VCVTQQ2PSZrmbk = 4117,
VCVTQQ2PSZrmbkz = 4118,
VCVTQQ2PSZrmk = 4119,
VCVTQQ2PSZrmkz = 4120,
VCVTQQ2PSZrr = 4121,
VCVTQQ2PSZrrb = 4122,
VCVTQQ2PSZrrbk = 4123,
VCVTQQ2PSZrrbkz = 4124,
VCVTQQ2PSZrrk = 4125,
VCVTQQ2PSZrrkz = 4126,
VCVTSD2SI64Zrb = 4127,
VCVTSD2SI64Zrm = 4128,
VCVTSD2SI64Zrr = 4129,
VCVTSD2SI64rm = 4130,
VCVTSD2SI64rr = 4131,
VCVTSD2SIZrb = 4132,
VCVTSD2SIZrm = 4133,
VCVTSD2SIZrr = 4134,
VCVTSD2SIrm = 4135,
VCVTSD2SIrr = 4136,
VCVTSD2SSZrm = 4137,
VCVTSD2SSZrmk = 4138,
VCVTSD2SSZrmkz = 4139,
VCVTSD2SSZrr = 4140,
VCVTSD2SSZrrb = 4141,
VCVTSD2SSZrrbk = 4142,
VCVTSD2SSZrrbkz = 4143,
VCVTSD2SSZrrk = 4144,
VCVTSD2SSZrrkz = 4145,
VCVTSD2SSrm = 4146,
VCVTSD2SSrr = 4147,
VCVTSD2USI64Zrb = 4148,
VCVTSD2USI64Zrm = 4149,
VCVTSD2USI64Zrr = 4150,
VCVTSD2USIZrb = 4151,
VCVTSD2USIZrm = 4152,
VCVTSD2USIZrr = 4153,
VCVTSI2SD64rm = 4154,
VCVTSI2SD64rr = 4155,
VCVTSI2SDZrm = 4156,
VCVTSI2SDZrm_Int = 4157,
VCVTSI2SDZrr = 4158,
VCVTSI2SDZrr_Int = 4159,
VCVTSI2SDZrrb_Int = 4160,
VCVTSI2SDrm = 4161,
VCVTSI2SDrr = 4162,
VCVTSI2SS64rm = 4163,
VCVTSI2SS64rr = 4164,
VCVTSI2SSZrm = 4165,
VCVTSI2SSZrm_Int = 4166,
VCVTSI2SSZrr = 4167,
VCVTSI2SSZrr_Int = 4168,
VCVTSI2SSZrrb_Int = 4169,
VCVTSI2SSrm = 4170,
VCVTSI2SSrr = 4171,
VCVTSI642SDZrm = 4172,
VCVTSI642SDZrm_Int = 4173,
VCVTSI642SDZrr = 4174,
VCVTSI642SDZrr_Int = 4175,
VCVTSI642SDZrrb_Int = 4176,
VCVTSI642SSZrm = 4177,
VCVTSI642SSZrm_Int = 4178,
VCVTSI642SSZrr = 4179,
VCVTSI642SSZrr_Int = 4180,
VCVTSI642SSZrrb_Int = 4181,
VCVTSS2SDZrm = 4182,
VCVTSS2SDZrmk = 4183,
VCVTSS2SDZrmkz = 4184,
VCVTSS2SDZrr = 4185,
VCVTSS2SDZrrb = 4186,
VCVTSS2SDZrrbk = 4187,
VCVTSS2SDZrrbkz = 4188,
VCVTSS2SDZrrk = 4189,
VCVTSS2SDZrrkz = 4190,
VCVTSS2SDrm = 4191,
VCVTSS2SDrr = 4192,
VCVTSS2SI64Zrb = 4193,
VCVTSS2SI64Zrm = 4194,
VCVTSS2SI64Zrr = 4195,
VCVTSS2SI64rm = 4196,
VCVTSS2SI64rr = 4197,
VCVTSS2SIZrb = 4198,
VCVTSS2SIZrm = 4199,
VCVTSS2SIZrr = 4200,
VCVTSS2SIrm = 4201,
VCVTSS2SIrr = 4202,
VCVTSS2USI64Zrb = 4203,
VCVTSS2USI64Zrm = 4204,
VCVTSS2USI64Zrr = 4205,
VCVTSS2USIZrb = 4206,
VCVTSS2USIZrm = 4207,
VCVTSS2USIZrr = 4208,
VCVTTPD2DQXrm = 4209,
VCVTTPD2DQYrm = 4210,
VCVTTPD2DQYrr = 4211,
VCVTTPD2DQZ128rm = 4212,
VCVTTPD2DQZ128rmb = 4213,
VCVTTPD2DQZ128rmbk = 4214,
VCVTTPD2DQZ128rmbkz = 4215,
VCVTTPD2DQZ128rmk = 4216,
VCVTTPD2DQZ128rmkz = 4217,
VCVTTPD2DQZ128rr = 4218,
VCVTTPD2DQZ128rrk = 4219,
VCVTTPD2DQZ128rrkz = 4220,
VCVTTPD2DQZ256rm = 4221,
VCVTTPD2DQZ256rmb = 4222,
VCVTTPD2DQZ256rmbk = 4223,
VCVTTPD2DQZ256rmbkz = 4224,
VCVTTPD2DQZ256rmk = 4225,
VCVTTPD2DQZ256rmkz = 4226,
VCVTTPD2DQZ256rr = 4227,
VCVTTPD2DQZ256rrk = 4228,
VCVTTPD2DQZ256rrkz = 4229,
VCVTTPD2DQZrm = 4230,
VCVTTPD2DQZrmb = 4231,
VCVTTPD2DQZrmbk = 4232,
VCVTTPD2DQZrmbkz = 4233,
VCVTTPD2DQZrmk = 4234,
VCVTTPD2DQZrmkz = 4235,
VCVTTPD2DQZrr = 4236,
VCVTTPD2DQZrrb = 4237,
VCVTTPD2DQZrrbk = 4238,
VCVTTPD2DQZrrbkz = 4239,
VCVTTPD2DQZrrk = 4240,
VCVTTPD2DQZrrkz = 4241,
VCVTTPD2DQrr = 4242,
VCVTTPD2QQZ128rm = 4243,
VCVTTPD2QQZ128rmb = 4244,
VCVTTPD2QQZ128rmbk = 4245,
VCVTTPD2QQZ128rmbkz = 4246,
VCVTTPD2QQZ128rmk = 4247,
VCVTTPD2QQZ128rmkz = 4248,
VCVTTPD2QQZ128rr = 4249,
VCVTTPD2QQZ128rrk = 4250,
VCVTTPD2QQZ128rrkz = 4251,
VCVTTPD2QQZ256rm = 4252,
VCVTTPD2QQZ256rmb = 4253,
VCVTTPD2QQZ256rmbk = 4254,
VCVTTPD2QQZ256rmbkz = 4255,
VCVTTPD2QQZ256rmk = 4256,
VCVTTPD2QQZ256rmkz = 4257,
VCVTTPD2QQZ256rr = 4258,
VCVTTPD2QQZ256rrk = 4259,
VCVTTPD2QQZ256rrkz = 4260,
VCVTTPD2QQZrm = 4261,
VCVTTPD2QQZrmb = 4262,
VCVTTPD2QQZrmbk = 4263,
VCVTTPD2QQZrmbkz = 4264,
VCVTTPD2QQZrmk = 4265,
VCVTTPD2QQZrmkz = 4266,
VCVTTPD2QQZrr = 4267,
VCVTTPD2QQZrrb = 4268,
VCVTTPD2QQZrrbk = 4269,
VCVTTPD2QQZrrbkz = 4270,
VCVTTPD2QQZrrk = 4271,
VCVTTPD2QQZrrkz = 4272,
VCVTTPD2UDQZ128rm = 4273,
VCVTTPD2UDQZ128rmb = 4274,
VCVTTPD2UDQZ128rmbk = 4275,
VCVTTPD2UDQZ128rmbkz = 4276,
VCVTTPD2UDQZ128rmk = 4277,
VCVTTPD2UDQZ128rmkz = 4278,
VCVTTPD2UDQZ128rr = 4279,
VCVTTPD2UDQZ128rrk = 4280,
VCVTTPD2UDQZ128rrkz = 4281,
VCVTTPD2UDQZ256rm = 4282,
VCVTTPD2UDQZ256rmb = 4283,
VCVTTPD2UDQZ256rmbk = 4284,
VCVTTPD2UDQZ256rmbkz = 4285,
VCVTTPD2UDQZ256rmk = 4286,
VCVTTPD2UDQZ256rmkz = 4287,
VCVTTPD2UDQZ256rr = 4288,
VCVTTPD2UDQZ256rrk = 4289,
VCVTTPD2UDQZ256rrkz = 4290,
VCVTTPD2UDQZrm = 4291,
VCVTTPD2UDQZrmb = 4292,
VCVTTPD2UDQZrmbk = 4293,
VCVTTPD2UDQZrmbkz = 4294,
VCVTTPD2UDQZrmk = 4295,
VCVTTPD2UDQZrmkz = 4296,
VCVTTPD2UDQZrr = 4297,
VCVTTPD2UDQZrrb = 4298,
VCVTTPD2UDQZrrbk = 4299,
VCVTTPD2UDQZrrbkz = 4300,
VCVTTPD2UDQZrrk = 4301,
VCVTTPD2UDQZrrkz = 4302,
VCVTTPD2UQQZ128rm = 4303,
VCVTTPD2UQQZ128rmb = 4304,
VCVTTPD2UQQZ128rmbk = 4305,
VCVTTPD2UQQZ128rmbkz = 4306,
VCVTTPD2UQQZ128rmk = 4307,
VCVTTPD2UQQZ128rmkz = 4308,
VCVTTPD2UQQZ128rr = 4309,
VCVTTPD2UQQZ128rrk = 4310,
VCVTTPD2UQQZ128rrkz = 4311,
VCVTTPD2UQQZ256rm = 4312,
VCVTTPD2UQQZ256rmb = 4313,
VCVTTPD2UQQZ256rmbk = 4314,
VCVTTPD2UQQZ256rmbkz = 4315,
VCVTTPD2UQQZ256rmk = 4316,
VCVTTPD2UQQZ256rmkz = 4317,
VCVTTPD2UQQZ256rr = 4318,
VCVTTPD2UQQZ256rrk = 4319,
VCVTTPD2UQQZ256rrkz = 4320,
VCVTTPD2UQQZrm = 4321,
VCVTTPD2UQQZrmb = 4322,
VCVTTPD2UQQZrmbk = 4323,
VCVTTPD2UQQZrmbkz = 4324,
VCVTTPD2UQQZrmk = 4325,
VCVTTPD2UQQZrmkz = 4326,
VCVTTPD2UQQZrr = 4327,
VCVTTPD2UQQZrrb = 4328,
VCVTTPD2UQQZrrbk = 4329,
VCVTTPD2UQQZrrbkz = 4330,
VCVTTPD2UQQZrrk = 4331,
VCVTTPD2UQQZrrkz = 4332,
VCVTTPS2DQYrm = 4333,
VCVTTPS2DQYrr = 4334,
VCVTTPS2DQZ128rm = 4335,
VCVTTPS2DQZ128rmb = 4336,
VCVTTPS2DQZ128rmbk = 4337,
VCVTTPS2DQZ128rmbkz = 4338,
VCVTTPS2DQZ128rmk = 4339,
VCVTTPS2DQZ128rmkz = 4340,
VCVTTPS2DQZ128rr = 4341,
VCVTTPS2DQZ128rrk = 4342,
VCVTTPS2DQZ128rrkz = 4343,
VCVTTPS2DQZ256rm = 4344,
VCVTTPS2DQZ256rmb = 4345,
VCVTTPS2DQZ256rmbk = 4346,
VCVTTPS2DQZ256rmbkz = 4347,
VCVTTPS2DQZ256rmk = 4348,
VCVTTPS2DQZ256rmkz = 4349,
VCVTTPS2DQZ256rr = 4350,
VCVTTPS2DQZ256rrk = 4351,
VCVTTPS2DQZ256rrkz = 4352,
VCVTTPS2DQZrm = 4353,
VCVTTPS2DQZrmb = 4354,
VCVTTPS2DQZrmbk = 4355,
VCVTTPS2DQZrmbkz = 4356,
VCVTTPS2DQZrmk = 4357,
VCVTTPS2DQZrmkz = 4358,
VCVTTPS2DQZrr = 4359,
VCVTTPS2DQZrrb = 4360,
VCVTTPS2DQZrrbk = 4361,
VCVTTPS2DQZrrbkz = 4362,
VCVTTPS2DQZrrk = 4363,
VCVTTPS2DQZrrkz = 4364,
VCVTTPS2DQrm = 4365,
VCVTTPS2DQrr = 4366,
VCVTTPS2QQZ128rm = 4367,
VCVTTPS2QQZ128rmb = 4368,
VCVTTPS2QQZ128rmbk = 4369,
VCVTTPS2QQZ128rmbkz = 4370,
VCVTTPS2QQZ128rmk = 4371,
VCVTTPS2QQZ128rmkz = 4372,
VCVTTPS2QQZ128rr = 4373,
VCVTTPS2QQZ128rrk = 4374,
VCVTTPS2QQZ128rrkz = 4375,
VCVTTPS2QQZ256rm = 4376,
VCVTTPS2QQZ256rmb = 4377,
VCVTTPS2QQZ256rmbk = 4378,
VCVTTPS2QQZ256rmbkz = 4379,
VCVTTPS2QQZ256rmk = 4380,
VCVTTPS2QQZ256rmkz = 4381,
VCVTTPS2QQZ256rr = 4382,
VCVTTPS2QQZ256rrk = 4383,
VCVTTPS2QQZ256rrkz = 4384,
VCVTTPS2QQZrm = 4385,
VCVTTPS2QQZrmb = 4386,
VCVTTPS2QQZrmbk = 4387,
VCVTTPS2QQZrmbkz = 4388,
VCVTTPS2QQZrmk = 4389,
VCVTTPS2QQZrmkz = 4390,
VCVTTPS2QQZrr = 4391,
VCVTTPS2QQZrrb = 4392,
VCVTTPS2QQZrrbk = 4393,
VCVTTPS2QQZrrbkz = 4394,
VCVTTPS2QQZrrk = 4395,
VCVTTPS2QQZrrkz = 4396,
VCVTTPS2UDQZ128rm = 4397,
VCVTTPS2UDQZ128rmb = 4398,
VCVTTPS2UDQZ128rmbk = 4399,
VCVTTPS2UDQZ128rmbkz = 4400,
VCVTTPS2UDQZ128rmk = 4401,
VCVTTPS2UDQZ128rmkz = 4402,
VCVTTPS2UDQZ128rr = 4403,
VCVTTPS2UDQZ128rrk = 4404,
VCVTTPS2UDQZ128rrkz = 4405,
VCVTTPS2UDQZ256rm = 4406,
VCVTTPS2UDQZ256rmb = 4407,
VCVTTPS2UDQZ256rmbk = 4408,
VCVTTPS2UDQZ256rmbkz = 4409,
VCVTTPS2UDQZ256rmk = 4410,
VCVTTPS2UDQZ256rmkz = 4411,
VCVTTPS2UDQZ256rr = 4412,
VCVTTPS2UDQZ256rrk = 4413,
VCVTTPS2UDQZ256rrkz = 4414,
VCVTTPS2UDQZrm = 4415,
VCVTTPS2UDQZrmb = 4416,
VCVTTPS2UDQZrmbk = 4417,
VCVTTPS2UDQZrmbkz = 4418,
VCVTTPS2UDQZrmk = 4419,
VCVTTPS2UDQZrmkz = 4420,
VCVTTPS2UDQZrr = 4421,
VCVTTPS2UDQZrrb = 4422,
VCVTTPS2UDQZrrbk = 4423,
VCVTTPS2UDQZrrbkz = 4424,
VCVTTPS2UDQZrrk = 4425,
VCVTTPS2UDQZrrkz = 4426,
VCVTTPS2UQQZ128rm = 4427,
VCVTTPS2UQQZ128rmb = 4428,
VCVTTPS2UQQZ128rmbk = 4429,
VCVTTPS2UQQZ128rmbkz = 4430,
VCVTTPS2UQQZ128rmk = 4431,
VCVTTPS2UQQZ128rmkz = 4432,
VCVTTPS2UQQZ128rr = 4433,
VCVTTPS2UQQZ128rrk = 4434,
VCVTTPS2UQQZ128rrkz = 4435,
VCVTTPS2UQQZ256rm = 4436,
VCVTTPS2UQQZ256rmb = 4437,
VCVTTPS2UQQZ256rmbk = 4438,
VCVTTPS2UQQZ256rmbkz = 4439,
VCVTTPS2UQQZ256rmk = 4440,
VCVTTPS2UQQZ256rmkz = 4441,
VCVTTPS2UQQZ256rr = 4442,
VCVTTPS2UQQZ256rrk = 4443,
VCVTTPS2UQQZ256rrkz = 4444,
VCVTTPS2UQQZrm = 4445,
VCVTTPS2UQQZrmb = 4446,
VCVTTPS2UQQZrmbk = 4447,
VCVTTPS2UQQZrmbkz = 4448,
VCVTTPS2UQQZrmk = 4449,
VCVTTPS2UQQZrmkz = 4450,
VCVTTPS2UQQZrr = 4451,
VCVTTPS2UQQZrrb = 4452,
VCVTTPS2UQQZrrbk = 4453,
VCVTTPS2UQQZrrbkz = 4454,
VCVTTPS2UQQZrrk = 4455,
VCVTTPS2UQQZrrkz = 4456,
VCVTTSD2SI64Zrb = 4457,
VCVTTSD2SI64Zrb_Int = 4458,
VCVTTSD2SI64Zrm = 4459,
VCVTTSD2SI64Zrm_Int = 4460,
VCVTTSD2SI64Zrr = 4461,
VCVTTSD2SI64Zrr_Int = 4462,
VCVTTSD2SI64rm = 4463,
VCVTTSD2SI64rr = 4464,
VCVTTSD2SIZrb = 4465,
VCVTTSD2SIZrb_Int = 4466,
VCVTTSD2SIZrm = 4467,
VCVTTSD2SIZrm_Int = 4468,
VCVTTSD2SIZrr = 4469,
VCVTTSD2SIZrr_Int = 4470,
VCVTTSD2SIrm = 4471,
VCVTTSD2SIrr = 4472,
VCVTTSD2USI64Zrb = 4473,
VCVTTSD2USI64Zrb_Int = 4474,
VCVTTSD2USI64Zrm = 4475,
VCVTTSD2USI64Zrm_Int = 4476,
VCVTTSD2USI64Zrr = 4477,
VCVTTSD2USI64Zrr_Int = 4478,
VCVTTSD2USIZrb = 4479,
VCVTTSD2USIZrb_Int = 4480,
VCVTTSD2USIZrm = 4481,
VCVTTSD2USIZrm_Int = 4482,
VCVTTSD2USIZrr = 4483,
VCVTTSD2USIZrr_Int = 4484,
VCVTTSS2SI64Zrb = 4485,
VCVTTSS2SI64Zrb_Int = 4486,
VCVTTSS2SI64Zrm = 4487,
VCVTTSS2SI64Zrm_Int = 4488,
VCVTTSS2SI64Zrr = 4489,
VCVTTSS2SI64Zrr_Int = 4490,
VCVTTSS2SI64rm = 4491,
VCVTTSS2SI64rr = 4492,
VCVTTSS2SIZrb = 4493,
VCVTTSS2SIZrb_Int = 4494,
VCVTTSS2SIZrm = 4495,
VCVTTSS2SIZrm_Int = 4496,
VCVTTSS2SIZrr = 4497,
VCVTTSS2SIZrr_Int = 4498,
VCVTTSS2SIrm = 4499,
VCVTTSS2SIrr = 4500,
VCVTTSS2USI64Zrb = 4501,
VCVTTSS2USI64Zrb_Int = 4502,
VCVTTSS2USI64Zrm = 4503,
VCVTTSS2USI64Zrm_Int = 4504,
VCVTTSS2USI64Zrr = 4505,
VCVTTSS2USI64Zrr_Int = 4506,
VCVTTSS2USIZrb = 4507,
VCVTTSS2USIZrb_Int = 4508,
VCVTTSS2USIZrm = 4509,
VCVTTSS2USIZrm_Int = 4510,
VCVTTSS2USIZrr = 4511,
VCVTTSS2USIZrr_Int = 4512,
VCVTUDQ2PDZ128rm = 4513,
VCVTUDQ2PDZ128rmb = 4514,
VCVTUDQ2PDZ128rmbk = 4515,
VCVTUDQ2PDZ128rmbkz = 4516,
VCVTUDQ2PDZ128rmk = 4517,
VCVTUDQ2PDZ128rmkz = 4518,
VCVTUDQ2PDZ128rr = 4519,
VCVTUDQ2PDZ128rrk = 4520,
VCVTUDQ2PDZ128rrkz = 4521,
VCVTUDQ2PDZ256rm = 4522,
VCVTUDQ2PDZ256rmb = 4523,
VCVTUDQ2PDZ256rmbk = 4524,
VCVTUDQ2PDZ256rmbkz = 4525,
VCVTUDQ2PDZ256rmk = 4526,
VCVTUDQ2PDZ256rmkz = 4527,
VCVTUDQ2PDZ256rr = 4528,
VCVTUDQ2PDZ256rrk = 4529,
VCVTUDQ2PDZ256rrkz = 4530,
VCVTUDQ2PDZrm = 4531,
VCVTUDQ2PDZrmb = 4532,
VCVTUDQ2PDZrmbk = 4533,
VCVTUDQ2PDZrmbkz = 4534,
VCVTUDQ2PDZrmk = 4535,
VCVTUDQ2PDZrmkz = 4536,
VCVTUDQ2PDZrr = 4537,
VCVTUDQ2PDZrrk = 4538,
VCVTUDQ2PDZrrkz = 4539,
VCVTUDQ2PSZ128rm = 4540,
VCVTUDQ2PSZ128rmb = 4541,
VCVTUDQ2PSZ128rmbk = 4542,
VCVTUDQ2PSZ128rmbkz = 4543,
VCVTUDQ2PSZ128rmk = 4544,
VCVTUDQ2PSZ128rmkz = 4545,
VCVTUDQ2PSZ128rr = 4546,
VCVTUDQ2PSZ128rrk = 4547,
VCVTUDQ2PSZ128rrkz = 4548,
VCVTUDQ2PSZ256rm = 4549,
VCVTUDQ2PSZ256rmb = 4550,
VCVTUDQ2PSZ256rmbk = 4551,
VCVTUDQ2PSZ256rmbkz = 4552,
VCVTUDQ2PSZ256rmk = 4553,
VCVTUDQ2PSZ256rmkz = 4554,
VCVTUDQ2PSZ256rr = 4555,
VCVTUDQ2PSZ256rrk = 4556,
VCVTUDQ2PSZ256rrkz = 4557,
VCVTUDQ2PSZrm = 4558,
VCVTUDQ2PSZrmb = 4559,
VCVTUDQ2PSZrmbk = 4560,
VCVTUDQ2PSZrmbkz = 4561,
VCVTUDQ2PSZrmk = 4562,
VCVTUDQ2PSZrmkz = 4563,
VCVTUDQ2PSZrr = 4564,
VCVTUDQ2PSZrrb = 4565,
VCVTUDQ2PSZrrbk = 4566,
VCVTUDQ2PSZrrbkz = 4567,
VCVTUDQ2PSZrrk = 4568,
VCVTUDQ2PSZrrkz = 4569,
VCVTUQQ2PDZ128rm = 4570,
VCVTUQQ2PDZ128rmb = 4571,
VCVTUQQ2PDZ128rmbk = 4572,
VCVTUQQ2PDZ128rmbkz = 4573,
VCVTUQQ2PDZ128rmk = 4574,
VCVTUQQ2PDZ128rmkz = 4575,
VCVTUQQ2PDZ128rr = 4576,
VCVTUQQ2PDZ128rrk = 4577,
VCVTUQQ2PDZ128rrkz = 4578,
VCVTUQQ2PDZ256rm = 4579,
VCVTUQQ2PDZ256rmb = 4580,
VCVTUQQ2PDZ256rmbk = 4581,
VCVTUQQ2PDZ256rmbkz = 4582,
VCVTUQQ2PDZ256rmk = 4583,
VCVTUQQ2PDZ256rmkz = 4584,
VCVTUQQ2PDZ256rr = 4585,
VCVTUQQ2PDZ256rrk = 4586,
VCVTUQQ2PDZ256rrkz = 4587,
VCVTUQQ2PDZrm = 4588,
VCVTUQQ2PDZrmb = 4589,
VCVTUQQ2PDZrmbk = 4590,
VCVTUQQ2PDZrmbkz = 4591,
VCVTUQQ2PDZrmk = 4592,
VCVTUQQ2PDZrmkz = 4593,
VCVTUQQ2PDZrr = 4594,
VCVTUQQ2PDZrrb = 4595,
VCVTUQQ2PDZrrbk = 4596,
VCVTUQQ2PDZrrbkz = 4597,
VCVTUQQ2PDZrrk = 4598,
VCVTUQQ2PDZrrkz = 4599,
VCVTUQQ2PSZ128rm = 4600,
VCVTUQQ2PSZ128rmb = 4601,
VCVTUQQ2PSZ128rmbk = 4602,
VCVTUQQ2PSZ128rmbkz = 4603,
VCVTUQQ2PSZ128rmk = 4604,
VCVTUQQ2PSZ128rmkz = 4605,
VCVTUQQ2PSZ128rr = 4606,
VCVTUQQ2PSZ128rrk = 4607,
VCVTUQQ2PSZ128rrkz = 4608,
VCVTUQQ2PSZ256rm = 4609,
VCVTUQQ2PSZ256rmb = 4610,
VCVTUQQ2PSZ256rmbk = 4611,
VCVTUQQ2PSZ256rmbkz = 4612,
VCVTUQQ2PSZ256rmk = 4613,
VCVTUQQ2PSZ256rmkz = 4614,
VCVTUQQ2PSZ256rr = 4615,
VCVTUQQ2PSZ256rrk = 4616,
VCVTUQQ2PSZ256rrkz = 4617,
VCVTUQQ2PSZrm = 4618,
VCVTUQQ2PSZrmb = 4619,
VCVTUQQ2PSZrmbk = 4620,
VCVTUQQ2PSZrmbkz = 4621,
VCVTUQQ2PSZrmk = 4622,
VCVTUQQ2PSZrmkz = 4623,
VCVTUQQ2PSZrr = 4624,
VCVTUQQ2PSZrrb = 4625,
VCVTUQQ2PSZrrbk = 4626,
VCVTUQQ2PSZrrbkz = 4627,
VCVTUQQ2PSZrrk = 4628,
VCVTUQQ2PSZrrkz = 4629,
VCVTUSI2SDZrm = 4630,
VCVTUSI2SDZrm_Int = 4631,
VCVTUSI2SDZrr = 4632,
VCVTUSI2SDZrr_Int = 4633,
VCVTUSI2SSZrm = 4634,
VCVTUSI2SSZrm_Int = 4635,
VCVTUSI2SSZrr = 4636,
VCVTUSI2SSZrr_Int = 4637,
VCVTUSI2SSZrrb_Int = 4638,
VCVTUSI642SDZrm = 4639,
VCVTUSI642SDZrm_Int = 4640,
VCVTUSI642SDZrr = 4641,
VCVTUSI642SDZrr_Int = 4642,
VCVTUSI642SDZrrb_Int = 4643,
VCVTUSI642SSZrm = 4644,
VCVTUSI642SSZrm_Int = 4645,
VCVTUSI642SSZrr = 4646,
VCVTUSI642SSZrr_Int = 4647,
VCVTUSI642SSZrrb_Int = 4648,
VDBPSADBWZ128rmi = 4649,
VDBPSADBWZ128rmik = 4650,
VDBPSADBWZ128rmikz = 4651,
VDBPSADBWZ128rri = 4652,
VDBPSADBWZ128rrik = 4653,
VDBPSADBWZ128rrikz = 4654,
VDBPSADBWZ256rmi = 4655,
VDBPSADBWZ256rmik = 4656,
VDBPSADBWZ256rmikz = 4657,
VDBPSADBWZ256rri = 4658,
VDBPSADBWZ256rrik = 4659,
VDBPSADBWZ256rrikz = 4660,
VDBPSADBWZrmi = 4661,
VDBPSADBWZrmik = 4662,
VDBPSADBWZrmikz = 4663,
VDBPSADBWZrri = 4664,
VDBPSADBWZrrik = 4665,
VDBPSADBWZrrikz = 4666,
VDIVPDYrm = 4667,
VDIVPDYrr = 4668,
VDIVPDZ128rm = 4669,
VDIVPDZ128rmb = 4670,
VDIVPDZ128rmbk = 4671,
VDIVPDZ128rmbkz = 4672,
VDIVPDZ128rmk = 4673,
VDIVPDZ128rmkz = 4674,
VDIVPDZ128rr = 4675,
VDIVPDZ128rrk = 4676,
VDIVPDZ128rrkz = 4677,
VDIVPDZ256rm = 4678,
VDIVPDZ256rmb = 4679,
VDIVPDZ256rmbk = 4680,
VDIVPDZ256rmbkz = 4681,
VDIVPDZ256rmk = 4682,
VDIVPDZ256rmkz = 4683,
VDIVPDZ256rr = 4684,
VDIVPDZ256rrk = 4685,
VDIVPDZ256rrkz = 4686,
VDIVPDZrb = 4687,
VDIVPDZrbk = 4688,
VDIVPDZrbkz = 4689,
VDIVPDZrm = 4690,
VDIVPDZrmb = 4691,
VDIVPDZrmbk = 4692,
VDIVPDZrmbkz = 4693,
VDIVPDZrmk = 4694,
VDIVPDZrmkz = 4695,
VDIVPDZrr = 4696,
VDIVPDZrrk = 4697,
VDIVPDZrrkz = 4698,
VDIVPDrm = 4699,
VDIVPDrr = 4700,
VDIVPSYrm = 4701,
VDIVPSYrr = 4702,
VDIVPSZ128rm = 4703,
VDIVPSZ128rmb = 4704,
VDIVPSZ128rmbk = 4705,
VDIVPSZ128rmbkz = 4706,
VDIVPSZ128rmk = 4707,
VDIVPSZ128rmkz = 4708,
VDIVPSZ128rr = 4709,
VDIVPSZ128rrk = 4710,
VDIVPSZ128rrkz = 4711,
VDIVPSZ256rm = 4712,
VDIVPSZ256rmb = 4713,
VDIVPSZ256rmbk = 4714,
VDIVPSZ256rmbkz = 4715,
VDIVPSZ256rmk = 4716,
VDIVPSZ256rmkz = 4717,
VDIVPSZ256rr = 4718,
VDIVPSZ256rrk = 4719,
VDIVPSZ256rrkz = 4720,
VDIVPSZrb = 4721,
VDIVPSZrbk = 4722,
VDIVPSZrbkz = 4723,
VDIVPSZrm = 4724,
VDIVPSZrmb = 4725,
VDIVPSZrmbk = 4726,
VDIVPSZrmbkz = 4727,
VDIVPSZrmk = 4728,
VDIVPSZrmkz = 4729,
VDIVPSZrr = 4730,
VDIVPSZrrk = 4731,
VDIVPSZrrkz = 4732,
VDIVPSrm = 4733,
VDIVPSrr = 4734,
VDIVSDZrm = 4735,
VDIVSDZrm_Int = 4736,
VDIVSDZrm_Intk = 4737,
VDIVSDZrm_Intkz = 4738,
VDIVSDZrr = 4739,
VDIVSDZrr_Int = 4740,
VDIVSDZrr_Intk = 4741,
VDIVSDZrr_Intkz = 4742,
VDIVSDZrrb = 4743,
VDIVSDZrrbk = 4744,
VDIVSDZrrbkz = 4745,
VDIVSDrm = 4746,
VDIVSDrm_Int = 4747,
VDIVSDrr = 4748,
VDIVSDrr_Int = 4749,
VDIVSSZrm = 4750,
VDIVSSZrm_Int = 4751,
VDIVSSZrm_Intk = 4752,
VDIVSSZrm_Intkz = 4753,
VDIVSSZrr = 4754,
VDIVSSZrr_Int = 4755,
VDIVSSZrr_Intk = 4756,
VDIVSSZrr_Intkz = 4757,
VDIVSSZrrb = 4758,
VDIVSSZrrbk = 4759,
VDIVSSZrrbkz = 4760,
VDIVSSrm = 4761,
VDIVSSrm_Int = 4762,
VDIVSSrr = 4763,
VDIVSSrr_Int = 4764,
VDPPDrmi = 4765,
VDPPDrri = 4766,
VDPPSYrmi = 4767,
VDPPSYrri = 4768,
VDPPSrmi = 4769,
VDPPSrri = 4770,
VERRm = 4771,
VERRr = 4772,
VERWm = 4773,
VERWr = 4774,
VEXP2PDm = 4775,
VEXP2PDmb = 4776,
VEXP2PDmbk = 4777,
VEXP2PDmbkz = 4778,
VEXP2PDmk = 4779,
VEXP2PDmkz = 4780,
VEXP2PDr = 4781,
VEXP2PDrb = 4782,
VEXP2PDrbk = 4783,
VEXP2PDrbkz = 4784,
VEXP2PDrk = 4785,
VEXP2PDrkz = 4786,
VEXP2PSm = 4787,
VEXP2PSmb = 4788,
VEXP2PSmbk = 4789,
VEXP2PSmbkz = 4790,
VEXP2PSmk = 4791,
VEXP2PSmkz = 4792,
VEXP2PSr = 4793,
VEXP2PSrb = 4794,
VEXP2PSrbk = 4795,
VEXP2PSrbkz = 4796,
VEXP2PSrk = 4797,
VEXP2PSrkz = 4798,
VEXPANDPDZ128rm = 4799,
VEXPANDPDZ128rmk = 4800,
VEXPANDPDZ128rmkz = 4801,
VEXPANDPDZ128rr = 4802,
VEXPANDPDZ128rrk = 4803,
VEXPANDPDZ128rrkz = 4804,
VEXPANDPDZ256rm = 4805,
VEXPANDPDZ256rmk = 4806,
VEXPANDPDZ256rmkz = 4807,
VEXPANDPDZ256rr = 4808,
VEXPANDPDZ256rrk = 4809,
VEXPANDPDZ256rrkz = 4810,
VEXPANDPDZrm = 4811,
VEXPANDPDZrmk = 4812,
VEXPANDPDZrmkz = 4813,
VEXPANDPDZrr = 4814,
VEXPANDPDZrrk = 4815,
VEXPANDPDZrrkz = 4816,
VEXPANDPSZ128rm = 4817,
VEXPANDPSZ128rmk = 4818,
VEXPANDPSZ128rmkz = 4819,
VEXPANDPSZ128rr = 4820,
VEXPANDPSZ128rrk = 4821,
VEXPANDPSZ128rrkz = 4822,
VEXPANDPSZ256rm = 4823,
VEXPANDPSZ256rmk = 4824,
VEXPANDPSZ256rmkz = 4825,
VEXPANDPSZ256rr = 4826,
VEXPANDPSZ256rrk = 4827,
VEXPANDPSZ256rrkz = 4828,
VEXPANDPSZrm = 4829,
VEXPANDPSZrmk = 4830,
VEXPANDPSZrmkz = 4831,
VEXPANDPSZrr = 4832,
VEXPANDPSZrrk = 4833,
VEXPANDPSZrrkz = 4834,
VEXTRACTF128mr = 4835,
VEXTRACTF128rr = 4836,
VEXTRACTF32x4Z256rm = 4837,
VEXTRACTF32x4Z256rmk = 4838,
VEXTRACTF32x4Z256rr = 4839,
VEXTRACTF32x4Z256rrk = 4840,
VEXTRACTF32x4Z256rrkz = 4841,
VEXTRACTF32x4Zrm = 4842,
VEXTRACTF32x4Zrmk = 4843,
VEXTRACTF32x4Zrr = 4844,
VEXTRACTF32x4Zrrk = 4845,
VEXTRACTF32x4Zrrkz = 4846,
VEXTRACTF32x8Zrm = 4847,
VEXTRACTF32x8Zrmk = 4848,
VEXTRACTF32x8Zrr = 4849,
VEXTRACTF32x8Zrrk = 4850,
VEXTRACTF32x8Zrrkz = 4851,
VEXTRACTF64x2Z256rm = 4852,
VEXTRACTF64x2Z256rmk = 4853,
VEXTRACTF64x2Z256rr = 4854,
VEXTRACTF64x2Z256rrk = 4855,
VEXTRACTF64x2Z256rrkz = 4856,
VEXTRACTF64x2Zrm = 4857,
VEXTRACTF64x2Zrmk = 4858,
VEXTRACTF64x2Zrr = 4859,
VEXTRACTF64x2Zrrk = 4860,
VEXTRACTF64x2Zrrkz = 4861,
VEXTRACTF64x4Zrm = 4862,
VEXTRACTF64x4Zrmk = 4863,
VEXTRACTF64x4Zrr = 4864,
VEXTRACTF64x4Zrrk = 4865,
VEXTRACTF64x4Zrrkz = 4866,
VEXTRACTI128mr = 4867,
VEXTRACTI128rr = 4868,
VEXTRACTI32x4Z256rm = 4869,
VEXTRACTI32x4Z256rmk = 4870,
VEXTRACTI32x4Z256rr = 4871,
VEXTRACTI32x4Z256rrk = 4872,
VEXTRACTI32x4Z256rrkz = 4873,
VEXTRACTI32x4Zrm = 4874,
VEXTRACTI32x4Zrmk = 4875,
VEXTRACTI32x4Zrr = 4876,
VEXTRACTI32x4Zrrk = 4877,
VEXTRACTI32x4Zrrkz = 4878,
VEXTRACTI32x8Zrm = 4879,
VEXTRACTI32x8Zrmk = 4880,
VEXTRACTI32x8Zrr = 4881,
VEXTRACTI32x8Zrrk = 4882,
VEXTRACTI32x8Zrrkz = 4883,
VEXTRACTI64x2Z256rm = 4884,
VEXTRACTI64x2Z256rmk = 4885,
VEXTRACTI64x2Z256rr = 4886,
VEXTRACTI64x2Z256rrk = 4887,
VEXTRACTI64x2Z256rrkz = 4888,
VEXTRACTI64x2Zrm = 4889,
VEXTRACTI64x2Zrmk = 4890,
VEXTRACTI64x2Zrr = 4891,
VEXTRACTI64x2Zrrk = 4892,
VEXTRACTI64x2Zrrkz = 4893,
VEXTRACTI64x4Zrm = 4894,
VEXTRACTI64x4Zrmk = 4895,
VEXTRACTI64x4Zrr = 4896,
VEXTRACTI64x4Zrrk = 4897,
VEXTRACTI64x4Zrrkz = 4898,
VEXTRACTPSmr = 4899,
VEXTRACTPSrr = 4900,
VEXTRACTPSzmr = 4901,
VEXTRACTPSzrr = 4902,
VFIXUPIMMPDZ128rmbi = 4903,
VFIXUPIMMPDZ128rmbik = 4904,
VFIXUPIMMPDZ128rmbikz = 4905,
VFIXUPIMMPDZ128rmi = 4906,
VFIXUPIMMPDZ128rmik = 4907,
VFIXUPIMMPDZ128rmikz = 4908,
VFIXUPIMMPDZ128rri = 4909,
VFIXUPIMMPDZ128rrik = 4910,
VFIXUPIMMPDZ128rrikz = 4911,
VFIXUPIMMPDZ256rmbi = 4912,
VFIXUPIMMPDZ256rmbik = 4913,
VFIXUPIMMPDZ256rmbikz = 4914,
VFIXUPIMMPDZ256rmi = 4915,
VFIXUPIMMPDZ256rmik = 4916,
VFIXUPIMMPDZ256rmikz = 4917,
VFIXUPIMMPDZ256rri = 4918,
VFIXUPIMMPDZ256rrik = 4919,
VFIXUPIMMPDZ256rrikz = 4920,
VFIXUPIMMPDZrmbi = 4921,
VFIXUPIMMPDZrmbik = 4922,
VFIXUPIMMPDZrmbikz = 4923,
VFIXUPIMMPDZrmi = 4924,
VFIXUPIMMPDZrmik = 4925,
VFIXUPIMMPDZrmikz = 4926,
VFIXUPIMMPDZrri = 4927,
VFIXUPIMMPDZrrib = 4928,
VFIXUPIMMPDZrribk = 4929,
VFIXUPIMMPDZrribkz = 4930,
VFIXUPIMMPDZrrik = 4931,
VFIXUPIMMPDZrrikz = 4932,
VFIXUPIMMPSZ128rmbi = 4933,
VFIXUPIMMPSZ128rmbik = 4934,
VFIXUPIMMPSZ128rmbikz = 4935,
VFIXUPIMMPSZ128rmi = 4936,
VFIXUPIMMPSZ128rmik = 4937,
VFIXUPIMMPSZ128rmikz = 4938,
VFIXUPIMMPSZ128rri = 4939,
VFIXUPIMMPSZ128rrik = 4940,
VFIXUPIMMPSZ128rrikz = 4941,
VFIXUPIMMPSZ256rmbi = 4942,
VFIXUPIMMPSZ256rmbik = 4943,
VFIXUPIMMPSZ256rmbikz = 4944,
VFIXUPIMMPSZ256rmi = 4945,
VFIXUPIMMPSZ256rmik = 4946,
VFIXUPIMMPSZ256rmikz = 4947,
VFIXUPIMMPSZ256rri = 4948,
VFIXUPIMMPSZ256rrik = 4949,
VFIXUPIMMPSZ256rrikz = 4950,
VFIXUPIMMPSZrmbi = 4951,
VFIXUPIMMPSZrmbik = 4952,
VFIXUPIMMPSZrmbikz = 4953,
VFIXUPIMMPSZrmi = 4954,
VFIXUPIMMPSZrmik = 4955,
VFIXUPIMMPSZrmikz = 4956,
VFIXUPIMMPSZrri = 4957,
VFIXUPIMMPSZrrib = 4958,
VFIXUPIMMPSZrribk = 4959,
VFIXUPIMMPSZrribkz = 4960,
VFIXUPIMMPSZrrik = 4961,
VFIXUPIMMPSZrrikz = 4962,
VFIXUPIMMSDrmi = 4963,
VFIXUPIMMSDrmik = 4964,
VFIXUPIMMSDrmikz = 4965,
VFIXUPIMMSDrri = 4966,
VFIXUPIMMSDrrib = 4967,
VFIXUPIMMSDrribk = 4968,
VFIXUPIMMSDrribkz = 4969,
VFIXUPIMMSDrrik = 4970,
VFIXUPIMMSDrrikz = 4971,
VFIXUPIMMSSrmi = 4972,
VFIXUPIMMSSrmik = 4973,
VFIXUPIMMSSrmikz = 4974,
VFIXUPIMMSSrri = 4975,
VFIXUPIMMSSrrib = 4976,
VFIXUPIMMSSrribk = 4977,
VFIXUPIMMSSrribkz = 4978,
VFIXUPIMMSSrrik = 4979,
VFIXUPIMMSSrrikz = 4980,
VFMADD132PDZ128m = 4981,
VFMADD132PDZ128mb = 4982,
VFMADD132PDZ128mbk = 4983,
VFMADD132PDZ128mbkz = 4984,
VFMADD132PDZ128mk = 4985,
VFMADD132PDZ128mkz = 4986,
VFMADD132PDZ128r = 4987,
VFMADD132PDZ128rk = 4988,
VFMADD132PDZ128rkz = 4989,
VFMADD132PDZ256m = 4990,
VFMADD132PDZ256mb = 4991,
VFMADD132PDZ256mbk = 4992,
VFMADD132PDZ256mbkz = 4993,
VFMADD132PDZ256mk = 4994,
VFMADD132PDZ256mkz = 4995,
VFMADD132PDZ256r = 4996,
VFMADD132PDZ256rk = 4997,
VFMADD132PDZ256rkz = 4998,
VFMADD132PDZm = 4999,
VFMADD132PDZmb = 5000,
VFMADD132PDZmbk = 5001,
VFMADD132PDZmbkz = 5002,
VFMADD132PDZmk = 5003,
VFMADD132PDZmkz = 5004,
VFMADD132PDZr = 5005,
VFMADD132PDZrb = 5006,
VFMADD132PDZrbk = 5007,
VFMADD132PDZrbkz = 5008,
VFMADD132PDZrk = 5009,
VFMADD132PDZrkz = 5010,
VFMADD132PSZ128m = 5011,
VFMADD132PSZ128mb = 5012,
VFMADD132PSZ128mbk = 5013,
VFMADD132PSZ128mbkz = 5014,
VFMADD132PSZ128mk = 5015,
VFMADD132PSZ128mkz = 5016,
VFMADD132PSZ128r = 5017,
VFMADD132PSZ128rk = 5018,
VFMADD132PSZ128rkz = 5019,
VFMADD132PSZ256m = 5020,
VFMADD132PSZ256mb = 5021,
VFMADD132PSZ256mbk = 5022,
VFMADD132PSZ256mbkz = 5023,
VFMADD132PSZ256mk = 5024,
VFMADD132PSZ256mkz = 5025,
VFMADD132PSZ256r = 5026,
VFMADD132PSZ256rk = 5027,
VFMADD132PSZ256rkz = 5028,
VFMADD132PSZm = 5029,
VFMADD132PSZmb = 5030,
VFMADD132PSZmbk = 5031,
VFMADD132PSZmbkz = 5032,
VFMADD132PSZmk = 5033,
VFMADD132PSZmkz = 5034,
VFMADD132PSZr = 5035,
VFMADD132PSZrb = 5036,
VFMADD132PSZrbk = 5037,
VFMADD132PSZrbkz = 5038,
VFMADD132PSZrk = 5039,
VFMADD132PSZrkz = 5040,
VFMADD132SDm = 5041,
VFMADD132SDm_Int = 5042,
VFMADD132SDm_Intk = 5043,
VFMADD132SDm_Intkz = 5044,
VFMADD132SDr = 5045,
VFMADD132SDr_Int = 5046,
VFMADD132SDr_Intk = 5047,
VFMADD132SDr_Intkz = 5048,
VFMADD132SDrb_Int = 5049,
VFMADD132SDrb_Intk = 5050,
VFMADD132SDrb_Intkz = 5051,
VFMADD132SSm = 5052,
VFMADD132SSm_Int = 5053,
VFMADD132SSm_Intk = 5054,
VFMADD132SSm_Intkz = 5055,
VFMADD132SSr = 5056,
VFMADD132SSr_Int = 5057,
VFMADD132SSr_Intk = 5058,
VFMADD132SSr_Intkz = 5059,
VFMADD132SSrb_Int = 5060,
VFMADD132SSrb_Intk = 5061,
VFMADD132SSrb_Intkz = 5062,
VFMADD213PDZ128m = 5063,
VFMADD213PDZ128mb = 5064,
VFMADD213PDZ128mbk = 5065,
VFMADD213PDZ128mbkz = 5066,
VFMADD213PDZ128mk = 5067,
VFMADD213PDZ128mkz = 5068,
VFMADD213PDZ128r = 5069,
VFMADD213PDZ128rk = 5070,
VFMADD213PDZ128rkz = 5071,
VFMADD213PDZ256m = 5072,
VFMADD213PDZ256mb = 5073,
VFMADD213PDZ256mbk = 5074,
VFMADD213PDZ256mbkz = 5075,
VFMADD213PDZ256mk = 5076,
VFMADD213PDZ256mkz = 5077,
VFMADD213PDZ256r = 5078,
VFMADD213PDZ256rk = 5079,
VFMADD213PDZ256rkz = 5080,
VFMADD213PDZm = 5081,
VFMADD213PDZmb = 5082,
VFMADD213PDZmbk = 5083,
VFMADD213PDZmbkz = 5084,
VFMADD213PDZmk = 5085,
VFMADD213PDZmkz = 5086,
VFMADD213PDZr = 5087,
VFMADD213PDZrb = 5088,
VFMADD213PDZrbk = 5089,
VFMADD213PDZrbkz = 5090,
VFMADD213PDZrk = 5091,
VFMADD213PDZrkz = 5092,
VFMADD213PSZ128m = 5093,
VFMADD213PSZ128mb = 5094,
VFMADD213PSZ128mbk = 5095,
VFMADD213PSZ128mbkz = 5096,
VFMADD213PSZ128mk = 5097,
VFMADD213PSZ128mkz = 5098,
VFMADD213PSZ128r = 5099,
VFMADD213PSZ128rk = 5100,
VFMADD213PSZ128rkz = 5101,
VFMADD213PSZ256m = 5102,
VFMADD213PSZ256mb = 5103,
VFMADD213PSZ256mbk = 5104,
VFMADD213PSZ256mbkz = 5105,
VFMADD213PSZ256mk = 5106,
VFMADD213PSZ256mkz = 5107,
VFMADD213PSZ256r = 5108,
VFMADD213PSZ256rk = 5109,
VFMADD213PSZ256rkz = 5110,
VFMADD213PSZm = 5111,
VFMADD213PSZmb = 5112,
VFMADD213PSZmbk = 5113,
VFMADD213PSZmbkz = 5114,
VFMADD213PSZmk = 5115,
VFMADD213PSZmkz = 5116,
VFMADD213PSZr = 5117,
VFMADD213PSZrb = 5118,
VFMADD213PSZrbk = 5119,
VFMADD213PSZrbkz = 5120,
VFMADD213PSZrk = 5121,
VFMADD213PSZrkz = 5122,
VFMADD213SDm = 5123,
VFMADD213SDm_Int = 5124,
VFMADD213SDm_Intk = 5125,
VFMADD213SDm_Intkz = 5126,
VFMADD213SDr = 5127,
VFMADD213SDr_Int = 5128,
VFMADD213SDr_Intk = 5129,
VFMADD213SDr_Intkz = 5130,
VFMADD213SDrb_Int = 5131,
VFMADD213SDrb_Intk = 5132,
VFMADD213SDrb_Intkz = 5133,
VFMADD213SSm = 5134,
VFMADD213SSm_Int = 5135,
VFMADD213SSm_Intk = 5136,
VFMADD213SSm_Intkz = 5137,
VFMADD213SSr = 5138,
VFMADD213SSr_Int = 5139,
VFMADD213SSr_Intk = 5140,
VFMADD213SSr_Intkz = 5141,
VFMADD213SSrb_Int = 5142,
VFMADD213SSrb_Intk = 5143,
VFMADD213SSrb_Intkz = 5144,
VFMADD231PDZ128m = 5145,
VFMADD231PDZ128mb = 5146,
VFMADD231PDZ128mbk = 5147,
VFMADD231PDZ128mbkz = 5148,
VFMADD231PDZ128mk = 5149,
VFMADD231PDZ128mkz = 5150,
VFMADD231PDZ128r = 5151,
VFMADD231PDZ128rk = 5152,
VFMADD231PDZ128rkz = 5153,
VFMADD231PDZ256m = 5154,
VFMADD231PDZ256mb = 5155,
VFMADD231PDZ256mbk = 5156,
VFMADD231PDZ256mbkz = 5157,
VFMADD231PDZ256mk = 5158,
VFMADD231PDZ256mkz = 5159,
VFMADD231PDZ256r = 5160,
VFMADD231PDZ256rk = 5161,
VFMADD231PDZ256rkz = 5162,
VFMADD231PDZm = 5163,
VFMADD231PDZmb = 5164,
VFMADD231PDZmbk = 5165,
VFMADD231PDZmbkz = 5166,
VFMADD231PDZmk = 5167,
VFMADD231PDZmkz = 5168,
VFMADD231PDZr = 5169,
VFMADD231PDZrb = 5170,
VFMADD231PDZrbk = 5171,
VFMADD231PDZrbkz = 5172,
VFMADD231PDZrk = 5173,
VFMADD231PDZrkz = 5174,
VFMADD231PSZ128m = 5175,
VFMADD231PSZ128mb = 5176,
VFMADD231PSZ128mbk = 5177,
VFMADD231PSZ128mbkz = 5178,
VFMADD231PSZ128mk = 5179,
VFMADD231PSZ128mkz = 5180,
VFMADD231PSZ128r = 5181,
VFMADD231PSZ128rk = 5182,
VFMADD231PSZ128rkz = 5183,
VFMADD231PSZ256m = 5184,
VFMADD231PSZ256mb = 5185,
VFMADD231PSZ256mbk = 5186,
VFMADD231PSZ256mbkz = 5187,
VFMADD231PSZ256mk = 5188,
VFMADD231PSZ256mkz = 5189,
VFMADD231PSZ256r = 5190,
VFMADD231PSZ256rk = 5191,
VFMADD231PSZ256rkz = 5192,
VFMADD231PSZm = 5193,
VFMADD231PSZmb = 5194,
VFMADD231PSZmbk = 5195,
VFMADD231PSZmbkz = 5196,
VFMADD231PSZmk = 5197,
VFMADD231PSZmkz = 5198,
VFMADD231PSZr = 5199,
VFMADD231PSZrb = 5200,
VFMADD231PSZrbk = 5201,
VFMADD231PSZrbkz = 5202,
VFMADD231PSZrk = 5203,
VFMADD231PSZrkz = 5204,
VFMADD231SDm = 5205,
VFMADD231SDm_Int = 5206,
VFMADD231SDm_Intk = 5207,
VFMADD231SDm_Intkz = 5208,
VFMADD231SDr = 5209,
VFMADD231SDr_Int = 5210,
VFMADD231SDr_Intk = 5211,
VFMADD231SDr_Intkz = 5212,
VFMADD231SDrb_Int = 5213,
VFMADD231SDrb_Intk = 5214,
VFMADD231SDrb_Intkz = 5215,
VFMADD231SSm = 5216,
VFMADD231SSm_Int = 5217,
VFMADD231SSm_Intk = 5218,
VFMADD231SSm_Intkz = 5219,
VFMADD231SSr = 5220,
VFMADD231SSr_Int = 5221,
VFMADD231SSr_Intk = 5222,
VFMADD231SSr_Intkz = 5223,
VFMADD231SSrb_Int = 5224,
VFMADD231SSrb_Intk = 5225,
VFMADD231SSrb_Intkz = 5226,
VFMADDPD4mr = 5227,
VFMADDPD4mrY = 5228,
VFMADDPD4rm = 5229,
VFMADDPD4rmY = 5230,
VFMADDPD4rr = 5231,
VFMADDPD4rrY = 5232,
VFMADDPD4rrY_REV = 5233,
VFMADDPD4rr_REV = 5234,
VFMADDPDr132m = 5235,
VFMADDPDr132mY = 5236,
VFMADDPDr132r = 5237,
VFMADDPDr132rY = 5238,
VFMADDPDr213m = 5239,
VFMADDPDr213mY = 5240,
VFMADDPDr213r = 5241,
VFMADDPDr213rY = 5242,
VFMADDPDr231m = 5243,
VFMADDPDr231mY = 5244,
VFMADDPDr231r = 5245,
VFMADDPDr231rY = 5246,
VFMADDPS4mr = 5247,
VFMADDPS4mrY = 5248,
VFMADDPS4rm = 5249,
VFMADDPS4rmY = 5250,
VFMADDPS4rr = 5251,
VFMADDPS4rrY = 5252,
VFMADDPS4rrY_REV = 5253,
VFMADDPS4rr_REV = 5254,
VFMADDPSr132m = 5255,
VFMADDPSr132mY = 5256,
VFMADDPSr132r = 5257,
VFMADDPSr132rY = 5258,
VFMADDPSr213m = 5259,
VFMADDPSr213mY = 5260,
VFMADDPSr213r = 5261,
VFMADDPSr213rY = 5262,
VFMADDPSr231m = 5263,
VFMADDPSr231mY = 5264,
VFMADDPSr231r = 5265,
VFMADDPSr231rY = 5266,
VFMADDSD4mr = 5267,
VFMADDSD4mr_Int = 5268,
VFMADDSD4rm = 5269,
VFMADDSD4rm_Int = 5270,
VFMADDSD4rr = 5271,
VFMADDSD4rr_Int = 5272,
VFMADDSD4rr_REV = 5273,
VFMADDSDr132m = 5274,
VFMADDSDr132m_Int = 5275,
VFMADDSDr132r = 5276,
VFMADDSDr132r_Int = 5277,
VFMADDSDr213m = 5278,
VFMADDSDr213m_Int = 5279,
VFMADDSDr213r = 5280,
VFMADDSDr213r_Int = 5281,
VFMADDSDr231m = 5282,
VFMADDSDr231m_Int = 5283,
VFMADDSDr231r = 5284,
VFMADDSDr231r_Int = 5285,
VFMADDSS4mr = 5286,
VFMADDSS4mr_Int = 5287,
VFMADDSS4rm = 5288,
VFMADDSS4rm_Int = 5289,
VFMADDSS4rr = 5290,
VFMADDSS4rr_Int = 5291,
VFMADDSS4rr_REV = 5292,
VFMADDSSr132m = 5293,
VFMADDSSr132m_Int = 5294,
VFMADDSSr132r = 5295,
VFMADDSSr132r_Int = 5296,
VFMADDSSr213m = 5297,
VFMADDSSr213m_Int = 5298,
VFMADDSSr213r = 5299,
VFMADDSSr213r_Int = 5300,
VFMADDSSr231m = 5301,
VFMADDSSr231m_Int = 5302,
VFMADDSSr231r = 5303,
VFMADDSSr231r_Int = 5304,
VFMADDSUB132PDZ128m = 5305,
VFMADDSUB132PDZ128mb = 5306,
VFMADDSUB132PDZ128mbk = 5307,
VFMADDSUB132PDZ128mbkz = 5308,
VFMADDSUB132PDZ128mk = 5309,
VFMADDSUB132PDZ128mkz = 5310,
VFMADDSUB132PDZ128r = 5311,
VFMADDSUB132PDZ128rk = 5312,
VFMADDSUB132PDZ128rkz = 5313,
VFMADDSUB132PDZ256m = 5314,
VFMADDSUB132PDZ256mb = 5315,
VFMADDSUB132PDZ256mbk = 5316,
VFMADDSUB132PDZ256mbkz = 5317,
VFMADDSUB132PDZ256mk = 5318,
VFMADDSUB132PDZ256mkz = 5319,
VFMADDSUB132PDZ256r = 5320,
VFMADDSUB132PDZ256rk = 5321,
VFMADDSUB132PDZ256rkz = 5322,
VFMADDSUB132PDZm = 5323,
VFMADDSUB132PDZmb = 5324,
VFMADDSUB132PDZmbk = 5325,
VFMADDSUB132PDZmbkz = 5326,
VFMADDSUB132PDZmk = 5327,
VFMADDSUB132PDZmkz = 5328,
VFMADDSUB132PDZr = 5329,
VFMADDSUB132PDZrb = 5330,
VFMADDSUB132PDZrbk = 5331,
VFMADDSUB132PDZrbkz = 5332,
VFMADDSUB132PDZrk = 5333,
VFMADDSUB132PDZrkz = 5334,
VFMADDSUB132PSZ128m = 5335,
VFMADDSUB132PSZ128mb = 5336,
VFMADDSUB132PSZ128mbk = 5337,
VFMADDSUB132PSZ128mbkz = 5338,
VFMADDSUB132PSZ128mk = 5339,
VFMADDSUB132PSZ128mkz = 5340,
VFMADDSUB132PSZ128r = 5341,
VFMADDSUB132PSZ128rk = 5342,
VFMADDSUB132PSZ128rkz = 5343,
VFMADDSUB132PSZ256m = 5344,
VFMADDSUB132PSZ256mb = 5345,
VFMADDSUB132PSZ256mbk = 5346,
VFMADDSUB132PSZ256mbkz = 5347,
VFMADDSUB132PSZ256mk = 5348,
VFMADDSUB132PSZ256mkz = 5349,
VFMADDSUB132PSZ256r = 5350,
VFMADDSUB132PSZ256rk = 5351,
VFMADDSUB132PSZ256rkz = 5352,
VFMADDSUB132PSZm = 5353,
VFMADDSUB132PSZmb = 5354,
VFMADDSUB132PSZmbk = 5355,
VFMADDSUB132PSZmbkz = 5356,
VFMADDSUB132PSZmk = 5357,
VFMADDSUB132PSZmkz = 5358,
VFMADDSUB132PSZr = 5359,
VFMADDSUB132PSZrb = 5360,
VFMADDSUB132PSZrbk = 5361,
VFMADDSUB132PSZrbkz = 5362,
VFMADDSUB132PSZrk = 5363,
VFMADDSUB132PSZrkz = 5364,
VFMADDSUB213PDZ128m = 5365,
VFMADDSUB213PDZ128mb = 5366,
VFMADDSUB213PDZ128mbk = 5367,
VFMADDSUB213PDZ128mbkz = 5368,
VFMADDSUB213PDZ128mk = 5369,
VFMADDSUB213PDZ128mkz = 5370,
VFMADDSUB213PDZ128r = 5371,
VFMADDSUB213PDZ128rk = 5372,
VFMADDSUB213PDZ128rkz = 5373,
VFMADDSUB213PDZ256m = 5374,
VFMADDSUB213PDZ256mb = 5375,
VFMADDSUB213PDZ256mbk = 5376,
VFMADDSUB213PDZ256mbkz = 5377,
VFMADDSUB213PDZ256mk = 5378,
VFMADDSUB213PDZ256mkz = 5379,
VFMADDSUB213PDZ256r = 5380,
VFMADDSUB213PDZ256rk = 5381,
VFMADDSUB213PDZ256rkz = 5382,
VFMADDSUB213PDZm = 5383,
VFMADDSUB213PDZmb = 5384,
VFMADDSUB213PDZmbk = 5385,
VFMADDSUB213PDZmbkz = 5386,
VFMADDSUB213PDZmk = 5387,
VFMADDSUB213PDZmkz = 5388,
VFMADDSUB213PDZr = 5389,
VFMADDSUB213PDZrb = 5390,
VFMADDSUB213PDZrbk = 5391,
VFMADDSUB213PDZrbkz = 5392,
VFMADDSUB213PDZrk = 5393,
VFMADDSUB213PDZrkz = 5394,
VFMADDSUB213PSZ128m = 5395,
VFMADDSUB213PSZ128mb = 5396,
VFMADDSUB213PSZ128mbk = 5397,
VFMADDSUB213PSZ128mbkz = 5398,
VFMADDSUB213PSZ128mk = 5399,
VFMADDSUB213PSZ128mkz = 5400,
VFMADDSUB213PSZ128r = 5401,
VFMADDSUB213PSZ128rk = 5402,
VFMADDSUB213PSZ128rkz = 5403,
VFMADDSUB213PSZ256m = 5404,
VFMADDSUB213PSZ256mb = 5405,
VFMADDSUB213PSZ256mbk = 5406,
VFMADDSUB213PSZ256mbkz = 5407,
VFMADDSUB213PSZ256mk = 5408,
VFMADDSUB213PSZ256mkz = 5409,
VFMADDSUB213PSZ256r = 5410,
VFMADDSUB213PSZ256rk = 5411,
VFMADDSUB213PSZ256rkz = 5412,
VFMADDSUB213PSZm = 5413,
VFMADDSUB213PSZmb = 5414,
VFMADDSUB213PSZmbk = 5415,
VFMADDSUB213PSZmbkz = 5416,
VFMADDSUB213PSZmk = 5417,
VFMADDSUB213PSZmkz = 5418,
VFMADDSUB213PSZr = 5419,
VFMADDSUB213PSZrb = 5420,
VFMADDSUB213PSZrbk = 5421,
VFMADDSUB213PSZrbkz = 5422,
VFMADDSUB213PSZrk = 5423,
VFMADDSUB213PSZrkz = 5424,
VFMADDSUB231PDZ128m = 5425,
VFMADDSUB231PDZ128mb = 5426,
VFMADDSUB231PDZ128mbk = 5427,
VFMADDSUB231PDZ128mbkz = 5428,
VFMADDSUB231PDZ128mk = 5429,
VFMADDSUB231PDZ128mkz = 5430,
VFMADDSUB231PDZ128r = 5431,
VFMADDSUB231PDZ128rk = 5432,
VFMADDSUB231PDZ128rkz = 5433,
VFMADDSUB231PDZ256m = 5434,
VFMADDSUB231PDZ256mb = 5435,
VFMADDSUB231PDZ256mbk = 5436,
VFMADDSUB231PDZ256mbkz = 5437,
VFMADDSUB231PDZ256mk = 5438,
VFMADDSUB231PDZ256mkz = 5439,
VFMADDSUB231PDZ256r = 5440,
VFMADDSUB231PDZ256rk = 5441,
VFMADDSUB231PDZ256rkz = 5442,
VFMADDSUB231PDZm = 5443,
VFMADDSUB231PDZmb = 5444,
VFMADDSUB231PDZmbk = 5445,
VFMADDSUB231PDZmbkz = 5446,
VFMADDSUB231PDZmk = 5447,
VFMADDSUB231PDZmkz = 5448,
VFMADDSUB231PDZr = 5449,
VFMADDSUB231PDZrb = 5450,
VFMADDSUB231PDZrbk = 5451,
VFMADDSUB231PDZrbkz = 5452,
VFMADDSUB231PDZrk = 5453,
VFMADDSUB231PDZrkz = 5454,
VFMADDSUB231PSZ128m = 5455,
VFMADDSUB231PSZ128mb = 5456,
VFMADDSUB231PSZ128mbk = 5457,
VFMADDSUB231PSZ128mbkz = 5458,
VFMADDSUB231PSZ128mk = 5459,
VFMADDSUB231PSZ128mkz = 5460,
VFMADDSUB231PSZ128r = 5461,
VFMADDSUB231PSZ128rk = 5462,
VFMADDSUB231PSZ128rkz = 5463,
VFMADDSUB231PSZ256m = 5464,
VFMADDSUB231PSZ256mb = 5465,
VFMADDSUB231PSZ256mbk = 5466,
VFMADDSUB231PSZ256mbkz = 5467,
VFMADDSUB231PSZ256mk = 5468,
VFMADDSUB231PSZ256mkz = 5469,
VFMADDSUB231PSZ256r = 5470,
VFMADDSUB231PSZ256rk = 5471,
VFMADDSUB231PSZ256rkz = 5472,
VFMADDSUB231PSZm = 5473,
VFMADDSUB231PSZmb = 5474,
VFMADDSUB231PSZmbk = 5475,
VFMADDSUB231PSZmbkz = 5476,
VFMADDSUB231PSZmk = 5477,
VFMADDSUB231PSZmkz = 5478,
VFMADDSUB231PSZr = 5479,
VFMADDSUB231PSZrb = 5480,
VFMADDSUB231PSZrbk = 5481,
VFMADDSUB231PSZrbkz = 5482,
VFMADDSUB231PSZrk = 5483,
VFMADDSUB231PSZrkz = 5484,
VFMADDSUBPD4mr = 5485,
VFMADDSUBPD4mrY = 5486,
VFMADDSUBPD4rm = 5487,
VFMADDSUBPD4rmY = 5488,
VFMADDSUBPD4rr = 5489,
VFMADDSUBPD4rrY = 5490,
VFMADDSUBPD4rrY_REV = 5491,
VFMADDSUBPD4rr_REV = 5492,
VFMADDSUBPDr132m = 5493,
VFMADDSUBPDr132mY = 5494,
VFMADDSUBPDr132r = 5495,
VFMADDSUBPDr132rY = 5496,
VFMADDSUBPDr213m = 5497,
VFMADDSUBPDr213mY = 5498,
VFMADDSUBPDr213r = 5499,
VFMADDSUBPDr213rY = 5500,
VFMADDSUBPDr231m = 5501,
VFMADDSUBPDr231mY = 5502,
VFMADDSUBPDr231r = 5503,
VFMADDSUBPDr231rY = 5504,
VFMADDSUBPS4mr = 5505,
VFMADDSUBPS4mrY = 5506,
VFMADDSUBPS4rm = 5507,
VFMADDSUBPS4rmY = 5508,
VFMADDSUBPS4rr = 5509,
VFMADDSUBPS4rrY = 5510,
VFMADDSUBPS4rrY_REV = 5511,
VFMADDSUBPS4rr_REV = 5512,
VFMADDSUBPSr132m = 5513,
VFMADDSUBPSr132mY = 5514,
VFMADDSUBPSr132r = 5515,
VFMADDSUBPSr132rY = 5516,
VFMADDSUBPSr213m = 5517,
VFMADDSUBPSr213mY = 5518,
VFMADDSUBPSr213r = 5519,
VFMADDSUBPSr213rY = 5520,
VFMADDSUBPSr231m = 5521,
VFMADDSUBPSr231mY = 5522,
VFMADDSUBPSr231r = 5523,
VFMADDSUBPSr231rY = 5524,
VFMSUB132PDZ128m = 5525,
VFMSUB132PDZ128mb = 5526,
VFMSUB132PDZ128mbk = 5527,
VFMSUB132PDZ128mbkz = 5528,
VFMSUB132PDZ128mk = 5529,
VFMSUB132PDZ128mkz = 5530,
VFMSUB132PDZ128r = 5531,
VFMSUB132PDZ128rk = 5532,
VFMSUB132PDZ128rkz = 5533,
VFMSUB132PDZ256m = 5534,
VFMSUB132PDZ256mb = 5535,
VFMSUB132PDZ256mbk = 5536,
VFMSUB132PDZ256mbkz = 5537,
VFMSUB132PDZ256mk = 5538,
VFMSUB132PDZ256mkz = 5539,
VFMSUB132PDZ256r = 5540,
VFMSUB132PDZ256rk = 5541,
VFMSUB132PDZ256rkz = 5542,
VFMSUB132PDZm = 5543,
VFMSUB132PDZmb = 5544,
VFMSUB132PDZmbk = 5545,
VFMSUB132PDZmbkz = 5546,
VFMSUB132PDZmk = 5547,
VFMSUB132PDZmkz = 5548,
VFMSUB132PDZr = 5549,
VFMSUB132PDZrb = 5550,
VFMSUB132PDZrbk = 5551,
VFMSUB132PDZrbkz = 5552,
VFMSUB132PDZrk = 5553,
VFMSUB132PDZrkz = 5554,
VFMSUB132PSZ128m = 5555,
VFMSUB132PSZ128mb = 5556,
VFMSUB132PSZ128mbk = 5557,
VFMSUB132PSZ128mbkz = 5558,
VFMSUB132PSZ128mk = 5559,
VFMSUB132PSZ128mkz = 5560,
VFMSUB132PSZ128r = 5561,
VFMSUB132PSZ128rk = 5562,
VFMSUB132PSZ128rkz = 5563,
VFMSUB132PSZ256m = 5564,
VFMSUB132PSZ256mb = 5565,
VFMSUB132PSZ256mbk = 5566,
VFMSUB132PSZ256mbkz = 5567,
VFMSUB132PSZ256mk = 5568,
VFMSUB132PSZ256mkz = 5569,
VFMSUB132PSZ256r = 5570,
VFMSUB132PSZ256rk = 5571,
VFMSUB132PSZ256rkz = 5572,
VFMSUB132PSZm = 5573,
VFMSUB132PSZmb = 5574,
VFMSUB132PSZmbk = 5575,
VFMSUB132PSZmbkz = 5576,
VFMSUB132PSZmk = 5577,
VFMSUB132PSZmkz = 5578,
VFMSUB132PSZr = 5579,
VFMSUB132PSZrb = 5580,
VFMSUB132PSZrbk = 5581,
VFMSUB132PSZrbkz = 5582,
VFMSUB132PSZrk = 5583,
VFMSUB132PSZrkz = 5584,
VFMSUB132SDm = 5585,
VFMSUB132SDm_Int = 5586,
VFMSUB132SDm_Intk = 5587,
VFMSUB132SDm_Intkz = 5588,
VFMSUB132SDr = 5589,
VFMSUB132SDr_Int = 5590,
VFMSUB132SDr_Intk = 5591,
VFMSUB132SDr_Intkz = 5592,
VFMSUB132SDrb_Int = 5593,
VFMSUB132SDrb_Intk = 5594,
VFMSUB132SDrb_Intkz = 5595,
VFMSUB132SSm = 5596,
VFMSUB132SSm_Int = 5597,
VFMSUB132SSm_Intk = 5598,
VFMSUB132SSm_Intkz = 5599,
VFMSUB132SSr = 5600,
VFMSUB132SSr_Int = 5601,
VFMSUB132SSr_Intk = 5602,
VFMSUB132SSr_Intkz = 5603,
VFMSUB132SSrb_Int = 5604,
VFMSUB132SSrb_Intk = 5605,
VFMSUB132SSrb_Intkz = 5606,
VFMSUB213PDZ128m = 5607,
VFMSUB213PDZ128mb = 5608,
VFMSUB213PDZ128mbk = 5609,
VFMSUB213PDZ128mbkz = 5610,
VFMSUB213PDZ128mk = 5611,
VFMSUB213PDZ128mkz = 5612,
VFMSUB213PDZ128r = 5613,
VFMSUB213PDZ128rk = 5614,
VFMSUB213PDZ128rkz = 5615,
VFMSUB213PDZ256m = 5616,
VFMSUB213PDZ256mb = 5617,
VFMSUB213PDZ256mbk = 5618,
VFMSUB213PDZ256mbkz = 5619,
VFMSUB213PDZ256mk = 5620,
VFMSUB213PDZ256mkz = 5621,
VFMSUB213PDZ256r = 5622,
VFMSUB213PDZ256rk = 5623,
VFMSUB213PDZ256rkz = 5624,
VFMSUB213PDZm = 5625,
VFMSUB213PDZmb = 5626,
VFMSUB213PDZmbk = 5627,
VFMSUB213PDZmbkz = 5628,
VFMSUB213PDZmk = 5629,
VFMSUB213PDZmkz = 5630,
VFMSUB213PDZr = 5631,
VFMSUB213PDZrb = 5632,
VFMSUB213PDZrbk = 5633,
VFMSUB213PDZrbkz = 5634,
VFMSUB213PDZrk = 5635,
VFMSUB213PDZrkz = 5636,
VFMSUB213PSZ128m = 5637,
VFMSUB213PSZ128mb = 5638,
VFMSUB213PSZ128mbk = 5639,
VFMSUB213PSZ128mbkz = 5640,
VFMSUB213PSZ128mk = 5641,
VFMSUB213PSZ128mkz = 5642,
VFMSUB213PSZ128r = 5643,
VFMSUB213PSZ128rk = 5644,
VFMSUB213PSZ128rkz = 5645,
VFMSUB213PSZ256m = 5646,
VFMSUB213PSZ256mb = 5647,
VFMSUB213PSZ256mbk = 5648,
VFMSUB213PSZ256mbkz = 5649,
VFMSUB213PSZ256mk = 5650,
VFMSUB213PSZ256mkz = 5651,
VFMSUB213PSZ256r = 5652,
VFMSUB213PSZ256rk = 5653,
VFMSUB213PSZ256rkz = 5654,
VFMSUB213PSZm = 5655,
VFMSUB213PSZmb = 5656,
VFMSUB213PSZmbk = 5657,
VFMSUB213PSZmbkz = 5658,
VFMSUB213PSZmk = 5659,
VFMSUB213PSZmkz = 5660,
VFMSUB213PSZr = 5661,
VFMSUB213PSZrb = 5662,
VFMSUB213PSZrbk = 5663,
VFMSUB213PSZrbkz = 5664,
VFMSUB213PSZrk = 5665,
VFMSUB213PSZrkz = 5666,
VFMSUB213SDm = 5667,
VFMSUB213SDm_Int = 5668,
VFMSUB213SDm_Intk = 5669,
VFMSUB213SDm_Intkz = 5670,
VFMSUB213SDr = 5671,
VFMSUB213SDr_Int = 5672,
VFMSUB213SDr_Intk = 5673,
VFMSUB213SDr_Intkz = 5674,
VFMSUB213SDrb_Int = 5675,
VFMSUB213SDrb_Intk = 5676,
VFMSUB213SDrb_Intkz = 5677,
VFMSUB213SSm = 5678,
VFMSUB213SSm_Int = 5679,
VFMSUB213SSm_Intk = 5680,
VFMSUB213SSm_Intkz = 5681,
VFMSUB213SSr = 5682,
VFMSUB213SSr_Int = 5683,
VFMSUB213SSr_Intk = 5684,
VFMSUB213SSr_Intkz = 5685,
VFMSUB213SSrb_Int = 5686,
VFMSUB213SSrb_Intk = 5687,
VFMSUB213SSrb_Intkz = 5688,
VFMSUB231PDZ128m = 5689,
VFMSUB231PDZ128mb = 5690,
VFMSUB231PDZ128mbk = 5691,
VFMSUB231PDZ128mbkz = 5692,
VFMSUB231PDZ128mk = 5693,
VFMSUB231PDZ128mkz = 5694,
VFMSUB231PDZ128r = 5695,
VFMSUB231PDZ128rk = 5696,
VFMSUB231PDZ128rkz = 5697,
VFMSUB231PDZ256m = 5698,
VFMSUB231PDZ256mb = 5699,
VFMSUB231PDZ256mbk = 5700,
VFMSUB231PDZ256mbkz = 5701,
VFMSUB231PDZ256mk = 5702,
VFMSUB231PDZ256mkz = 5703,
VFMSUB231PDZ256r = 5704,
VFMSUB231PDZ256rk = 5705,
VFMSUB231PDZ256rkz = 5706,
VFMSUB231PDZm = 5707,
VFMSUB231PDZmb = 5708,
VFMSUB231PDZmbk = 5709,
VFMSUB231PDZmbkz = 5710,
VFMSUB231PDZmk = 5711,
VFMSUB231PDZmkz = 5712,
VFMSUB231PDZr = 5713,
VFMSUB231PDZrb = 5714,
VFMSUB231PDZrbk = 5715,
VFMSUB231PDZrbkz = 5716,
VFMSUB231PDZrk = 5717,
VFMSUB231PDZrkz = 5718,
VFMSUB231PSZ128m = 5719,
VFMSUB231PSZ128mb = 5720,
VFMSUB231PSZ128mbk = 5721,
VFMSUB231PSZ128mbkz = 5722,
VFMSUB231PSZ128mk = 5723,
VFMSUB231PSZ128mkz = 5724,
VFMSUB231PSZ128r = 5725,
VFMSUB231PSZ128rk = 5726,
VFMSUB231PSZ128rkz = 5727,
VFMSUB231PSZ256m = 5728,
VFMSUB231PSZ256mb = 5729,
VFMSUB231PSZ256mbk = 5730,
VFMSUB231PSZ256mbkz = 5731,
VFMSUB231PSZ256mk = 5732,
VFMSUB231PSZ256mkz = 5733,
VFMSUB231PSZ256r = 5734,
VFMSUB231PSZ256rk = 5735,
VFMSUB231PSZ256rkz = 5736,
VFMSUB231PSZm = 5737,
VFMSUB231PSZmb = 5738,
VFMSUB231PSZmbk = 5739,
VFMSUB231PSZmbkz = 5740,
VFMSUB231PSZmk = 5741,
VFMSUB231PSZmkz = 5742,
VFMSUB231PSZr = 5743,
VFMSUB231PSZrb = 5744,
VFMSUB231PSZrbk = 5745,
VFMSUB231PSZrbkz = 5746,
VFMSUB231PSZrk = 5747,
VFMSUB231PSZrkz = 5748,
VFMSUB231SDm = 5749,
VFMSUB231SDm_Int = 5750,
VFMSUB231SDm_Intk = 5751,
VFMSUB231SDm_Intkz = 5752,
VFMSUB231SDr = 5753,
VFMSUB231SDr_Int = 5754,
VFMSUB231SDr_Intk = 5755,
VFMSUB231SDr_Intkz = 5756,
VFMSUB231SDrb_Int = 5757,
VFMSUB231SDrb_Intk = 5758,
VFMSUB231SDrb_Intkz = 5759,
VFMSUB231SSm = 5760,
VFMSUB231SSm_Int = 5761,
VFMSUB231SSm_Intk = 5762,
VFMSUB231SSm_Intkz = 5763,
VFMSUB231SSr = 5764,
VFMSUB231SSr_Int = 5765,
VFMSUB231SSr_Intk = 5766,
VFMSUB231SSr_Intkz = 5767,
VFMSUB231SSrb_Int = 5768,
VFMSUB231SSrb_Intk = 5769,
VFMSUB231SSrb_Intkz = 5770,
VFMSUBADD132PDZ128m = 5771,
VFMSUBADD132PDZ128mb = 5772,
VFMSUBADD132PDZ128mbk = 5773,
VFMSUBADD132PDZ128mbkz = 5774,
VFMSUBADD132PDZ128mk = 5775,
VFMSUBADD132PDZ128mkz = 5776,
VFMSUBADD132PDZ128r = 5777,
VFMSUBADD132PDZ128rk = 5778,
VFMSUBADD132PDZ128rkz = 5779,
VFMSUBADD132PDZ256m = 5780,
VFMSUBADD132PDZ256mb = 5781,
VFMSUBADD132PDZ256mbk = 5782,
VFMSUBADD132PDZ256mbkz = 5783,
VFMSUBADD132PDZ256mk = 5784,
VFMSUBADD132PDZ256mkz = 5785,
VFMSUBADD132PDZ256r = 5786,
VFMSUBADD132PDZ256rk = 5787,
VFMSUBADD132PDZ256rkz = 5788,
VFMSUBADD132PDZm = 5789,
VFMSUBADD132PDZmb = 5790,
VFMSUBADD132PDZmbk = 5791,
VFMSUBADD132PDZmbkz = 5792,
VFMSUBADD132PDZmk = 5793,
VFMSUBADD132PDZmkz = 5794,
VFMSUBADD132PDZr = 5795,
VFMSUBADD132PDZrb = 5796,
VFMSUBADD132PDZrbk = 5797,
VFMSUBADD132PDZrbkz = 5798,
VFMSUBADD132PDZrk = 5799,
VFMSUBADD132PDZrkz = 5800,
VFMSUBADD132PSZ128m = 5801,
VFMSUBADD132PSZ128mb = 5802,
VFMSUBADD132PSZ128mbk = 5803,
VFMSUBADD132PSZ128mbkz = 5804,
VFMSUBADD132PSZ128mk = 5805,
VFMSUBADD132PSZ128mkz = 5806,
VFMSUBADD132PSZ128r = 5807,
VFMSUBADD132PSZ128rk = 5808,
VFMSUBADD132PSZ128rkz = 5809,
VFMSUBADD132PSZ256m = 5810,
VFMSUBADD132PSZ256mb = 5811,
VFMSUBADD132PSZ256mbk = 5812,
VFMSUBADD132PSZ256mbkz = 5813,
VFMSUBADD132PSZ256mk = 5814,
VFMSUBADD132PSZ256mkz = 5815,
VFMSUBADD132PSZ256r = 5816,
VFMSUBADD132PSZ256rk = 5817,
VFMSUBADD132PSZ256rkz = 5818,
VFMSUBADD132PSZm = 5819,
VFMSUBADD132PSZmb = 5820,
VFMSUBADD132PSZmbk = 5821,
VFMSUBADD132PSZmbkz = 5822,
VFMSUBADD132PSZmk = 5823,
VFMSUBADD132PSZmkz = 5824,
VFMSUBADD132PSZr = 5825,
VFMSUBADD132PSZrb = 5826,
VFMSUBADD132PSZrbk = 5827,
VFMSUBADD132PSZrbkz = 5828,
VFMSUBADD132PSZrk = 5829,
VFMSUBADD132PSZrkz = 5830,
VFMSUBADD213PDZ128m = 5831,
VFMSUBADD213PDZ128mb = 5832,
VFMSUBADD213PDZ128mbk = 5833,
VFMSUBADD213PDZ128mbkz = 5834,
VFMSUBADD213PDZ128mk = 5835,
VFMSUBADD213PDZ128mkz = 5836,
VFMSUBADD213PDZ128r = 5837,
VFMSUBADD213PDZ128rk = 5838,
VFMSUBADD213PDZ128rkz = 5839,
VFMSUBADD213PDZ256m = 5840,
VFMSUBADD213PDZ256mb = 5841,
VFMSUBADD213PDZ256mbk = 5842,
VFMSUBADD213PDZ256mbkz = 5843,
VFMSUBADD213PDZ256mk = 5844,
VFMSUBADD213PDZ256mkz = 5845,
VFMSUBADD213PDZ256r = 5846,
VFMSUBADD213PDZ256rk = 5847,
VFMSUBADD213PDZ256rkz = 5848,
VFMSUBADD213PDZm = 5849,
VFMSUBADD213PDZmb = 5850,
VFMSUBADD213PDZmbk = 5851,
VFMSUBADD213PDZmbkz = 5852,
VFMSUBADD213PDZmk = 5853,
VFMSUBADD213PDZmkz = 5854,
VFMSUBADD213PDZr = 5855,
VFMSUBADD213PDZrb = 5856,
VFMSUBADD213PDZrbk = 5857,
VFMSUBADD213PDZrbkz = 5858,
VFMSUBADD213PDZrk = 5859,
VFMSUBADD213PDZrkz = 5860,
VFMSUBADD213PSZ128m = 5861,
VFMSUBADD213PSZ128mb = 5862,
VFMSUBADD213PSZ128mbk = 5863,
VFMSUBADD213PSZ128mbkz = 5864,
VFMSUBADD213PSZ128mk = 5865,
VFMSUBADD213PSZ128mkz = 5866,
VFMSUBADD213PSZ128r = 5867,
VFMSUBADD213PSZ128rk = 5868,
VFMSUBADD213PSZ128rkz = 5869,
VFMSUBADD213PSZ256m = 5870,
VFMSUBADD213PSZ256mb = 5871,
VFMSUBADD213PSZ256mbk = 5872,
VFMSUBADD213PSZ256mbkz = 5873,
VFMSUBADD213PSZ256mk = 5874,
VFMSUBADD213PSZ256mkz = 5875,
VFMSUBADD213PSZ256r = 5876,
VFMSUBADD213PSZ256rk = 5877,
VFMSUBADD213PSZ256rkz = 5878,
VFMSUBADD213PSZm = 5879,
VFMSUBADD213PSZmb = 5880,
VFMSUBADD213PSZmbk = 5881,
VFMSUBADD213PSZmbkz = 5882,
VFMSUBADD213PSZmk = 5883,
VFMSUBADD213PSZmkz = 5884,
VFMSUBADD213PSZr = 5885,
VFMSUBADD213PSZrb = 5886,
VFMSUBADD213PSZrbk = 5887,
VFMSUBADD213PSZrbkz = 5888,
VFMSUBADD213PSZrk = 5889,
VFMSUBADD213PSZrkz = 5890,
VFMSUBADD231PDZ128m = 5891,
VFMSUBADD231PDZ128mb = 5892,
VFMSUBADD231PDZ128mbk = 5893,
VFMSUBADD231PDZ128mbkz = 5894,
VFMSUBADD231PDZ128mk = 5895,
VFMSUBADD231PDZ128mkz = 5896,
VFMSUBADD231PDZ128r = 5897,
VFMSUBADD231PDZ128rk = 5898,
VFMSUBADD231PDZ128rkz = 5899,
VFMSUBADD231PDZ256m = 5900,
VFMSUBADD231PDZ256mb = 5901,
VFMSUBADD231PDZ256mbk = 5902,
VFMSUBADD231PDZ256mbkz = 5903,
VFMSUBADD231PDZ256mk = 5904,
VFMSUBADD231PDZ256mkz = 5905,
VFMSUBADD231PDZ256r = 5906,
VFMSUBADD231PDZ256rk = 5907,
VFMSUBADD231PDZ256rkz = 5908,
VFMSUBADD231PDZm = 5909,
VFMSUBADD231PDZmb = 5910,
VFMSUBADD231PDZmbk = 5911,
VFMSUBADD231PDZmbkz = 5912,
VFMSUBADD231PDZmk = 5913,
VFMSUBADD231PDZmkz = 5914,
VFMSUBADD231PDZr = 5915,
VFMSUBADD231PDZrb = 5916,
VFMSUBADD231PDZrbk = 5917,
VFMSUBADD231PDZrbkz = 5918,
VFMSUBADD231PDZrk = 5919,
VFMSUBADD231PDZrkz = 5920,
VFMSUBADD231PSZ128m = 5921,
VFMSUBADD231PSZ128mb = 5922,
VFMSUBADD231PSZ128mbk = 5923,
VFMSUBADD231PSZ128mbkz = 5924,
VFMSUBADD231PSZ128mk = 5925,
VFMSUBADD231PSZ128mkz = 5926,
VFMSUBADD231PSZ128r = 5927,
VFMSUBADD231PSZ128rk = 5928,
VFMSUBADD231PSZ128rkz = 5929,
VFMSUBADD231PSZ256m = 5930,
VFMSUBADD231PSZ256mb = 5931,
VFMSUBADD231PSZ256mbk = 5932,
VFMSUBADD231PSZ256mbkz = 5933,
VFMSUBADD231PSZ256mk = 5934,
VFMSUBADD231PSZ256mkz = 5935,
VFMSUBADD231PSZ256r = 5936,
VFMSUBADD231PSZ256rk = 5937,
VFMSUBADD231PSZ256rkz = 5938,
VFMSUBADD231PSZm = 5939,
VFMSUBADD231PSZmb = 5940,
VFMSUBADD231PSZmbk = 5941,
VFMSUBADD231PSZmbkz = 5942,
VFMSUBADD231PSZmk = 5943,
VFMSUBADD231PSZmkz = 5944,
VFMSUBADD231PSZr = 5945,
VFMSUBADD231PSZrb = 5946,
VFMSUBADD231PSZrbk = 5947,
VFMSUBADD231PSZrbkz = 5948,
VFMSUBADD231PSZrk = 5949,
VFMSUBADD231PSZrkz = 5950,
VFMSUBADDPD4mr = 5951,
VFMSUBADDPD4mrY = 5952,
VFMSUBADDPD4rm = 5953,
VFMSUBADDPD4rmY = 5954,
VFMSUBADDPD4rr = 5955,
VFMSUBADDPD4rrY = 5956,
VFMSUBADDPD4rrY_REV = 5957,
VFMSUBADDPD4rr_REV = 5958,
VFMSUBADDPDr132m = 5959,
VFMSUBADDPDr132mY = 5960,
VFMSUBADDPDr132r = 5961,
VFMSUBADDPDr132rY = 5962,
VFMSUBADDPDr213m = 5963,
VFMSUBADDPDr213mY = 5964,
VFMSUBADDPDr213r = 5965,
VFMSUBADDPDr213rY = 5966,
VFMSUBADDPDr231m = 5967,
VFMSUBADDPDr231mY = 5968,
VFMSUBADDPDr231r = 5969,
VFMSUBADDPDr231rY = 5970,
VFMSUBADDPS4mr = 5971,
VFMSUBADDPS4mrY = 5972,
VFMSUBADDPS4rm = 5973,
VFMSUBADDPS4rmY = 5974,
VFMSUBADDPS4rr = 5975,
VFMSUBADDPS4rrY = 5976,
VFMSUBADDPS4rrY_REV = 5977,
VFMSUBADDPS4rr_REV = 5978,
VFMSUBADDPSr132m = 5979,
VFMSUBADDPSr132mY = 5980,
VFMSUBADDPSr132r = 5981,
VFMSUBADDPSr132rY = 5982,
VFMSUBADDPSr213m = 5983,
VFMSUBADDPSr213mY = 5984,
VFMSUBADDPSr213r = 5985,
VFMSUBADDPSr213rY = 5986,
VFMSUBADDPSr231m = 5987,
VFMSUBADDPSr231mY = 5988,
VFMSUBADDPSr231r = 5989,
VFMSUBADDPSr231rY = 5990,
VFMSUBPD4mr = 5991,
VFMSUBPD4mrY = 5992,
VFMSUBPD4rm = 5993,
VFMSUBPD4rmY = 5994,
VFMSUBPD4rr = 5995,
VFMSUBPD4rrY = 5996,
VFMSUBPD4rrY_REV = 5997,
VFMSUBPD4rr_REV = 5998,
VFMSUBPDr132m = 5999,
VFMSUBPDr132mY = 6000,
VFMSUBPDr132r = 6001,
VFMSUBPDr132rY = 6002,
VFMSUBPDr213m = 6003,
VFMSUBPDr213mY = 6004,
VFMSUBPDr213r = 6005,
VFMSUBPDr213rY = 6006,
VFMSUBPDr231m = 6007,
VFMSUBPDr231mY = 6008,
VFMSUBPDr231r = 6009,
VFMSUBPDr231rY = 6010,
VFMSUBPS4mr = 6011,
VFMSUBPS4mrY = 6012,
VFMSUBPS4rm = 6013,
VFMSUBPS4rmY = 6014,
VFMSUBPS4rr = 6015,
VFMSUBPS4rrY = 6016,
VFMSUBPS4rrY_REV = 6017,
VFMSUBPS4rr_REV = 6018,
VFMSUBPSr132m = 6019,
VFMSUBPSr132mY = 6020,
VFMSUBPSr132r = 6021,
VFMSUBPSr132rY = 6022,
VFMSUBPSr213m = 6023,
VFMSUBPSr213mY = 6024,
VFMSUBPSr213r = 6025,
VFMSUBPSr213rY = 6026,
VFMSUBPSr231m = 6027,
VFMSUBPSr231mY = 6028,
VFMSUBPSr231r = 6029,
VFMSUBPSr231rY = 6030,
VFMSUBSD4mr = 6031,
VFMSUBSD4mr_Int = 6032,
VFMSUBSD4rm = 6033,
VFMSUBSD4rm_Int = 6034,
VFMSUBSD4rr = 6035,
VFMSUBSD4rr_Int = 6036,
VFMSUBSD4rr_REV = 6037,
VFMSUBSDr132m = 6038,
VFMSUBSDr132m_Int = 6039,
VFMSUBSDr132r = 6040,
VFMSUBSDr132r_Int = 6041,
VFMSUBSDr213m = 6042,
VFMSUBSDr213m_Int = 6043,
VFMSUBSDr213r = 6044,
VFMSUBSDr213r_Int = 6045,
VFMSUBSDr231m = 6046,
VFMSUBSDr231m_Int = 6047,
VFMSUBSDr231r = 6048,
VFMSUBSDr231r_Int = 6049,
VFMSUBSS4mr = 6050,
VFMSUBSS4mr_Int = 6051,
VFMSUBSS4rm = 6052,
VFMSUBSS4rm_Int = 6053,
VFMSUBSS4rr = 6054,
VFMSUBSS4rr_Int = 6055,
VFMSUBSS4rr_REV = 6056,
VFMSUBSSr132m = 6057,
VFMSUBSSr132m_Int = 6058,
VFMSUBSSr132r = 6059,
VFMSUBSSr132r_Int = 6060,
VFMSUBSSr213m = 6061,
VFMSUBSSr213m_Int = 6062,
VFMSUBSSr213r = 6063,
VFMSUBSSr213r_Int = 6064,
VFMSUBSSr231m = 6065,
VFMSUBSSr231m_Int = 6066,
VFMSUBSSr231r = 6067,
VFMSUBSSr231r_Int = 6068,
VFNMADD132PDZ128m = 6069,
VFNMADD132PDZ128mb = 6070,
VFNMADD132PDZ128mbk = 6071,
VFNMADD132PDZ128mbkz = 6072,
VFNMADD132PDZ128mk = 6073,
VFNMADD132PDZ128mkz = 6074,
VFNMADD132PDZ128r = 6075,
VFNMADD132PDZ128rk = 6076,
VFNMADD132PDZ128rkz = 6077,
VFNMADD132PDZ256m = 6078,
VFNMADD132PDZ256mb = 6079,
VFNMADD132PDZ256mbk = 6080,
VFNMADD132PDZ256mbkz = 6081,
VFNMADD132PDZ256mk = 6082,
VFNMADD132PDZ256mkz = 6083,
VFNMADD132PDZ256r = 6084,
VFNMADD132PDZ256rk = 6085,
VFNMADD132PDZ256rkz = 6086,
VFNMADD132PDZm = 6087,
VFNMADD132PDZmb = 6088,
VFNMADD132PDZmbk = 6089,
VFNMADD132PDZmbkz = 6090,
VFNMADD132PDZmk = 6091,
VFNMADD132PDZmkz = 6092,
VFNMADD132PDZr = 6093,
VFNMADD132PDZrb = 6094,
VFNMADD132PDZrbk = 6095,
VFNMADD132PDZrbkz = 6096,
VFNMADD132PDZrk = 6097,
VFNMADD132PDZrkz = 6098,
VFNMADD132PSZ128m = 6099,
VFNMADD132PSZ128mb = 6100,
VFNMADD132PSZ128mbk = 6101,
VFNMADD132PSZ128mbkz = 6102,
VFNMADD132PSZ128mk = 6103,
VFNMADD132PSZ128mkz = 6104,
VFNMADD132PSZ128r = 6105,
VFNMADD132PSZ128rk = 6106,
VFNMADD132PSZ128rkz = 6107,
VFNMADD132PSZ256m = 6108,
VFNMADD132PSZ256mb = 6109,
VFNMADD132PSZ256mbk = 6110,
VFNMADD132PSZ256mbkz = 6111,
VFNMADD132PSZ256mk = 6112,
VFNMADD132PSZ256mkz = 6113,
VFNMADD132PSZ256r = 6114,
VFNMADD132PSZ256rk = 6115,
VFNMADD132PSZ256rkz = 6116,
VFNMADD132PSZm = 6117,
VFNMADD132PSZmb = 6118,
VFNMADD132PSZmbk = 6119,
VFNMADD132PSZmbkz = 6120,
VFNMADD132PSZmk = 6121,
VFNMADD132PSZmkz = 6122,
VFNMADD132PSZr = 6123,
VFNMADD132PSZrb = 6124,
VFNMADD132PSZrbk = 6125,
VFNMADD132PSZrbkz = 6126,
VFNMADD132PSZrk = 6127,
VFNMADD132PSZrkz = 6128,
VFNMADD132SDm = 6129,
VFNMADD132SDm_Int = 6130,
VFNMADD132SDm_Intk = 6131,
VFNMADD132SDm_Intkz = 6132,
VFNMADD132SDr = 6133,
VFNMADD132SDr_Int = 6134,
VFNMADD132SDr_Intk = 6135,
VFNMADD132SDr_Intkz = 6136,
VFNMADD132SDrb_Int = 6137,
VFNMADD132SDrb_Intk = 6138,
VFNMADD132SDrb_Intkz = 6139,
VFNMADD132SSm = 6140,
VFNMADD132SSm_Int = 6141,
VFNMADD132SSm_Intk = 6142,
VFNMADD132SSm_Intkz = 6143,
VFNMADD132SSr = 6144,
VFNMADD132SSr_Int = 6145,
VFNMADD132SSr_Intk = 6146,
VFNMADD132SSr_Intkz = 6147,
VFNMADD132SSrb_Int = 6148,
VFNMADD132SSrb_Intk = 6149,
VFNMADD132SSrb_Intkz = 6150,
VFNMADD213PDZ128m = 6151,
VFNMADD213PDZ128mb = 6152,
VFNMADD213PDZ128mbk = 6153,
VFNMADD213PDZ128mbkz = 6154,
VFNMADD213PDZ128mk = 6155,
VFNMADD213PDZ128mkz = 6156,
VFNMADD213PDZ128r = 6157,
VFNMADD213PDZ128rk = 6158,
VFNMADD213PDZ128rkz = 6159,
VFNMADD213PDZ256m = 6160,
VFNMADD213PDZ256mb = 6161,
VFNMADD213PDZ256mbk = 6162,
VFNMADD213PDZ256mbkz = 6163,
VFNMADD213PDZ256mk = 6164,
VFNMADD213PDZ256mkz = 6165,
VFNMADD213PDZ256r = 6166,
VFNMADD213PDZ256rk = 6167,
VFNMADD213PDZ256rkz = 6168,
VFNMADD213PDZm = 6169,
VFNMADD213PDZmb = 6170,
VFNMADD213PDZmbk = 6171,
VFNMADD213PDZmbkz = 6172,
VFNMADD213PDZmk = 6173,
VFNMADD213PDZmkz = 6174,
VFNMADD213PDZr = 6175,
VFNMADD213PDZrb = 6176,
VFNMADD213PDZrbk = 6177,
VFNMADD213PDZrbkz = 6178,
VFNMADD213PDZrk = 6179,
VFNMADD213PDZrkz = 6180,
VFNMADD213PSZ128m = 6181,
VFNMADD213PSZ128mb = 6182,
VFNMADD213PSZ128mbk = 6183,
VFNMADD213PSZ128mbkz = 6184,
VFNMADD213PSZ128mk = 6185,
VFNMADD213PSZ128mkz = 6186,
VFNMADD213PSZ128r = 6187,
VFNMADD213PSZ128rk = 6188,
VFNMADD213PSZ128rkz = 6189,
VFNMADD213PSZ256m = 6190,
VFNMADD213PSZ256mb = 6191,
VFNMADD213PSZ256mbk = 6192,
VFNMADD213PSZ256mbkz = 6193,
VFNMADD213PSZ256mk = 6194,
VFNMADD213PSZ256mkz = 6195,
VFNMADD213PSZ256r = 6196,
VFNMADD213PSZ256rk = 6197,
VFNMADD213PSZ256rkz = 6198,
VFNMADD213PSZm = 6199,
VFNMADD213PSZmb = 6200,
VFNMADD213PSZmbk = 6201,
VFNMADD213PSZmbkz = 6202,
VFNMADD213PSZmk = 6203,
VFNMADD213PSZmkz = 6204,
VFNMADD213PSZr = 6205,
VFNMADD213PSZrb = 6206,
VFNMADD213PSZrbk = 6207,
VFNMADD213PSZrbkz = 6208,
VFNMADD213PSZrk = 6209,
VFNMADD213PSZrkz = 6210,
VFNMADD213SDm = 6211,
VFNMADD213SDm_Int = 6212,
VFNMADD213SDm_Intk = 6213,
VFNMADD213SDm_Intkz = 6214,
VFNMADD213SDr = 6215,
VFNMADD213SDr_Int = 6216,
VFNMADD213SDr_Intk = 6217,
VFNMADD213SDr_Intkz = 6218,
VFNMADD213SDrb_Int = 6219,
VFNMADD213SDrb_Intk = 6220,
VFNMADD213SDrb_Intkz = 6221,
VFNMADD213SSm = 6222,
VFNMADD213SSm_Int = 6223,
VFNMADD213SSm_Intk = 6224,
VFNMADD213SSm_Intkz = 6225,
VFNMADD213SSr = 6226,
VFNMADD213SSr_Int = 6227,
VFNMADD213SSr_Intk = 6228,
VFNMADD213SSr_Intkz = 6229,
VFNMADD213SSrb_Int = 6230,
VFNMADD213SSrb_Intk = 6231,
VFNMADD213SSrb_Intkz = 6232,
VFNMADD231PDZ128m = 6233,
VFNMADD231PDZ128mb = 6234,
VFNMADD231PDZ128mbk = 6235,
VFNMADD231PDZ128mbkz = 6236,
VFNMADD231PDZ128mk = 6237,
VFNMADD231PDZ128mkz = 6238,
VFNMADD231PDZ128r = 6239,
VFNMADD231PDZ128rk = 6240,
VFNMADD231PDZ128rkz = 6241,
VFNMADD231PDZ256m = 6242,
VFNMADD231PDZ256mb = 6243,
VFNMADD231PDZ256mbk = 6244,
VFNMADD231PDZ256mbkz = 6245,
VFNMADD231PDZ256mk = 6246,
VFNMADD231PDZ256mkz = 6247,
VFNMADD231PDZ256r = 6248,
VFNMADD231PDZ256rk = 6249,
VFNMADD231PDZ256rkz = 6250,
VFNMADD231PDZm = 6251,
VFNMADD231PDZmb = 6252,
VFNMADD231PDZmbk = 6253,
VFNMADD231PDZmbkz = 6254,
VFNMADD231PDZmk = 6255,
VFNMADD231PDZmkz = 6256,
VFNMADD231PDZr = 6257,
VFNMADD231PDZrb = 6258,
VFNMADD231PDZrbk = 6259,
VFNMADD231PDZrbkz = 6260,
VFNMADD231PDZrk = 6261,
VFNMADD231PDZrkz = 6262,
VFNMADD231PSZ128m = 6263,
VFNMADD231PSZ128mb = 6264,
VFNMADD231PSZ128mbk = 6265,
VFNMADD231PSZ128mbkz = 6266,
VFNMADD231PSZ128mk = 6267,
VFNMADD231PSZ128mkz = 6268,
VFNMADD231PSZ128r = 6269,
VFNMADD231PSZ128rk = 6270,
VFNMADD231PSZ128rkz = 6271,
VFNMADD231PSZ256m = 6272,
VFNMADD231PSZ256mb = 6273,
VFNMADD231PSZ256mbk = 6274,
VFNMADD231PSZ256mbkz = 6275,
VFNMADD231PSZ256mk = 6276,
VFNMADD231PSZ256mkz = 6277,
VFNMADD231PSZ256r = 6278,
VFNMADD231PSZ256rk = 6279,
VFNMADD231PSZ256rkz = 6280,
VFNMADD231PSZm = 6281,
VFNMADD231PSZmb = 6282,
VFNMADD231PSZmbk = 6283,
VFNMADD231PSZmbkz = 6284,
VFNMADD231PSZmk = 6285,
VFNMADD231PSZmkz = 6286,
VFNMADD231PSZr = 6287,
VFNMADD231PSZrb = 6288,
VFNMADD231PSZrbk = 6289,
VFNMADD231PSZrbkz = 6290,
VFNMADD231PSZrk = 6291,
VFNMADD231PSZrkz = 6292,
VFNMADD231SDm = 6293,
VFNMADD231SDm_Int = 6294,
VFNMADD231SDm_Intk = 6295,
VFNMADD231SDm_Intkz = 6296,
VFNMADD231SDr = 6297,
VFNMADD231SDr_Int = 6298,
VFNMADD231SDr_Intk = 6299,
VFNMADD231SDr_Intkz = 6300,
VFNMADD231SDrb_Int = 6301,
VFNMADD231SDrb_Intk = 6302,
VFNMADD231SDrb_Intkz = 6303,
VFNMADD231SSm = 6304,
VFNMADD231SSm_Int = 6305,
VFNMADD231SSm_Intk = 6306,
VFNMADD231SSm_Intkz = 6307,
VFNMADD231SSr = 6308,
VFNMADD231SSr_Int = 6309,
VFNMADD231SSr_Intk = 6310,
VFNMADD231SSr_Intkz = 6311,
VFNMADD231SSrb_Int = 6312,
VFNMADD231SSrb_Intk = 6313,
VFNMADD231SSrb_Intkz = 6314,
VFNMADDPD4mr = 6315,
VFNMADDPD4mrY = 6316,
VFNMADDPD4rm = 6317,
VFNMADDPD4rmY = 6318,
VFNMADDPD4rr = 6319,
VFNMADDPD4rrY = 6320,
VFNMADDPD4rrY_REV = 6321,
VFNMADDPD4rr_REV = 6322,
VFNMADDPDr132m = 6323,
VFNMADDPDr132mY = 6324,
VFNMADDPDr132r = 6325,
VFNMADDPDr132rY = 6326,
VFNMADDPDr213m = 6327,
VFNMADDPDr213mY = 6328,
VFNMADDPDr213r = 6329,
VFNMADDPDr213rY = 6330,
VFNMADDPDr231m = 6331,
VFNMADDPDr231mY = 6332,
VFNMADDPDr231r = 6333,
VFNMADDPDr231rY = 6334,
VFNMADDPS4mr = 6335,
VFNMADDPS4mrY = 6336,
VFNMADDPS4rm = 6337,
VFNMADDPS4rmY = 6338,
VFNMADDPS4rr = 6339,
VFNMADDPS4rrY = 6340,
VFNMADDPS4rrY_REV = 6341,
VFNMADDPS4rr_REV = 6342,
VFNMADDPSr132m = 6343,
VFNMADDPSr132mY = 6344,
VFNMADDPSr132r = 6345,
VFNMADDPSr132rY = 6346,
VFNMADDPSr213m = 6347,
VFNMADDPSr213mY = 6348,
VFNMADDPSr213r = 6349,
VFNMADDPSr213rY = 6350,
VFNMADDPSr231m = 6351,
VFNMADDPSr231mY = 6352,
VFNMADDPSr231r = 6353,
VFNMADDPSr231rY = 6354,
VFNMADDSD4mr = 6355,
VFNMADDSD4mr_Int = 6356,
VFNMADDSD4rm = 6357,
VFNMADDSD4rm_Int = 6358,
VFNMADDSD4rr = 6359,
VFNMADDSD4rr_Int = 6360,
VFNMADDSD4rr_REV = 6361,
VFNMADDSDr132m = 6362,
VFNMADDSDr132m_Int = 6363,
VFNMADDSDr132r = 6364,
VFNMADDSDr132r_Int = 6365,
VFNMADDSDr213m = 6366,
VFNMADDSDr213m_Int = 6367,
VFNMADDSDr213r = 6368,
VFNMADDSDr213r_Int = 6369,
VFNMADDSDr231m = 6370,
VFNMADDSDr231m_Int = 6371,
VFNMADDSDr231r = 6372,
VFNMADDSDr231r_Int = 6373,
VFNMADDSS4mr = 6374,
VFNMADDSS4mr_Int = 6375,
VFNMADDSS4rm = 6376,
VFNMADDSS4rm_Int = 6377,
VFNMADDSS4rr = 6378,
VFNMADDSS4rr_Int = 6379,
VFNMADDSS4rr_REV = 6380,
VFNMADDSSr132m = 6381,
VFNMADDSSr132m_Int = 6382,
VFNMADDSSr132r = 6383,
VFNMADDSSr132r_Int = 6384,
VFNMADDSSr213m = 6385,
VFNMADDSSr213m_Int = 6386,
VFNMADDSSr213r = 6387,
VFNMADDSSr213r_Int = 6388,
VFNMADDSSr231m = 6389,
VFNMADDSSr231m_Int = 6390,
VFNMADDSSr231r = 6391,
VFNMADDSSr231r_Int = 6392,
VFNMSUB132PDZ128m = 6393,
VFNMSUB132PDZ128mb = 6394,
VFNMSUB132PDZ128mbk = 6395,
VFNMSUB132PDZ128mbkz = 6396,
VFNMSUB132PDZ128mk = 6397,
VFNMSUB132PDZ128mkz = 6398,
VFNMSUB132PDZ128r = 6399,
VFNMSUB132PDZ128rk = 6400,
VFNMSUB132PDZ128rkz = 6401,
VFNMSUB132PDZ256m = 6402,
VFNMSUB132PDZ256mb = 6403,
VFNMSUB132PDZ256mbk = 6404,
VFNMSUB132PDZ256mbkz = 6405,
VFNMSUB132PDZ256mk = 6406,
VFNMSUB132PDZ256mkz = 6407,
VFNMSUB132PDZ256r = 6408,
VFNMSUB132PDZ256rk = 6409,
VFNMSUB132PDZ256rkz = 6410,
VFNMSUB132PDZm = 6411,
VFNMSUB132PDZmb = 6412,
VFNMSUB132PDZmbk = 6413,
VFNMSUB132PDZmbkz = 6414,
VFNMSUB132PDZmk = 6415,
VFNMSUB132PDZmkz = 6416,
VFNMSUB132PDZr = 6417,
VFNMSUB132PDZrb = 6418,
VFNMSUB132PDZrbk = 6419,
VFNMSUB132PDZrbkz = 6420,
VFNMSUB132PDZrk = 6421,
VFNMSUB132PDZrkz = 6422,
VFNMSUB132PSZ128m = 6423,
VFNMSUB132PSZ128mb = 6424,
VFNMSUB132PSZ128mbk = 6425,
VFNMSUB132PSZ128mbkz = 6426,
VFNMSUB132PSZ128mk = 6427,
VFNMSUB132PSZ128mkz = 6428,
VFNMSUB132PSZ128r = 6429,
VFNMSUB132PSZ128rk = 6430,
VFNMSUB132PSZ128rkz = 6431,
VFNMSUB132PSZ256m = 6432,
VFNMSUB132PSZ256mb = 6433,
VFNMSUB132PSZ256mbk = 6434,
VFNMSUB132PSZ256mbkz = 6435,
VFNMSUB132PSZ256mk = 6436,
VFNMSUB132PSZ256mkz = 6437,
VFNMSUB132PSZ256r = 6438,
VFNMSUB132PSZ256rk = 6439,
VFNMSUB132PSZ256rkz = 6440,
VFNMSUB132PSZm = 6441,
VFNMSUB132PSZmb = 6442,
VFNMSUB132PSZmbk = 6443,
VFNMSUB132PSZmbkz = 6444,
VFNMSUB132PSZmk = 6445,
VFNMSUB132PSZmkz = 6446,
VFNMSUB132PSZr = 6447,
VFNMSUB132PSZrb = 6448,
VFNMSUB132PSZrbk = 6449,
VFNMSUB132PSZrbkz = 6450,
VFNMSUB132PSZrk = 6451,
VFNMSUB132PSZrkz = 6452,
VFNMSUB132SDm = 6453,
VFNMSUB132SDm_Int = 6454,
VFNMSUB132SDm_Intk = 6455,
VFNMSUB132SDm_Intkz = 6456,
VFNMSUB132SDr = 6457,
VFNMSUB132SDr_Int = 6458,
VFNMSUB132SDr_Intk = 6459,
VFNMSUB132SDr_Intkz = 6460,
VFNMSUB132SDrb_Int = 6461,
VFNMSUB132SDrb_Intk = 6462,
VFNMSUB132SDrb_Intkz = 6463,
VFNMSUB132SSm = 6464,
VFNMSUB132SSm_Int = 6465,
VFNMSUB132SSm_Intk = 6466,
VFNMSUB132SSm_Intkz = 6467,
VFNMSUB132SSr = 6468,
VFNMSUB132SSr_Int = 6469,
VFNMSUB132SSr_Intk = 6470,
VFNMSUB132SSr_Intkz = 6471,
VFNMSUB132SSrb_Int = 6472,
VFNMSUB132SSrb_Intk = 6473,
VFNMSUB132SSrb_Intkz = 6474,
VFNMSUB213PDZ128m = 6475,
VFNMSUB213PDZ128mb = 6476,
VFNMSUB213PDZ128mbk = 6477,
VFNMSUB213PDZ128mbkz = 6478,
VFNMSUB213PDZ128mk = 6479,
VFNMSUB213PDZ128mkz = 6480,
VFNMSUB213PDZ128r = 6481,
VFNMSUB213PDZ128rk = 6482,
VFNMSUB213PDZ128rkz = 6483,
VFNMSUB213PDZ256m = 6484,
VFNMSUB213PDZ256mb = 6485,
VFNMSUB213PDZ256mbk = 6486,
VFNMSUB213PDZ256mbkz = 6487,
VFNMSUB213PDZ256mk = 6488,
VFNMSUB213PDZ256mkz = 6489,
VFNMSUB213PDZ256r = 6490,
VFNMSUB213PDZ256rk = 6491,
VFNMSUB213PDZ256rkz = 6492,
VFNMSUB213PDZm = 6493,
VFNMSUB213PDZmb = 6494,
VFNMSUB213PDZmbk = 6495,
VFNMSUB213PDZmbkz = 6496,
VFNMSUB213PDZmk = 6497,
VFNMSUB213PDZmkz = 6498,
VFNMSUB213PDZr = 6499,
VFNMSUB213PDZrb = 6500,
VFNMSUB213PDZrbk = 6501,
VFNMSUB213PDZrbkz = 6502,
VFNMSUB213PDZrk = 6503,
VFNMSUB213PDZrkz = 6504,
VFNMSUB213PSZ128m = 6505,
VFNMSUB213PSZ128mb = 6506,
VFNMSUB213PSZ128mbk = 6507,
VFNMSUB213PSZ128mbkz = 6508,
VFNMSUB213PSZ128mk = 6509,
VFNMSUB213PSZ128mkz = 6510,
VFNMSUB213PSZ128r = 6511,
VFNMSUB213PSZ128rk = 6512,
VFNMSUB213PSZ128rkz = 6513,
VFNMSUB213PSZ256m = 6514,
VFNMSUB213PSZ256mb = 6515,
VFNMSUB213PSZ256mbk = 6516,
VFNMSUB213PSZ256mbkz = 6517,
VFNMSUB213PSZ256mk = 6518,
VFNMSUB213PSZ256mkz = 6519,
VFNMSUB213PSZ256r = 6520,
VFNMSUB213PSZ256rk = 6521,
VFNMSUB213PSZ256rkz = 6522,
VFNMSUB213PSZm = 6523,
VFNMSUB213PSZmb = 6524,
VFNMSUB213PSZmbk = 6525,
VFNMSUB213PSZmbkz = 6526,
VFNMSUB213PSZmk = 6527,
VFNMSUB213PSZmkz = 6528,
VFNMSUB213PSZr = 6529,
VFNMSUB213PSZrb = 6530,
VFNMSUB213PSZrbk = 6531,
VFNMSUB213PSZrbkz = 6532,
VFNMSUB213PSZrk = 6533,
VFNMSUB213PSZrkz = 6534,
VFNMSUB213SDm = 6535,
VFNMSUB213SDm_Int = 6536,
VFNMSUB213SDm_Intk = 6537,
VFNMSUB213SDm_Intkz = 6538,
VFNMSUB213SDr = 6539,
VFNMSUB213SDr_Int = 6540,
VFNMSUB213SDr_Intk = 6541,
VFNMSUB213SDr_Intkz = 6542,
VFNMSUB213SDrb_Int = 6543,
VFNMSUB213SDrb_Intk = 6544,
VFNMSUB213SDrb_Intkz = 6545,
VFNMSUB213SSm = 6546,
VFNMSUB213SSm_Int = 6547,
VFNMSUB213SSm_Intk = 6548,
VFNMSUB213SSm_Intkz = 6549,
VFNMSUB213SSr = 6550,
VFNMSUB213SSr_Int = 6551,
VFNMSUB213SSr_Intk = 6552,
VFNMSUB213SSr_Intkz = 6553,
VFNMSUB213SSrb_Int = 6554,
VFNMSUB213SSrb_Intk = 6555,
VFNMSUB213SSrb_Intkz = 6556,
VFNMSUB231PDZ128m = 6557,
VFNMSUB231PDZ128mb = 6558,
VFNMSUB231PDZ128mbk = 6559,
VFNMSUB231PDZ128mbkz = 6560,
VFNMSUB231PDZ128mk = 6561,
VFNMSUB231PDZ128mkz = 6562,
VFNMSUB231PDZ128r = 6563,
VFNMSUB231PDZ128rk = 6564,
VFNMSUB231PDZ128rkz = 6565,
VFNMSUB231PDZ256m = 6566,
VFNMSUB231PDZ256mb = 6567,
VFNMSUB231PDZ256mbk = 6568,
VFNMSUB231PDZ256mbkz = 6569,
VFNMSUB231PDZ256mk = 6570,
VFNMSUB231PDZ256mkz = 6571,
VFNMSUB231PDZ256r = 6572,
VFNMSUB231PDZ256rk = 6573,
VFNMSUB231PDZ256rkz = 6574,
VFNMSUB231PDZm = 6575,
VFNMSUB231PDZmb = 6576,
VFNMSUB231PDZmbk = 6577,
VFNMSUB231PDZmbkz = 6578,
VFNMSUB231PDZmk = 6579,
VFNMSUB231PDZmkz = 6580,
VFNMSUB231PDZr = 6581,
VFNMSUB231PDZrb = 6582,
VFNMSUB231PDZrbk = 6583,
VFNMSUB231PDZrbkz = 6584,
VFNMSUB231PDZrk = 6585,
VFNMSUB231PDZrkz = 6586,
VFNMSUB231PSZ128m = 6587,
VFNMSUB231PSZ128mb = 6588,
VFNMSUB231PSZ128mbk = 6589,
VFNMSUB231PSZ128mbkz = 6590,
VFNMSUB231PSZ128mk = 6591,
VFNMSUB231PSZ128mkz = 6592,
VFNMSUB231PSZ128r = 6593,
VFNMSUB231PSZ128rk = 6594,
VFNMSUB231PSZ128rkz = 6595,
VFNMSUB231PSZ256m = 6596,
VFNMSUB231PSZ256mb = 6597,
VFNMSUB231PSZ256mbk = 6598,
VFNMSUB231PSZ256mbkz = 6599,
VFNMSUB231PSZ256mk = 6600,
VFNMSUB231PSZ256mkz = 6601,
VFNMSUB231PSZ256r = 6602,
VFNMSUB231PSZ256rk = 6603,
VFNMSUB231PSZ256rkz = 6604,
VFNMSUB231PSZm = 6605,
VFNMSUB231PSZmb = 6606,
VFNMSUB231PSZmbk = 6607,
VFNMSUB231PSZmbkz = 6608,
VFNMSUB231PSZmk = 6609,
VFNMSUB231PSZmkz = 6610,
VFNMSUB231PSZr = 6611,
VFNMSUB231PSZrb = 6612,
VFNMSUB231PSZrbk = 6613,
VFNMSUB231PSZrbkz = 6614,
VFNMSUB231PSZrk = 6615,
VFNMSUB231PSZrkz = 6616,
VFNMSUB231SDm = 6617,
VFNMSUB231SDm_Int = 6618,
VFNMSUB231SDm_Intk = 6619,
VFNMSUB231SDm_Intkz = 6620,
VFNMSUB231SDr = 6621,
VFNMSUB231SDr_Int = 6622,
VFNMSUB231SDr_Intk = 6623,
VFNMSUB231SDr_Intkz = 6624,
VFNMSUB231SDrb_Int = 6625,
VFNMSUB231SDrb_Intk = 6626,
VFNMSUB231SDrb_Intkz = 6627,
VFNMSUB231SSm = 6628,
VFNMSUB231SSm_Int = 6629,
VFNMSUB231SSm_Intk = 6630,
VFNMSUB231SSm_Intkz = 6631,
VFNMSUB231SSr = 6632,
VFNMSUB231SSr_Int = 6633,
VFNMSUB231SSr_Intk = 6634,
VFNMSUB231SSr_Intkz = 6635,
VFNMSUB231SSrb_Int = 6636,
VFNMSUB231SSrb_Intk = 6637,
VFNMSUB231SSrb_Intkz = 6638,
VFNMSUBPD4mr = 6639,
VFNMSUBPD4mrY = 6640,
VFNMSUBPD4rm = 6641,
VFNMSUBPD4rmY = 6642,
VFNMSUBPD4rr = 6643,
VFNMSUBPD4rrY = 6644,
VFNMSUBPD4rrY_REV = 6645,
VFNMSUBPD4rr_REV = 6646,
VFNMSUBPDr132m = 6647,
VFNMSUBPDr132mY = 6648,
VFNMSUBPDr132r = 6649,
VFNMSUBPDr132rY = 6650,
VFNMSUBPDr213m = 6651,
VFNMSUBPDr213mY = 6652,
VFNMSUBPDr213r = 6653,
VFNMSUBPDr213rY = 6654,
VFNMSUBPDr231m = 6655,
VFNMSUBPDr231mY = 6656,
VFNMSUBPDr231r = 6657,
VFNMSUBPDr231rY = 6658,
VFNMSUBPS4mr = 6659,
VFNMSUBPS4mrY = 6660,
VFNMSUBPS4rm = 6661,
VFNMSUBPS4rmY = 6662,
VFNMSUBPS4rr = 6663,
VFNMSUBPS4rrY = 6664,
VFNMSUBPS4rrY_REV = 6665,
VFNMSUBPS4rr_REV = 6666,
VFNMSUBPSr132m = 6667,
VFNMSUBPSr132mY = 6668,
VFNMSUBPSr132r = 6669,
VFNMSUBPSr132rY = 6670,
VFNMSUBPSr213m = 6671,
VFNMSUBPSr213mY = 6672,
VFNMSUBPSr213r = 6673,
VFNMSUBPSr213rY = 6674,
VFNMSUBPSr231m = 6675,
VFNMSUBPSr231mY = 6676,
VFNMSUBPSr231r = 6677,
VFNMSUBPSr231rY = 6678,
VFNMSUBSD4mr = 6679,
VFNMSUBSD4mr_Int = 6680,
VFNMSUBSD4rm = 6681,
VFNMSUBSD4rm_Int = 6682,
VFNMSUBSD4rr = 6683,
VFNMSUBSD4rr_Int = 6684,
VFNMSUBSD4rr_REV = 6685,
VFNMSUBSDr132m = 6686,
VFNMSUBSDr132m_Int = 6687,
VFNMSUBSDr132r = 6688,
VFNMSUBSDr132r_Int = 6689,
VFNMSUBSDr213m = 6690,
VFNMSUBSDr213m_Int = 6691,
VFNMSUBSDr213r = 6692,
VFNMSUBSDr213r_Int = 6693,
VFNMSUBSDr231m = 6694,
VFNMSUBSDr231m_Int = 6695,
VFNMSUBSDr231r = 6696,
VFNMSUBSDr231r_Int = 6697,
VFNMSUBSS4mr = 6698,
VFNMSUBSS4mr_Int = 6699,
VFNMSUBSS4rm = 6700,
VFNMSUBSS4rm_Int = 6701,
VFNMSUBSS4rr = 6702,
VFNMSUBSS4rr_Int = 6703,
VFNMSUBSS4rr_REV = 6704,
VFNMSUBSSr132m = 6705,
VFNMSUBSSr132m_Int = 6706,
VFNMSUBSSr132r = 6707,
VFNMSUBSSr132r_Int = 6708,
VFNMSUBSSr213m = 6709,
VFNMSUBSSr213m_Int = 6710,
VFNMSUBSSr213r = 6711,
VFNMSUBSSr213r_Int = 6712,
VFNMSUBSSr231m = 6713,
VFNMSUBSSr231m_Int = 6714,
VFNMSUBSSr231r = 6715,
VFNMSUBSSr231r_Int = 6716,
VFPCLASSPDZ128rm = 6717,
VFPCLASSPDZ128rmb = 6718,
VFPCLASSPDZ128rmbk = 6719,
VFPCLASSPDZ128rmk = 6720,
VFPCLASSPDZ128rr = 6721,
VFPCLASSPDZ128rrk = 6722,
VFPCLASSPDZ256rm = 6723,
VFPCLASSPDZ256rmb = 6724,
VFPCLASSPDZ256rmbk = 6725,
VFPCLASSPDZ256rmk = 6726,
VFPCLASSPDZ256rr = 6727,
VFPCLASSPDZ256rrk = 6728,
VFPCLASSPDZrm = 6729,
VFPCLASSPDZrmb = 6730,
VFPCLASSPDZrmbk = 6731,
VFPCLASSPDZrmk = 6732,
VFPCLASSPDZrr = 6733,
VFPCLASSPDZrrk = 6734,
VFPCLASSPSZ128rm = 6735,
VFPCLASSPSZ128rmb = 6736,
VFPCLASSPSZ128rmbk = 6737,
VFPCLASSPSZ128rmk = 6738,
VFPCLASSPSZ128rr = 6739,
VFPCLASSPSZ128rrk = 6740,
VFPCLASSPSZ256rm = 6741,
VFPCLASSPSZ256rmb = 6742,
VFPCLASSPSZ256rmbk = 6743,
VFPCLASSPSZ256rmk = 6744,
VFPCLASSPSZ256rr = 6745,
VFPCLASSPSZ256rrk = 6746,
VFPCLASSPSZrm = 6747,
VFPCLASSPSZrmb = 6748,
VFPCLASSPSZrmbk = 6749,
VFPCLASSPSZrmk = 6750,
VFPCLASSPSZrr = 6751,
VFPCLASSPSZrrk = 6752,
VFPCLASSSDrm = 6753,
VFPCLASSSDrmk = 6754,
VFPCLASSSDrr = 6755,
VFPCLASSSDrrk = 6756,
VFPCLASSSSrm = 6757,
VFPCLASSSSrmk = 6758,
VFPCLASSSSrr = 6759,
VFPCLASSSSrrk = 6760,
VFRCZPDrm = 6761,
VFRCZPDrmY = 6762,
VFRCZPDrr = 6763,
VFRCZPDrrY = 6764,
VFRCZPSrm = 6765,
VFRCZPSrmY = 6766,
VFRCZPSrr = 6767,
VFRCZPSrrY = 6768,
VFRCZSDrm = 6769,
VFRCZSDrr = 6770,
VFRCZSSrm = 6771,
VFRCZSSrr = 6772,
VFsANDNPDrm = 6773,
VFsANDNPDrr = 6774,
VFsANDNPSrm = 6775,
VFsANDNPSrr = 6776,
VFsANDPDrm = 6777,
VFsANDPDrr = 6778,
VFsANDPSrm = 6779,
VFsANDPSrr = 6780,
VFsORPDrm = 6781,
VFsORPDrr = 6782,
VFsORPSrm = 6783,
VFsORPSrr = 6784,
VFsXORPDrm = 6785,
VFsXORPDrr = 6786,
VFsXORPSrm = 6787,
VFsXORPSrr = 6788,
VFvANDNPDYrm = 6789,
VFvANDNPDYrr = 6790,
VFvANDNPDrm = 6791,
VFvANDNPDrr = 6792,
VFvANDNPSYrm = 6793,
VFvANDNPSYrr = 6794,
VFvANDNPSrm = 6795,
VFvANDNPSrr = 6796,
VFvANDPDYrm = 6797,
VFvANDPDYrr = 6798,
VFvANDPDrm = 6799,
VFvANDPDrr = 6800,
VFvANDPSYrm = 6801,
VFvANDPSYrr = 6802,
VFvANDPSrm = 6803,
VFvANDPSrr = 6804,
VFvORPDYrm = 6805,
VFvORPDYrr = 6806,
VFvORPDrm = 6807,
VFvORPDrr = 6808,
VFvORPSYrm = 6809,
VFvORPSYrr = 6810,
VFvORPSrm = 6811,
VFvORPSrr = 6812,
VFvXORPDYrm = 6813,
VFvXORPDYrr = 6814,
VFvXORPDrm = 6815,
VFvXORPDrr = 6816,
VFvXORPSYrm = 6817,
VFvXORPSYrr = 6818,
VFvXORPSrm = 6819,
VFvXORPSrr = 6820,
VGATHERDPDYrm = 6821,
VGATHERDPDZ128rm = 6822,
VGATHERDPDZ256rm = 6823,
VGATHERDPDZrm = 6824,
VGATHERDPDrm = 6825,
VGATHERDPSYrm = 6826,
VGATHERDPSZ128rm = 6827,
VGATHERDPSZ256rm = 6828,
VGATHERDPSZrm = 6829,
VGATHERDPSrm = 6830,
VGATHERPF0DPDm = 6831,
VGATHERPF0DPSm = 6832,
VGATHERPF0QPDm = 6833,
VGATHERPF0QPSm = 6834,
VGATHERPF1DPDm = 6835,
VGATHERPF1DPSm = 6836,
VGATHERPF1QPDm = 6837,
VGATHERPF1QPSm = 6838,
VGATHERQPDYrm = 6839,
VGATHERQPDZ128rm = 6840,
VGATHERQPDZ256rm = 6841,
VGATHERQPDZrm = 6842,
VGATHERQPDrm = 6843,
VGATHERQPSYrm = 6844,
VGATHERQPSZ128rm = 6845,
VGATHERQPSZ256rm = 6846,
VGATHERQPSZrm = 6847,
VGATHERQPSrm = 6848,
VGETEXPPDZ128m = 6849,
VGETEXPPDZ128mb = 6850,
VGETEXPPDZ128mbk = 6851,
VGETEXPPDZ128mbkz = 6852,
VGETEXPPDZ128mk = 6853,
VGETEXPPDZ128mkz = 6854,
VGETEXPPDZ128r = 6855,
VGETEXPPDZ128rk = 6856,
VGETEXPPDZ128rkz = 6857,
VGETEXPPDZ256m = 6858,
VGETEXPPDZ256mb = 6859,
VGETEXPPDZ256mbk = 6860,
VGETEXPPDZ256mbkz = 6861,
VGETEXPPDZ256mk = 6862,
VGETEXPPDZ256mkz = 6863,
VGETEXPPDZ256r = 6864,
VGETEXPPDZ256rk = 6865,
VGETEXPPDZ256rkz = 6866,
VGETEXPPDm = 6867,
VGETEXPPDmb = 6868,
VGETEXPPDmbk = 6869,
VGETEXPPDmbkz = 6870,
VGETEXPPDmk = 6871,
VGETEXPPDmkz = 6872,
VGETEXPPDr = 6873,
VGETEXPPDrb = 6874,
VGETEXPPDrbk = 6875,
VGETEXPPDrbkz = 6876,
VGETEXPPDrk = 6877,
VGETEXPPDrkz = 6878,
VGETEXPPSZ128m = 6879,
VGETEXPPSZ128mb = 6880,
VGETEXPPSZ128mbk = 6881,
VGETEXPPSZ128mbkz = 6882,
VGETEXPPSZ128mk = 6883,
VGETEXPPSZ128mkz = 6884,
VGETEXPPSZ128r = 6885,
VGETEXPPSZ128rk = 6886,
VGETEXPPSZ128rkz = 6887,
VGETEXPPSZ256m = 6888,
VGETEXPPSZ256mb = 6889,
VGETEXPPSZ256mbk = 6890,
VGETEXPPSZ256mbkz = 6891,
VGETEXPPSZ256mk = 6892,
VGETEXPPSZ256mkz = 6893,
VGETEXPPSZ256r = 6894,
VGETEXPPSZ256rk = 6895,
VGETEXPPSZ256rkz = 6896,
VGETEXPPSm = 6897,
VGETEXPPSmb = 6898,
VGETEXPPSmbk = 6899,
VGETEXPPSmbkz = 6900,
VGETEXPPSmk = 6901,
VGETEXPPSmkz = 6902,
VGETEXPPSr = 6903,
VGETEXPPSrb = 6904,
VGETEXPPSrbk = 6905,
VGETEXPPSrbkz = 6906,
VGETEXPPSrk = 6907,
VGETEXPPSrkz = 6908,
VGETEXPSDm = 6909,
VGETEXPSDmk = 6910,
VGETEXPSDmkz = 6911,
VGETEXPSDr = 6912,
VGETEXPSDrb = 6913,
VGETEXPSDrbk = 6914,
VGETEXPSDrbkz = 6915,
VGETEXPSDrk = 6916,
VGETEXPSDrkz = 6917,
VGETEXPSSm = 6918,
VGETEXPSSmk = 6919,
VGETEXPSSmkz = 6920,
VGETEXPSSr = 6921,
VGETEXPSSrb = 6922,
VGETEXPSSrbk = 6923,
VGETEXPSSrbkz = 6924,
VGETEXPSSrk = 6925,
VGETEXPSSrkz = 6926,
VGETMANTPDZ128rmbi = 6927,
VGETMANTPDZ128rmbik = 6928,
VGETMANTPDZ128rmbikz = 6929,
VGETMANTPDZ128rmi = 6930,
VGETMANTPDZ128rmik = 6931,
VGETMANTPDZ128rmikz = 6932,
VGETMANTPDZ128rri = 6933,
VGETMANTPDZ128rrik = 6934,
VGETMANTPDZ128rrikz = 6935,
VGETMANTPDZ256rmbi = 6936,
VGETMANTPDZ256rmbik = 6937,
VGETMANTPDZ256rmbikz = 6938,
VGETMANTPDZ256rmi = 6939,
VGETMANTPDZ256rmik = 6940,
VGETMANTPDZ256rmikz = 6941,
VGETMANTPDZ256rri = 6942,
VGETMANTPDZ256rrik = 6943,
VGETMANTPDZ256rrikz = 6944,
VGETMANTPDZrmbi = 6945,
VGETMANTPDZrmbik = 6946,
VGETMANTPDZrmbikz = 6947,
VGETMANTPDZrmi = 6948,
VGETMANTPDZrmik = 6949,
VGETMANTPDZrmikz = 6950,
VGETMANTPDZrri = 6951,
VGETMANTPDZrrib = 6952,
VGETMANTPDZrribk = 6953,
VGETMANTPDZrribkz = 6954,
VGETMANTPDZrrik = 6955,
VGETMANTPDZrrikz = 6956,
VGETMANTPSZ128rmbi = 6957,
VGETMANTPSZ128rmbik = 6958,
VGETMANTPSZ128rmbikz = 6959,
VGETMANTPSZ128rmi = 6960,
VGETMANTPSZ128rmik = 6961,
VGETMANTPSZ128rmikz = 6962,
VGETMANTPSZ128rri = 6963,
VGETMANTPSZ128rrik = 6964,
VGETMANTPSZ128rrikz = 6965,
VGETMANTPSZ256rmbi = 6966,
VGETMANTPSZ256rmbik = 6967,
VGETMANTPSZ256rmbikz = 6968,
VGETMANTPSZ256rmi = 6969,
VGETMANTPSZ256rmik = 6970,
VGETMANTPSZ256rmikz = 6971,
VGETMANTPSZ256rri = 6972,
VGETMANTPSZ256rrik = 6973,
VGETMANTPSZ256rrikz = 6974,
VGETMANTPSZrmbi = 6975,
VGETMANTPSZrmbik = 6976,
VGETMANTPSZrmbikz = 6977,
VGETMANTPSZrmi = 6978,
VGETMANTPSZrmik = 6979,
VGETMANTPSZrmikz = 6980,
VGETMANTPSZrri = 6981,
VGETMANTPSZrrib = 6982,
VGETMANTPSZrribk = 6983,
VGETMANTPSZrribkz = 6984,
VGETMANTPSZrrik = 6985,
VGETMANTPSZrrikz = 6986,
VGETMANTSDZ128rmi = 6987,
VGETMANTSDZ128rmi_alt = 6988,
VGETMANTSDZ128rmi_altk = 6989,
VGETMANTSDZ128rmi_altkz = 6990,
VGETMANTSDZ128rmik = 6991,
VGETMANTSDZ128rmikz = 6992,
VGETMANTSDZ128rri = 6993,
VGETMANTSDZ128rrib = 6994,
VGETMANTSDZ128rribk = 6995,
VGETMANTSDZ128rribkz = 6996,
VGETMANTSDZ128rrik = 6997,
VGETMANTSDZ128rrikz = 6998,
VGETMANTSSZ128rmi = 6999,
VGETMANTSSZ128rmi_alt = 7000,
VGETMANTSSZ128rmi_altk = 7001,
VGETMANTSSZ128rmi_altkz = 7002,
VGETMANTSSZ128rmik = 7003,
VGETMANTSSZ128rmikz = 7004,
VGETMANTSSZ128rri = 7005,
VGETMANTSSZ128rrib = 7006,
VGETMANTSSZ128rribk = 7007,
VGETMANTSSZ128rribkz = 7008,
VGETMANTSSZ128rrik = 7009,
VGETMANTSSZ128rrikz = 7010,
VHADDPDYrm = 7011,
VHADDPDYrr = 7012,
VHADDPDrm = 7013,
VHADDPDrr = 7014,
VHADDPSYrm = 7015,
VHADDPSYrr = 7016,
VHADDPSrm = 7017,
VHADDPSrr = 7018,
VHSUBPDYrm = 7019,
VHSUBPDYrr = 7020,
VHSUBPDrm = 7021,
VHSUBPDrr = 7022,
VHSUBPSYrm = 7023,
VHSUBPSYrr = 7024,
VHSUBPSrm = 7025,
VHSUBPSrr = 7026,
VINSERTF128rm = 7027,
VINSERTF128rr = 7028,
VINSERTF32x4Z256rm = 7029,
VINSERTF32x4Z256rmk = 7030,
VINSERTF32x4Z256rmkz = 7031,
VINSERTF32x4Z256rr = 7032,
VINSERTF32x4Z256rrk = 7033,
VINSERTF32x4Z256rrkz = 7034,
VINSERTF32x4Zrm = 7035,
VINSERTF32x4Zrmk = 7036,
VINSERTF32x4Zrmkz = 7037,
VINSERTF32x4Zrr = 7038,
VINSERTF32x4Zrrk = 7039,
VINSERTF32x4Zrrkz = 7040,
VINSERTF32x8Zrm = 7041,
VINSERTF32x8Zrmk = 7042,
VINSERTF32x8Zrmkz = 7043,
VINSERTF32x8Zrr = 7044,
VINSERTF32x8Zrrk = 7045,
VINSERTF32x8Zrrkz = 7046,
VINSERTF64x2Z256rm = 7047,
VINSERTF64x2Z256rmk = 7048,
VINSERTF64x2Z256rmkz = 7049,
VINSERTF64x2Z256rr = 7050,
VINSERTF64x2Z256rrk = 7051,
VINSERTF64x2Z256rrkz = 7052,
VINSERTF64x2Zrm = 7053,
VINSERTF64x2Zrmk = 7054,
VINSERTF64x2Zrmkz = 7055,
VINSERTF64x2Zrr = 7056,
VINSERTF64x2Zrrk = 7057,
VINSERTF64x2Zrrkz = 7058,
VINSERTF64x4Zrm = 7059,
VINSERTF64x4Zrmk = 7060,
VINSERTF64x4Zrmkz = 7061,
VINSERTF64x4Zrr = 7062,
VINSERTF64x4Zrrk = 7063,
VINSERTF64x4Zrrkz = 7064,
VINSERTI128rm = 7065,
VINSERTI128rr = 7066,
VINSERTI32x4Z256rm = 7067,
VINSERTI32x4Z256rmk = 7068,
VINSERTI32x4Z256rmkz = 7069,
VINSERTI32x4Z256rr = 7070,
VINSERTI32x4Z256rrk = 7071,
VINSERTI32x4Z256rrkz = 7072,
VINSERTI32x4Zrm = 7073,
VINSERTI32x4Zrmk = 7074,
VINSERTI32x4Zrmkz = 7075,
VINSERTI32x4Zrr = 7076,
VINSERTI32x4Zrrk = 7077,
VINSERTI32x4Zrrkz = 7078,
VINSERTI32x8Zrm = 7079,
VINSERTI32x8Zrmk = 7080,
VINSERTI32x8Zrmkz = 7081,
VINSERTI32x8Zrr = 7082,
VINSERTI32x8Zrrk = 7083,
VINSERTI32x8Zrrkz = 7084,
VINSERTI64x2Z256rm = 7085,
VINSERTI64x2Z256rmk = 7086,
VINSERTI64x2Z256rmkz = 7087,
VINSERTI64x2Z256rr = 7088,
VINSERTI64x2Z256rrk = 7089,
VINSERTI64x2Z256rrkz = 7090,
VINSERTI64x2Zrm = 7091,
VINSERTI64x2Zrmk = 7092,
VINSERTI64x2Zrmkz = 7093,
VINSERTI64x2Zrr = 7094,
VINSERTI64x2Zrrk = 7095,
VINSERTI64x2Zrrkz = 7096,
VINSERTI64x4Zrm = 7097,
VINSERTI64x4Zrmk = 7098,
VINSERTI64x4Zrmkz = 7099,
VINSERTI64x4Zrr = 7100,
VINSERTI64x4Zrrk = 7101,
VINSERTI64x4Zrrkz = 7102,
VINSERTPSrm = 7103,
VINSERTPSrr = 7104,
VINSERTPSzrm = 7105,
VINSERTPSzrr = 7106,
VLDDQUYrm = 7107,
VLDDQUrm = 7108,
VLDMXCSR = 7109,
VMASKMOVDQU = 7110,
VMASKMOVDQU64 = 7111,
VMASKMOVPDYmr = 7112,
VMASKMOVPDYrm = 7113,
VMASKMOVPDmr = 7114,
VMASKMOVPDrm = 7115,
VMASKMOVPSYmr = 7116,
VMASKMOVPSYrm = 7117,
VMASKMOVPSmr = 7118,
VMASKMOVPSrm = 7119,
VMAXCPDYrm = 7120,
VMAXCPDYrr = 7121,
VMAXCPDrm = 7122,
VMAXCPDrr = 7123,
VMAXCPSYrm = 7124,
VMAXCPSYrr = 7125,
VMAXCPSrm = 7126,
VMAXCPSrr = 7127,
VMAXCSDrm = 7128,
VMAXCSDrr = 7129,
VMAXCSSrm = 7130,
VMAXCSSrr = 7131,
VMAXPDYrm = 7132,
VMAXPDYrr = 7133,
VMAXPDZ128rm = 7134,
VMAXPDZ128rmb = 7135,
VMAXPDZ128rmbk = 7136,
VMAXPDZ128rmbkz = 7137,
VMAXPDZ128rmk = 7138,
VMAXPDZ128rmkz = 7139,
VMAXPDZ128rr = 7140,
VMAXPDZ128rrk = 7141,
VMAXPDZ128rrkz = 7142,
VMAXPDZ256rm = 7143,
VMAXPDZ256rmb = 7144,
VMAXPDZ256rmbk = 7145,
VMAXPDZ256rmbkz = 7146,
VMAXPDZ256rmk = 7147,
VMAXPDZ256rmkz = 7148,
VMAXPDZ256rr = 7149,
VMAXPDZ256rrk = 7150,
VMAXPDZ256rrkz = 7151,
VMAXPDZrb = 7152,
VMAXPDZrbk = 7153,
VMAXPDZrbkz = 7154,
VMAXPDZrm = 7155,
VMAXPDZrmb = 7156,
VMAXPDZrmbk = 7157,
VMAXPDZrmbkz = 7158,
VMAXPDZrmk = 7159,
VMAXPDZrmkz = 7160,
VMAXPDZrr = 7161,
VMAXPDZrrk = 7162,
VMAXPDZrrkz = 7163,
VMAXPDrm = 7164,
VMAXPDrr = 7165,
VMAXPSYrm = 7166,
VMAXPSYrr = 7167,
VMAXPSZ128rm = 7168,
VMAXPSZ128rmb = 7169,
VMAXPSZ128rmbk = 7170,
VMAXPSZ128rmbkz = 7171,
VMAXPSZ128rmk = 7172,
VMAXPSZ128rmkz = 7173,
VMAXPSZ128rr = 7174,
VMAXPSZ128rrk = 7175,
VMAXPSZ128rrkz = 7176,
VMAXPSZ256rm = 7177,
VMAXPSZ256rmb = 7178,
VMAXPSZ256rmbk = 7179,
VMAXPSZ256rmbkz = 7180,
VMAXPSZ256rmk = 7181,
VMAXPSZ256rmkz = 7182,
VMAXPSZ256rr = 7183,
VMAXPSZ256rrk = 7184,
VMAXPSZ256rrkz = 7185,
VMAXPSZrb = 7186,
VMAXPSZrbk = 7187,
VMAXPSZrbkz = 7188,
VMAXPSZrm = 7189,
VMAXPSZrmb = 7190,
VMAXPSZrmbk = 7191,
VMAXPSZrmbkz = 7192,
VMAXPSZrmk = 7193,
VMAXPSZrmkz = 7194,
VMAXPSZrr = 7195,
VMAXPSZrrk = 7196,
VMAXPSZrrkz = 7197,
VMAXPSrm = 7198,
VMAXPSrr = 7199,
VMAXSDZrm = 7200,
VMAXSDZrm_Int = 7201,
VMAXSDZrm_Intk = 7202,
VMAXSDZrm_Intkz = 7203,
VMAXSDZrr = 7204,
VMAXSDZrr_Int = 7205,
VMAXSDZrr_Intk = 7206,
VMAXSDZrr_Intkz = 7207,
VMAXSDZrrb = 7208,
VMAXSDZrrbk = 7209,
VMAXSDZrrbkz = 7210,
VMAXSDrm = 7211,
VMAXSDrm_Int = 7212,
VMAXSDrr = 7213,
VMAXSDrr_Int = 7214,
VMAXSSZrm = 7215,
VMAXSSZrm_Int = 7216,
VMAXSSZrm_Intk = 7217,
VMAXSSZrm_Intkz = 7218,
VMAXSSZrr = 7219,
VMAXSSZrr_Int = 7220,
VMAXSSZrr_Intk = 7221,
VMAXSSZrr_Intkz = 7222,
VMAXSSZrrb = 7223,
VMAXSSZrrbk = 7224,
VMAXSSZrrbkz = 7225,
VMAXSSrm = 7226,
VMAXSSrm_Int = 7227,
VMAXSSrr = 7228,
VMAXSSrr_Int = 7229,
VMCALL = 7230,
VMCLEARm = 7231,
VMFUNC = 7232,
VMINCPDYrm = 7233,
VMINCPDYrr = 7234,
VMINCPDrm = 7235,
VMINCPDrr = 7236,
VMINCPSYrm = 7237,
VMINCPSYrr = 7238,
VMINCPSrm = 7239,
VMINCPSrr = 7240,
VMINCSDrm = 7241,
VMINCSDrr = 7242,
VMINCSSrm = 7243,
VMINCSSrr = 7244,
VMINPDYrm = 7245,
VMINPDYrr = 7246,
VMINPDZ128rm = 7247,
VMINPDZ128rmb = 7248,
VMINPDZ128rmbk = 7249,
VMINPDZ128rmbkz = 7250,
VMINPDZ128rmk = 7251,
VMINPDZ128rmkz = 7252,
VMINPDZ128rr = 7253,
VMINPDZ128rrk = 7254,
VMINPDZ128rrkz = 7255,
VMINPDZ256rm = 7256,
VMINPDZ256rmb = 7257,
VMINPDZ256rmbk = 7258,
VMINPDZ256rmbkz = 7259,
VMINPDZ256rmk = 7260,
VMINPDZ256rmkz = 7261,
VMINPDZ256rr = 7262,
VMINPDZ256rrk = 7263,
VMINPDZ256rrkz = 7264,
VMINPDZrb = 7265,
VMINPDZrbk = 7266,
VMINPDZrbkz = 7267,
VMINPDZrm = 7268,
VMINPDZrmb = 7269,
VMINPDZrmbk = 7270,
VMINPDZrmbkz = 7271,
VMINPDZrmk = 7272,
VMINPDZrmkz = 7273,
VMINPDZrr = 7274,
VMINPDZrrk = 7275,
VMINPDZrrkz = 7276,
VMINPDrm = 7277,
VMINPDrr = 7278,
VMINPSYrm = 7279,
VMINPSYrr = 7280,
VMINPSZ128rm = 7281,
VMINPSZ128rmb = 7282,
VMINPSZ128rmbk = 7283,
VMINPSZ128rmbkz = 7284,
VMINPSZ128rmk = 7285,
VMINPSZ128rmkz = 7286,
VMINPSZ128rr = 7287,
VMINPSZ128rrk = 7288,
VMINPSZ128rrkz = 7289,
VMINPSZ256rm = 7290,
VMINPSZ256rmb = 7291,
VMINPSZ256rmbk = 7292,
VMINPSZ256rmbkz = 7293,
VMINPSZ256rmk = 7294,
VMINPSZ256rmkz = 7295,
VMINPSZ256rr = 7296,
VMINPSZ256rrk = 7297,
VMINPSZ256rrkz = 7298,
VMINPSZrb = 7299,
VMINPSZrbk = 7300,
VMINPSZrbkz = 7301,
VMINPSZrm = 7302,
VMINPSZrmb = 7303,
VMINPSZrmbk = 7304,
VMINPSZrmbkz = 7305,
VMINPSZrmk = 7306,
VMINPSZrmkz = 7307,
VMINPSZrr = 7308,
VMINPSZrrk = 7309,
VMINPSZrrkz = 7310,
VMINPSrm = 7311,
VMINPSrr = 7312,
VMINSDZrm = 7313,
VMINSDZrm_Int = 7314,
VMINSDZrm_Intk = 7315,
VMINSDZrm_Intkz = 7316,
VMINSDZrr = 7317,
VMINSDZrr_Int = 7318,
VMINSDZrr_Intk = 7319,
VMINSDZrr_Intkz = 7320,
VMINSDZrrb = 7321,
VMINSDZrrbk = 7322,
VMINSDZrrbkz = 7323,
VMINSDrm = 7324,
VMINSDrm_Int = 7325,
VMINSDrr = 7326,
VMINSDrr_Int = 7327,
VMINSSZrm = 7328,
VMINSSZrm_Int = 7329,
VMINSSZrm_Intk = 7330,
VMINSSZrm_Intkz = 7331,
VMINSSZrr = 7332,
VMINSSZrr_Int = 7333,
VMINSSZrr_Intk = 7334,
VMINSSZrr_Intkz = 7335,
VMINSSZrrb = 7336,
VMINSSZrrbk = 7337,
VMINSSZrrbkz = 7338,
VMINSSrm = 7339,
VMINSSrm_Int = 7340,
VMINSSrr = 7341,
VMINSSrr_Int = 7342,
VMLAUNCH = 7343,
VMLOAD32 = 7344,
VMLOAD64 = 7345,
VMMCALL = 7346,
VMOV64toPQIZrm = 7347,
VMOV64toPQIZrr = 7348,
VMOV64toPQIrm = 7349,
VMOV64toPQIrr = 7350,
VMOV64toSDZrr = 7351,
VMOV64toSDrm = 7352,
VMOV64toSDrr = 7353,
VMOVAPDYmr = 7354,
VMOVAPDYrm = 7355,
VMOVAPDYrr = 7356,
VMOVAPDYrr_REV = 7357,
VMOVAPDZ128mr = 7358,
VMOVAPDZ128mrk = 7359,
VMOVAPDZ128rm = 7360,
VMOVAPDZ128rmk = 7361,
VMOVAPDZ128rmkz = 7362,
VMOVAPDZ128rr = 7363,
VMOVAPDZ128rr_REV = 7364,
VMOVAPDZ128rrk = 7365,
VMOVAPDZ128rrk_REV = 7366,
VMOVAPDZ128rrkz = 7367,
VMOVAPDZ128rrkz_REV = 7368,
VMOVAPDZ256mr = 7369,
VMOVAPDZ256mrk = 7370,
VMOVAPDZ256rm = 7371,
VMOVAPDZ256rmk = 7372,
VMOVAPDZ256rmkz = 7373,
VMOVAPDZ256rr = 7374,
VMOVAPDZ256rr_REV = 7375,
VMOVAPDZ256rrk = 7376,
VMOVAPDZ256rrk_REV = 7377,
VMOVAPDZ256rrkz = 7378,
VMOVAPDZ256rrkz_REV = 7379,
VMOVAPDZmr = 7380,
VMOVAPDZmrk = 7381,
VMOVAPDZrm = 7382,
VMOVAPDZrmk = 7383,
VMOVAPDZrmkz = 7384,
VMOVAPDZrr = 7385,
VMOVAPDZrr_REV = 7386,
VMOVAPDZrrk = 7387,
VMOVAPDZrrk_REV = 7388,
VMOVAPDZrrkz = 7389,
VMOVAPDZrrkz_REV = 7390,
VMOVAPDmr = 7391,
VMOVAPDrm = 7392,
VMOVAPDrr = 7393,
VMOVAPDrr_REV = 7394,
VMOVAPSYmr = 7395,
VMOVAPSYrm = 7396,
VMOVAPSYrr = 7397,
VMOVAPSYrr_REV = 7398,
VMOVAPSZ128mr = 7399,
VMOVAPSZ128mrk = 7400,
VMOVAPSZ128rm = 7401,
VMOVAPSZ128rmk = 7402,
VMOVAPSZ128rmkz = 7403,
VMOVAPSZ128rr = 7404,
VMOVAPSZ128rr_REV = 7405,
VMOVAPSZ128rrk = 7406,
VMOVAPSZ128rrk_REV = 7407,
VMOVAPSZ128rrkz = 7408,
VMOVAPSZ128rrkz_REV = 7409,
VMOVAPSZ256mr = 7410,
VMOVAPSZ256mrk = 7411,
VMOVAPSZ256rm = 7412,
VMOVAPSZ256rmk = 7413,
VMOVAPSZ256rmkz = 7414,
VMOVAPSZ256rr = 7415,
VMOVAPSZ256rr_REV = 7416,
VMOVAPSZ256rrk = 7417,
VMOVAPSZ256rrk_REV = 7418,
VMOVAPSZ256rrkz = 7419,
VMOVAPSZ256rrkz_REV = 7420,
VMOVAPSZmr = 7421,
VMOVAPSZmrk = 7422,
VMOVAPSZrm = 7423,
VMOVAPSZrmk = 7424,
VMOVAPSZrmkz = 7425,
VMOVAPSZrr = 7426,
VMOVAPSZrr_REV = 7427,
VMOVAPSZrrk = 7428,
VMOVAPSZrrk_REV = 7429,
VMOVAPSZrrkz = 7430,
VMOVAPSZrrkz_REV = 7431,
VMOVAPSmr = 7432,
VMOVAPSrm = 7433,
VMOVAPSrr = 7434,
VMOVAPSrr_REV = 7435,
VMOVDDUPYrm = 7436,
VMOVDDUPYrr = 7437,
VMOVDDUPZ128rm = 7438,
VMOVDDUPZ128rmk = 7439,
VMOVDDUPZ128rmkz = 7440,
VMOVDDUPZ128rr = 7441,
VMOVDDUPZ128rrk = 7442,
VMOVDDUPZ128rrkz = 7443,
VMOVDDUPZ256rm = 7444,
VMOVDDUPZ256rmk = 7445,
VMOVDDUPZ256rmkz = 7446,
VMOVDDUPZ256rr = 7447,
VMOVDDUPZ256rrk = 7448,
VMOVDDUPZ256rrkz = 7449,
VMOVDDUPZrm = 7450,
VMOVDDUPZrmk = 7451,
VMOVDDUPZrmkz = 7452,
VMOVDDUPZrr = 7453,
VMOVDDUPZrrk = 7454,
VMOVDDUPZrrkz = 7455,
VMOVDDUPrm = 7456,
VMOVDDUPrr = 7457,
VMOVDI2PDIZrm = 7458,
VMOVDI2PDIZrr = 7459,
VMOVDI2PDIrm = 7460,
VMOVDI2PDIrr = 7461,
VMOVDI2SSZrm = 7462,
VMOVDI2SSZrr = 7463,
VMOVDI2SSrm = 7464,
VMOVDI2SSrr = 7465,
VMOVDQA32Z128mr = 7466,
VMOVDQA32Z128mrk = 7467,
VMOVDQA32Z128rm = 7468,
VMOVDQA32Z128rmk = 7469,
VMOVDQA32Z128rmkz = 7470,
VMOVDQA32Z128rr = 7471,
VMOVDQA32Z128rr_REV = 7472,
VMOVDQA32Z128rrk = 7473,
VMOVDQA32Z128rrk_REV = 7474,
VMOVDQA32Z128rrkz = 7475,
VMOVDQA32Z128rrkz_REV = 7476,
VMOVDQA32Z256mr = 7477,
VMOVDQA32Z256mrk = 7478,
VMOVDQA32Z256rm = 7479,
VMOVDQA32Z256rmk = 7480,
VMOVDQA32Z256rmkz = 7481,
VMOVDQA32Z256rr = 7482,
VMOVDQA32Z256rr_REV = 7483,
VMOVDQA32Z256rrk = 7484,
VMOVDQA32Z256rrk_REV = 7485,
VMOVDQA32Z256rrkz = 7486,
VMOVDQA32Z256rrkz_REV = 7487,
VMOVDQA32Zmr = 7488,
VMOVDQA32Zmrk = 7489,
VMOVDQA32Zrm = 7490,
VMOVDQA32Zrmk = 7491,
VMOVDQA32Zrmkz = 7492,
VMOVDQA32Zrr = 7493,
VMOVDQA32Zrr_REV = 7494,
VMOVDQA32Zrrk = 7495,
VMOVDQA32Zrrk_REV = 7496,
VMOVDQA32Zrrkz = 7497,
VMOVDQA32Zrrkz_REV = 7498,
VMOVDQA64Z128mr = 7499,
VMOVDQA64Z128mrk = 7500,
VMOVDQA64Z128rm = 7501,
VMOVDQA64Z128rmk = 7502,
VMOVDQA64Z128rmkz = 7503,
VMOVDQA64Z128rr = 7504,
VMOVDQA64Z128rr_REV = 7505,
VMOVDQA64Z128rrk = 7506,
VMOVDQA64Z128rrk_REV = 7507,
VMOVDQA64Z128rrkz = 7508,
VMOVDQA64Z128rrkz_REV = 7509,
VMOVDQA64Z256mr = 7510,
VMOVDQA64Z256mrk = 7511,
VMOVDQA64Z256rm = 7512,
VMOVDQA64Z256rmk = 7513,
VMOVDQA64Z256rmkz = 7514,
VMOVDQA64Z256rr = 7515,
VMOVDQA64Z256rr_REV = 7516,
VMOVDQA64Z256rrk = 7517,
VMOVDQA64Z256rrk_REV = 7518,
VMOVDQA64Z256rrkz = 7519,
VMOVDQA64Z256rrkz_REV = 7520,
VMOVDQA64Zmr = 7521,
VMOVDQA64Zmrk = 7522,
VMOVDQA64Zrm = 7523,
VMOVDQA64Zrmk = 7524,
VMOVDQA64Zrmkz = 7525,
VMOVDQA64Zrr = 7526,
VMOVDQA64Zrr_REV = 7527,
VMOVDQA64Zrrk = 7528,
VMOVDQA64Zrrk_REV = 7529,
VMOVDQA64Zrrkz = 7530,
VMOVDQA64Zrrkz_REV = 7531,
VMOVDQAYmr = 7532,
VMOVDQAYrm = 7533,
VMOVDQAYrr = 7534,
VMOVDQAYrr_REV = 7535,
VMOVDQAmr = 7536,
VMOVDQArm = 7537,
VMOVDQArr = 7538,
VMOVDQArr_REV = 7539,
VMOVDQU16Z128mr = 7540,
VMOVDQU16Z128mrk = 7541,
VMOVDQU16Z128rm = 7542,
VMOVDQU16Z128rmk = 7543,
VMOVDQU16Z128rmkz = 7544,
VMOVDQU16Z128rr = 7545,
VMOVDQU16Z128rr_REV = 7546,
VMOVDQU16Z128rrk = 7547,
VMOVDQU16Z128rrk_REV = 7548,
VMOVDQU16Z128rrkz = 7549,
VMOVDQU16Z128rrkz_REV = 7550,
VMOVDQU16Z256mr = 7551,
VMOVDQU16Z256mrk = 7552,
VMOVDQU16Z256rm = 7553,
VMOVDQU16Z256rmk = 7554,
VMOVDQU16Z256rmkz = 7555,
VMOVDQU16Z256rr = 7556,
VMOVDQU16Z256rr_REV = 7557,
VMOVDQU16Z256rrk = 7558,
VMOVDQU16Z256rrk_REV = 7559,
VMOVDQU16Z256rrkz = 7560,
VMOVDQU16Z256rrkz_REV = 7561,
VMOVDQU16Zmr = 7562,
VMOVDQU16Zmrk = 7563,
VMOVDQU16Zrm = 7564,
VMOVDQU16Zrmk = 7565,
VMOVDQU16Zrmkz = 7566,
VMOVDQU16Zrr = 7567,
VMOVDQU16Zrr_REV = 7568,
VMOVDQU16Zrrk = 7569,
VMOVDQU16Zrrk_REV = 7570,
VMOVDQU16Zrrkz = 7571,
VMOVDQU16Zrrkz_REV = 7572,
VMOVDQU32Z128mr = 7573,
VMOVDQU32Z128mrk = 7574,
VMOVDQU32Z128rm = 7575,
VMOVDQU32Z128rmk = 7576,
VMOVDQU32Z128rmkz = 7577,
VMOVDQU32Z128rr = 7578,
VMOVDQU32Z128rr_REV = 7579,
VMOVDQU32Z128rrk = 7580,
VMOVDQU32Z128rrk_REV = 7581,
VMOVDQU32Z128rrkz = 7582,
VMOVDQU32Z128rrkz_REV = 7583,
VMOVDQU32Z256mr = 7584,
VMOVDQU32Z256mrk = 7585,
VMOVDQU32Z256rm = 7586,
VMOVDQU32Z256rmk = 7587,
VMOVDQU32Z256rmkz = 7588,
VMOVDQU32Z256rr = 7589,
VMOVDQU32Z256rr_REV = 7590,
VMOVDQU32Z256rrk = 7591,
VMOVDQU32Z256rrk_REV = 7592,
VMOVDQU32Z256rrkz = 7593,
VMOVDQU32Z256rrkz_REV = 7594,
VMOVDQU32Zmr = 7595,
VMOVDQU32Zmrk = 7596,
VMOVDQU32Zrm = 7597,
VMOVDQU32Zrmk = 7598,
VMOVDQU32Zrmkz = 7599,
VMOVDQU32Zrr = 7600,
VMOVDQU32Zrr_REV = 7601,
VMOVDQU32Zrrk = 7602,
VMOVDQU32Zrrk_REV = 7603,
VMOVDQU32Zrrkz = 7604,
VMOVDQU32Zrrkz_REV = 7605,
VMOVDQU64Z128mr = 7606,
VMOVDQU64Z128mrk = 7607,
VMOVDQU64Z128rm = 7608,
VMOVDQU64Z128rmk = 7609,
VMOVDQU64Z128rmkz = 7610,
VMOVDQU64Z128rr = 7611,
VMOVDQU64Z128rr_REV = 7612,
VMOVDQU64Z128rrk = 7613,
VMOVDQU64Z128rrk_REV = 7614,
VMOVDQU64Z128rrkz = 7615,
VMOVDQU64Z128rrkz_REV = 7616,
VMOVDQU64Z256mr = 7617,
VMOVDQU64Z256mrk = 7618,
VMOVDQU64Z256rm = 7619,
VMOVDQU64Z256rmk = 7620,
VMOVDQU64Z256rmkz = 7621,
VMOVDQU64Z256rr = 7622,
VMOVDQU64Z256rr_REV = 7623,
VMOVDQU64Z256rrk = 7624,
VMOVDQU64Z256rrk_REV = 7625,
VMOVDQU64Z256rrkz = 7626,
VMOVDQU64Z256rrkz_REV = 7627,
VMOVDQU64Zmr = 7628,
VMOVDQU64Zmrk = 7629,
VMOVDQU64Zrm = 7630,
VMOVDQU64Zrmk = 7631,
VMOVDQU64Zrmkz = 7632,
VMOVDQU64Zrr = 7633,
VMOVDQU64Zrr_REV = 7634,
VMOVDQU64Zrrk = 7635,
VMOVDQU64Zrrk_REV = 7636,
VMOVDQU64Zrrkz = 7637,
VMOVDQU64Zrrkz_REV = 7638,
VMOVDQU8Z128mr = 7639,
VMOVDQU8Z128mrk = 7640,
VMOVDQU8Z128rm = 7641,
VMOVDQU8Z128rmk = 7642,
VMOVDQU8Z128rmkz = 7643,
VMOVDQU8Z128rr = 7644,
VMOVDQU8Z128rr_REV = 7645,
VMOVDQU8Z128rrk = 7646,
VMOVDQU8Z128rrk_REV = 7647,
VMOVDQU8Z128rrkz = 7648,
VMOVDQU8Z128rrkz_REV = 7649,
VMOVDQU8Z256mr = 7650,
VMOVDQU8Z256mrk = 7651,
VMOVDQU8Z256rm = 7652,
VMOVDQU8Z256rmk = 7653,
VMOVDQU8Z256rmkz = 7654,
VMOVDQU8Z256rr = 7655,
VMOVDQU8Z256rr_REV = 7656,
VMOVDQU8Z256rrk = 7657,
VMOVDQU8Z256rrk_REV = 7658,
VMOVDQU8Z256rrkz = 7659,
VMOVDQU8Z256rrkz_REV = 7660,
VMOVDQU8Zmr = 7661,
VMOVDQU8Zmrk = 7662,
VMOVDQU8Zrm = 7663,
VMOVDQU8Zrmk = 7664,
VMOVDQU8Zrmkz = 7665,
VMOVDQU8Zrr = 7666,
VMOVDQU8Zrr_REV = 7667,
VMOVDQU8Zrrk = 7668,
VMOVDQU8Zrrk_REV = 7669,
VMOVDQU8Zrrkz = 7670,
VMOVDQU8Zrrkz_REV = 7671,
VMOVDQUYmr = 7672,
VMOVDQUYrm = 7673,
VMOVDQUYrr = 7674,
VMOVDQUYrr_REV = 7675,
VMOVDQUmr = 7676,
VMOVDQUrm = 7677,
VMOVDQUrr = 7678,
VMOVDQUrr_REV = 7679,
VMOVHLPSZrr = 7680,
VMOVHLPSrr = 7681,
VMOVHPDZ128mr = 7682,
VMOVHPDZ128rm = 7683,
VMOVHPDmr = 7684,
VMOVHPDrm = 7685,
VMOVHPSZ128mr = 7686,
VMOVHPSZ128rm = 7687,
VMOVHPSmr = 7688,
VMOVHPSrm = 7689,
VMOVLHPSZrr = 7690,
VMOVLHPSrr = 7691,
VMOVLPDZ128mr = 7692,
VMOVLPDZ128rm = 7693,
VMOVLPDmr = 7694,
VMOVLPDrm = 7695,
VMOVLPSZ128mr = 7696,
VMOVLPSZ128rm = 7697,
VMOVLPSmr = 7698,
VMOVLPSrm = 7699,
VMOVMSKPDYrr = 7700,
VMOVMSKPDrr = 7701,
VMOVMSKPSYrr = 7702,
VMOVMSKPSrr = 7703,
VMOVNTDQAYrm = 7704,
VMOVNTDQAZ128rm = 7705,
VMOVNTDQAZ256rm = 7706,
VMOVNTDQAZrm = 7707,
VMOVNTDQArm = 7708,
VMOVNTDQYmr = 7709,
VMOVNTDQZ128mr = 7710,
VMOVNTDQZ256mr = 7711,
VMOVNTDQZmr = 7712,
VMOVNTDQmr = 7713,
VMOVNTPDYmr = 7714,
VMOVNTPDZ128mr = 7715,
VMOVNTPDZ256mr = 7716,
VMOVNTPDZmr = 7717,
VMOVNTPDmr = 7718,
VMOVNTPSYmr = 7719,
VMOVNTPSZ128mr = 7720,
VMOVNTPSZ256mr = 7721,
VMOVNTPSZmr = 7722,
VMOVNTPSmr = 7723,
VMOVPDI2DIZmr = 7724,
VMOVPDI2DIZrr = 7725,
VMOVPDI2DImr = 7726,
VMOVPDI2DIrr = 7727,
VMOVPQI2QIZmr = 7728,
VMOVPQI2QIZrr = 7729,
VMOVPQI2QImr = 7730,
VMOVPQI2QIrr = 7731,
VMOVPQIto64Zmr = 7732,
VMOVPQIto64Zrr = 7733,
VMOVPQIto64rm = 7734,
VMOVPQIto64rr = 7735,
VMOVQI2PQIZrm = 7736,
VMOVQI2PQIrm = 7737,
VMOVSDZmr = 7738,
VMOVSDZmrk = 7739,
VMOVSDZrm = 7740,
VMOVSDZrm_Int = 7741,
VMOVSDZrm_Intk = 7742,
VMOVSDZrm_Intkz = 7743,
VMOVSDZrr = 7744,
VMOVSDZrr_Int = 7745,
VMOVSDZrr_Intk = 7746,
VMOVSDZrr_Intkz = 7747,
VMOVSDmr = 7748,
VMOVSDrm = 7749,
VMOVSDrr = 7750,
VMOVSDrr_REV = 7751,
VMOVSDto64Zmr = 7752,
VMOVSDto64Zrr = 7753,
VMOVSDto64mr = 7754,
VMOVSDto64rr = 7755,
VMOVSHDUPYrm = 7756,
VMOVSHDUPYrr = 7757,
VMOVSHDUPZ128rm = 7758,
VMOVSHDUPZ128rmk = 7759,
VMOVSHDUPZ128rmkz = 7760,
VMOVSHDUPZ128rr = 7761,
VMOVSHDUPZ128rrk = 7762,
VMOVSHDUPZ128rrkz = 7763,
VMOVSHDUPZ256rm = 7764,
VMOVSHDUPZ256rmk = 7765,
VMOVSHDUPZ256rmkz = 7766,
VMOVSHDUPZ256rr = 7767,
VMOVSHDUPZ256rrk = 7768,
VMOVSHDUPZ256rrkz = 7769,
VMOVSHDUPZrm = 7770,
VMOVSHDUPZrmk = 7771,
VMOVSHDUPZrmkz = 7772,
VMOVSHDUPZrr = 7773,
VMOVSHDUPZrrk = 7774,
VMOVSHDUPZrrkz = 7775,
VMOVSHDUPrm = 7776,
VMOVSHDUPrr = 7777,
VMOVSLDUPYrm = 7778,
VMOVSLDUPYrr = 7779,
VMOVSLDUPZ128rm = 7780,
VMOVSLDUPZ128rmk = 7781,
VMOVSLDUPZ128rmkz = 7782,
VMOVSLDUPZ128rr = 7783,
VMOVSLDUPZ128rrk = 7784,
VMOVSLDUPZ128rrkz = 7785,
VMOVSLDUPZ256rm = 7786,
VMOVSLDUPZ256rmk = 7787,
VMOVSLDUPZ256rmkz = 7788,
VMOVSLDUPZ256rr = 7789,
VMOVSLDUPZ256rrk = 7790,
VMOVSLDUPZ256rrkz = 7791,
VMOVSLDUPZrm = 7792,
VMOVSLDUPZrmk = 7793,
VMOVSLDUPZrmkz = 7794,
VMOVSLDUPZrr = 7795,
VMOVSLDUPZrrk = 7796,
VMOVSLDUPZrrkz = 7797,
VMOVSLDUPrm = 7798,
VMOVSLDUPrr = 7799,
VMOVSS2DIZmr = 7800,
VMOVSS2DIZrr = 7801,
VMOVSS2DImr = 7802,
VMOVSS2DIrr = 7803,
VMOVSSDrr_REV = 7804,
VMOVSSDrr_REVk = 7805,
VMOVSSDrr_REVkz = 7806,
VMOVSSZmr = 7807,
VMOVSSZmrk = 7808,
VMOVSSZrm = 7809,
VMOVSSZrm_Int = 7810,
VMOVSSZrm_Intk = 7811,
VMOVSSZrm_Intkz = 7812,
VMOVSSZrr = 7813,
VMOVSSZrr_Int = 7814,
VMOVSSZrr_Intk = 7815,
VMOVSSZrr_Intkz = 7816,
VMOVSSZrr_REV = 7817,
VMOVSSZrr_REVk = 7818,
VMOVSSZrr_REVkz = 7819,
VMOVSSmr = 7820,
VMOVSSrm = 7821,
VMOVSSrr = 7822,
VMOVSSrr_REV = 7823,
VMOVUPDYmr = 7824,
VMOVUPDYrm = 7825,
VMOVUPDYrr = 7826,
VMOVUPDYrr_REV = 7827,
VMOVUPDZ128mr = 7828,
VMOVUPDZ128mrk = 7829,
VMOVUPDZ128rm = 7830,
VMOVUPDZ128rmk = 7831,
VMOVUPDZ128rmkz = 7832,
VMOVUPDZ128rr = 7833,
VMOVUPDZ128rr_REV = 7834,
VMOVUPDZ128rrk = 7835,
VMOVUPDZ128rrk_REV = 7836,
VMOVUPDZ128rrkz = 7837,
VMOVUPDZ128rrkz_REV = 7838,
VMOVUPDZ256mr = 7839,
VMOVUPDZ256mrk = 7840,
VMOVUPDZ256rm = 7841,
VMOVUPDZ256rmk = 7842,
VMOVUPDZ256rmkz = 7843,
VMOVUPDZ256rr = 7844,
VMOVUPDZ256rr_REV = 7845,
VMOVUPDZ256rrk = 7846,
VMOVUPDZ256rrk_REV = 7847,
VMOVUPDZ256rrkz = 7848,
VMOVUPDZ256rrkz_REV = 7849,
VMOVUPDZmr = 7850,
VMOVUPDZmrk = 7851,
VMOVUPDZrm = 7852,
VMOVUPDZrmk = 7853,
VMOVUPDZrmkz = 7854,
VMOVUPDZrr = 7855,
VMOVUPDZrr_REV = 7856,
VMOVUPDZrrk = 7857,
VMOVUPDZrrk_REV = 7858,
VMOVUPDZrrkz = 7859,
VMOVUPDZrrkz_REV = 7860,
VMOVUPDmr = 7861,
VMOVUPDrm = 7862,
VMOVUPDrr = 7863,
VMOVUPDrr_REV = 7864,
VMOVUPSYmr = 7865,
VMOVUPSYrm = 7866,
VMOVUPSYrr = 7867,
VMOVUPSYrr_REV = 7868,
VMOVUPSZ128mr = 7869,
VMOVUPSZ128mrk = 7870,
VMOVUPSZ128rm = 7871,
VMOVUPSZ128rmk = 7872,
VMOVUPSZ128rmkz = 7873,
VMOVUPSZ128rr = 7874,
VMOVUPSZ128rr_REV = 7875,
VMOVUPSZ128rrk = 7876,
VMOVUPSZ128rrk_REV = 7877,
VMOVUPSZ128rrkz = 7878,
VMOVUPSZ128rrkz_REV = 7879,
VMOVUPSZ256mr = 7880,
VMOVUPSZ256mrk = 7881,
VMOVUPSZ256rm = 7882,
VMOVUPSZ256rmk = 7883,
VMOVUPSZ256rmkz = 7884,
VMOVUPSZ256rr = 7885,
VMOVUPSZ256rr_REV = 7886,
VMOVUPSZ256rrk = 7887,
VMOVUPSZ256rrk_REV = 7888,
VMOVUPSZ256rrkz = 7889,
VMOVUPSZ256rrkz_REV = 7890,
VMOVUPSZmr = 7891,
VMOVUPSZmrk = 7892,
VMOVUPSZrm = 7893,
VMOVUPSZrmk = 7894,
VMOVUPSZrmkz = 7895,
VMOVUPSZrr = 7896,
VMOVUPSZrr_REV = 7897,
VMOVUPSZrrk = 7898,
VMOVUPSZrrk_REV = 7899,
VMOVUPSZrrkz = 7900,
VMOVUPSZrrkz_REV = 7901,
VMOVUPSmr = 7902,
VMOVUPSrm = 7903,
VMOVUPSrr = 7904,
VMOVUPSrr_REV = 7905,
VMOVZPQILo2PQIZrm = 7906,
VMOVZPQILo2PQIZrr = 7907,
VMOVZPQILo2PQIrm = 7908,
VMOVZPQILo2PQIrr = 7909,
VMOVZQI2PQIrm = 7910,
VMPSADBWYrmi = 7911,
VMPSADBWYrri = 7912,
VMPSADBWrmi = 7913,
VMPSADBWrri = 7914,
VMPTRLDm = 7915,
VMPTRSTm = 7916,
VMREAD32rm = 7917,
VMREAD32rr = 7918,
VMREAD64rm = 7919,
VMREAD64rr = 7920,
VMRESUME = 7921,
VMRUN32 = 7922,
VMRUN64 = 7923,
VMSAVE32 = 7924,
VMSAVE64 = 7925,
VMULPDYrm = 7926,
VMULPDYrr = 7927,
VMULPDZ128rm = 7928,
VMULPDZ128rmb = 7929,
VMULPDZ128rmbk = 7930,
VMULPDZ128rmbkz = 7931,
VMULPDZ128rmk = 7932,
VMULPDZ128rmkz = 7933,
VMULPDZ128rr = 7934,
VMULPDZ128rrk = 7935,
VMULPDZ128rrkz = 7936,
VMULPDZ256rm = 7937,
VMULPDZ256rmb = 7938,
VMULPDZ256rmbk = 7939,
VMULPDZ256rmbkz = 7940,
VMULPDZ256rmk = 7941,
VMULPDZ256rmkz = 7942,
VMULPDZ256rr = 7943,
VMULPDZ256rrk = 7944,
VMULPDZ256rrkz = 7945,
VMULPDZrb = 7946,
VMULPDZrbk = 7947,
VMULPDZrbkz = 7948,
VMULPDZrm = 7949,
VMULPDZrmb = 7950,
VMULPDZrmbk = 7951,
VMULPDZrmbkz = 7952,
VMULPDZrmk = 7953,
VMULPDZrmkz = 7954,
VMULPDZrr = 7955,
VMULPDZrrk = 7956,
VMULPDZrrkz = 7957,
VMULPDrm = 7958,
VMULPDrr = 7959,
VMULPSYrm = 7960,
VMULPSYrr = 7961,
VMULPSZ128rm = 7962,
VMULPSZ128rmb = 7963,
VMULPSZ128rmbk = 7964,
VMULPSZ128rmbkz = 7965,
VMULPSZ128rmk = 7966,
VMULPSZ128rmkz = 7967,
VMULPSZ128rr = 7968,
VMULPSZ128rrk = 7969,
VMULPSZ128rrkz = 7970,
VMULPSZ256rm = 7971,
VMULPSZ256rmb = 7972,
VMULPSZ256rmbk = 7973,
VMULPSZ256rmbkz = 7974,
VMULPSZ256rmk = 7975,
VMULPSZ256rmkz = 7976,
VMULPSZ256rr = 7977,
VMULPSZ256rrk = 7978,
VMULPSZ256rrkz = 7979,
VMULPSZrb = 7980,
VMULPSZrbk = 7981,
VMULPSZrbkz = 7982,
VMULPSZrm = 7983,
VMULPSZrmb = 7984,
VMULPSZrmbk = 7985,
VMULPSZrmbkz = 7986,
VMULPSZrmk = 7987,
VMULPSZrmkz = 7988,
VMULPSZrr = 7989,
VMULPSZrrk = 7990,
VMULPSZrrkz = 7991,
VMULPSrm = 7992,
VMULPSrr = 7993,
VMULSDZrm = 7994,
VMULSDZrm_Int = 7995,
VMULSDZrm_Intk = 7996,
VMULSDZrm_Intkz = 7997,
VMULSDZrr = 7998,
VMULSDZrr_Int = 7999,
VMULSDZrr_Intk = 8000,
VMULSDZrr_Intkz = 8001,
VMULSDZrrb = 8002,
VMULSDZrrbk = 8003,
VMULSDZrrbkz = 8004,
VMULSDrm = 8005,
VMULSDrm_Int = 8006,
VMULSDrr = 8007,
VMULSDrr_Int = 8008,
VMULSSZrm = 8009,
VMULSSZrm_Int = 8010,
VMULSSZrm_Intk = 8011,
VMULSSZrm_Intkz = 8012,
VMULSSZrr = 8013,
VMULSSZrr_Int = 8014,
VMULSSZrr_Intk = 8015,
VMULSSZrr_Intkz = 8016,
VMULSSZrrb = 8017,
VMULSSZrrbk = 8018,
VMULSSZrrbkz = 8019,
VMULSSrm = 8020,
VMULSSrm_Int = 8021,
VMULSSrr = 8022,
VMULSSrr_Int = 8023,
VMWRITE32rm = 8024,
VMWRITE32rr = 8025,
VMWRITE64rm = 8026,
VMWRITE64rr = 8027,
VMXOFF = 8028,
VMXON = 8029,
VORPDYrm = 8030,
VORPDYrr = 8031,
VORPDZ128rm = 8032,
VORPDZ128rmb = 8033,
VORPDZ128rmbk = 8034,
VORPDZ128rmbkz = 8035,
VORPDZ128rmk = 8036,
VORPDZ128rmkz = 8037,
VORPDZ128rr = 8038,
VORPDZ128rrk = 8039,
VORPDZ128rrkz = 8040,
VORPDZ256rm = 8041,
VORPDZ256rmb = 8042,
VORPDZ256rmbk = 8043,
VORPDZ256rmbkz = 8044,
VORPDZ256rmk = 8045,
VORPDZ256rmkz = 8046,
VORPDZ256rr = 8047,
VORPDZ256rrk = 8048,
VORPDZ256rrkz = 8049,
VORPDZrm = 8050,
VORPDZrmb = 8051,
VORPDZrmbk = 8052,
VORPDZrmbkz = 8053,
VORPDZrmk = 8054,
VORPDZrmkz = 8055,
VORPDZrr = 8056,
VORPDZrrk = 8057,
VORPDZrrkz = 8058,
VORPDrm = 8059,
VORPDrr = 8060,
VORPSYrm = 8061,
VORPSYrr = 8062,
VORPSZ128rm = 8063,
VORPSZ128rmb = 8064,
VORPSZ128rmbk = 8065,
VORPSZ128rmbkz = 8066,
VORPSZ128rmk = 8067,
VORPSZ128rmkz = 8068,
VORPSZ128rr = 8069,
VORPSZ128rrk = 8070,
VORPSZ128rrkz = 8071,
VORPSZ256rm = 8072,
VORPSZ256rmb = 8073,
VORPSZ256rmbk = 8074,
VORPSZ256rmbkz = 8075,
VORPSZ256rmk = 8076,
VORPSZ256rmkz = 8077,
VORPSZ256rr = 8078,
VORPSZ256rrk = 8079,
VORPSZ256rrkz = 8080,
VORPSZrm = 8081,
VORPSZrmb = 8082,
VORPSZrmbk = 8083,
VORPSZrmbkz = 8084,
VORPSZrmk = 8085,
VORPSZrmkz = 8086,
VORPSZrr = 8087,
VORPSZrrk = 8088,
VORPSZrrkz = 8089,
VORPSrm = 8090,
VORPSrr = 8091,
VPABSBZ128rm = 8092,
VPABSBZ128rmk = 8093,
VPABSBZ128rmkz = 8094,
VPABSBZ128rr = 8095,
VPABSBZ128rrk = 8096,
VPABSBZ128rrkz = 8097,
VPABSBZ256rm = 8098,
VPABSBZ256rmk = 8099,
VPABSBZ256rmkz = 8100,
VPABSBZ256rr = 8101,
VPABSBZ256rrk = 8102,
VPABSBZ256rrkz = 8103,
VPABSBZrm = 8104,
VPABSBZrmk = 8105,
VPABSBZrmkz = 8106,
VPABSBZrr = 8107,
VPABSBZrrk = 8108,
VPABSBZrrkz = 8109,
VPABSBrm128 = 8110,
VPABSBrm256 = 8111,
VPABSBrr128 = 8112,
VPABSBrr256 = 8113,
VPABSDZ128rm = 8114,
VPABSDZ128rmb = 8115,
VPABSDZ128rmbk = 8116,
VPABSDZ128rmbkz = 8117,
VPABSDZ128rmk = 8118,
VPABSDZ128rmkz = 8119,
VPABSDZ128rr = 8120,
VPABSDZ128rrk = 8121,
VPABSDZ128rrkz = 8122,
VPABSDZ256rm = 8123,
VPABSDZ256rmb = 8124,
VPABSDZ256rmbk = 8125,
VPABSDZ256rmbkz = 8126,
VPABSDZ256rmk = 8127,
VPABSDZ256rmkz = 8128,
VPABSDZ256rr = 8129,
VPABSDZ256rrk = 8130,
VPABSDZ256rrkz = 8131,
VPABSDZrm = 8132,
VPABSDZrmb = 8133,
VPABSDZrmbk = 8134,
VPABSDZrmbkz = 8135,
VPABSDZrmk = 8136,
VPABSDZrmkz = 8137,
VPABSDZrr = 8138,
VPABSDZrrk = 8139,
VPABSDZrrkz = 8140,
VPABSDrm128 = 8141,
VPABSDrm256 = 8142,
VPABSDrr128 = 8143,
VPABSDrr256 = 8144,
VPABSQZ128rm = 8145,
VPABSQZ128rmb = 8146,
VPABSQZ128rmbk = 8147,
VPABSQZ128rmbkz = 8148,
VPABSQZ128rmk = 8149,
VPABSQZ128rmkz = 8150,
VPABSQZ128rr = 8151,
VPABSQZ128rrk = 8152,
VPABSQZ128rrkz = 8153,
VPABSQZ256rm = 8154,
VPABSQZ256rmb = 8155,
VPABSQZ256rmbk = 8156,
VPABSQZ256rmbkz = 8157,
VPABSQZ256rmk = 8158,
VPABSQZ256rmkz = 8159,
VPABSQZ256rr = 8160,
VPABSQZ256rrk = 8161,
VPABSQZ256rrkz = 8162,
VPABSQZrm = 8163,
VPABSQZrmb = 8164,
VPABSQZrmbk = 8165,
VPABSQZrmbkz = 8166,
VPABSQZrmk = 8167,
VPABSQZrmkz = 8168,
VPABSQZrr = 8169,
VPABSQZrrk = 8170,
VPABSQZrrkz = 8171,
VPABSWZ128rm = 8172,
VPABSWZ128rmk = 8173,
VPABSWZ128rmkz = 8174,
VPABSWZ128rr = 8175,
VPABSWZ128rrk = 8176,
VPABSWZ128rrkz = 8177,
VPABSWZ256rm = 8178,
VPABSWZ256rmk = 8179,
VPABSWZ256rmkz = 8180,
VPABSWZ256rr = 8181,
VPABSWZ256rrk = 8182,
VPABSWZ256rrkz = 8183,
VPABSWZrm = 8184,
VPABSWZrmk = 8185,
VPABSWZrmkz = 8186,
VPABSWZrr = 8187,
VPABSWZrrk = 8188,
VPABSWZrrkz = 8189,
VPABSWrm128 = 8190,
VPABSWrm256 = 8191,
VPABSWrr128 = 8192,
VPABSWrr256 = 8193,
VPACKSSDWYrm = 8194,
VPACKSSDWYrr = 8195,
VPACKSSDWZ128rm = 8196,
VPACKSSDWZ128rmb = 8197,
VPACKSSDWZ128rmbk = 8198,
VPACKSSDWZ128rmbkz = 8199,
VPACKSSDWZ128rmk = 8200,
VPACKSSDWZ128rmkz = 8201,
VPACKSSDWZ128rr = 8202,
VPACKSSDWZ128rrk = 8203,
VPACKSSDWZ128rrkz = 8204,
VPACKSSDWZ256rm = 8205,
VPACKSSDWZ256rmb = 8206,
VPACKSSDWZ256rmbk = 8207,
VPACKSSDWZ256rmbkz = 8208,
VPACKSSDWZ256rmk = 8209,
VPACKSSDWZ256rmkz = 8210,
VPACKSSDWZ256rr = 8211,
VPACKSSDWZ256rrk = 8212,
VPACKSSDWZ256rrkz = 8213,
VPACKSSDWZrm = 8214,
VPACKSSDWZrmb = 8215,
VPACKSSDWZrmbk = 8216,
VPACKSSDWZrmbkz = 8217,
VPACKSSDWZrmk = 8218,
VPACKSSDWZrmkz = 8219,
VPACKSSDWZrr = 8220,
VPACKSSDWZrrk = 8221,
VPACKSSDWZrrkz = 8222,
VPACKSSDWrm = 8223,
VPACKSSDWrr = 8224,
VPACKSSWBYrm = 8225,
VPACKSSWBYrr = 8226,
VPACKSSWBZ128rm = 8227,
VPACKSSWBZ128rmk = 8228,
VPACKSSWBZ128rmkz = 8229,
VPACKSSWBZ128rr = 8230,
VPACKSSWBZ128rrk = 8231,
VPACKSSWBZ128rrkz = 8232,
VPACKSSWBZ256rm = 8233,
VPACKSSWBZ256rmk = 8234,
VPACKSSWBZ256rmkz = 8235,
VPACKSSWBZ256rr = 8236,
VPACKSSWBZ256rrk = 8237,
VPACKSSWBZ256rrkz = 8238,
VPACKSSWBZrm = 8239,
VPACKSSWBZrmk = 8240,
VPACKSSWBZrmkz = 8241,
VPACKSSWBZrr = 8242,
VPACKSSWBZrrk = 8243,
VPACKSSWBZrrkz = 8244,
VPACKSSWBrm = 8245,
VPACKSSWBrr = 8246,
VPACKUSDWYrm = 8247,
VPACKUSDWYrr = 8248,
VPACKUSDWZ128rm = 8249,
VPACKUSDWZ128rmb = 8250,
VPACKUSDWZ128rmbk = 8251,
VPACKUSDWZ128rmbkz = 8252,
VPACKUSDWZ128rmk = 8253,
VPACKUSDWZ128rmkz = 8254,
VPACKUSDWZ128rr = 8255,
VPACKUSDWZ128rrk = 8256,
VPACKUSDWZ128rrkz = 8257,
VPACKUSDWZ256rm = 8258,
VPACKUSDWZ256rmb = 8259,
VPACKUSDWZ256rmbk = 8260,
VPACKUSDWZ256rmbkz = 8261,
VPACKUSDWZ256rmk = 8262,
VPACKUSDWZ256rmkz = 8263,
VPACKUSDWZ256rr = 8264,
VPACKUSDWZ256rrk = 8265,
VPACKUSDWZ256rrkz = 8266,
VPACKUSDWZrm = 8267,
VPACKUSDWZrmb = 8268,
VPACKUSDWZrmbk = 8269,
VPACKUSDWZrmbkz = 8270,
VPACKUSDWZrmk = 8271,
VPACKUSDWZrmkz = 8272,
VPACKUSDWZrr = 8273,
VPACKUSDWZrrk = 8274,
VPACKUSDWZrrkz = 8275,
VPACKUSDWrm = 8276,
VPACKUSDWrr = 8277,
VPACKUSWBYrm = 8278,
VPACKUSWBYrr = 8279,
VPACKUSWBZ128rm = 8280,
VPACKUSWBZ128rmk = 8281,
VPACKUSWBZ128rmkz = 8282,
VPACKUSWBZ128rr = 8283,
VPACKUSWBZ128rrk = 8284,
VPACKUSWBZ128rrkz = 8285,
VPACKUSWBZ256rm = 8286,
VPACKUSWBZ256rmk = 8287,
VPACKUSWBZ256rmkz = 8288,
VPACKUSWBZ256rr = 8289,
VPACKUSWBZ256rrk = 8290,
VPACKUSWBZ256rrkz = 8291,
VPACKUSWBZrm = 8292,
VPACKUSWBZrmk = 8293,
VPACKUSWBZrmkz = 8294,
VPACKUSWBZrr = 8295,
VPACKUSWBZrrk = 8296,
VPACKUSWBZrrkz = 8297,
VPACKUSWBrm = 8298,
VPACKUSWBrr = 8299,
VPADDBYrm = 8300,
VPADDBYrr = 8301,
VPADDBZ128rm = 8302,
VPADDBZ128rmk = 8303,
VPADDBZ128rmkz = 8304,
VPADDBZ128rr = 8305,
VPADDBZ128rrk = 8306,
VPADDBZ128rrkz = 8307,
VPADDBZ256rm = 8308,
VPADDBZ256rmk = 8309,
VPADDBZ256rmkz = 8310,
VPADDBZ256rr = 8311,
VPADDBZ256rrk = 8312,
VPADDBZ256rrkz = 8313,
VPADDBZrm = 8314,
VPADDBZrmk = 8315,
VPADDBZrmkz = 8316,
VPADDBZrr = 8317,
VPADDBZrrk = 8318,
VPADDBZrrkz = 8319,
VPADDBrm = 8320,
VPADDBrr = 8321,
VPADDDYrm = 8322,
VPADDDYrr = 8323,
VPADDDZ128rm = 8324,
VPADDDZ128rmb = 8325,
VPADDDZ128rmbk = 8326,
VPADDDZ128rmbkz = 8327,
VPADDDZ128rmk = 8328,
VPADDDZ128rmkz = 8329,
VPADDDZ128rr = 8330,
VPADDDZ128rrk = 8331,
VPADDDZ128rrkz = 8332,
VPADDDZ256rm = 8333,
VPADDDZ256rmb = 8334,
VPADDDZ256rmbk = 8335,
VPADDDZ256rmbkz = 8336,
VPADDDZ256rmk = 8337,
VPADDDZ256rmkz = 8338,
VPADDDZ256rr = 8339,
VPADDDZ256rrk = 8340,
VPADDDZ256rrkz = 8341,
VPADDDZrm = 8342,
VPADDDZrmb = 8343,
VPADDDZrmbk = 8344,
VPADDDZrmbkz = 8345,
VPADDDZrmk = 8346,
VPADDDZrmkz = 8347,
VPADDDZrr = 8348,
VPADDDZrrk = 8349,
VPADDDZrrkz = 8350,
VPADDDrm = 8351,
VPADDDrr = 8352,
VPADDQYrm = 8353,
VPADDQYrr = 8354,
VPADDQZ128rm = 8355,
VPADDQZ128rmb = 8356,
VPADDQZ128rmbk = 8357,
VPADDQZ128rmbkz = 8358,
VPADDQZ128rmk = 8359,
VPADDQZ128rmkz = 8360,
VPADDQZ128rr = 8361,
VPADDQZ128rrk = 8362,
VPADDQZ128rrkz = 8363,
VPADDQZ256rm = 8364,
VPADDQZ256rmb = 8365,
VPADDQZ256rmbk = 8366,
VPADDQZ256rmbkz = 8367,
VPADDQZ256rmk = 8368,
VPADDQZ256rmkz = 8369,
VPADDQZ256rr = 8370,
VPADDQZ256rrk = 8371,
VPADDQZ256rrkz = 8372,
VPADDQZrm = 8373,
VPADDQZrmb = 8374,
VPADDQZrmbk = 8375,
VPADDQZrmbkz = 8376,
VPADDQZrmk = 8377,
VPADDQZrmkz = 8378,
VPADDQZrr = 8379,
VPADDQZrrk = 8380,
VPADDQZrrkz = 8381,
VPADDQrm = 8382,
VPADDQrr = 8383,
VPADDSBYrm = 8384,
VPADDSBYrr = 8385,
VPADDSBZ128rm = 8386,
VPADDSBZ128rmk = 8387,
VPADDSBZ128rmkz = 8388,
VPADDSBZ128rr = 8389,
VPADDSBZ128rrk = 8390,
VPADDSBZ128rrkz = 8391,
VPADDSBZ256rm = 8392,
VPADDSBZ256rmk = 8393,
VPADDSBZ256rmkz = 8394,
VPADDSBZ256rr = 8395,
VPADDSBZ256rrk = 8396,
VPADDSBZ256rrkz = 8397,
VPADDSBZrm = 8398,
VPADDSBZrmk = 8399,
VPADDSBZrmkz = 8400,
VPADDSBZrr = 8401,
VPADDSBZrrk = 8402,
VPADDSBZrrkz = 8403,
VPADDSBrm = 8404,
VPADDSBrr = 8405,
VPADDSWYrm = 8406,
VPADDSWYrr = 8407,
VPADDSWZ128rm = 8408,
VPADDSWZ128rmk = 8409,
VPADDSWZ128rmkz = 8410,
VPADDSWZ128rr = 8411,
VPADDSWZ128rrk = 8412,
VPADDSWZ128rrkz = 8413,
VPADDSWZ256rm = 8414,
VPADDSWZ256rmk = 8415,
VPADDSWZ256rmkz = 8416,
VPADDSWZ256rr = 8417,
VPADDSWZ256rrk = 8418,
VPADDSWZ256rrkz = 8419,
VPADDSWZrm = 8420,
VPADDSWZrmk = 8421,
VPADDSWZrmkz = 8422,
VPADDSWZrr = 8423,
VPADDSWZrrk = 8424,
VPADDSWZrrkz = 8425,
VPADDSWrm = 8426,
VPADDSWrr = 8427,
VPADDUSBYrm = 8428,
VPADDUSBYrr = 8429,
VPADDUSBZ128rm = 8430,
VPADDUSBZ128rmk = 8431,
VPADDUSBZ128rmkz = 8432,
VPADDUSBZ128rr = 8433,
VPADDUSBZ128rrk = 8434,
VPADDUSBZ128rrkz = 8435,
VPADDUSBZ256rm = 8436,
VPADDUSBZ256rmk = 8437,
VPADDUSBZ256rmkz = 8438,
VPADDUSBZ256rr = 8439,
VPADDUSBZ256rrk = 8440,
VPADDUSBZ256rrkz = 8441,
VPADDUSBZrm = 8442,
VPADDUSBZrmk = 8443,
VPADDUSBZrmkz = 8444,
VPADDUSBZrr = 8445,
VPADDUSBZrrk = 8446,
VPADDUSBZrrkz = 8447,
VPADDUSBrm = 8448,
VPADDUSBrr = 8449,
VPADDUSWYrm = 8450,
VPADDUSWYrr = 8451,
VPADDUSWZ128rm = 8452,
VPADDUSWZ128rmk = 8453,
VPADDUSWZ128rmkz = 8454,
VPADDUSWZ128rr = 8455,
VPADDUSWZ128rrk = 8456,
VPADDUSWZ128rrkz = 8457,
VPADDUSWZ256rm = 8458,
VPADDUSWZ256rmk = 8459,
VPADDUSWZ256rmkz = 8460,
VPADDUSWZ256rr = 8461,
VPADDUSWZ256rrk = 8462,
VPADDUSWZ256rrkz = 8463,
VPADDUSWZrm = 8464,
VPADDUSWZrmk = 8465,
VPADDUSWZrmkz = 8466,
VPADDUSWZrr = 8467,
VPADDUSWZrrk = 8468,
VPADDUSWZrrkz = 8469,
VPADDUSWrm = 8470,
VPADDUSWrr = 8471,
VPADDWYrm = 8472,
VPADDWYrr = 8473,
VPADDWZ128rm = 8474,
VPADDWZ128rmk = 8475,
VPADDWZ128rmkz = 8476,
VPADDWZ128rr = 8477,
VPADDWZ128rrk = 8478,
VPADDWZ128rrkz = 8479,
VPADDWZ256rm = 8480,
VPADDWZ256rmk = 8481,
VPADDWZ256rmkz = 8482,
VPADDWZ256rr = 8483,
VPADDWZ256rrk = 8484,
VPADDWZ256rrkz = 8485,
VPADDWZrm = 8486,
VPADDWZrmk = 8487,
VPADDWZrmkz = 8488,
VPADDWZrr = 8489,
VPADDWZrrk = 8490,
VPADDWZrrkz = 8491,
VPADDWrm = 8492,
VPADDWrr = 8493,
VPALIGNR128rm = 8494,
VPALIGNR128rr = 8495,
VPALIGNR256rm = 8496,
VPALIGNR256rr = 8497,
VPALIGNZ128rmi = 8498,
VPALIGNZ128rmik = 8499,
VPALIGNZ128rmikz = 8500,
VPALIGNZ128rri = 8501,
VPALIGNZ128rrik = 8502,
VPALIGNZ128rrikz = 8503,
VPALIGNZ256rmi = 8504,
VPALIGNZ256rmik = 8505,
VPALIGNZ256rmikz = 8506,
VPALIGNZ256rri = 8507,
VPALIGNZ256rrik = 8508,
VPALIGNZ256rrikz = 8509,
VPALIGNZrmi = 8510,
VPALIGNZrmik = 8511,
VPALIGNZrmikz = 8512,
VPALIGNZrri = 8513,
VPALIGNZrrik = 8514,
VPALIGNZrrikz = 8515,
VPANDDZ128rm = 8516,
VPANDDZ128rmb = 8517,
VPANDDZ128rmbk = 8518,
VPANDDZ128rmbkz = 8519,
VPANDDZ128rmk = 8520,
VPANDDZ128rmkz = 8521,
VPANDDZ128rr = 8522,
VPANDDZ128rrk = 8523,
VPANDDZ128rrkz = 8524,
VPANDDZ256rm = 8525,
VPANDDZ256rmb = 8526,
VPANDDZ256rmbk = 8527,
VPANDDZ256rmbkz = 8528,
VPANDDZ256rmk = 8529,
VPANDDZ256rmkz = 8530,
VPANDDZ256rr = 8531,
VPANDDZ256rrk = 8532,
VPANDDZ256rrkz = 8533,
VPANDDZrm = 8534,
VPANDDZrmb = 8535,
VPANDDZrmbk = 8536,
VPANDDZrmbkz = 8537,
VPANDDZrmk = 8538,
VPANDDZrmkz = 8539,
VPANDDZrr = 8540,
VPANDDZrrk = 8541,
VPANDDZrrkz = 8542,
VPANDNDZ128rm = 8543,
VPANDNDZ128rmb = 8544,
VPANDNDZ128rmbk = 8545,
VPANDNDZ128rmbkz = 8546,
VPANDNDZ128rmk = 8547,
VPANDNDZ128rmkz = 8548,
VPANDNDZ128rr = 8549,
VPANDNDZ128rrk = 8550,
VPANDNDZ128rrkz = 8551,
VPANDNDZ256rm = 8552,
VPANDNDZ256rmb = 8553,
VPANDNDZ256rmbk = 8554,
VPANDNDZ256rmbkz = 8555,
VPANDNDZ256rmk = 8556,
VPANDNDZ256rmkz = 8557,
VPANDNDZ256rr = 8558,
VPANDNDZ256rrk = 8559,
VPANDNDZ256rrkz = 8560,
VPANDNDZrm = 8561,
VPANDNDZrmb = 8562,
VPANDNDZrmbk = 8563,
VPANDNDZrmbkz = 8564,
VPANDNDZrmk = 8565,
VPANDNDZrmkz = 8566,
VPANDNDZrr = 8567,
VPANDNDZrrk = 8568,
VPANDNDZrrkz = 8569,
VPANDNQZ128rm = 8570,
VPANDNQZ128rmb = 8571,
VPANDNQZ128rmbk = 8572,
VPANDNQZ128rmbkz = 8573,
VPANDNQZ128rmk = 8574,
VPANDNQZ128rmkz = 8575,
VPANDNQZ128rr = 8576,
VPANDNQZ128rrk = 8577,
VPANDNQZ128rrkz = 8578,
VPANDNQZ256rm = 8579,
VPANDNQZ256rmb = 8580,
VPANDNQZ256rmbk = 8581,
VPANDNQZ256rmbkz = 8582,
VPANDNQZ256rmk = 8583,
VPANDNQZ256rmkz = 8584,
VPANDNQZ256rr = 8585,
VPANDNQZ256rrk = 8586,
VPANDNQZ256rrkz = 8587,
VPANDNQZrm = 8588,
VPANDNQZrmb = 8589,
VPANDNQZrmbk = 8590,
VPANDNQZrmbkz = 8591,
VPANDNQZrmk = 8592,
VPANDNQZrmkz = 8593,
VPANDNQZrr = 8594,
VPANDNQZrrk = 8595,
VPANDNQZrrkz = 8596,
VPANDNYrm = 8597,
VPANDNYrr = 8598,
VPANDNrm = 8599,
VPANDNrr = 8600,
VPANDQZ128rm = 8601,
VPANDQZ128rmb = 8602,
VPANDQZ128rmbk = 8603,
VPANDQZ128rmbkz = 8604,
VPANDQZ128rmk = 8605,
VPANDQZ128rmkz = 8606,
VPANDQZ128rr = 8607,
VPANDQZ128rrk = 8608,
VPANDQZ128rrkz = 8609,
VPANDQZ256rm = 8610,
VPANDQZ256rmb = 8611,
VPANDQZ256rmbk = 8612,
VPANDQZ256rmbkz = 8613,
VPANDQZ256rmk = 8614,
VPANDQZ256rmkz = 8615,
VPANDQZ256rr = 8616,
VPANDQZ256rrk = 8617,
VPANDQZ256rrkz = 8618,
VPANDQZrm = 8619,
VPANDQZrmb = 8620,
VPANDQZrmbk = 8621,
VPANDQZrmbkz = 8622,
VPANDQZrmk = 8623,
VPANDQZrmkz = 8624,
VPANDQZrr = 8625,
VPANDQZrrk = 8626,
VPANDQZrrkz = 8627,
VPANDYrm = 8628,
VPANDYrr = 8629,
VPANDrm = 8630,
VPANDrr = 8631,
VPAVGBYrm = 8632,
VPAVGBYrr = 8633,
VPAVGBZ128rm = 8634,
VPAVGBZ128rmk = 8635,
VPAVGBZ128rmkz = 8636,
VPAVGBZ128rr = 8637,
VPAVGBZ128rrk = 8638,
VPAVGBZ128rrkz = 8639,
VPAVGBZ256rm = 8640,
VPAVGBZ256rmk = 8641,
VPAVGBZ256rmkz = 8642,
VPAVGBZ256rr = 8643,
VPAVGBZ256rrk = 8644,
VPAVGBZ256rrkz = 8645,
VPAVGBZrm = 8646,
VPAVGBZrmk = 8647,
VPAVGBZrmkz = 8648,
VPAVGBZrr = 8649,
VPAVGBZrrk = 8650,
VPAVGBZrrkz = 8651,
VPAVGBrm = 8652,
VPAVGBrr = 8653,
VPAVGWYrm = 8654,
VPAVGWYrr = 8655,
VPAVGWZ128rm = 8656,
VPAVGWZ128rmk = 8657,
VPAVGWZ128rmkz = 8658,
VPAVGWZ128rr = 8659,
VPAVGWZ128rrk = 8660,
VPAVGWZ128rrkz = 8661,
VPAVGWZ256rm = 8662,
VPAVGWZ256rmk = 8663,
VPAVGWZ256rmkz = 8664,
VPAVGWZ256rr = 8665,
VPAVGWZ256rrk = 8666,
VPAVGWZ256rrkz = 8667,
VPAVGWZrm = 8668,
VPAVGWZrmk = 8669,
VPAVGWZrmkz = 8670,
VPAVGWZrr = 8671,
VPAVGWZrrk = 8672,
VPAVGWZrrkz = 8673,
VPAVGWrm = 8674,
VPAVGWrr = 8675,
VPBLENDDYrmi = 8676,
VPBLENDDYrri = 8677,
VPBLENDDrmi = 8678,
VPBLENDDrri = 8679,
VPBLENDMBZ128rm = 8680,
VPBLENDMBZ128rmk = 8681,
VPBLENDMBZ128rmkz = 8682,
VPBLENDMBZ128rr = 8683,
VPBLENDMBZ128rrk = 8684,
VPBLENDMBZ128rrkz = 8685,
VPBLENDMBZ256rm = 8686,
VPBLENDMBZ256rmk = 8687,
VPBLENDMBZ256rmkz = 8688,
VPBLENDMBZ256rr = 8689,
VPBLENDMBZ256rrk = 8690,
VPBLENDMBZ256rrkz = 8691,
VPBLENDMBZrm = 8692,
VPBLENDMBZrmk = 8693,
VPBLENDMBZrmkz = 8694,
VPBLENDMBZrr = 8695,
VPBLENDMBZrrk = 8696,
VPBLENDMBZrrkz = 8697,
VPBLENDMDZ128rm = 8698,
VPBLENDMDZ128rmb = 8699,
VPBLENDMDZ128rmbk = 8700,
VPBLENDMDZ128rmk = 8701,
VPBLENDMDZ128rmkz = 8702,
VPBLENDMDZ128rr = 8703,
VPBLENDMDZ128rrk = 8704,
VPBLENDMDZ128rrkz = 8705,
VPBLENDMDZ256rm = 8706,
VPBLENDMDZ256rmb = 8707,
VPBLENDMDZ256rmbk = 8708,
VPBLENDMDZ256rmk = 8709,
VPBLENDMDZ256rmkz = 8710,
VPBLENDMDZ256rr = 8711,
VPBLENDMDZ256rrk = 8712,
VPBLENDMDZ256rrkz = 8713,
VPBLENDMDZrm = 8714,
VPBLENDMDZrmb = 8715,
VPBLENDMDZrmbk = 8716,
VPBLENDMDZrmk = 8717,
VPBLENDMDZrmkz = 8718,
VPBLENDMDZrr = 8719,
VPBLENDMDZrrk = 8720,
VPBLENDMDZrrkz = 8721,
VPBLENDMQZ128rm = 8722,
VPBLENDMQZ128rmb = 8723,
VPBLENDMQZ128rmbk = 8724,
VPBLENDMQZ128rmk = 8725,
VPBLENDMQZ128rmkz = 8726,
VPBLENDMQZ128rr = 8727,
VPBLENDMQZ128rrk = 8728,
VPBLENDMQZ128rrkz = 8729,
VPBLENDMQZ256rm = 8730,
VPBLENDMQZ256rmb = 8731,
VPBLENDMQZ256rmbk = 8732,
VPBLENDMQZ256rmk = 8733,
VPBLENDMQZ256rmkz = 8734,
VPBLENDMQZ256rr = 8735,
VPBLENDMQZ256rrk = 8736,
VPBLENDMQZ256rrkz = 8737,
VPBLENDMQZrm = 8738,
VPBLENDMQZrmb = 8739,
VPBLENDMQZrmbk = 8740,
VPBLENDMQZrmk = 8741,
VPBLENDMQZrmkz = 8742,
VPBLENDMQZrr = 8743,
VPBLENDMQZrrk = 8744,
VPBLENDMQZrrkz = 8745,
VPBLENDMWZ128rm = 8746,
VPBLENDMWZ128rmk = 8747,
VPBLENDMWZ128rmkz = 8748,
VPBLENDMWZ128rr = 8749,
VPBLENDMWZ128rrk = 8750,
VPBLENDMWZ128rrkz = 8751,
VPBLENDMWZ256rm = 8752,
VPBLENDMWZ256rmk = 8753,
VPBLENDMWZ256rmkz = 8754,
VPBLENDMWZ256rr = 8755,
VPBLENDMWZ256rrk = 8756,
VPBLENDMWZ256rrkz = 8757,
VPBLENDMWZrm = 8758,
VPBLENDMWZrmk = 8759,
VPBLENDMWZrmkz = 8760,
VPBLENDMWZrr = 8761,
VPBLENDMWZrrk = 8762,
VPBLENDMWZrrkz = 8763,
VPBLENDVBYrm = 8764,
VPBLENDVBYrr = 8765,
VPBLENDVBrm = 8766,
VPBLENDVBrr = 8767,
VPBLENDWYrmi = 8768,
VPBLENDWYrri = 8769,
VPBLENDWrmi = 8770,
VPBLENDWrri = 8771,
VPBROADCASTBYrm = 8772,
VPBROADCASTBYrr = 8773,
VPBROADCASTBZ128m = 8774,
VPBROADCASTBZ128mk = 8775,
VPBROADCASTBZ128mkz = 8776,
VPBROADCASTBZ128r = 8777,
VPBROADCASTBZ128rk = 8778,
VPBROADCASTBZ128rkz = 8779,
VPBROADCASTBZ256m = 8780,
VPBROADCASTBZ256mk = 8781,
VPBROADCASTBZ256mkz = 8782,
VPBROADCASTBZ256r = 8783,
VPBROADCASTBZ256rk = 8784,
VPBROADCASTBZ256rkz = 8785,
VPBROADCASTBZm = 8786,
VPBROADCASTBZmk = 8787,
VPBROADCASTBZmkz = 8788,
VPBROADCASTBZr = 8789,
VPBROADCASTBZrk = 8790,
VPBROADCASTBZrkz = 8791,
VPBROADCASTBrZ128r = 8792,
VPBROADCASTBrZ128rk = 8793,
VPBROADCASTBrZ128rkz = 8794,
VPBROADCASTBrZ256r = 8795,
VPBROADCASTBrZ256rk = 8796,
VPBROADCASTBrZ256rkz = 8797,
VPBROADCASTBrZr = 8798,
VPBROADCASTBrZrk = 8799,
VPBROADCASTBrZrkz = 8800,
VPBROADCASTBrm = 8801,
VPBROADCASTBrr = 8802,
VPBROADCASTDYrm = 8803,
VPBROADCASTDYrr = 8804,
VPBROADCASTDZ128m = 8805,
VPBROADCASTDZ128mk = 8806,
VPBROADCASTDZ128mkz = 8807,
VPBROADCASTDZ128r = 8808,
VPBROADCASTDZ128rk = 8809,
VPBROADCASTDZ128rkz = 8810,
VPBROADCASTDZ256m = 8811,
VPBROADCASTDZ256mk = 8812,
VPBROADCASTDZ256mkz = 8813,
VPBROADCASTDZ256r = 8814,
VPBROADCASTDZ256rk = 8815,
VPBROADCASTDZ256rkz = 8816,
VPBROADCASTDZm = 8817,
VPBROADCASTDZmk = 8818,
VPBROADCASTDZmkz = 8819,
VPBROADCASTDZr = 8820,
VPBROADCASTDZrk = 8821,
VPBROADCASTDZrkz = 8822,
VPBROADCASTDrZ128r = 8823,
VPBROADCASTDrZ128rk = 8824,
VPBROADCASTDrZ128rkz = 8825,
VPBROADCASTDrZ256r = 8826,
VPBROADCASTDrZ256rk = 8827,
VPBROADCASTDrZ256rkz = 8828,
VPBROADCASTDrZr = 8829,
VPBROADCASTDrZrk = 8830,
VPBROADCASTDrZrkz = 8831,
VPBROADCASTDrm = 8832,
VPBROADCASTDrr = 8833,
VPBROADCASTF32X2Z256m = 8834,
VPBROADCASTF32X2Z256mk = 8835,
VPBROADCASTF32X2Z256mkz = 8836,
VPBROADCASTF32X2Z256r = 8837,
VPBROADCASTF32X2Z256rk = 8838,
VPBROADCASTF32X2Z256rkz = 8839,
VPBROADCASTF32X2Zm = 8840,
VPBROADCASTF32X2Zmk = 8841,
VPBROADCASTF32X2Zmkz = 8842,
VPBROADCASTF32X2Zr = 8843,
VPBROADCASTF32X2Zrk = 8844,
VPBROADCASTF32X2Zrkz = 8845,
VPBROADCASTI32X2Z128m = 8846,
VPBROADCASTI32X2Z128mk = 8847,
VPBROADCASTI32X2Z128mkz = 8848,
VPBROADCASTI32X2Z128r = 8849,
VPBROADCASTI32X2Z128rk = 8850,
VPBROADCASTI32X2Z128rkz = 8851,
VPBROADCASTI32X2Z256m = 8852,
VPBROADCASTI32X2Z256mk = 8853,
VPBROADCASTI32X2Z256mkz = 8854,
VPBROADCASTI32X2Z256r = 8855,
VPBROADCASTI32X2Z256rk = 8856,
VPBROADCASTI32X2Z256rkz = 8857,
VPBROADCASTI32X2Zm = 8858,
VPBROADCASTI32X2Zmk = 8859,
VPBROADCASTI32X2Zmkz = 8860,
VPBROADCASTI32X2Zr = 8861,
VPBROADCASTI32X2Zrk = 8862,
VPBROADCASTI32X2Zrkz = 8863,
VPBROADCASTMB2QZ128rr = 8864,
VPBROADCASTMB2QZ256rr = 8865,
VPBROADCASTMB2QZrr = 8866,
VPBROADCASTMW2DZ128rr = 8867,
VPBROADCASTMW2DZ256rr = 8868,
VPBROADCASTMW2DZrr = 8869,
VPBROADCASTQYrm = 8870,
VPBROADCASTQYrr = 8871,
VPBROADCASTQZ128m = 8872,
VPBROADCASTQZ128mk = 8873,
VPBROADCASTQZ128mkz = 8874,
VPBROADCASTQZ128r = 8875,
VPBROADCASTQZ128rk = 8876,
VPBROADCASTQZ128rkz = 8877,
VPBROADCASTQZ256m = 8878,
VPBROADCASTQZ256mk = 8879,
VPBROADCASTQZ256mkz = 8880,
VPBROADCASTQZ256r = 8881,
VPBROADCASTQZ256rk = 8882,
VPBROADCASTQZ256rkz = 8883,
VPBROADCASTQZm = 8884,
VPBROADCASTQZmk = 8885,
VPBROADCASTQZmkz = 8886,
VPBROADCASTQZr = 8887,
VPBROADCASTQZrk = 8888,
VPBROADCASTQZrkz = 8889,
VPBROADCASTQrZ128r = 8890,
VPBROADCASTQrZ128rk = 8891,
VPBROADCASTQrZ128rkz = 8892,
VPBROADCASTQrZ256r = 8893,
VPBROADCASTQrZ256rk = 8894,
VPBROADCASTQrZ256rkz = 8895,
VPBROADCASTQrZr = 8896,
VPBROADCASTQrZrk = 8897,
VPBROADCASTQrZrkz = 8898,
VPBROADCASTQrm = 8899,
VPBROADCASTQrr = 8900,
VPBROADCASTWYrm = 8901,
VPBROADCASTWYrr = 8902,
VPBROADCASTWZ128m = 8903,
VPBROADCASTWZ128mk = 8904,
VPBROADCASTWZ128mkz = 8905,
VPBROADCASTWZ128r = 8906,
VPBROADCASTWZ128rk = 8907,
VPBROADCASTWZ128rkz = 8908,
VPBROADCASTWZ256m = 8909,
VPBROADCASTWZ256mk = 8910,
VPBROADCASTWZ256mkz = 8911,
VPBROADCASTWZ256r = 8912,
VPBROADCASTWZ256rk = 8913,
VPBROADCASTWZ256rkz = 8914,
VPBROADCASTWZm = 8915,
VPBROADCASTWZmk = 8916,
VPBROADCASTWZmkz = 8917,
VPBROADCASTWZr = 8918,
VPBROADCASTWZrk = 8919,
VPBROADCASTWZrkz = 8920,
VPBROADCASTWrZ128r = 8921,
VPBROADCASTWrZ128rk = 8922,
VPBROADCASTWrZ128rkz = 8923,
VPBROADCASTWrZ256r = 8924,
VPBROADCASTWrZ256rk = 8925,
VPBROADCASTWrZ256rkz = 8926,
VPBROADCASTWrZr = 8927,
VPBROADCASTWrZrk = 8928,
VPBROADCASTWrZrkz = 8929,
VPBROADCASTWrm = 8930,
VPBROADCASTWrr = 8931,
VPCLMULQDQrm = 8932,
VPCLMULQDQrr = 8933,
VPCMOVmr = 8934,
VPCMOVmrY = 8935,
VPCMOVrm = 8936,
VPCMOVrmY = 8937,
VPCMOVrr = 8938,
VPCMOVrrY = 8939,
VPCMPBZ128rmi = 8940,
VPCMPBZ128rmi_alt = 8941,
VPCMPBZ128rmik = 8942,
VPCMPBZ128rmik_alt = 8943,
VPCMPBZ128rri = 8944,
VPCMPBZ128rri_alt = 8945,
VPCMPBZ128rrik = 8946,
VPCMPBZ128rrik_alt = 8947,
VPCMPBZ256rmi = 8948,
VPCMPBZ256rmi_alt = 8949,
VPCMPBZ256rmik = 8950,
VPCMPBZ256rmik_alt = 8951,
VPCMPBZ256rri = 8952,
VPCMPBZ256rri_alt = 8953,
VPCMPBZ256rrik = 8954,
VPCMPBZ256rrik_alt = 8955,
VPCMPBZrmi = 8956,
VPCMPBZrmi_alt = 8957,
VPCMPBZrmik = 8958,
VPCMPBZrmik_alt = 8959,
VPCMPBZrri = 8960,
VPCMPBZrri_alt = 8961,
VPCMPBZrrik = 8962,
VPCMPBZrrik_alt = 8963,
VPCMPDZ128rmi = 8964,
VPCMPDZ128rmi_alt = 8965,
VPCMPDZ128rmib = 8966,
VPCMPDZ128rmib_alt = 8967,
VPCMPDZ128rmibk = 8968,
VPCMPDZ128rmibk_alt = 8969,
VPCMPDZ128rmik = 8970,
VPCMPDZ128rmik_alt = 8971,
VPCMPDZ128rri = 8972,
VPCMPDZ128rri_alt = 8973,
VPCMPDZ128rrik = 8974,
VPCMPDZ128rrik_alt = 8975,
VPCMPDZ256rmi = 8976,
VPCMPDZ256rmi_alt = 8977,
VPCMPDZ256rmib = 8978,
VPCMPDZ256rmib_alt = 8979,
VPCMPDZ256rmibk = 8980,
VPCMPDZ256rmibk_alt = 8981,
VPCMPDZ256rmik = 8982,
VPCMPDZ256rmik_alt = 8983,
VPCMPDZ256rri = 8984,
VPCMPDZ256rri_alt = 8985,
VPCMPDZ256rrik = 8986,
VPCMPDZ256rrik_alt = 8987,
VPCMPDZrmi = 8988,
VPCMPDZrmi_alt = 8989,
VPCMPDZrmib = 8990,
VPCMPDZrmib_alt = 8991,
VPCMPDZrmibk = 8992,
VPCMPDZrmibk_alt = 8993,
VPCMPDZrmik = 8994,
VPCMPDZrmik_alt = 8995,
VPCMPDZrri = 8996,
VPCMPDZrri_alt = 8997,
VPCMPDZrrik = 8998,
VPCMPDZrrik_alt = 8999,
VPCMPEQBYrm = 9000,
VPCMPEQBYrr = 9001,
VPCMPEQBZ128rm = 9002,
VPCMPEQBZ128rmk = 9003,
VPCMPEQBZ128rr = 9004,
VPCMPEQBZ128rrk = 9005,
VPCMPEQBZ256rm = 9006,
VPCMPEQBZ256rmk = 9007,
VPCMPEQBZ256rr = 9008,
VPCMPEQBZ256rrk = 9009,
VPCMPEQBZrm = 9010,
VPCMPEQBZrmk = 9011,
VPCMPEQBZrr = 9012,
VPCMPEQBZrrk = 9013,
VPCMPEQBrm = 9014,
VPCMPEQBrr = 9015,
VPCMPEQDYrm = 9016,
VPCMPEQDYrr = 9017,
VPCMPEQDZ128rm = 9018,
VPCMPEQDZ128rmb = 9019,
VPCMPEQDZ128rmbk = 9020,
VPCMPEQDZ128rmk = 9021,
VPCMPEQDZ128rr = 9022,
VPCMPEQDZ128rrk = 9023,
VPCMPEQDZ256rm = 9024,
VPCMPEQDZ256rmb = 9025,
VPCMPEQDZ256rmbk = 9026,
VPCMPEQDZ256rmk = 9027,
VPCMPEQDZ256rr = 9028,
VPCMPEQDZ256rrk = 9029,
VPCMPEQDZrm = 9030,
VPCMPEQDZrmb = 9031,
VPCMPEQDZrmbk = 9032,
VPCMPEQDZrmk = 9033,
VPCMPEQDZrr = 9034,
VPCMPEQDZrrk = 9035,
VPCMPEQDrm = 9036,
VPCMPEQDrr = 9037,
VPCMPEQQYrm = 9038,
VPCMPEQQYrr = 9039,
VPCMPEQQZ128rm = 9040,
VPCMPEQQZ128rmb = 9041,
VPCMPEQQZ128rmbk = 9042,
VPCMPEQQZ128rmk = 9043,
VPCMPEQQZ128rr = 9044,
VPCMPEQQZ128rrk = 9045,
VPCMPEQQZ256rm = 9046,
VPCMPEQQZ256rmb = 9047,
VPCMPEQQZ256rmbk = 9048,
VPCMPEQQZ256rmk = 9049,
VPCMPEQQZ256rr = 9050,
VPCMPEQQZ256rrk = 9051,
VPCMPEQQZrm = 9052,
VPCMPEQQZrmb = 9053,
VPCMPEQQZrmbk = 9054,
VPCMPEQQZrmk = 9055,
VPCMPEQQZrr = 9056,
VPCMPEQQZrrk = 9057,
VPCMPEQQrm = 9058,
VPCMPEQQrr = 9059,
VPCMPEQWYrm = 9060,
VPCMPEQWYrr = 9061,
VPCMPEQWZ128rm = 9062,
VPCMPEQWZ128rmk = 9063,
VPCMPEQWZ128rr = 9064,
VPCMPEQWZ128rrk = 9065,
VPCMPEQWZ256rm = 9066,
VPCMPEQWZ256rmk = 9067,
VPCMPEQWZ256rr = 9068,
VPCMPEQWZ256rrk = 9069,
VPCMPEQWZrm = 9070,
VPCMPEQWZrmk = 9071,
VPCMPEQWZrr = 9072,
VPCMPEQWZrrk = 9073,
VPCMPEQWrm = 9074,
VPCMPEQWrr = 9075,
VPCMPESTRIMEM = 9076,
VPCMPESTRIREG = 9077,
VPCMPESTRIrm = 9078,
VPCMPESTRIrr = 9079,
VPCMPESTRM128MEM = 9080,
VPCMPESTRM128REG = 9081,
VPCMPESTRM128rm = 9082,
VPCMPESTRM128rr = 9083,
VPCMPGTBYrm = 9084,
VPCMPGTBYrr = 9085,
VPCMPGTBZ128rm = 9086,
VPCMPGTBZ128rmk = 9087,
VPCMPGTBZ128rr = 9088,
VPCMPGTBZ128rrk = 9089,
VPCMPGTBZ256rm = 9090,
VPCMPGTBZ256rmk = 9091,
VPCMPGTBZ256rr = 9092,
VPCMPGTBZ256rrk = 9093,
VPCMPGTBZrm = 9094,
VPCMPGTBZrmk = 9095,
VPCMPGTBZrr = 9096,
VPCMPGTBZrrk = 9097,
VPCMPGTBrm = 9098,
VPCMPGTBrr = 9099,
VPCMPGTDYrm = 9100,
VPCMPGTDYrr = 9101,
VPCMPGTDZ128rm = 9102,
VPCMPGTDZ128rmb = 9103,
VPCMPGTDZ128rmbk = 9104,
VPCMPGTDZ128rmk = 9105,
VPCMPGTDZ128rr = 9106,
VPCMPGTDZ128rrk = 9107,
VPCMPGTDZ256rm = 9108,
VPCMPGTDZ256rmb = 9109,
VPCMPGTDZ256rmbk = 9110,
VPCMPGTDZ256rmk = 9111,
VPCMPGTDZ256rr = 9112,
VPCMPGTDZ256rrk = 9113,
VPCMPGTDZrm = 9114,
VPCMPGTDZrmb = 9115,
VPCMPGTDZrmbk = 9116,
VPCMPGTDZrmk = 9117,
VPCMPGTDZrr = 9118,
VPCMPGTDZrrk = 9119,
VPCMPGTDrm = 9120,
VPCMPGTDrr = 9121,
VPCMPGTQYrm = 9122,
VPCMPGTQYrr = 9123,
VPCMPGTQZ128rm = 9124,
VPCMPGTQZ128rmb = 9125,
VPCMPGTQZ128rmbk = 9126,
VPCMPGTQZ128rmk = 9127,
VPCMPGTQZ128rr = 9128,
VPCMPGTQZ128rrk = 9129,
VPCMPGTQZ256rm = 9130,
VPCMPGTQZ256rmb = 9131,
VPCMPGTQZ256rmbk = 9132,
VPCMPGTQZ256rmk = 9133,
VPCMPGTQZ256rr = 9134,
VPCMPGTQZ256rrk = 9135,
VPCMPGTQZrm = 9136,
VPCMPGTQZrmb = 9137,
VPCMPGTQZrmbk = 9138,
VPCMPGTQZrmk = 9139,
VPCMPGTQZrr = 9140,
VPCMPGTQZrrk = 9141,
VPCMPGTQrm = 9142,
VPCMPGTQrr = 9143,
VPCMPGTWYrm = 9144,
VPCMPGTWYrr = 9145,
VPCMPGTWZ128rm = 9146,
VPCMPGTWZ128rmk = 9147,
VPCMPGTWZ128rr = 9148,
VPCMPGTWZ128rrk = 9149,
VPCMPGTWZ256rm = 9150,
VPCMPGTWZ256rmk = 9151,
VPCMPGTWZ256rr = 9152,
VPCMPGTWZ256rrk = 9153,
VPCMPGTWZrm = 9154,
VPCMPGTWZrmk = 9155,
VPCMPGTWZrr = 9156,
VPCMPGTWZrrk = 9157,
VPCMPGTWrm = 9158,
VPCMPGTWrr = 9159,
VPCMPISTRIMEM = 9160,
VPCMPISTRIREG = 9161,
VPCMPISTRIrm = 9162,
VPCMPISTRIrr = 9163,
VPCMPISTRM128MEM = 9164,
VPCMPISTRM128REG = 9165,
VPCMPISTRM128rm = 9166,
VPCMPISTRM128rr = 9167,
VPCMPQZ128rmi = 9168,
VPCMPQZ128rmi_alt = 9169,
VPCMPQZ128rmib = 9170,
VPCMPQZ128rmib_alt = 9171,
VPCMPQZ128rmibk = 9172,
VPCMPQZ128rmibk_alt = 9173,
VPCMPQZ128rmik = 9174,
VPCMPQZ128rmik_alt = 9175,
VPCMPQZ128rri = 9176,
VPCMPQZ128rri_alt = 9177,
VPCMPQZ128rrik = 9178,
VPCMPQZ128rrik_alt = 9179,
VPCMPQZ256rmi = 9180,
VPCMPQZ256rmi_alt = 9181,
VPCMPQZ256rmib = 9182,
VPCMPQZ256rmib_alt = 9183,
VPCMPQZ256rmibk = 9184,
VPCMPQZ256rmibk_alt = 9185,
VPCMPQZ256rmik = 9186,
VPCMPQZ256rmik_alt = 9187,
VPCMPQZ256rri = 9188,
VPCMPQZ256rri_alt = 9189,
VPCMPQZ256rrik = 9190,
VPCMPQZ256rrik_alt = 9191,
VPCMPQZrmi = 9192,
VPCMPQZrmi_alt = 9193,
VPCMPQZrmib = 9194,
VPCMPQZrmib_alt = 9195,
VPCMPQZrmibk = 9196,
VPCMPQZrmibk_alt = 9197,
VPCMPQZrmik = 9198,
VPCMPQZrmik_alt = 9199,
VPCMPQZrri = 9200,
VPCMPQZrri_alt = 9201,
VPCMPQZrrik = 9202,
VPCMPQZrrik_alt = 9203,
VPCMPUBZ128rmi = 9204,
VPCMPUBZ128rmi_alt = 9205,
VPCMPUBZ128rmik = 9206,
VPCMPUBZ128rmik_alt = 9207,
VPCMPUBZ128rri = 9208,
VPCMPUBZ128rri_alt = 9209,
VPCMPUBZ128rrik = 9210,
VPCMPUBZ128rrik_alt = 9211,
VPCMPUBZ256rmi = 9212,
VPCMPUBZ256rmi_alt = 9213,
VPCMPUBZ256rmik = 9214,
VPCMPUBZ256rmik_alt = 9215,
VPCMPUBZ256rri = 9216,
VPCMPUBZ256rri_alt = 9217,
VPCMPUBZ256rrik = 9218,
VPCMPUBZ256rrik_alt = 9219,
VPCMPUBZrmi = 9220,
VPCMPUBZrmi_alt = 9221,
VPCMPUBZrmik = 9222,
VPCMPUBZrmik_alt = 9223,
VPCMPUBZrri = 9224,
VPCMPUBZrri_alt = 9225,
VPCMPUBZrrik = 9226,
VPCMPUBZrrik_alt = 9227,
VPCMPUDZ128rmi = 9228,
VPCMPUDZ128rmi_alt = 9229,
VPCMPUDZ128rmib = 9230,
VPCMPUDZ128rmib_alt = 9231,
VPCMPUDZ128rmibk = 9232,
VPCMPUDZ128rmibk_alt = 9233,
VPCMPUDZ128rmik = 9234,
VPCMPUDZ128rmik_alt = 9235,
VPCMPUDZ128rri = 9236,
VPCMPUDZ128rri_alt = 9237,
VPCMPUDZ128rrik = 9238,
VPCMPUDZ128rrik_alt = 9239,
VPCMPUDZ256rmi = 9240,
VPCMPUDZ256rmi_alt = 9241,
VPCMPUDZ256rmib = 9242,
VPCMPUDZ256rmib_alt = 9243,
VPCMPUDZ256rmibk = 9244,
VPCMPUDZ256rmibk_alt = 9245,
VPCMPUDZ256rmik = 9246,
VPCMPUDZ256rmik_alt = 9247,
VPCMPUDZ256rri = 9248,
VPCMPUDZ256rri_alt = 9249,
VPCMPUDZ256rrik = 9250,
VPCMPUDZ256rrik_alt = 9251,
VPCMPUDZrmi = 9252,
VPCMPUDZrmi_alt = 9253,
VPCMPUDZrmib = 9254,
VPCMPUDZrmib_alt = 9255,
VPCMPUDZrmibk = 9256,
VPCMPUDZrmibk_alt = 9257,
VPCMPUDZrmik = 9258,
VPCMPUDZrmik_alt = 9259,
VPCMPUDZrri = 9260,
VPCMPUDZrri_alt = 9261,
VPCMPUDZrrik = 9262,
VPCMPUDZrrik_alt = 9263,
VPCMPUQZ128rmi = 9264,
VPCMPUQZ128rmi_alt = 9265,
VPCMPUQZ128rmib = 9266,
VPCMPUQZ128rmib_alt = 9267,
VPCMPUQZ128rmibk = 9268,
VPCMPUQZ128rmibk_alt = 9269,
VPCMPUQZ128rmik = 9270,
VPCMPUQZ128rmik_alt = 9271,
VPCMPUQZ128rri = 9272,
VPCMPUQZ128rri_alt = 9273,
VPCMPUQZ128rrik = 9274,
VPCMPUQZ128rrik_alt = 9275,
VPCMPUQZ256rmi = 9276,
VPCMPUQZ256rmi_alt = 9277,
VPCMPUQZ256rmib = 9278,
VPCMPUQZ256rmib_alt = 9279,
VPCMPUQZ256rmibk = 9280,
VPCMPUQZ256rmibk_alt = 9281,
VPCMPUQZ256rmik = 9282,
VPCMPUQZ256rmik_alt = 9283,
VPCMPUQZ256rri = 9284,
VPCMPUQZ256rri_alt = 9285,
VPCMPUQZ256rrik = 9286,
VPCMPUQZ256rrik_alt = 9287,
VPCMPUQZrmi = 9288,
VPCMPUQZrmi_alt = 9289,
VPCMPUQZrmib = 9290,
VPCMPUQZrmib_alt = 9291,
VPCMPUQZrmibk = 9292,
VPCMPUQZrmibk_alt = 9293,
VPCMPUQZrmik = 9294,
VPCMPUQZrmik_alt = 9295,
VPCMPUQZrri = 9296,
VPCMPUQZrri_alt = 9297,
VPCMPUQZrrik = 9298,
VPCMPUQZrrik_alt = 9299,
VPCMPUWZ128rmi = 9300,
VPCMPUWZ128rmi_alt = 9301,
VPCMPUWZ128rmik = 9302,
VPCMPUWZ128rmik_alt = 9303,
VPCMPUWZ128rri = 9304,
VPCMPUWZ128rri_alt = 9305,
VPCMPUWZ128rrik = 9306,
VPCMPUWZ128rrik_alt = 9307,
VPCMPUWZ256rmi = 9308,
VPCMPUWZ256rmi_alt = 9309,
VPCMPUWZ256rmik = 9310,
VPCMPUWZ256rmik_alt = 9311,
VPCMPUWZ256rri = 9312,
VPCMPUWZ256rri_alt = 9313,
VPCMPUWZ256rrik = 9314,
VPCMPUWZ256rrik_alt = 9315,
VPCMPUWZrmi = 9316,
VPCMPUWZrmi_alt = 9317,
VPCMPUWZrmik = 9318,
VPCMPUWZrmik_alt = 9319,
VPCMPUWZrri = 9320,
VPCMPUWZrri_alt = 9321,
VPCMPUWZrrik = 9322,
VPCMPUWZrrik_alt = 9323,
VPCMPWZ128rmi = 9324,
VPCMPWZ128rmi_alt = 9325,
VPCMPWZ128rmik = 9326,
VPCMPWZ128rmik_alt = 9327,
VPCMPWZ128rri = 9328,
VPCMPWZ128rri_alt = 9329,
VPCMPWZ128rrik = 9330,
VPCMPWZ128rrik_alt = 9331,
VPCMPWZ256rmi = 9332,
VPCMPWZ256rmi_alt = 9333,
VPCMPWZ256rmik = 9334,
VPCMPWZ256rmik_alt = 9335,
VPCMPWZ256rri = 9336,
VPCMPWZ256rri_alt = 9337,
VPCMPWZ256rrik = 9338,
VPCMPWZ256rrik_alt = 9339,
VPCMPWZrmi = 9340,
VPCMPWZrmi_alt = 9341,
VPCMPWZrmik = 9342,
VPCMPWZrmik_alt = 9343,
VPCMPWZrri = 9344,
VPCMPWZrri_alt = 9345,
VPCMPWZrrik = 9346,
VPCMPWZrrik_alt = 9347,
VPCOMBmi = 9348,
VPCOMBmi_alt = 9349,
VPCOMBri = 9350,
VPCOMBri_alt = 9351,
VPCOMDmi = 9352,
VPCOMDmi_alt = 9353,
VPCOMDri = 9354,
VPCOMDri_alt = 9355,
VPCOMPRESSDZ128mr = 9356,
VPCOMPRESSDZ128mrk = 9357,
VPCOMPRESSDZ128rr = 9358,
VPCOMPRESSDZ128rrk = 9359,
VPCOMPRESSDZ128rrkz = 9360,
VPCOMPRESSDZ256mr = 9361,
VPCOMPRESSDZ256mrk = 9362,
VPCOMPRESSDZ256rr = 9363,
VPCOMPRESSDZ256rrk = 9364,
VPCOMPRESSDZ256rrkz = 9365,
VPCOMPRESSDZmr = 9366,
VPCOMPRESSDZmrk = 9367,
VPCOMPRESSDZrr = 9368,
VPCOMPRESSDZrrk = 9369,
VPCOMPRESSDZrrkz = 9370,
VPCOMPRESSQZ128mr = 9371,
VPCOMPRESSQZ128mrk = 9372,
VPCOMPRESSQZ128rr = 9373,
VPCOMPRESSQZ128rrk = 9374,
VPCOMPRESSQZ128rrkz = 9375,
VPCOMPRESSQZ256mr = 9376,
VPCOMPRESSQZ256mrk = 9377,
VPCOMPRESSQZ256rr = 9378,
VPCOMPRESSQZ256rrk = 9379,
VPCOMPRESSQZ256rrkz = 9380,
VPCOMPRESSQZmr = 9381,
VPCOMPRESSQZmrk = 9382,
VPCOMPRESSQZrr = 9383,
VPCOMPRESSQZrrk = 9384,
VPCOMPRESSQZrrkz = 9385,
VPCOMQmi = 9386,
VPCOMQmi_alt = 9387,
VPCOMQri = 9388,
VPCOMQri_alt = 9389,
VPCOMUBmi = 9390,
VPCOMUBmi_alt = 9391,
VPCOMUBri = 9392,
VPCOMUBri_alt = 9393,
VPCOMUDmi = 9394,
VPCOMUDmi_alt = 9395,
VPCOMUDri = 9396,
VPCOMUDri_alt = 9397,
VPCOMUQmi = 9398,
VPCOMUQmi_alt = 9399,
VPCOMUQri = 9400,
VPCOMUQri_alt = 9401,
VPCOMUWmi = 9402,
VPCOMUWmi_alt = 9403,
VPCOMUWri = 9404,
VPCOMUWri_alt = 9405,
VPCOMWmi = 9406,
VPCOMWmi_alt = 9407,
VPCOMWri = 9408,
VPCOMWri_alt = 9409,
VPCONFLICTDZ128rm = 9410,
VPCONFLICTDZ128rmb = 9411,
VPCONFLICTDZ128rmbk = 9412,
VPCONFLICTDZ128rmbkz = 9413,
VPCONFLICTDZ128rmk = 9414,
VPCONFLICTDZ128rmkz = 9415,
VPCONFLICTDZ128rr = 9416,
VPCONFLICTDZ128rrk = 9417,
VPCONFLICTDZ128rrkz = 9418,
VPCONFLICTDZ256rm = 9419,
VPCONFLICTDZ256rmb = 9420,
VPCONFLICTDZ256rmbk = 9421,
VPCONFLICTDZ256rmbkz = 9422,
VPCONFLICTDZ256rmk = 9423,
VPCONFLICTDZ256rmkz = 9424,
VPCONFLICTDZ256rr = 9425,
VPCONFLICTDZ256rrk = 9426,
VPCONFLICTDZ256rrkz = 9427,
VPCONFLICTDZrm = 9428,
VPCONFLICTDZrmb = 9429,
VPCONFLICTDZrmbk = 9430,
VPCONFLICTDZrmbkz = 9431,
VPCONFLICTDZrmk = 9432,
VPCONFLICTDZrmkz = 9433,
VPCONFLICTDZrr = 9434,
VPCONFLICTDZrrk = 9435,
VPCONFLICTDZrrkz = 9436,
VPCONFLICTQZ128rm = 9437,
VPCONFLICTQZ128rmb = 9438,
VPCONFLICTQZ128rmbk = 9439,
VPCONFLICTQZ128rmbkz = 9440,
VPCONFLICTQZ128rmk = 9441,
VPCONFLICTQZ128rmkz = 9442,
VPCONFLICTQZ128rr = 9443,
VPCONFLICTQZ128rrk = 9444,
VPCONFLICTQZ128rrkz = 9445,
VPCONFLICTQZ256rm = 9446,
VPCONFLICTQZ256rmb = 9447,
VPCONFLICTQZ256rmbk = 9448,
VPCONFLICTQZ256rmbkz = 9449,
VPCONFLICTQZ256rmk = 9450,
VPCONFLICTQZ256rmkz = 9451,
VPCONFLICTQZ256rr = 9452,
VPCONFLICTQZ256rrk = 9453,
VPCONFLICTQZ256rrkz = 9454,
VPCONFLICTQZrm = 9455,
VPCONFLICTQZrmb = 9456,
VPCONFLICTQZrmbk = 9457,
VPCONFLICTQZrmbkz = 9458,
VPCONFLICTQZrmk = 9459,
VPCONFLICTQZrmkz = 9460,
VPCONFLICTQZrr = 9461,
VPCONFLICTQZrrk = 9462,
VPCONFLICTQZrrkz = 9463,
VPERM2F128rm = 9464,
VPERM2F128rr = 9465,
VPERM2I128rm = 9466,
VPERM2I128rr = 9467,
VPERMBZ128rm = 9468,
VPERMBZ128rmk = 9469,
VPERMBZ128rmkz = 9470,
VPERMBZ128rr = 9471,
VPERMBZ128rrk = 9472,
VPERMBZ128rrkz = 9473,
VPERMBZ256rm = 9474,
VPERMBZ256rmk = 9475,
VPERMBZ256rmkz = 9476,
VPERMBZ256rr = 9477,
VPERMBZ256rrk = 9478,
VPERMBZ256rrkz = 9479,
VPERMBZrm = 9480,
VPERMBZrmk = 9481,
VPERMBZrmkz = 9482,
VPERMBZrr = 9483,
VPERMBZrrk = 9484,
VPERMBZrrkz = 9485,
VPERMDYrm = 9486,
VPERMDYrr = 9487,
VPERMDZ256rm = 9488,
VPERMDZ256rmb = 9489,
VPERMDZ256rmbk = 9490,
VPERMDZ256rmbkz = 9491,
VPERMDZ256rmk = 9492,
VPERMDZ256rmkz = 9493,
VPERMDZ256rr = 9494,
VPERMDZ256rrk = 9495,
VPERMDZ256rrkz = 9496,
VPERMDZrm = 9497,
VPERMDZrmb = 9498,
VPERMDZrmbk = 9499,
VPERMDZrmbkz = 9500,
VPERMDZrmk = 9501,
VPERMDZrmkz = 9502,
VPERMDZrr = 9503,
VPERMDZrrk = 9504,
VPERMDZrrkz = 9505,
VPERMI2B128rm = 9506,
VPERMI2B128rmk = 9507,
VPERMI2B128rmkz = 9508,
VPERMI2B128rr = 9509,
VPERMI2B128rrk = 9510,
VPERMI2B128rrkz = 9511,
VPERMI2B256rm = 9512,
VPERMI2B256rmk = 9513,
VPERMI2B256rmkz = 9514,
VPERMI2B256rr = 9515,
VPERMI2B256rrk = 9516,
VPERMI2B256rrkz = 9517,
VPERMI2Brm = 9518,
VPERMI2Brmk = 9519,
VPERMI2Brmkz = 9520,
VPERMI2Brr = 9521,
VPERMI2Brrk = 9522,
VPERMI2Brrkz = 9523,
VPERMI2D128rm = 9524,
VPERMI2D128rmb = 9525,
VPERMI2D128rmbk = 9526,
VPERMI2D128rmbkz = 9527,
VPERMI2D128rmk = 9528,
VPERMI2D128rmkz = 9529,
VPERMI2D128rr = 9530,
VPERMI2D128rrk = 9531,
VPERMI2D128rrkz = 9532,
VPERMI2D256rm = 9533,
VPERMI2D256rmb = 9534,
VPERMI2D256rmbk = 9535,
VPERMI2D256rmbkz = 9536,
VPERMI2D256rmk = 9537,
VPERMI2D256rmkz = 9538,
VPERMI2D256rr = 9539,
VPERMI2D256rrk = 9540,
VPERMI2D256rrkz = 9541,
VPERMI2Drm = 9542,
VPERMI2Drmb = 9543,
VPERMI2Drmbk = 9544,
VPERMI2Drmbkz = 9545,
VPERMI2Drmk = 9546,
VPERMI2Drmkz = 9547,
VPERMI2Drr = 9548,
VPERMI2Drrk = 9549,
VPERMI2Drrkz = 9550,
VPERMI2PD128rm = 9551,
VPERMI2PD128rmb = 9552,
VPERMI2PD128rmbk = 9553,
VPERMI2PD128rmbkz = 9554,
VPERMI2PD128rmk = 9555,
VPERMI2PD128rmkz = 9556,
VPERMI2PD128rr = 9557,
VPERMI2PD128rrk = 9558,
VPERMI2PD128rrkz = 9559,
VPERMI2PD256rm = 9560,
VPERMI2PD256rmb = 9561,
VPERMI2PD256rmbk = 9562,
VPERMI2PD256rmbkz = 9563,
VPERMI2PD256rmk = 9564,
VPERMI2PD256rmkz = 9565,
VPERMI2PD256rr = 9566,
VPERMI2PD256rrk = 9567,
VPERMI2PD256rrkz = 9568,
VPERMI2PDrm = 9569,
VPERMI2PDrmb = 9570,
VPERMI2PDrmbk = 9571,
VPERMI2PDrmbkz = 9572,
VPERMI2PDrmk = 9573,
VPERMI2PDrmkz = 9574,
VPERMI2PDrr = 9575,
VPERMI2PDrrk = 9576,
VPERMI2PDrrkz = 9577,
VPERMI2PS128rm = 9578,
VPERMI2PS128rmb = 9579,
VPERMI2PS128rmbk = 9580,
VPERMI2PS128rmbkz = 9581,
VPERMI2PS128rmk = 9582,
VPERMI2PS128rmkz = 9583,
VPERMI2PS128rr = 9584,
VPERMI2PS128rrk = 9585,
VPERMI2PS128rrkz = 9586,
VPERMI2PS256rm = 9587,
VPERMI2PS256rmb = 9588,
VPERMI2PS256rmbk = 9589,
VPERMI2PS256rmbkz = 9590,
VPERMI2PS256rmk = 9591,
VPERMI2PS256rmkz = 9592,
VPERMI2PS256rr = 9593,
VPERMI2PS256rrk = 9594,
VPERMI2PS256rrkz = 9595,
VPERMI2PSrm = 9596,
VPERMI2PSrmb = 9597,
VPERMI2PSrmbk = 9598,
VPERMI2PSrmbkz = 9599,
VPERMI2PSrmk = 9600,
VPERMI2PSrmkz = 9601,
VPERMI2PSrr = 9602,
VPERMI2PSrrk = 9603,
VPERMI2PSrrkz = 9604,
VPERMI2Q128rm = 9605,
VPERMI2Q128rmb = 9606,
VPERMI2Q128rmbk = 9607,
VPERMI2Q128rmbkz = 9608,
VPERMI2Q128rmk = 9609,
VPERMI2Q128rmkz = 9610,
VPERMI2Q128rr = 9611,
VPERMI2Q128rrk = 9612,
VPERMI2Q128rrkz = 9613,
VPERMI2Q256rm = 9614,
VPERMI2Q256rmb = 9615,
VPERMI2Q256rmbk = 9616,
VPERMI2Q256rmbkz = 9617,
VPERMI2Q256rmk = 9618,
VPERMI2Q256rmkz = 9619,
VPERMI2Q256rr = 9620,
VPERMI2Q256rrk = 9621,
VPERMI2Q256rrkz = 9622,
VPERMI2Qrm = 9623,
VPERMI2Qrmb = 9624,
VPERMI2Qrmbk = 9625,
VPERMI2Qrmbkz = 9626,
VPERMI2Qrmk = 9627,
VPERMI2Qrmkz = 9628,
VPERMI2Qrr = 9629,
VPERMI2Qrrk = 9630,
VPERMI2Qrrkz = 9631,
VPERMI2W128rm = 9632,
VPERMI2W128rmk = 9633,
VPERMI2W128rmkz = 9634,
VPERMI2W128rr = 9635,
VPERMI2W128rrk = 9636,
VPERMI2W128rrkz = 9637,
VPERMI2W256rm = 9638,
VPERMI2W256rmk = 9639,
VPERMI2W256rmkz = 9640,
VPERMI2W256rr = 9641,
VPERMI2W256rrk = 9642,
VPERMI2W256rrkz = 9643,
VPERMI2Wrm = 9644,
VPERMI2Wrmk = 9645,
VPERMI2Wrmkz = 9646,
VPERMI2Wrr = 9647,
VPERMI2Wrrk = 9648,
VPERMI2Wrrkz = 9649,
VPERMIL2PDmr = 9650,
VPERMIL2PDmrY = 9651,
VPERMIL2PDrm = 9652,
VPERMIL2PDrmY = 9653,
VPERMIL2PDrr = 9654,
VPERMIL2PDrrY = 9655,
VPERMIL2PSmr = 9656,
VPERMIL2PSmrY = 9657,
VPERMIL2PSrm = 9658,
VPERMIL2PSrmY = 9659,
VPERMIL2PSrr = 9660,
VPERMIL2PSrrY = 9661,
VPERMILPDYmi = 9662,
VPERMILPDYri = 9663,
VPERMILPDYrm = 9664,
VPERMILPDYrr = 9665,
VPERMILPDZ128mbi = 9666,
VPERMILPDZ128mbik = 9667,
VPERMILPDZ128mbikz = 9668,
VPERMILPDZ128mi = 9669,
VPERMILPDZ128mik = 9670,
VPERMILPDZ128mikz = 9671,
VPERMILPDZ128ri = 9672,
VPERMILPDZ128rik = 9673,
VPERMILPDZ128rikz = 9674,
VPERMILPDZ128rm = 9675,
VPERMILPDZ128rmb = 9676,
VPERMILPDZ128rmbk = 9677,
VPERMILPDZ128rmbkz = 9678,
VPERMILPDZ128rmk = 9679,
VPERMILPDZ128rmkz = 9680,
VPERMILPDZ128rr = 9681,
VPERMILPDZ128rrk = 9682,
VPERMILPDZ128rrkz = 9683,
VPERMILPDZ256mbi = 9684,
VPERMILPDZ256mbik = 9685,
VPERMILPDZ256mbikz = 9686,
VPERMILPDZ256mi = 9687,
VPERMILPDZ256mik = 9688,
VPERMILPDZ256mikz = 9689,
VPERMILPDZ256ri = 9690,
VPERMILPDZ256rik = 9691,
VPERMILPDZ256rikz = 9692,
VPERMILPDZ256rm = 9693,
VPERMILPDZ256rmb = 9694,
VPERMILPDZ256rmbk = 9695,
VPERMILPDZ256rmbkz = 9696,
VPERMILPDZ256rmk = 9697,
VPERMILPDZ256rmkz = 9698,
VPERMILPDZ256rr = 9699,
VPERMILPDZ256rrk = 9700,
VPERMILPDZ256rrkz = 9701,
VPERMILPDZmbi = 9702,
VPERMILPDZmbik = 9703,
VPERMILPDZmbikz = 9704,
VPERMILPDZmi = 9705,
VPERMILPDZmik = 9706,
VPERMILPDZmikz = 9707,
VPERMILPDZri = 9708,
VPERMILPDZrik = 9709,
VPERMILPDZrikz = 9710,
VPERMILPDZrm = 9711,
VPERMILPDZrmb = 9712,
VPERMILPDZrmbk = 9713,
VPERMILPDZrmbkz = 9714,
VPERMILPDZrmk = 9715,
VPERMILPDZrmkz = 9716,
VPERMILPDZrr = 9717,
VPERMILPDZrrk = 9718,
VPERMILPDZrrkz = 9719,
VPERMILPDmi = 9720,
VPERMILPDri = 9721,
VPERMILPDrm = 9722,
VPERMILPDrr = 9723,
VPERMILPSYmi = 9724,
VPERMILPSYri = 9725,
VPERMILPSYrm = 9726,
VPERMILPSYrr = 9727,
VPERMILPSZ128mbi = 9728,
VPERMILPSZ128mbik = 9729,
VPERMILPSZ128mbikz = 9730,
VPERMILPSZ128mi = 9731,
VPERMILPSZ128mik = 9732,
VPERMILPSZ128mikz = 9733,
VPERMILPSZ128ri = 9734,
VPERMILPSZ128rik = 9735,
VPERMILPSZ128rikz = 9736,
VPERMILPSZ128rm = 9737,
VPERMILPSZ128rmb = 9738,
VPERMILPSZ128rmbk = 9739,
VPERMILPSZ128rmbkz = 9740,
VPERMILPSZ128rmk = 9741,
VPERMILPSZ128rmkz = 9742,
VPERMILPSZ128rr = 9743,
VPERMILPSZ128rrk = 9744,
VPERMILPSZ128rrkz = 9745,
VPERMILPSZ256mbi = 9746,
VPERMILPSZ256mbik = 9747,
VPERMILPSZ256mbikz = 9748,
VPERMILPSZ256mi = 9749,
VPERMILPSZ256mik = 9750,
VPERMILPSZ256mikz = 9751,
VPERMILPSZ256ri = 9752,
VPERMILPSZ256rik = 9753,
VPERMILPSZ256rikz = 9754,
VPERMILPSZ256rm = 9755,
VPERMILPSZ256rmb = 9756,
VPERMILPSZ256rmbk = 9757,
VPERMILPSZ256rmbkz = 9758,
VPERMILPSZ256rmk = 9759,
VPERMILPSZ256rmkz = 9760,
VPERMILPSZ256rr = 9761,
VPERMILPSZ256rrk = 9762,
VPERMILPSZ256rrkz = 9763,
VPERMILPSZmbi = 9764,
VPERMILPSZmbik = 9765,
VPERMILPSZmbikz = 9766,
VPERMILPSZmi = 9767,
VPERMILPSZmik = 9768,
VPERMILPSZmikz = 9769,
VPERMILPSZri = 9770,
VPERMILPSZrik = 9771,
VPERMILPSZrikz = 9772,
VPERMILPSZrm = 9773,
VPERMILPSZrmb = 9774,
VPERMILPSZrmbk = 9775,
VPERMILPSZrmbkz = 9776,
VPERMILPSZrmk = 9777,
VPERMILPSZrmkz = 9778,
VPERMILPSZrr = 9779,
VPERMILPSZrrk = 9780,
VPERMILPSZrrkz = 9781,
VPERMILPSmi = 9782,
VPERMILPSri = 9783,
VPERMILPSrm = 9784,
VPERMILPSrr = 9785,
VPERMPDYmi = 9786,
VPERMPDYri = 9787,
VPERMPDZ256mbi = 9788,
VPERMPDZ256mbik = 9789,
VPERMPDZ256mbikz = 9790,
VPERMPDZ256mi = 9791,
VPERMPDZ256mik = 9792,
VPERMPDZ256mikz = 9793,
VPERMPDZ256ri = 9794,
VPERMPDZ256rik = 9795,
VPERMPDZ256rikz = 9796,
VPERMPDZ256rm = 9797,
VPERMPDZ256rmb = 9798,
VPERMPDZ256rmbk = 9799,
VPERMPDZ256rmbkz = 9800,
VPERMPDZ256rmk = 9801,
VPERMPDZ256rmkz = 9802,
VPERMPDZ256rr = 9803,
VPERMPDZ256rrk = 9804,
VPERMPDZ256rrkz = 9805,
VPERMPDZmbi = 9806,
VPERMPDZmbik = 9807,
VPERMPDZmbikz = 9808,
VPERMPDZmi = 9809,
VPERMPDZmik = 9810,
VPERMPDZmikz = 9811,
VPERMPDZri = 9812,
VPERMPDZrik = 9813,
VPERMPDZrikz = 9814,
VPERMPDZrm = 9815,
VPERMPDZrmb = 9816,
VPERMPDZrmbk = 9817,
VPERMPDZrmbkz = 9818,
VPERMPDZrmk = 9819,
VPERMPDZrmkz = 9820,
VPERMPDZrr = 9821,
VPERMPDZrrk = 9822,
VPERMPDZrrkz = 9823,
VPERMPSYrm = 9824,
VPERMPSYrr = 9825,
VPERMPSZ256rm = 9826,
VPERMPSZ256rmb = 9827,
VPERMPSZ256rmbk = 9828,
VPERMPSZ256rmbkz = 9829,
VPERMPSZ256rmk = 9830,
VPERMPSZ256rmkz = 9831,
VPERMPSZ256rr = 9832,
VPERMPSZ256rrk = 9833,
VPERMPSZ256rrkz = 9834,
VPERMPSZrm = 9835,
VPERMPSZrmb = 9836,
VPERMPSZrmbk = 9837,
VPERMPSZrmbkz = 9838,
VPERMPSZrmk = 9839,
VPERMPSZrmkz = 9840,
VPERMPSZrr = 9841,
VPERMPSZrrk = 9842,
VPERMPSZrrkz = 9843,
VPERMQYmi = 9844,
VPERMQYri = 9845,
VPERMQZ256mbi = 9846,
VPERMQZ256mbik = 9847,
VPERMQZ256mbikz = 9848,
VPERMQZ256mi = 9849,
VPERMQZ256mik = 9850,
VPERMQZ256mikz = 9851,
VPERMQZ256ri = 9852,
VPERMQZ256rik = 9853,
VPERMQZ256rikz = 9854,
VPERMQZ256rm = 9855,
VPERMQZ256rmb = 9856,
VPERMQZ256rmbk = 9857,
VPERMQZ256rmbkz = 9858,
VPERMQZ256rmk = 9859,
VPERMQZ256rmkz = 9860,
VPERMQZ256rr = 9861,
VPERMQZ256rrk = 9862,
VPERMQZ256rrkz = 9863,
VPERMQZmbi = 9864,
VPERMQZmbik = 9865,
VPERMQZmbikz = 9866,
VPERMQZmi = 9867,
VPERMQZmik = 9868,
VPERMQZmikz = 9869,
VPERMQZri = 9870,
VPERMQZrik = 9871,
VPERMQZrikz = 9872,
VPERMQZrm = 9873,
VPERMQZrmb = 9874,
VPERMQZrmbk = 9875,
VPERMQZrmbkz = 9876,
VPERMQZrmk = 9877,
VPERMQZrmkz = 9878,
VPERMQZrr = 9879,
VPERMQZrrk = 9880,
VPERMQZrrkz = 9881,
VPERMT2B128rm = 9882,
VPERMT2B128rmk = 9883,
VPERMT2B128rmkz = 9884,
VPERMT2B128rr = 9885,
VPERMT2B128rrk = 9886,
VPERMT2B128rrkz = 9887,
VPERMT2B256rm = 9888,
VPERMT2B256rmk = 9889,
VPERMT2B256rmkz = 9890,
VPERMT2B256rr = 9891,
VPERMT2B256rrk = 9892,
VPERMT2B256rrkz = 9893,
VPERMT2Brm = 9894,
VPERMT2Brmk = 9895,
VPERMT2Brmkz = 9896,
VPERMT2Brr = 9897,
VPERMT2Brrk = 9898,
VPERMT2Brrkz = 9899,
VPERMT2D128rm = 9900,
VPERMT2D128rmb = 9901,
VPERMT2D128rmbk = 9902,
VPERMT2D128rmbkz = 9903,
VPERMT2D128rmk = 9904,
VPERMT2D128rmkz = 9905,
VPERMT2D128rr = 9906,
VPERMT2D128rrk = 9907,
VPERMT2D128rrkz = 9908,
VPERMT2D256rm = 9909,
VPERMT2D256rmb = 9910,
VPERMT2D256rmbk = 9911,
VPERMT2D256rmbkz = 9912,
VPERMT2D256rmk = 9913,
VPERMT2D256rmkz = 9914,
VPERMT2D256rr = 9915,
VPERMT2D256rrk = 9916,
VPERMT2D256rrkz = 9917,
VPERMT2Drm = 9918,
VPERMT2Drmb = 9919,
VPERMT2Drmbk = 9920,
VPERMT2Drmbkz = 9921,
VPERMT2Drmk = 9922,
VPERMT2Drmkz = 9923,
VPERMT2Drr = 9924,
VPERMT2Drrk = 9925,
VPERMT2Drrkz = 9926,
VPERMT2PD128rm = 9927,
VPERMT2PD128rmb = 9928,
VPERMT2PD128rmbk = 9929,
VPERMT2PD128rmbkz = 9930,
VPERMT2PD128rmk = 9931,
VPERMT2PD128rmkz = 9932,
VPERMT2PD128rr = 9933,
VPERMT2PD128rrk = 9934,
VPERMT2PD128rrkz = 9935,
VPERMT2PD256rm = 9936,
VPERMT2PD256rmb = 9937,
VPERMT2PD256rmbk = 9938,
VPERMT2PD256rmbkz = 9939,
VPERMT2PD256rmk = 9940,
VPERMT2PD256rmkz = 9941,
VPERMT2PD256rr = 9942,
VPERMT2PD256rrk = 9943,
VPERMT2PD256rrkz = 9944,
VPERMT2PDrm = 9945,
VPERMT2PDrmb = 9946,
VPERMT2PDrmbk = 9947,
VPERMT2PDrmbkz = 9948,
VPERMT2PDrmk = 9949,
VPERMT2PDrmkz = 9950,
VPERMT2PDrr = 9951,
VPERMT2PDrrk = 9952,
VPERMT2PDrrkz = 9953,
VPERMT2PS128rm = 9954,
VPERMT2PS128rmb = 9955,
VPERMT2PS128rmbk = 9956,
VPERMT2PS128rmbkz = 9957,
VPERMT2PS128rmk = 9958,
VPERMT2PS128rmkz = 9959,
VPERMT2PS128rr = 9960,
VPERMT2PS128rrk = 9961,
VPERMT2PS128rrkz = 9962,
VPERMT2PS256rm = 9963,
VPERMT2PS256rmb = 9964,
VPERMT2PS256rmbk = 9965,
VPERMT2PS256rmbkz = 9966,
VPERMT2PS256rmk = 9967,
VPERMT2PS256rmkz = 9968,
VPERMT2PS256rr = 9969,
VPERMT2PS256rrk = 9970,
VPERMT2PS256rrkz = 9971,
VPERMT2PSrm = 9972,
VPERMT2PSrmb = 9973,
VPERMT2PSrmbk = 9974,
VPERMT2PSrmbkz = 9975,
VPERMT2PSrmk = 9976,
VPERMT2PSrmkz = 9977,
VPERMT2PSrr = 9978,
VPERMT2PSrrk = 9979,
VPERMT2PSrrkz = 9980,
VPERMT2Q128rm = 9981,
VPERMT2Q128rmb = 9982,
VPERMT2Q128rmbk = 9983,
VPERMT2Q128rmbkz = 9984,
VPERMT2Q128rmk = 9985,
VPERMT2Q128rmkz = 9986,
VPERMT2Q128rr = 9987,
VPERMT2Q128rrk = 9988,
VPERMT2Q128rrkz = 9989,
VPERMT2Q256rm = 9990,
VPERMT2Q256rmb = 9991,
VPERMT2Q256rmbk = 9992,
VPERMT2Q256rmbkz = 9993,
VPERMT2Q256rmk = 9994,
VPERMT2Q256rmkz = 9995,
VPERMT2Q256rr = 9996,
VPERMT2Q256rrk = 9997,
VPERMT2Q256rrkz = 9998,
VPERMT2Qrm = 9999,
VPERMT2Qrmb = 10000,
VPERMT2Qrmbk = 10001,
VPERMT2Qrmbkz = 10002,
VPERMT2Qrmk = 10003,
VPERMT2Qrmkz = 10004,
VPERMT2Qrr = 10005,
VPERMT2Qrrk = 10006,
VPERMT2Qrrkz = 10007,
VPERMT2W128rm = 10008,
VPERMT2W128rmk = 10009,
VPERMT2W128rmkz = 10010,
VPERMT2W128rr = 10011,
VPERMT2W128rrk = 10012,
VPERMT2W128rrkz = 10013,
VPERMT2W256rm = 10014,
VPERMT2W256rmk = 10015,
VPERMT2W256rmkz = 10016,
VPERMT2W256rr = 10017,
VPERMT2W256rrk = 10018,
VPERMT2W256rrkz = 10019,
VPERMT2Wrm = 10020,
VPERMT2Wrmk = 10021,
VPERMT2Wrmkz = 10022,
VPERMT2Wrr = 10023,
VPERMT2Wrrk = 10024,
VPERMT2Wrrkz = 10025,
VPERMWZ128rm = 10026,
VPERMWZ128rmk = 10027,
VPERMWZ128rmkz = 10028,
VPERMWZ128rr = 10029,
VPERMWZ128rrk = 10030,
VPERMWZ128rrkz = 10031,
VPERMWZ256rm = 10032,
VPERMWZ256rmk = 10033,
VPERMWZ256rmkz = 10034,
VPERMWZ256rr = 10035,
VPERMWZ256rrk = 10036,
VPERMWZ256rrkz = 10037,
VPERMWZrm = 10038,
VPERMWZrmk = 10039,
VPERMWZrmkz = 10040,
VPERMWZrr = 10041,
VPERMWZrrk = 10042,
VPERMWZrrkz = 10043,
VPEXPANDDZ128rm = 10044,
VPEXPANDDZ128rmk = 10045,
VPEXPANDDZ128rmkz = 10046,
VPEXPANDDZ128rr = 10047,
VPEXPANDDZ128rrk = 10048,
VPEXPANDDZ128rrkz = 10049,
VPEXPANDDZ256rm = 10050,
VPEXPANDDZ256rmk = 10051,
VPEXPANDDZ256rmkz = 10052,
VPEXPANDDZ256rr = 10053,
VPEXPANDDZ256rrk = 10054,
VPEXPANDDZ256rrkz = 10055,
VPEXPANDDZrm = 10056,
VPEXPANDDZrmk = 10057,
VPEXPANDDZrmkz = 10058,
VPEXPANDDZrr = 10059,
VPEXPANDDZrrk = 10060,
VPEXPANDDZrrkz = 10061,
VPEXPANDQZ128rm = 10062,
VPEXPANDQZ128rmk = 10063,
VPEXPANDQZ128rmkz = 10064,
VPEXPANDQZ128rr = 10065,
VPEXPANDQZ128rrk = 10066,
VPEXPANDQZ128rrkz = 10067,
VPEXPANDQZ256rm = 10068,
VPEXPANDQZ256rmk = 10069,
VPEXPANDQZ256rmkz = 10070,
VPEXPANDQZ256rr = 10071,
VPEXPANDQZ256rrk = 10072,
VPEXPANDQZ256rrkz = 10073,
VPEXPANDQZrm = 10074,
VPEXPANDQZrmk = 10075,
VPEXPANDQZrmkz = 10076,
VPEXPANDQZrr = 10077,
VPEXPANDQZrrk = 10078,
VPEXPANDQZrrkz = 10079,
VPEXTRBZmr = 10080,
VPEXTRBZrr = 10081,
VPEXTRBmr = 10082,
VPEXTRBrr = 10083,
VPEXTRDZmr = 10084,
VPEXTRDZrr = 10085,
VPEXTRDmr = 10086,
VPEXTRDrr = 10087,
VPEXTRQZmr = 10088,
VPEXTRQZrr = 10089,
VPEXTRQmr = 10090,
VPEXTRQrr = 10091,
VPEXTRWZmr = 10092,
VPEXTRWZrr = 10093,
VPEXTRWZrr_REV = 10094,
VPEXTRWmr = 10095,
VPEXTRWri = 10096,
VPEXTRWrr_REV = 10097,
VPGATHERDDYrm = 10098,
VPGATHERDDZ128rm = 10099,
VPGATHERDDZ256rm = 10100,
VPGATHERDDZrm = 10101,
VPGATHERDDrm = 10102,
VPGATHERDQYrm = 10103,
VPGATHERDQZ128rm = 10104,
VPGATHERDQZ256rm = 10105,
VPGATHERDQZrm = 10106,
VPGATHERDQrm = 10107,
VPGATHERQDYrm = 10108,
VPGATHERQDZ128rm = 10109,
VPGATHERQDZ256rm = 10110,
VPGATHERQDZrm = 10111,
VPGATHERQDrm = 10112,
VPGATHERQQYrm = 10113,
VPGATHERQQZ128rm = 10114,
VPGATHERQQZ256rm = 10115,
VPGATHERQQZrm = 10116,
VPGATHERQQrm = 10117,
VPHADDBDrm = 10118,
VPHADDBDrr = 10119,
VPHADDBQrm = 10120,
VPHADDBQrr = 10121,
VPHADDBWrm = 10122,
VPHADDBWrr = 10123,
VPHADDDQrm = 10124,
VPHADDDQrr = 10125,
VPHADDDYrm = 10126,
VPHADDDYrr = 10127,
VPHADDDrm = 10128,
VPHADDDrr = 10129,
VPHADDSWrm128 = 10130,
VPHADDSWrm256 = 10131,
VPHADDSWrr128 = 10132,
VPHADDSWrr256 = 10133,
VPHADDUBDrm = 10134,
VPHADDUBDrr = 10135,
VPHADDUBQrm = 10136,
VPHADDUBQrr = 10137,
VPHADDUBWrm = 10138,
VPHADDUBWrr = 10139,
VPHADDUDQrm = 10140,
VPHADDUDQrr = 10141,
VPHADDUWDrm = 10142,
VPHADDUWDrr = 10143,
VPHADDUWQrm = 10144,
VPHADDUWQrr = 10145,
VPHADDWDrm = 10146,
VPHADDWDrr = 10147,
VPHADDWQrm = 10148,
VPHADDWQrr = 10149,
VPHADDWYrm = 10150,
VPHADDWYrr = 10151,
VPHADDWrm = 10152,
VPHADDWrr = 10153,
VPHMINPOSUWrm128 = 10154,
VPHMINPOSUWrr128 = 10155,
VPHSUBBWrm = 10156,
VPHSUBBWrr = 10157,
VPHSUBDQrm = 10158,
VPHSUBDQrr = 10159,
VPHSUBDYrm = 10160,
VPHSUBDYrr = 10161,
VPHSUBDrm = 10162,
VPHSUBDrr = 10163,
VPHSUBSWrm128 = 10164,
VPHSUBSWrm256 = 10165,
VPHSUBSWrr128 = 10166,
VPHSUBSWrr256 = 10167,
VPHSUBWDrm = 10168,
VPHSUBWDrr = 10169,
VPHSUBWYrm = 10170,
VPHSUBWYrr = 10171,
VPHSUBWrm = 10172,
VPHSUBWrr = 10173,
VPINSRBZrm = 10174,
VPINSRBZrr = 10175,
VPINSRBrm = 10176,
VPINSRBrr = 10177,
VPINSRDZrm = 10178,
VPINSRDZrr = 10179,
VPINSRDrm = 10180,
VPINSRDrr = 10181,
VPINSRQZrm = 10182,
VPINSRQZrr = 10183,
VPINSRQrm = 10184,
VPINSRQrr = 10185,
VPINSRWZrm = 10186,
VPINSRWZrr = 10187,
VPINSRWrmi = 10188,
VPINSRWrri = 10189,
VPLZCNTDZ128rm = 10190,
VPLZCNTDZ128rmb = 10191,
VPLZCNTDZ128rmbk = 10192,
VPLZCNTDZ128rmbkz = 10193,
VPLZCNTDZ128rmk = 10194,
VPLZCNTDZ128rmkz = 10195,
VPLZCNTDZ128rr = 10196,
VPLZCNTDZ128rrk = 10197,
VPLZCNTDZ128rrkz = 10198,
VPLZCNTDZ256rm = 10199,
VPLZCNTDZ256rmb = 10200,
VPLZCNTDZ256rmbk = 10201,
VPLZCNTDZ256rmbkz = 10202,
VPLZCNTDZ256rmk = 10203,
VPLZCNTDZ256rmkz = 10204,
VPLZCNTDZ256rr = 10205,
VPLZCNTDZ256rrk = 10206,
VPLZCNTDZ256rrkz = 10207,
VPLZCNTDZrm = 10208,
VPLZCNTDZrmb = 10209,
VPLZCNTDZrmbk = 10210,
VPLZCNTDZrmbkz = 10211,
VPLZCNTDZrmk = 10212,
VPLZCNTDZrmkz = 10213,
VPLZCNTDZrr = 10214,
VPLZCNTDZrrk = 10215,
VPLZCNTDZrrkz = 10216,
VPLZCNTQZ128rm = 10217,
VPLZCNTQZ128rmb = 10218,
VPLZCNTQZ128rmbk = 10219,
VPLZCNTQZ128rmbkz = 10220,
VPLZCNTQZ128rmk = 10221,
VPLZCNTQZ128rmkz = 10222,
VPLZCNTQZ128rr = 10223,
VPLZCNTQZ128rrk = 10224,
VPLZCNTQZ128rrkz = 10225,
VPLZCNTQZ256rm = 10226,
VPLZCNTQZ256rmb = 10227,
VPLZCNTQZ256rmbk = 10228,
VPLZCNTQZ256rmbkz = 10229,
VPLZCNTQZ256rmk = 10230,
VPLZCNTQZ256rmkz = 10231,
VPLZCNTQZ256rr = 10232,
VPLZCNTQZ256rrk = 10233,
VPLZCNTQZ256rrkz = 10234,
VPLZCNTQZrm = 10235,
VPLZCNTQZrmb = 10236,
VPLZCNTQZrmbk = 10237,
VPLZCNTQZrmbkz = 10238,
VPLZCNTQZrmk = 10239,
VPLZCNTQZrmkz = 10240,
VPLZCNTQZrr = 10241,
VPLZCNTQZrrk = 10242,
VPLZCNTQZrrkz = 10243,
VPMACSDDrm = 10244,
VPMACSDDrr = 10245,
VPMACSDQHrm = 10246,
VPMACSDQHrr = 10247,
VPMACSDQLrm = 10248,
VPMACSDQLrr = 10249,
VPMACSSDDrm = 10250,
VPMACSSDDrr = 10251,
VPMACSSDQHrm = 10252,
VPMACSSDQHrr = 10253,
VPMACSSDQLrm = 10254,
VPMACSSDQLrr = 10255,
VPMACSSWDrm = 10256,
VPMACSSWDrr = 10257,
VPMACSSWWrm = 10258,
VPMACSSWWrr = 10259,
VPMACSWDrm = 10260,
VPMACSWDrr = 10261,
VPMACSWWrm = 10262,
VPMACSWWrr = 10263,
VPMADCSSWDrm = 10264,
VPMADCSSWDrr = 10265,
VPMADCSWDrm = 10266,
VPMADCSWDrr = 10267,
VPMADD52HUQZ128m = 10268,
VPMADD52HUQZ128mb = 10269,
VPMADD52HUQZ128mbk = 10270,
VPMADD52HUQZ128mbkz = 10271,
VPMADD52HUQZ128mk = 10272,
VPMADD52HUQZ128mkz = 10273,
VPMADD52HUQZ128r = 10274,
VPMADD52HUQZ128rk = 10275,
VPMADD52HUQZ128rkz = 10276,
VPMADD52HUQZ256m = 10277,
VPMADD52HUQZ256mb = 10278,
VPMADD52HUQZ256mbk = 10279,
VPMADD52HUQZ256mbkz = 10280,
VPMADD52HUQZ256mk = 10281,
VPMADD52HUQZ256mkz = 10282,
VPMADD52HUQZ256r = 10283,
VPMADD52HUQZ256rk = 10284,
VPMADD52HUQZ256rkz = 10285,
VPMADD52HUQZm = 10286,
VPMADD52HUQZmb = 10287,
VPMADD52HUQZmbk = 10288,
VPMADD52HUQZmbkz = 10289,
VPMADD52HUQZmk = 10290,
VPMADD52HUQZmkz = 10291,
VPMADD52HUQZr = 10292,
VPMADD52HUQZrk = 10293,
VPMADD52HUQZrkz = 10294,
VPMADD52LUQZ128m = 10295,
VPMADD52LUQZ128mb = 10296,
VPMADD52LUQZ128mbk = 10297,
VPMADD52LUQZ128mbkz = 10298,
VPMADD52LUQZ128mk = 10299,
VPMADD52LUQZ128mkz = 10300,
VPMADD52LUQZ128r = 10301,
VPMADD52LUQZ128rk = 10302,
VPMADD52LUQZ128rkz = 10303,
VPMADD52LUQZ256m = 10304,
VPMADD52LUQZ256mb = 10305,
VPMADD52LUQZ256mbk = 10306,
VPMADD52LUQZ256mbkz = 10307,
VPMADD52LUQZ256mk = 10308,
VPMADD52LUQZ256mkz = 10309,
VPMADD52LUQZ256r = 10310,
VPMADD52LUQZ256rk = 10311,
VPMADD52LUQZ256rkz = 10312,
VPMADD52LUQZm = 10313,
VPMADD52LUQZmb = 10314,
VPMADD52LUQZmbk = 10315,
VPMADD52LUQZmbkz = 10316,
VPMADD52LUQZmk = 10317,
VPMADD52LUQZmkz = 10318,
VPMADD52LUQZr = 10319,
VPMADD52LUQZrk = 10320,
VPMADD52LUQZrkz = 10321,
VPMADDUBSWZ128rm = 10322,
VPMADDUBSWZ128rmk = 10323,
VPMADDUBSWZ128rmkz = 10324,
VPMADDUBSWZ128rr = 10325,
VPMADDUBSWZ128rrk = 10326,
VPMADDUBSWZ128rrkz = 10327,
VPMADDUBSWZ256rm = 10328,
VPMADDUBSWZ256rmk = 10329,
VPMADDUBSWZ256rmkz = 10330,
VPMADDUBSWZ256rr = 10331,
VPMADDUBSWZ256rrk = 10332,
VPMADDUBSWZ256rrkz = 10333,
VPMADDUBSWZrm = 10334,
VPMADDUBSWZrmk = 10335,
VPMADDUBSWZrmkz = 10336,
VPMADDUBSWZrr = 10337,
VPMADDUBSWZrrk = 10338,
VPMADDUBSWZrrkz = 10339,
VPMADDUBSWrm128 = 10340,
VPMADDUBSWrm256 = 10341,
VPMADDUBSWrr128 = 10342,
VPMADDUBSWrr256 = 10343,
VPMADDWDYrm = 10344,
VPMADDWDYrr = 10345,
VPMADDWDZ128rm = 10346,
VPMADDWDZ128rmk = 10347,
VPMADDWDZ128rmkz = 10348,
VPMADDWDZ128rr = 10349,
VPMADDWDZ128rrk = 10350,
VPMADDWDZ128rrkz = 10351,
VPMADDWDZ256rm = 10352,
VPMADDWDZ256rmk = 10353,
VPMADDWDZ256rmkz = 10354,
VPMADDWDZ256rr = 10355,
VPMADDWDZ256rrk = 10356,
VPMADDWDZ256rrkz = 10357,
VPMADDWDZrm = 10358,
VPMADDWDZrmk = 10359,
VPMADDWDZrmkz = 10360,
VPMADDWDZrr = 10361,
VPMADDWDZrrk = 10362,
VPMADDWDZrrkz = 10363,
VPMADDWDrm = 10364,
VPMADDWDrr = 10365,
VPMASKMOVDYmr = 10366,
VPMASKMOVDYrm = 10367,
VPMASKMOVDmr = 10368,
VPMASKMOVDrm = 10369,
VPMASKMOVQYmr = 10370,
VPMASKMOVQYrm = 10371,
VPMASKMOVQmr = 10372,
VPMASKMOVQrm = 10373,
VPMAXSBYrm = 10374,
VPMAXSBYrr = 10375,
VPMAXSBZ128rm = 10376,
VPMAXSBZ128rmk = 10377,
VPMAXSBZ128rmkz = 10378,
VPMAXSBZ128rr = 10379,
VPMAXSBZ128rrk = 10380,
VPMAXSBZ128rrkz = 10381,
VPMAXSBZ256rm = 10382,
VPMAXSBZ256rmk = 10383,
VPMAXSBZ256rmkz = 10384,
VPMAXSBZ256rr = 10385,
VPMAXSBZ256rrk = 10386,
VPMAXSBZ256rrkz = 10387,
VPMAXSBZrm = 10388,
VPMAXSBZrmk = 10389,
VPMAXSBZrmkz = 10390,
VPMAXSBZrr = 10391,
VPMAXSBZrrk = 10392,
VPMAXSBZrrkz = 10393,
VPMAXSBrm = 10394,
VPMAXSBrr = 10395,
VPMAXSDYrm = 10396,
VPMAXSDYrr = 10397,
VPMAXSDZ128rm = 10398,
VPMAXSDZ128rmb = 10399,
VPMAXSDZ128rmbk = 10400,
VPMAXSDZ128rmbkz = 10401,
VPMAXSDZ128rmk = 10402,
VPMAXSDZ128rmkz = 10403,
VPMAXSDZ128rr = 10404,
VPMAXSDZ128rrk = 10405,
VPMAXSDZ128rrkz = 10406,
VPMAXSDZ256rm = 10407,
VPMAXSDZ256rmb = 10408,
VPMAXSDZ256rmbk = 10409,
VPMAXSDZ256rmbkz = 10410,
VPMAXSDZ256rmk = 10411,
VPMAXSDZ256rmkz = 10412,
VPMAXSDZ256rr = 10413,
VPMAXSDZ256rrk = 10414,
VPMAXSDZ256rrkz = 10415,
VPMAXSDZrm = 10416,
VPMAXSDZrmb = 10417,
VPMAXSDZrmbk = 10418,
VPMAXSDZrmbkz = 10419,
VPMAXSDZrmk = 10420,
VPMAXSDZrmkz = 10421,
VPMAXSDZrr = 10422,
VPMAXSDZrrk = 10423,
VPMAXSDZrrkz = 10424,
VPMAXSDrm = 10425,
VPMAXSDrr = 10426,
VPMAXSQZ128rm = 10427,
VPMAXSQZ128rmb = 10428,
VPMAXSQZ128rmbk = 10429,
VPMAXSQZ128rmbkz = 10430,
VPMAXSQZ128rmk = 10431,
VPMAXSQZ128rmkz = 10432,
VPMAXSQZ128rr = 10433,
VPMAXSQZ128rrk = 10434,
VPMAXSQZ128rrkz = 10435,
VPMAXSQZ256rm = 10436,
VPMAXSQZ256rmb = 10437,
VPMAXSQZ256rmbk = 10438,
VPMAXSQZ256rmbkz = 10439,
VPMAXSQZ256rmk = 10440,
VPMAXSQZ256rmkz = 10441,
VPMAXSQZ256rr = 10442,
VPMAXSQZ256rrk = 10443,
VPMAXSQZ256rrkz = 10444,
VPMAXSQZrm = 10445,
VPMAXSQZrmb = 10446,
VPMAXSQZrmbk = 10447,
VPMAXSQZrmbkz = 10448,
VPMAXSQZrmk = 10449,
VPMAXSQZrmkz = 10450,
VPMAXSQZrr = 10451,
VPMAXSQZrrk = 10452,
VPMAXSQZrrkz = 10453,
VPMAXSWYrm = 10454,
VPMAXSWYrr = 10455,
VPMAXSWZ128rm = 10456,
VPMAXSWZ128rmk = 10457,
VPMAXSWZ128rmkz = 10458,
VPMAXSWZ128rr = 10459,
VPMAXSWZ128rrk = 10460,
VPMAXSWZ128rrkz = 10461,
VPMAXSWZ256rm = 10462,
VPMAXSWZ256rmk = 10463,
VPMAXSWZ256rmkz = 10464,
VPMAXSWZ256rr = 10465,
VPMAXSWZ256rrk = 10466,
VPMAXSWZ256rrkz = 10467,
VPMAXSWZrm = 10468,
VPMAXSWZrmk = 10469,
VPMAXSWZrmkz = 10470,
VPMAXSWZrr = 10471,
VPMAXSWZrrk = 10472,
VPMAXSWZrrkz = 10473,
VPMAXSWrm = 10474,
VPMAXSWrr = 10475,
VPMAXUBYrm = 10476,
VPMAXUBYrr = 10477,
VPMAXUBZ128rm = 10478,
VPMAXUBZ128rmk = 10479,
VPMAXUBZ128rmkz = 10480,
VPMAXUBZ128rr = 10481,
VPMAXUBZ128rrk = 10482,
VPMAXUBZ128rrkz = 10483,
VPMAXUBZ256rm = 10484,
VPMAXUBZ256rmk = 10485,
VPMAXUBZ256rmkz = 10486,
VPMAXUBZ256rr = 10487,
VPMAXUBZ256rrk = 10488,
VPMAXUBZ256rrkz = 10489,
VPMAXUBZrm = 10490,
VPMAXUBZrmk = 10491,
VPMAXUBZrmkz = 10492,
VPMAXUBZrr = 10493,
VPMAXUBZrrk = 10494,
VPMAXUBZrrkz = 10495,
VPMAXUBrm = 10496,
VPMAXUBrr = 10497,
VPMAXUDYrm = 10498,
VPMAXUDYrr = 10499,
VPMAXUDZ128rm = 10500,
VPMAXUDZ128rmb = 10501,
VPMAXUDZ128rmbk = 10502,
VPMAXUDZ128rmbkz = 10503,
VPMAXUDZ128rmk = 10504,
VPMAXUDZ128rmkz = 10505,
VPMAXUDZ128rr = 10506,
VPMAXUDZ128rrk = 10507,
VPMAXUDZ128rrkz = 10508,
VPMAXUDZ256rm = 10509,
VPMAXUDZ256rmb = 10510,
VPMAXUDZ256rmbk = 10511,
VPMAXUDZ256rmbkz = 10512,
VPMAXUDZ256rmk = 10513,
VPMAXUDZ256rmkz = 10514,
VPMAXUDZ256rr = 10515,
VPMAXUDZ256rrk = 10516,
VPMAXUDZ256rrkz = 10517,
VPMAXUDZrm = 10518,
VPMAXUDZrmb = 10519,
VPMAXUDZrmbk = 10520,
VPMAXUDZrmbkz = 10521,
VPMAXUDZrmk = 10522,
VPMAXUDZrmkz = 10523,
VPMAXUDZrr = 10524,
VPMAXUDZrrk = 10525,
VPMAXUDZrrkz = 10526,
VPMAXUDrm = 10527,
VPMAXUDrr = 10528,
VPMAXUQZ128rm = 10529,
VPMAXUQZ128rmb = 10530,
VPMAXUQZ128rmbk = 10531,
VPMAXUQZ128rmbkz = 10532,
VPMAXUQZ128rmk = 10533,
VPMAXUQZ128rmkz = 10534,
VPMAXUQZ128rr = 10535,
VPMAXUQZ128rrk = 10536,
VPMAXUQZ128rrkz = 10537,
VPMAXUQZ256rm = 10538,
VPMAXUQZ256rmb = 10539,
VPMAXUQZ256rmbk = 10540,
VPMAXUQZ256rmbkz = 10541,
VPMAXUQZ256rmk = 10542,
VPMAXUQZ256rmkz = 10543,
VPMAXUQZ256rr = 10544,
VPMAXUQZ256rrk = 10545,
VPMAXUQZ256rrkz = 10546,
VPMAXUQZrm = 10547,
VPMAXUQZrmb = 10548,
VPMAXUQZrmbk = 10549,
VPMAXUQZrmbkz = 10550,
VPMAXUQZrmk = 10551,
VPMAXUQZrmkz = 10552,
VPMAXUQZrr = 10553,
VPMAXUQZrrk = 10554,
VPMAXUQZrrkz = 10555,
VPMAXUWYrm = 10556,
VPMAXUWYrr = 10557,
VPMAXUWZ128rm = 10558,
VPMAXUWZ128rmk = 10559,
VPMAXUWZ128rmkz = 10560,
VPMAXUWZ128rr = 10561,
VPMAXUWZ128rrk = 10562,
VPMAXUWZ128rrkz = 10563,
VPMAXUWZ256rm = 10564,
VPMAXUWZ256rmk = 10565,
VPMAXUWZ256rmkz = 10566,
VPMAXUWZ256rr = 10567,
VPMAXUWZ256rrk = 10568,
VPMAXUWZ256rrkz = 10569,
VPMAXUWZrm = 10570,
VPMAXUWZrmk = 10571,
VPMAXUWZrmkz = 10572,
VPMAXUWZrr = 10573,
VPMAXUWZrrk = 10574,
VPMAXUWZrrkz = 10575,
VPMAXUWrm = 10576,
VPMAXUWrr = 10577,
VPMINSBYrm = 10578,
VPMINSBYrr = 10579,
VPMINSBZ128rm = 10580,
VPMINSBZ128rmk = 10581,
VPMINSBZ128rmkz = 10582,
VPMINSBZ128rr = 10583,
VPMINSBZ128rrk = 10584,
VPMINSBZ128rrkz = 10585,
VPMINSBZ256rm = 10586,
VPMINSBZ256rmk = 10587,
VPMINSBZ256rmkz = 10588,
VPMINSBZ256rr = 10589,
VPMINSBZ256rrk = 10590,
VPMINSBZ256rrkz = 10591,
VPMINSBZrm = 10592,
VPMINSBZrmk = 10593,
VPMINSBZrmkz = 10594,
VPMINSBZrr = 10595,
VPMINSBZrrk = 10596,
VPMINSBZrrkz = 10597,
VPMINSBrm = 10598,
VPMINSBrr = 10599,
VPMINSDYrm = 10600,
VPMINSDYrr = 10601,
VPMINSDZ128rm = 10602,
VPMINSDZ128rmb = 10603,
VPMINSDZ128rmbk = 10604,
VPMINSDZ128rmbkz = 10605,
VPMINSDZ128rmk = 10606,
VPMINSDZ128rmkz = 10607,
VPMINSDZ128rr = 10608,
VPMINSDZ128rrk = 10609,
VPMINSDZ128rrkz = 10610,
VPMINSDZ256rm = 10611,
VPMINSDZ256rmb = 10612,
VPMINSDZ256rmbk = 10613,
VPMINSDZ256rmbkz = 10614,
VPMINSDZ256rmk = 10615,
VPMINSDZ256rmkz = 10616,
VPMINSDZ256rr = 10617,
VPMINSDZ256rrk = 10618,
VPMINSDZ256rrkz = 10619,
VPMINSDZrm = 10620,
VPMINSDZrmb = 10621,
VPMINSDZrmbk = 10622,
VPMINSDZrmbkz = 10623,
VPMINSDZrmk = 10624,
VPMINSDZrmkz = 10625,
VPMINSDZrr = 10626,
VPMINSDZrrk = 10627,
VPMINSDZrrkz = 10628,
VPMINSDrm = 10629,
VPMINSDrr = 10630,
VPMINSQZ128rm = 10631,
VPMINSQZ128rmb = 10632,
VPMINSQZ128rmbk = 10633,
VPMINSQZ128rmbkz = 10634,
VPMINSQZ128rmk = 10635,
VPMINSQZ128rmkz = 10636,
VPMINSQZ128rr = 10637,
VPMINSQZ128rrk = 10638,
VPMINSQZ128rrkz = 10639,
VPMINSQZ256rm = 10640,
VPMINSQZ256rmb = 10641,
VPMINSQZ256rmbk = 10642,
VPMINSQZ256rmbkz = 10643,
VPMINSQZ256rmk = 10644,
VPMINSQZ256rmkz = 10645,
VPMINSQZ256rr = 10646,
VPMINSQZ256rrk = 10647,
VPMINSQZ256rrkz = 10648,
VPMINSQZrm = 10649,
VPMINSQZrmb = 10650,
VPMINSQZrmbk = 10651,
VPMINSQZrmbkz = 10652,
VPMINSQZrmk = 10653,
VPMINSQZrmkz = 10654,
VPMINSQZrr = 10655,
VPMINSQZrrk = 10656,
VPMINSQZrrkz = 10657,
VPMINSWYrm = 10658,
VPMINSWYrr = 10659,
VPMINSWZ128rm = 10660,
VPMINSWZ128rmk = 10661,
VPMINSWZ128rmkz = 10662,
VPMINSWZ128rr = 10663,
VPMINSWZ128rrk = 10664,
VPMINSWZ128rrkz = 10665,
VPMINSWZ256rm = 10666,
VPMINSWZ256rmk = 10667,
VPMINSWZ256rmkz = 10668,
VPMINSWZ256rr = 10669,
VPMINSWZ256rrk = 10670,
VPMINSWZ256rrkz = 10671,
VPMINSWZrm = 10672,
VPMINSWZrmk = 10673,
VPMINSWZrmkz = 10674,
VPMINSWZrr = 10675,
VPMINSWZrrk = 10676,
VPMINSWZrrkz = 10677,
VPMINSWrm = 10678,
VPMINSWrr = 10679,
VPMINUBYrm = 10680,
VPMINUBYrr = 10681,
VPMINUBZ128rm = 10682,
VPMINUBZ128rmk = 10683,
VPMINUBZ128rmkz = 10684,
VPMINUBZ128rr = 10685,
VPMINUBZ128rrk = 10686,
VPMINUBZ128rrkz = 10687,
VPMINUBZ256rm = 10688,
VPMINUBZ256rmk = 10689,
VPMINUBZ256rmkz = 10690,
VPMINUBZ256rr = 10691,
VPMINUBZ256rrk = 10692,
VPMINUBZ256rrkz = 10693,
VPMINUBZrm = 10694,
VPMINUBZrmk = 10695,
VPMINUBZrmkz = 10696,
VPMINUBZrr = 10697,
VPMINUBZrrk = 10698,
VPMINUBZrrkz = 10699,
VPMINUBrm = 10700,
VPMINUBrr = 10701,
VPMINUDYrm = 10702,
VPMINUDYrr = 10703,
VPMINUDZ128rm = 10704,
VPMINUDZ128rmb = 10705,
VPMINUDZ128rmbk = 10706,
VPMINUDZ128rmbkz = 10707,
VPMINUDZ128rmk = 10708,
VPMINUDZ128rmkz = 10709,
VPMINUDZ128rr = 10710,
VPMINUDZ128rrk = 10711,
VPMINUDZ128rrkz = 10712,
VPMINUDZ256rm = 10713,
VPMINUDZ256rmb = 10714,
VPMINUDZ256rmbk = 10715,
VPMINUDZ256rmbkz = 10716,
VPMINUDZ256rmk = 10717,
VPMINUDZ256rmkz = 10718,
VPMINUDZ256rr = 10719,
VPMINUDZ256rrk = 10720,
VPMINUDZ256rrkz = 10721,
VPMINUDZrm = 10722,
VPMINUDZrmb = 10723,
VPMINUDZrmbk = 10724,
VPMINUDZrmbkz = 10725,
VPMINUDZrmk = 10726,
VPMINUDZrmkz = 10727,
VPMINUDZrr = 10728,
VPMINUDZrrk = 10729,
VPMINUDZrrkz = 10730,
VPMINUDrm = 10731,
VPMINUDrr = 10732,
VPMINUQZ128rm = 10733,
VPMINUQZ128rmb = 10734,
VPMINUQZ128rmbk = 10735,
VPMINUQZ128rmbkz = 10736,
VPMINUQZ128rmk = 10737,
VPMINUQZ128rmkz = 10738,
VPMINUQZ128rr = 10739,
VPMINUQZ128rrk = 10740,
VPMINUQZ128rrkz = 10741,
VPMINUQZ256rm = 10742,
VPMINUQZ256rmb = 10743,
VPMINUQZ256rmbk = 10744,
VPMINUQZ256rmbkz = 10745,
VPMINUQZ256rmk = 10746,
VPMINUQZ256rmkz = 10747,
VPMINUQZ256rr = 10748,
VPMINUQZ256rrk = 10749,
VPMINUQZ256rrkz = 10750,
VPMINUQZrm = 10751,
VPMINUQZrmb = 10752,
VPMINUQZrmbk = 10753,
VPMINUQZrmbkz = 10754,
VPMINUQZrmk = 10755,
VPMINUQZrmkz = 10756,
VPMINUQZrr = 10757,
VPMINUQZrrk = 10758,
VPMINUQZrrkz = 10759,
VPMINUWYrm = 10760,
VPMINUWYrr = 10761,
VPMINUWZ128rm = 10762,
VPMINUWZ128rmk = 10763,
VPMINUWZ128rmkz = 10764,
VPMINUWZ128rr = 10765,
VPMINUWZ128rrk = 10766,
VPMINUWZ128rrkz = 10767,
VPMINUWZ256rm = 10768,
VPMINUWZ256rmk = 10769,
VPMINUWZ256rmkz = 10770,
VPMINUWZ256rr = 10771,
VPMINUWZ256rrk = 10772,
VPMINUWZ256rrkz = 10773,
VPMINUWZrm = 10774,
VPMINUWZrmk = 10775,
VPMINUWZrmkz = 10776,
VPMINUWZrr = 10777,
VPMINUWZrrk = 10778,
VPMINUWZrrkz = 10779,
VPMINUWrm = 10780,
VPMINUWrr = 10781,
VPMOVB2MZ128rr = 10782,
VPMOVB2MZ256rr = 10783,
VPMOVB2MZrr = 10784,
VPMOVD2MZ128rr = 10785,
VPMOVD2MZ256rr = 10786,
VPMOVD2MZrr = 10787,
VPMOVDBZ128mr = 10788,
VPMOVDBZ128mrk = 10789,
VPMOVDBZ128rr = 10790,
VPMOVDBZ128rrk = 10791,
VPMOVDBZ128rrkz = 10792,
VPMOVDBZ256mr = 10793,
VPMOVDBZ256mrk = 10794,
VPMOVDBZ256rr = 10795,
VPMOVDBZ256rrk = 10796,
VPMOVDBZ256rrkz = 10797,
VPMOVDBZmr = 10798,
VPMOVDBZmrk = 10799,
VPMOVDBZrr = 10800,
VPMOVDBZrrk = 10801,
VPMOVDBZrrkz = 10802,
VPMOVDWZ128mr = 10803,
VPMOVDWZ128mrk = 10804,
VPMOVDWZ128rr = 10805,
VPMOVDWZ128rrk = 10806,
VPMOVDWZ128rrkz = 10807,
VPMOVDWZ256mr = 10808,
VPMOVDWZ256mrk = 10809,
VPMOVDWZ256rr = 10810,
VPMOVDWZ256rrk = 10811,
VPMOVDWZ256rrkz = 10812,
VPMOVDWZmr = 10813,
VPMOVDWZmrk = 10814,
VPMOVDWZrr = 10815,
VPMOVDWZrrk = 10816,
VPMOVDWZrrkz = 10817,
VPMOVM2BZ128rr = 10818,
VPMOVM2BZ256rr = 10819,
VPMOVM2BZrr = 10820,
VPMOVM2DZ128rr = 10821,
VPMOVM2DZ256rr = 10822,
VPMOVM2DZrr = 10823,
VPMOVM2QZ128rr = 10824,
VPMOVM2QZ256rr = 10825,
VPMOVM2QZrr = 10826,
VPMOVM2WZ128rr = 10827,
VPMOVM2WZ256rr = 10828,
VPMOVM2WZrr = 10829,
VPMOVMSKBYrr = 10830,
VPMOVMSKBrr = 10831,
VPMOVQ2MZ128rr = 10832,
VPMOVQ2MZ256rr = 10833,
VPMOVQ2MZrr = 10834,
VPMOVQBZ128mr = 10835,
VPMOVQBZ128mrk = 10836,
VPMOVQBZ128rr = 10837,
VPMOVQBZ128rrk = 10838,
VPMOVQBZ128rrkz = 10839,
VPMOVQBZ256mr = 10840,
VPMOVQBZ256mrk = 10841,
VPMOVQBZ256rr = 10842,
VPMOVQBZ256rrk = 10843,
VPMOVQBZ256rrkz = 10844,
VPMOVQBZmr = 10845,
VPMOVQBZmrk = 10846,
VPMOVQBZrr = 10847,
VPMOVQBZrrk = 10848,
VPMOVQBZrrkz = 10849,
VPMOVQDZ128mr = 10850,
VPMOVQDZ128mrk = 10851,
VPMOVQDZ128rr = 10852,
VPMOVQDZ128rrk = 10853,
VPMOVQDZ128rrkz = 10854,
VPMOVQDZ256mr = 10855,
VPMOVQDZ256mrk = 10856,
VPMOVQDZ256rr = 10857,
VPMOVQDZ256rrk = 10858,
VPMOVQDZ256rrkz = 10859,
VPMOVQDZmr = 10860,
VPMOVQDZmrk = 10861,
VPMOVQDZrr = 10862,
VPMOVQDZrrk = 10863,
VPMOVQDZrrkz = 10864,
VPMOVQWZ128mr = 10865,
VPMOVQWZ128mrk = 10866,
VPMOVQWZ128rr = 10867,
VPMOVQWZ128rrk = 10868,
VPMOVQWZ128rrkz = 10869,
VPMOVQWZ256mr = 10870,
VPMOVQWZ256mrk = 10871,
VPMOVQWZ256rr = 10872,
VPMOVQWZ256rrk = 10873,
VPMOVQWZ256rrkz = 10874,
VPMOVQWZmr = 10875,
VPMOVQWZmrk = 10876,
VPMOVQWZrr = 10877,
VPMOVQWZrrk = 10878,
VPMOVQWZrrkz = 10879,
VPMOVSDBZ128mr = 10880,
VPMOVSDBZ128mrk = 10881,
VPMOVSDBZ128rr = 10882,
VPMOVSDBZ128rrk = 10883,
VPMOVSDBZ128rrkz = 10884,
VPMOVSDBZ256mr = 10885,
VPMOVSDBZ256mrk = 10886,
VPMOVSDBZ256rr = 10887,
VPMOVSDBZ256rrk = 10888,
VPMOVSDBZ256rrkz = 10889,
VPMOVSDBZmr = 10890,
VPMOVSDBZmrk = 10891,
VPMOVSDBZrr = 10892,
VPMOVSDBZrrk = 10893,
VPMOVSDBZrrkz = 10894,
VPMOVSDWZ128mr = 10895,
VPMOVSDWZ128mrk = 10896,
VPMOVSDWZ128rr = 10897,
VPMOVSDWZ128rrk = 10898,
VPMOVSDWZ128rrkz = 10899,
VPMOVSDWZ256mr = 10900,
VPMOVSDWZ256mrk = 10901,
VPMOVSDWZ256rr = 10902,
VPMOVSDWZ256rrk = 10903,
VPMOVSDWZ256rrkz = 10904,
VPMOVSDWZmr = 10905,
VPMOVSDWZmrk = 10906,
VPMOVSDWZrr = 10907,
VPMOVSDWZrrk = 10908,
VPMOVSDWZrrkz = 10909,
VPMOVSQBZ128mr = 10910,
VPMOVSQBZ128mrk = 10911,
VPMOVSQBZ128rr = 10912,
VPMOVSQBZ128rrk = 10913,
VPMOVSQBZ128rrkz = 10914,
VPMOVSQBZ256mr = 10915,
VPMOVSQBZ256mrk = 10916,
VPMOVSQBZ256rr = 10917,
VPMOVSQBZ256rrk = 10918,
VPMOVSQBZ256rrkz = 10919,
VPMOVSQBZmr = 10920,
VPMOVSQBZmrk = 10921,
VPMOVSQBZrr = 10922,
VPMOVSQBZrrk = 10923,
VPMOVSQBZrrkz = 10924,
VPMOVSQDZ128mr = 10925,
VPMOVSQDZ128mrk = 10926,
VPMOVSQDZ128rr = 10927,
VPMOVSQDZ128rrk = 10928,
VPMOVSQDZ128rrkz = 10929,
VPMOVSQDZ256mr = 10930,
VPMOVSQDZ256mrk = 10931,
VPMOVSQDZ256rr = 10932,
VPMOVSQDZ256rrk = 10933,
VPMOVSQDZ256rrkz = 10934,
VPMOVSQDZmr = 10935,
VPMOVSQDZmrk = 10936,
VPMOVSQDZrr = 10937,
VPMOVSQDZrrk = 10938,
VPMOVSQDZrrkz = 10939,
VPMOVSQWZ128mr = 10940,
VPMOVSQWZ128mrk = 10941,
VPMOVSQWZ128rr = 10942,
VPMOVSQWZ128rrk = 10943,
VPMOVSQWZ128rrkz = 10944,
VPMOVSQWZ256mr = 10945,
VPMOVSQWZ256mrk = 10946,
VPMOVSQWZ256rr = 10947,
VPMOVSQWZ256rrk = 10948,
VPMOVSQWZ256rrkz = 10949,
VPMOVSQWZmr = 10950,
VPMOVSQWZmrk = 10951,
VPMOVSQWZrr = 10952,
VPMOVSQWZrrk = 10953,
VPMOVSQWZrrkz = 10954,
VPMOVSWBZ128mr = 10955,
VPMOVSWBZ128mrk = 10956,
VPMOVSWBZ128rr = 10957,
VPMOVSWBZ128rrk = 10958,
VPMOVSWBZ128rrkz = 10959,
VPMOVSWBZ256mr = 10960,
VPMOVSWBZ256mrk = 10961,
VPMOVSWBZ256rr = 10962,
VPMOVSWBZ256rrk = 10963,
VPMOVSWBZ256rrkz = 10964,
VPMOVSWBZmr = 10965,
VPMOVSWBZmrk = 10966,
VPMOVSWBZrr = 10967,
VPMOVSWBZrrk = 10968,
VPMOVSWBZrrkz = 10969,
VPMOVSXBDYrm = 10970,
VPMOVSXBDYrr = 10971,
VPMOVSXBDZ128rm = 10972,
VPMOVSXBDZ128rmk = 10973,
VPMOVSXBDZ128rmkz = 10974,
VPMOVSXBDZ128rr = 10975,
VPMOVSXBDZ128rrk = 10976,
VPMOVSXBDZ128rrkz = 10977,
VPMOVSXBDZ256rm = 10978,
VPMOVSXBDZ256rmk = 10979,
VPMOVSXBDZ256rmkz = 10980,
VPMOVSXBDZ256rr = 10981,
VPMOVSXBDZ256rrk = 10982,
VPMOVSXBDZ256rrkz = 10983,
VPMOVSXBDZrm = 10984,
VPMOVSXBDZrmk = 10985,
VPMOVSXBDZrmkz = 10986,
VPMOVSXBDZrr = 10987,
VPMOVSXBDZrrk = 10988,
VPMOVSXBDZrrkz = 10989,
VPMOVSXBDrm = 10990,
VPMOVSXBDrr = 10991,
VPMOVSXBQYrm = 10992,
VPMOVSXBQYrr = 10993,
VPMOVSXBQZ128rm = 10994,
VPMOVSXBQZ128rmk = 10995,
VPMOVSXBQZ128rmkz = 10996,
VPMOVSXBQZ128rr = 10997,
VPMOVSXBQZ128rrk = 10998,
VPMOVSXBQZ128rrkz = 10999,
VPMOVSXBQZ256rm = 11000,
VPMOVSXBQZ256rmk = 11001,
VPMOVSXBQZ256rmkz = 11002,
VPMOVSXBQZ256rr = 11003,
VPMOVSXBQZ256rrk = 11004,
VPMOVSXBQZ256rrkz = 11005,
VPMOVSXBQZrm = 11006,
VPMOVSXBQZrmk = 11007,
VPMOVSXBQZrmkz = 11008,
VPMOVSXBQZrr = 11009,
VPMOVSXBQZrrk = 11010,
VPMOVSXBQZrrkz = 11011,
VPMOVSXBQrm = 11012,
VPMOVSXBQrr = 11013,
VPMOVSXBWYrm = 11014,
VPMOVSXBWYrr = 11015,
VPMOVSXBWZ128rm = 11016,
VPMOVSXBWZ128rmk = 11017,
VPMOVSXBWZ128rmkz = 11018,
VPMOVSXBWZ128rr = 11019,
VPMOVSXBWZ128rrk = 11020,
VPMOVSXBWZ128rrkz = 11021,
VPMOVSXBWZ256rm = 11022,
VPMOVSXBWZ256rmk = 11023,
VPMOVSXBWZ256rmkz = 11024,
VPMOVSXBWZ256rr = 11025,
VPMOVSXBWZ256rrk = 11026,
VPMOVSXBWZ256rrkz = 11027,
VPMOVSXBWZrm = 11028,
VPMOVSXBWZrmk = 11029,
VPMOVSXBWZrmkz = 11030,
VPMOVSXBWZrr = 11031,
VPMOVSXBWZrrk = 11032,
VPMOVSXBWZrrkz = 11033,
VPMOVSXBWrm = 11034,
VPMOVSXBWrr = 11035,
VPMOVSXDQYrm = 11036,
VPMOVSXDQYrr = 11037,
VPMOVSXDQZ128rm = 11038,
VPMOVSXDQZ128rmk = 11039,
VPMOVSXDQZ128rmkz = 11040,
VPMOVSXDQZ128rr = 11041,
VPMOVSXDQZ128rrk = 11042,
VPMOVSXDQZ128rrkz = 11043,
VPMOVSXDQZ256rm = 11044,
VPMOVSXDQZ256rmk = 11045,
VPMOVSXDQZ256rmkz = 11046,
VPMOVSXDQZ256rr = 11047,
VPMOVSXDQZ256rrk = 11048,
VPMOVSXDQZ256rrkz = 11049,
VPMOVSXDQZrm = 11050,
VPMOVSXDQZrmk = 11051,
VPMOVSXDQZrmkz = 11052,
VPMOVSXDQZrr = 11053,
VPMOVSXDQZrrk = 11054,
VPMOVSXDQZrrkz = 11055,
VPMOVSXDQrm = 11056,
VPMOVSXDQrr = 11057,
VPMOVSXWDYrm = 11058,
VPMOVSXWDYrr = 11059,
VPMOVSXWDZ128rm = 11060,
VPMOVSXWDZ128rmk = 11061,
VPMOVSXWDZ128rmkz = 11062,
VPMOVSXWDZ128rr = 11063,
VPMOVSXWDZ128rrk = 11064,
VPMOVSXWDZ128rrkz = 11065,
VPMOVSXWDZ256rm = 11066,
VPMOVSXWDZ256rmk = 11067,
VPMOVSXWDZ256rmkz = 11068,
VPMOVSXWDZ256rr = 11069,
VPMOVSXWDZ256rrk = 11070,
VPMOVSXWDZ256rrkz = 11071,
VPMOVSXWDZrm = 11072,
VPMOVSXWDZrmk = 11073,
VPMOVSXWDZrmkz = 11074,
VPMOVSXWDZrr = 11075,
VPMOVSXWDZrrk = 11076,
VPMOVSXWDZrrkz = 11077,
VPMOVSXWDrm = 11078,
VPMOVSXWDrr = 11079,
VPMOVSXWQYrm = 11080,
VPMOVSXWQYrr = 11081,
VPMOVSXWQZ128rm = 11082,
VPMOVSXWQZ128rmk = 11083,
VPMOVSXWQZ128rmkz = 11084,
VPMOVSXWQZ128rr = 11085,
VPMOVSXWQZ128rrk = 11086,
VPMOVSXWQZ128rrkz = 11087,
VPMOVSXWQZ256rm = 11088,
VPMOVSXWQZ256rmk = 11089,
VPMOVSXWQZ256rmkz = 11090,
VPMOVSXWQZ256rr = 11091,
VPMOVSXWQZ256rrk = 11092,
VPMOVSXWQZ256rrkz = 11093,
VPMOVSXWQZrm = 11094,
VPMOVSXWQZrmk = 11095,
VPMOVSXWQZrmkz = 11096,
VPMOVSXWQZrr = 11097,
VPMOVSXWQZrrk = 11098,
VPMOVSXWQZrrkz = 11099,
VPMOVSXWQrm = 11100,
VPMOVSXWQrr = 11101,
VPMOVUSDBZ128mr = 11102,
VPMOVUSDBZ128mrk = 11103,
VPMOVUSDBZ128rr = 11104,
VPMOVUSDBZ128rrk = 11105,
VPMOVUSDBZ128rrkz = 11106,
VPMOVUSDBZ256mr = 11107,
VPMOVUSDBZ256mrk = 11108,
VPMOVUSDBZ256rr = 11109,
VPMOVUSDBZ256rrk = 11110,
VPMOVUSDBZ256rrkz = 11111,
VPMOVUSDBZmr = 11112,
VPMOVUSDBZmrk = 11113,
VPMOVUSDBZrr = 11114,
VPMOVUSDBZrrk = 11115,
VPMOVUSDBZrrkz = 11116,
VPMOVUSDWZ128mr = 11117,
VPMOVUSDWZ128mrk = 11118,
VPMOVUSDWZ128rr = 11119,
VPMOVUSDWZ128rrk = 11120,
VPMOVUSDWZ128rrkz = 11121,
VPMOVUSDWZ256mr = 11122,
VPMOVUSDWZ256mrk = 11123,
VPMOVUSDWZ256rr = 11124,
VPMOVUSDWZ256rrk = 11125,
VPMOVUSDWZ256rrkz = 11126,
VPMOVUSDWZmr = 11127,
VPMOVUSDWZmrk = 11128,
VPMOVUSDWZrr = 11129,
VPMOVUSDWZrrk = 11130,
VPMOVUSDWZrrkz = 11131,
VPMOVUSQBZ128mr = 11132,
VPMOVUSQBZ128mrk = 11133,
VPMOVUSQBZ128rr = 11134,
VPMOVUSQBZ128rrk = 11135,
VPMOVUSQBZ128rrkz = 11136,
VPMOVUSQBZ256mr = 11137,
VPMOVUSQBZ256mrk = 11138,
VPMOVUSQBZ256rr = 11139,
VPMOVUSQBZ256rrk = 11140,
VPMOVUSQBZ256rrkz = 11141,
VPMOVUSQBZmr = 11142,
VPMOVUSQBZmrk = 11143,
VPMOVUSQBZrr = 11144,
VPMOVUSQBZrrk = 11145,
VPMOVUSQBZrrkz = 11146,
VPMOVUSQDZ128mr = 11147,
VPMOVUSQDZ128mrk = 11148,
VPMOVUSQDZ128rr = 11149,
VPMOVUSQDZ128rrk = 11150,
VPMOVUSQDZ128rrkz = 11151,
VPMOVUSQDZ256mr = 11152,
VPMOVUSQDZ256mrk = 11153,
VPMOVUSQDZ256rr = 11154,
VPMOVUSQDZ256rrk = 11155,
VPMOVUSQDZ256rrkz = 11156,
VPMOVUSQDZmr = 11157,
VPMOVUSQDZmrk = 11158,
VPMOVUSQDZrr = 11159,
VPMOVUSQDZrrk = 11160,
VPMOVUSQDZrrkz = 11161,
VPMOVUSQWZ128mr = 11162,
VPMOVUSQWZ128mrk = 11163,
VPMOVUSQWZ128rr = 11164,
VPMOVUSQWZ128rrk = 11165,
VPMOVUSQWZ128rrkz = 11166,
VPMOVUSQWZ256mr = 11167,
VPMOVUSQWZ256mrk = 11168,
VPMOVUSQWZ256rr = 11169,
VPMOVUSQWZ256rrk = 11170,
VPMOVUSQWZ256rrkz = 11171,
VPMOVUSQWZmr = 11172,
VPMOVUSQWZmrk = 11173,
VPMOVUSQWZrr = 11174,
VPMOVUSQWZrrk = 11175,
VPMOVUSQWZrrkz = 11176,
VPMOVUSWBZ128mr = 11177,
VPMOVUSWBZ128mrk = 11178,
VPMOVUSWBZ128rr = 11179,
VPMOVUSWBZ128rrk = 11180,
VPMOVUSWBZ128rrkz = 11181,
VPMOVUSWBZ256mr = 11182,
VPMOVUSWBZ256mrk = 11183,
VPMOVUSWBZ256rr = 11184,
VPMOVUSWBZ256rrk = 11185,
VPMOVUSWBZ256rrkz = 11186,
VPMOVUSWBZmr = 11187,
VPMOVUSWBZmrk = 11188,
VPMOVUSWBZrr = 11189,
VPMOVUSWBZrrk = 11190,
VPMOVUSWBZrrkz = 11191,
VPMOVW2MZ128rr = 11192,
VPMOVW2MZ256rr = 11193,
VPMOVW2MZrr = 11194,
VPMOVWBZ128mr = 11195,
VPMOVWBZ128mrk = 11196,
VPMOVWBZ128rr = 11197,
VPMOVWBZ128rrk = 11198,
VPMOVWBZ128rrkz = 11199,
VPMOVWBZ256mr = 11200,
VPMOVWBZ256mrk = 11201,
VPMOVWBZ256rr = 11202,
VPMOVWBZ256rrk = 11203,
VPMOVWBZ256rrkz = 11204,
VPMOVWBZmr = 11205,
VPMOVWBZmrk = 11206,
VPMOVWBZrr = 11207,
VPMOVWBZrrk = 11208,
VPMOVWBZrrkz = 11209,
VPMOVZXBDYrm = 11210,
VPMOVZXBDYrr = 11211,
VPMOVZXBDZ128rm = 11212,
VPMOVZXBDZ128rmk = 11213,
VPMOVZXBDZ128rmkz = 11214,
VPMOVZXBDZ128rr = 11215,
VPMOVZXBDZ128rrk = 11216,
VPMOVZXBDZ128rrkz = 11217,
VPMOVZXBDZ256rm = 11218,
VPMOVZXBDZ256rmk = 11219,
VPMOVZXBDZ256rmkz = 11220,
VPMOVZXBDZ256rr = 11221,
VPMOVZXBDZ256rrk = 11222,
VPMOVZXBDZ256rrkz = 11223,
VPMOVZXBDZrm = 11224,
VPMOVZXBDZrmk = 11225,
VPMOVZXBDZrmkz = 11226,
VPMOVZXBDZrr = 11227,
VPMOVZXBDZrrk = 11228,
VPMOVZXBDZrrkz = 11229,
VPMOVZXBDrm = 11230,
VPMOVZXBDrr = 11231,
VPMOVZXBQYrm = 11232,
VPMOVZXBQYrr = 11233,
VPMOVZXBQZ128rm = 11234,
VPMOVZXBQZ128rmk = 11235,
VPMOVZXBQZ128rmkz = 11236,
VPMOVZXBQZ128rr = 11237,
VPMOVZXBQZ128rrk = 11238,
VPMOVZXBQZ128rrkz = 11239,
VPMOVZXBQZ256rm = 11240,
VPMOVZXBQZ256rmk = 11241,
VPMOVZXBQZ256rmkz = 11242,
VPMOVZXBQZ256rr = 11243,
VPMOVZXBQZ256rrk = 11244,
VPMOVZXBQZ256rrkz = 11245,
VPMOVZXBQZrm = 11246,
VPMOVZXBQZrmk = 11247,
VPMOVZXBQZrmkz = 11248,
VPMOVZXBQZrr = 11249,
VPMOVZXBQZrrk = 11250,
VPMOVZXBQZrrkz = 11251,
VPMOVZXBQrm = 11252,
VPMOVZXBQrr = 11253,
VPMOVZXBWYrm = 11254,
VPMOVZXBWYrr = 11255,
VPMOVZXBWZ128rm = 11256,
VPMOVZXBWZ128rmk = 11257,
VPMOVZXBWZ128rmkz = 11258,
VPMOVZXBWZ128rr = 11259,
VPMOVZXBWZ128rrk = 11260,
VPMOVZXBWZ128rrkz = 11261,
VPMOVZXBWZ256rm = 11262,
VPMOVZXBWZ256rmk = 11263,
VPMOVZXBWZ256rmkz = 11264,
VPMOVZXBWZ256rr = 11265,
VPMOVZXBWZ256rrk = 11266,
VPMOVZXBWZ256rrkz = 11267,
VPMOVZXBWZrm = 11268,
VPMOVZXBWZrmk = 11269,
VPMOVZXBWZrmkz = 11270,
VPMOVZXBWZrr = 11271,
VPMOVZXBWZrrk = 11272,
VPMOVZXBWZrrkz = 11273,
VPMOVZXBWrm = 11274,
VPMOVZXBWrr = 11275,
VPMOVZXDQYrm = 11276,
VPMOVZXDQYrr = 11277,
VPMOVZXDQZ128rm = 11278,
VPMOVZXDQZ128rmk = 11279,
VPMOVZXDQZ128rmkz = 11280,
VPMOVZXDQZ128rr = 11281,
VPMOVZXDQZ128rrk = 11282,
VPMOVZXDQZ128rrkz = 11283,
VPMOVZXDQZ256rm = 11284,
VPMOVZXDQZ256rmk = 11285,
VPMOVZXDQZ256rmkz = 11286,
VPMOVZXDQZ256rr = 11287,
VPMOVZXDQZ256rrk = 11288,
VPMOVZXDQZ256rrkz = 11289,
VPMOVZXDQZrm = 11290,
VPMOVZXDQZrmk = 11291,
VPMOVZXDQZrmkz = 11292,
VPMOVZXDQZrr = 11293,
VPMOVZXDQZrrk = 11294,
VPMOVZXDQZrrkz = 11295,
VPMOVZXDQrm = 11296,
VPMOVZXDQrr = 11297,
VPMOVZXWDYrm = 11298,
VPMOVZXWDYrr = 11299,
VPMOVZXWDZ128rm = 11300,
VPMOVZXWDZ128rmk = 11301,
VPMOVZXWDZ128rmkz = 11302,
VPMOVZXWDZ128rr = 11303,
VPMOVZXWDZ128rrk = 11304,
VPMOVZXWDZ128rrkz = 11305,
VPMOVZXWDZ256rm = 11306,
VPMOVZXWDZ256rmk = 11307,
VPMOVZXWDZ256rmkz = 11308,
VPMOVZXWDZ256rr = 11309,
VPMOVZXWDZ256rrk = 11310,
VPMOVZXWDZ256rrkz = 11311,
VPMOVZXWDZrm = 11312,
VPMOVZXWDZrmk = 11313,
VPMOVZXWDZrmkz = 11314,
VPMOVZXWDZrr = 11315,
VPMOVZXWDZrrk = 11316,
VPMOVZXWDZrrkz = 11317,
VPMOVZXWDrm = 11318,
VPMOVZXWDrr = 11319,
VPMOVZXWQYrm = 11320,
VPMOVZXWQYrr = 11321,
VPMOVZXWQZ128rm = 11322,
VPMOVZXWQZ128rmk = 11323,
VPMOVZXWQZ128rmkz = 11324,
VPMOVZXWQZ128rr = 11325,
VPMOVZXWQZ128rrk = 11326,
VPMOVZXWQZ128rrkz = 11327,
VPMOVZXWQZ256rm = 11328,
VPMOVZXWQZ256rmk = 11329,
VPMOVZXWQZ256rmkz = 11330,
VPMOVZXWQZ256rr = 11331,
VPMOVZXWQZ256rrk = 11332,
VPMOVZXWQZ256rrkz = 11333,
VPMOVZXWQZrm = 11334,
VPMOVZXWQZrmk = 11335,
VPMOVZXWQZrmkz = 11336,
VPMOVZXWQZrr = 11337,
VPMOVZXWQZrrk = 11338,
VPMOVZXWQZrrkz = 11339,
VPMOVZXWQrm = 11340,
VPMOVZXWQrr = 11341,
VPMULDQYrm = 11342,
VPMULDQYrr = 11343,
VPMULDQZ128rm = 11344,
VPMULDQZ128rmb = 11345,
VPMULDQZ128rmbk = 11346,
VPMULDQZ128rmbkz = 11347,
VPMULDQZ128rmk = 11348,
VPMULDQZ128rmkz = 11349,
VPMULDQZ128rr = 11350,
VPMULDQZ128rrk = 11351,
VPMULDQZ128rrkz = 11352,
VPMULDQZ256rm = 11353,
VPMULDQZ256rmb = 11354,
VPMULDQZ256rmbk = 11355,
VPMULDQZ256rmbkz = 11356,
VPMULDQZ256rmk = 11357,
VPMULDQZ256rmkz = 11358,
VPMULDQZ256rr = 11359,
VPMULDQZ256rrk = 11360,
VPMULDQZ256rrkz = 11361,
VPMULDQZrm = 11362,
VPMULDQZrmb = 11363,
VPMULDQZrmbk = 11364,
VPMULDQZrmbkz = 11365,
VPMULDQZrmk = 11366,
VPMULDQZrmkz = 11367,
VPMULDQZrr = 11368,
VPMULDQZrrk = 11369,
VPMULDQZrrkz = 11370,
VPMULDQrm = 11371,
VPMULDQrr = 11372,
VPMULHRSWZ128rm = 11373,
VPMULHRSWZ128rmk = 11374,
VPMULHRSWZ128rmkz = 11375,
VPMULHRSWZ128rr = 11376,
VPMULHRSWZ128rrk = 11377,
VPMULHRSWZ128rrkz = 11378,
VPMULHRSWZ256rm = 11379,
VPMULHRSWZ256rmk = 11380,
VPMULHRSWZ256rmkz = 11381,
VPMULHRSWZ256rr = 11382,
VPMULHRSWZ256rrk = 11383,
VPMULHRSWZ256rrkz = 11384,
VPMULHRSWZrm = 11385,
VPMULHRSWZrmk = 11386,
VPMULHRSWZrmkz = 11387,
VPMULHRSWZrr = 11388,
VPMULHRSWZrrk = 11389,
VPMULHRSWZrrkz = 11390,
VPMULHRSWrm128 = 11391,
VPMULHRSWrm256 = 11392,
VPMULHRSWrr128 = 11393,
VPMULHRSWrr256 = 11394,
VPMULHUWYrm = 11395,
VPMULHUWYrr = 11396,
VPMULHUWZ128rm = 11397,
VPMULHUWZ128rmk = 11398,
VPMULHUWZ128rmkz = 11399,
VPMULHUWZ128rr = 11400,
VPMULHUWZ128rrk = 11401,
VPMULHUWZ128rrkz = 11402,
VPMULHUWZ256rm = 11403,
VPMULHUWZ256rmk = 11404,
VPMULHUWZ256rmkz = 11405,
VPMULHUWZ256rr = 11406,
VPMULHUWZ256rrk = 11407,
VPMULHUWZ256rrkz = 11408,
VPMULHUWZrm = 11409,
VPMULHUWZrmk = 11410,
VPMULHUWZrmkz = 11411,
VPMULHUWZrr = 11412,
VPMULHUWZrrk = 11413,
VPMULHUWZrrkz = 11414,
VPMULHUWrm = 11415,
VPMULHUWrr = 11416,
VPMULHWYrm = 11417,
VPMULHWYrr = 11418,
VPMULHWZ128rm = 11419,
VPMULHWZ128rmk = 11420,
VPMULHWZ128rmkz = 11421,
VPMULHWZ128rr = 11422,
VPMULHWZ128rrk = 11423,
VPMULHWZ128rrkz = 11424,
VPMULHWZ256rm = 11425,
VPMULHWZ256rmk = 11426,
VPMULHWZ256rmkz = 11427,
VPMULHWZ256rr = 11428,
VPMULHWZ256rrk = 11429,
VPMULHWZ256rrkz = 11430,
VPMULHWZrm = 11431,
VPMULHWZrmk = 11432,
VPMULHWZrmkz = 11433,
VPMULHWZrr = 11434,
VPMULHWZrrk = 11435,
VPMULHWZrrkz = 11436,
VPMULHWrm = 11437,
VPMULHWrr = 11438,
VPMULLDYrm = 11439,
VPMULLDYrr = 11440,
VPMULLDZ128rm = 11441,
VPMULLDZ128rmb = 11442,
VPMULLDZ128rmbk = 11443,
VPMULLDZ128rmbkz = 11444,
VPMULLDZ128rmk = 11445,
VPMULLDZ128rmkz = 11446,
VPMULLDZ128rr = 11447,
VPMULLDZ128rrk = 11448,
VPMULLDZ128rrkz = 11449,
VPMULLDZ256rm = 11450,
VPMULLDZ256rmb = 11451,
VPMULLDZ256rmbk = 11452,
VPMULLDZ256rmbkz = 11453,
VPMULLDZ256rmk = 11454,
VPMULLDZ256rmkz = 11455,
VPMULLDZ256rr = 11456,
VPMULLDZ256rrk = 11457,
VPMULLDZ256rrkz = 11458,
VPMULLDZrm = 11459,
VPMULLDZrmb = 11460,
VPMULLDZrmbk = 11461,
VPMULLDZrmbkz = 11462,
VPMULLDZrmk = 11463,
VPMULLDZrmkz = 11464,
VPMULLDZrr = 11465,
VPMULLDZrrk = 11466,
VPMULLDZrrkz = 11467,
VPMULLDrm = 11468,
VPMULLDrr = 11469,
VPMULLQZ128rm = 11470,
VPMULLQZ128rmb = 11471,
VPMULLQZ128rmbk = 11472,
VPMULLQZ128rmbkz = 11473,
VPMULLQZ128rmk = 11474,
VPMULLQZ128rmkz = 11475,
VPMULLQZ128rr = 11476,
VPMULLQZ128rrk = 11477,
VPMULLQZ128rrkz = 11478,
VPMULLQZ256rm = 11479,
VPMULLQZ256rmb = 11480,
VPMULLQZ256rmbk = 11481,
VPMULLQZ256rmbkz = 11482,
VPMULLQZ256rmk = 11483,
VPMULLQZ256rmkz = 11484,
VPMULLQZ256rr = 11485,
VPMULLQZ256rrk = 11486,
VPMULLQZ256rrkz = 11487,
VPMULLQZrm = 11488,
VPMULLQZrmb = 11489,
VPMULLQZrmbk = 11490,
VPMULLQZrmbkz = 11491,
VPMULLQZrmk = 11492,
VPMULLQZrmkz = 11493,
VPMULLQZrr = 11494,
VPMULLQZrrk = 11495,
VPMULLQZrrkz = 11496,
VPMULLWYrm = 11497,
VPMULLWYrr = 11498,
VPMULLWZ128rm = 11499,
VPMULLWZ128rmk = 11500,
VPMULLWZ128rmkz = 11501,
VPMULLWZ128rr = 11502,
VPMULLWZ128rrk = 11503,
VPMULLWZ128rrkz = 11504,
VPMULLWZ256rm = 11505,
VPMULLWZ256rmk = 11506,
VPMULLWZ256rmkz = 11507,
VPMULLWZ256rr = 11508,
VPMULLWZ256rrk = 11509,
VPMULLWZ256rrkz = 11510,
VPMULLWZrm = 11511,
VPMULLWZrmk = 11512,
VPMULLWZrmkz = 11513,
VPMULLWZrr = 11514,
VPMULLWZrrk = 11515,
VPMULLWZrrkz = 11516,
VPMULLWrm = 11517,
VPMULLWrr = 11518,
VPMULTISHIFTQBZ128rm = 11519,
VPMULTISHIFTQBZ128rmb = 11520,
VPMULTISHIFTQBZ128rmbk = 11521,
VPMULTISHIFTQBZ128rmbkz = 11522,
VPMULTISHIFTQBZ128rmk = 11523,
VPMULTISHIFTQBZ128rmkz = 11524,
VPMULTISHIFTQBZ128rr = 11525,
VPMULTISHIFTQBZ128rrk = 11526,
VPMULTISHIFTQBZ128rrkz = 11527,
VPMULTISHIFTQBZ256rm = 11528,
VPMULTISHIFTQBZ256rmb = 11529,
VPMULTISHIFTQBZ256rmbk = 11530,
VPMULTISHIFTQBZ256rmbkz = 11531,
VPMULTISHIFTQBZ256rmk = 11532,
VPMULTISHIFTQBZ256rmkz = 11533,
VPMULTISHIFTQBZ256rr = 11534,
VPMULTISHIFTQBZ256rrk = 11535,
VPMULTISHIFTQBZ256rrkz = 11536,
VPMULTISHIFTQBZrm = 11537,
VPMULTISHIFTQBZrmb = 11538,
VPMULTISHIFTQBZrmbk = 11539,
VPMULTISHIFTQBZrmbkz = 11540,
VPMULTISHIFTQBZrmk = 11541,
VPMULTISHIFTQBZrmkz = 11542,
VPMULTISHIFTQBZrr = 11543,
VPMULTISHIFTQBZrrk = 11544,
VPMULTISHIFTQBZrrkz = 11545,
VPMULUDQYrm = 11546,
VPMULUDQYrr = 11547,
VPMULUDQZ128rm = 11548,
VPMULUDQZ128rmb = 11549,
VPMULUDQZ128rmbk = 11550,
VPMULUDQZ128rmbkz = 11551,
VPMULUDQZ128rmk = 11552,
VPMULUDQZ128rmkz = 11553,
VPMULUDQZ128rr = 11554,
VPMULUDQZ128rrk = 11555,
VPMULUDQZ128rrkz = 11556,
VPMULUDQZ256rm = 11557,
VPMULUDQZ256rmb = 11558,
VPMULUDQZ256rmbk = 11559,
VPMULUDQZ256rmbkz = 11560,
VPMULUDQZ256rmk = 11561,
VPMULUDQZ256rmkz = 11562,
VPMULUDQZ256rr = 11563,
VPMULUDQZ256rrk = 11564,
VPMULUDQZ256rrkz = 11565,
VPMULUDQZrm = 11566,
VPMULUDQZrmb = 11567,
VPMULUDQZrmbk = 11568,
VPMULUDQZrmbkz = 11569,
VPMULUDQZrmk = 11570,
VPMULUDQZrmkz = 11571,
VPMULUDQZrr = 11572,
VPMULUDQZrrk = 11573,
VPMULUDQZrrkz = 11574,
VPMULUDQrm = 11575,
VPMULUDQrr = 11576,
VPORDZ128rm = 11577,
VPORDZ128rmb = 11578,
VPORDZ128rmbk = 11579,
VPORDZ128rmbkz = 11580,
VPORDZ128rmk = 11581,
VPORDZ128rmkz = 11582,
VPORDZ128rr = 11583,
VPORDZ128rrk = 11584,
VPORDZ128rrkz = 11585,
VPORDZ256rm = 11586,
VPORDZ256rmb = 11587,
VPORDZ256rmbk = 11588,
VPORDZ256rmbkz = 11589,
VPORDZ256rmk = 11590,
VPORDZ256rmkz = 11591,
VPORDZ256rr = 11592,
VPORDZ256rrk = 11593,
VPORDZ256rrkz = 11594,
VPORDZrm = 11595,
VPORDZrmb = 11596,
VPORDZrmbk = 11597,
VPORDZrmbkz = 11598,
VPORDZrmk = 11599,
VPORDZrmkz = 11600,
VPORDZrr = 11601,
VPORDZrrk = 11602,
VPORDZrrkz = 11603,
VPORQZ128rm = 11604,
VPORQZ128rmb = 11605,
VPORQZ128rmbk = 11606,
VPORQZ128rmbkz = 11607,
VPORQZ128rmk = 11608,
VPORQZ128rmkz = 11609,
VPORQZ128rr = 11610,
VPORQZ128rrk = 11611,
VPORQZ128rrkz = 11612,
VPORQZ256rm = 11613,
VPORQZ256rmb = 11614,
VPORQZ256rmbk = 11615,
VPORQZ256rmbkz = 11616,
VPORQZ256rmk = 11617,
VPORQZ256rmkz = 11618,
VPORQZ256rr = 11619,
VPORQZ256rrk = 11620,
VPORQZ256rrkz = 11621,
VPORQZrm = 11622,
VPORQZrmb = 11623,
VPORQZrmbk = 11624,
VPORQZrmbkz = 11625,
VPORQZrmk = 11626,
VPORQZrmkz = 11627,
VPORQZrr = 11628,
VPORQZrrk = 11629,
VPORQZrrkz = 11630,
VPORYrm = 11631,
VPORYrr = 11632,
VPORrm = 11633,
VPORrr = 11634,
VPPERMmr = 11635,
VPPERMrm = 11636,
VPPERMrr = 11637,
VPROLDZ128mbi = 11638,
VPROLDZ128mbik = 11639,
VPROLDZ128mbikz = 11640,
VPROLDZ128mi = 11641,
VPROLDZ128mik = 11642,
VPROLDZ128mikz = 11643,
VPROLDZ128ri = 11644,
VPROLDZ128rik = 11645,
VPROLDZ128rikz = 11646,
VPROLDZ256mbi = 11647,
VPROLDZ256mbik = 11648,
VPROLDZ256mbikz = 11649,
VPROLDZ256mi = 11650,
VPROLDZ256mik = 11651,
VPROLDZ256mikz = 11652,
VPROLDZ256ri = 11653,
VPROLDZ256rik = 11654,
VPROLDZ256rikz = 11655,
VPROLDZmbi = 11656,
VPROLDZmbik = 11657,
VPROLDZmbikz = 11658,
VPROLDZmi = 11659,
VPROLDZmik = 11660,
VPROLDZmikz = 11661,
VPROLDZri = 11662,
VPROLDZrik = 11663,
VPROLDZrikz = 11664,
VPROLQZ128mbi = 11665,
VPROLQZ128mbik = 11666,
VPROLQZ128mbikz = 11667,
VPROLQZ128mi = 11668,
VPROLQZ128mik = 11669,
VPROLQZ128mikz = 11670,
VPROLQZ128ri = 11671,
VPROLQZ128rik = 11672,
VPROLQZ128rikz = 11673,
VPROLQZ256mbi = 11674,
VPROLQZ256mbik = 11675,
VPROLQZ256mbikz = 11676,
VPROLQZ256mi = 11677,
VPROLQZ256mik = 11678,
VPROLQZ256mikz = 11679,
VPROLQZ256ri = 11680,
VPROLQZ256rik = 11681,
VPROLQZ256rikz = 11682,
VPROLQZmbi = 11683,
VPROLQZmbik = 11684,
VPROLQZmbikz = 11685,
VPROLQZmi = 11686,
VPROLQZmik = 11687,
VPROLQZmikz = 11688,
VPROLQZri = 11689,
VPROLQZrik = 11690,
VPROLQZrikz = 11691,
VPROLVDZ128rm = 11692,
VPROLVDZ128rmb = 11693,
VPROLVDZ128rmbk = 11694,
VPROLVDZ128rmbkz = 11695,
VPROLVDZ128rmk = 11696,
VPROLVDZ128rmkz = 11697,
VPROLVDZ128rr = 11698,
VPROLVDZ128rrk = 11699,
VPROLVDZ128rrkz = 11700,
VPROLVDZ256rm = 11701,
VPROLVDZ256rmb = 11702,
VPROLVDZ256rmbk = 11703,
VPROLVDZ256rmbkz = 11704,
VPROLVDZ256rmk = 11705,
VPROLVDZ256rmkz = 11706,
VPROLVDZ256rr = 11707,
VPROLVDZ256rrk = 11708,
VPROLVDZ256rrkz = 11709,
VPROLVDZrm = 11710,
VPROLVDZrmb = 11711,
VPROLVDZrmbk = 11712,
VPROLVDZrmbkz = 11713,
VPROLVDZrmk = 11714,
VPROLVDZrmkz = 11715,
VPROLVDZrr = 11716,
VPROLVDZrrk = 11717,
VPROLVDZrrkz = 11718,
VPROLVQZ128rm = 11719,
VPROLVQZ128rmb = 11720,
VPROLVQZ128rmbk = 11721,
VPROLVQZ128rmbkz = 11722,
VPROLVQZ128rmk = 11723,
VPROLVQZ128rmkz = 11724,
VPROLVQZ128rr = 11725,
VPROLVQZ128rrk = 11726,
VPROLVQZ128rrkz = 11727,
VPROLVQZ256rm = 11728,
VPROLVQZ256rmb = 11729,
VPROLVQZ256rmbk = 11730,
VPROLVQZ256rmbkz = 11731,
VPROLVQZ256rmk = 11732,
VPROLVQZ256rmkz = 11733,
VPROLVQZ256rr = 11734,
VPROLVQZ256rrk = 11735,
VPROLVQZ256rrkz = 11736,
VPROLVQZrm = 11737,
VPROLVQZrmb = 11738,
VPROLVQZrmbk = 11739,
VPROLVQZrmbkz = 11740,
VPROLVQZrmk = 11741,
VPROLVQZrmkz = 11742,
VPROLVQZrr = 11743,
VPROLVQZrrk = 11744,
VPROLVQZrrkz = 11745,
VPRORDZ128mbi = 11746,
VPRORDZ128mbik = 11747,
VPRORDZ128mbikz = 11748,
VPRORDZ128mi = 11749,
VPRORDZ128mik = 11750,
VPRORDZ128mikz = 11751,
VPRORDZ128ri = 11752,
VPRORDZ128rik = 11753,
VPRORDZ128rikz = 11754,
VPRORDZ256mbi = 11755,
VPRORDZ256mbik = 11756,
VPRORDZ256mbikz = 11757,
VPRORDZ256mi = 11758,
VPRORDZ256mik = 11759,
VPRORDZ256mikz = 11760,
VPRORDZ256ri = 11761,
VPRORDZ256rik = 11762,
VPRORDZ256rikz = 11763,
VPRORDZmbi = 11764,
VPRORDZmbik = 11765,
VPRORDZmbikz = 11766,
VPRORDZmi = 11767,
VPRORDZmik = 11768,
VPRORDZmikz = 11769,
VPRORDZri = 11770,
VPRORDZrik = 11771,
VPRORDZrikz = 11772,
VPRORQZ128mbi = 11773,
VPRORQZ128mbik = 11774,
VPRORQZ128mbikz = 11775,
VPRORQZ128mi = 11776,
VPRORQZ128mik = 11777,
VPRORQZ128mikz = 11778,
VPRORQZ128ri = 11779,
VPRORQZ128rik = 11780,
VPRORQZ128rikz = 11781,
VPRORQZ256mbi = 11782,
VPRORQZ256mbik = 11783,
VPRORQZ256mbikz = 11784,
VPRORQZ256mi = 11785,
VPRORQZ256mik = 11786,
VPRORQZ256mikz = 11787,
VPRORQZ256ri = 11788,
VPRORQZ256rik = 11789,
VPRORQZ256rikz = 11790,
VPRORQZmbi = 11791,
VPRORQZmbik = 11792,
VPRORQZmbikz = 11793,
VPRORQZmi = 11794,
VPRORQZmik = 11795,
VPRORQZmikz = 11796,
VPRORQZri = 11797,
VPRORQZrik = 11798,
VPRORQZrikz = 11799,
VPRORVDZ128rm = 11800,
VPRORVDZ128rmb = 11801,
VPRORVDZ128rmbk = 11802,
VPRORVDZ128rmbkz = 11803,
VPRORVDZ128rmk = 11804,
VPRORVDZ128rmkz = 11805,
VPRORVDZ128rr = 11806,
VPRORVDZ128rrk = 11807,
VPRORVDZ128rrkz = 11808,
VPRORVDZ256rm = 11809,
VPRORVDZ256rmb = 11810,
VPRORVDZ256rmbk = 11811,
VPRORVDZ256rmbkz = 11812,
VPRORVDZ256rmk = 11813,
VPRORVDZ256rmkz = 11814,
VPRORVDZ256rr = 11815,
VPRORVDZ256rrk = 11816,
VPRORVDZ256rrkz = 11817,
VPRORVDZrm = 11818,
VPRORVDZrmb = 11819,
VPRORVDZrmbk = 11820,
VPRORVDZrmbkz = 11821,
VPRORVDZrmk = 11822,
VPRORVDZrmkz = 11823,
VPRORVDZrr = 11824,
VPRORVDZrrk = 11825,
VPRORVDZrrkz = 11826,
VPRORVQZ128rm = 11827,
VPRORVQZ128rmb = 11828,
VPRORVQZ128rmbk = 11829,
VPRORVQZ128rmbkz = 11830,
VPRORVQZ128rmk = 11831,
VPRORVQZ128rmkz = 11832,
VPRORVQZ128rr = 11833,
VPRORVQZ128rrk = 11834,
VPRORVQZ128rrkz = 11835,
VPRORVQZ256rm = 11836,
VPRORVQZ256rmb = 11837,
VPRORVQZ256rmbk = 11838,
VPRORVQZ256rmbkz = 11839,
VPRORVQZ256rmk = 11840,
VPRORVQZ256rmkz = 11841,
VPRORVQZ256rr = 11842,
VPRORVQZ256rrk = 11843,
VPRORVQZ256rrkz = 11844,
VPRORVQZrm = 11845,
VPRORVQZrmb = 11846,
VPRORVQZrmbk = 11847,
VPRORVQZrmbkz = 11848,
VPRORVQZrmk = 11849,
VPRORVQZrmkz = 11850,
VPRORVQZrr = 11851,
VPRORVQZrrk = 11852,
VPRORVQZrrkz = 11853,
VPROTBmi = 11854,
VPROTBmr = 11855,
VPROTBri = 11856,
VPROTBrm = 11857,
VPROTBrr = 11858,
VPROTDmi = 11859,
VPROTDmr = 11860,
VPROTDri = 11861,
VPROTDrm = 11862,
VPROTDrr = 11863,
VPROTQmi = 11864,
VPROTQmr = 11865,
VPROTQri = 11866,
VPROTQrm = 11867,
VPROTQrr = 11868,
VPROTWmi = 11869,
VPROTWmr = 11870,
VPROTWri = 11871,
VPROTWrm = 11872,
VPROTWrr = 11873,
VPSADBWYrm = 11874,
VPSADBWYrr = 11875,
VPSADBWZ128rm = 11876,
VPSADBWZ128rr = 11877,
VPSADBWZ256rm = 11878,
VPSADBWZ256rr = 11879,
VPSADBWZ512rm = 11880,
VPSADBWZ512rr = 11881,
VPSADBWrm = 11882,
VPSADBWrr = 11883,
VPSCATTERDDZ128mr = 11884,
VPSCATTERDDZ256mr = 11885,
VPSCATTERDDZmr = 11886,
VPSCATTERDQZ128mr = 11887,
VPSCATTERDQZ256mr = 11888,
VPSCATTERDQZmr = 11889,
VPSCATTERQDZ128mr = 11890,
VPSCATTERQDZ256mr = 11891,
VPSCATTERQDZmr = 11892,
VPSCATTERQQZ128mr = 11893,
VPSCATTERQQZ256mr = 11894,
VPSCATTERQQZmr = 11895,
VPSHABmr = 11896,
VPSHABrm = 11897,
VPSHABrr = 11898,
VPSHADmr = 11899,
VPSHADrm = 11900,
VPSHADrr = 11901,
VPSHAQmr = 11902,
VPSHAQrm = 11903,
VPSHAQrr = 11904,
VPSHAWmr = 11905,
VPSHAWrm = 11906,
VPSHAWrr = 11907,
VPSHLBmr = 11908,
VPSHLBrm = 11909,
VPSHLBrr = 11910,
VPSHLDmr = 11911,
VPSHLDrm = 11912,
VPSHLDrr = 11913,
VPSHLQmr = 11914,
VPSHLQrm = 11915,
VPSHLQrr = 11916,
VPSHLWmr = 11917,
VPSHLWrm = 11918,
VPSHLWrr = 11919,
VPSHUFBYrm = 11920,
VPSHUFBYrr = 11921,
VPSHUFBZ128rm = 11922,
VPSHUFBZ128rmk = 11923,
VPSHUFBZ128rmkz = 11924,
VPSHUFBZ128rr = 11925,
VPSHUFBZ128rrk = 11926,
VPSHUFBZ128rrkz = 11927,
VPSHUFBZ256rm = 11928,
VPSHUFBZ256rmk = 11929,
VPSHUFBZ256rmkz = 11930,
VPSHUFBZ256rr = 11931,
VPSHUFBZ256rrk = 11932,
VPSHUFBZ256rrkz = 11933,
VPSHUFBZrm = 11934,
VPSHUFBZrmk = 11935,
VPSHUFBZrmkz = 11936,
VPSHUFBZrr = 11937,
VPSHUFBZrrk = 11938,
VPSHUFBZrrkz = 11939,
VPSHUFBrm = 11940,
VPSHUFBrr = 11941,
VPSHUFDYmi = 11942,
VPSHUFDYri = 11943,
VPSHUFDZ128mbi = 11944,
VPSHUFDZ128mbik = 11945,
VPSHUFDZ128mbikz = 11946,
VPSHUFDZ128mi = 11947,
VPSHUFDZ128mik = 11948,
VPSHUFDZ128mikz = 11949,
VPSHUFDZ128ri = 11950,
VPSHUFDZ128rik = 11951,
VPSHUFDZ128rikz = 11952,
VPSHUFDZ256mbi = 11953,
VPSHUFDZ256mbik = 11954,
VPSHUFDZ256mbikz = 11955,
VPSHUFDZ256mi = 11956,
VPSHUFDZ256mik = 11957,
VPSHUFDZ256mikz = 11958,
VPSHUFDZ256ri = 11959,
VPSHUFDZ256rik = 11960,
VPSHUFDZ256rikz = 11961,
VPSHUFDZmbi = 11962,
VPSHUFDZmbik = 11963,
VPSHUFDZmbikz = 11964,
VPSHUFDZmi = 11965,
VPSHUFDZmik = 11966,
VPSHUFDZmikz = 11967,
VPSHUFDZri = 11968,
VPSHUFDZrik = 11969,
VPSHUFDZrikz = 11970,
VPSHUFDmi = 11971,
VPSHUFDri = 11972,
VPSHUFHWYmi = 11973,
VPSHUFHWYri = 11974,
VPSHUFHWZ128mi = 11975,
VPSHUFHWZ128mik = 11976,
VPSHUFHWZ128mikz = 11977,
VPSHUFHWZ128ri = 11978,
VPSHUFHWZ128rik = 11979,
VPSHUFHWZ128rikz = 11980,
VPSHUFHWZ256mi = 11981,
VPSHUFHWZ256mik = 11982,
VPSHUFHWZ256mikz = 11983,
VPSHUFHWZ256ri = 11984,
VPSHUFHWZ256rik = 11985,
VPSHUFHWZ256rikz = 11986,
VPSHUFHWZmi = 11987,
VPSHUFHWZmik = 11988,
VPSHUFHWZmikz = 11989,
VPSHUFHWZri = 11990,
VPSHUFHWZrik = 11991,
VPSHUFHWZrikz = 11992,
VPSHUFHWmi = 11993,
VPSHUFHWri = 11994,
VPSHUFLWYmi = 11995,
VPSHUFLWYri = 11996,
VPSHUFLWZ128mi = 11997,
VPSHUFLWZ128mik = 11998,
VPSHUFLWZ128mikz = 11999,
VPSHUFLWZ128ri = 12000,
VPSHUFLWZ128rik = 12001,
VPSHUFLWZ128rikz = 12002,
VPSHUFLWZ256mi = 12003,
VPSHUFLWZ256mik = 12004,
VPSHUFLWZ256mikz = 12005,
VPSHUFLWZ256ri = 12006,
VPSHUFLWZ256rik = 12007,
VPSHUFLWZ256rikz = 12008,
VPSHUFLWZmi = 12009,
VPSHUFLWZmik = 12010,
VPSHUFLWZmikz = 12011,
VPSHUFLWZri = 12012,
VPSHUFLWZrik = 12013,
VPSHUFLWZrikz = 12014,
VPSHUFLWmi = 12015,
VPSHUFLWri = 12016,
VPSIGNBYrm = 12017,
VPSIGNBYrr = 12018,
VPSIGNBrm = 12019,
VPSIGNBrr = 12020,
VPSIGNDYrm = 12021,
VPSIGNDYrr = 12022,
VPSIGNDrm = 12023,
VPSIGNDrr = 12024,
VPSIGNWYrm = 12025,
VPSIGNWYrr = 12026,
VPSIGNWrm = 12027,
VPSIGNWrr = 12028,
VPSLLDQYri = 12029,
VPSLLDQZ128rm = 12030,
VPSLLDQZ128rr = 12031,
VPSLLDQZ256rm = 12032,
VPSLLDQZ256rr = 12033,
VPSLLDQZ512rm = 12034,
VPSLLDQZ512rr = 12035,
VPSLLDQri = 12036,
VPSLLDYri = 12037,
VPSLLDYrm = 12038,
VPSLLDYrr = 12039,
VPSLLDZ128mbi = 12040,
VPSLLDZ128mbik = 12041,
VPSLLDZ128mbikz = 12042,
VPSLLDZ128mi = 12043,
VPSLLDZ128mik = 12044,
VPSLLDZ128mikz = 12045,
VPSLLDZ128ri = 12046,
VPSLLDZ128rik = 12047,
VPSLLDZ128rikz = 12048,
VPSLLDZ128rm = 12049,
VPSLLDZ128rmk = 12050,
VPSLLDZ128rmkz = 12051,
VPSLLDZ128rr = 12052,
VPSLLDZ128rrk = 12053,
VPSLLDZ128rrkz = 12054,
VPSLLDZ256mbi = 12055,
VPSLLDZ256mbik = 12056,
VPSLLDZ256mbikz = 12057,
VPSLLDZ256mi = 12058,
VPSLLDZ256mik = 12059,
VPSLLDZ256mikz = 12060,
VPSLLDZ256ri = 12061,
VPSLLDZ256rik = 12062,
VPSLLDZ256rikz = 12063,
VPSLLDZ256rm = 12064,
VPSLLDZ256rmk = 12065,
VPSLLDZ256rmkz = 12066,
VPSLLDZ256rr = 12067,
VPSLLDZ256rrk = 12068,
VPSLLDZ256rrkz = 12069,
VPSLLDZmbi = 12070,
VPSLLDZmbik = 12071,
VPSLLDZmbikz = 12072,
VPSLLDZmi = 12073,
VPSLLDZmik = 12074,
VPSLLDZmikz = 12075,
VPSLLDZri = 12076,
VPSLLDZrik = 12077,
VPSLLDZrikz = 12078,
VPSLLDZrm = 12079,
VPSLLDZrmk = 12080,
VPSLLDZrmkz = 12081,
VPSLLDZrr = 12082,
VPSLLDZrrk = 12083,
VPSLLDZrrkz = 12084,
VPSLLDri = 12085,
VPSLLDrm = 12086,
VPSLLDrr = 12087,
VPSLLQYri = 12088,
VPSLLQYrm = 12089,
VPSLLQYrr = 12090,
VPSLLQZ128mbi = 12091,
VPSLLQZ128mbik = 12092,
VPSLLQZ128mbikz = 12093,
VPSLLQZ128mi = 12094,
VPSLLQZ128mik = 12095,
VPSLLQZ128mikz = 12096,
VPSLLQZ128ri = 12097,
VPSLLQZ128rik = 12098,
VPSLLQZ128rikz = 12099,
VPSLLQZ128rm = 12100,
VPSLLQZ128rmk = 12101,
VPSLLQZ128rmkz = 12102,
VPSLLQZ128rr = 12103,
VPSLLQZ128rrk = 12104,
VPSLLQZ128rrkz = 12105,
VPSLLQZ256mbi = 12106,
VPSLLQZ256mbik = 12107,
VPSLLQZ256mbikz = 12108,
VPSLLQZ256mi = 12109,
VPSLLQZ256mik = 12110,
VPSLLQZ256mikz = 12111,
VPSLLQZ256ri = 12112,
VPSLLQZ256rik = 12113,
VPSLLQZ256rikz = 12114,
VPSLLQZ256rm = 12115,
VPSLLQZ256rmk = 12116,
VPSLLQZ256rmkz = 12117,
VPSLLQZ256rr = 12118,
VPSLLQZ256rrk = 12119,
VPSLLQZ256rrkz = 12120,
VPSLLQZmbi = 12121,
VPSLLQZmbik = 12122,
VPSLLQZmbikz = 12123,
VPSLLQZmi = 12124,
VPSLLQZmik = 12125,
VPSLLQZmikz = 12126,
VPSLLQZri = 12127,
VPSLLQZrik = 12128,
VPSLLQZrikz = 12129,
VPSLLQZrm = 12130,
VPSLLQZrmk = 12131,
VPSLLQZrmkz = 12132,
VPSLLQZrr = 12133,
VPSLLQZrrk = 12134,
VPSLLQZrrkz = 12135,
VPSLLQri = 12136,
VPSLLQrm = 12137,
VPSLLQrr = 12138,
VPSLLVDYrm = 12139,
VPSLLVDYrr = 12140,
VPSLLVDZ128rm = 12141,
VPSLLVDZ128rmb = 12142,
VPSLLVDZ128rmbk = 12143,
VPSLLVDZ128rmbkz = 12144,
VPSLLVDZ128rmk = 12145,
VPSLLVDZ128rmkz = 12146,
VPSLLVDZ128rr = 12147,
VPSLLVDZ128rrk = 12148,
VPSLLVDZ128rrkz = 12149,
VPSLLVDZ256rm = 12150,
VPSLLVDZ256rmb = 12151,
VPSLLVDZ256rmbk = 12152,
VPSLLVDZ256rmbkz = 12153,
VPSLLVDZ256rmk = 12154,
VPSLLVDZ256rmkz = 12155,
VPSLLVDZ256rr = 12156,
VPSLLVDZ256rrk = 12157,
VPSLLVDZ256rrkz = 12158,
VPSLLVDZrm = 12159,
VPSLLVDZrmb = 12160,
VPSLLVDZrmbk = 12161,
VPSLLVDZrmbkz = 12162,
VPSLLVDZrmk = 12163,
VPSLLVDZrmkz = 12164,
VPSLLVDZrr = 12165,
VPSLLVDZrrk = 12166,
VPSLLVDZrrkz = 12167,
VPSLLVDrm = 12168,
VPSLLVDrr = 12169,
VPSLLVQYrm = 12170,
VPSLLVQYrr = 12171,
VPSLLVQZ128rm = 12172,
VPSLLVQZ128rmb = 12173,
VPSLLVQZ128rmbk = 12174,
VPSLLVQZ128rmbkz = 12175,
VPSLLVQZ128rmk = 12176,
VPSLLVQZ128rmkz = 12177,
VPSLLVQZ128rr = 12178,
VPSLLVQZ128rrk = 12179,
VPSLLVQZ128rrkz = 12180,
VPSLLVQZ256rm = 12181,
VPSLLVQZ256rmb = 12182,
VPSLLVQZ256rmbk = 12183,
VPSLLVQZ256rmbkz = 12184,
VPSLLVQZ256rmk = 12185,
VPSLLVQZ256rmkz = 12186,
VPSLLVQZ256rr = 12187,
VPSLLVQZ256rrk = 12188,
VPSLLVQZ256rrkz = 12189,
VPSLLVQZrm = 12190,
VPSLLVQZrmb = 12191,
VPSLLVQZrmbk = 12192,
VPSLLVQZrmbkz = 12193,
VPSLLVQZrmk = 12194,
VPSLLVQZrmkz = 12195,
VPSLLVQZrr = 12196,
VPSLLVQZrrk = 12197,
VPSLLVQZrrkz = 12198,
VPSLLVQrm = 12199,
VPSLLVQrr = 12200,
VPSLLVWZ128rm = 12201,
VPSLLVWZ128rmk = 12202,
VPSLLVWZ128rmkz = 12203,
VPSLLVWZ128rr = 12204,
VPSLLVWZ128rrk = 12205,
VPSLLVWZ128rrkz = 12206,
VPSLLVWZ256rm = 12207,
VPSLLVWZ256rmk = 12208,
VPSLLVWZ256rmkz = 12209,
VPSLLVWZ256rr = 12210,
VPSLLVWZ256rrk = 12211,
VPSLLVWZ256rrkz = 12212,
VPSLLVWZrm = 12213,
VPSLLVWZrmk = 12214,
VPSLLVWZrmkz = 12215,
VPSLLVWZrr = 12216,
VPSLLVWZrrk = 12217,
VPSLLVWZrrkz = 12218,
VPSLLWYri = 12219,
VPSLLWYrm = 12220,
VPSLLWYrr = 12221,
VPSLLWZ128mi = 12222,
VPSLLWZ128mik = 12223,
VPSLLWZ128mikz = 12224,
VPSLLWZ128ri = 12225,
VPSLLWZ128rik = 12226,
VPSLLWZ128rikz = 12227,
VPSLLWZ128rm = 12228,
VPSLLWZ128rmk = 12229,
VPSLLWZ128rmkz = 12230,
VPSLLWZ128rr = 12231,
VPSLLWZ128rrk = 12232,
VPSLLWZ128rrkz = 12233,
VPSLLWZ256mi = 12234,
VPSLLWZ256mik = 12235,
VPSLLWZ256mikz = 12236,
VPSLLWZ256ri = 12237,
VPSLLWZ256rik = 12238,
VPSLLWZ256rikz = 12239,
VPSLLWZ256rm = 12240,
VPSLLWZ256rmk = 12241,
VPSLLWZ256rmkz = 12242,
VPSLLWZ256rr = 12243,
VPSLLWZ256rrk = 12244,
VPSLLWZ256rrkz = 12245,
VPSLLWZmi = 12246,
VPSLLWZmik = 12247,
VPSLLWZmikz = 12248,
VPSLLWZri = 12249,
VPSLLWZrik = 12250,
VPSLLWZrikz = 12251,
VPSLLWZrm = 12252,
VPSLLWZrmk = 12253,
VPSLLWZrmkz = 12254,
VPSLLWZrr = 12255,
VPSLLWZrrk = 12256,
VPSLLWZrrkz = 12257,
VPSLLWri = 12258,
VPSLLWrm = 12259,
VPSLLWrr = 12260,
VPSRADYri = 12261,
VPSRADYrm = 12262,
VPSRADYrr = 12263,
VPSRADZ128mbi = 12264,
VPSRADZ128mbik = 12265,
VPSRADZ128mbikz = 12266,
VPSRADZ128mi = 12267,
VPSRADZ128mik = 12268,
VPSRADZ128mikz = 12269,
VPSRADZ128ri = 12270,
VPSRADZ128rik = 12271,
VPSRADZ128rikz = 12272,
VPSRADZ128rm = 12273,
VPSRADZ128rmk = 12274,
VPSRADZ128rmkz = 12275,
VPSRADZ128rr = 12276,
VPSRADZ128rrk = 12277,
VPSRADZ128rrkz = 12278,
VPSRADZ256mbi = 12279,
VPSRADZ256mbik = 12280,
VPSRADZ256mbikz = 12281,
VPSRADZ256mi = 12282,
VPSRADZ256mik = 12283,
VPSRADZ256mikz = 12284,
VPSRADZ256ri = 12285,
VPSRADZ256rik = 12286,
VPSRADZ256rikz = 12287,
VPSRADZ256rm = 12288,
VPSRADZ256rmk = 12289,
VPSRADZ256rmkz = 12290,
VPSRADZ256rr = 12291,
VPSRADZ256rrk = 12292,
VPSRADZ256rrkz = 12293,
VPSRADZmbi = 12294,
VPSRADZmbik = 12295,
VPSRADZmbikz = 12296,
VPSRADZmi = 12297,
VPSRADZmik = 12298,
VPSRADZmikz = 12299,
VPSRADZri = 12300,
VPSRADZrik = 12301,
VPSRADZrikz = 12302,
VPSRADZrm = 12303,
VPSRADZrmk = 12304,
VPSRADZrmkz = 12305,
VPSRADZrr = 12306,
VPSRADZrrk = 12307,
VPSRADZrrkz = 12308,
VPSRADri = 12309,
VPSRADrm = 12310,
VPSRADrr = 12311,
VPSRAQZ128mbi = 12312,
VPSRAQZ128mbik = 12313,
VPSRAQZ128mbikz = 12314,
VPSRAQZ128mi = 12315,
VPSRAQZ128mik = 12316,
VPSRAQZ128mikz = 12317,
VPSRAQZ128ri = 12318,
VPSRAQZ128rik = 12319,
VPSRAQZ128rikz = 12320,
VPSRAQZ128rm = 12321,
VPSRAQZ128rmk = 12322,
VPSRAQZ128rmkz = 12323,
VPSRAQZ128rr = 12324,
VPSRAQZ128rrk = 12325,
VPSRAQZ128rrkz = 12326,
VPSRAQZ256mbi = 12327,
VPSRAQZ256mbik = 12328,
VPSRAQZ256mbikz = 12329,
VPSRAQZ256mi = 12330,
VPSRAQZ256mik = 12331,
VPSRAQZ256mikz = 12332,
VPSRAQZ256ri = 12333,
VPSRAQZ256rik = 12334,
VPSRAQZ256rikz = 12335,
VPSRAQZ256rm = 12336,
VPSRAQZ256rmk = 12337,
VPSRAQZ256rmkz = 12338,
VPSRAQZ256rr = 12339,
VPSRAQZ256rrk = 12340,
VPSRAQZ256rrkz = 12341,
VPSRAQZmbi = 12342,
VPSRAQZmbik = 12343,
VPSRAQZmbikz = 12344,
VPSRAQZmi = 12345,
VPSRAQZmik = 12346,
VPSRAQZmikz = 12347,
VPSRAQZri = 12348,
VPSRAQZrik = 12349,
VPSRAQZrikz = 12350,
VPSRAQZrm = 12351,
VPSRAQZrmk = 12352,
VPSRAQZrmkz = 12353,
VPSRAQZrr = 12354,
VPSRAQZrrk = 12355,
VPSRAQZrrkz = 12356,
VPSRAVDYrm = 12357,
VPSRAVDYrr = 12358,
VPSRAVDZ128rm = 12359,
VPSRAVDZ128rmb = 12360,
VPSRAVDZ128rmbk = 12361,
VPSRAVDZ128rmbkz = 12362,
VPSRAVDZ128rmk = 12363,
VPSRAVDZ128rmkz = 12364,
VPSRAVDZ128rr = 12365,
VPSRAVDZ128rrk = 12366,
VPSRAVDZ128rrkz = 12367,
VPSRAVDZ256rm = 12368,
VPSRAVDZ256rmb = 12369,
VPSRAVDZ256rmbk = 12370,
VPSRAVDZ256rmbkz = 12371,
VPSRAVDZ256rmk = 12372,
VPSRAVDZ256rmkz = 12373,
VPSRAVDZ256rr = 12374,
VPSRAVDZ256rrk = 12375,
VPSRAVDZ256rrkz = 12376,
VPSRAVDZrm = 12377,
VPSRAVDZrmb = 12378,
VPSRAVDZrmbk = 12379,
VPSRAVDZrmbkz = 12380,
VPSRAVDZrmk = 12381,
VPSRAVDZrmkz = 12382,
VPSRAVDZrr = 12383,
VPSRAVDZrrk = 12384,
VPSRAVDZrrkz = 12385,
VPSRAVDrm = 12386,
VPSRAVDrr = 12387,
VPSRAVQZ128rm = 12388,
VPSRAVQZ128rmb = 12389,
VPSRAVQZ128rmbk = 12390,
VPSRAVQZ128rmbkz = 12391,
VPSRAVQZ128rmk = 12392,
VPSRAVQZ128rmkz = 12393,
VPSRAVQZ128rr = 12394,
VPSRAVQZ128rrk = 12395,
VPSRAVQZ128rrkz = 12396,
VPSRAVQZ256rm = 12397,
VPSRAVQZ256rmb = 12398,
VPSRAVQZ256rmbk = 12399,
VPSRAVQZ256rmbkz = 12400,
VPSRAVQZ256rmk = 12401,
VPSRAVQZ256rmkz = 12402,
VPSRAVQZ256rr = 12403,
VPSRAVQZ256rrk = 12404,
VPSRAVQZ256rrkz = 12405,
VPSRAVQZrm = 12406,
VPSRAVQZrmb = 12407,
VPSRAVQZrmbk = 12408,
VPSRAVQZrmbkz = 12409,
VPSRAVQZrmk = 12410,
VPSRAVQZrmkz = 12411,
VPSRAVQZrr = 12412,
VPSRAVQZrrk = 12413,
VPSRAVQZrrkz = 12414,
VPSRAVWZ128rm = 12415,
VPSRAVWZ128rmk = 12416,
VPSRAVWZ128rmkz = 12417,
VPSRAVWZ128rr = 12418,
VPSRAVWZ128rrk = 12419,
VPSRAVWZ128rrkz = 12420,
VPSRAVWZ256rm = 12421,
VPSRAVWZ256rmk = 12422,
VPSRAVWZ256rmkz = 12423,
VPSRAVWZ256rr = 12424,
VPSRAVWZ256rrk = 12425,
VPSRAVWZ256rrkz = 12426,
VPSRAVWZrm = 12427,
VPSRAVWZrmk = 12428,
VPSRAVWZrmkz = 12429,
VPSRAVWZrr = 12430,
VPSRAVWZrrk = 12431,
VPSRAVWZrrkz = 12432,
VPSRAWYri = 12433,
VPSRAWYrm = 12434,
VPSRAWYrr = 12435,
VPSRAWZ128mi = 12436,
VPSRAWZ128mik = 12437,
VPSRAWZ128mikz = 12438,
VPSRAWZ128ri = 12439,
VPSRAWZ128rik = 12440,
VPSRAWZ128rikz = 12441,
VPSRAWZ128rm = 12442,
VPSRAWZ128rmk = 12443,
VPSRAWZ128rmkz = 12444,
VPSRAWZ128rr = 12445,
VPSRAWZ128rrk = 12446,
VPSRAWZ128rrkz = 12447,
VPSRAWZ256mi = 12448,
VPSRAWZ256mik = 12449,
VPSRAWZ256mikz = 12450,
VPSRAWZ256ri = 12451,
VPSRAWZ256rik = 12452,
VPSRAWZ256rikz = 12453,
VPSRAWZ256rm = 12454,
VPSRAWZ256rmk = 12455,
VPSRAWZ256rmkz = 12456,
VPSRAWZ256rr = 12457,
VPSRAWZ256rrk = 12458,
VPSRAWZ256rrkz = 12459,
VPSRAWZmi = 12460,
VPSRAWZmik = 12461,
VPSRAWZmikz = 12462,
VPSRAWZri = 12463,
VPSRAWZrik = 12464,
VPSRAWZrikz = 12465,
VPSRAWZrm = 12466,
VPSRAWZrmk = 12467,
VPSRAWZrmkz = 12468,
VPSRAWZrr = 12469,
VPSRAWZrrk = 12470,
VPSRAWZrrkz = 12471,
VPSRAWri = 12472,
VPSRAWrm = 12473,
VPSRAWrr = 12474,
VPSRLDQYri = 12475,
VPSRLDQZ128rm = 12476,
VPSRLDQZ128rr = 12477,
VPSRLDQZ256rm = 12478,
VPSRLDQZ256rr = 12479,
VPSRLDQZ512rm = 12480,
VPSRLDQZ512rr = 12481,
VPSRLDQri = 12482,
VPSRLDYri = 12483,
VPSRLDYrm = 12484,
VPSRLDYrr = 12485,
VPSRLDZ128mbi = 12486,
VPSRLDZ128mbik = 12487,
VPSRLDZ128mbikz = 12488,
VPSRLDZ128mi = 12489,
VPSRLDZ128mik = 12490,
VPSRLDZ128mikz = 12491,
VPSRLDZ128ri = 12492,
VPSRLDZ128rik = 12493,
VPSRLDZ128rikz = 12494,
VPSRLDZ128rm = 12495,
VPSRLDZ128rmk = 12496,
VPSRLDZ128rmkz = 12497,
VPSRLDZ128rr = 12498,
VPSRLDZ128rrk = 12499,
VPSRLDZ128rrkz = 12500,
VPSRLDZ256mbi = 12501,
VPSRLDZ256mbik = 12502,
VPSRLDZ256mbikz = 12503,
VPSRLDZ256mi = 12504,
VPSRLDZ256mik = 12505,
VPSRLDZ256mikz = 12506,
VPSRLDZ256ri = 12507,
VPSRLDZ256rik = 12508,
VPSRLDZ256rikz = 12509,
VPSRLDZ256rm = 12510,
VPSRLDZ256rmk = 12511,
VPSRLDZ256rmkz = 12512,
VPSRLDZ256rr = 12513,
VPSRLDZ256rrk = 12514,
VPSRLDZ256rrkz = 12515,
VPSRLDZmbi = 12516,
VPSRLDZmbik = 12517,
VPSRLDZmbikz = 12518,
VPSRLDZmi = 12519,
VPSRLDZmik = 12520,
VPSRLDZmikz = 12521,
VPSRLDZri = 12522,
VPSRLDZrik = 12523,
VPSRLDZrikz = 12524,
VPSRLDZrm = 12525,
VPSRLDZrmk = 12526,
VPSRLDZrmkz = 12527,
VPSRLDZrr = 12528,
VPSRLDZrrk = 12529,
VPSRLDZrrkz = 12530,
VPSRLDri = 12531,
VPSRLDrm = 12532,
VPSRLDrr = 12533,
VPSRLQYri = 12534,
VPSRLQYrm = 12535,
VPSRLQYrr = 12536,
VPSRLQZ128mbi = 12537,
VPSRLQZ128mbik = 12538,
VPSRLQZ128mbikz = 12539,
VPSRLQZ128mi = 12540,
VPSRLQZ128mik = 12541,
VPSRLQZ128mikz = 12542,
VPSRLQZ128ri = 12543,
VPSRLQZ128rik = 12544,
VPSRLQZ128rikz = 12545,
VPSRLQZ128rm = 12546,
VPSRLQZ128rmk = 12547,
VPSRLQZ128rmkz = 12548,
VPSRLQZ128rr = 12549,
VPSRLQZ128rrk = 12550,
VPSRLQZ128rrkz = 12551,
VPSRLQZ256mbi = 12552,
VPSRLQZ256mbik = 12553,
VPSRLQZ256mbikz = 12554,
VPSRLQZ256mi = 12555,
VPSRLQZ256mik = 12556,
VPSRLQZ256mikz = 12557,
VPSRLQZ256ri = 12558,
VPSRLQZ256rik = 12559,
VPSRLQZ256rikz = 12560,
VPSRLQZ256rm = 12561,
VPSRLQZ256rmk = 12562,
VPSRLQZ256rmkz = 12563,
VPSRLQZ256rr = 12564,
VPSRLQZ256rrk = 12565,
VPSRLQZ256rrkz = 12566,
VPSRLQZmbi = 12567,
VPSRLQZmbik = 12568,
VPSRLQZmbikz = 12569,
VPSRLQZmi = 12570,
VPSRLQZmik = 12571,
VPSRLQZmikz = 12572,
VPSRLQZri = 12573,
VPSRLQZrik = 12574,
VPSRLQZrikz = 12575,
VPSRLQZrm = 12576,
VPSRLQZrmk = 12577,
VPSRLQZrmkz = 12578,
VPSRLQZrr = 12579,
VPSRLQZrrk = 12580,
VPSRLQZrrkz = 12581,
VPSRLQri = 12582,
VPSRLQrm = 12583,
VPSRLQrr = 12584,
VPSRLVDYrm = 12585,
VPSRLVDYrr = 12586,
VPSRLVDZ128rm = 12587,
VPSRLVDZ128rmb = 12588,
VPSRLVDZ128rmbk = 12589,
VPSRLVDZ128rmbkz = 12590,
VPSRLVDZ128rmk = 12591,
VPSRLVDZ128rmkz = 12592,
VPSRLVDZ128rr = 12593,
VPSRLVDZ128rrk = 12594,
VPSRLVDZ128rrkz = 12595,
VPSRLVDZ256rm = 12596,
VPSRLVDZ256rmb = 12597,
VPSRLVDZ256rmbk = 12598,
VPSRLVDZ256rmbkz = 12599,
VPSRLVDZ256rmk = 12600,
VPSRLVDZ256rmkz = 12601,
VPSRLVDZ256rr = 12602,
VPSRLVDZ256rrk = 12603,
VPSRLVDZ256rrkz = 12604,
VPSRLVDZrm = 12605,
VPSRLVDZrmb = 12606,
VPSRLVDZrmbk = 12607,
VPSRLVDZrmbkz = 12608,
VPSRLVDZrmk = 12609,
VPSRLVDZrmkz = 12610,
VPSRLVDZrr = 12611,
VPSRLVDZrrk = 12612,
VPSRLVDZrrkz = 12613,
VPSRLVDrm = 12614,
VPSRLVDrr = 12615,
VPSRLVQYrm = 12616,
VPSRLVQYrr = 12617,
VPSRLVQZ128rm = 12618,
VPSRLVQZ128rmb = 12619,
VPSRLVQZ128rmbk = 12620,
VPSRLVQZ128rmbkz = 12621,
VPSRLVQZ128rmk = 12622,
VPSRLVQZ128rmkz = 12623,
VPSRLVQZ128rr = 12624,
VPSRLVQZ128rrk = 12625,
VPSRLVQZ128rrkz = 12626,
VPSRLVQZ256rm = 12627,
VPSRLVQZ256rmb = 12628,
VPSRLVQZ256rmbk = 12629,
VPSRLVQZ256rmbkz = 12630,
VPSRLVQZ256rmk = 12631,
VPSRLVQZ256rmkz = 12632,
VPSRLVQZ256rr = 12633,
VPSRLVQZ256rrk = 12634,
VPSRLVQZ256rrkz = 12635,
VPSRLVQZrm = 12636,
VPSRLVQZrmb = 12637,
VPSRLVQZrmbk = 12638,
VPSRLVQZrmbkz = 12639,
VPSRLVQZrmk = 12640,
VPSRLVQZrmkz = 12641,
VPSRLVQZrr = 12642,
VPSRLVQZrrk = 12643,
VPSRLVQZrrkz = 12644,
VPSRLVQrm = 12645,
VPSRLVQrr = 12646,
VPSRLVWZ128rm = 12647,
VPSRLVWZ128rmk = 12648,
VPSRLVWZ128rmkz = 12649,
VPSRLVWZ128rr = 12650,
VPSRLVWZ128rrk = 12651,
VPSRLVWZ128rrkz = 12652,
VPSRLVWZ256rm = 12653,
VPSRLVWZ256rmk = 12654,
VPSRLVWZ256rmkz = 12655,
VPSRLVWZ256rr = 12656,
VPSRLVWZ256rrk = 12657,
VPSRLVWZ256rrkz = 12658,
VPSRLVWZrm = 12659,
VPSRLVWZrmk = 12660,
VPSRLVWZrmkz = 12661,
VPSRLVWZrr = 12662,
VPSRLVWZrrk = 12663,
VPSRLVWZrrkz = 12664,
VPSRLWYri = 12665,
VPSRLWYrm = 12666,
VPSRLWYrr = 12667,
VPSRLWZ128mi = 12668,
VPSRLWZ128mik = 12669,
VPSRLWZ128mikz = 12670,
VPSRLWZ128ri = 12671,
VPSRLWZ128rik = 12672,
VPSRLWZ128rikz = 12673,
VPSRLWZ128rm = 12674,
VPSRLWZ128rmk = 12675,
VPSRLWZ128rmkz = 12676,
VPSRLWZ128rr = 12677,
VPSRLWZ128rrk = 12678,
VPSRLWZ128rrkz = 12679,
VPSRLWZ256mi = 12680,
VPSRLWZ256mik = 12681,
VPSRLWZ256mikz = 12682,
VPSRLWZ256ri = 12683,
VPSRLWZ256rik = 12684,
VPSRLWZ256rikz = 12685,
VPSRLWZ256rm = 12686,
VPSRLWZ256rmk = 12687,
VPSRLWZ256rmkz = 12688,
VPSRLWZ256rr = 12689,
VPSRLWZ256rrk = 12690,
VPSRLWZ256rrkz = 12691,
VPSRLWZmi = 12692,
VPSRLWZmik = 12693,
VPSRLWZmikz = 12694,
VPSRLWZri = 12695,
VPSRLWZrik = 12696,
VPSRLWZrikz = 12697,
VPSRLWZrm = 12698,
VPSRLWZrmk = 12699,
VPSRLWZrmkz = 12700,
VPSRLWZrr = 12701,
VPSRLWZrrk = 12702,
VPSRLWZrrkz = 12703,
VPSRLWri = 12704,
VPSRLWrm = 12705,
VPSRLWrr = 12706,
VPSUBBYrm = 12707,
VPSUBBYrr = 12708,
VPSUBBZ128rm = 12709,
VPSUBBZ128rmk = 12710,
VPSUBBZ128rmkz = 12711,
VPSUBBZ128rr = 12712,
VPSUBBZ128rrk = 12713,
VPSUBBZ128rrkz = 12714,
VPSUBBZ256rm = 12715,
VPSUBBZ256rmk = 12716,
VPSUBBZ256rmkz = 12717,
VPSUBBZ256rr = 12718,
VPSUBBZ256rrk = 12719,
VPSUBBZ256rrkz = 12720,
VPSUBBZrm = 12721,
VPSUBBZrmk = 12722,
VPSUBBZrmkz = 12723,
VPSUBBZrr = 12724,
VPSUBBZrrk = 12725,
VPSUBBZrrkz = 12726,
VPSUBBrm = 12727,
VPSUBBrr = 12728,
VPSUBDYrm = 12729,
VPSUBDYrr = 12730,
VPSUBDZ128rm = 12731,
VPSUBDZ128rmb = 12732,
VPSUBDZ128rmbk = 12733,
VPSUBDZ128rmbkz = 12734,
VPSUBDZ128rmk = 12735,
VPSUBDZ128rmkz = 12736,
VPSUBDZ128rr = 12737,
VPSUBDZ128rrk = 12738,
VPSUBDZ128rrkz = 12739,
VPSUBDZ256rm = 12740,
VPSUBDZ256rmb = 12741,
VPSUBDZ256rmbk = 12742,
VPSUBDZ256rmbkz = 12743,
VPSUBDZ256rmk = 12744,
VPSUBDZ256rmkz = 12745,
VPSUBDZ256rr = 12746,
VPSUBDZ256rrk = 12747,
VPSUBDZ256rrkz = 12748,
VPSUBDZrm = 12749,
VPSUBDZrmb = 12750,
VPSUBDZrmbk = 12751,
VPSUBDZrmbkz = 12752,
VPSUBDZrmk = 12753,
VPSUBDZrmkz = 12754,
VPSUBDZrr = 12755,
VPSUBDZrrk = 12756,
VPSUBDZrrkz = 12757,
VPSUBDrm = 12758,
VPSUBDrr = 12759,
VPSUBQYrm = 12760,
VPSUBQYrr = 12761,
VPSUBQZ128rm = 12762,
VPSUBQZ128rmb = 12763,
VPSUBQZ128rmbk = 12764,
VPSUBQZ128rmbkz = 12765,
VPSUBQZ128rmk = 12766,
VPSUBQZ128rmkz = 12767,
VPSUBQZ128rr = 12768,
VPSUBQZ128rrk = 12769,
VPSUBQZ128rrkz = 12770,
VPSUBQZ256rm = 12771,
VPSUBQZ256rmb = 12772,
VPSUBQZ256rmbk = 12773,
VPSUBQZ256rmbkz = 12774,
VPSUBQZ256rmk = 12775,
VPSUBQZ256rmkz = 12776,
VPSUBQZ256rr = 12777,
VPSUBQZ256rrk = 12778,
VPSUBQZ256rrkz = 12779,
VPSUBQZrm = 12780,
VPSUBQZrmb = 12781,
VPSUBQZrmbk = 12782,
VPSUBQZrmbkz = 12783,
VPSUBQZrmk = 12784,
VPSUBQZrmkz = 12785,
VPSUBQZrr = 12786,
VPSUBQZrrk = 12787,
VPSUBQZrrkz = 12788,
VPSUBQrm = 12789,
VPSUBQrr = 12790,
VPSUBSBYrm = 12791,
VPSUBSBYrr = 12792,
VPSUBSBZ128rm = 12793,
VPSUBSBZ128rmk = 12794,
VPSUBSBZ128rmkz = 12795,
VPSUBSBZ128rr = 12796,
VPSUBSBZ128rrk = 12797,
VPSUBSBZ128rrkz = 12798,
VPSUBSBZ256rm = 12799,
VPSUBSBZ256rmk = 12800,
VPSUBSBZ256rmkz = 12801,
VPSUBSBZ256rr = 12802,
VPSUBSBZ256rrk = 12803,
VPSUBSBZ256rrkz = 12804,
VPSUBSBZrm = 12805,
VPSUBSBZrmk = 12806,
VPSUBSBZrmkz = 12807,
VPSUBSBZrr = 12808,
VPSUBSBZrrk = 12809,
VPSUBSBZrrkz = 12810,
VPSUBSBrm = 12811,
VPSUBSBrr = 12812,
VPSUBSWYrm = 12813,
VPSUBSWYrr = 12814,
VPSUBSWZ128rm = 12815,
VPSUBSWZ128rmk = 12816,
VPSUBSWZ128rmkz = 12817,
VPSUBSWZ128rr = 12818,
VPSUBSWZ128rrk = 12819,
VPSUBSWZ128rrkz = 12820,
VPSUBSWZ256rm = 12821,
VPSUBSWZ256rmk = 12822,
VPSUBSWZ256rmkz = 12823,
VPSUBSWZ256rr = 12824,
VPSUBSWZ256rrk = 12825,
VPSUBSWZ256rrkz = 12826,
VPSUBSWZrm = 12827,
VPSUBSWZrmk = 12828,
VPSUBSWZrmkz = 12829,
VPSUBSWZrr = 12830,
VPSUBSWZrrk = 12831,
VPSUBSWZrrkz = 12832,
VPSUBSWrm = 12833,
VPSUBSWrr = 12834,
VPSUBUSBYrm = 12835,
VPSUBUSBYrr = 12836,
VPSUBUSBZ128rm = 12837,
VPSUBUSBZ128rmk = 12838,
VPSUBUSBZ128rmkz = 12839,
VPSUBUSBZ128rr = 12840,
VPSUBUSBZ128rrk = 12841,
VPSUBUSBZ128rrkz = 12842,
VPSUBUSBZ256rm = 12843,
VPSUBUSBZ256rmk = 12844,
VPSUBUSBZ256rmkz = 12845,
VPSUBUSBZ256rr = 12846,
VPSUBUSBZ256rrk = 12847,
VPSUBUSBZ256rrkz = 12848,
VPSUBUSBZrm = 12849,
VPSUBUSBZrmk = 12850,
VPSUBUSBZrmkz = 12851,
VPSUBUSBZrr = 12852,
VPSUBUSBZrrk = 12853,
VPSUBUSBZrrkz = 12854,
VPSUBUSBrm = 12855,
VPSUBUSBrr = 12856,
VPSUBUSWYrm = 12857,
VPSUBUSWYrr = 12858,
VPSUBUSWZ128rm = 12859,
VPSUBUSWZ128rmk = 12860,
VPSUBUSWZ128rmkz = 12861,
VPSUBUSWZ128rr = 12862,
VPSUBUSWZ128rrk = 12863,
VPSUBUSWZ128rrkz = 12864,
VPSUBUSWZ256rm = 12865,
VPSUBUSWZ256rmk = 12866,
VPSUBUSWZ256rmkz = 12867,
VPSUBUSWZ256rr = 12868,
VPSUBUSWZ256rrk = 12869,
VPSUBUSWZ256rrkz = 12870,
VPSUBUSWZrm = 12871,
VPSUBUSWZrmk = 12872,
VPSUBUSWZrmkz = 12873,
VPSUBUSWZrr = 12874,
VPSUBUSWZrrk = 12875,
VPSUBUSWZrrkz = 12876,
VPSUBUSWrm = 12877,
VPSUBUSWrr = 12878,
VPSUBWYrm = 12879,
VPSUBWYrr = 12880,
VPSUBWZ128rm = 12881,
VPSUBWZ128rmk = 12882,
VPSUBWZ128rmkz = 12883,
VPSUBWZ128rr = 12884,
VPSUBWZ128rrk = 12885,
VPSUBWZ128rrkz = 12886,
VPSUBWZ256rm = 12887,
VPSUBWZ256rmk = 12888,
VPSUBWZ256rmkz = 12889,
VPSUBWZ256rr = 12890,
VPSUBWZ256rrk = 12891,
VPSUBWZ256rrkz = 12892,
VPSUBWZrm = 12893,
VPSUBWZrmk = 12894,
VPSUBWZrmkz = 12895,
VPSUBWZrr = 12896,
VPSUBWZrrk = 12897,
VPSUBWZrrkz = 12898,
VPSUBWrm = 12899,
VPSUBWrr = 12900,
VPTERNLOGDZ128rmbi = 12901,
VPTERNLOGDZ128rmbik = 12902,
VPTERNLOGDZ128rmbikz = 12903,
VPTERNLOGDZ128rmi = 12904,
VPTERNLOGDZ128rmik = 12905,
VPTERNLOGDZ128rmikz = 12906,
VPTERNLOGDZ128rri = 12907,
VPTERNLOGDZ128rrik = 12908,
VPTERNLOGDZ128rrikz = 12909,
VPTERNLOGDZ256rmbi = 12910,
VPTERNLOGDZ256rmbik = 12911,
VPTERNLOGDZ256rmbikz = 12912,
VPTERNLOGDZ256rmi = 12913,
VPTERNLOGDZ256rmik = 12914,
VPTERNLOGDZ256rmikz = 12915,
VPTERNLOGDZ256rri = 12916,
VPTERNLOGDZ256rrik = 12917,
VPTERNLOGDZ256rrikz = 12918,
VPTERNLOGDZrmbi = 12919,
VPTERNLOGDZrmbik = 12920,
VPTERNLOGDZrmbikz = 12921,
VPTERNLOGDZrmi = 12922,
VPTERNLOGDZrmik = 12923,
VPTERNLOGDZrmikz = 12924,
VPTERNLOGDZrri = 12925,
VPTERNLOGDZrrik = 12926,
VPTERNLOGDZrrikz = 12927,
VPTERNLOGQZ128rmbi = 12928,
VPTERNLOGQZ128rmbik = 12929,
VPTERNLOGQZ128rmbikz = 12930,
VPTERNLOGQZ128rmi = 12931,
VPTERNLOGQZ128rmik = 12932,
VPTERNLOGQZ128rmikz = 12933,
VPTERNLOGQZ128rri = 12934,
VPTERNLOGQZ128rrik = 12935,
VPTERNLOGQZ128rrikz = 12936,
VPTERNLOGQZ256rmbi = 12937,
VPTERNLOGQZ256rmbik = 12938,
VPTERNLOGQZ256rmbikz = 12939,
VPTERNLOGQZ256rmi = 12940,
VPTERNLOGQZ256rmik = 12941,
VPTERNLOGQZ256rmikz = 12942,
VPTERNLOGQZ256rri = 12943,
VPTERNLOGQZ256rrik = 12944,
VPTERNLOGQZ256rrikz = 12945,
VPTERNLOGQZrmbi = 12946,
VPTERNLOGQZrmbik = 12947,
VPTERNLOGQZrmbikz = 12948,
VPTERNLOGQZrmi = 12949,
VPTERNLOGQZrmik = 12950,
VPTERNLOGQZrmikz = 12951,
VPTERNLOGQZrri = 12952,
VPTERNLOGQZrrik = 12953,
VPTERNLOGQZrrikz = 12954,
VPTESTMBZ128rm = 12955,
VPTESTMBZ128rmk = 12956,
VPTESTMBZ128rr = 12957,
VPTESTMBZ128rrk = 12958,
VPTESTMBZ256rm = 12959,
VPTESTMBZ256rmk = 12960,
VPTESTMBZ256rr = 12961,
VPTESTMBZ256rrk = 12962,
VPTESTMBZrm = 12963,
VPTESTMBZrmk = 12964,
VPTESTMBZrr = 12965,
VPTESTMBZrrk = 12966,
VPTESTMDZ128rm = 12967,
VPTESTMDZ128rmb = 12968,
VPTESTMDZ128rmbk = 12969,
VPTESTMDZ128rmk = 12970,
VPTESTMDZ128rr = 12971,
VPTESTMDZ128rrk = 12972,
VPTESTMDZ256rm = 12973,
VPTESTMDZ256rmb = 12974,
VPTESTMDZ256rmbk = 12975,
VPTESTMDZ256rmk = 12976,
VPTESTMDZ256rr = 12977,
VPTESTMDZ256rrk = 12978,
VPTESTMDZrm = 12979,
VPTESTMDZrmb = 12980,
VPTESTMDZrmbk = 12981,
VPTESTMDZrmk = 12982,
VPTESTMDZrr = 12983,
VPTESTMDZrrk = 12984,
VPTESTMQZ128rm = 12985,
VPTESTMQZ128rmb = 12986,
VPTESTMQZ128rmbk = 12987,
VPTESTMQZ128rmk = 12988,
VPTESTMQZ128rr = 12989,
VPTESTMQZ128rrk = 12990,
VPTESTMQZ256rm = 12991,
VPTESTMQZ256rmb = 12992,
VPTESTMQZ256rmbk = 12993,
VPTESTMQZ256rmk = 12994,
VPTESTMQZ256rr = 12995,
VPTESTMQZ256rrk = 12996,
VPTESTMQZrm = 12997,
VPTESTMQZrmb = 12998,
VPTESTMQZrmbk = 12999,
VPTESTMQZrmk = 13000,
VPTESTMQZrr = 13001,
VPTESTMQZrrk = 13002,
VPTESTMWZ128rm = 13003,
VPTESTMWZ128rmk = 13004,
VPTESTMWZ128rr = 13005,
VPTESTMWZ128rrk = 13006,
VPTESTMWZ256rm = 13007,
VPTESTMWZ256rmk = 13008,
VPTESTMWZ256rr = 13009,
VPTESTMWZ256rrk = 13010,
VPTESTMWZrm = 13011,
VPTESTMWZrmk = 13012,
VPTESTMWZrr = 13013,
VPTESTMWZrrk = 13014,
VPTESTNMBZ128rm = 13015,
VPTESTNMBZ128rmk = 13016,
VPTESTNMBZ128rr = 13017,
VPTESTNMBZ128rrk = 13018,
VPTESTNMBZ256rm = 13019,
VPTESTNMBZ256rmk = 13020,
VPTESTNMBZ256rr = 13021,
VPTESTNMBZ256rrk = 13022,
VPTESTNMBZrm = 13023,
VPTESTNMBZrmk = 13024,
VPTESTNMBZrr = 13025,
VPTESTNMBZrrk = 13026,
VPTESTNMDZ128rm = 13027,
VPTESTNMDZ128rmb = 13028,
VPTESTNMDZ128rmbk = 13029,
VPTESTNMDZ128rmk = 13030,
VPTESTNMDZ128rr = 13031,
VPTESTNMDZ128rrk = 13032,
VPTESTNMDZ256rm = 13033,
VPTESTNMDZ256rmb = 13034,
VPTESTNMDZ256rmbk = 13035,
VPTESTNMDZ256rmk = 13036,
VPTESTNMDZ256rr = 13037,
VPTESTNMDZ256rrk = 13038,
VPTESTNMDZrm = 13039,
VPTESTNMDZrmb = 13040,
VPTESTNMDZrmbk = 13041,
VPTESTNMDZrmk = 13042,
VPTESTNMDZrr = 13043,
VPTESTNMDZrrk = 13044,
VPTESTNMQZ128rm = 13045,
VPTESTNMQZ128rmb = 13046,
VPTESTNMQZ128rmbk = 13047,
VPTESTNMQZ128rmk = 13048,
VPTESTNMQZ128rr = 13049,
VPTESTNMQZ128rrk = 13050,
VPTESTNMQZ256rm = 13051,
VPTESTNMQZ256rmb = 13052,
VPTESTNMQZ256rmbk = 13053,
VPTESTNMQZ256rmk = 13054,
VPTESTNMQZ256rr = 13055,
VPTESTNMQZ256rrk = 13056,
VPTESTNMQZrm = 13057,
VPTESTNMQZrmb = 13058,
VPTESTNMQZrmbk = 13059,
VPTESTNMQZrmk = 13060,
VPTESTNMQZrr = 13061,
VPTESTNMQZrrk = 13062,
VPTESTNMWZ128rm = 13063,
VPTESTNMWZ128rmk = 13064,
VPTESTNMWZ128rr = 13065,
VPTESTNMWZ128rrk = 13066,
VPTESTNMWZ256rm = 13067,
VPTESTNMWZ256rmk = 13068,
VPTESTNMWZ256rr = 13069,
VPTESTNMWZ256rrk = 13070,
VPTESTNMWZrm = 13071,
VPTESTNMWZrmk = 13072,
VPTESTNMWZrr = 13073,
VPTESTNMWZrrk = 13074,
VPTESTYrm = 13075,
VPTESTYrr = 13076,
VPTESTrm = 13077,
VPTESTrr = 13078,
VPUNPCKHBWYrm = 13079,
VPUNPCKHBWYrr = 13080,
VPUNPCKHBWZ128rm = 13081,
VPUNPCKHBWZ128rmk = 13082,
VPUNPCKHBWZ128rmkz = 13083,
VPUNPCKHBWZ128rr = 13084,
VPUNPCKHBWZ128rrk = 13085,
VPUNPCKHBWZ128rrkz = 13086,
VPUNPCKHBWZ256rm = 13087,
VPUNPCKHBWZ256rmk = 13088,
VPUNPCKHBWZ256rmkz = 13089,
VPUNPCKHBWZ256rr = 13090,
VPUNPCKHBWZ256rrk = 13091,
VPUNPCKHBWZ256rrkz = 13092,
VPUNPCKHBWZrm = 13093,
VPUNPCKHBWZrmk = 13094,
VPUNPCKHBWZrmkz = 13095,
VPUNPCKHBWZrr = 13096,
VPUNPCKHBWZrrk = 13097,
VPUNPCKHBWZrrkz = 13098,
VPUNPCKHBWrm = 13099,
VPUNPCKHBWrr = 13100,
VPUNPCKHDQYrm = 13101,
VPUNPCKHDQYrr = 13102,
VPUNPCKHDQZ128rm = 13103,
VPUNPCKHDQZ128rmb = 13104,
VPUNPCKHDQZ128rmbk = 13105,
VPUNPCKHDQZ128rmbkz = 13106,
VPUNPCKHDQZ128rmk = 13107,
VPUNPCKHDQZ128rmkz = 13108,
VPUNPCKHDQZ128rr = 13109,
VPUNPCKHDQZ128rrk = 13110,
VPUNPCKHDQZ128rrkz = 13111,
VPUNPCKHDQZ256rm = 13112,
VPUNPCKHDQZ256rmb = 13113,
VPUNPCKHDQZ256rmbk = 13114,
VPUNPCKHDQZ256rmbkz = 13115,
VPUNPCKHDQZ256rmk = 13116,
VPUNPCKHDQZ256rmkz = 13117,
VPUNPCKHDQZ256rr = 13118,
VPUNPCKHDQZ256rrk = 13119,
VPUNPCKHDQZ256rrkz = 13120,
VPUNPCKHDQZrm = 13121,
VPUNPCKHDQZrmb = 13122,
VPUNPCKHDQZrmbk = 13123,
VPUNPCKHDQZrmbkz = 13124,
VPUNPCKHDQZrmk = 13125,
VPUNPCKHDQZrmkz = 13126,
VPUNPCKHDQZrr = 13127,
VPUNPCKHDQZrrk = 13128,
VPUNPCKHDQZrrkz = 13129,
VPUNPCKHDQrm = 13130,
VPUNPCKHDQrr = 13131,
VPUNPCKHQDQYrm = 13132,
VPUNPCKHQDQYrr = 13133,
VPUNPCKHQDQZ128rm = 13134,
VPUNPCKHQDQZ128rmb = 13135,
VPUNPCKHQDQZ128rmbk = 13136,
VPUNPCKHQDQZ128rmbkz = 13137,
VPUNPCKHQDQZ128rmk = 13138,
VPUNPCKHQDQZ128rmkz = 13139,
VPUNPCKHQDQZ128rr = 13140,
VPUNPCKHQDQZ128rrk = 13141,
VPUNPCKHQDQZ128rrkz = 13142,
VPUNPCKHQDQZ256rm = 13143,
VPUNPCKHQDQZ256rmb = 13144,
VPUNPCKHQDQZ256rmbk = 13145,
VPUNPCKHQDQZ256rmbkz = 13146,
VPUNPCKHQDQZ256rmk = 13147,
VPUNPCKHQDQZ256rmkz = 13148,
VPUNPCKHQDQZ256rr = 13149,
VPUNPCKHQDQZ256rrk = 13150,
VPUNPCKHQDQZ256rrkz = 13151,
VPUNPCKHQDQZrm = 13152,
VPUNPCKHQDQZrmb = 13153,
VPUNPCKHQDQZrmbk = 13154,
VPUNPCKHQDQZrmbkz = 13155,
VPUNPCKHQDQZrmk = 13156,
VPUNPCKHQDQZrmkz = 13157,
VPUNPCKHQDQZrr = 13158,
VPUNPCKHQDQZrrk = 13159,
VPUNPCKHQDQZrrkz = 13160,
VPUNPCKHQDQrm = 13161,
VPUNPCKHQDQrr = 13162,
VPUNPCKHWDYrm = 13163,
VPUNPCKHWDYrr = 13164,
VPUNPCKHWDZ128rm = 13165,
VPUNPCKHWDZ128rmk = 13166,
VPUNPCKHWDZ128rmkz = 13167,
VPUNPCKHWDZ128rr = 13168,
VPUNPCKHWDZ128rrk = 13169,
VPUNPCKHWDZ128rrkz = 13170,
VPUNPCKHWDZ256rm = 13171,
VPUNPCKHWDZ256rmk = 13172,
VPUNPCKHWDZ256rmkz = 13173,
VPUNPCKHWDZ256rr = 13174,
VPUNPCKHWDZ256rrk = 13175,
VPUNPCKHWDZ256rrkz = 13176,
VPUNPCKHWDZrm = 13177,
VPUNPCKHWDZrmk = 13178,
VPUNPCKHWDZrmkz = 13179,
VPUNPCKHWDZrr = 13180,
VPUNPCKHWDZrrk = 13181,
VPUNPCKHWDZrrkz = 13182,
VPUNPCKHWDrm = 13183,
VPUNPCKHWDrr = 13184,
VPUNPCKLBWYrm = 13185,
VPUNPCKLBWYrr = 13186,
VPUNPCKLBWZ128rm = 13187,
VPUNPCKLBWZ128rmk = 13188,
VPUNPCKLBWZ128rmkz = 13189,
VPUNPCKLBWZ128rr = 13190,
VPUNPCKLBWZ128rrk = 13191,
VPUNPCKLBWZ128rrkz = 13192,
VPUNPCKLBWZ256rm = 13193,
VPUNPCKLBWZ256rmk = 13194,
VPUNPCKLBWZ256rmkz = 13195,
VPUNPCKLBWZ256rr = 13196,
VPUNPCKLBWZ256rrk = 13197,
VPUNPCKLBWZ256rrkz = 13198,
VPUNPCKLBWZrm = 13199,
VPUNPCKLBWZrmk = 13200,
VPUNPCKLBWZrmkz = 13201,
VPUNPCKLBWZrr = 13202,
VPUNPCKLBWZrrk = 13203,
VPUNPCKLBWZrrkz = 13204,
VPUNPCKLBWrm = 13205,
VPUNPCKLBWrr = 13206,
VPUNPCKLDQYrm = 13207,
VPUNPCKLDQYrr = 13208,
VPUNPCKLDQZ128rm = 13209,
VPUNPCKLDQZ128rmb = 13210,
VPUNPCKLDQZ128rmbk = 13211,
VPUNPCKLDQZ128rmbkz = 13212,
VPUNPCKLDQZ128rmk = 13213,
VPUNPCKLDQZ128rmkz = 13214,
VPUNPCKLDQZ128rr = 13215,
VPUNPCKLDQZ128rrk = 13216,
VPUNPCKLDQZ128rrkz = 13217,
VPUNPCKLDQZ256rm = 13218,
VPUNPCKLDQZ256rmb = 13219,
VPUNPCKLDQZ256rmbk = 13220,
VPUNPCKLDQZ256rmbkz = 13221,
VPUNPCKLDQZ256rmk = 13222,
VPUNPCKLDQZ256rmkz = 13223,
VPUNPCKLDQZ256rr = 13224,
VPUNPCKLDQZ256rrk = 13225,
VPUNPCKLDQZ256rrkz = 13226,
VPUNPCKLDQZrm = 13227,
VPUNPCKLDQZrmb = 13228,
VPUNPCKLDQZrmbk = 13229,
VPUNPCKLDQZrmbkz = 13230,
VPUNPCKLDQZrmk = 13231,
VPUNPCKLDQZrmkz = 13232,
VPUNPCKLDQZrr = 13233,
VPUNPCKLDQZrrk = 13234,
VPUNPCKLDQZrrkz = 13235,
VPUNPCKLDQrm = 13236,
VPUNPCKLDQrr = 13237,
VPUNPCKLQDQYrm = 13238,
VPUNPCKLQDQYrr = 13239,
VPUNPCKLQDQZ128rm = 13240,
VPUNPCKLQDQZ128rmb = 13241,
VPUNPCKLQDQZ128rmbk = 13242,
VPUNPCKLQDQZ128rmbkz = 13243,
VPUNPCKLQDQZ128rmk = 13244,
VPUNPCKLQDQZ128rmkz = 13245,
VPUNPCKLQDQZ128rr = 13246,
VPUNPCKLQDQZ128rrk = 13247,
VPUNPCKLQDQZ128rrkz = 13248,
VPUNPCKLQDQZ256rm = 13249,
VPUNPCKLQDQZ256rmb = 13250,
VPUNPCKLQDQZ256rmbk = 13251,
VPUNPCKLQDQZ256rmbkz = 13252,
VPUNPCKLQDQZ256rmk = 13253,
VPUNPCKLQDQZ256rmkz = 13254,
VPUNPCKLQDQZ256rr = 13255,
VPUNPCKLQDQZ256rrk = 13256,
VPUNPCKLQDQZ256rrkz = 13257,
VPUNPCKLQDQZrm = 13258,
VPUNPCKLQDQZrmb = 13259,
VPUNPCKLQDQZrmbk = 13260,
VPUNPCKLQDQZrmbkz = 13261,
VPUNPCKLQDQZrmk = 13262,
VPUNPCKLQDQZrmkz = 13263,
VPUNPCKLQDQZrr = 13264,
VPUNPCKLQDQZrrk = 13265,
VPUNPCKLQDQZrrkz = 13266,
VPUNPCKLQDQrm = 13267,
VPUNPCKLQDQrr = 13268,
VPUNPCKLWDYrm = 13269,
VPUNPCKLWDYrr = 13270,
VPUNPCKLWDZ128rm = 13271,
VPUNPCKLWDZ128rmk = 13272,
VPUNPCKLWDZ128rmkz = 13273,
VPUNPCKLWDZ128rr = 13274,
VPUNPCKLWDZ128rrk = 13275,
VPUNPCKLWDZ128rrkz = 13276,
VPUNPCKLWDZ256rm = 13277,
VPUNPCKLWDZ256rmk = 13278,
VPUNPCKLWDZ256rmkz = 13279,
VPUNPCKLWDZ256rr = 13280,
VPUNPCKLWDZ256rrk = 13281,
VPUNPCKLWDZ256rrkz = 13282,
VPUNPCKLWDZrm = 13283,
VPUNPCKLWDZrmk = 13284,
VPUNPCKLWDZrmkz = 13285,
VPUNPCKLWDZrr = 13286,
VPUNPCKLWDZrrk = 13287,
VPUNPCKLWDZrrkz = 13288,
VPUNPCKLWDrm = 13289,
VPUNPCKLWDrr = 13290,
VPXORDZ128rm = 13291,
VPXORDZ128rmb = 13292,
VPXORDZ128rmbk = 13293,
VPXORDZ128rmbkz = 13294,
VPXORDZ128rmk = 13295,
VPXORDZ128rmkz = 13296,
VPXORDZ128rr = 13297,
VPXORDZ128rrk = 13298,
VPXORDZ128rrkz = 13299,
VPXORDZ256rm = 13300,
VPXORDZ256rmb = 13301,
VPXORDZ256rmbk = 13302,
VPXORDZ256rmbkz = 13303,
VPXORDZ256rmk = 13304,
VPXORDZ256rmkz = 13305,
VPXORDZ256rr = 13306,
VPXORDZ256rrk = 13307,
VPXORDZ256rrkz = 13308,
VPXORDZrm = 13309,
VPXORDZrmb = 13310,
VPXORDZrmbk = 13311,
VPXORDZrmbkz = 13312,
VPXORDZrmk = 13313,
VPXORDZrmkz = 13314,
VPXORDZrr = 13315,
VPXORDZrrk = 13316,
VPXORDZrrkz = 13317,
VPXORQZ128rm = 13318,
VPXORQZ128rmb = 13319,
VPXORQZ128rmbk = 13320,
VPXORQZ128rmbkz = 13321,
VPXORQZ128rmk = 13322,
VPXORQZ128rmkz = 13323,
VPXORQZ128rr = 13324,
VPXORQZ128rrk = 13325,
VPXORQZ128rrkz = 13326,
VPXORQZ256rm = 13327,
VPXORQZ256rmb = 13328,
VPXORQZ256rmbk = 13329,
VPXORQZ256rmbkz = 13330,
VPXORQZ256rmk = 13331,
VPXORQZ256rmkz = 13332,
VPXORQZ256rr = 13333,
VPXORQZ256rrk = 13334,
VPXORQZ256rrkz = 13335,
VPXORQZrm = 13336,
VPXORQZrmb = 13337,
VPXORQZrmbk = 13338,
VPXORQZrmbkz = 13339,
VPXORQZrmk = 13340,
VPXORQZrmkz = 13341,
VPXORQZrr = 13342,
VPXORQZrrk = 13343,
VPXORQZrrkz = 13344,
VPXORYrm = 13345,
VPXORYrr = 13346,
VPXORrm = 13347,
VPXORrr = 13348,
VRANGEPDZ128rmbi = 13349,
VRANGEPDZ128rmbik = 13350,
VRANGEPDZ128rmbikz = 13351,
VRANGEPDZ128rmi = 13352,
VRANGEPDZ128rmik = 13353,
VRANGEPDZ128rmikz = 13354,
VRANGEPDZ128rri = 13355,
VRANGEPDZ128rrik = 13356,
VRANGEPDZ128rrikz = 13357,
VRANGEPDZ256rmbi = 13358,
VRANGEPDZ256rmbik = 13359,
VRANGEPDZ256rmbikz = 13360,
VRANGEPDZ256rmi = 13361,
VRANGEPDZ256rmik = 13362,
VRANGEPDZ256rmikz = 13363,
VRANGEPDZ256rri = 13364,
VRANGEPDZ256rrik = 13365,
VRANGEPDZ256rrikz = 13366,
VRANGEPDZrmbi = 13367,
VRANGEPDZrmbik = 13368,
VRANGEPDZrmbikz = 13369,
VRANGEPDZrmi = 13370,
VRANGEPDZrmik = 13371,
VRANGEPDZrmikz = 13372,
VRANGEPDZrri = 13373,
VRANGEPDZrrib = 13374,
VRANGEPDZrribk = 13375,
VRANGEPDZrribkz = 13376,
VRANGEPDZrrik = 13377,
VRANGEPDZrrikz = 13378,
VRANGEPSZ128rmbi = 13379,
VRANGEPSZ128rmbik = 13380,
VRANGEPSZ128rmbikz = 13381,
VRANGEPSZ128rmi = 13382,
VRANGEPSZ128rmik = 13383,
VRANGEPSZ128rmikz = 13384,
VRANGEPSZ128rri = 13385,
VRANGEPSZ128rrik = 13386,
VRANGEPSZ128rrikz = 13387,
VRANGEPSZ256rmbi = 13388,
VRANGEPSZ256rmbik = 13389,
VRANGEPSZ256rmbikz = 13390,
VRANGEPSZ256rmi = 13391,
VRANGEPSZ256rmik = 13392,
VRANGEPSZ256rmikz = 13393,
VRANGEPSZ256rri = 13394,
VRANGEPSZ256rrik = 13395,
VRANGEPSZ256rrikz = 13396,
VRANGEPSZrmbi = 13397,
VRANGEPSZrmbik = 13398,
VRANGEPSZrmbikz = 13399,
VRANGEPSZrmi = 13400,
VRANGEPSZrmik = 13401,
VRANGEPSZrmikz = 13402,
VRANGEPSZrri = 13403,
VRANGEPSZrrib = 13404,
VRANGEPSZrribk = 13405,
VRANGEPSZrribkz = 13406,
VRANGEPSZrrik = 13407,
VRANGEPSZrrikz = 13408,
VRANGESDZ128rmi = 13409,
VRANGESDZ128rmi_alt = 13410,
VRANGESDZ128rmi_altk = 13411,
VRANGESDZ128rmi_altkz = 13412,
VRANGESDZ128rmik = 13413,
VRANGESDZ128rmikz = 13414,
VRANGESDZ128rri = 13415,
VRANGESDZ128rrib = 13416,
VRANGESDZ128rribk = 13417,
VRANGESDZ128rribkz = 13418,
VRANGESDZ128rrik = 13419,
VRANGESDZ128rrikz = 13420,
VRANGESSZ128rmi = 13421,
VRANGESSZ128rmi_alt = 13422,
VRANGESSZ128rmi_altk = 13423,
VRANGESSZ128rmi_altkz = 13424,
VRANGESSZ128rmik = 13425,
VRANGESSZ128rmikz = 13426,
VRANGESSZ128rri = 13427,
VRANGESSZ128rrib = 13428,
VRANGESSZ128rribk = 13429,
VRANGESSZ128rribkz = 13430,
VRANGESSZ128rrik = 13431,
VRANGESSZ128rrikz = 13432,
VRCP14PDZ128m = 13433,
VRCP14PDZ128mb = 13434,
VRCP14PDZ128mbk = 13435,
VRCP14PDZ128mbkz = 13436,
VRCP14PDZ128mk = 13437,
VRCP14PDZ128mkz = 13438,
VRCP14PDZ128r = 13439,
VRCP14PDZ128rk = 13440,
VRCP14PDZ128rkz = 13441,
VRCP14PDZ256m = 13442,
VRCP14PDZ256mb = 13443,
VRCP14PDZ256mbk = 13444,
VRCP14PDZ256mbkz = 13445,
VRCP14PDZ256mk = 13446,
VRCP14PDZ256mkz = 13447,
VRCP14PDZ256r = 13448,
VRCP14PDZ256rk = 13449,
VRCP14PDZ256rkz = 13450,
VRCP14PDZm = 13451,
VRCP14PDZmb = 13452,
VRCP14PDZmbk = 13453,
VRCP14PDZmbkz = 13454,
VRCP14PDZmk = 13455,
VRCP14PDZmkz = 13456,
VRCP14PDZr = 13457,
VRCP14PDZrk = 13458,
VRCP14PDZrkz = 13459,
VRCP14PSZ128m = 13460,
VRCP14PSZ128mb = 13461,
VRCP14PSZ128mbk = 13462,
VRCP14PSZ128mbkz = 13463,
VRCP14PSZ128mk = 13464,
VRCP14PSZ128mkz = 13465,
VRCP14PSZ128r = 13466,
VRCP14PSZ128rk = 13467,
VRCP14PSZ128rkz = 13468,
VRCP14PSZ256m = 13469,
VRCP14PSZ256mb = 13470,
VRCP14PSZ256mbk = 13471,
VRCP14PSZ256mbkz = 13472,
VRCP14PSZ256mk = 13473,
VRCP14PSZ256mkz = 13474,
VRCP14PSZ256r = 13475,
VRCP14PSZ256rk = 13476,
VRCP14PSZ256rkz = 13477,
VRCP14PSZm = 13478,
VRCP14PSZmb = 13479,
VRCP14PSZmbk = 13480,
VRCP14PSZmbkz = 13481,
VRCP14PSZmk = 13482,
VRCP14PSZmkz = 13483,
VRCP14PSZr = 13484,
VRCP14PSZrk = 13485,
VRCP14PSZrkz = 13486,
VRCP14SDrm = 13487,
VRCP14SDrmk = 13488,
VRCP14SDrmkz = 13489,
VRCP14SDrr = 13490,
VRCP14SDrrk = 13491,
VRCP14SDrrkz = 13492,
VRCP14SSrm = 13493,
VRCP14SSrmk = 13494,
VRCP14SSrmkz = 13495,
VRCP14SSrr = 13496,
VRCP14SSrrk = 13497,
VRCP14SSrrkz = 13498,
VRCP28PDm = 13499,
VRCP28PDmb = 13500,
VRCP28PDmbk = 13501,
VRCP28PDmbkz = 13502,
VRCP28PDmk = 13503,
VRCP28PDmkz = 13504,
VRCP28PDr = 13505,
VRCP28PDrb = 13506,
VRCP28PDrbk = 13507,
VRCP28PDrbkz = 13508,
VRCP28PDrk = 13509,
VRCP28PDrkz = 13510,
VRCP28PSm = 13511,
VRCP28PSmb = 13512,
VRCP28PSmbk = 13513,
VRCP28PSmbkz = 13514,
VRCP28PSmk = 13515,
VRCP28PSmkz = 13516,
VRCP28PSr = 13517,
VRCP28PSrb = 13518,
VRCP28PSrbk = 13519,
VRCP28PSrbkz = 13520,
VRCP28PSrk = 13521,
VRCP28PSrkz = 13522,
VRCP28SDm = 13523,
VRCP28SDmk = 13524,
VRCP28SDmkz = 13525,
VRCP28SDr = 13526,
VRCP28SDrb = 13527,
VRCP28SDrbk = 13528,
VRCP28SDrbkz = 13529,
VRCP28SDrk = 13530,
VRCP28SDrkz = 13531,
VRCP28SSm = 13532,
VRCP28SSmk = 13533,
VRCP28SSmkz = 13534,
VRCP28SSr = 13535,
VRCP28SSrb = 13536,
VRCP28SSrbk = 13537,
VRCP28SSrbkz = 13538,
VRCP28SSrk = 13539,
VRCP28SSrkz = 13540,
VRCPPSYm = 13541,
VRCPPSYr = 13542,
VRCPPSm = 13543,
VRCPPSr = 13544,
VRCPSSm = 13545,
VRCPSSm_Int = 13546,
VRCPSSr = 13547,
VRCPSSr_Int = 13548,
VREDUCEPDZ128rmbi = 13549,
VREDUCEPDZ128rmbik = 13550,
VREDUCEPDZ128rmbikz = 13551,
VREDUCEPDZ128rmi = 13552,
VREDUCEPDZ128rmik = 13553,
VREDUCEPDZ128rmikz = 13554,
VREDUCEPDZ128rri = 13555,
VREDUCEPDZ128rrik = 13556,
VREDUCEPDZ128rrikz = 13557,
VREDUCEPDZ256rmbi = 13558,
VREDUCEPDZ256rmbik = 13559,
VREDUCEPDZ256rmbikz = 13560,
VREDUCEPDZ256rmi = 13561,
VREDUCEPDZ256rmik = 13562,
VREDUCEPDZ256rmikz = 13563,
VREDUCEPDZ256rri = 13564,
VREDUCEPDZ256rrik = 13565,
VREDUCEPDZ256rrikz = 13566,
VREDUCEPDZrmbi = 13567,
VREDUCEPDZrmbik = 13568,
VREDUCEPDZrmbikz = 13569,
VREDUCEPDZrmi = 13570,
VREDUCEPDZrmik = 13571,
VREDUCEPDZrmikz = 13572,
VREDUCEPDZrri = 13573,
VREDUCEPDZrrib = 13574,
VREDUCEPDZrribk = 13575,
VREDUCEPDZrribkz = 13576,
VREDUCEPDZrrik = 13577,
VREDUCEPDZrrikz = 13578,
VREDUCEPSZ128rmbi = 13579,
VREDUCEPSZ128rmbik = 13580,
VREDUCEPSZ128rmbikz = 13581,
VREDUCEPSZ128rmi = 13582,
VREDUCEPSZ128rmik = 13583,
VREDUCEPSZ128rmikz = 13584,
VREDUCEPSZ128rri = 13585,
VREDUCEPSZ128rrik = 13586,
VREDUCEPSZ128rrikz = 13587,
VREDUCEPSZ256rmbi = 13588,
VREDUCEPSZ256rmbik = 13589,
VREDUCEPSZ256rmbikz = 13590,
VREDUCEPSZ256rmi = 13591,
VREDUCEPSZ256rmik = 13592,
VREDUCEPSZ256rmikz = 13593,
VREDUCEPSZ256rri = 13594,
VREDUCEPSZ256rrik = 13595,
VREDUCEPSZ256rrikz = 13596,
VREDUCEPSZrmbi = 13597,
VREDUCEPSZrmbik = 13598,
VREDUCEPSZrmbikz = 13599,
VREDUCEPSZrmi = 13600,
VREDUCEPSZrmik = 13601,
VREDUCEPSZrmikz = 13602,
VREDUCEPSZrri = 13603,
VREDUCEPSZrrib = 13604,
VREDUCEPSZrribk = 13605,
VREDUCEPSZrribkz = 13606,
VREDUCEPSZrrik = 13607,
VREDUCEPSZrrikz = 13608,
VREDUCESDZ128rmi = 13609,
VREDUCESDZ128rmi_alt = 13610,
VREDUCESDZ128rmi_altk = 13611,
VREDUCESDZ128rmi_altkz = 13612,
VREDUCESDZ128rmik = 13613,
VREDUCESDZ128rmikz = 13614,
VREDUCESDZ128rri = 13615,
VREDUCESDZ128rrib = 13616,
VREDUCESDZ128rribk = 13617,
VREDUCESDZ128rribkz = 13618,
VREDUCESDZ128rrik = 13619,
VREDUCESDZ128rrikz = 13620,
VREDUCESSZ128rmi = 13621,
VREDUCESSZ128rmi_alt = 13622,
VREDUCESSZ128rmi_altk = 13623,
VREDUCESSZ128rmi_altkz = 13624,
VREDUCESSZ128rmik = 13625,
VREDUCESSZ128rmikz = 13626,
VREDUCESSZ128rri = 13627,
VREDUCESSZ128rrib = 13628,
VREDUCESSZ128rribk = 13629,
VREDUCESSZ128rribkz = 13630,
VREDUCESSZ128rrik = 13631,
VREDUCESSZ128rrikz = 13632,
VRNDSCALEPDZ128rmbi = 13633,
VRNDSCALEPDZ128rmbik = 13634,
VRNDSCALEPDZ128rmbikz = 13635,
VRNDSCALEPDZ128rmi = 13636,
VRNDSCALEPDZ128rmik = 13637,
VRNDSCALEPDZ128rmikz = 13638,
VRNDSCALEPDZ128rri = 13639,
VRNDSCALEPDZ128rrik = 13640,
VRNDSCALEPDZ128rrikz = 13641,
VRNDSCALEPDZ256rmbi = 13642,
VRNDSCALEPDZ256rmbik = 13643,
VRNDSCALEPDZ256rmbikz = 13644,
VRNDSCALEPDZ256rmi = 13645,
VRNDSCALEPDZ256rmik = 13646,
VRNDSCALEPDZ256rmikz = 13647,
VRNDSCALEPDZ256rri = 13648,
VRNDSCALEPDZ256rrik = 13649,
VRNDSCALEPDZ256rrikz = 13650,
VRNDSCALEPDZrmbi = 13651,
VRNDSCALEPDZrmbik = 13652,
VRNDSCALEPDZrmbikz = 13653,
VRNDSCALEPDZrmi = 13654,
VRNDSCALEPDZrmik = 13655,
VRNDSCALEPDZrmikz = 13656,
VRNDSCALEPDZrri = 13657,
VRNDSCALEPDZrrib = 13658,
VRNDSCALEPDZrribk = 13659,
VRNDSCALEPDZrribkz = 13660,
VRNDSCALEPDZrrik = 13661,
VRNDSCALEPDZrrikz = 13662,
VRNDSCALEPSZ128rmbi = 13663,
VRNDSCALEPSZ128rmbik = 13664,
VRNDSCALEPSZ128rmbikz = 13665,
VRNDSCALEPSZ128rmi = 13666,
VRNDSCALEPSZ128rmik = 13667,
VRNDSCALEPSZ128rmikz = 13668,
VRNDSCALEPSZ128rri = 13669,
VRNDSCALEPSZ128rrik = 13670,
VRNDSCALEPSZ128rrikz = 13671,
VRNDSCALEPSZ256rmbi = 13672,
VRNDSCALEPSZ256rmbik = 13673,
VRNDSCALEPSZ256rmbikz = 13674,
VRNDSCALEPSZ256rmi = 13675,
VRNDSCALEPSZ256rmik = 13676,
VRNDSCALEPSZ256rmikz = 13677,
VRNDSCALEPSZ256rri = 13678,
VRNDSCALEPSZ256rrik = 13679,
VRNDSCALEPSZ256rrikz = 13680,
VRNDSCALEPSZrmbi = 13681,
VRNDSCALEPSZrmbik = 13682,
VRNDSCALEPSZrmbikz = 13683,
VRNDSCALEPSZrmi = 13684,
VRNDSCALEPSZrmik = 13685,
VRNDSCALEPSZrmikz = 13686,
VRNDSCALEPSZrri = 13687,
VRNDSCALEPSZrrib = 13688,
VRNDSCALEPSZrribk = 13689,
VRNDSCALEPSZrribkz = 13690,
VRNDSCALEPSZrrik = 13691,
VRNDSCALEPSZrrikz = 13692,
VRNDSCALESDm = 13693,
VRNDSCALESDmk = 13694,
VRNDSCALESDmkz = 13695,
VRNDSCALESDr = 13696,
VRNDSCALESDrb = 13697,
VRNDSCALESDrbk = 13698,
VRNDSCALESDrbkz = 13699,
VRNDSCALESDrk = 13700,
VRNDSCALESDrkz = 13701,
VRNDSCALESSm = 13702,
VRNDSCALESSmk = 13703,
VRNDSCALESSmkz = 13704,
VRNDSCALESSr = 13705,
VRNDSCALESSrb = 13706,
VRNDSCALESSrbk = 13707,
VRNDSCALESSrbkz = 13708,
VRNDSCALESSrk = 13709,
VRNDSCALESSrkz = 13710,
VROUNDPDm = 13711,
VROUNDPDr = 13712,
VROUNDPSm = 13713,
VROUNDPSr = 13714,
VROUNDSDm = 13715,
VROUNDSDr = 13716,
VROUNDSDr_Int = 13717,
VROUNDSSm = 13718,
VROUNDSSr = 13719,
VROUNDSSr_Int = 13720,
VROUNDYPDm = 13721,
VROUNDYPDr = 13722,
VROUNDYPSm = 13723,
VROUNDYPSr = 13724,
VRSQRT14PDZ128m = 13725,
VRSQRT14PDZ128mb = 13726,
VRSQRT14PDZ128mbk = 13727,
VRSQRT14PDZ128mbkz = 13728,
VRSQRT14PDZ128mk = 13729,
VRSQRT14PDZ128mkz = 13730,
VRSQRT14PDZ128r = 13731,
VRSQRT14PDZ128rk = 13732,
VRSQRT14PDZ128rkz = 13733,
VRSQRT14PDZ256m = 13734,
VRSQRT14PDZ256mb = 13735,
VRSQRT14PDZ256mbk = 13736,
VRSQRT14PDZ256mbkz = 13737,
VRSQRT14PDZ256mk = 13738,
VRSQRT14PDZ256mkz = 13739,
VRSQRT14PDZ256r = 13740,
VRSQRT14PDZ256rk = 13741,
VRSQRT14PDZ256rkz = 13742,
VRSQRT14PDZm = 13743,
VRSQRT14PDZmb = 13744,
VRSQRT14PDZmbk = 13745,
VRSQRT14PDZmbkz = 13746,
VRSQRT14PDZmk = 13747,
VRSQRT14PDZmkz = 13748,
VRSQRT14PDZr = 13749,
VRSQRT14PDZrk = 13750,
VRSQRT14PDZrkz = 13751,
VRSQRT14PSZ128m = 13752,
VRSQRT14PSZ128mb = 13753,
VRSQRT14PSZ128mbk = 13754,
VRSQRT14PSZ128mbkz = 13755,
VRSQRT14PSZ128mk = 13756,
VRSQRT14PSZ128mkz = 13757,
VRSQRT14PSZ128r = 13758,
VRSQRT14PSZ128rk = 13759,
VRSQRT14PSZ128rkz = 13760,
VRSQRT14PSZ256m = 13761,
VRSQRT14PSZ256mb = 13762,
VRSQRT14PSZ256mbk = 13763,
VRSQRT14PSZ256mbkz = 13764,
VRSQRT14PSZ256mk = 13765,
VRSQRT14PSZ256mkz = 13766,
VRSQRT14PSZ256r = 13767,
VRSQRT14PSZ256rk = 13768,
VRSQRT14PSZ256rkz = 13769,
VRSQRT14PSZm = 13770,
VRSQRT14PSZmb = 13771,
VRSQRT14PSZmbk = 13772,
VRSQRT14PSZmbkz = 13773,
VRSQRT14PSZmk = 13774,
VRSQRT14PSZmkz = 13775,
VRSQRT14PSZr = 13776,
VRSQRT14PSZrk = 13777,
VRSQRT14PSZrkz = 13778,
VRSQRT14SDrm = 13779,
VRSQRT14SDrmk = 13780,
VRSQRT14SDrmkz = 13781,
VRSQRT14SDrr = 13782,
VRSQRT14SDrrk = 13783,
VRSQRT14SDrrkz = 13784,
VRSQRT14SSrm = 13785,
VRSQRT14SSrmk = 13786,
VRSQRT14SSrmkz = 13787,
VRSQRT14SSrr = 13788,
VRSQRT14SSrrk = 13789,
VRSQRT14SSrrkz = 13790,
VRSQRT28PDm = 13791,
VRSQRT28PDmb = 13792,
VRSQRT28PDmbk = 13793,
VRSQRT28PDmbkz = 13794,
VRSQRT28PDmk = 13795,
VRSQRT28PDmkz = 13796,
VRSQRT28PDr = 13797,
VRSQRT28PDrb = 13798,
VRSQRT28PDrbk = 13799,
VRSQRT28PDrbkz = 13800,
VRSQRT28PDrk = 13801,
VRSQRT28PDrkz = 13802,
VRSQRT28PSm = 13803,
VRSQRT28PSmb = 13804,
VRSQRT28PSmbk = 13805,
VRSQRT28PSmbkz = 13806,
VRSQRT28PSmk = 13807,
VRSQRT28PSmkz = 13808,
VRSQRT28PSr = 13809,
VRSQRT28PSrb = 13810,
VRSQRT28PSrbk = 13811,
VRSQRT28PSrbkz = 13812,
VRSQRT28PSrk = 13813,
VRSQRT28PSrkz = 13814,
VRSQRT28SDm = 13815,
VRSQRT28SDmk = 13816,
VRSQRT28SDmkz = 13817,
VRSQRT28SDr = 13818,
VRSQRT28SDrb = 13819,
VRSQRT28SDrbk = 13820,
VRSQRT28SDrbkz = 13821,
VRSQRT28SDrk = 13822,
VRSQRT28SDrkz = 13823,
VRSQRT28SSm = 13824,
VRSQRT28SSmk = 13825,
VRSQRT28SSmkz = 13826,
VRSQRT28SSr = 13827,
VRSQRT28SSrb = 13828,
VRSQRT28SSrbk = 13829,
VRSQRT28SSrbkz = 13830,
VRSQRT28SSrk = 13831,
VRSQRT28SSrkz = 13832,
VRSQRTPSYm = 13833,
VRSQRTPSYr = 13834,
VRSQRTPSm = 13835,
VRSQRTPSr = 13836,
VRSQRTSSm = 13837,
VRSQRTSSm_Int = 13838,
VRSQRTSSr = 13839,
VRSQRTSSr_Int = 13840,
VSCALEFPDZ128rm = 13841,
VSCALEFPDZ128rmb = 13842,
VSCALEFPDZ128rmbk = 13843,
VSCALEFPDZ128rmbkz = 13844,
VSCALEFPDZ128rmk = 13845,
VSCALEFPDZ128rmkz = 13846,
VSCALEFPDZ128rr = 13847,
VSCALEFPDZ128rrk = 13848,
VSCALEFPDZ128rrkz = 13849,
VSCALEFPDZ256rm = 13850,
VSCALEFPDZ256rmb = 13851,
VSCALEFPDZ256rmbk = 13852,
VSCALEFPDZ256rmbkz = 13853,
VSCALEFPDZ256rmk = 13854,
VSCALEFPDZ256rmkz = 13855,
VSCALEFPDZ256rr = 13856,
VSCALEFPDZ256rrk = 13857,
VSCALEFPDZ256rrkz = 13858,
VSCALEFPDZrb = 13859,
VSCALEFPDZrbk = 13860,
VSCALEFPDZrbkz = 13861,
VSCALEFPDZrm = 13862,
VSCALEFPDZrmb = 13863,
VSCALEFPDZrmbk = 13864,
VSCALEFPDZrmbkz = 13865,
VSCALEFPDZrmk = 13866,
VSCALEFPDZrmkz = 13867,
VSCALEFPDZrr = 13868,
VSCALEFPDZrrk = 13869,
VSCALEFPDZrrkz = 13870,
VSCALEFPSZ128rm = 13871,
VSCALEFPSZ128rmb = 13872,
VSCALEFPSZ128rmbk = 13873,
VSCALEFPSZ128rmbkz = 13874,
VSCALEFPSZ128rmk = 13875,
VSCALEFPSZ128rmkz = 13876,
VSCALEFPSZ128rr = 13877,
VSCALEFPSZ128rrk = 13878,
VSCALEFPSZ128rrkz = 13879,
VSCALEFPSZ256rm = 13880,
VSCALEFPSZ256rmb = 13881,
VSCALEFPSZ256rmbk = 13882,
VSCALEFPSZ256rmbkz = 13883,
VSCALEFPSZ256rmk = 13884,
VSCALEFPSZ256rmkz = 13885,
VSCALEFPSZ256rr = 13886,
VSCALEFPSZ256rrk = 13887,
VSCALEFPSZ256rrkz = 13888,
VSCALEFPSZrb = 13889,
VSCALEFPSZrbk = 13890,
VSCALEFPSZrbkz = 13891,
VSCALEFPSZrm = 13892,
VSCALEFPSZrmb = 13893,
VSCALEFPSZrmbk = 13894,
VSCALEFPSZrmbkz = 13895,
VSCALEFPSZrmk = 13896,
VSCALEFPSZrmkz = 13897,
VSCALEFPSZrr = 13898,
VSCALEFPSZrrk = 13899,
VSCALEFPSZrrkz = 13900,
VSCALEFSDZ128rm = 13901,
VSCALEFSDZ128rmk = 13902,
VSCALEFSDZ128rmkz = 13903,
VSCALEFSDZ128rr = 13904,
VSCALEFSDZ128rrb = 13905,
VSCALEFSDZ128rrbk = 13906,
VSCALEFSDZ128rrbkz = 13907,
VSCALEFSDZ128rrk = 13908,
VSCALEFSDZ128rrkz = 13909,
VSCALEFSSZ128rm = 13910,
VSCALEFSSZ128rmk = 13911,
VSCALEFSSZ128rmkz = 13912,
VSCALEFSSZ128rr = 13913,
VSCALEFSSZ128rrb = 13914,
VSCALEFSSZ128rrbk = 13915,
VSCALEFSSZ128rrbkz = 13916,
VSCALEFSSZ128rrk = 13917,
VSCALEFSSZ128rrkz = 13918,
VSCATTERDPDZ128mr = 13919,
VSCATTERDPDZ256mr = 13920,
VSCATTERDPDZmr = 13921,
VSCATTERDPSZ128mr = 13922,
VSCATTERDPSZ256mr = 13923,
VSCATTERDPSZmr = 13924,
VSCATTERPF0DPDm = 13925,
VSCATTERPF0DPSm = 13926,
VSCATTERPF0QPDm = 13927,
VSCATTERPF0QPSm = 13928,
VSCATTERPF1DPDm = 13929,
VSCATTERPF1DPSm = 13930,
VSCATTERPF1QPDm = 13931,
VSCATTERPF1QPSm = 13932,
VSCATTERQPDZ128mr = 13933,
VSCATTERQPDZ256mr = 13934,
VSCATTERQPDZmr = 13935,
VSCATTERQPSZ128mr = 13936,
VSCATTERQPSZ256mr = 13937,
VSCATTERQPSZmr = 13938,
VSHUFF32X4Z256rmbi = 13939,
VSHUFF32X4Z256rmbik = 13940,
VSHUFF32X4Z256rmbikz = 13941,
VSHUFF32X4Z256rmi = 13942,
VSHUFF32X4Z256rmik = 13943,
VSHUFF32X4Z256rmikz = 13944,
VSHUFF32X4Z256rri = 13945,
VSHUFF32X4Z256rrik = 13946,
VSHUFF32X4Z256rrikz = 13947,
VSHUFF32X4Zrmbi = 13948,
VSHUFF32X4Zrmbik = 13949,
VSHUFF32X4Zrmbikz = 13950,
VSHUFF32X4Zrmi = 13951,
VSHUFF32X4Zrmik = 13952,
VSHUFF32X4Zrmikz = 13953,
VSHUFF32X4Zrri = 13954,
VSHUFF32X4Zrrik = 13955,
VSHUFF32X4Zrrikz = 13956,
VSHUFF64X2Z256rmbi = 13957,
VSHUFF64X2Z256rmbik = 13958,
VSHUFF64X2Z256rmbikz = 13959,
VSHUFF64X2Z256rmi = 13960,
VSHUFF64X2Z256rmik = 13961,
VSHUFF64X2Z256rmikz = 13962,
VSHUFF64X2Z256rri = 13963,
VSHUFF64X2Z256rrik = 13964,
VSHUFF64X2Z256rrikz = 13965,
VSHUFF64X2Zrmbi = 13966,
VSHUFF64X2Zrmbik = 13967,
VSHUFF64X2Zrmbikz = 13968,
VSHUFF64X2Zrmi = 13969,
VSHUFF64X2Zrmik = 13970,
VSHUFF64X2Zrmikz = 13971,
VSHUFF64X2Zrri = 13972,
VSHUFF64X2Zrrik = 13973,
VSHUFF64X2Zrrikz = 13974,
VSHUFI32X4Z256rmbi = 13975,
VSHUFI32X4Z256rmbik = 13976,
VSHUFI32X4Z256rmbikz = 13977,
VSHUFI32X4Z256rmi = 13978,
VSHUFI32X4Z256rmik = 13979,
VSHUFI32X4Z256rmikz = 13980,
VSHUFI32X4Z256rri = 13981,
VSHUFI32X4Z256rrik = 13982,
VSHUFI32X4Z256rrikz = 13983,
VSHUFI32X4Zrmbi = 13984,
VSHUFI32X4Zrmbik = 13985,
VSHUFI32X4Zrmbikz = 13986,
VSHUFI32X4Zrmi = 13987,
VSHUFI32X4Zrmik = 13988,
VSHUFI32X4Zrmikz = 13989,
VSHUFI32X4Zrri = 13990,
VSHUFI32X4Zrrik = 13991,
VSHUFI32X4Zrrikz = 13992,
VSHUFI64X2Z256rmbi = 13993,
VSHUFI64X2Z256rmbik = 13994,
VSHUFI64X2Z256rmbikz = 13995,
VSHUFI64X2Z256rmi = 13996,
VSHUFI64X2Z256rmik = 13997,
VSHUFI64X2Z256rmikz = 13998,
VSHUFI64X2Z256rri = 13999,
VSHUFI64X2Z256rrik = 14000,
VSHUFI64X2Z256rrikz = 14001,
VSHUFI64X2Zrmbi = 14002,
VSHUFI64X2Zrmbik = 14003,
VSHUFI64X2Zrmbikz = 14004,
VSHUFI64X2Zrmi = 14005,
VSHUFI64X2Zrmik = 14006,
VSHUFI64X2Zrmikz = 14007,
VSHUFI64X2Zrri = 14008,
VSHUFI64X2Zrrik = 14009,
VSHUFI64X2Zrrikz = 14010,
VSHUFPDYrmi = 14011,
VSHUFPDYrri = 14012,
VSHUFPDZ128rmbi = 14013,
VSHUFPDZ128rmbik = 14014,
VSHUFPDZ128rmbikz = 14015,
VSHUFPDZ128rmi = 14016,
VSHUFPDZ128rmik = 14017,
VSHUFPDZ128rmikz = 14018,
VSHUFPDZ128rri = 14019,
VSHUFPDZ128rrik = 14020,
VSHUFPDZ128rrikz = 14021,
VSHUFPDZ256rmbi = 14022,
VSHUFPDZ256rmbik = 14023,
VSHUFPDZ256rmbikz = 14024,
VSHUFPDZ256rmi = 14025,
VSHUFPDZ256rmik = 14026,
VSHUFPDZ256rmikz = 14027,
VSHUFPDZ256rri = 14028,
VSHUFPDZ256rrik = 14029,
VSHUFPDZ256rrikz = 14030,
VSHUFPDZrmbi = 14031,
VSHUFPDZrmbik = 14032,
VSHUFPDZrmbikz = 14033,
VSHUFPDZrmi = 14034,
VSHUFPDZrmik = 14035,
VSHUFPDZrmikz = 14036,
VSHUFPDZrri = 14037,
VSHUFPDZrrik = 14038,
VSHUFPDZrrikz = 14039,
VSHUFPDrmi = 14040,
VSHUFPDrri = 14041,
VSHUFPSYrmi = 14042,
VSHUFPSYrri = 14043,
VSHUFPSZ128rmbi = 14044,
VSHUFPSZ128rmbik = 14045,
VSHUFPSZ128rmbikz = 14046,
VSHUFPSZ128rmi = 14047,
VSHUFPSZ128rmik = 14048,
VSHUFPSZ128rmikz = 14049,
VSHUFPSZ128rri = 14050,
VSHUFPSZ128rrik = 14051,
VSHUFPSZ128rrikz = 14052,
VSHUFPSZ256rmbi = 14053,
VSHUFPSZ256rmbik = 14054,
VSHUFPSZ256rmbikz = 14055,
VSHUFPSZ256rmi = 14056,
VSHUFPSZ256rmik = 14057,
VSHUFPSZ256rmikz = 14058,
VSHUFPSZ256rri = 14059,
VSHUFPSZ256rrik = 14060,
VSHUFPSZ256rrikz = 14061,
VSHUFPSZrmbi = 14062,
VSHUFPSZrmbik = 14063,
VSHUFPSZrmbikz = 14064,
VSHUFPSZrmi = 14065,
VSHUFPSZrmik = 14066,
VSHUFPSZrmikz = 14067,
VSHUFPSZrri = 14068,
VSHUFPSZrrik = 14069,
VSHUFPSZrrikz = 14070,
VSHUFPSrmi = 14071,
VSHUFPSrri = 14072,
VSQRTPDYm = 14073,
VSQRTPDYr = 14074,
VSQRTPDZ128m = 14075,
VSQRTPDZ128mb = 14076,
VSQRTPDZ128mbk = 14077,
VSQRTPDZ128mbkz = 14078,
VSQRTPDZ128mk = 14079,
VSQRTPDZ128mkz = 14080,
VSQRTPDZ128r = 14081,
VSQRTPDZ128rk = 14082,
VSQRTPDZ128rkz = 14083,
VSQRTPDZ256m = 14084,
VSQRTPDZ256mb = 14085,
VSQRTPDZ256mbk = 14086,
VSQRTPDZ256mbkz = 14087,
VSQRTPDZ256mk = 14088,
VSQRTPDZ256mkz = 14089,
VSQRTPDZ256r = 14090,
VSQRTPDZ256rk = 14091,
VSQRTPDZ256rkz = 14092,
VSQRTPDZm = 14093,
VSQRTPDZmb = 14094,
VSQRTPDZmbk = 14095,
VSQRTPDZmbkz = 14096,
VSQRTPDZmk = 14097,
VSQRTPDZmkz = 14098,
VSQRTPDZr = 14099,
VSQRTPDZrb = 14100,
VSQRTPDZrbk = 14101,
VSQRTPDZrbkz = 14102,
VSQRTPDZrk = 14103,
VSQRTPDZrkz = 14104,
VSQRTPDm = 14105,
VSQRTPDr = 14106,
VSQRTPSYm = 14107,
VSQRTPSYr = 14108,
VSQRTPSZ128m = 14109,
VSQRTPSZ128mb = 14110,
VSQRTPSZ128mbk = 14111,
VSQRTPSZ128mbkz = 14112,
VSQRTPSZ128mk = 14113,
VSQRTPSZ128mkz = 14114,
VSQRTPSZ128r = 14115,
VSQRTPSZ128rk = 14116,
VSQRTPSZ128rkz = 14117,
VSQRTPSZ256m = 14118,
VSQRTPSZ256mb = 14119,
VSQRTPSZ256mbk = 14120,
VSQRTPSZ256mbkz = 14121,
VSQRTPSZ256mk = 14122,
VSQRTPSZ256mkz = 14123,
VSQRTPSZ256r = 14124,
VSQRTPSZ256rk = 14125,
VSQRTPSZ256rkz = 14126,
VSQRTPSZm = 14127,
VSQRTPSZmb = 14128,
VSQRTPSZmbk = 14129,
VSQRTPSZmbkz = 14130,
VSQRTPSZmk = 14131,
VSQRTPSZmkz = 14132,
VSQRTPSZr = 14133,
VSQRTPSZrb = 14134,
VSQRTPSZrbk = 14135,
VSQRTPSZrbkz = 14136,
VSQRTPSZrk = 14137,
VSQRTPSZrkz = 14138,
VSQRTPSm = 14139,
VSQRTPSr = 14140,
VSQRTSDZm = 14141,
VSQRTSDZm_Int = 14142,
VSQRTSDZm_Intk = 14143,
VSQRTSDZm_Intkz = 14144,
VSQRTSDZr = 14145,
VSQRTSDZr_Int = 14146,
VSQRTSDZr_Intk = 14147,
VSQRTSDZr_Intkz = 14148,
VSQRTSDZrb_Int = 14149,
VSQRTSDZrb_Intk = 14150,
VSQRTSDZrb_Intkz = 14151,
VSQRTSDm = 14152,
VSQRTSDm_Int = 14153,
VSQRTSDr = 14154,
VSQRTSDr_Int = 14155,
VSQRTSSZm = 14156,
VSQRTSSZm_Int = 14157,
VSQRTSSZm_Intk = 14158,
VSQRTSSZm_Intkz = 14159,
VSQRTSSZr = 14160,
VSQRTSSZr_Int = 14161,
VSQRTSSZr_Intk = 14162,
VSQRTSSZr_Intkz = 14163,
VSQRTSSZrb_Int = 14164,
VSQRTSSZrb_Intk = 14165,
VSQRTSSZrb_Intkz = 14166,
VSQRTSSm = 14167,
VSQRTSSm_Int = 14168,
VSQRTSSr = 14169,
VSQRTSSr_Int = 14170,
VSTMXCSR = 14171,
VSUBPDYrm = 14172,
VSUBPDYrr = 14173,
VSUBPDZ128rm = 14174,
VSUBPDZ128rmb = 14175,
VSUBPDZ128rmbk = 14176,
VSUBPDZ128rmbkz = 14177,
VSUBPDZ128rmk = 14178,
VSUBPDZ128rmkz = 14179,
VSUBPDZ128rr = 14180,
VSUBPDZ128rrk = 14181,
VSUBPDZ128rrkz = 14182,
VSUBPDZ256rm = 14183,
VSUBPDZ256rmb = 14184,
VSUBPDZ256rmbk = 14185,
VSUBPDZ256rmbkz = 14186,
VSUBPDZ256rmk = 14187,
VSUBPDZ256rmkz = 14188,
VSUBPDZ256rr = 14189,
VSUBPDZ256rrk = 14190,
VSUBPDZ256rrkz = 14191,
VSUBPDZrb = 14192,
VSUBPDZrbk = 14193,
VSUBPDZrbkz = 14194,
VSUBPDZrm = 14195,
VSUBPDZrmb = 14196,
VSUBPDZrmbk = 14197,
VSUBPDZrmbkz = 14198,
VSUBPDZrmk = 14199,
VSUBPDZrmkz = 14200,
VSUBPDZrr = 14201,
VSUBPDZrrk = 14202,
VSUBPDZrrkz = 14203,
VSUBPDrm = 14204,
VSUBPDrr = 14205,
VSUBPSYrm = 14206,
VSUBPSYrr = 14207,
VSUBPSZ128rm = 14208,
VSUBPSZ128rmb = 14209,
VSUBPSZ128rmbk = 14210,
VSUBPSZ128rmbkz = 14211,
VSUBPSZ128rmk = 14212,
VSUBPSZ128rmkz = 14213,
VSUBPSZ128rr = 14214,
VSUBPSZ128rrk = 14215,
VSUBPSZ128rrkz = 14216,
VSUBPSZ256rm = 14217,
VSUBPSZ256rmb = 14218,
VSUBPSZ256rmbk = 14219,
VSUBPSZ256rmbkz = 14220,
VSUBPSZ256rmk = 14221,
VSUBPSZ256rmkz = 14222,
VSUBPSZ256rr = 14223,
VSUBPSZ256rrk = 14224,
VSUBPSZ256rrkz = 14225,
VSUBPSZrb = 14226,
VSUBPSZrbk = 14227,
VSUBPSZrbkz = 14228,
VSUBPSZrm = 14229,
VSUBPSZrmb = 14230,
VSUBPSZrmbk = 14231,
VSUBPSZrmbkz = 14232,
VSUBPSZrmk = 14233,
VSUBPSZrmkz = 14234,
VSUBPSZrr = 14235,
VSUBPSZrrk = 14236,
VSUBPSZrrkz = 14237,
VSUBPSrm = 14238,
VSUBPSrr = 14239,
VSUBSDZrm = 14240,
VSUBSDZrm_Int = 14241,
VSUBSDZrm_Intk = 14242,
VSUBSDZrm_Intkz = 14243,
VSUBSDZrr = 14244,
VSUBSDZrr_Int = 14245,
VSUBSDZrr_Intk = 14246,
VSUBSDZrr_Intkz = 14247,
VSUBSDZrrb = 14248,
VSUBSDZrrbk = 14249,
VSUBSDZrrbkz = 14250,
VSUBSDrm = 14251,
VSUBSDrm_Int = 14252,
VSUBSDrr = 14253,
VSUBSDrr_Int = 14254,
VSUBSSZrm = 14255,
VSUBSSZrm_Int = 14256,
VSUBSSZrm_Intk = 14257,
VSUBSSZrm_Intkz = 14258,
VSUBSSZrr = 14259,
VSUBSSZrr_Int = 14260,
VSUBSSZrr_Intk = 14261,
VSUBSSZrr_Intkz = 14262,
VSUBSSZrrb = 14263,
VSUBSSZrrbk = 14264,
VSUBSSZrrbkz = 14265,
VSUBSSrm = 14266,
VSUBSSrm_Int = 14267,
VSUBSSrr = 14268,
VSUBSSrr_Int = 14269,
VTESTPDYrm = 14270,
VTESTPDYrr = 14271,
VTESTPDrm = 14272,
VTESTPDrr = 14273,
VTESTPSYrm = 14274,
VTESTPSYrr = 14275,
VTESTPSrm = 14276,
VTESTPSrr = 14277,
VUCOMISDZrb = 14278,
VUCOMISDZrm = 14279,
VUCOMISDZrr = 14280,
VUCOMISDrm = 14281,
VUCOMISDrr = 14282,
VUCOMISSZrb = 14283,
VUCOMISSZrm = 14284,
VUCOMISSZrr = 14285,
VUCOMISSrm = 14286,
VUCOMISSrr = 14287,
VUNPCKHPDYrm = 14288,
VUNPCKHPDYrr = 14289,
VUNPCKHPDZ128rm = 14290,
VUNPCKHPDZ128rmb = 14291,
VUNPCKHPDZ128rmbk = 14292,
VUNPCKHPDZ128rmbkz = 14293,
VUNPCKHPDZ128rmk = 14294,
VUNPCKHPDZ128rmkz = 14295,
VUNPCKHPDZ128rr = 14296,
VUNPCKHPDZ128rrk = 14297,
VUNPCKHPDZ128rrkz = 14298,
VUNPCKHPDZ256rm = 14299,
VUNPCKHPDZ256rmb = 14300,
VUNPCKHPDZ256rmbk = 14301,
VUNPCKHPDZ256rmbkz = 14302,
VUNPCKHPDZ256rmk = 14303,
VUNPCKHPDZ256rmkz = 14304,
VUNPCKHPDZ256rr = 14305,
VUNPCKHPDZ256rrk = 14306,
VUNPCKHPDZ256rrkz = 14307,
VUNPCKHPDZrm = 14308,
VUNPCKHPDZrmb = 14309,
VUNPCKHPDZrmbk = 14310,
VUNPCKHPDZrmbkz = 14311,
VUNPCKHPDZrmk = 14312,
VUNPCKHPDZrmkz = 14313,
VUNPCKHPDZrr = 14314,
VUNPCKHPDZrrk = 14315,
VUNPCKHPDZrrkz = 14316,
VUNPCKHPDrm = 14317,
VUNPCKHPDrr = 14318,
VUNPCKHPSYrm = 14319,
VUNPCKHPSYrr = 14320,
VUNPCKHPSZ128rm = 14321,
VUNPCKHPSZ128rmb = 14322,
VUNPCKHPSZ128rmbk = 14323,
VUNPCKHPSZ128rmbkz = 14324,
VUNPCKHPSZ128rmk = 14325,
VUNPCKHPSZ128rmkz = 14326,
VUNPCKHPSZ128rr = 14327,
VUNPCKHPSZ128rrk = 14328,
VUNPCKHPSZ128rrkz = 14329,
VUNPCKHPSZ256rm = 14330,
VUNPCKHPSZ256rmb = 14331,
VUNPCKHPSZ256rmbk = 14332,
VUNPCKHPSZ256rmbkz = 14333,
VUNPCKHPSZ256rmk = 14334,
VUNPCKHPSZ256rmkz = 14335,
VUNPCKHPSZ256rr = 14336,
VUNPCKHPSZ256rrk = 14337,
VUNPCKHPSZ256rrkz = 14338,
VUNPCKHPSZrm = 14339,
VUNPCKHPSZrmb = 14340,
VUNPCKHPSZrmbk = 14341,
VUNPCKHPSZrmbkz = 14342,
VUNPCKHPSZrmk = 14343,
VUNPCKHPSZrmkz = 14344,
VUNPCKHPSZrr = 14345,
VUNPCKHPSZrrk = 14346,
VUNPCKHPSZrrkz = 14347,
VUNPCKHPSrm = 14348,
VUNPCKHPSrr = 14349,
VUNPCKLPDYrm = 14350,
VUNPCKLPDYrr = 14351,
VUNPCKLPDZ128rm = 14352,
VUNPCKLPDZ128rmb = 14353,
VUNPCKLPDZ128rmbk = 14354,
VUNPCKLPDZ128rmbkz = 14355,
VUNPCKLPDZ128rmk = 14356,
VUNPCKLPDZ128rmkz = 14357,
VUNPCKLPDZ128rr = 14358,
VUNPCKLPDZ128rrk = 14359,
VUNPCKLPDZ128rrkz = 14360,
VUNPCKLPDZ256rm = 14361,
VUNPCKLPDZ256rmb = 14362,
VUNPCKLPDZ256rmbk = 14363,
VUNPCKLPDZ256rmbkz = 14364,
VUNPCKLPDZ256rmk = 14365,
VUNPCKLPDZ256rmkz = 14366,
VUNPCKLPDZ256rr = 14367,
VUNPCKLPDZ256rrk = 14368,
VUNPCKLPDZ256rrkz = 14369,
VUNPCKLPDZrm = 14370,
VUNPCKLPDZrmb = 14371,
VUNPCKLPDZrmbk = 14372,
VUNPCKLPDZrmbkz = 14373,
VUNPCKLPDZrmk = 14374,
VUNPCKLPDZrmkz = 14375,
VUNPCKLPDZrr = 14376,
VUNPCKLPDZrrk = 14377,
VUNPCKLPDZrrkz = 14378,
VUNPCKLPDrm = 14379,
VUNPCKLPDrr = 14380,
VUNPCKLPSYrm = 14381,
VUNPCKLPSYrr = 14382,
VUNPCKLPSZ128rm = 14383,
VUNPCKLPSZ128rmb = 14384,
VUNPCKLPSZ128rmbk = 14385,
VUNPCKLPSZ128rmbkz = 14386,
VUNPCKLPSZ128rmk = 14387,
VUNPCKLPSZ128rmkz = 14388,
VUNPCKLPSZ128rr = 14389,
VUNPCKLPSZ128rrk = 14390,
VUNPCKLPSZ128rrkz = 14391,
VUNPCKLPSZ256rm = 14392,
VUNPCKLPSZ256rmb = 14393,
VUNPCKLPSZ256rmbk = 14394,
VUNPCKLPSZ256rmbkz = 14395,
VUNPCKLPSZ256rmk = 14396,
VUNPCKLPSZ256rmkz = 14397,
VUNPCKLPSZ256rr = 14398,
VUNPCKLPSZ256rrk = 14399,
VUNPCKLPSZ256rrkz = 14400,
VUNPCKLPSZrm = 14401,
VUNPCKLPSZrmb = 14402,
VUNPCKLPSZrmbk = 14403,
VUNPCKLPSZrmbkz = 14404,
VUNPCKLPSZrmk = 14405,
VUNPCKLPSZrmkz = 14406,
VUNPCKLPSZrr = 14407,
VUNPCKLPSZrrk = 14408,
VUNPCKLPSZrrkz = 14409,
VUNPCKLPSrm = 14410,
VUNPCKLPSrr = 14411,
VXORPDYrm = 14412,
VXORPDYrr = 14413,
VXORPDZ128rm = 14414,
VXORPDZ128rmb = 14415,
VXORPDZ128rmbk = 14416,
VXORPDZ128rmbkz = 14417,
VXORPDZ128rmk = 14418,
VXORPDZ128rmkz = 14419,
VXORPDZ128rr = 14420,
VXORPDZ128rrk = 14421,
VXORPDZ128rrkz = 14422,
VXORPDZ256rm = 14423,
VXORPDZ256rmb = 14424,
VXORPDZ256rmbk = 14425,
VXORPDZ256rmbkz = 14426,
VXORPDZ256rmk = 14427,
VXORPDZ256rmkz = 14428,
VXORPDZ256rr = 14429,
VXORPDZ256rrk = 14430,
VXORPDZ256rrkz = 14431,
VXORPDZrm = 14432,
VXORPDZrmb = 14433,
VXORPDZrmbk = 14434,
VXORPDZrmbkz = 14435,
VXORPDZrmk = 14436,
VXORPDZrmkz = 14437,
VXORPDZrr = 14438,
VXORPDZrrk = 14439,
VXORPDZrrkz = 14440,
VXORPDrm = 14441,
VXORPDrr = 14442,
VXORPSYrm = 14443,
VXORPSYrr = 14444,
VXORPSZ128rm = 14445,
VXORPSZ128rmb = 14446,
VXORPSZ128rmbk = 14447,
VXORPSZ128rmbkz = 14448,
VXORPSZ128rmk = 14449,
VXORPSZ128rmkz = 14450,
VXORPSZ128rr = 14451,
VXORPSZ128rrk = 14452,
VXORPSZ128rrkz = 14453,
VXORPSZ256rm = 14454,
VXORPSZ256rmb = 14455,
VXORPSZ256rmbk = 14456,
VXORPSZ256rmbkz = 14457,
VXORPSZ256rmk = 14458,
VXORPSZ256rmkz = 14459,
VXORPSZ256rr = 14460,
VXORPSZ256rrk = 14461,
VXORPSZ256rrkz = 14462,
VXORPSZrm = 14463,
VXORPSZrmb = 14464,
VXORPSZrmbk = 14465,
VXORPSZrmbkz = 14466,
VXORPSZrmk = 14467,
VXORPSZrmkz = 14468,
VXORPSZrr = 14469,
VXORPSZrrk = 14470,
VXORPSZrrkz = 14471,
VXORPSrm = 14472,
VXORPSrr = 14473,
VZEROALL = 14474,
VZEROUPPER = 14475,
V_SET0 = 14476,
V_SETALLONES = 14477,
WAIT = 14478,
WBINVD = 14479,
WIN_ALLOCA = 14480,
WRFLAGS32 = 14481,
WRFLAGS64 = 14482,
WRFSBASE = 14483,
WRFSBASE64 = 14484,
WRGSBASE = 14485,
WRGSBASE64 = 14486,
WRMSR = 14487,
WRPKRU = 14488,
WRPKRUr = 14489,
XABORT = 14490,
XACQUIRE_PREFIX = 14491,
XADD16rm = 14492,
XADD16rr = 14493,
XADD32rm = 14494,
XADD32rr = 14495,
XADD64rm = 14496,
XADD64rr = 14497,
XADD8rm = 14498,
XADD8rr = 14499,
XBEGIN = 14500,
XBEGIN_2 = 14501,
XBEGIN_4 = 14502,
XCHG16ar = 14503,
XCHG16rm = 14504,
XCHG16rr = 14505,
XCHG32ar = 14506,
XCHG32ar64 = 14507,
XCHG32rm = 14508,
XCHG32rr = 14509,
XCHG64ar = 14510,
XCHG64rm = 14511,
XCHG64rr = 14512,
XCHG8rm = 14513,
XCHG8rr = 14514,
XCH_F = 14515,
XCRYPTCBC = 14516,
XCRYPTCFB = 14517,
XCRYPTCTR = 14518,
XCRYPTECB = 14519,
XCRYPTOFB = 14520,
XEND = 14521,
XGETBV = 14522,
XLAT = 14523,
XOR16i16 = 14524,
XOR16mi = 14525,
XOR16mi8 = 14526,
XOR16mr = 14527,
XOR16ri = 14528,
XOR16ri8 = 14529,
XOR16rm = 14530,
XOR16rr = 14531,
XOR16rr_REV = 14532,
XOR32i32 = 14533,
XOR32mi = 14534,
XOR32mi8 = 14535,
XOR32mr = 14536,
XOR32ri = 14537,
XOR32ri8 = 14538,
XOR32rm = 14539,
XOR32rr = 14540,
XOR32rr_REV = 14541,
XOR64i32 = 14542,
XOR64mi32 = 14543,
XOR64mi8 = 14544,
XOR64mr = 14545,
XOR64ri32 = 14546,
XOR64ri8 = 14547,
XOR64rm = 14548,
XOR64rr = 14549,
XOR64rr_REV = 14550,
XOR8i8 = 14551,
XOR8mi = 14552,
XOR8mi8 = 14553,
XOR8mr = 14554,
XOR8ri = 14555,
XOR8ri8 = 14556,
XOR8rm = 14557,
XOR8rr = 14558,
XOR8rr_REV = 14559,
XORPDrm = 14560,
XORPDrr = 14561,
XORPSrm = 14562,
XORPSrr = 14563,
XRELEASE_PREFIX = 14564,
XRSTOR = 14565,
XRSTOR64 = 14566,
XRSTORS = 14567,
XRSTORS64 = 14568,
XSAVE = 14569,
XSAVE64 = 14570,
XSAVEC = 14571,
XSAVEC64 = 14572,
XSAVEOPT = 14573,
XSAVEOPT64 = 14574,
XSAVES = 14575,
XSAVES64 = 14576,
XSETBV = 14577,
XSHA1 = 14578,
XSHA256 = 14579,
XSTORE = 14580,
XTEST = 14581,
fdisi8087_nop = 14582,
feni8087_nop = 14583,
INSTRUCTION_LIST_END = 14584
};
namespace Sched {
enum {
NoInstrModel = 0,
IIC_AAA_WriteMicrocoded = 1,
IIC_AAD_WriteMicrocoded = 2,
IIC_AAM_WriteMicrocoded = 3,
IIC_AAS_WriteMicrocoded = 4,
IIC_BIN_CARRY_NONMEM_WriteALU = 5,
IIC_BIN_CARRY_MEM_WriteALULd_WriteRMW = 6,
IIC_BIN_CARRY_MEM_WriteALULd_ReadAfterLd = 7,
IIC_BIN_CARRY_MEM_WriteALULd = 8,
IIC_BIN_NONMEM_WriteALU = 9,
IIC_BIN_MEM_WriteALULd_WriteRMW = 10,
WriteALU = 11,
IIC_BIN_MEM_WriteALULd_ReadAfterLd = 12,
IIC_SSE_ALU_F64P_RM_WriteFAddLd_ReadAfterLd = 13,
IIC_SSE_ALU_F64P_RR_WriteFAdd = 14,
IIC_SSE_ALU_F32P_RM_WriteFAddLd_ReadAfterLd = 15,
IIC_SSE_ALU_F32P_RR_WriteFAdd = 16,
IIC_SSE_ALU_F64S_RM_WriteFAddLd_ReadAfterLd = 17,
IIC_SSE_ALU_F64S_RR_WriteFAdd = 18,
IIC_SSE_ALU_F32S_RM_WriteFAddLd_ReadAfterLd = 19,
IIC_SSE_ALU_F32S_RR_WriteFAdd = 20,
IIC_SSE_ALU_F64P_RR_WriteFAddLd_ReadAfterLd = 21,
IIC_SSE_ALU_F32P_RR_WriteFAddLd_ReadAfterLd = 22,
WriteFAddLd = 23,
WriteFAdd = 24,
IIC_BIN_MEM_WriteALULd = 25,
IIC_AES_WriteAESDecEncLd_ReadAfterLd = 26,
IIC_AES_WriteAESDecEnc = 27,
IIC_AES_WriteAESIMCLd = 28,
IIC_AES_WriteAESIMC = 29,
WriteAESKeyGenLd = 30,
WriteAESKeyGen = 31,
WriteVecLogicLd_ReadAfterLd = 32,
WriteVecLogic = 33,
IIC_ARPL_MEM_WriteSystem = 34,
IIC_ARPL_REG_WriteSystem = 35,
WriteZero = 36,
IIC_SSE_INTALU_P_RM_WriteFBlendLd_ReadAfterLd = 37,
IIC_SSE_INTALU_P_RR_WriteFBlend = 38,
IIC_ALU_MEM_WriteFBlendLd_ReadAfterLd = 39,
IIC_ALU_NONMEM_WriteFBlend = 40,
IIC_BOUND_WriteSystem = 41,
IIC_BIT_SCAN_MEM_WriteShiftLd = 42,
IIC_BIT_SCAN_REG_WriteShift = 43,
IIC_BSWAP_WriteALU = 44,
IIC_BT_MI_WriteALU = 45,
IIC_BT_MR_WriteALULd = 46,
IIC_BT_RI_WriteALU = 47,
IIC_BT_RR_WriteALU = 48,
IIC_BTX_MI_WriteALULd_WriteRMW = 49,
IIC_BTX_MR_WriteALULd_WriteRMW = 50,
IIC_BTX_RI_WriteALU = 51,
IIC_BTX_RR_WriteALU = 52,
IIC_CALL_MEM_WriteJumpLd = 53,
IIC_CALL_RI_WriteJump = 54,
IIC_CALL_MEM_WriteJump = 55,
WriteSystem = 56,
IIC_CBW = 57,
IIC_CLC_WriteALU = 58,
IIC_CLD_WriteALU = 59,
IIC_SSE_PREFETCH_WriteLoad = 60,
IIC_CLI_WriteALU = 61,
IIC_CLTS_WriteALU = 62,
IIC_CMC_WriteALU = 63,
IIC_CMOV16_RM_WriteALULd_ReadAfterLd = 64,
IIC_CMOV16_RR_WriteALU = 65,
IIC_CMOV32_RM_WriteALULd_ReadAfterLd = 66,
IIC_CMOV32_RR_WriteALU = 67,
IIC_CMPS_WriteMicrocoded = 68,
IIC_CMPXCHG_16B_WriteALULd_WriteRMW = 69,
IIC_CMPXCHG_MEM_WriteALULd_WriteRMW = 70,
IIC_CMPXCHG_REG_WriteALU = 71,
IIC_CMPXCHG_8B_WriteALULd_WriteRMW = 72,
IIC_CMPXCHG_MEM8_WriteALULd_WriteRMW = 73,
IIC_CMPXCHG_REG8_WriteALU = 74,
IIC_SSE_COMIS_RM_WriteFAddLd_ReadAfterLd = 75,
IIC_SSE_COMIS_RR_WriteFAdd = 76,
IIC_FCOMI_WriteFAdd = 77,
IIC_CPUID_WriteSystem = 78,
IIC_CRC32_MEM_WriteFAddLd_ReadAfterLd = 79,
IIC_CRC32_REG_WriteFAdd = 80,
IIC_SSE_CVT_PD_RR_WriteCvtI2FLd = 81,
IIC_SSE_CVT_PD_RM_WriteCvtI2F = 82,
IIC_SSE_CVT_PS_RM_WriteCvtI2FLd = 83,
IIC_SSE_CVT_PS_RR_WriteCvtI2F = 84,
IIC_SSE_CVT_PD_RM_WriteCvtF2ILd = 85,
IIC_SSE_CVT_PD_RR_WriteCvtF2I = 86,
IIC_SSE_CVT_PD_RM_WriteCvtF2FLd = 87,
IIC_SSE_CVT_PD_RR_WriteCvtF2F = 88,
IIC_SSE_CVT_PS_RM_WriteCvtF2ILd = 89,
IIC_SSE_CVT_PS_RR_WriteCvtF2I = 90,
IIC_SSE_CVT_SD2SI_RM_WriteCvtF2ILd = 91,
IIC_SSE_CVT_SD2SI_RR_WriteCvtF2I = 92,
IIC_SSE_CVT_Scalar_RM_WriteCvtF2FLd = 93,
IIC_SSE_CVT_Scalar_RR_WriteCvtF2F = 94,
IIC_SSE_CVT_Scalar_RM_WriteCvtI2FLd = 95,
IIC_SSE_CVT_Scalar_RR_WriteCvtI2F = 96,
IIC_SSE_CVT_SS2SI64_RM_WriteCvtF2ILd = 97,
IIC_SSE_CVT_SS2SI64_RR_WriteCvtF2I = 98,
IIC_SSE_CVT_SS2SI32_RM_WriteCvtF2ILd = 99,
IIC_SSE_CVT_SS2SI32_RR_WriteCvtF2I = 100,
IIC_DAA_WriteMicrocoded = 101,
IIC_DAS_WriteMicrocoded = 102,
IIC_UNARY_MEM_WriteALULd_WriteRMW = 103,
IIC_UNARY_REG_WriteALU = 104,
IIC_DIV16_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 105,
IIC_DIV16_WriteIDiv = 106,
IIC_DIV32_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 107,
IIC_DIV32_WriteIDiv = 108,
IIC_DIV64_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 109,
IIC_DIV64_WriteIDiv = 110,
IIC_DIV8_MEM_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 111,
IIC_DIV8_REG_WriteIDiv = 112,
IIC_SSE_DIV_F64P_RM_WriteFDivLd_ReadAfterLd = 113,
IIC_SSE_DIV_F64P_RR_WriteFDiv = 114,
IIC_SSE_DIV_F32P_RR_WriteFDiv = 115,
WriteFDivLd = 116,
WriteFDiv = 117,
IIC_SSE_DIV_F64S_RM_WriteFDivLd_ReadAfterLd = 118,
IIC_SSE_DIV_F64S_RR_WriteFDiv = 119,
IIC_SSE_DIV_F32S_RR_WriteFDiv = 120,
IIC_SSE_DPPD_RM_WriteFAddLd_ReadAfterLd = 121,
IIC_SSE_DPPD_RR_WriteFAdd = 122,
IIC_SSE_DPPS_RR_WriteFAdd = 123,
IIC_RET_WriteSystem = 124,
IIC_ENTER_WriteMicrocoded = 125,
IIC_SSE_EXTRACTPS_RM_WriteFBlendLd_WriteRMW = 126,
IIC_SSE_EXTRACTPS_RR_WriteFBlend = 127,
IIC_F2XM1_WriteMicrocoded = 128,
IIC_CALL_FAR_PTR_WriteJump = 129,
IIC_CALL_FAR_MEM_WriteJumpLd = 130,
IIC_CALL_FAR_MEM_WriteJump = 131,
IIC_JMP_FAR_PTR_WriteJump = 132,
IIC_JMP_FAR_MEM_WriteJumpLd = 133,
IIC_JMP_FAR_MEM_WriteJump = 134,
IIC_FCOMPP_WriteMicrocoded = 135,
IIC_FPSTP_WriteMicrocoded = 136,
IIC_FFREE_WriteMicrocoded = 137,
IIC_FLDCW_WriteLoad = 138,
IIC_FLDL_WriteMicrocoded = 139,
IIC_FNCLEX_WriteMicrocoded = 140,
IIC_FNINIT_WriteMicrocoded = 141,
IIC_FNOP_WriteMicrocoded = 142,
IIC_FNSTCW_WriteALU = 143,
IIC_FNSTSW_WriteALU = 144,
IIC_FPATAN_WriteMicrocoded = 145,
IIC_FPREM_WriteMicrocoded = 146,
IIC_FPREM1_WriteMicrocoded = 147,
IIC_FPTAN_WriteMicrocoded = 148,
IIC_FRNDINT_WriteMicrocoded = 149,
IIC_FSCALE_WriteMicrocoded = 150,
IIC_FNCLEX = 151,
IIC_FSINCOS_WriteMicrocoded = 152,
IIC_FXAM_WriteMicrocoded = 153,
IIC_FXRSTOR_WriteMicrocoded = 154,
IIC_FXSAVE_WriteMicrocoded = 155,
IIC_FXTRACT_WriteMicrocoded = 156,
IIC_FYL2X_WriteMicrocoded = 157,
IIC_FYL2XP1_WriteMicrocoded = 158,
IIC_SSE_BIT_P_RM_WriteFAddLd_ReadAfterLd = 159,
IIC_SSE_BIT_P_RR_WriteFAdd = 160,
IIC_SSE_MOVA_P_RM_WriteLoad = 161,
IIC_SSE_HADDSUB_RM_WriteFAddLd_ReadAfterLd = 162,
IIC_SSE_HADDSUB_RR_WriteFAdd = 163,
IIC_HLT_WriteSystem = 164,
IIC_IDIV16_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 165,
IIC_IDIV16_WriteIDiv = 166,
IIC_IDIV32_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 167,
IIC_IDIV32_WriteIDiv = 168,
IIC_IDIV64_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 169,
IIC_IDIV64_WriteIDiv = 170,
IIC_IDIV8_WriteIDivLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 171,
IIC_IDIV8_WriteIDiv = 172,
IIC_FILD_WriteLoad = 173,
IIC_IMUL16_MEM_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 174,
IIC_IMUL16_RR_WriteIMul = 175,
IIC_IMUL16_RM_WriteIMulLd_ReadAfterLd = 176,
IIC_IMUL16_RMI_WriteIMulLd = 177,
IIC_IMUL16_RRI_WriteIMul = 178,
IIC_IMUL32_MEM_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 179,
IIC_IMUL32_RR_WriteIMul = 180,
IIC_IMUL32_RM_WriteIMulLd_ReadAfterLd = 181,
IIC_IMUL32_RMI_WriteIMulLd = 182,
IIC_IMUL32_RRI_WriteIMul = 183,
IIC_IMUL64_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 184,
IIC_IMUL64_RR_WriteIMul = 185,
IIC_IMUL64_RM_WriteIMulLd_ReadAfterLd = 186,
IIC_IMUL64_RMI_WriteIMulLd = 187,
IIC_IMUL64_RRI_WriteIMul = 188,
IIC_IMUL8_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 189,
IIC_IMUL8_WriteIMul = 190,
IIC_IN_RI_WriteSystem = 191,
IIC_IN_RR_WriteSystem = 192,
IIC_INS_WriteSystem = 193,
IIC_SSE_INSERTPS_RM_WriteFShuffleLd_ReadAfterLd = 194,
IIC_SSE_INSERTPS_RR_WriteFShuffle = 195,
IIC_INT_WriteSystem = 196,
IIC_INT3_WriteSystem = 197,
IIC_INVD_WriteSystem = 198,
IIC_INVLPG_WriteSystem = 199,
WriteJumpLd = 200,
IIC_IRET_WriteJumpLd = 201,
IIC_FST_WriteStore = 202,
IIC_FIST_WriteStore = 203,
IIC_SSE_CVT_Scalar_RM_WriteCvtF2FLd_ReadAfterLd = 204,
IIC_SSE_CVT_Scalar_RM_WriteCvtI2FLd_ReadAfterLd = 205,
WriteLoad = 206,
IIC_Jcc_WriteJump = 207,
IIC_JCXZ_WriteJump = 208,
IIC_JMP_MEM_WriteJumpLd = 209,
IIC_JMP_REG_WriteJump = 210,
IIC_JMP_REL_WriteJump = 211,
IIC_AHF_WriteALU = 212,
IIC_LAR_RM_WriteSystem = 213,
IIC_LAR_RR_WriteSystem = 214,
IIC_CMPX_LOCK_WriteALULd_WriteRMW = 215,
IIC_CMPX_LOCK_16B_WriteALULd_WriteRMW = 216,
IIC_CMPX_LOCK_8_WriteALULd_WriteRMW = 217,
IIC_CMPX_LOCK_8B_WriteALULd_WriteRMW = 218,
IIC_SSE_LDDQU_WriteLoad = 219,
IIC_SSE_LDMXCSR_WriteLoad = 220,
IIC_LXS_WriteSystem = 221,
IIC_FLDZ_WriteZero = 222,
IIC_FIST_WriteZero = 223,
IIC_FLD_WriteLoad = 224,
IIC_FLD80_WriteLoad = 225,
IIC_FLD_WriteMove = 226,
IIC_LEA_16_WriteLEA = 227,
IIC_LEA_WriteLEA = 228,
IIC_LEAVE_WriteALU = 229,
IIC_SSE_LFENCE_WriteFence = 230,
IIC_LGDT_WriteSystem = 231,
IIC_LIDT_WriteSystem = 232,
IIC_LLDT_MEM_WriteSystem = 233,
IIC_LLDT_REG_WriteSystem = 234,
IIC_LMSW_REG_WriteSystem = 235,
IIC_LMSW_MEM_WriteSystem = 236,
IIC_ALU_MEM_WriteALULd_WriteRMW = 237,
IIC_ALU_NONMEM_WriteALULd_WriteRMW = 238,
IIC_LODS_WriteMicrocoded = 239,
IIC_LOOP_WriteJump = 240,
IIC_LOOPE_WriteJump = 241,
IIC_LOOPNE_WriteJump = 242,
IIC_RET_WriteJumpLd = 243,
IIC_LSL_RM_WriteSystem = 244,
IIC_LSL_RR_WriteSystem = 245,
IIC_LTR_WriteSystem = 246,
IIC_XADD_LOCK_MEM_WriteALULd_WriteRMW = 247,
IIC_XADD_LOCK_MEM8_WriteALULd_WriteRMW = 248,
IIC_SSE_MASKMOV_WriteStore = 249,
IIC_SSE_MFENCE_WriteFence = 250,
IIC_MMX_CVT_PD_RM_WriteCvtF2ILd = 251,
IIC_MMX_CVT_PD_RR_WriteCvtF2I = 252,
WriteCvtI2FLd = 253,
WriteCvtI2F = 254,
IIC_MMX_CVT_PS_RM_WriteCvtF2ILd = 255,
IIC_MMX_CVT_PS_RR_WriteCvtF2I = 256,
IIC_MMX_EMMS = 257,
IIC_MMX_MASKMOV_WriteShuffle = 258,
IIC_MMX_MOV_REG_MM_WriteStore = 259,
IIC_MMX_MOV_REG_MM_WriteMove = 260,
IIC_MMX_MOV_MM_RM_WriteStore = 261,
IIC_MMX_MOV_MM_RM_WriteLoad = 262,
IIC_MMX_MOV_MM_RM_WriteMove = 263,
IIC_MMX_MOVQ_RM_WriteLoad = 264,
IIC_MMX_MOVQ_RR_WriteMove = 265,
IIC_MMX_MOVQ_RM_WriteStore = 266,
WriteMove = 267,
IIC_MMX_ALU_RM_WriteVecALULd = 268,
IIC_MMX_ALU_RR_WriteVecALU = 269,
IIC_MMX_PCK_RM_WriteShuffleLd_ReadAfterLd = 270,
IIC_MMX_PCK_RR_WriteShuffle = 271,
IIC_MMX_ALU_RM_WriteVecALULd_ReadAfterLd = 272,
IIC_MMX_ALUQ_RM_WriteVecALULd_ReadAfterLd = 273,
IIC_MMX_ALUQ_RR_WriteVecALU = 274,
WriteShuffleLd_ReadAfterLd = 275,
WriteShuffle = 276,
IIC_MMX_ALU_RM_WriteVecLogicLd_ReadAfterLd = 277,
IIC_MMX_ALU_RR_WriteVecLogic = 278,
IIC_MMX_MISC_FUNC_REG_WriteVecIMulLd_ReadAfterLd = 279,
IIC_MMX_MISC_FUNC_MEM_WriteVecIMul = 280,
IIC_MMX_PEXTR_WriteShuffle = 281,
IIC_MMX_PHADDSUBW_RM_WriteVecALULd_ReadAfterLd = 282,
IIC_MMX_PHADDSUBW_RR_WriteVecALU = 283,
IIC_MMX_PHADDSUBD_RM_WriteVecALULd_ReadAfterLd = 284,
IIC_MMX_PHADDSUBD_RR_WriteVecALU = 285,
IIC_MMX_PINSRW_WriteShuffleLd_ReadAfterLd = 286,
IIC_MMX_PINSRW_WriteShuffle = 287,
IIC_MMX_PMUL_WriteVecIMulLd_ReadAfterLd = 288,
IIC_MMX_PMUL_WriteVecIMul = 289,
IIC_MMX_PSADBW_WriteVecIMulLd_ReadAfterLd = 290,
IIC_MMX_PSADBW_WriteVecIMul = 291,
IIC_MMX_PSHUF_WriteShuffleLd_ReadAfterLd = 292,
IIC_MMX_PSHUF_WriteShuffle = 293,
IIC_MMX_PSHUF_WriteShuffleLd = 294,
IIC_MMX_SHIFT_RI_WriteVecShift = 295,
IIC_MMX_SHIFT_RM_WriteVecShiftLd_ReadAfterLd = 296,
IIC_MMX_SHIFT_RR_WriteVecShift = 297,
IIC_MMX_UNPCK_H_RM_WriteShuffleLd_ReadAfterLd = 298,
IIC_MMX_UNPCK_H_RR_WriteShuffle = 299,
IIC_MMX_UNPCK_L_WriteShuffleLd_ReadAfterLd = 300,
IIC_MMX_UNPCK_L_WriteShuffle = 301,
IIC_SSE_MONITOR_WriteSystem = 302,
IIC_MOV_MEM_WriteALU = 303,
IIC_MOV_MEM_WriteStore = 304,
IIC_MOV_MEM_SR_WriteMove = 305,
IIC_MOV_WriteMove = 306,
IIC_MOV_MEM_WriteLoad = 307,
IIC_MOV_REG_SR_WriteMove = 308,
IIC_MOV_SR_MEM_WriteMove = 309,
IIC_MOV_SR_REG_WriteMove = 310,
IIC_MOV_CR_REG_WriteSystem = 311,
IIC_MOV_DR_REG_WriteSystem = 312,
IIC_ALU_NONMEM_WriteZero = 313,
IIC_MOV_REG_CR_WriteSystem = 314,
IIC_MOV_REG_DR_WriteSystem = 315,
IIC_SSE_MOVDQ_WriteLoad = 316,
IIC_SSE_MOVDQ_WriteMove = 317,
IIC_SSE_MOVA_P_MR_WriteStore = 318,
IIC_SSE_MOVA_P_RR_WriteFShuffle = 319,
IIC_MOVBE_WriteStore = 320,
IIC_MOVBE_WriteALULd = 321,
IIC_SSE_MOV_LH_WriteLoad = 322,
IIC_SSE_MOV_LH_WriteFShuffle = 323,
IIC_SSE_MOVA_P_RR_WriteMove = 324,
IIC_SSE_MOVU_P_MR_WriteStore = 325,
IIC_SSE_MOVU_P_RM_WriteLoad = 326,
IIC_SSE_MOVU_P_RR_WriteMove = 327,
IIC_SSE_MOV_LH_WriteStore = 328,
IIC_SSE_MOV_LH_WriteFShuffleLd_ReadAfterLd = 329,
IIC_SSE_MOVMSK_WriteVecLogic = 330,
IIC_SSE_MOVNT_WriteStore = 331,
IIC_SSE_MOVDQ_WriteStore = 332,
IIC_SSE_MOVD_ToGP_WriteMove = 333,
IIC_SSE_MOVQ_RR_WriteVecLogic = 334,
IIC_MOVS_WriteMicrocoded = 335,
IIC_SSE_MOV_S_MR_WriteStore = 336,
IIC_SSE_MOV_S_RM_WriteLoad = 337,
IIC_SSE_MOV_S_RR_WriteFShuffle = 338,
IIC_MOVSX_R16_M8_WriteALULd = 339,
IIC_MOVSX_R16_R8_WriteALU = 340,
IIC_MOVSX_WriteALULd = 341,
IIC_MOVSX_WriteALU = 342,
IIC_SSE_MOVU_P_RR_WriteFShuffle = 343,
IIC_SSE_MOVDQ_WriteVecLogicLd = 344,
IIC_MOVZX_R16_M8_WriteALULd = 345,
IIC_MOVZX_R16_R8_WriteALU = 346,
IIC_MOVZX_WriteALULd = 347,
IIC_MOVZX_WriteALU = 348,
IIC_SSE_MPSADBW_RM_WriteMPSADLd_ReadAfterLd = 349,
IIC_SSE_MPSADBW_RR_WriteMPSAD = 350,
IIC_MUL16_MEM_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 351,
IIC_MUL16_REG_WriteIMul = 352,
IIC_MUL32_MEM_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 353,
IIC_MUL32_REG_WriteIMul = 354,
IIC_MUL64_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 355,
IIC_MUL64_WriteIMul = 356,
IIC_MUL8_WriteIMulLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd_ReadAfterLd = 357,
IIC_MUL8_WriteIMul = 358,
IIC_SSE_MUL_F64P_RM_WriteFMulLd_ReadAfterLd = 359,
IIC_SSE_MUL_F64P_RR_WriteFMul = 360,
IIC_SSE_MUL_F32P_RR_WriteFMul = 361,
IIC_SSE_MUL_F64S_RM_WriteFMulLd_ReadAfterLd = 362,
IIC_SSE_MUL_F64S_RR_WriteFMul = 363,
IIC_SSE_MUL_F32S_RR_WriteFMul = 364,
IIC_MUL8_WriteIMulLd_WriteIMulH = 365,
IIC_MUL8_WriteIMul_WriteIMulH = 366,
WriteFMulLd = 367,
WriteFMul = 368,
IIC_SSE_MWAIT_WriteSystem = 369,
IIC_NOP_WriteZero = 370,
IIC_OUT_IR_WriteSystem = 371,
IIC_OUT_RR_WriteSystem = 372,
IIC_OUTS_WriteSystem = 373,
IIC_SSE_PABS_RM_WriteVecALULd = 374,
IIC_SSE_PABS_RR_WriteVecALU = 375,
IIC_SSE_INTALU_P_RM_WriteVecALULd_ReadAfterLd = 376,
IIC_SSE_INTALU_P_RR_WriteVecALU = 377,
IIC_SSE_INTALUQ_P_RM_WriteVecALULd_ReadAfterLd = 378,
IIC_SSE_INTALUQ_P_RR_WriteVecALU = 379,
IIC_SSE_PALIGNRM_WriteShuffleLd_ReadAfterLd = 380,
IIC_SSE_PALIGNRR_WriteShuffle = 381,
IIC_SSE_BIT_P_RM_WriteVecLogicLd_ReadAfterLd = 382,
IIC_SSE_BIT_P_RR_WriteVecLogic = 383,
IIC_SSE_PAUSE_WriteNop = 384,
IIC_ALU_MEM_WriteVarBlendLd_ReadAfterLd = 385,
IIC_ALU_NONMEM_WriteVarBlend = 386,
IIC_SSE_INTALU_P_RM_WriteBlendLd_ReadAfterLd = 387,
IIC_SSE_INTALU_P_RR_WriteBlend = 388,
IIC_SSE_PCLMULQDQ_RM_WriteCLMulLd_ReadAfterLd = 389,
IIC_SSE_PCLMULQDQ_RR_WriteCLMul = 390,
WriteVecALULd_ReadAfterLd = 391,
WriteVecALU = 392,
WritePCmpEStrILd_ReadAfterLd = 393,
WritePCmpEStrI = 394,
WritePCmpEStrMLd_ReadAfterLd = 395,
WritePCmpEStrM = 396,
WritePCmpIStrILd_ReadAfterLd = 397,
WritePCmpIStrI = 398,
WritePCmpIStrMLd_ReadAfterLd = 399,
WritePCmpIStrM = 400,
WriteShuffleLd_WriteRMW = 401,
IIC_SSE_PEXTRW_WriteShuffleLd_ReadAfterLd = 402,
IIC_SSE_PHADDSUBD_RM_WriteVecALULd_ReadAfterLd = 403,
IIC_SSE_PHADDSUBD_RR_WriteVecALU = 404,
IIC_SSE_PHADDSUBW_RM_WriteVecALULd_ReadAfterLd = 405,
IIC_SSE_PHADDSUBW_RR_WriteVecALU = 406,
WriteVecIMulLd = 407,
WriteVecIMul = 408,
IIC_SSE_PINSRW_WriteShuffleLd_ReadAfterLd = 409,
IIC_SSE_PINSRW_WriteShuffle = 410,
WriteVecIMulLd_ReadAfterLd = 411,
IIC_SSE_PMADD_WriteVecIMulLd_ReadAfterLd = 412,
IIC_SSE_PMADD_WriteVecIMul = 413,
IIC_SSE_INTALU_P_RM_WriteShuffleLd = 414,
IIC_SSE_INTALU_P_RR_WriteShuffle = 415,
IIC_SSE_INTMUL_P_RM_WriteVecIMulLd_ReadAfterLd = 416,
IIC_SSE_INTMUL_P_RR_WriteVecIMul = 417,
IIC_POP_REG16_WriteLoad = 418,
IIC_POP_MEM_WriteLoad = 419,
IIC_POP_REG_WriteLoad = 420,
IIC_POP_A_WriteLoad = 421,
IIC_SSE_POPCNT_RM_WriteFAddLd = 422,
IIC_SSE_POPCNT_RR_WriteFAdd = 423,
IIC_POP_SR_WriteSystem = 424,
IIC_POP_F_WriteLoad = 425,
IIC_POP_FD_WriteLoad = 426,
IIC_POP_SR_SS_WriteSystem = 427,
IIC_SSE_PSHUFB_RM_WriteShuffleLd_ReadAfterLd = 428,
IIC_SSE_PSHUFB_RR_WriteShuffle = 429,
IIC_SSE_PSHUF_MI_WriteShuffleLd_ReadAfterLd = 430,
IIC_SSE_PSHUF_RI_WriteShuffle = 431,
IIC_SSE_PSIGN_RM_WriteVecALULd_ReadAfterLd = 432,
IIC_SSE_PSIGN_RR_WriteVecALU = 433,
IIC_SSE_INTSHDQ_P_RI_WriteVecShift = 434,
IIC_SSE_INTSH_P_RI_WriteVecShift = 435,
IIC_SSE_INTSH_P_RM_WriteVecShiftLd_ReadAfterLd = 436,
IIC_SSE_INTSH_P_RR_WriteVecShift = 437,
IIC_SSE_UNPCK_WriteShuffleLd_ReadAfterLd = 438,
IIC_SSE_UNPCK_WriteShuffle = 439,
IIC_PUSH_IMM_WriteStore = 440,
IIC_PUSH_REG_WriteStore = 441,
IIC_PUSH_MEM_WriteRMW = 442,
IIC_PUSH_A_WriteStore = 443,
IIC_PUSH_SR_WriteSystem = 444,
IIC_PUSH_CS_WriteSystem = 445,
IIC_PUSH_F_WriteStore = 446,
IIC_SR_WriteShiftLd_WriteRMW = 447,
IIC_SR_WriteShift = 448,
IIC_SSE_RCPP_RM_WriteFRcpLd = 449,
IIC_SSE_RCPP_RR_WriteFRcp = 450,
IIC_SSE_RCPS_RM_WriteFRcpLd_ReadAfterLd = 451,
WriteFRcpLd_ReadAfterLd = 452,
IIC_SSE_RCPS_RR_WriteFRcp = 453,
WriteRMW = 454,
IIC_RDMSR_WriteSystem = 455,
IIC_RDPMC_WriteSystem = 456,
IIC_RDTSC_WriteSystem = 457,
IIC_REP_MOVS_WriteMicrocoded = 458,
IIC_REP_STOS_WriteMicrocoded = 459,
IIC_RET_IMM_WriteJumpLd = 460,
WriteShiftLd = 461,
WriteShift = 462,
IIC_SSE_ROUNDPS_REG_WriteFAddLd = 463,
IIC_SSE_ROUNDPS_REG_WriteFAdd = 464,
IIC_SSE_ROUNDPS_MEM_WriteFAddLd = 465,
WriteFAddLd_ReadAfterLd = 466,
IIC_RSM_WriteSystem = 467,
IIC_SSE_RSQRTPS_RM_WriteFRsqrtLd = 468,
IIC_SSE_RSQRTPS_RR_WriteFRsqrt = 469,
IIC_SSE_RSQRTSS_RM_WriteFRsqrtLd_ReadAfterLd = 470,
WriteFRsqrtLd_ReadAfterLd = 471,
IIC_SSE_RSQRTSS_RR_WriteFRsqrt = 472,
WriteShiftLd_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadDefault_ReadAfterLd = 473,
IIC_SCAS_WriteMicrocoded = 474,
IIC_SET_M_WriteALU_WriteStore = 475,
IIC_SET_R_WriteALU = 476,
IIC_SSE_SFENCE_WriteFence = 477,
IIC_SGDT_WriteSystem = 478,
IIC_SHD16_MEM_CL_WriteShiftLd_WriteRMW = 479,
IIC_SHD16_MEM_IM_WriteShiftLd_WriteRMW = 480,
IIC_SHD16_REG_CL_WriteShift = 481,
IIC_SHD16_REG_IM_WriteShift = 482,
IIC_SHD32_MEM_CL_WriteShiftLd_WriteRMW = 483,
IIC_SHD32_MEM_IM_WriteShiftLd_WriteRMW = 484,
IIC_SHD32_REG_CL_WriteShift = 485,
IIC_SHD32_REG_IM_WriteShift = 486,
IIC_SHD64_MEM_CL_WriteShiftLd_WriteRMW = 487,
IIC_SHD64_MEM_IM_WriteShiftLd_WriteRMW = 488,
IIC_SHD64_REG_CL_WriteShift = 489,
IIC_SHD64_REG_IM_WriteShift = 490,
IIC_SSE_SHUFP_WriteFShuffleLd_ReadAfterLd = 491,
IIC_SSE_SHUFP_WriteFShuffle = 492,
IIC_SIDT_WriteSystem = 493,
IIC_SLDT_WriteSystem = 494,
IIC_SMSW_WriteSystem = 495,
IIC_SSE_SQRTPD_RM_WriteFSqrtLd = 496,
IIC_SSE_SQRTPD_RR_WriteFSqrt = 497,
IIC_SSE_SQRTPS_RM_WriteFSqrtLd = 498,
IIC_SSE_SQRTPS_RR_WriteFSqrt = 499,
IIC_SSE_SQRTSD_RM_WriteFSqrtLd_ReadAfterLd = 500,
WriteFSqrtLd_ReadAfterLd = 501,
IIC_SSE_SQRTSD_RR_WriteFSqrt = 502,
IIC_SSE_SQRTSS_RM_WriteFSqrtLd_ReadAfterLd = 503,
IIC_SSE_SQRTSS_RR_WriteFSqrt = 504,
WriteFSqrt = 505,
IIC_STC_WriteALU = 506,
IIC_STD_WriteALU = 507,
IIC_STI_WriteALU = 508,
IIC_SSE_STMXCSR_WriteStore = 509,
IIC_STOS_WriteMicrocoded = 510,
IIC_STR_WriteSystem = 511,
IIC_FST80_WriteStore = 512,
IIC_FST_WriteMove = 513,
IIC_SWAPGS_WriteSystem = 514,
IIC_SYSCALL_WriteSystem = 515,
IIC_SYS_ENTER_EXIT_WriteSystem = 516,
IIC_JMP_REL_WriteJumpLd = 517,
IIC_JMP_MEM_WriteJump = 518,
IIC_JMP_REG_WriteJumpLd = 519,
WriteJump = 520,
IIC_FUCOMI_WriteFAdd = 521,
IIC_FUCOM_WriteFAdd = 522,
IIC_SSE_UNPCK_WriteFShuffleLd_ReadAfterLd = 523,
IIC_SSE_UNPCK_WriteFShuffle = 524,
IIC_SSE_ALU_F64S_RR = 525,
IIC_SSE_ALU_F32S_RR = 526,
WriteFVarBlendLd_ReadAfterLd = 527,
WriteFVarBlend = 528,
WriteFShuffleLd = 529,
WriteFShuffle256 = 530,
WriteFShuffle = 531,
IIC_SSE_ALU_F32P_RM = 532,
WriteCvtF2ILd = 533,
WriteCvtF2I = 534,
WriteCvtF2FLd = 535,
WriteCvtF2F = 536,
WriteCvtF2FLd_WriteRMW = 537,
WriteCvtF2FLd_ReadAfterLd = 538,
WriteCvtI2FLd_ReadAfterLd = 539,
IIC_VERR_WriteSystem = 540,
IIC_VERW_REG_WriteSystem = 541,
IIC_VERW_MEM_WriteSystem = 542,
WriteStore = 543,
WriteShuffle256 = 544,
IIC_ALU_MEM_WriteFBlendLd_WriteRMW = 545,
WriteFShuffleLd_ReadAfterLd = 546,
WriteShuffle256Ld_ReadAfterLd = 547,
IIC_ALU_MEM_WriteFShuffleLd_ReadAfterLd = 548,
IIC_ALU_NONMEM_WriteFShuffle = 549,
IIC_SSE_MOVDQ = 550,
IIC_SSE_MOV_LH = 551,
IIC_SSE_MOVD_ToGP = 552,
IIC_SSE_MOV_S_MR = 553,
IIC_SSE_MOV_S_RM = 554,
IIC_SSE_MOV_S_RR = 555,
IIC_SSE_MOVQ_RR = 556,
IIC_ALU_MEM_WriteMPSADLd_ReadAfterLd = 557,
IIC_ALU_NONMEM_WriteMPSAD = 558,
WriteVecALULd = 559,
WriteBlendLd_ReadAfterLd = 560,
WriteBlend = 561,
WriteVarBlendLd_ReadAfterLd = 562,
WriteVarBlend = 563,
IIC_ALU_MEM_WriteBlendLd_ReadAfterLd = 564,
IIC_ALU_NONMEM_WriteBlend = 565,
WriteCLMulLd_ReadAfterLd = 566,
WriteCLMul = 567,
IIC_SSE_ALU_F32P_RR = 568,
WriteFShuffle256Ld_ReadAfterLd = 569,
IIC_ALU_MEM_WriteShuffleLd = 570,
IIC_ALU_NONMEM_WriteShuffle = 571,
WriteVarVecShift_ReadAfterLd = 572,
WriteVarVecShift = 573,
IIC_SSE_PSHUF_MI_WriteShuffleLd = 574,
WriteVecShift = 575,
WriteVarVecShiftLd_ReadAfterLd = 576,
WriteFRcpLd = 577,
WriteFRsqrtLd = 578,
WriteFSqrtLd = 579,
IIC_WAIT_WriteMicrocoded = 580,
IIC_WRMSR_WriteSystem = 581,
IIC_XADD_MEM_WriteALULd_WriteRMW = 582,
IIC_XADD_REG_WriteALU = 583,
IIC_XCHG_REG_WriteALU = 584,
IIC_XCHG_MEM_WriteALULd_WriteRMW = 585,
IIC_FXCH_WriteMove = 586,
IIC_XLAT_WriteLoad = 587,
MOV16rm = 588,
MOVSX32rm16_MOVSX32rm8 = 589,
MOVZX32rm16_MOVZX32rm8 = 590,
CMOVA16rr_CMOVAE16rr_CMOVB16rr_CMOVBE16rr_CMOVE16rr_CMOVG16rr_CMOVGE16rr_CMOVL16rr_CMOVLE16rr_CMOVNE16rr_CMOVNO16rr_CMOVNP16rr_CMOVNS16rr_CMOVO16rr_CMOVP16rr_CMOVS16rr = 591,
CMOVA32rr_CMOVA64rr_CMOVAE32rr_CMOVAE64rr_CMOVB32rr_CMOVB64rr_CMOVBE32rr_CMOVBE64rr_CMOVE32rr_CMOVE64rr_CMOVG32rr_CMOVG64rr_CMOVGE32rr_CMOVGE64rr_CMOVL32rr_CMOVL64rr_CMOVLE32rr_CMOVLE64rr_CMOVNE32rr_CMOVNE64rr_CMOVNO32rr_CMOVNO64rr_CMOVNP32rr_CMOVNP64rr_CMOVNS32rr_CMOVNS64rr_CMOVO32rr_CMOVO64rr_CMOVP32rr_CMOVP64rr_CMOVS32rr_CMOVS64rr = 592,
CMOVA16rm_CMOVAE16rm_CMOVB16rm_CMOVBE16rm_CMOVE16rm_CMOVG16rm_CMOVGE16rm_CMOVL16rm_CMOVLE16rm_CMOVNE16rm_CMOVNO16rm_CMOVNP16rm_CMOVNS16rm_CMOVO16rm_CMOVP16rm_CMOVS16rm = 593,
CMOVA32rm_CMOVA64rm_CMOVAE32rm_CMOVAE64rm_CMOVB32rm_CMOVB64rm_CMOVBE32rm_CMOVBE64rm_CMOVE32rm_CMOVE64rm_CMOVG32rm_CMOVG64rm_CMOVGE32rm_CMOVGE64rm_CMOVL32rm_CMOVL64rm_CMOVLE32rm_CMOVLE64rm_CMOVNE32rm_CMOVNE64rm_CMOVNO32rm_CMOVNO64rm_CMOVNP32rm_CMOVNP64rm_CMOVNS32rm_CMOVNS64rm_CMOVO32rm_CMOVO64rm_CMOVP32rm_CMOVP64rm_CMOVS32rm_CMOVS64rm = 594,
XCHG16ar_XCHG16rr_XCHG32ar_XCHG32ar64_XCHG32rr_XCHG64ar_XCHG64rr_XCHG8rr = 595,
XCHG16rm_XCHG32rm_XCHG64rm_XCHG8rm = 596,
XLAT = 597,
PUSH16rmm_PUSH32rmm = 598,
PUSHF16_PUSHF32 = 599,
PUSHA16_PUSHA32 = 600,
POP16rmm_POP32rmm = 601,
POPF16 = 602,
POPF32 = 603,
POPA16_POPA32 = 604,
LAHF_SAHF = 605,
BSWAP32r = 606,
BSWAP64r = 607,
MOVBE16rm_MOVBE64rm = 608,
MOVBE32rm = 609,
MOVBE16mr = 610,
MOVBE32mr = 611,
MOVBE64mr = 612,
ADD16mi_ADD16mi8_ADD16mr_ADD32mi_ADD32mi8_ADD32mr_ADD64mi32_ADD64mi8_ADD64mr_ADD8mi_ADD8mi8_ADD8mr_SUB16mi_SUB16mi8_SUB16mr_SUB32mi_SUB32mi8_SUB32mr_SUB64mi32_SUB64mi8_SUB64mr_SUB8mi_SUB8mi8_SUB8mr = 613,
ADC16ri_ADC16ri8_ADC16rr_ADC16rr_REV_ADC32ri_ADC32ri8_ADC32rr_ADC32rr_REV_ADC64ri32_ADC64ri8_ADC64rr_ADC64rr_REV_ADC8ri_ADC8ri8_ADC8rr_ADC8rr_REV_SBB16ri_SBB16ri8_SBB16rr_SBB16rr_REV_SBB32ri_SBB32ri8_SBB32rr_SBB32rr_REV_SBB64ri32_SBB64ri8_SBB64rr_SBB64rr_REV_SBB8ri_SBB8ri8_SBB8rr_SBB8rr_REV = 614,
ADC16rm_ADC32rm_ADC64rm_ADC8rm_SBB16rm_SBB32rm_SBB64rm_SBB8rm = 615,
ADC16mi_ADC16mi8_ADC16mr_ADC32mi_ADC32mi8_ADC32mr_ADC64mi32_ADC64mi8_ADC64mr_ADC8mi_ADC8mi8_ADC8mr_SBB16mi_SBB16mi8_SBB16mr_SBB32mi_SBB32mi8_SBB32mr_SBB64mi32_SBB64mi8_SBB64mr_SBB8mi_SBB8mi8_SBB8mr = 616,
DEC16m_DEC32m_DEC64m_DEC8m_INC16m_INC32m_INC64m_INC8m_NEG16m_NEG32m_NEG64m_NEG8m_NOT16m_NOT32m_NOT64m_NOT8m = 617,
IMUL16r_IMUL16rr = 618,
IMUL16rm = 619,
IMUL16rmi_IMUL16rmi8 = 620,
IMUL16rri_IMUL16rri8 = 621,
MUL16r = 622,
IMUL16m = 623,
MUL16m = 624,
IMUL32r_IMUL32rr = 625,
IMUL32rm = 626,
IMUL32rmi_IMUL32rmi8 = 627,
IMUL32rri_IMUL32rri8 = 628,
MUL32r = 629,
IMUL32m = 630,
MUL32m = 631,
IMUL64r_IMUL64rr = 632,
IMUL64rm = 633,
IMUL64rmi32_IMUL64rmi8 = 634,
IMUL64rri32_IMUL64rri8 = 635,
MUL64r = 636,
IMUL64m = 637,
MUL64m = 638,
MULX32rr = 639,
MULX32rm = 640,
MULX64rr = 641,
MULX64rm = 642,
DIV8r = 643,
DIV16r = 644,
DIV32r = 645,
DIV64r = 646,
IDIV8r = 647,
IDIV16r = 648,
IDIV32r = 649,
IDIV64r = 650,
AND16mi_AND16mi8_AND16mr_AND32mi_AND32mi8_AND32mr_AND64mi32_AND64mi8_AND64mr_AND8mi_AND8mi8_AND8mr_OR16mi_OR16mi8_OR16mr_OR32mi_OR32mi8_OR32mr_OR64mi32_OR64mi8_OR64mr_OR8mi_OR8mi8_OR8mr_XOR16mi_XOR16mi8_XOR16mr_XOR32mi_XOR32mi8_XOR32mr_XOR64mi32_XOR64mi8_XOR64mr_XOR8mi_XOR8mi8_XOR8mr = 651,
OR32mrLocked = 652,
SAR16m1_SAR16mi_SAR32m1_SAR32mi_SAR64m1_SAR64mi_SAR8m1_SAR8mi_SHL16m1_SHL16mi_SHL32m1_SHL32mi_SHL64m1_SHL64mi_SHL8m1_SHL8mi_SHR16m1_SHR16mi_SHR32m1_SHR32mi_SHR64m1_SHR64mi_SHR8m1_SHR8mi = 653,
SAR16rCL_SAR32rCL_SAR64rCL_SAR8rCL_SHL16rCL_SHL32rCL_SHL64rCL_SHL8rCL_SHR16rCL_SHR32rCL_SHR64rCL_SHR8rCL = 654,
SAR16mCL_SAR32mCL_SAR64mCL_SAR8mCL_SHL16mCL_SHL32mCL_SHL64mCL_SHL8mCL_SHR16mCL_SHR32mCL_SHR64mCL_SHR8mCL = 655,
ROL16r1_ROL32r1_ROL64r1_ROL8r1_ROR16r1_ROR32r1_ROR64r1_ROR8r1 = 656,
ROL16mi_ROL32mi_ROL64mi_ROL8mi_ROR16mi_ROR32mi_ROR64mi_ROR8mi = 657,
ROL16rCL_ROL32rCL_ROL64rCL_ROL8rCL_ROR16rCL_ROR32rCL_ROR64rCL_ROR8rCL = 658,
ROL16mCL_ROL32mCL_ROL64mCL_ROL8mCL_ROR16mCL_ROR32mCL_ROR64mCL_ROR8mCL = 659,
RCL16r1_RCL32r1_RCL64r1_RCL8r1_RCR16r1_RCR32r1_RCR64r1_RCR8r1 = 660,
RCL16m1_RCL32m1_RCL64m1_RCL8m1_RCR16m1_RCR32m1_RCR64m1_RCR8m1 = 661,
RCL16rCL_RCL16ri_RCL32rCL_RCL32ri_RCL64rCL_RCL64ri_RCL8rCL_RCL8ri_RCR16rCL_RCR16ri_RCR32rCL_RCR32ri_RCR64rCL_RCR64ri_RCR8rCL_RCR8ri = 662,
RCL16mCL_RCL16mi_RCL32mCL_RCL32mi_RCL64mCL_RCL64mi_RCL8mCL_RCL8mi_RCR16mCL_RCR16mi_RCR32mCL_RCR32mi_RCR64mCL_RCR64mi_RCR8mCL_RCR8mi = 663,
SHLD16rri8_SHRD16rri8 = 664,
SHLD32rri8_SHRD32rri8 = 665,
SHLD64rri8_SHRD64rri8 = 666,
SHLD16mri8_SHRD16mri8 = 667,
SHLD32mri8_SHRD32mri8 = 668,
SHLD64mri8_SHRD64mri8 = 669,
SHLD16rrCL = 670,
SHLD32rrCL = 671,
SHLD64rrCL = 672,
SHRD16rrCL = 673,
SHRD32rrCL = 674,
SHRD64rrCL = 675,
SHLD16mrCL_SHRD16mrCL = 676,
SHLD32mrCL_SHRD32mrCL = 677,
SHLD64mrCL_SHRD64mrCL = 678,
BT16ri8_BT32ri8_BT64ri8 = 679,
BT16rr_BT32rr_BT64rr = 680,
BT16mr_BT32mr_BT64mr = 681,
BT16mi8_BT32mi8_BT64mi8 = 682,
BTC16ri8_BTC32ri8_BTC64ri8_BTR16ri8_BTR32ri8_BTR64ri8_BTS16ri8_BTS32ri8_BTS64ri8 = 683,
BTC16rr_BTC32rr_BTC64rr_BTR16rr_BTR32rr_BTS16rr_BTS32rr_BTS64rr = 684,
BTR64rr = 685,
BTC16mr_BTC32mr_BTC64mr_BTR16mr_BTR32mr_BTR64mr_BTS16mr_BTS32mr_BTS64mr = 686,
BTC16mi8_BTC32mi8_BTC64mi8_BTR16mi8_BTR32mi8_BTR64mi8_BTS16mi8_BTS32mi8_BTS64mi8 = 687,
BSF16rr_BSF32rr_BSF64rr_BSR16rr_BSR32rr_BSR64rr = 688,
BSF16rm_BSF32rm_BSF64rm_BSR16rm_BSR32rm_BSR64rm = 689,
SETAEr_SETAr_SETBEr_SETBr_SETEr_SETGEr_SETGr_SETLEr_SETLr_SETNEr_SETNOr_SETNPr_SETNSr_SETOr_SETPr_SETSr = 690,
SETAEm_SETAm_SETBEm_SETBm_SETEm_SETGEm_SETGm_SETLEm_SETLm_SETNEm_SETNOm_SETNPm_SETNSm_SETOm_SETPm_SETSm = 691,
CLD = 692,
STD = 693,
TZCNT16rr_TZCNT32rr_TZCNT64rr = 694,
TZCNT16rm_TZCNT32rm_TZCNT64rm = 695,
ANDN32rr_ANDN64rr = 696,
ANDN32rm_ANDN64rm = 697,
BLSI32rr_BLSI64rr_BLSMSK32rr_BLSMSK64rr_BLSR32rr_BLSR64rr = 698,
BLSI32rm_BLSI64rm_BLSMSK32rm_BLSMSK64rm_BLSR32rm_BLSR64rm = 699,
BEXTR32rr_BEXTR64rr = 700,
BEXTR32rm_BEXTR64rm = 701,
BZHI32rr_BZHI64rr = 702,
BZHI32rm_BZHI64rm = 703,
PDEP32rr_PDEP64rr_PEXT32rr_PEXT64rr = 704,
PDEP32rm_PDEP64rm_PEXT32rm_PEXT64rm = 705,
JCXZ_JRCXZ = 706,
LOOP = 707,
LOOPE = 708,
LOOPNE = 709,
CALL16r_CALL32r = 710,
CALL16m_CALL32m = 711,
LRETL_LRETQ_LRETW_RETL_RETQ_RETW = 712,
LRETIL_LRETIQ_LRETIW = 713,
RETIL_RETIQ_RETIW = 714,
BOUNDS16rm_BOUNDS32rm = 715,
INTO = 716,
LODSB_LODSW = 717,
LODSL_LODSQ = 718,
STOSB_STOSL_STOSQ_STOSW = 719,
MOVSB_MOVSL_MOVSQ_MOVSW = 720,
MOVSLDUPrm = 721,
MOVSLDUPrr = 722,
SCASB_SCASL_SCASQ_SCASW = 723,
CMPSB_CMPSL_CMPSQ_CMPSW = 724,
XADD16rm_XADD32rm_XADD64rm_XADD8rm = 725,
CMPXCHG16rm_CMPXCHG32rm_CMPXCHG64rm = 726,
CMPXCHG8rm = 727,
CMPXCHG8B = 728,
CMPXCHG16B = 729,
PAUSE = 730,
LEAVE_LEAVE64 = 731,
XGETBV = 732,
RDTSC = 733,
RDTSCP = 734,
RDPMC = 735,
RDRAND16r_RDRAND32r_RDRAND64r = 736,
LD_Frr = 737,
LD_F80m = 738,
FBLDm = 739,
ST_FPrr_ST_Frr = 740,
ST_FP80m = 741,
FBSTPm = 742,
XCH_F = 743,
ILD_F16m_ILD_F32m_ILD_F64m = 744,
IST_F16m_IST_F32m_IST_FP16m_IST_FP32m = 745,
LD_F0 = 746,
LD_F1 = 747,
FLDPI = 748,
CMOVBE_F_CMOVBE_Fp32_CMOVBE_Fp64_CMOVBE_Fp80_CMOVB_F_CMOVB_Fp32_CMOVB_Fp64_CMOVB_Fp80_CMOVNBE_F_CMOVNBE_Fp32_CMOVNBE_Fp64_CMOVNBE_Fp80_CMOVNB_F_CMOVNB_Fp32_CMOVNB_Fp64_CMOVNB_Fp80_CMOVNE_F_CMOVNE_Fp32_CMOVNE_Fp64_CMOVNE_Fp80_CMOVNP_F_CMOVNP_Fp32_CMOVNP_Fp64_CMOVNP_Fp80_CMOVP_F_CMOVP_Fp32_CMOVP_Fp64_CMOVP_Fp80 = 749,
FNSTSW16r = 750,
FNSTSWm = 751,
FLDCW16m = 752,
FNSTCW16m = 753,
FDECSTP_FINCSTP = 754,
FFREE = 755,
FSAVEm = 756,
FRSTORm = 757,
ABS_F_ABS_Fp32_ABS_Fp64_ABS_Fp80 = 758,
CHS_F_CHS_Fp32_CHS_Fp64_CHS_Fp80 = 759,
COMP_FST0r_COM_FST0r = 760,
UCOM_FPr_UCOM_Fr = 761,
FCOM32m_FCOM64m_FCOMP32m_FCOMP64m = 762,
FCOMPP = 763,
UCOM_FPPr = 764,
COM_FIPr_COM_FIr = 765,
UCOM_FIPr_UCOM_FIr = 766,
FICOM16m_FICOM32m_FICOMP16m_FICOMP32m = 767,
TST_F_TST_Fp32_TST_Fp64_TST_Fp80 = 768,
FXAM = 769,
FPREM = 770,
FPREM1 = 771,
FRNDINT = 772,
FSCALE = 773,
FXTRACT = 774,
FNOP = 775,
WAIT = 776,
FNCLEX = 777,
FNINIT = 778,
MMX_MOVD64from64rr_MMX_MOVD64grr = 779,
MOVPDI2DIrr_VMOVPDI2DIrr = 780,
MMX_MOVD64rr_MMX_MOVD64to64rr = 781,
MOVDI2PDIrr_VMOVDI2PDIrr = 782,
VMOVPQIto64rr = 783,
VMOV64toPQIrr = 784,
MMX_MOVQ64rr_MMX_MOVQ64rr_REV = 785,
MOVDQArr_MOVDQArr_REV_VMOVDQAYrr_VMOVDQAYrr_REV_VMOVDQArr_VMOVDQArr_REV = 786,
MOVDQUrr_MOVDQUrr_REV_VMOVDQUYrr_VMOVDQUYrr_REV_VMOVDQUrr_VMOVDQUrr_REV = 787,
MMX_MOVDQ2Qrr = 788,
MMX_MOVQ2DQrr = 789,
MMX_PACKSSDWirr_MMX_PACKSSWBirr_MMX_PACKUSWBirr = 790,
MMX_PACKSSDWirm_MMX_PACKSSWBirm_MMX_PACKUSWBirm = 791,
VPMOVSXBQYrr_VPMOVSXBWYrr_VPMOVSXDQYrr_VPMOVZXBQYrr_VPMOVZXBWYrr_VPMOVZXDQYrr = 792,
PBLENDWrri = 793,
VPBLENDWYrri_VPBLENDWrri = 794,
PBLENDWrmi = 795,
VPBLENDWYrmi_VPBLENDWrmi = 796,
VPBLENDDYrri_VPBLENDDrri = 797,
VPBLENDDYrmi_VPBLENDDrmi = 798,
MMX_MASKMOVQ_MMX_MASKMOVQ64 = 799,
MASKMOVDQU_MASKMOVDQU64_VMASKMOVDQU_VMASKMOVDQU64 = 800,
VPMASKMOVDYrm_VPMASKMOVDrm_VPMASKMOVQYrm_VPMASKMOVQrm = 801,
VPMASKMOVDYmr_VPMASKMOVDmr_VPMASKMOVQYmr_VPMASKMOVQmr = 802,
MMX_PMOVMSKBrr = 803,
PMOVMSKBrr_VPMOVMSKBrr = 804,
VPMOVMSKBYrr = 805,
MMX_PEXTRWirri = 806,
PEXTRBrr_PEXTRDrr_PEXTRQrr_PEXTRWrr_REV = 807,
PEXTRBmr_PEXTRDmr_PEXTRQmr_PEXTRWmr = 808,
VPBROADCASTBrm_VPBROADCASTWrm = 809,
VPBROADCASTBYrm_VPBROADCASTWYrm = 810,
VPGATHERDDrm = 811,
VPGATHERDDYrm = 812,
VPGATHERQDrm = 813,
VPGATHERQDYrm = 814,
VPGATHERDQrm = 815,
VPGATHERDQYrm = 816,
VPGATHERQQrm = 817,
VPGATHERQQYrm = 818,
MMX_PHADDSWrr64_MMX_PHADDWrr64_MMX_PHSUBSWrr64_MMX_PHSUBWrr64 = 819,
MMX_PHADDrr64_MMX_PHSUBDrr64 = 820,
PHADDDrr_PHSUBDrr_VPHADDDrr_VPHSUBDrr = 821,
PHADDSWrr128_PHSUBSWrr128_VPHADDSWrr128_VPHADDSWrr256_VPHSUBSWrr128_VPHSUBSWrr256 = 822,
PHADDWrr_PHSUBWrr_VPHADDDYrr_VPHADDWYrr_VPHADDWrr_VPHSUBDYrr_VPHSUBWYrr_VPHSUBWrr = 823,
MMX_PHADDSWrm64_MMX_PHADDWrm64_MMX_PHSUBSWrm64_MMX_PHSUBWrm64 = 824,
MMX_PHADDrm64_MMX_PHSUBDrm64 = 825,
PHADDDrm_PHSUBDrm_VPHADDDrm_VPHSUBDrm = 826,
PHADDSWrm128_PHSUBSWrm128_VPHADDSWrm128_VPHADDSWrm256_VPHSUBSWrm128_VPHSUBSWrm256 = 827,
PHADDWrm_PHSUBWrm_VPHADDDYrm_VPHADDWYrm_VPHADDWrm_VPHSUBDYrm_VPHSUBWYrm_VPHSUBWrm = 828,
PCMPGTQrr_VPCMPGTQYrr_VPCMPGTQrr = 829,
PCMPGTQrm_VPCMPGTQYrm_VPCMPGTQrm = 830,
PMULLDrr_VPMULLDYrr_VPMULLDrr = 831,
PMULLDrm_VPMULLDYrm_VPMULLDrm = 832,
PTESTrr_VPTESTYrr_VPTESTrr = 833,
PTESTrm_VPTESTYrm_VPTESTrm = 834,
PSLLDrr_PSLLQrr_PSLLWrr_PSRADrr_PSRAWrr_PSRLDrr_PSRLQrr_PSRLWrr_VPSLLDYrr_VPSLLDrr_VPSLLQYrr_VPSLLQrr_VPSLLWYrr_VPSLLWrr_VPSRADYrr_VPSRADrr_VPSRAWYrr_VPSRAWrr_VPSRLDYrr_VPSRLDrr_VPSRLQYrr_VPSRLQrr_VPSRLWYrr_VPSRLWrr = 835,
PSLLDQri_PSRLDQri = 836,
VPSLLDQYri_VPSLLDQri_VPSRLDQYri_VPSRLDQri = 837,
MMX_EMMS = 838,
MOVMSKPDrr_MOVMSKPSrr_VMOVMSKPDrr_VMOVMSKPSrr = 839,
VMOVMSKPDYrr_VMOVMSKPSYrr = 840,
VPERM2F128rr = 841,
VPERM2F128rm = 842,
BLENDVPDrr0_BLENDVPSrr0 = 843,
BLENDVPDrm0_BLENDVPSrm0 = 844,
VBROADCASTF128 = 845,
EXTRACTPSrr = 846,
VEXTRACTPSrr = 847,
EXTRACTPSmr = 848,
VEXTRACTPSmr = 849,
VEXTRACTF128rr = 850,
VEXTRACTF128mr = 851,
VINSERTF128rr = 852,
VINSERTF128rm = 853,
VMASKMOVPDYrm_VMASKMOVPDrm_VMASKMOVPSYrm_VMASKMOVPSrm = 854,
VMASKMOVPDmr_VMASKMOVPSmr = 855,
VMASKMOVPDYmr_VMASKMOVPSYmr = 856,
VGATHERDPSrm = 857,
VGATHERDPSYrm = 858,
VGATHERQPSrm = 859,
VGATHERQPSYrm = 860,
VGATHERDPDrm = 861,
VGATHERDPDYrm = 862,
VGATHERQPDrm = 863,
VGATHERQPDYrm = 864,
CVTPD2PSrr_VCVTPD2PSrr = 865,
CVTPD2PSrm_VCVTPD2PSXrm = 866,
VCVTPD2PSYrr = 867,
VCVTPD2PSYrm = 868,
CVTSD2SSrr_Int_CVTSD2SSrr_Int_VCVTSD2SSrr_VCVTSD2SSrr = 869,
CVTSD2SSrm = 870,
Int_CVTSD2SSrm_Int_VCVTSD2SSrm_VCVTSD2SSrm = 871,
CVTPS2PDrr_VCVTPS2PDrr = 872,
CVTPS2PDrm_VCVTPS2PDYrm_VCVTPS2PDrm = 873,
VCVTPS2PDYrr = 874,
CVTSS2SDrr_Int_CVTSS2SDrr_Int_VCVTSS2SDrr_VCVTSS2SDrr = 875,
CVTSS2SDrm = 876,
Int_CVTSS2SDrm_Int_VCVTSS2SDrm_VCVTSS2SDrm = 877,
CVTDQ2PDrr = 878,
VCVTDQ2PDrr = 879,
VCVTDQ2PDYrr = 880,
CVTPD2DQrr_CVTTPD2DQrr_VCVTTPD2DQrr = 881,
VCVTPD2DQrr = 882,
CVTPD2DQrm_CVTTPD2DQrm = 883,
VCVTPD2DQYrr = 884,
VCVTTPD2DQYrr = 885,
VCVTPD2DQYrm = 886,
VCVTTPD2DQYrm = 887,
MMX_CVTPS2PIirr_MMX_CVTTPS2PIirr = 888,
MMX_CVTPI2PDirr = 889,
MMX_CVTPD2PIirr_MMX_CVTTPD2PIirr = 890,
CVTSI2SS64rr_CVTSI2SSrr_Int_CVTSI2SS64rr_Int_CVTSI2SSrr_Int_VCVTSI2SS64rr_Int_VCVTSI2SSrr = 891,
VCVTSI2SS64rr_VCVTSI2SSrr = 892,
CVTSS2SI64rr_CVTTSS2SI64rr_Int_CVTTSS2SI64rr_Int_VCVTTSS2SI64rr_VCVTSS2SI64rr_VCVTTSS2SI64rr = 893,
CVTSS2SIrr_CVTTSS2SIrr_Int_CVTTSS2SIrr_Int_VCVTTSS2SIrr_VCVTSS2SIrr_VCVTTSS2SIrr = 894,
CVTSS2SI64rm_CVTTSS2SI64rm_Int_CVTTSS2SI64rm_Int_VCVTTSS2SI64rm_VCVTSS2SI64rm_VCVTTSS2SI64rm = 895,
CVTSS2SIrm_CVTTSS2SIrm_Int_CVTTSS2SIrm_Int_VCVTTSS2SIrm_VCVTSS2SIrm_VCVTTSS2SIrm = 896,
CVTSD2SI64rr_CVTSD2SIrr_CVTTSD2SI64rr_CVTTSD2SIrr_Int_CVTTSD2SI64rr_Int_CVTTSD2SIrr_Int_VCVTTSD2SI64rr_Int_VCVTTSD2SIrr_VCVTSD2SI64rr_VCVTSD2SIrr_VCVTTSD2SI64rr_VCVTTSD2SIrr = 897,
CVTSD2SI64rm_CVTSD2SIrm_CVTTSD2SI64rm_CVTTSD2SIrm_Int_CVTTSD2SI64rm_Int_CVTTSD2SIrm_Int_VCVTTSD2SI64rm_Int_VCVTTSD2SIrm_VCVTSD2SI64rm_VCVTSD2SIrm_VCVTTSD2SI64rm_VCVTTSD2SIrm = 898,
VCVTPS2PHYrr_VCVTPS2PHrr = 899,
VCVTPS2PHYmr_VCVTPS2PHmr = 900,
VCVTPH2PSYrr_VCVTPH2PSrr = 901,
HADDPDrr_HADDPSrr_HSUBPDrr_HSUBPSrr_VHADDPDYrr_VHADDPDrr_VHADDPSYrr_VHADDPSrr_VHSUBPDYrr_VHSUBPDrr_VHSUBPSYrr_VHSUBPSrr = 902,
HADDPDrm_HADDPSrm_HSUBPDrm_HSUBPSrm_VHADDPDYrm_VHADDPDrm_VHADDPSYrm_VHADDPSrm_VHSUBPDYrm_VHSUBPDrm_VHSUBPSYrm_VHSUBPSrm = 903,
MULPDrr_VMULPDrr = 904,
MULPSrr_VMULPSrr = 905,
MULSDrr_MULSDrr_Int_VMULSDrr_VMULSDrr_Int = 906,
MULSSrr_MULSSrr_Int_VMULSSrr_VMULSSrr_Int = 907,
MULPDrm_MULPSrm_VMULPDrm_VMULPSrm = 908,
MULSDrm_MULSDrm_Int_MULSSrm_MULSSrm_Int_VMULSDrm_VMULSDrm_Int_VMULSSrm_VMULSSrm_Int = 909,
VDIVPSYrr = 910,
VDIVPSYrm = 911,
VDIVPDYrr = 912,
VDIVPDYrm = 913,
VRCPPSYr = 914,
VRCPPSYm = 915,
ROUNDPDr_ROUNDPSr_VROUNDPDr_VROUNDPSr_VROUNDYPDr_VROUNDYPSr = 916,
ROUNDSDr_ROUNDSDr_Int_ROUNDSSr_ROUNDSSr_Int_VROUNDSDr_VROUNDSDr_Int_VROUNDSSr_VROUNDSSr_Int = 917,
ROUNDPDm_VROUNDPDm_VROUNDYPDm = 918,
ROUNDPSm_VROUNDPSm_VROUNDYPSm = 919,
ROUNDSDm_ROUNDSSm_VROUNDSDm_VROUNDSSm = 920,
DPPSrri_VDPPSYrri_VDPPSrri = 921,
DPPSrmi_VDPPSYrmi_VDPPSrmi = 922,
DPPDrri = 923,
VDPPDrri = 924,
DPPDrmi_VDPPDrmi = 925,
VFMADDPD4rr_VFMADDPD4rrY_VFMADDPD4rrY_REV_VFMADDPD4rr_REV_VFMADDPDr132r_VFMADDPDr132rY_VFMADDPDr213r_VFMADDPDr213rY_VFMADDPDr231r_VFMADDPDr231rY_VFMADDPS4rr_VFMADDPS4rrY_VFMADDPS4rrY_REV_VFMADDPS4rr_REV_VFMADDPSr132r_VFMADDPSr132rY_VFMADDPSr213r_VFMADDPSr213rY_VFMADDPSr231r_VFMADDPSr231rY_VFMADDSD4rr_VFMADDSD4rr_Int_VFMADDSD4rr_REV_VFMADDSDr132r_VFMADDSDr132r_Int_VFMADDSDr213r_VFMADDSDr213r_Int_VFMADDSDr231r_VFMADDSDr231r_Int_VFMADDSS4rr_VFMADDSS4rr_Int_VFMADDSS4rr_REV_VFMADDSSr132r_VFMADDSSr132r_Int_VFMADDSSr213r_VFMADDSSr213r_Int_VFMADDSSr231r_VFMADDSSr231r_Int_VFMADDSUBPDr132r_VFMADDSUBPDr132rY_VFMADDSUBPDr213r_VFMADDSUBPDr213rY_VFMADDSUBPDr231r_VFMADDSUBPDr231rY_VFMADDSUBPSr132r_VFMADDSUBPSr132rY_VFMADDSUBPSr213r_VFMADDSUBPSr213rY_VFMADDSUBPSr231r_VFMADDSUBPSr231rY_VFMSUBADDPDr132r_VFMSUBADDPDr132rY_VFMSUBADDPDr213r_VFMSUBADDPDr213rY_VFMSUBADDPDr231r_VFMSUBADDPDr231rY_VFMSUBADDPSr132r_VFMSUBADDPSr132rY_VFMSUBADDPSr213r_VFMSUBADDPSr213rY_VFMSUBADDPSr231r_VFMSUBADDPSr231rY_VFMSUBPD4rr_VFMSUBPD4rrY_VFMSUBPD4rrY_REV_VFMSUBPD4rr_REV_VFMSUBPDr132r_VFMSUBPDr132rY_VFMSUBPDr213r_VFMSUBPDr213rY_VFMSUBPDr231r_VFMSUBPDr231rY_VFMSUBPS4rr_VFMSUBPS4rrY_VFMSUBPS4rrY_REV_VFMSUBPS4rr_REV_VFMSUBPSr132r_VFMSUBPSr132rY_VFMSUBPSr213r_VFMSUBPSr213rY_VFMSUBPSr231r_VFMSUBPSr231rY_VFMSUBSD4rr_VFMSUBSD4rr_Int_VFMSUBSD4rr_REV_VFMSUBSDr132r_VFMSUBSDr132r_Int_VFMSUBSDr213r_VFMSUBSDr213r_Int_VFMSUBSDr231r_VFMSUBSDr231r_Int_VFMSUBSS4rr_VFMSUBSS4rr_Int_VFMSUBSS4rr_REV_VFMSUBSSr132r_VFMSUBSSr132r_Int_VFMSUBSSr213r_VFMSUBSSr213r_Int_VFMSUBSSr231r_VFMSUBSSr231r_Int_VFNMADDPD4rr_VFNMADDPD4rrY_VFNMADDPD4rrY_REV_VFNMADDPD4rr_REV_VFNMADDPDr132r_VFNMADDPDr132rY_VFNMADDPDr213r_VFNMADDPDr213rY_VFNMADDPDr231r_VFNMADDPDr231rY_VFNMADDPS4rr_VFNMADDPS4rrY_VFNMADDPS4rrY_REV_VFNMADDPS4rr_REV_VFNMADDPSr132r_VFNMADDPSr132rY_VFNMADDPSr213r_VFNMADDPSr213rY_VFNMADDPSr231r_VFNMADDPSr231rY_VFNMADDSD4rr_VFNMADDSD4rr_Int_VFNMADDSD4rr_REV_VFNMADDSDr132r_VFNMADDSDr132r_Int_VFNMADDSDr213r_VFNMADDSDr213r_Int_VFNMADDSDr231r_VFNMADDSDr231r_Int_VFNMADDSS4rr_VFNMADDSS4rr_Int_VFNMADDSS4rr_REV_VFNMADDSSr132r_VFNMADDSSr132r_Int_VFNMADDSSr213r_VFNMADDSSr213r_Int_VFNMADDSSr231r_VFNMADDSSr231r_Int_VFNMSUBPD4rr_VFNMSUBPD4rrY_VFNMSUBPD4rrY_REV_VFNMSUBPD4rr_REV_VFNMSUBPDr132r_VFNMSUBPDr132rY_VFNMSUBPDr213r_VFNMSUBPDr213rY_VFNMSUBPDr231r_VFNMSUBPDr231rY_VFNMSUBPS4rr_VFNMSUBPS4rrY_VFNMSUBPS4rrY_REV_VFNMSUBPS4rr_REV_VFNMSUBPSr132r_VFNMSUBPSr132rY_VFNMSUBPSr213r_VFNMSUBPSr213rY_VFNMSUBPSr231r_VFNMSUBPSr231rY_VFNMSUBSD4rr_VFNMSUBSD4rr_Int_VFNMSUBSD4rr_REV_VFNMSUBSDr132r_VFNMSUBSDr132r_Int_VFNMSUBSDr213r_VFNMSUBSDr213r_Int_VFNMSUBSDr231r_VFNMSUBSDr231r_Int_VFNMSUBSS4rr_VFNMSUBSS4rr_Int_VFNMSUBSS4rr_REV_VFNMSUBSSr132r_VFNMSUBSSr132r_Int_VFNMSUBSSr213r_VFNMSUBSSr213r_Int_VFNMSUBSSr231r_VFNMSUBSSr231r_Int = 926,
VFMADDPD4mr_VFMADDPD4mrY_VFMADDPD4rm_VFMADDPD4rmY_VFMADDPDr132m_VFMADDPDr132mY_VFMADDPDr213m_VFMADDPDr213mY_VFMADDPDr231m_VFMADDPDr231mY_VFMADDPS4mr_VFMADDPS4mrY_VFMADDPS4rm_VFMADDPS4rmY_VFMADDPSr132m_VFMADDPSr132mY_VFMADDPSr213m_VFMADDPSr213mY_VFMADDPSr231m_VFMADDPSr231mY_VFMADDSD4mr_VFMADDSD4mr_Int_VFMADDSD4rm_VFMADDSD4rm_Int_VFMADDSDr132m_VFMADDSDr132m_Int_VFMADDSDr213m_VFMADDSDr213m_Int_VFMADDSDr231m_VFMADDSDr231m_Int_VFMADDSS4mr_VFMADDSS4mr_Int_VFMADDSS4rm_VFMADDSS4rm_Int_VFMADDSSr132m_VFMADDSSr132m_Int_VFMADDSSr213m_VFMADDSSr213m_Int_VFMADDSSr231m_VFMADDSSr231m_Int_VFMADDSUBPDr132m_VFMADDSUBPDr132mY_VFMADDSUBPDr213m_VFMADDSUBPDr213mY_VFMADDSUBPDr231m_VFMADDSUBPDr231mY_VFMADDSUBPSr132m_VFMADDSUBPSr132mY_VFMADDSUBPSr213m_VFMADDSUBPSr213mY_VFMADDSUBPSr231m_VFMADDSUBPSr231mY_VFMSUBADDPDr132m_VFMSUBADDPDr132mY_VFMSUBADDPDr213m_VFMSUBADDPDr213mY_VFMSUBADDPDr231m_VFMSUBADDPDr231mY_VFMSUBADDPSr132m_VFMSUBADDPSr132mY_VFMSUBADDPSr213m_VFMSUBADDPSr213mY_VFMSUBADDPSr231m_VFMSUBADDPSr231mY_VFMSUBPD4mr_VFMSUBPD4mrY_VFMSUBPD4rm_VFMSUBPD4rmY_VFMSUBPDr132m_VFMSUBPDr132mY_VFMSUBPDr213m_VFMSUBPDr213mY_VFMSUBPDr231m_VFMSUBPDr231mY_VFMSUBPS4mr_VFMSUBPS4mrY_VFMSUBPS4rm_VFMSUBPS4rmY_VFMSUBPSr132m_VFMSUBPSr132mY_VFMSUBPSr213m_VFMSUBPSr213mY_VFMSUBPSr231m_VFMSUBPSr231mY_VFMSUBSD4mr_VFMSUBSD4mr_Int_VFMSUBSD4rm_VFMSUBSD4rm_Int_VFMSUBSDr132m_VFMSUBSDr132m_Int_VFMSUBSDr213m_VFMSUBSDr213m_Int_VFMSUBSDr231m_VFMSUBSDr231m_Int_VFMSUBSS4mr_VFMSUBSS4mr_Int_VFMSUBSS4rm_VFMSUBSS4rm_Int_VFMSUBSSr132m_VFMSUBSSr132m_Int_VFMSUBSSr213m_VFMSUBSSr213m_Int_VFMSUBSSr231m_VFMSUBSSr231m_Int_VFNMADDPD4mr_VFNMADDPD4mrY_VFNMADDPD4rm_VFNMADDPD4rmY_VFNMADDPDr132m_VFNMADDPDr132mY_VFNMADDPDr213m_VFNMADDPDr213mY_VFNMADDPDr231m_VFNMADDPDr231mY_VFNMADDPS4mr_VFNMADDPS4mrY_VFNMADDPS4rm_VFNMADDPS4rmY_VFNMADDPSr132m_VFNMADDPSr132mY_VFNMADDPSr213m_VFNMADDPSr213mY_VFNMADDPSr231m_VFNMADDPSr231mY_VFNMADDSD4mr_VFNMADDSD4mr_Int_VFNMADDSD4rm_VFNMADDSD4rm_Int_VFNMADDSDr132m_VFNMADDSDr132m_Int_VFNMADDSDr213m_VFNMADDSDr213m_Int_VFNMADDSDr231m_VFNMADDSDr231m_Int_VFNMADDSS4mr_VFNMADDSS4mr_Int_VFNMADDSS4rm_VFNMADDSS4rm_Int_VFNMADDSSr132m_VFNMADDSSr132m_Int_VFNMADDSSr213m_VFNMADDSSr213m_Int_VFNMADDSSr231m_VFNMADDSSr231m_Int_VFNMSUBPD4mr_VFNMSUBPD4mrY_VFNMSUBPD4rm_VFNMSUBPD4rmY_VFNMSUBPDr132m_VFNMSUBPDr132mY_VFNMSUBPDr213m_VFNMSUBPDr213mY_VFNMSUBPDr231m_VFNMSUBPDr231mY_VFNMSUBPS4mr_VFNMSUBPS4mrY_VFNMSUBPS4rm_VFNMSUBPS4rmY_VFNMSUBPSr132m_VFNMSUBPSr132mY_VFNMSUBPSr213m_VFNMSUBPSr213mY_VFNMSUBPSr231m_VFNMSUBPSr231mY_VFNMSUBSD4mr_VFNMSUBSD4mr_Int_VFNMSUBSD4rm_VFNMSUBSD4rm_Int_VFNMSUBSDr132m_VFNMSUBSDr132m_Int_VFNMSUBSDr213m_VFNMSUBSDr213m_Int_VFNMSUBSDr231m_VFNMSUBSDr231m_Int_VFNMSUBSS4mr_VFNMSUBSS4mr_Int_VFNMSUBSS4rm_VFNMSUBSS4rm_Int_VFNMSUBSSr132m_VFNMSUBSSr132m_Int_VFNMSUBSSr213m_VFNMSUBSSr213m_Int_VFNMSUBSSr231m_VFNMSUBSSr231m_Int = 927,
VSQRTPSYr = 928,
VSQRTPSYm = 929,
VSQRTPDYr = 930,
VSQRTPDYm = 931,
RSQRTPSr_VRSQRTPSr = 932,
RSQRTSSr_VRSQRTSSr = 933,
RSQRTSSr_Int = 934,
VRSQRTSSr_Int = 935,
RSQRTPSm_VRSQRTPSm = 936,
RSQRTSSm_VRSQRTSSm = 937,
RSQRTSSm_Int_VRSQRTSSm_Int = 938,
VRSQRTPSYr = 939,
VRSQRTPSYm = 940,
ANDNPDrr_ANDNPSrr_ANDPDrr_ANDPSrr_ORPDrr_ORPSrr_VANDNPDYrr_VANDNPDrr_VANDNPSYrr_VANDNPSrr_VANDPDYrr_VANDPDrr_VANDPSYrr_VANDPSrr_VORPDYrr_VORPDrr_VORPSYrr_VORPSrr_VXORPDYrr_VXORPDrr_VXORPSYrr_VXORPSrr_XORPDrr_XORPSrr = 941,
ANDNPDrm_ANDNPSrm_ANDPDrm_ANDPSrm_ORPDrm_ORPSrm_VANDNPDYrm_VANDNPDrm_VANDNPSYrm_VANDNPSrm_VANDPDYrm_VANDPDrm_VANDPSYrm_VANDPSrm_VORPDYrm_VORPDrm_VORPSYrm_VORPSrm_VXORPDYrm_VXORPDrm_VXORPSYrm_VXORPSrm_XORPDrm_XORPSrm = 942,
VZEROUPPER = 943,
VZEROALL = 944,
LDMXCSR_VLDMXCSR = 945,
STMXCSR_VSTMXCSR = 946,
SCHED_LIST_END = 947
};
} // end Sched namespace
} // end X86 namespace
} // end llvm namespace
#endif // GET_INSTRINFO_ENUM
/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|* *|
|* Target Instruction Descriptors *|
|* *|
|* Automatically generated file, do not edit! *|
|* *|
\*===----------------------------------------------------------------------===*/
#ifdef GET_INSTRINFO_MC_DESC
#undef GET_INSTRINFO_MC_DESC
namespace llvm_ks {
static const MCPhysReg ImplicitList1[] = { X86::AL, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList2[] = { X86::AX, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList3[] = { X86::AX, 0 };
static const MCPhysReg ImplicitList4[] = { X86::AL, 0 };
static const MCPhysReg ImplicitList5[] = { X86::FPSW, 0 };
static const MCPhysReg ImplicitList6[] = { X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList7[] = { X86::EAX, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList8[] = { X86::RAX, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList9[] = { X86::EAX, 0 };
static const MCPhysReg ImplicitList10[] = { X86::RAX, 0 };
static const MCPhysReg ImplicitList11[] = { X86::ESP, 0 };
static const MCPhysReg ImplicitList12[] = { X86::ESP, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList13[] = { X86::RSP, 0 };
static const MCPhysReg ImplicitList14[] = { X86::RSP, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList15[] = { X86::XMM0, 0 };
static const MCPhysReg ImplicitList16[] = { X86::EAX, X86::EDX, 0 };
static const MCPhysReg ImplicitList17[] = { X86::EDI, X86::ESI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList18[] = { X86::RAX, X86::RBX, X86::RCX, X86::RDX, 0 };
static const MCPhysReg ImplicitList19[] = { X86::RAX, X86::RDX, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList20[] = { X86::EAX, X86::EBX, X86::ECX, X86::EDX, 0 };
static const MCPhysReg ImplicitList21[] = { X86::EAX, X86::EDX, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList22[] = { X86::EFLAGS, X86::FPSW, 0 };
static const MCPhysReg ImplicitList23[] = { X86::EAX, X86::ECX, 0 };
static const MCPhysReg ImplicitList24[] = { X86::RAX, X86::RDX, 0 };
static const MCPhysReg ImplicitList25[] = { X86::AX, X86::DX, 0 };
static const MCPhysReg ImplicitList26[] = { X86::AX, X86::DX, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList27[] = { X86::AL, X86::AH, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList28[] = { X86::RAX, X86::RBX, X86::RCX, 0 };
static const MCPhysReg ImplicitList29[] = { X86::AL, X86::EFLAGS, X86::AX, 0 };
static const MCPhysReg ImplicitList30[] = { X86::DX, 0 };
static const MCPhysReg ImplicitList31[] = { X86::DX, X86::EDI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList32[] = { X86::EDI, 0 };
static const MCPhysReg ImplicitList33[] = { X86::RAX, X86::ECX, 0 };
static const MCPhysReg ImplicitList34[] = { X86::CX, 0 };
static const MCPhysReg ImplicitList35[] = { X86::ECX, 0 };
static const MCPhysReg ImplicitList36[] = { X86::RCX, 0 };
static const MCPhysReg ImplicitList37[] = { X86::AH, 0 };
static const MCPhysReg ImplicitList38[] = { X86::EBP, X86::ESP, 0 };
static const MCPhysReg ImplicitList39[] = { X86::RBP, X86::RSP, 0 };
static const MCPhysReg ImplicitList40[] = { X86::ESI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList41[] = { X86::AL, X86::ESI, 0 };
static const MCPhysReg ImplicitList42[] = { X86::EAX, X86::ESI, 0 };
static const MCPhysReg ImplicitList43[] = { X86::RAX, X86::ESI, 0 };
static const MCPhysReg ImplicitList44[] = { X86::AX, X86::ESI, 0 };
static const MCPhysReg ImplicitList45[] = { X86::RDI, 0 };
static const MCPhysReg ImplicitList46[] = { X86::EAX, X86::ECX, X86::EDX, 0 };
static const MCPhysReg ImplicitList47[] = { X86::RAX, X86::RSI, 0 };
static const MCPhysReg ImplicitList48[] = { X86::RAX, X86::RDX, X86::RSI, 0 };
static const MCPhysReg ImplicitList49[] = { X86::EDI, X86::ESI, 0 };
static const MCPhysReg ImplicitList50[] = { X86::EDX, 0 };
static const MCPhysReg ImplicitList51[] = { X86::RDX, 0 };
static const MCPhysReg ImplicitList52[] = { X86::ECX, X86::EAX, X86::EBX, 0 };
static const MCPhysReg ImplicitList53[] = { X86::ECX, X86::EAX, 0 };
static const MCPhysReg ImplicitList54[] = { X86::DX, X86::AX, 0 };
static const MCPhysReg ImplicitList55[] = { X86::DX, X86::EAX, 0 };
static const MCPhysReg ImplicitList56[] = { X86::DX, X86::AL, 0 };
static const MCPhysReg ImplicitList57[] = { X86::DX, X86::ESI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList58[] = { X86::ESI, 0 };
static const MCPhysReg ImplicitList59[] = { X86::ECX, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList60[] = { X86::XMM0, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList61[] = { X86::EDI, X86::ESI, X86::EBP, X86::EBX, X86::EDX, X86::ECX, X86::EAX, X86::ESP, 0 };
static const MCPhysReg ImplicitList62[] = { X86::CL, 0 };
static const MCPhysReg ImplicitList63[] = { X86::RAX, X86::RCX, X86::RDX, 0 };
static const MCPhysReg ImplicitList64[] = { X86::ECX, X86::EDI, X86::ESI, 0 };
static const MCPhysReg ImplicitList65[] = { X86::RCX, X86::RDI, X86::RSI, 0 };
static const MCPhysReg ImplicitList66[] = { X86::AL, X86::ECX, X86::EDI, 0 };
static const MCPhysReg ImplicitList67[] = { X86::ECX, X86::EDI, 0 };
static const MCPhysReg ImplicitList68[] = { X86::AL, X86::RCX, X86::RDI, 0 };
static const MCPhysReg ImplicitList69[] = { X86::RCX, X86::RDI, 0 };
static const MCPhysReg ImplicitList70[] = { X86::EAX, X86::ECX, X86::EDI, 0 };
static const MCPhysReg ImplicitList71[] = { X86::RAX, X86::RCX, X86::RDI, 0 };
static const MCPhysReg ImplicitList72[] = { X86::AX, X86::ECX, X86::EDI, 0 };
static const MCPhysReg ImplicitList73[] = { X86::AX, X86::RCX, X86::RDI, 0 };
static const MCPhysReg ImplicitList74[] = { X86::AL, X86::EDI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList75[] = { X86::EDI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList76[] = { X86::EAX, X86::EDI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList77[] = { X86::RAX, X86::EDI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList78[] = { X86::AX, X86::EDI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList79[] = { X86::EAX, X86::ESP, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList80[] = { X86::RAX, X86::RSP, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList81[] = { X86::RAX, X86::RDI, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList82[] = { X86::EAX, X86::ECX, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList83[] = { X86::RSP, X86::RDI, 0 };
static const MCPhysReg ImplicitList84[] = { X86::EAX, X86::ECX, X86::EDX, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList85[] = { X86::RAX, X86::RCX, X86::RDX, X86::RSI, X86::RDI, X86::R8, X86::R9, X86::R10, X86::R11, X86::FP0, X86::FP1, X86::FP2, X86::FP3, X86::FP4, X86::FP5, X86::FP6, X86::FP7, X86::ST0, X86::ST1, X86::ST2, X86::ST3, X86::ST4, X86::ST5, X86::ST6, X86::ST7, X86::MM0, X86::MM1, X86::MM2, X86::MM3, X86::MM4, X86::MM5, X86::MM6, X86::MM7, X86::XMM0, X86::XMM1, X86::XMM2, X86::XMM3, X86::XMM4, X86::XMM5, X86::XMM6, X86::XMM7, X86::XMM8, X86::XMM9, X86::XMM10, X86::XMM11, X86::XMM12, X86::XMM13, X86::XMM14, X86::XMM15, X86::EFLAGS, 0 };
static const MCPhysReg ImplicitList86[] = { X86::ST0, 0 };
static const MCPhysReg ImplicitList87[] = { X86::YMM0, X86::YMM1, X86::YMM2, X86::YMM3, X86::YMM4, X86::YMM5, X86::YMM6, X86::YMM7, X86::YMM8, X86::YMM9, X86::YMM10, X86::YMM11, X86::YMM12, X86::YMM13, X86::YMM14, X86::YMM15, 0 };
static const MCPhysReg ImplicitList88[] = { X86::RBX, X86::RDX, X86::RSI, X86::RDI, 0 };
static const MCPhysReg ImplicitList89[] = { X86::RSI, X86::RDI, 0 };
static const MCPhysReg ImplicitList90[] = { X86::EDX, X86::EAX, 0 };
static const MCPhysReg ImplicitList91[] = { X86::AL, X86::EBX, 0 };
static const MCPhysReg ImplicitList92[] = { X86::EDX, X86::EAX, X86::ECX, 0 };
static const MCPhysReg ImplicitList93[] = { X86::RAX, X86::RSI, X86::RDI, 0 };
static const MCPhysReg ImplicitList94[] = { X86::RDX, X86::RDI, 0 };
static const MCPhysReg ImplicitList95[] = { X86::RAX, X86::RDI, 0 };
static const MCOperandInfo OperandInfo2[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo3[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo4[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo5[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo6[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo7[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo8[] = { { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo9[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo10[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo11[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo12[] = { { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo13[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo14[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo15[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo16[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo17[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo18[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo19[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo20[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo21[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo22[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo23[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo24[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo25[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo26[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo27[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo28[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo29[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo30[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo31[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo32[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo33[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo34[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo35[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo36[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo37[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo38[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo39[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo40[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo41[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo42[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo43[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo44[] = { { X86::RSTRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo45[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo46[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo47[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo48[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo49[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo50[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo51[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo52[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo53[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo54[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo55[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo56[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo57[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo58[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo59[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo60[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo61[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo62[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo63[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo64[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo65[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo66[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo67[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo68[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo69[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo70[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo71[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo72[] = { { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo73[] = { { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo74[] = { { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo75[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo76[] = { { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::BNDRRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo77[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo78[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo79[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo80[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo81[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo82[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo83[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo84[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
static const MCOperandInfo OperandInfo85[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo86[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_PCREL, 0 }, };
static const MCOperandInfo OperandInfo87[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo88[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo89[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo90[] = { { X86::FR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo91[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo92[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo93[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo94[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo95[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo96[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo97[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo98[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo99[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo100[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo101[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo102[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo103[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo104[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo105[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo106[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo107[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo108[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo109[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo110[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo111[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo112[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo113[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo114[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo115[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo116[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo117[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo118[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo119[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo120[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo121[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo122[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo123[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo124[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo125[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo126[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo127[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo128[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo129[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo130[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo131[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo132[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo133[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo134[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo135[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo136[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo137[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo138[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo139[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo140[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo141[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo142[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo143[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo144[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo145[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo146[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo147[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo148[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo149[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo150[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo151[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo152[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo153[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo154[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo155[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo156[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo157[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo158[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo159[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo160[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo161[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo162[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo163[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo164[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo165[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo166[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo167[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo168[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo169[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo170[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo171[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo172[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo173[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo174[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo175[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo176[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo177[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo178[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo179[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo180[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo181[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo182[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo183[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo184[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo185[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo186[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo187[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo188[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo189[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo190[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo191[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo192[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo193[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo194[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo195[] = { { X86::RFP32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo196[] = { { X86::RFP64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo197[] = { { X86::RFP80RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo198[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo199[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { X86::GR64_NOSPRegClassID, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo200[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo201[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo202[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo203[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo204[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo205[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo206[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo207[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo208[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo209[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo210[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo211[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo212[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo213[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo214[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo215[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo216[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo217[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo218[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo219[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo220[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo221[] = { { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo222[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo223[] = { { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo224[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo225[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo226[] = { { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo227[] = { { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo228[] = { { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo229[] = { { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo230[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo231[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo232[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo233[] = { { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo234[] = { { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo235[] = { { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo236[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::CONTROL_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo237[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::DEBUG_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo238[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo239[] = { { X86::SEGMENT_REGRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo240[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo241[] = { { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo242[] = { { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo243[] = { { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo244[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo245[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo246[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo247[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo248[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo249[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo250[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo251[] = { { X86::GR32_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 2, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 3, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo252[] = { { X86::GR32_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo253[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo254[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo255[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo256[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo257[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo258[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo259[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo260[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo261[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo262[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo263[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo264[] = { { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo265[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo266[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo267[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo268[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo269[] = { { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo270[] = { { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, };
static const MCOperandInfo OperandInfo271[] = { { -1, 0, MCOI::OPERAND_PCREL, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo272[] = { { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo273[] = { { 4, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_UNKNOWN, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo274[] = { { X86::GR8_NOREXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo275[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo276[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo277[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo278[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo279[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo280[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo281[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo282[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo283[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo284[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo285[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo286[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo287[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo288[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo289[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo290[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo291[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo292[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo293[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo294[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo295[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo296[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo297[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo298[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo299[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo300[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo301[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo302[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo303[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo304[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo305[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo306[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo307[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo308[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo309[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo310[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo311[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo312[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo313[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo314[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo315[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo316[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo317[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo318[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo319[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo320[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo321[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo322[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo323[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo324[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo325[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo326[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo327[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo328[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo329[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo330[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo331[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo332[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo333[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo334[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo335[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo336[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo337[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo338[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo339[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo340[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo341[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo342[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo343[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo344[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo345[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo346[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo347[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo348[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo349[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo350[] = { { X86::GR8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo351[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo352[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo353[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo354[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo355[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo356[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo357[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo358[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo359[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo360[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo361[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo362[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo363[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo364[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo365[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo366[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo367[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo368[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo369[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo370[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo371[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo372[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo373[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo374[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo375[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo376[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo377[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo378[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo379[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo380[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo381[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo382[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo383[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo384[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo385[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo386[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo387[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo388[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo389[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo390[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo391[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo392[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo393[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo394[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo395[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo396[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo397[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo398[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo399[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo400[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo401[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo402[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo403[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo404[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo405[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo406[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo407[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo408[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo409[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo410[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo411[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo412[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo413[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo414[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo415[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo416[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo417[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo418[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo419[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo420[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo421[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo422[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo423[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo424[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo425[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo426[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo427[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo428[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo429[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo430[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo431[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo432[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo433[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo434[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo435[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo436[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo437[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo438[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo439[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo440[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo441[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo442[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo443[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo444[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo445[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo446[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo447[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo448[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo449[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo450[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo451[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo452[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo453[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo454[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo455[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo456[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo457[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo458[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo459[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo460[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo461[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo462[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo463[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo464[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo465[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo466[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo467[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo468[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo469[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo470[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo471[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo472[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo473[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo474[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo475[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo476[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo477[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo478[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo479[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo480[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo481[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo482[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo483[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo484[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo485[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo486[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo487[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo488[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo489[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo490[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo491[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo492[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo493[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo494[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo495[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo496[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo497[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo498[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo499[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo500[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo501[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo502[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo503[] = { { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo504[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo505[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo506[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo507[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo508[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo509[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo510[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo511[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo512[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo513[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo514[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo515[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo516[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo517[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo518[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo519[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo520[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo521[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo522[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo523[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo524[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo525[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo526[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo527[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo528[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo529[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo530[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo531[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo532[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo533[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo534[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo535[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo536[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo537[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo538[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo539[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo540[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo541[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo542[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo543[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo544[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo545[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo546[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo547[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo548[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo549[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo550[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo551[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo552[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo553[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo554[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo555[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo556[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo557[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo558[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo559[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo560[] = { { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo561[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo562[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo563[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo564[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo565[] = { { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo566[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo567[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo568[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo569[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo570[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo571[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo572[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo573[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo574[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo575[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo576[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo577[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo578[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo579[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo580[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo581[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo582[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo583[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo584[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo585[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo586[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo587[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo588[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo589[] = { { X86::VK1RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo590[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo591[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo592[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo593[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo594[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo595[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo596[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo597[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo598[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo599[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo600[] = { { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo601[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo602[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo603[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo604[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, };
static const MCOperandInfo OperandInfo605[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo606[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, (1 << MCOI::EARLY_CLOBBER) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((1 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo607[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo608[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo609[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo610[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo611[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo612[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo613[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo614[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo615[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo616[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo617[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo618[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo619[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo620[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo621[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo622[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo623[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo624[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo625[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo626[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo627[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo628[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo629[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo630[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo631[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo632[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo633[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo634[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo635[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo636[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo637[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo638[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo639[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo640[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo641[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo642[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo643[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo644[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo645[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo646[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo647[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo648[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo649[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo650[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo651[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo652[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo653[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo654[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo655[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo656[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo657[] = { { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo658[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo659[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo660[] = { { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo661[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo662[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo663[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo664[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo665[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo666[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo667[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo668[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo669[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo670[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo671[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo672[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo673[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo674[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo675[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo676[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo677[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo678[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo679[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo680[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo681[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo682[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo683[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo684[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo685[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo686[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo687[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo688[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo689[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo690[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo691[] = { { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo692[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo693[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo694[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo695[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo696[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo697[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo698[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo699[] = { { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK1WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo700[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo701[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::FR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo702[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo703[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo704[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo705[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo706[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo707[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo708[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo709[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo710[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo711[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo712[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo713[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo714[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo715[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo716[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo717[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo718[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo719[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo720[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo721[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo722[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo723[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo724[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo725[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo726[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo727[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo728[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo729[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo730[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo731[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo732[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo733[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo734[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo735[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo736[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo737[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo738[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo739[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo740[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo741[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo742[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo743[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo744[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo745[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo746[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo747[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo748[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo749[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo750[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo751[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo752[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo753[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo754[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo755[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo756[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo757[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo758[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo759[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo760[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo761[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo762[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo763[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo764[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo765[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo766[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo767[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo768[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo769[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo770[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo771[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo772[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo773[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo774[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo775[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo776[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo777[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo778[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo779[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo780[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo781[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo782[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo783[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo784[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo785[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo786[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo787[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo788[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo789[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo790[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo791[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo792[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo793[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo794[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo795[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo796[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo797[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo798[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo799[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo800[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo801[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo802[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo803[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo804[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo805[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo806[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo807[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo808[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo809[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo810[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo811[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo812[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo813[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo814[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo815[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo816[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo817[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo818[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo819[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo820[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo821[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo822[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo823[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo824[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo825[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo826[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo827[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo828[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo829[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo830[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo831[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo832[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo833[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo834[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo835[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo836[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo837[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, };
static const MCOperandInfo OperandInfo838[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo839[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo840[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo841[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo842[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo843[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo844[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo845[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo846[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo847[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo848[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo849[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo850[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo851[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo852[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo853[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo854[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo855[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo856[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo857[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo858[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo859[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo860[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo861[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::GR64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo862[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo863[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo864[] = { { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo865[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo866[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo867[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo868[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo869[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo870[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo871[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo872[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo873[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo874[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo875[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo876[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo877[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo878[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK64RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo879[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo880[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo881[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo882[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo883[] = { { X86::VK2RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo884[] = { { X86::VK4RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo885[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo886[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo887[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo888[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo889[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo890[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo891[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo892[] = { { X86::VK8RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo893[] = { { X86::VK16RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo894[] = { { X86::VK32RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo895[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo896[] = { { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo897[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo898[] = { { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo899[] = { { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK2WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo900[] = { { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo901[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo902[] = { { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo903[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo904[] = { { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo905[] = { { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo906[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo907[] = { { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo908[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo909[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo910[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo911[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo912[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo913[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { 0, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { 1, 0|(1<<MCOI::LookupPtrRegClass), MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_MEMORY, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo914[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo915[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { -1, 0, MCOI::OPERAND_IMMEDIATE, 0 }, };
static const MCOperandInfo OperandInfo916[] = { { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo917[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo918[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo919[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo920[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo921[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo922[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo923[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo924[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK4WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo925[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo926[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK8WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo927[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo928[] = { { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK16WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR256XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo929[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, ((0 << 16) | (1 << MCOI::TIED_TO)) }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo930[] = { { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VK32WMRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR512RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, { X86::VR128XRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo931[] = { { X86::VR128RegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
static const MCOperandInfo OperandInfo932[] = { { X86::GR32_NOAXRegClassID, 0, MCOI::OPERAND_REGISTER, 0 }, };
extern const MCInstrDesc X86Insts[] = {
{ 0, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #0 = PHI
{ 1, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1 = INLINEASM
{ 2, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #2 = CFI_INSTRUCTION
{ 3, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #3 = EH_LABEL
{ 4, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::NotDuplicable)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #4 = GC_LABEL
{ 5, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #5 = KILL
{ 6, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #6 = EXTRACT_SUBREG
{ 7, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo4, -1 ,nullptr }, // Inst #7 = INSERT_SUBREG
{ 8, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, // Inst #8 = IMPLICIT_DEF
{ 9, 4, 1, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo6, -1 ,nullptr }, // Inst #9 = SUBREG_TO_REG
{ 10, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo3, -1 ,nullptr }, // Inst #10 = COPY_TO_REGCLASS
{ 11, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #11 = DBG_VALUE
{ 12, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #12 = REG_SEQUENCE
{ 13, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo7, -1 ,nullptr }, // Inst #13 = COPY
{ 14, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #14 = BUNDLE
{ 15, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #15 = LIFETIME_START
{ 16, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #16 = LIFETIME_END
{ 17, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #17 = STACKMAP
{ 18, 6, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo9, -1 ,nullptr }, // Inst #18 = PATCHPOINT
{ 19, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, nullptr, OperandInfo10, -1 ,nullptr }, // Inst #19 = LOAD_STACK_GUARD
{ 20, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #20 = STATEPOINT
{ 21, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo), 0x0ULL, nullptr, nullptr, OperandInfo11, -1 ,nullptr }, // Inst #21 = LOCAL_ESCAPE
{ 22, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo5, -1 ,nullptr }, // Inst #22 = FAULTING_LOAD_OP
{ 23, 3, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, nullptr, OperandInfo12, -1 ,nullptr }, // Inst #23 = G_ADD
{ 24, 0, 0, 0, 1, 0, 0x1b80000001ULL, ImplicitList1, ImplicitList2, nullptr, -1 ,nullptr }, // Inst #24 = AAA
{ 25, 1, 0, 0, 2, 0, 0x6a80040001ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #25 = AAD8i8
{ 26, 1, 0, 0, 3, 0, 0x6a00040001ULL, ImplicitList4, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #26 = AAM8i8
{ 27, 0, 0, 0, 4, 0, 0x1f80000001ULL, ImplicitList1, ImplicitList2, nullptr, -1 ,nullptr }, // Inst #27 = AAS
{ 28, 0, 0, 0, 758, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000041ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #28 = ABS_F
{ 29, 2, 1, 0, 758, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr }, // Inst #29 = ABS_Fp32
{ 30, 2, 1, 0, 758, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr }, // Inst #30 = ABS_Fp64
{ 31, 2, 1, 0, 758, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr }, // Inst #31 = ABS_Fp80
{ 32, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #32 = ACQUIRE_MOV16rm
{ 33, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #33 = ACQUIRE_MOV32rm
{ 34, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #34 = ACQUIRE_MOV64rm
{ 35, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x0ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, // Inst #35 = ACQUIRE_MOV8rm
{ 36, 1, 0, 0, 5, 0, 0xa800c0081ULL, ImplicitList2, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #36 = ADC16i16
{ 37, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #37 = ADC16mi
{ 38, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #38 = ADC16mi8
{ 39, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880000084ULL, ImplicitList6, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #39 = ADC16mr
{ 40, 3, 1, 0, 614, 0, 0x40800c0092ULL, ImplicitList6, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #40 = ADC16ri
{ 41, 3, 1, 0, 614, 0, 0x4180040092ULL, ImplicitList6, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #41 = ADC16ri8
{ 42, 7, 1, 0, 615, 0|(1ULL<<MCID::MayLoad), 0x980000086ULL, ImplicitList6, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #42 = ADC16rm
{ 43, 3, 1, 0, 614, 0|(1ULL<<MCID::Commutable), 0x880000083ULL, ImplicitList6, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #43 = ADC16rr
{ 44, 3, 1, 0, 614, 0, 0x980000085ULL, ImplicitList6, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #44 = ADC16rr_REV
{ 45, 1, 0, 0, 5, 0, 0xa80140101ULL, ImplicitList7, ImplicitList7, OperandInfo2, -1 ,nullptr }, // Inst #45 = ADC32i32
{ 46, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #46 = ADC32mi
{ 47, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #47 = ADC32mi8
{ 48, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880000104ULL, ImplicitList6, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #48 = ADC32mr
{ 49, 3, 1, 0, 614, 0, 0x4080140112ULL, ImplicitList6, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #49 = ADC32ri
{ 50, 3, 1, 0, 614, 0, 0x4180040112ULL, ImplicitList6, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #50 = ADC32ri8
{ 51, 7, 1, 0, 615, 0|(1ULL<<MCID::MayLoad), 0x980000106ULL, ImplicitList6, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #51 = ADC32rm
{ 52, 3, 1, 0, 614, 0|(1ULL<<MCID::Commutable), 0x880000103ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #52 = ADC32rr
{ 53, 3, 1, 0, 614, 0, 0x980000105ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #53 = ADC32rr_REV
{ 54, 1, 0, 0, 5, 0, 0xa801e0001ULL, ImplicitList8, ImplicitList8, OperandInfo2, -1 ,nullptr }, // Inst #54 = ADC64i32
{ 55, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #55 = ADC64mi32
{ 56, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #56 = ADC64mi8
{ 57, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x880020004ULL, ImplicitList6, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #57 = ADC64mr
{ 58, 3, 1, 0, 614, 0, 0x40801e0012ULL, ImplicitList6, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #58 = ADC64ri32
{ 59, 3, 1, 0, 614, 0, 0x4180060012ULL, ImplicitList6, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #59 = ADC64ri8
{ 60, 7, 1, 0, 615, 0|(1ULL<<MCID::MayLoad), 0x980020006ULL, ImplicitList6, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #60 = ADC64rm
{ 61, 3, 1, 0, 614, 0|(1ULL<<MCID::Commutable), 0x880020003ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #61 = ADC64rr
{ 62, 3, 1, 0, 614, 0, 0x980020005ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #62 = ADC64rr_REV
{ 63, 1, 0, 0, 5, 0, 0xa00040001ULL, ImplicitList1, ImplicitList1, OperandInfo2, -1 ,nullptr }, // Inst #63 = ADC8i8
{ 64, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #64 = ADC8mi
{ 65, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001aULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #65 = ADC8mi8
{ 66, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x800000004ULL, ImplicitList6, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #66 = ADC8mr
{ 67, 3, 1, 0, 614, 0, 0x4000040012ULL, ImplicitList6, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #67 = ADC8ri
{ 68, 3, 1, 0, 614, 0, 0x4100040012ULL, ImplicitList6, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #68 = ADC8ri8
{ 69, 7, 1, 0, 615, 0|(1ULL<<MCID::MayLoad), 0x900000006ULL, ImplicitList6, ImplicitList6, OperandInfo35, -1 ,nullptr }, // Inst #69 = ADC8rm
{ 70, 3, 1, 0, 614, 0|(1ULL<<MCID::Commutable), 0x800000003ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #70 = ADC8rr
{ 71, 3, 1, 0, 614, 0, 0x900000005ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #71 = ADC8rr_REV
{ 72, 7, 1, 0, 8, 0|(1ULL<<MCID::MayLoad), 0x7b00009006ULL, ImplicitList6, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #72 = ADCX32rm
{ 73, 3, 1, 0, 5, 0, 0x7b00009005ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #73 = ADCX32rr
{ 74, 7, 1, 0, 8, 0|(1ULL<<MCID::MayLoad), 0x7b00029006ULL, ImplicitList6, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #74 = ADCX64rm
{ 75, 3, 1, 0, 5, 0, 0x7b00029005ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #75 = ADCX64rr
{ 76, 1, 0, 0, 9, 0, 0x2800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #76 = ADD16i16
{ 77, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c0098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #77 = ADD16mi
{ 78, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #78 = ADD16mi8
{ 79, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #79 = ADD16mr
{ 80, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x40800c0090ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #80 = ADD16ri
{ 81, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180040090ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #81 = ADD16ri8
{ 82, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #82 = ADD16ri8_DB
{ 83, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #83 = ADD16ri_DB
{ 84, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x180000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #84 = ADD16rm
{ 85, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #85 = ADD16rr
{ 86, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #86 = ADD16rr_DB
{ 87, 3, 1, 0, 9, 0, 0x180000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #87 = ADD16rr_REV
{ 88, 1, 0, 0, 9, 0, 0x280140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr }, // Inst #88 = ADD32i32
{ 89, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080140118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #89 = ADD32mi
{ 90, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #90 = ADD32mi8
{ 91, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #91 = ADD32mr
{ 92, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4080140110ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #92 = ADD32ri
{ 93, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180040110ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #93 = ADD32ri8
{ 94, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #94 = ADD32ri8_DB
{ 95, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #95 = ADD32ri_DB
{ 96, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x180000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #96 = ADD32rm
{ 97, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #97 = ADD32rr
{ 98, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #98 = ADD32rr_DB
{ 99, 3, 1, 0, 9, 0, 0x180000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #99 = ADD32rr_REV
{ 100, 1, 0, 0, 9, 0, 0x2801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr }, // Inst #100 = ADD64i32
{ 101, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e0018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #101 = ADD64mi32
{ 102, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #102 = ADD64mi8
{ 103, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #103 = ADD64mr
{ 104, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x40801e0010ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #104 = ADD64ri32
{ 105, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #105 = ADD64ri32_DB
{ 106, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x4180060010ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #106 = ADD64ri8
{ 107, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x0ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #107 = ADD64ri8_DB
{ 108, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x180020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #108 = ADD64rm
{ 109, 3, 1, 0, 9, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x80020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #109 = ADD64rr
{ 110, 3, 1, 0, 11, 0|(1ULL<<MCID::ConvertibleTo3Addr)|(1ULL<<MCID::Commutable), 0x0ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #110 = ADD64rr_DB
{ 111, 3, 1, 0, 9, 0, 0x180020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #111 = ADD64rr_REV
{ 112, 1, 0, 0, 9, 0, 0x200040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr }, // Inst #112 = ADD8i8
{ 113, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #113 = ADD8mi
{ 114, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #114 = ADD8mi8
{ 115, 6, 0, 0, 613, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #115 = ADD8mr
{ 116, 3, 1, 0, 9, 0, 0x4000040010ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #116 = ADD8ri
{ 117, 3, 1, 0, 9, 0, 0x4100040010ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #117 = ADD8ri8
{ 118, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x100000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr }, // Inst #118 = ADD8rm
{ 119, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x3ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #119 = ADD8rr
{ 120, 3, 1, 0, 9, 0, 0x100000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #120 = ADD8rr_REV
{ 121, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x2c10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #121 = ADDPDrm
{ 122, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x2c10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #122 = ADDPDrr
{ 123, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x2c08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #123 = ADDPSrm
{ 124, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x2c08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #124 = ADDPSrr
{ 125, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2c10006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #125 = ADDSDrm
{ 126, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2c10006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #126 = ADDSDrm_Int
{ 127, 3, 1, 0, 18, 0|(1ULL<<MCID::Commutable), 0x2c10006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #127 = ADDSDrr
{ 128, 3, 1, 0, 18, 0, 0x2c10006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #128 = ADDSDrr_Int
{ 129, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2c08005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #129 = ADDSSrm
{ 130, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2c08005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #130 = ADDSSrm_Int
{ 131, 3, 1, 0, 20, 0|(1ULL<<MCID::Commutable), 0x2c08005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #131 = ADDSSrr
{ 132, 3, 1, 0, 20, 0, 0x2c08005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #132 = ADDSSrr_Int
{ 133, 7, 1, 0, 21, 0|(1ULL<<MCID::MayLoad), 0x6810005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #133 = ADDSUBPDrm
{ 134, 3, 1, 0, 14, 0, 0x6810005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #134 = ADDSUBPDrr
{ 135, 7, 1, 0, 22, 0|(1ULL<<MCID::MayLoad), 0x6808006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #135 = ADDSUBPSrm
{ 136, 3, 1, 0, 16, 0, 0x6808006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #136 = ADDSUBPSrr
{ 137, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #137 = ADD_F32m
{ 138, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #138 = ADD_F64m
{ 139, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #139 = ADD_FI16m
{ 140, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #140 = ADD_FI32m
{ 141, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #141 = ADD_FPrST0
{ 142, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #142 = ADD_FST0r
{ 143, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo45, -1 ,nullptr }, // Inst #143 = ADD_Fp32
{ 144, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #144 = ADD_Fp32m
{ 145, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo47, -1 ,nullptr }, // Inst #145 = ADD_Fp64
{ 146, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #146 = ADD_Fp64m
{ 147, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #147 = ADD_Fp64m32
{ 148, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr }, // Inst #148 = ADD_Fp80
{ 149, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #149 = ADD_Fp80m32
{ 150, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #150 = ADD_Fp80m64
{ 151, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #151 = ADD_FpI16m32
{ 152, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #152 = ADD_FpI16m64
{ 153, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #153 = ADD_FpI16m80
{ 154, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #154 = ADD_FpI32m32
{ 155, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #155 = ADD_FpI32m64
{ 156, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #156 = ADD_FpI32m80
{ 157, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #157 = ADD_FrST0
{ 158, 2, 0, 0, 0, 0, 0x0ULL, ImplicitList11, ImplicitList12, OperandInfo8, -1 ,nullptr }, // Inst #158 = ADJCALLSTACKDOWN32
{ 159, 2, 0, 0, 0, 0, 0x0ULL, ImplicitList13, ImplicitList14, OperandInfo8, -1 ,nullptr }, // Inst #159 = ADJCALLSTACKDOWN64
{ 160, 2, 0, 0, 0, 0, 0x0ULL, ImplicitList11, ImplicitList12, OperandInfo8, -1 ,nullptr }, // Inst #160 = ADJCALLSTACKUP32
{ 161, 2, 0, 0, 0, 0, 0x0ULL, ImplicitList13, ImplicitList14, OperandInfo8, -1 ,nullptr }, // Inst #161 = ADJCALLSTACKUP64
{ 162, 6, 1, 0, 25, 0|(1ULL<<MCID::MayLoad), 0x7b00009806ULL, ImplicitList6, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #162 = ADOX32rm
{ 163, 2, 1, 0, 9, 0, 0x7b00009805ULL, ImplicitList6, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #163 = ADOX32rr
{ 164, 6, 1, 0, 25, 0|(1ULL<<MCID::MayLoad), 0x7b00029806ULL, ImplicitList6, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #164 = ADOX64rm
{ 165, 2, 1, 0, 9, 0, 0x7b00029805ULL, ImplicitList6, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #165 = ADOX64rr
{ 166, 7, 1, 0, 26, 0|(1ULL<<MCID::MayLoad), 0x6f98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #166 = AESDECLASTrm
{ 167, 3, 1, 0, 27, 0, 0x6f98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #167 = AESDECLASTrr
{ 168, 7, 1, 0, 26, 0|(1ULL<<MCID::MayLoad), 0x6f18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #168 = AESDECrm
{ 169, 3, 1, 0, 27, 0, 0x6f18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #169 = AESDECrr
{ 170, 7, 1, 0, 26, 0|(1ULL<<MCID::MayLoad), 0x6e98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #170 = AESENCLASTrm
{ 171, 3, 1, 0, 27, 0, 0x6e98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #171 = AESENCLASTrr
{ 172, 7, 1, 0, 26, 0|(1ULL<<MCID::MayLoad), 0x6e18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #172 = AESENCrm
{ 173, 3, 1, 0, 27, 0, 0x6e18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #173 = AESENCrr
{ 174, 6, 1, 0, 28, 0|(1ULL<<MCID::MayLoad), 0x6d98009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #174 = AESIMCrm
{ 175, 2, 1, 0, 29, 0, 0x6d98009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #175 = AESIMCrr
{ 176, 7, 1, 0, 30, 0|(1ULL<<MCID::MayLoad), 0x6f9804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #176 = AESKEYGENASSIST128rm
{ 177, 3, 1, 0, 31, 0, 0x6f9804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #177 = AESKEYGENASSIST128rr
{ 178, 1, 0, 0, 9, 0, 0x12800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #178 = AND16i16
{ 179, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #179 = AND16mi
{ 180, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #180 = AND16mi8
{ 181, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #181 = AND16mr
{ 182, 3, 1, 0, 9, 0, 0x40800c0094ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #182 = AND16ri
{ 183, 3, 1, 0, 9, 0, 0x4180040094ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #183 = AND16ri8
{ 184, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x1180000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #184 = AND16rm
{ 185, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x1080000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #185 = AND16rr
{ 186, 3, 1, 0, 9, 0, 0x1180000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #186 = AND16rr_REV
{ 187, 1, 0, 0, 9, 0, 0x1280140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr }, // Inst #187 = AND32i32
{ 188, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #188 = AND32mi
{ 189, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #189 = AND32mi8
{ 190, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #190 = AND32mr
{ 191, 3, 1, 0, 9, 0, 0x4080140114ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #191 = AND32ri
{ 192, 3, 1, 0, 9, 0, 0x4180040114ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #192 = AND32ri8
{ 193, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x1180000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #193 = AND32rm
{ 194, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x1080000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #194 = AND32rr
{ 195, 3, 1, 0, 9, 0, 0x1180000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #195 = AND32rr_REV
{ 196, 1, 0, 0, 9, 0, 0x12801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr }, // Inst #196 = AND64i32
{ 197, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #197 = AND64mi32
{ 198, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #198 = AND64mi8
{ 199, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1080020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #199 = AND64mr
{ 200, 3, 1, 0, 9, 0, 0x40801e0014ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #200 = AND64ri32
{ 201, 3, 1, 0, 9, 0, 0x4180060014ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #201 = AND64ri8
{ 202, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x1180020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #202 = AND64rm
{ 203, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x1080020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #203 = AND64rr
{ 204, 3, 1, 0, 9, 0, 0x1180020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #204 = AND64rr_REV
{ 205, 1, 0, 0, 9, 0, 0x1200040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr }, // Inst #205 = AND8i8
{ 206, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #206 = AND8mi
{ 207, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #207 = AND8mi8
{ 208, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1000000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #208 = AND8mr
{ 209, 3, 1, 0, 9, 0, 0x4000040014ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #209 = AND8ri
{ 210, 3, 1, 0, 9, 0, 0x4100040014ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #210 = AND8ri8
{ 211, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x1100000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr }, // Inst #211 = AND8rm
{ 212, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x1000000003ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #212 = AND8rr
{ 213, 3, 1, 0, 9, 0, 0x1100000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #213 = AND8rr_REV
{ 214, 7, 1, 0, 697, 0|(1ULL<<MCID::MayLoad), 0x17920008806ULL, nullptr, ImplicitList6, OperandInfo57, -1 ,nullptr }, // Inst #214 = ANDN32rm
{ 215, 3, 1, 0, 696, 0, 0x17920008805ULL, nullptr, ImplicitList6, OperandInfo58, -1 ,nullptr }, // Inst #215 = ANDN32rr
{ 216, 7, 1, 0, 697, 0|(1ULL<<MCID::MayLoad), 0x1f920008806ULL, nullptr, ImplicitList6, OperandInfo59, -1 ,nullptr }, // Inst #216 = ANDN64rm
{ 217, 3, 1, 0, 696, 0, 0x1f920008805ULL, nullptr, ImplicitList6, OperandInfo60, -1 ,nullptr }, // Inst #217 = ANDN64rr
{ 218, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x2a90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #218 = ANDNPDrm
{ 219, 3, 1, 0, 941, 0, 0x2a90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #219 = ANDNPDrr
{ 220, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x2a88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #220 = ANDNPSrm
{ 221, 3, 1, 0, 941, 0, 0x2a88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #221 = ANDNPSrr
{ 222, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x2a10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #222 = ANDPDrm
{ 223, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x2a10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #223 = ANDPDrr
{ 224, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x2a08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #224 = ANDPSrm
{ 225, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x2a08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #225 = ANDPSrr
{ 226, 6, 0, 0, 34, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3180000004ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, // Inst #226 = ARPL16mr
{ 227, 2, 1, 0, 35, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3180000003ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #227 = ARPL16rr
{ 228, 1, 1, 0, 36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #228 = AVX2_SETALLONES
{ 229, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo63, -1 ,nullptr }, // Inst #229 = AVX512_512_SET0
{ 230, 1, 1, 0, 36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo62, -1 ,nullptr }, // Inst #230 = AVX_SET0
{ 231, 7, 1, 0, 701, 0|(1ULL<<MCID::MayLoad), 0x27ba0008806ULL, nullptr, ImplicitList6, OperandInfo64, -1 ,nullptr }, // Inst #231 = BEXTR32rm
{ 232, 3, 1, 0, 700, 0, 0x27ba0008805ULL, nullptr, ImplicitList6, OperandInfo58, -1 ,nullptr }, // Inst #232 = BEXTR32rr
{ 233, 7, 1, 0, 701, 0|(1ULL<<MCID::MayLoad), 0x2fba0008806ULL, nullptr, ImplicitList6, OperandInfo65, -1 ,nullptr }, // Inst #233 = BEXTR64rm
{ 234, 3, 1, 0, 700, 0, 0x2fba0008805ULL, nullptr, ImplicitList6, OperandInfo60, -1 ,nullptr }, // Inst #234 = BEXTR64rr
{ 235, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x840158806ULL, nullptr, ImplicitList6, OperandInfo66, -1 ,nullptr }, // Inst #235 = BEXTRI32mi
{ 236, 3, 1, 0, 0, 0, 0x840158805ULL, nullptr, ImplicitList6, OperandInfo67, -1 ,nullptr }, // Inst #236 = BEXTRI32ri
{ 237, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x88401d8806ULL, nullptr, ImplicitList6, OperandInfo68, -1 ,nullptr }, // Inst #237 = BEXTRI64mi
{ 238, 3, 1, 0, 0, 0, 0x88401d8805ULL, nullptr, ImplicitList6, OperandInfo69, -1 ,nullptr }, // Inst #238 = BEXTRI64ri
{ 239, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100c0014819ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #239 = BLCFILL32rm
{ 240, 2, 1, 0, 0, 0, 0x100c0014811ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #240 = BLCFILL32rr
{ 241, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x180c0014819ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #241 = BLCFILL64rm
{ 242, 2, 1, 0, 0, 0, 0x180c0014811ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #242 = BLCFILL64rr
{ 243, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1014001481eULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #243 = BLCI32rm
{ 244, 2, 1, 0, 0, 0, 0x10140014816ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #244 = BLCI32rr
{ 245, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1814001481eULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #245 = BLCI64rm
{ 246, 2, 1, 0, 0, 0, 0x18140014816ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #246 = BLCI64rr
{ 247, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100c001481dULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #247 = BLCIC32rm
{ 248, 2, 1, 0, 0, 0, 0x100c0014815ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #248 = BLCIC32rr
{ 249, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x180c001481dULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #249 = BLCIC64rm
{ 250, 2, 1, 0, 0, 0, 0x180c0014815ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #250 = BLCIC64rr
{ 251, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10140014819ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #251 = BLCMSK32rm
{ 252, 2, 1, 0, 0, 0, 0x10140014811ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #252 = BLCMSK32rr
{ 253, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x18140014819ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #253 = BLCMSK64rm
{ 254, 2, 1, 0, 0, 0, 0x18140014811ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #254 = BLCMSK64rr
{ 255, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100c001481bULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #255 = BLCS32rm
{ 256, 2, 1, 0, 0, 0, 0x100c0014813ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #256 = BLCS32rr
{ 257, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x180c001481bULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #257 = BLCS64rm
{ 258, 2, 1, 0, 0, 0, 0x180c0014813ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #258 = BLCS64rr
{ 259, 8, 1, 0, 37, 0|(1ULL<<MCID::MayLoad), 0x69004d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #259 = BLENDPDrmi
{ 260, 4, 1, 0, 38, 0|(1ULL<<MCID::Commutable), 0x69004d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #260 = BLENDPDrri
{ 261, 8, 1, 0, 37, 0|(1ULL<<MCID::MayLoad), 0x60804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #261 = BLENDPSrmi
{ 262, 4, 1, 0, 38, 0|(1ULL<<MCID::Commutable), 0x60804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #262 = BLENDPSrri
{ 263, 7, 1, 0, 844, 0|(1ULL<<MCID::MayLoad), 0xa90009006ULL, ImplicitList15, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #263 = BLENDVPDrm0
{ 264, 3, 1, 0, 843, 0, 0xa90009005ULL, ImplicitList15, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #264 = BLENDVPDrr0
{ 265, 7, 1, 0, 844, 0|(1ULL<<MCID::MayLoad), 0xa08009006ULL, ImplicitList15, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #265 = BLENDVPSrm0
{ 266, 3, 1, 0, 843, 0, 0xa08009005ULL, ImplicitList15, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #266 = BLENDVPSrr0
{ 267, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100c001481aULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #267 = BLSFILL32rm
{ 268, 2, 1, 0, 0, 0, 0x100c0014812ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #268 = BLSFILL32rr
{ 269, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x180c001481aULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #269 = BLSFILL64rm
{ 270, 2, 1, 0, 0, 0, 0x180c0014812ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #270 = BLSFILL64rr
{ 271, 6, 1, 0, 699, 0|(1ULL<<MCID::MayLoad), 0x179a000881bULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #271 = BLSI32rm
{ 272, 2, 1, 0, 698, 0, 0x179a0008813ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #272 = BLSI32rr
{ 273, 6, 1, 0, 699, 0|(1ULL<<MCID::MayLoad), 0x1f9a000881bULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #273 = BLSI64rm
{ 274, 2, 1, 0, 698, 0, 0x1f9a0008813ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #274 = BLSI64rr
{ 275, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100c001481eULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #275 = BLSIC32rm
{ 276, 2, 1, 0, 0, 0, 0x100c0014816ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #276 = BLSIC32rr
{ 277, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x180c001481eULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #277 = BLSIC64rm
{ 278, 2, 1, 0, 0, 0, 0x180c0014816ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #278 = BLSIC64rr
{ 279, 6, 1, 0, 699, 0|(1ULL<<MCID::MayLoad), 0x179a000881aULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #279 = BLSMSK32rm
{ 280, 2, 1, 0, 698, 0, 0x179a0008812ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #280 = BLSMSK32rr
{ 281, 6, 1, 0, 699, 0|(1ULL<<MCID::MayLoad), 0x1f9a000881aULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #281 = BLSMSK64rm
{ 282, 2, 1, 0, 698, 0, 0x1f9a0008812ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #282 = BLSMSK64rr
{ 283, 6, 1, 0, 699, 0|(1ULL<<MCID::MayLoad), 0x179a0008819ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #283 = BLSR32rm
{ 284, 2, 1, 0, 698, 0, 0x179a0008811ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #284 = BLSR32rr
{ 285, 6, 1, 0, 699, 0|(1ULL<<MCID::MayLoad), 0x1f9a0008819ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #285 = BLSR64rm
{ 286, 2, 1, 0, 698, 0, 0x1f9a0008811ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #286 = BLSR64rr
{ 287, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00005806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #287 = BNDCL32rm
{ 288, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00005805ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr }, // Inst #288 = BNDCL32rr
{ 289, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00025806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #289 = BNDCL64rm
{ 290, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00025805ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #290 = BNDCL64rr
{ 291, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80006006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #291 = BNDCN32rm
{ 292, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80006005ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr }, // Inst #292 = BNDCN32rr
{ 293, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80026006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #293 = BNDCN64rm
{ 294, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80026005ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #294 = BNDCN64rr
{ 295, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00006006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #295 = BNDCU32rm
{ 296, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00006005ULL, nullptr, nullptr, OperandInfo73, -1 ,nullptr }, // Inst #296 = BNDCU32rr
{ 297, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00026006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #297 = BNDCU64rm
{ 298, 2, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00026005ULL, nullptr, nullptr, OperandInfo74, -1 ,nullptr }, // Inst #298 = BNDCU64rr
{ 299, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00004806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #299 = BNDLDXrm
{ 300, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80005806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #300 = BNDMK32rm
{ 301, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80025806ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #301 = BNDMK64rm
{ 302, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80005004ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr }, // Inst #302 = BNDMOVMR32mr
{ 303, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80025004ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr }, // Inst #303 = BNDMOVMR64mr
{ 304, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80005003ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr }, // Inst #304 = BNDMOVMRrr
{ 305, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00005006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #305 = BNDMOVRM32rm
{ 306, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00025006ULL, nullptr, nullptr, OperandInfo72, -1 ,nullptr }, // Inst #306 = BNDMOVRM64rm
{ 307, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd00005005ULL, nullptr, nullptr, OperandInfo76, -1 ,nullptr }, // Inst #307 = BNDMOVRMrr
{ 308, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xd80004804ULL, nullptr, nullptr, OperandInfo75, -1 ,nullptr }, // Inst #308 = BNDSTXmr
{ 309, 6, 1, 0, 715, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3100000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #309 = BOUNDS16rm
{ 310, 6, 1, 0, 715, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3100000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #310 = BOUNDS32rm
{ 311, 6, 1, 0, 689, 0|(1ULL<<MCID::MayLoad), 0x5e00004886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr }, // Inst #311 = BSF16rm
{ 312, 2, 1, 0, 688, 0, 0x5e00004885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #312 = BSF16rr
{ 313, 6, 1, 0, 689, 0|(1ULL<<MCID::MayLoad), 0x5e00004906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #313 = BSF32rm
{ 314, 2, 1, 0, 688, 0, 0x5e00004905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #314 = BSF32rr
{ 315, 6, 1, 0, 689, 0|(1ULL<<MCID::MayLoad), 0x5e00024806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #315 = BSF64rm
{ 316, 2, 1, 0, 688, 0, 0x5e00024805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #316 = BSF64rr
{ 317, 6, 1, 0, 689, 0|(1ULL<<MCID::MayLoad), 0x5e80004886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr }, // Inst #317 = BSR16rm
{ 318, 2, 1, 0, 688, 0, 0x5e80004885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #318 = BSR16rr
{ 319, 6, 1, 0, 689, 0|(1ULL<<MCID::MayLoad), 0x5e80004906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #319 = BSR32rm
{ 320, 2, 1, 0, 688, 0, 0x5e80004905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #320 = BSR32rr
{ 321, 6, 1, 0, 689, 0|(1ULL<<MCID::MayLoad), 0x5e80024806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #321 = BSR64rm
{ 322, 2, 1, 0, 688, 0, 0x5e80024805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #322 = BSR64rr
{ 323, 2, 1, 0, 606, 0, 0x6400004102ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr }, // Inst #323 = BSWAP32r
{ 324, 2, 1, 0, 607, 0, 0x6400024002ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr }, // Inst #324 = BSWAP64r
{ 325, 6, 0, 0, 682, 0|(1ULL<<MCID::MayLoad), 0x5d0004409cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #325 = BT16mi8
{ 326, 6, 0, 0, 681, 0|(1ULL<<MCID::MayLoad), 0x5180004084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #326 = BT16mr
{ 327, 2, 0, 0, 679, 0, 0x5d00044094ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr }, // Inst #327 = BT16ri8
{ 328, 2, 0, 0, 680, 0, 0x5180004083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #328 = BT16rr
{ 329, 6, 0, 0, 682, 0|(1ULL<<MCID::MayLoad), 0x5d0004411cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #329 = BT32mi8
{ 330, 6, 0, 0, 681, 0|(1ULL<<MCID::MayLoad), 0x5180004104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #330 = BT32mr
{ 331, 2, 0, 0, 679, 0, 0x5d00044114ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr }, // Inst #331 = BT32ri8
{ 332, 2, 0, 0, 680, 0, 0x5180004103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #332 = BT32rr
{ 333, 6, 0, 0, 682, 0|(1ULL<<MCID::MayLoad), 0x5d0006401cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #333 = BT64mi8
{ 334, 6, 0, 0, 681, 0|(1ULL<<MCID::MayLoad), 0x5180024004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #334 = BT64mr
{ 335, 2, 0, 0, 679, 0, 0x5d00064014ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr }, // Inst #335 = BT64ri8
{ 336, 2, 0, 0, 680, 0, 0x5180024003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #336 = BT64rr
{ 337, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004409fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #337 = BTC16mi8
{ 338, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80004084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #338 = BTC16mr
{ 339, 2, 0, 0, 683, 0, 0x5d00044097ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr }, // Inst #339 = BTC16ri8
{ 340, 2, 0, 0, 684, 0, 0x5d80004083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #340 = BTC16rr
{ 341, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004411fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #341 = BTC32mi8
{ 342, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80004104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #342 = BTC32mr
{ 343, 2, 0, 0, 683, 0, 0x5d00044117ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr }, // Inst #343 = BTC32ri8
{ 344, 2, 0, 0, 684, 0, 0x5d80004103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #344 = BTC32rr
{ 345, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0006401fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #345 = BTC64mi8
{ 346, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d80024004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #346 = BTC64mr
{ 347, 2, 0, 0, 683, 0, 0x5d00064017ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr }, // Inst #347 = BTC64ri8
{ 348, 2, 0, 0, 684, 0, 0x5d80024003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #348 = BTC64rr
{ 349, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004409eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #349 = BTR16mi8
{ 350, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980004084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #350 = BTR16mr
{ 351, 2, 0, 0, 683, 0, 0x5d00044096ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr }, // Inst #351 = BTR16ri8
{ 352, 2, 0, 0, 684, 0, 0x5980004083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #352 = BTR16rr
{ 353, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004411eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #353 = BTR32mi8
{ 354, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980004104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #354 = BTR32mr
{ 355, 2, 0, 0, 683, 0, 0x5d00044116ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr }, // Inst #355 = BTR32ri8
{ 356, 2, 0, 0, 684, 0, 0x5980004103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #356 = BTR32rr
{ 357, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0006401eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #357 = BTR64mi8
{ 358, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5980024004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #358 = BTR64mr
{ 359, 2, 0, 0, 683, 0, 0x5d00064016ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr }, // Inst #359 = BTR64ri8
{ 360, 2, 0, 0, 685, 0, 0x5980024003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #360 = BTR64rr
{ 361, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004409dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #361 = BTS16mi8
{ 362, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580004084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #362 = BTS16mr
{ 363, 2, 0, 0, 683, 0, 0x5d00044095ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr }, // Inst #363 = BTS16ri8
{ 364, 2, 0, 0, 684, 0, 0x5580004083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #364 = BTS16rr
{ 365, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0004411dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #365 = BTS32mi8
{ 366, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580004104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #366 = BTS32mr
{ 367, 2, 0, 0, 683, 0, 0x5d00044115ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr }, // Inst #367 = BTS32ri8
{ 368, 2, 0, 0, 684, 0, 0x5580004103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #368 = BTS32rr
{ 369, 6, 0, 0, 687, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5d0006401dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #369 = BTS64mi8
{ 370, 6, 0, 0, 686, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5580024004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #370 = BTS64mr
{ 371, 2, 0, 0, 683, 0, 0x5d00064015ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr }, // Inst #371 = BTS64ri8
{ 372, 2, 0, 0, 684, 0, 0x5580024003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #372 = BTS64rr
{ 373, 7, 1, 0, 703, 0|(1ULL<<MCID::MayLoad), 0x27aa0008806ULL, nullptr, ImplicitList6, OperandInfo64, -1 ,nullptr }, // Inst #373 = BZHI32rm
{ 374, 3, 1, 0, 702, 0, 0x27aa0008805ULL, nullptr, ImplicitList6, OperandInfo58, -1 ,nullptr }, // Inst #374 = BZHI32rr
{ 375, 7, 1, 0, 703, 0|(1ULL<<MCID::MayLoad), 0x2faa0008806ULL, nullptr, ImplicitList6, OperandInfo65, -1 ,nullptr }, // Inst #375 = BZHI64rm
{ 376, 3, 1, 0, 702, 0, 0x2faa0008805ULL, nullptr, ImplicitList6, OperandInfo60, -1 ,nullptr }, // Inst #376 = BZHI64rr
{ 377, 5, 0, 0, 711, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f8000009aULL, ImplicitList11, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #377 = CALL16m
{ 378, 1, 0, 0, 710, 0|(1ULL<<MCID::Call), 0x7f80000092ULL, ImplicitList11, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #378 = CALL16r
{ 379, 5, 0, 0, 711, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f8000011aULL, ImplicitList11, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #379 = CALL32m
{ 380, 1, 0, 0, 710, 0|(1ULL<<MCID::Call), 0x7f80000112ULL, ImplicitList11, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #380 = CALL32r
{ 381, 5, 0, 0, 55, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad), 0x7f8000001aULL, ImplicitList13, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #381 = CALL64m
{ 382, 1, 0, 0, 54, 0|(1ULL<<MCID::Call), 0x7400180101ULL, ImplicitList13, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #382 = CALL64pcrel32
{ 383, 1, 0, 0, 54, 0|(1ULL<<MCID::Call), 0x7f80000012ULL, ImplicitList13, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #383 = CALL64r
{ 384, 1, 0, 0, 54, 0|(1ULL<<MCID::Call), 0x7400100081ULL, ImplicitList11, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #384 = CALLpcrel16
{ 385, 1, 0, 0, 54, 0|(1ULL<<MCID::Call), 0x7400180101ULL, ImplicitList11, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #385 = CALLpcrel32
{ 386, 0, 0, 0, 56, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #386 = CATCHPAD
{ 387, 2, 0, 0, 56, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo86, -1 ,nullptr }, // Inst #387 = CATCHRET
{ 388, 0, 0, 0, 57, 0, 0x4c00000081ULL, ImplicitList4, ImplicitList3, nullptr, -1 ,nullptr }, // Inst #388 = CBW
{ 389, 0, 0, 0, 57, 0, 0x4c80000101ULL, ImplicitList9, ImplicitList16, nullptr, -1 ,nullptr }, // Inst #389 = CDQ
{ 390, 0, 0, 0, 57, 0, 0x4c00020001ULL, ImplicitList9, ImplicitList10, nullptr, -1 ,nullptr }, // Inst #390 = CDQE
{ 391, 0, 0, 0, 759, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000040ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #391 = CHS_F
{ 392, 2, 1, 0, 759, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr }, // Inst #392 = CHS_Fp32
{ 393, 2, 1, 0, 759, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr }, // Inst #393 = CHS_Fp64
{ 394, 2, 1, 0, 759, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr }, // Inst #394 = CHS_Fp80
{ 395, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000402aULL, nullptr, ImplicitList6, nullptr, -1 ,nullptr }, // Inst #395 = CLAC
{ 396, 0, 0, 0, 58, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #396 = CLC
{ 397, 0, 0, 0, 692, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7e00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #397 = CLD
{ 398, 0, 0, 0, 56, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #398 = CLEANUPRET
{ 399, 5, 0, 0, 60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000481fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #399 = CLFLUSH
{ 400, 5, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x570000501fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #400 = CLFLUSHOPT
{ 401, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403dULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #401 = CLGI
{ 402, 0, 0, 0, 61, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #402 = CLI
{ 403, 0, 0, 0, 62, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #403 = CLTS
{ 404, 5, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x570000501eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #404 = CLWB
{ 405, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000405cULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr }, // Inst #405 = CLZEROr
{ 406, 0, 0, 0, 63, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7a80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #406 = CMC
{ 407, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2380004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #407 = CMOVA16rm
{ 408, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2380004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #408 = CMOVA16rr
{ 409, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2380004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #409 = CMOVA32rm
{ 410, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2380004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #410 = CMOVA32rr
{ 411, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2380024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #411 = CMOVA64rm
{ 412, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2380024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #412 = CMOVA64rr
{ 413, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2180004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #413 = CMOVAE16rm
{ 414, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2180004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #414 = CMOVAE16rr
{ 415, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2180004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #415 = CMOVAE32rm
{ 416, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2180004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #416 = CMOVAE32rr
{ 417, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2180024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #417 = CMOVAE64rm
{ 418, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2180024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #418 = CMOVAE64rr
{ 419, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2100004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #419 = CMOVB16rm
{ 420, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2100004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #420 = CMOVB16rr
{ 421, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2100004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #421 = CMOVB32rm
{ 422, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2100004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #422 = CMOVB32rr
{ 423, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2100024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #423 = CMOVB64rm
{ 424, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2100024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #424 = CMOVB64rr
{ 425, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2300004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #425 = CMOVBE16rm
{ 426, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2300004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #426 = CMOVBE16rr
{ 427, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2300004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #427 = CMOVBE32rm
{ 428, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2300004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #428 = CMOVBE32rr
{ 429, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2300024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #429 = CMOVBE64rm
{ 430, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2300024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #430 = CMOVBE64rr
{ 431, 1, 0, 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000012ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #431 = CMOVBE_F
{ 432, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr }, // Inst #432 = CMOVBE_Fp32
{ 433, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr }, // Inst #433 = CMOVBE_Fp64
{ 434, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr }, // Inst #434 = CMOVBE_Fp80
{ 435, 1, 0, 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000010ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #435 = CMOVB_F
{ 436, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr }, // Inst #436 = CMOVB_Fp32
{ 437, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr }, // Inst #437 = CMOVB_Fp64
{ 438, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr }, // Inst #438 = CMOVB_Fp80
{ 439, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2200004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #439 = CMOVE16rm
{ 440, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2200004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #440 = CMOVE16rr
{ 441, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2200004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #441 = CMOVE32rm
{ 442, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2200004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #442 = CMOVE32rr
{ 443, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2200024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #443 = CMOVE64rm
{ 444, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2200024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #444 = CMOVE64rr
{ 445, 1, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000011ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #445 = CMOVE_F
{ 446, 3, 1, 0, 0, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr }, // Inst #446 = CMOVE_Fp32
{ 447, 3, 1, 0, 0, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr }, // Inst #447 = CMOVE_Fp64
{ 448, 3, 1, 0, 0, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr }, // Inst #448 = CMOVE_Fp80
{ 449, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2780004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #449 = CMOVG16rm
{ 450, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2780004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #450 = CMOVG16rr
{ 451, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2780004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #451 = CMOVG32rm
{ 452, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2780004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #452 = CMOVG32rr
{ 453, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2780024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #453 = CMOVG64rm
{ 454, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2780024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #454 = CMOVG64rr
{ 455, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2680004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #455 = CMOVGE16rm
{ 456, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2680004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #456 = CMOVGE16rr
{ 457, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2680004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #457 = CMOVGE32rm
{ 458, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2680004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #458 = CMOVGE32rr
{ 459, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2680024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #459 = CMOVGE64rm
{ 460, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2680024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #460 = CMOVGE64rr
{ 461, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2600004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #461 = CMOVL16rm
{ 462, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2600004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #462 = CMOVL16rr
{ 463, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2600004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #463 = CMOVL32rm
{ 464, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2600004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #464 = CMOVL32rr
{ 465, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2600024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #465 = CMOVL64rm
{ 466, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2600024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #466 = CMOVL64rr
{ 467, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2700004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #467 = CMOVLE16rm
{ 468, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2700004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #468 = CMOVLE16rr
{ 469, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2700004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #469 = CMOVLE32rm
{ 470, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2700004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #470 = CMOVLE32rr
{ 471, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2700024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #471 = CMOVLE64rm
{ 472, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2700024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #472 = CMOVLE64rr
{ 473, 1, 0, 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000012ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #473 = CMOVNBE_F
{ 474, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr }, // Inst #474 = CMOVNBE_Fp32
{ 475, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr }, // Inst #475 = CMOVNBE_Fp64
{ 476, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr }, // Inst #476 = CMOVNBE_Fp80
{ 477, 1, 0, 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000010ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #477 = CMOVNB_F
{ 478, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr }, // Inst #478 = CMOVNB_Fp32
{ 479, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr }, // Inst #479 = CMOVNB_Fp64
{ 480, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr }, // Inst #480 = CMOVNB_Fp80
{ 481, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2280004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #481 = CMOVNE16rm
{ 482, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2280004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #482 = CMOVNE16rr
{ 483, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2280004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #483 = CMOVNE32rm
{ 484, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2280004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #484 = CMOVNE32rr
{ 485, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2280024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #485 = CMOVNE64rm
{ 486, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2280024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #486 = CMOVNE64rr
{ 487, 1, 0, 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000011ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #487 = CMOVNE_F
{ 488, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr }, // Inst #488 = CMOVNE_Fp32
{ 489, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr }, // Inst #489 = CMOVNE_Fp64
{ 490, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr }, // Inst #490 = CMOVNE_Fp80
{ 491, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2080004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #491 = CMOVNO16rm
{ 492, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2080004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #492 = CMOVNO16rr
{ 493, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2080004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #493 = CMOVNO32rm
{ 494, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2080004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #494 = CMOVNO32rr
{ 495, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2080024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #495 = CMOVNO64rm
{ 496, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2080024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #496 = CMOVNO64rr
{ 497, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2580004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #497 = CMOVNP16rm
{ 498, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2580004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #498 = CMOVNP16rr
{ 499, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2580004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #499 = CMOVNP32rm
{ 500, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2580004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #500 = CMOVNP32rr
{ 501, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2580024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #501 = CMOVNP64rm
{ 502, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2580024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #502 = CMOVNP64rr
{ 503, 1, 0, 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000013ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #503 = CMOVNP_F
{ 504, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr }, // Inst #504 = CMOVNP_Fp32
{ 505, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr }, // Inst #505 = CMOVNP_Fp64
{ 506, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr }, // Inst #506 = CMOVNP_Fp80
{ 507, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2480004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #507 = CMOVNS16rm
{ 508, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2480004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #508 = CMOVNS16rr
{ 509, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2480004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #509 = CMOVNS32rm
{ 510, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2480004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #510 = CMOVNS32rr
{ 511, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2480024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #511 = CMOVNS64rm
{ 512, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2480024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #512 = CMOVNS64rr
{ 513, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2000004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #513 = CMOVO16rm
{ 514, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2000004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #514 = CMOVO16rr
{ 515, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2000004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #515 = CMOVO32rm
{ 516, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2000004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #516 = CMOVO32rr
{ 517, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2000024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #517 = CMOVO64rm
{ 518, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2000024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #518 = CMOVO64rr
{ 519, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2500004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #519 = CMOVP16rm
{ 520, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2500004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #520 = CMOVP16rr
{ 521, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2500004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #521 = CMOVP32rm
{ 522, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2500004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #522 = CMOVP32rr
{ 523, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2500024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #523 = CMOVP64rm
{ 524, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2500024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #524 = CMOVP64rr
{ 525, 1, 0, 0, 749, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000013ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #525 = CMOVP_F
{ 526, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo87, -1 ,nullptr }, // Inst #526 = CMOVP_Fp32
{ 527, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo88, -1 ,nullptr }, // Inst #527 = CMOVP_Fp64
{ 528, 3, 1, 0, 749, 0, 0x1800000ULL, ImplicitList6, ImplicitList5, OperandInfo89, -1 ,nullptr }, // Inst #528 = CMOVP_Fp80
{ 529, 7, 1, 0, 593, 0|(1ULL<<MCID::MayLoad), 0x2400004086ULL, ImplicitList6, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #529 = CMOVS16rm
{ 530, 3, 1, 0, 591, 0|(1ULL<<MCID::Commutable), 0x2400004085ULL, ImplicitList6, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #530 = CMOVS16rr
{ 531, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2400004106ULL, ImplicitList6, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #531 = CMOVS32rm
{ 532, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2400004105ULL, ImplicitList6, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #532 = CMOVS32rr
{ 533, 7, 1, 0, 594, 0|(1ULL<<MCID::MayLoad), 0x2400024006ULL, ImplicitList6, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #533 = CMOVS64rm
{ 534, 3, 1, 0, 592, 0|(1ULL<<MCID::Commutable), 0x2400024005ULL, ImplicitList6, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #534 = CMOVS64rr
{ 535, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo90, -1 ,nullptr }, // Inst #535 = CMOV_FR128
{ 536, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #536 = CMOV_FR32
{ 537, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #537 = CMOV_FR64
{ 538, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo93, -1 ,nullptr }, // Inst #538 = CMOV_GR16
{ 539, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo94, -1 ,nullptr }, // Inst #539 = CMOV_GR32
{ 540, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo95, -1 ,nullptr }, // Inst #540 = CMOV_GR8
{ 541, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo96, -1 ,nullptr }, // Inst #541 = CMOV_RFP32
{ 542, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo97, -1 ,nullptr }, // Inst #542 = CMOV_RFP64
{ 543, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo98, -1 ,nullptr }, // Inst #543 = CMOV_RFP80
{ 544, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #544 = CMOV_V16F32
{ 545, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo100, -1 ,nullptr }, // Inst #545 = CMOV_V16I1
{ 546, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #546 = CMOV_V2F64
{ 547, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #547 = CMOV_V2I64
{ 548, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo102, -1 ,nullptr }, // Inst #548 = CMOV_V32I1
{ 549, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #549 = CMOV_V4F32
{ 550, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #550 = CMOV_V4F64
{ 551, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #551 = CMOV_V4I64
{ 552, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo104, -1 ,nullptr }, // Inst #552 = CMOV_V64I1
{ 553, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #553 = CMOV_V8F32
{ 554, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #554 = CMOV_V8F64
{ 555, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo105, -1 ,nullptr }, // Inst #555 = CMOV_V8I1
{ 556, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList6, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #556 = CMOV_V8I64
{ 557, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1e800c0081ULL, ImplicitList3, ImplicitList6, OperandInfo2, -1 ,nullptr }, // Inst #557 = CMP16i16
{ 558, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x40800c009fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #558 = CMP16mi
{ 559, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x418004009fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #559 = CMP16mi8
{ 560, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #560 = CMP16mr
{ 561, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x40800c0097ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr }, // Inst #561 = CMP16ri
{ 562, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x4180040097ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr }, // Inst #562 = CMP16ri8
{ 563, 6, 0, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80000086ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr }, // Inst #563 = CMP16rm
{ 564, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1c80000083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #564 = CMP16rr
{ 565, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1d80000085ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #565 = CMP16rr_REV
{ 566, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1e80140101ULL, ImplicitList9, ImplicitList6, OperandInfo2, -1 ,nullptr }, // Inst #566 = CMP32i32
{ 567, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x408014011fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #567 = CMP32mi
{ 568, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x418004011fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #568 = CMP32mi8
{ 569, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #569 = CMP32mr
{ 570, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x4080140117ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr }, // Inst #570 = CMP32ri
{ 571, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x4180040117ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr }, // Inst #571 = CMP32ri8
{ 572, 6, 0, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80000106ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #572 = CMP32rm
{ 573, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1c80000103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #573 = CMP32rr
{ 574, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1d80000105ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #574 = CMP32rr_REV
{ 575, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1e801e0001ULL, ImplicitList10, ImplicitList6, OperandInfo2, -1 ,nullptr }, // Inst #575 = CMP64i32
{ 576, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x40801e001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #576 = CMP64mi32
{ 577, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x418006001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #577 = CMP64mi8
{ 578, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c80020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #578 = CMP64mr
{ 579, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x40801e0017ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr }, // Inst #579 = CMP64ri32
{ 580, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x4180060017ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr }, // Inst #580 = CMP64ri8
{ 581, 6, 0, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d80020006ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #581 = CMP64rm
{ 582, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1c80020003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #582 = CMP64rr
{ 583, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1d80020005ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #583 = CMP64rr_REV
{ 584, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1e00040001ULL, ImplicitList4, ImplicitList6, OperandInfo2, -1 ,nullptr }, // Inst #584 = CMP8i8
{ 585, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x400004001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #585 = CMP8mi
{ 586, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x410004001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #586 = CMP8mi8
{ 587, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1c00000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #587 = CMP8mr
{ 588, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x4000040017ULL, nullptr, ImplicitList6, OperandInfo106, -1 ,nullptr }, // Inst #588 = CMP8ri
{ 589, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x4100040017ULL, nullptr, ImplicitList6, OperandInfo106, -1 ,nullptr }, // Inst #589 = CMP8ri8
{ 590, 6, 0, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1d00000006ULL, nullptr, ImplicitList6, OperandInfo19, -1 ,nullptr }, // Inst #590 = CMP8rm
{ 591, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1c00000003ULL, nullptr, ImplicitList6, OperandInfo107, -1 ,nullptr }, // Inst #591 = CMP8rr
{ 592, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1d00000005ULL, nullptr, ImplicitList6, OperandInfo107, -1 ,nullptr }, // Inst #592 = CMP8rr_REV
{ 593, 8, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x6110045006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #593 = CMPPDrmi
{ 594, 8, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x6110045006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #594 = CMPPDrmi_alt
{ 595, 4, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x6110045005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #595 = CMPPDrri
{ 596, 4, 1, 0, 14, 0, 0x6110045005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #596 = CMPPDrri_alt
{ 597, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x6108044806ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #597 = CMPPSrmi
{ 598, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x6108044806ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #598 = CMPPSrmi_alt
{ 599, 4, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x6108044805ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #599 = CMPPSrri
{ 600, 4, 1, 0, 16, 0, 0x6108044805ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #600 = CMPPSrri_alt
{ 601, 3, 0, 0, 724, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x530000000aULL, ImplicitList17, ImplicitList17, OperandInfo108, -1 ,nullptr }, // Inst #601 = CMPSB
{ 602, 8, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x6100046006ULL, nullptr, nullptr, OperandInfo109, -1 ,nullptr }, // Inst #602 = CMPSDrm
{ 603, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x6100046006ULL, nullptr, nullptr, OperandInfo109, -1 ,nullptr }, // Inst #603 = CMPSDrm_alt
{ 604, 4, 1, 0, 18, 0, 0x6100046005ULL, nullptr, nullptr, OperandInfo110, -1 ,nullptr }, // Inst #604 = CMPSDrr
{ 605, 4, 1, 0, 20, 0, 0x6100046005ULL, nullptr, nullptr, OperandInfo110, -1 ,nullptr }, // Inst #605 = CMPSDrr_alt
{ 606, 3, 0, 0, 724, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x538000010aULL, ImplicitList17, ImplicitList17, OperandInfo108, -1 ,nullptr }, // Inst #606 = CMPSL
{ 607, 3, 0, 0, 724, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x538002000aULL, ImplicitList17, ImplicitList17, OperandInfo108, -1 ,nullptr }, // Inst #607 = CMPSQ
{ 608, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x6100045806ULL, nullptr, nullptr, OperandInfo111, -1 ,nullptr }, // Inst #608 = CMPSSrm
{ 609, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x6100045806ULL, nullptr, nullptr, OperandInfo111, -1 ,nullptr }, // Inst #609 = CMPSSrm_alt
{ 610, 4, 1, 0, 20, 0, 0x6100045805ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr }, // Inst #610 = CMPSSrr
{ 611, 4, 1, 0, 20, 0, 0x6100045805ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr }, // Inst #611 = CMPSSrr_alt
{ 612, 3, 0, 0, 724, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x538000008aULL, ImplicitList17, ImplicitList17, OperandInfo108, -1 ,nullptr }, // Inst #612 = CMPSW
{ 613, 5, 0, 0, 729, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380024019ULL, ImplicitList18, ImplicitList19, OperandInfo43, -1 ,nullptr }, // Inst #613 = CMPXCHG16B
{ 614, 6, 0, 0, 726, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5880004084ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, // Inst #614 = CMPXCHG16rm
{ 615, 2, 1, 0, 71, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5880004083ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #615 = CMPXCHG16rr
{ 616, 6, 0, 0, 726, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5880004104ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, // Inst #616 = CMPXCHG32rm
{ 617, 2, 1, 0, 71, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5880004103ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #617 = CMPXCHG32rr
{ 618, 6, 0, 0, 726, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5880024004ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #618 = CMPXCHG64rm
{ 619, 2, 1, 0, 71, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5880024003ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #619 = CMPXCHG64rr
{ 620, 5, 0, 0, 728, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004019ULL, ImplicitList20, ImplicitList21, OperandInfo43, -1 ,nullptr }, // Inst #620 = CMPXCHG8B
{ 621, 6, 0, 0, 727, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5800004004ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #621 = CMPXCHG8rm
{ 622, 2, 1, 0, 74, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5800004003ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr }, // Inst #622 = CMPXCHG8rr
{ 623, 6, 0, 0, 75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1780005006ULL, nullptr, ImplicitList6, OperandInfo113, -1 ,nullptr }, // Inst #623 = COMISDrm
{ 624, 2, 0, 0, 76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1780005005ULL, nullptr, ImplicitList6, OperandInfo114, -1 ,nullptr }, // Inst #624 = COMISDrr
{ 625, 6, 0, 0, 75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1780004806ULL, nullptr, ImplicitList6, OperandInfo115, -1 ,nullptr }, // Inst #625 = COMISSrm
{ 626, 2, 0, 0, 76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1780004805ULL, nullptr, ImplicitList6, OperandInfo116, -1 ,nullptr }, // Inst #626 = COMISSrr
{ 627, 1, 0, 0, 760, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000013ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #627 = COMP_FST0r
{ 628, 1, 0, 0, 765, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000016ULL, nullptr, ImplicitList22, OperandInfo44, -1 ,nullptr }, // Inst #628 = COM_FIPr
{ 629, 1, 0, 0, 765, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000016ULL, nullptr, ImplicitList22, OperandInfo44, -1 ,nullptr }, // Inst #629 = COM_FIr
{ 630, 1, 0, 0, 760, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000012ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #630 = COM_FST0r
{ 631, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005fULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #631 = COS_F
{ 632, 2, 1, 0, 0, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr }, // Inst #632 = COS_Fp32
{ 633, 2, 1, 0, 0, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr }, // Inst #633 = COS_Fp64
{ 634, 2, 1, 0, 0, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr }, // Inst #634 = COS_Fp80
{ 635, 0, 0, 0, 78, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5100004001ULL, ImplicitList23, ImplicitList20, nullptr, -1 ,nullptr }, // Inst #635 = CPUID
{ 636, 0, 0, 0, 57, 0, 0x4c80020001ULL, ImplicitList10, ImplicitList24, nullptr, -1 ,nullptr }, // Inst #636 = CQO
{ 637, 7, 1, 0, 79, 0|(1ULL<<MCID::MayLoad), 0x788000a086ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #637 = CRC32r32m16
{ 638, 7, 1, 0, 79, 0|(1ULL<<MCID::MayLoad), 0x788000a106ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #638 = CRC32r32m32
{ 639, 7, 1, 0, 79, 0|(1ULL<<MCID::MayLoad), 0x780000a006ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #639 = CRC32r32m8
{ 640, 3, 1, 0, 80, 0, 0x788000a085ULL, nullptr, nullptr, OperandInfo117, -1 ,nullptr }, // Inst #640 = CRC32r32r16
{ 641, 3, 1, 0, 80, 0, 0x788000a105ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #641 = CRC32r32r32
{ 642, 3, 1, 0, 80, 0, 0x780000a005ULL, nullptr, nullptr, OperandInfo118, -1 ,nullptr }, // Inst #642 = CRC32r32r8
{ 643, 7, 1, 0, 79, 0|(1ULL<<MCID::MayLoad), 0x788002a006ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #643 = CRC32r64m64
{ 644, 7, 1, 0, 79, 0|(1ULL<<MCID::MayLoad), 0x780002a006ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #644 = CRC32r64m8
{ 645, 3, 1, 0, 80, 0, 0x788002a005ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #645 = CRC32r64r64
{ 646, 3, 1, 0, 80, 0, 0x780002a005ULL, nullptr, nullptr, OperandInfo119, -1 ,nullptr }, // Inst #646 = CRC32r64r8
{ 647, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1700000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #647 = CS_PREFIX
{ 648, 6, 1, 0, 81, 0|(1ULL<<MCID::MayLoad), 0x7300005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #648 = CVTDQ2PDrm
{ 649, 2, 1, 0, 878, 0, 0x7300005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #649 = CVTDQ2PDrr
{ 650, 6, 1, 0, 83, 0|(1ULL<<MCID::MayLoad), 0x2d88004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #650 = CVTDQ2PSrm
{ 651, 2, 1, 0, 84, 0, 0x2d88004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #651 = CVTDQ2PSrr
{ 652, 6, 1, 0, 883, 0|(1ULL<<MCID::MayLoad), 0x7300006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #652 = CVTPD2DQrm
{ 653, 2, 1, 0, 881, 0, 0x7300006005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #653 = CVTPD2DQrr
{ 654, 6, 1, 0, 866, 0|(1ULL<<MCID::MayLoad), 0x2d10005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #654 = CVTPD2PSrm
{ 655, 2, 1, 0, 865, 0, 0x2d10005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #655 = CVTPD2PSrr
{ 656, 6, 1, 0, 89, 0|(1ULL<<MCID::MayLoad), 0x2d90005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #656 = CVTPS2DQrm
{ 657, 2, 1, 0, 90, 0, 0x2d90005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #657 = CVTPS2DQrr
{ 658, 6, 1, 0, 873, 0|(1ULL<<MCID::MayLoad), 0x2d00004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #658 = CVTPS2PDrm
{ 659, 2, 1, 0, 872, 0, 0x2d00004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #659 = CVTPS2PDrr
{ 660, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1680026006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #660 = CVTSD2SI64rm
{ 661, 2, 1, 0, 897, 0, 0x1680026005ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #661 = CVTSD2SI64rr
{ 662, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1680006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #662 = CVTSD2SIrm
{ 663, 2, 1, 0, 897, 0, 0x1680006005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #663 = CVTSD2SIrr
{ 664, 6, 1, 0, 870, 0|(1ULL<<MCID::MayLoad), 0x2d00006006ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #664 = CVTSD2SSrm
{ 665, 2, 1, 0, 869, 0, 0x2d00006005ULL, nullptr, nullptr, OperandInfo122, -1 ,nullptr }, // Inst #665 = CVTSD2SSrr
{ 666, 6, 1, 0, 95, 0|(1ULL<<MCID::MayLoad), 0x1500026006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #666 = CVTSI2SD64rm
{ 667, 2, 1, 0, 96, 0, 0x1500026005ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr }, // Inst #667 = CVTSI2SD64rr
{ 668, 6, 1, 0, 95, 0|(1ULL<<MCID::MayLoad), 0x1500006006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #668 = CVTSI2SDrm
{ 669, 2, 1, 0, 96, 0, 0x1500006005ULL, nullptr, nullptr, OperandInfo124, -1 ,nullptr }, // Inst #669 = CVTSI2SDrr
{ 670, 6, 1, 0, 95, 0|(1ULL<<MCID::MayLoad), 0x1500025806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #670 = CVTSI2SS64rm
{ 671, 2, 1, 0, 891, 0, 0x1500025805ULL, nullptr, nullptr, OperandInfo125, -1 ,nullptr }, // Inst #671 = CVTSI2SS64rr
{ 672, 6, 1, 0, 95, 0|(1ULL<<MCID::MayLoad), 0x1500005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #672 = CVTSI2SSrm
{ 673, 2, 1, 0, 891, 0, 0x1500005805ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr }, // Inst #673 = CVTSI2SSrr
{ 674, 6, 1, 0, 876, 0|(1ULL<<MCID::MayLoad), 0x2d00005806ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #674 = CVTSS2SDrm
{ 675, 2, 1, 0, 875, 0, 0x2d00005805ULL, nullptr, nullptr, OperandInfo127, -1 ,nullptr }, // Inst #675 = CVTSS2SDrr
{ 676, 6, 1, 0, 895, 0|(1ULL<<MCID::MayLoad), 0x1680025806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #676 = CVTSS2SI64rm
{ 677, 2, 1, 0, 893, 0, 0x1680025805ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #677 = CVTSS2SI64rr
{ 678, 6, 1, 0, 896, 0|(1ULL<<MCID::MayLoad), 0x1680005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #678 = CVTSS2SIrm
{ 679, 2, 1, 0, 894, 0, 0x1680005805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #679 = CVTSS2SIrr
{ 680, 6, 1, 0, 883, 0|(1ULL<<MCID::MayLoad), 0x7310005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #680 = CVTTPD2DQrm
{ 681, 2, 1, 0, 881, 0, 0x7310005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #681 = CVTTPD2DQrr
{ 682, 6, 1, 0, 89, 0|(1ULL<<MCID::MayLoad), 0x2d80005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #682 = CVTTPS2DQrm
{ 683, 2, 1, 0, 90, 0, 0x2d80005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #683 = CVTTPS2DQrr
{ 684, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1600026006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #684 = CVTTSD2SI64rm
{ 685, 2, 1, 0, 897, 0, 0x1600026005ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr }, // Inst #685 = CVTTSD2SI64rr
{ 686, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1600006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #686 = CVTTSD2SIrm
{ 687, 2, 1, 0, 897, 0, 0x1600006005ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr }, // Inst #687 = CVTTSD2SIrr
{ 688, 6, 1, 0, 895, 0|(1ULL<<MCID::MayLoad), 0x1600025806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #688 = CVTTSS2SI64rm
{ 689, 2, 1, 0, 893, 0, 0x1600025805ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr }, // Inst #689 = CVTTSS2SI64rr
{ 690, 6, 1, 0, 896, 0|(1ULL<<MCID::MayLoad), 0x1600005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #690 = CVTTSS2SIrm
{ 691, 2, 1, 0, 894, 0, 0x1600005805ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr }, // Inst #691 = CVTTSS2SIrr
{ 692, 0, 0, 0, 57, 0, 0x4c80000081ULL, ImplicitList3, ImplicitList25, nullptr, -1 ,nullptr }, // Inst #692 = CWD
{ 693, 0, 0, 0, 57, 0, 0x4c00000101ULL, ImplicitList3, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #693 = CWDE
{ 694, 0, 0, 0, 101, 0, 0x1380000001ULL, ImplicitList1, ImplicitList1, nullptr, -1 ,nullptr }, // Inst #694 = DAA
{ 695, 0, 0, 0, 102, 0, 0x1780000001ULL, ImplicitList1, ImplicitList1, nullptr, -1 ,nullptr }, // Inst #695 = DAS
{ 696, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3300000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #696 = DATA16_PREFIX
{ 697, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000099ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #697 = DEC16m
{ 698, 2, 1, 0, 104, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000091ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #698 = DEC16r
{ 699, 2, 1, 0, 104, 0, 0x2400000082ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #699 = DEC16r_alt
{ 700, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000119ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #700 = DEC32m
{ 701, 2, 1, 0, 104, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000111ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #701 = DEC32r
{ 702, 2, 1, 0, 104, 0, 0x2400000102ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #702 = DEC32r_alt
{ 703, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80020019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #703 = DEC64m
{ 704, 2, 1, 0, 104, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80020011ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #704 = DEC64r
{ 705, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f00000019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #705 = DEC8m
{ 706, 2, 1, 0, 104, 0, 0x7f00000011ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #706 = DEC8r
{ 707, 5, 0, 0, 105, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8000009eULL, ImplicitList25, ImplicitList26, OperandInfo43, -1 ,nullptr }, // Inst #707 = DIV16m
{ 708, 1, 0, 0, 644, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000096ULL, ImplicitList25, ImplicitList26, OperandInfo82, -1 ,nullptr }, // Inst #708 = DIV16r
{ 709, 5, 0, 0, 107, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8000011eULL, ImplicitList16, ImplicitList21, OperandInfo43, -1 ,nullptr }, // Inst #709 = DIV32m
{ 710, 1, 0, 0, 645, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000116ULL, ImplicitList16, ImplicitList21, OperandInfo83, -1 ,nullptr }, // Inst #710 = DIV32r
{ 711, 5, 0, 0, 109, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8002001eULL, ImplicitList24, ImplicitList19, OperandInfo43, -1 ,nullptr }, // Inst #711 = DIV64m
{ 712, 1, 0, 0, 646, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020016ULL, ImplicitList24, ImplicitList19, OperandInfo85, -1 ,nullptr }, // Inst #712 = DIV64r
{ 713, 5, 0, 0, 111, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b0000001eULL, ImplicitList3, ImplicitList27, OperandInfo43, -1 ,nullptr }, // Inst #713 = DIV8m
{ 714, 1, 0, 0, 643, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000016ULL, ImplicitList3, ImplicitList27, OperandInfo134, -1 ,nullptr }, // Inst #714 = DIV8r
{ 715, 7, 1, 0, 113, 0|(1ULL<<MCID::MayLoad), 0x2f10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #715 = DIVPDrm
{ 716, 3, 1, 0, 114, 0, 0x2f10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #716 = DIVPDrr
{ 717, 7, 1, 0, 113, 0|(1ULL<<MCID::MayLoad), 0x2f08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #717 = DIVPSrm
{ 718, 3, 1, 0, 115, 0, 0x2f08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #718 = DIVPSrr
{ 719, 5, 0, 0, 116, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #719 = DIVR_F32m
{ 720, 5, 0, 0, 116, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #720 = DIVR_F64m
{ 721, 5, 0, 0, 116, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #721 = DIVR_FI16m
{ 722, 5, 0, 0, 116, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #722 = DIVR_FI32m
{ 723, 1, 0, 0, 117, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000016ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #723 = DIVR_FPrST0
{ 724, 1, 0, 0, 117, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000017ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #724 = DIVR_FST0r
{ 725, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #725 = DIVR_Fp32m
{ 726, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #726 = DIVR_Fp64m
{ 727, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #727 = DIVR_Fp64m32
{ 728, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #728 = DIVR_Fp80m32
{ 729, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #729 = DIVR_Fp80m64
{ 730, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #730 = DIVR_FpI16m32
{ 731, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #731 = DIVR_FpI16m64
{ 732, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #732 = DIVR_FpI16m80
{ 733, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #733 = DIVR_FpI32m32
{ 734, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #734 = DIVR_FpI32m64
{ 735, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #735 = DIVR_FpI32m80
{ 736, 1, 0, 0, 117, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000016ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #736 = DIVR_FrST0
{ 737, 7, 1, 0, 118, 0|(1ULL<<MCID::MayLoad), 0x2f10006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #737 = DIVSDrm
{ 738, 7, 1, 0, 118, 0|(1ULL<<MCID::MayLoad), 0x2f10006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #738 = DIVSDrm_Int
{ 739, 3, 1, 0, 119, 0, 0x2f10006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #739 = DIVSDrr
{ 740, 3, 1, 0, 119, 0, 0x2f10006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #740 = DIVSDrr_Int
{ 741, 7, 1, 0, 118, 0|(1ULL<<MCID::MayLoad), 0x2f08005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #741 = DIVSSrm
{ 742, 7, 1, 0, 118, 0|(1ULL<<MCID::MayLoad), 0x2f08005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #742 = DIVSSrm_Int
{ 743, 3, 1, 0, 120, 0, 0x2f08005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #743 = DIVSSrr
{ 744, 3, 1, 0, 120, 0, 0x2f08005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #744 = DIVSSrr_Int
{ 745, 5, 0, 0, 116, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001eULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #745 = DIV_F32m
{ 746, 5, 0, 0, 116, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001eULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #746 = DIV_F64m
{ 747, 5, 0, 0, 116, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001eULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #747 = DIV_FI16m
{ 748, 5, 0, 0, 116, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001eULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #748 = DIV_FI32m
{ 749, 1, 0, 0, 117, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000017ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #749 = DIV_FPrST0
{ 750, 1, 0, 0, 117, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000016ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #750 = DIV_FST0r
{ 751, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo45, -1 ,nullptr }, // Inst #751 = DIV_Fp32
{ 752, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #752 = DIV_Fp32m
{ 753, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo47, -1 ,nullptr }, // Inst #753 = DIV_Fp64
{ 754, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #754 = DIV_Fp64m
{ 755, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #755 = DIV_Fp64m32
{ 756, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr }, // Inst #756 = DIV_Fp80
{ 757, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #757 = DIV_Fp80m32
{ 758, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #758 = DIV_Fp80m64
{ 759, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #759 = DIV_FpI16m32
{ 760, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #760 = DIV_FpI16m64
{ 761, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #761 = DIV_FpI16m80
{ 762, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #762 = DIV_FpI32m32
{ 763, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #763 = DIV_FpI32m64
{ 764, 7, 1, 0, 116, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #764 = DIV_FpI32m80
{ 765, 1, 0, 0, 117, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000017ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #765 = DIV_FrST0
{ 766, 8, 1, 0, 925, 0|(1ULL<<MCID::MayLoad), 0x209004d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #766 = DPPDrmi
{ 767, 4, 1, 0, 923, 0|(1ULL<<MCID::Commutable), 0x209004d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #767 = DPPDrri
{ 768, 8, 1, 0, 922, 0|(1ULL<<MCID::MayLoad), 0x200804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #768 = DPPSrmi
{ 769, 4, 1, 0, 921, 0|(1ULL<<MCID::Commutable), 0x200804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #769 = DPPSrri
{ 770, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1f00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #770 = DS_PREFIX
{ 771, 0, 0, 0, 56, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #771 = EH_RESTORE
{ 772, 1, 0, 0, 124, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x6180000001ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #772 = EH_RETURN
{ 773, 1, 0, 0, 124, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x6180000001ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #773 = EH_RETURN64
{ 774, 5, 0, 0, 56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #774 = EH_SjLj_LongJmp32
{ 775, 5, 0, 0, 56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #775 = EH_SjLj_LongJmp64
{ 776, 6, 1, 0, 56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #776 = EH_SjLj_SetJmp32
{ 777, 6, 1, 0, 56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #777 = EH_SjLj_SetJmp64
{ 778, 1, 0, 0, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #778 = EH_SjLj_Setup
{ 779, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000402fULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #779 = ENCLS
{ 780, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004037ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #780 = ENCLU
{ 781, 2, 0, 0, 125, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x64000c000bULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #781 = ENTER
{ 782, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1300000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #782 = ES_PREFIX
{ 783, 7, 0, 0, 848, 0|(1ULL<<MCID::MayStore), 0xb8804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #783 = EXTRACTPSmr
{ 784, 3, 1, 0, 846, 0, 0xb8804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #784 = EXTRACTPSrr
{ 785, 3, 1, 0, 0, 0, 0x3c80005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #785 = EXTRQ
{ 786, 4, 1, 0, 0, 0, 0x3c0004500eULL, nullptr, nullptr, OperandInfo137, -1 ,nullptr }, // Inst #786 = EXTRQI
{ 787, 0, 0, 0, 128, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000050ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #787 = F2XM1
{ 788, 2, 0, 0, 129, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x4d000c008cULL, ImplicitList11, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #788 = FARCALL16i
{ 789, 5, 0, 0, 130, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000009bULL, ImplicitList11, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #789 = FARCALL16m
{ 790, 2, 0, 0, 129, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x4d0014010cULL, ImplicitList11, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #790 = FARCALL32i
{ 791, 5, 0, 0, 130, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000011bULL, ImplicitList11, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #791 = FARCALL32m
{ 792, 5, 0, 0, 131, 0|(1ULL<<MCID::Call)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8002001bULL, ImplicitList13, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #792 = FARCALL64
{ 793, 2, 0, 0, 132, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x75000c008cULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #793 = FARJMP16i
{ 794, 5, 0, 0, 133, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000009dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #794 = FARJMP16m
{ 795, 2, 0, 0, 132, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x750014010cULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #795 = FARJMP32i
{ 796, 5, 0, 0, 133, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000011dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #796 = FARJMP32m
{ 797, 5, 0, 0, 134, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8002001dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #797 = FARJMP64
{ 798, 5, 0, 0, 739, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #798 = FBLDm
{ 799, 5, 1, 0, 742, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #799 = FBSTPm
{ 800, 5, 0, 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #800 = FCOM32m
{ 801, 5, 0, 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #801 = FCOM64m
{ 802, 5, 0, 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #802 = FCOMP32m
{ 803, 5, 0, 0, 762, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #803 = FCOMP64m
{ 804, 0, 0, 0, 763, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000039ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #804 = FCOMPP
{ 805, 0, 0, 0, 754, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000056ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #805 = FDECSTP
{ 806, 0, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x700004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #806 = FEMMS
{ 807, 1, 0, 0, 755, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #807 = FFREE
{ 808, 5, 0, 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #808 = FICOM16m
{ 809, 5, 0, 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #809 = FICOM32m
{ 810, 5, 0, 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #810 = FICOMP16m
{ 811, 5, 0, 0, 767, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #811 = FICOMP32m
{ 812, 0, 0, 0, 754, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000057ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #812 = FINCSTP
{ 813, 5, 0, 0, 752, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #813 = FLDCW16m
{ 814, 5, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #814 = FLDENVm
{ 815, 0, 0, 0, 139, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004aULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #815 = FLDL2E
{ 816, 0, 0, 0, 139, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000049ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #816 = FLDL2T
{ 817, 0, 0, 0, 139, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004cULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #817 = FLDLG2
{ 818, 0, 0, 0, 139, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004dULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #818 = FLDLN2
{ 819, 0, 0, 0, 748, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004bULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #819 = FLDPI
{ 820, 0, 0, 0, 777, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000042ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #820 = FNCLEX
{ 821, 0, 0, 0, 778, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000043ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #821 = FNINIT
{ 822, 0, 0, 0, 775, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000030ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #822 = FNOP
{ 823, 5, 0, 0, 753, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #823 = FNSTCW16m
{ 824, 0, 0, 0, 750, 0, 0x6f80000040ULL, ImplicitList5, ImplicitList3, nullptr, -1 ,nullptr }, // Inst #824 = FNSTSW16r
{ 825, 5, 1, 0, 751, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #825 = FNSTSWm
{ 826, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr }, // Inst #826 = FP32_TO_INT16_IN_MEM
{ 827, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr }, // Inst #827 = FP32_TO_INT32_IN_MEM
{ 828, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo138, -1 ,nullptr }, // Inst #828 = FP32_TO_INT64_IN_MEM
{ 829, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr }, // Inst #829 = FP64_TO_INT16_IN_MEM
{ 830, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr }, // Inst #830 = FP64_TO_INT32_IN_MEM
{ 831, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo139, -1 ,nullptr }, // Inst #831 = FP64_TO_INT64_IN_MEM
{ 832, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr }, // Inst #832 = FP80_TO_INT16_IN_MEM
{ 833, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr }, // Inst #833 = FP80_TO_INT32_IN_MEM
{ 834, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo140, -1 ,nullptr }, // Inst #834 = FP80_TO_INT64_IN_MEM
{ 835, 0, 0, 0, 145, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000053ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #835 = FPATAN
{ 836, 0, 0, 0, 770, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000058ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #836 = FPREM
{ 837, 0, 0, 0, 771, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000055ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #837 = FPREM1
{ 838, 0, 0, 0, 148, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000052ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #838 = FPTAN
{ 839, 1, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000010ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #839 = FP_FFREEP
{ 840, 0, 0, 0, 772, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005cULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #840 = FRNDINT
{ 841, 5, 1, 0, 757, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #841 = FRSTORm
{ 842, 5, 1, 0, 756, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #842 = FSAVEm
{ 843, 0, 0, 0, 773, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005dULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #843 = FSCALE
{ 844, 0, 0, 0, 151, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000044ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #844 = FSETPM
{ 845, 0, 0, 0, 152, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005bULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #845 = FSINCOS
{ 846, 5, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #846 = FSTENVm
{ 847, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3200000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #847 = FS_PREFIX
{ 848, 0, 0, 0, 769, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000045ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #848 = FXAM
{ 849, 5, 0, 0, 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #849 = FXRSTOR
{ 850, 5, 0, 0, 154, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700024019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #850 = FXRSTOR64
{ 851, 5, 0, 0, 155, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #851 = FXSAVE
{ 852, 5, 0, 0, 155, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700024018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #852 = FXSAVE64
{ 853, 0, 0, 0, 774, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000054ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #853 = FXTRACT
{ 854, 0, 0, 0, 157, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000051ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #854 = FYL2X
{ 855, 0, 0, 0, 158, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000059ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #855 = FYL2XP1
{ 856, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2a90005006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #856 = FsANDNPDrm
{ 857, 3, 1, 0, 160, 0, 0x2a90005005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #857 = FsANDNPDrr
{ 858, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2a88004806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #858 = FsANDNPSrm
{ 859, 3, 1, 0, 160, 0, 0x2a88004805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #859 = FsANDNPSrr
{ 860, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2a10005006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #860 = FsANDPDrm
{ 861, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2a10005005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #861 = FsANDPDrr
{ 862, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2a08004806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #862 = FsANDPSrm
{ 863, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2a08004805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #863 = FsANDPSrr
{ 864, 1, 1, 0, 36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo141, -1 ,nullptr }, // Inst #864 = FsFLD0SD
{ 865, 1, 1, 0, 36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo142, -1 ,nullptr }, // Inst #865 = FsFLD0SS
{ 866, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1410005006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #866 = FsMOVAPDrm
{ 867, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1408004806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #867 = FsMOVAPSrm
{ 868, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2b10005006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #868 = FsORPDrm
{ 869, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2b10005005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #869 = FsORPDrr
{ 870, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2b08004806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #870 = FsORPSrm
{ 871, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2b08004805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #871 = FsORPSrr
{ 872, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1430005006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #872 = FsVMOVAPDrm
{ 873, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1428004806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #873 = FsVMOVAPSrm
{ 874, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2b90005006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #874 = FsXORPDrm
{ 875, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2b90005005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #875 = FsXORPDrr
{ 876, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2b88004806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #876 = FsXORPSrm
{ 877, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2b88004805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #877 = FsXORPSrr
{ 878, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2a90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #878 = FvANDNPDrm
{ 879, 3, 1, 0, 160, 0, 0x2a90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #879 = FvANDNPDrr
{ 880, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2a88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #880 = FvANDNPSrm
{ 881, 3, 1, 0, 160, 0, 0x2a88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #881 = FvANDNPSrr
{ 882, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2a10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #882 = FvANDPDrm
{ 883, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2a10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #883 = FvANDPDrr
{ 884, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2a08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #884 = FvANDPSrm
{ 885, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2a08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #885 = FvANDPSrr
{ 886, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2b10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #886 = FvORPDrm
{ 887, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2b10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #887 = FvORPDrr
{ 888, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2b08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #888 = FvORPSrm
{ 889, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2b08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #889 = FvORPSrr
{ 890, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2b90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #890 = FvXORPDrm
{ 891, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2b90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #891 = FvXORPDrr
{ 892, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x2b88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #892 = FvXORPSrm
{ 893, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x2b88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #893 = FvXORPSrr
{ 894, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1b80004001ULL, ImplicitList18, ImplicitList28, nullptr, -1 ,nullptr }, // Inst #894 = GETSEC
{ 895, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3280000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #895 = GS_PREFIX
{ 896, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x3e10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #896 = HADDPDrm
{ 897, 3, 1, 0, 902, 0, 0x3e10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #897 = HADDPDrr
{ 898, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x3e08006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #898 = HADDPSrm
{ 899, 3, 1, 0, 902, 0, 0x3e08006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #899 = HADDPSrr
{ 900, 0, 0, 0, 164, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7a00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #900 = HLT
{ 901, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x3e90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #901 = HSUBPDrm
{ 902, 3, 1, 0, 902, 0, 0x3e90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #902 = HSUBPDrr
{ 903, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x3e88006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #903 = HSUBPSrm
{ 904, 3, 1, 0, 902, 0, 0x3e88006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #904 = HSUBPSrr
{ 905, 5, 0, 0, 165, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8000009fULL, ImplicitList25, ImplicitList26, OperandInfo43, -1 ,nullptr }, // Inst #905 = IDIV16m
{ 906, 1, 0, 0, 648, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000097ULL, ImplicitList25, ImplicitList26, OperandInfo82, -1 ,nullptr }, // Inst #906 = IDIV16r
{ 907, 5, 0, 0, 167, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8000011fULL, ImplicitList16, ImplicitList21, OperandInfo43, -1 ,nullptr }, // Inst #907 = IDIV32m
{ 908, 1, 0, 0, 649, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80000117ULL, ImplicitList16, ImplicitList21, OperandInfo83, -1 ,nullptr }, // Inst #908 = IDIV32r
{ 909, 5, 0, 0, 169, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b8002001fULL, ImplicitList24, ImplicitList19, OperandInfo43, -1 ,nullptr }, // Inst #909 = IDIV64m
{ 910, 1, 0, 0, 650, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80020017ULL, ImplicitList24, ImplicitList19, OperandInfo85, -1 ,nullptr }, // Inst #910 = IDIV64r
{ 911, 5, 0, 0, 171, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b0000001fULL, ImplicitList3, ImplicitList27, OperandInfo43, -1 ,nullptr }, // Inst #911 = IDIV8m
{ 912, 1, 0, 0, 647, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7b00000017ULL, ImplicitList3, ImplicitList27, OperandInfo134, -1 ,nullptr }, // Inst #912 = IDIV8r
{ 913, 5, 0, 0, 744, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #913 = ILD_F16m
{ 914, 5, 0, 0, 744, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #914 = ILD_F32m
{ 915, 5, 0, 0, 744, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #915 = ILD_F64m
{ 916, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo143, -1 ,nullptr }, // Inst #916 = ILD_Fp16m32
{ 917, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr }, // Inst #917 = ILD_Fp16m64
{ 918, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr }, // Inst #918 = ILD_Fp16m80
{ 919, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo143, -1 ,nullptr }, // Inst #919 = ILD_Fp32m32
{ 920, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr }, // Inst #920 = ILD_Fp32m64
{ 921, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr }, // Inst #921 = ILD_Fp32m80
{ 922, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo143, -1 ,nullptr }, // Inst #922 = ILD_Fp64m32
{ 923, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr }, // Inst #923 = ILD_Fp64m64
{ 924, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr }, // Inst #924 = ILD_Fp64m80
{ 925, 5, 0, 0, 623, 0|(1ULL<<MCID::MayLoad), 0x7b8000009dULL, ImplicitList3, ImplicitList26, OperandInfo43, -1 ,nullptr }, // Inst #925 = IMUL16m
{ 926, 1, 0, 0, 618, 0, 0x7b80000095ULL, ImplicitList3, ImplicitList26, OperandInfo82, -1 ,nullptr }, // Inst #926 = IMUL16r
{ 927, 7, 1, 0, 619, 0|(1ULL<<MCID::MayLoad), 0x5780004086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #927 = IMUL16rm
{ 928, 7, 1, 0, 620, 0|(1ULL<<MCID::MayLoad), 0x34800c0086ULL, nullptr, ImplicitList6, OperandInfo146, -1 ,nullptr }, // Inst #928 = IMUL16rmi
{ 929, 7, 1, 0, 620, 0|(1ULL<<MCID::MayLoad), 0x3580040086ULL, nullptr, ImplicitList6, OperandInfo146, -1 ,nullptr }, // Inst #929 = IMUL16rmi8
{ 930, 3, 1, 0, 618, 0|(1ULL<<MCID::Commutable), 0x5780004085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #930 = IMUL16rr
{ 931, 3, 1, 0, 621, 0, 0x34800c0085ULL, nullptr, ImplicitList6, OperandInfo147, -1 ,nullptr }, // Inst #931 = IMUL16rri
{ 932, 3, 1, 0, 621, 0, 0x3580040085ULL, nullptr, ImplicitList6, OperandInfo147, -1 ,nullptr }, // Inst #932 = IMUL16rri8
{ 933, 5, 0, 0, 630, 0|(1ULL<<MCID::MayLoad), 0x7b8000011dULL, ImplicitList9, ImplicitList21, OperandInfo43, -1 ,nullptr }, // Inst #933 = IMUL32m
{ 934, 1, 0, 0, 625, 0, 0x7b80000115ULL, ImplicitList9, ImplicitList21, OperandInfo83, -1 ,nullptr }, // Inst #934 = IMUL32r
{ 935, 7, 1, 0, 626, 0|(1ULL<<MCID::MayLoad), 0x5780004106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #935 = IMUL32rm
{ 936, 7, 1, 0, 627, 0|(1ULL<<MCID::MayLoad), 0x3480140106ULL, nullptr, ImplicitList6, OperandInfo66, -1 ,nullptr }, // Inst #936 = IMUL32rmi
{ 937, 7, 1, 0, 627, 0|(1ULL<<MCID::MayLoad), 0x3580040106ULL, nullptr, ImplicitList6, OperandInfo66, -1 ,nullptr }, // Inst #937 = IMUL32rmi8
{ 938, 3, 1, 0, 625, 0|(1ULL<<MCID::Commutable), 0x5780004105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #938 = IMUL32rr
{ 939, 3, 1, 0, 628, 0, 0x3480140105ULL, nullptr, ImplicitList6, OperandInfo67, -1 ,nullptr }, // Inst #939 = IMUL32rri
{ 940, 3, 1, 0, 628, 0, 0x3580040105ULL, nullptr, ImplicitList6, OperandInfo67, -1 ,nullptr }, // Inst #940 = IMUL32rri8
{ 941, 5, 0, 0, 637, 0|(1ULL<<MCID::MayLoad), 0x7b8002001dULL, ImplicitList10, ImplicitList19, OperandInfo43, -1 ,nullptr }, // Inst #941 = IMUL64m
{ 942, 1, 0, 0, 632, 0, 0x7b80020015ULL, ImplicitList10, ImplicitList19, OperandInfo85, -1 ,nullptr }, // Inst #942 = IMUL64r
{ 943, 7, 1, 0, 633, 0|(1ULL<<MCID::MayLoad), 0x5780024006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #943 = IMUL64rm
{ 944, 7, 1, 0, 634, 0|(1ULL<<MCID::MayLoad), 0x34801e0006ULL, nullptr, ImplicitList6, OperandInfo68, -1 ,nullptr }, // Inst #944 = IMUL64rmi32
{ 945, 7, 1, 0, 634, 0|(1ULL<<MCID::MayLoad), 0x3580060006ULL, nullptr, ImplicitList6, OperandInfo68, -1 ,nullptr }, // Inst #945 = IMUL64rmi8
{ 946, 3, 1, 0, 632, 0|(1ULL<<MCID::Commutable), 0x5780024005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #946 = IMUL64rr
{ 947, 3, 1, 0, 635, 0, 0x34801e0005ULL, nullptr, ImplicitList6, OperandInfo69, -1 ,nullptr }, // Inst #947 = IMUL64rri32
{ 948, 3, 1, 0, 635, 0, 0x3580060005ULL, nullptr, ImplicitList6, OperandInfo69, -1 ,nullptr }, // Inst #948 = IMUL64rri8
{ 949, 5, 0, 0, 189, 0|(1ULL<<MCID::MayLoad), 0x7b0000001dULL, ImplicitList4, ImplicitList29, OperandInfo43, -1 ,nullptr }, // Inst #949 = IMUL8m
{ 950, 1, 0, 0, 190, 0, 0x7b00000015ULL, ImplicitList4, ImplicitList29, OperandInfo134, -1 ,nullptr }, // Inst #950 = IMUL8r
{ 951, 1, 0, 0, 191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7280040081ULL, nullptr, ImplicitList3, OperandInfo2, -1 ,nullptr }, // Inst #951 = IN16ri
{ 952, 0, 0, 0, 192, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7680000081ULL, ImplicitList30, ImplicitList3, nullptr, -1 ,nullptr }, // Inst #952 = IN16rr
{ 953, 1, 0, 0, 191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7280040101ULL, nullptr, ImplicitList9, OperandInfo2, -1 ,nullptr }, // Inst #953 = IN32ri
{ 954, 0, 0, 0, 192, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7680000101ULL, ImplicitList30, ImplicitList9, nullptr, -1 ,nullptr }, // Inst #954 = IN32rr
{ 955, 1, 0, 0, 191, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7200040001ULL, nullptr, ImplicitList4, OperandInfo2, -1 ,nullptr }, // Inst #955 = IN8ri
{ 956, 0, 0, 0, 192, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7600000001ULL, ImplicitList30, ImplicitList4, nullptr, -1 ,nullptr }, // Inst #956 = IN8rr
{ 957, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000098ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #957 = INC16m
{ 958, 2, 1, 0, 104, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000090ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #958 = INC16r
{ 959, 2, 1, 0, 104, 0, 0x2000000082ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #959 = INC16r_alt
{ 960, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80000118ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #960 = INC32m
{ 961, 2, 1, 0, 104, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80000110ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #961 = INC32r
{ 962, 2, 1, 0, 104, 0, 0x2000000102ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #962 = INC32r_alt
{ 963, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f80020018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #963 = INC64m
{ 964, 2, 1, 0, 104, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x7f80020010ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #964 = INC64r
{ 965, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f00000018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #965 = INC8m
{ 966, 2, 1, 0, 104, 0, 0x7f00000010ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #966 = INC8r
{ 967, 1, 1, 0, 193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3600000009ULL, ImplicitList31, ImplicitList32, OperandInfo148, -1 ,nullptr }, // Inst #967 = INSB
{ 968, 8, 1, 0, 194, 0|(1ULL<<MCID::MayLoad), 0x108804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #968 = INSERTPSrm
{ 969, 4, 1, 0, 195, 0, 0x108804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #969 = INSERTPSrr
{ 970, 3, 1, 0, 0, 0, 0x3c80006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #970 = INSERTQ
{ 971, 5, 1, 0, 0, 0, 0x3c00046005ULL, nullptr, nullptr, OperandInfo149, -1 ,nullptr }, // Inst #971 = INSERTQI
{ 972, 1, 1, 0, 193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000109ULL, ImplicitList31, ImplicitList32, OperandInfo148, -1 ,nullptr }, // Inst #972 = INSL
{ 973, 1, 1, 0, 193, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3680000089ULL, ImplicitList31, ImplicitList32, OperandInfo148, -1 ,nullptr }, // Inst #973 = INSW
{ 974, 1, 0, 0, 196, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6680040001ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #974 = INT
{ 975, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7880000001ULL, nullptr, ImplicitList6, nullptr, -1 ,nullptr }, // Inst #975 = INT1
{ 976, 0, 0, 0, 197, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6600000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #976 = INT3
{ 977, 0, 0, 0, 716, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6700000001ULL, ImplicitList6, nullptr, nullptr, -1 ,nullptr }, // Inst #977 = INTO
{ 978, 0, 0, 0, 198, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x400004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #978 = INVD
{ 979, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000009006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #979 = INVEPT32
{ 980, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4000009006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #980 = INVEPT64
{ 981, 5, 0, 0, 199, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #981 = INVLPG
{ 982, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403fULL, ImplicitList23, nullptr, nullptr, -1 ,nullptr }, // Inst #982 = INVLPGA32
{ 983, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403fULL, ImplicitList33, nullptr, nullptr, -1 ,nullptr }, // Inst #983 = INVLPGA64
{ 984, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4100009006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #984 = INVPCID32
{ 985, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4100009006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #985 = INVPCID64
{ 986, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080009006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #986 = INVVPID32
{ 987, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4080009006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #987 = INVVPID64
{ 988, 1, 0, 0, 200, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x1c00000ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #988 = IRET
{ 989, 0, 0, 0, 201, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c00081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #989 = IRET16
{ 990, 0, 0, 0, 201, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c00101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #990 = IRET32
{ 991, 0, 0, 0, 201, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6781c20001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #991 = IRET64
{ 992, 5, 0, 0, 202, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #992 = ISTT_FP16m
{ 993, 5, 0, 0, 202, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #993 = ISTT_FP32m
{ 994, 5, 0, 0, 202, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #994 = ISTT_FP64m
{ 995, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr }, // Inst #995 = ISTT_Fp16m32
{ 996, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #996 = ISTT_Fp16m64
{ 997, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #997 = ISTT_Fp16m80
{ 998, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr }, // Inst #998 = ISTT_Fp32m32
{ 999, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #999 = ISTT_Fp32m64
{ 1000, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #1000 = ISTT_Fp32m80
{ 1001, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr }, // Inst #1001 = ISTT_Fp64m32
{ 1002, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #1002 = ISTT_Fp64m64
{ 1003, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #1003 = ISTT_Fp64m80
{ 1004, 5, 0, 0, 745, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001aULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1004 = IST_F16m
{ 1005, 5, 0, 0, 745, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d8000001aULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1005 = IST_F32m
{ 1006, 5, 0, 0, 745, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001bULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1006 = IST_FP16m
{ 1007, 5, 0, 0, 745, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d8000001bULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1007 = IST_FP32m
{ 1008, 5, 0, 0, 203, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f8000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1008 = IST_FP64m
{ 1009, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr }, // Inst #1009 = IST_Fp16m32
{ 1010, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #1010 = IST_Fp16m64
{ 1011, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #1011 = IST_Fp16m80
{ 1012, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr }, // Inst #1012 = IST_Fp32m32
{ 1013, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #1013 = IST_Fp32m64
{ 1014, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #1014 = IST_Fp32m80
{ 1015, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr }, // Inst #1015 = IST_Fp64m32
{ 1016, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #1016 = IST_Fp64m64
{ 1017, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #1017 = IST_Fp64m80
{ 1018, 8, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x6100046006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #1018 = Int_CMPSDrm
{ 1019, 4, 1, 0, 18, 0, 0x6100046005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #1019 = Int_CMPSDrr
{ 1020, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x6100045806ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #1020 = Int_CMPSSrm
{ 1021, 4, 1, 0, 20, 0, 0x6100045805ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #1021 = Int_CMPSSrr
{ 1022, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x1780005006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #1022 = Int_COMISDrm
{ 1023, 2, 0, 0, 76, 0, 0x1780005005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #1023 = Int_COMISDrr
{ 1024, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x1780004806ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #1024 = Int_COMISSrm
{ 1025, 2, 0, 0, 76, 0, 0x1780004805ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #1025 = Int_COMISSrr
{ 1026, 7, 1, 0, 871, 0|(1ULL<<MCID::MayLoad), 0x2d00006005ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1026 = Int_CVTSD2SSrm
{ 1027, 3, 1, 0, 869, 0, 0x2d00006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1027 = Int_CVTSD2SSrr
{ 1028, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x1500026006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1028 = Int_CVTSI2SD64rm
{ 1029, 3, 1, 0, 96, 0, 0x1500026005ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #1029 = Int_CVTSI2SD64rr
{ 1030, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x1500006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1030 = Int_CVTSI2SDrm
{ 1031, 3, 1, 0, 96, 0, 0x1500006005ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr }, // Inst #1031 = Int_CVTSI2SDrr
{ 1032, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x1500025806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1032 = Int_CVTSI2SS64rm
{ 1033, 3, 1, 0, 891, 0, 0x1500025805ULL, nullptr, nullptr, OperandInfo150, -1 ,nullptr }, // Inst #1033 = Int_CVTSI2SS64rr
{ 1034, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x1500005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1034 = Int_CVTSI2SSrm
{ 1035, 3, 1, 0, 891, 0, 0x1500005805ULL, nullptr, nullptr, OperandInfo151, -1 ,nullptr }, // Inst #1035 = Int_CVTSI2SSrr
{ 1036, 7, 1, 0, 877, 0|(1ULL<<MCID::MayLoad), 0x2d00005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1036 = Int_CVTSS2SDrm
{ 1037, 3, 1, 0, 875, 0, 0x2d00005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1037 = Int_CVTSS2SDrr
{ 1038, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1600026006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1038 = Int_CVTTSD2SI64rm
{ 1039, 2, 1, 0, 897, 0, 0x1600026005ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #1039 = Int_CVTTSD2SI64rr
{ 1040, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1600006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1040 = Int_CVTTSD2SIrm
{ 1041, 2, 1, 0, 897, 0, 0x1600006005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #1041 = Int_CVTTSD2SIrr
{ 1042, 6, 1, 0, 895, 0|(1ULL<<MCID::MayLoad), 0x1600025806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1042 = Int_CVTTSS2SI64rm
{ 1043, 2, 1, 0, 893, 0, 0x1600025805ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #1043 = Int_CVTTSS2SI64rr
{ 1044, 6, 1, 0, 896, 0|(1ULL<<MCID::MayLoad), 0x1600005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1044 = Int_CVTTSS2SIrm
{ 1045, 2, 1, 0, 894, 0, 0x1600005805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #1045 = Int_CVTTSS2SIrr
{ 1046, 0, 0, 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1046 = Int_MemBarrier
{ 1047, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x1700005006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #1047 = Int_UCOMISDrm
{ 1048, 2, 0, 0, 76, 0, 0x1700005005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #1048 = Int_UCOMISDrr
{ 1049, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x1700004806ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #1049 = Int_UCOMISSrm
{ 1050, 2, 0, 0, 76, 0, 0x1700004805ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #1050 = Int_UCOMISSrr
{ 1051, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x16120046006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #1051 = Int_VCMPSDrm
{ 1052, 4, 1, 0, 20, 0, 0x16120046005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #1052 = Int_VCMPSDrr
{ 1053, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x16120045806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #1053 = Int_VCMPSSrm
{ 1054, 4, 1, 0, 20, 0, 0x16120045805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #1054 = Int_VCMPSSrr
{ 1055, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x101097e0005006ULL, nullptr, ImplicitList6, OperandInfo153, -1 ,nullptr }, // Inst #1055 = Int_VCOMISDZrm
{ 1056, 2, 0, 0, 76, 0, 0x101097e0005005ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr }, // Inst #1056 = Int_VCOMISDZrr
{ 1057, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x17a0005006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #1057 = Int_VCOMISDrm
{ 1058, 2, 0, 0, 76, 0, 0x17a0005005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #1058 = Int_VCOMISDrr
{ 1059, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x81017e0004806ULL, nullptr, ImplicitList6, OperandInfo153, -1 ,nullptr }, // Inst #1059 = Int_VCOMISSZrm
{ 1060, 2, 0, 0, 76, 0, 0x81017e0004805ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr }, // Inst #1060 = Int_VCOMISSZrr
{ 1061, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x17a0004806ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #1061 = Int_VCOMISSrm
{ 1062, 2, 0, 0, 76, 0, 0x17a0004805ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #1062 = Int_VCOMISSrr
{ 1063, 7, 1, 0, 871, 0|(1ULL<<MCID::MayLoad), 0x12d20006005ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #1063 = Int_VCVTSD2SSrm
{ 1064, 3, 1, 0, 869, 0, 0x12d20006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #1064 = Int_VCVTSD2SSrr
{ 1065, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x20019560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #1065 = Int_VCVTSI2SD64Zrm
{ 1066, 3, 1, 0, 96, 0, 0x20019560006005ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr }, // Inst #1066 = Int_VCVTSI2SD64Zrr
{ 1067, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x19520006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #1067 = Int_VCVTSI2SD64rm
{ 1068, 3, 1, 0, 96, 0, 0x19520006005ULL, nullptr, nullptr, OperandInfo159, -1 ,nullptr }, // Inst #1068 = Int_VCVTSI2SD64rr
{ 1069, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x20011560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #1069 = Int_VCVTSI2SDZrm
{ 1070, 3, 1, 0, 96, 0, 0x20011560006005ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, // Inst #1070 = Int_VCVTSI2SDZrr
{ 1071, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x11520006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #1071 = Int_VCVTSI2SDrm
{ 1072, 3, 1, 0, 96, 0, 0x11520006005ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1072 = Int_VCVTSI2SDrr
{ 1073, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x20019560005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #1073 = Int_VCVTSI2SS64Zrm
{ 1074, 3, 1, 0, 96, 0, 0x20019560005805ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr }, // Inst #1074 = Int_VCVTSI2SS64Zrr
{ 1075, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x19520005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #1075 = Int_VCVTSI2SS64rm
{ 1076, 3, 1, 0, 891, 0, 0x19520005805ULL, nullptr, nullptr, OperandInfo159, -1 ,nullptr }, // Inst #1076 = Int_VCVTSI2SS64rr
{ 1077, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x20011560005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #1077 = Int_VCVTSI2SSZrm
{ 1078, 3, 1, 0, 96, 0, 0x20011560005805ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, // Inst #1078 = Int_VCVTSI2SSZrr
{ 1079, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x11520005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #1079 = Int_VCVTSI2SSrm
{ 1080, 3, 1, 0, 891, 0, 0x11520005805ULL, nullptr, nullptr, OperandInfo161, -1 ,nullptr }, // Inst #1080 = Int_VCVTSI2SSrr
{ 1081, 7, 1, 0, 877, 0|(1ULL<<MCID::MayLoad), 0x12d20005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #1081 = Int_VCVTSS2SDrm
{ 1082, 3, 1, 0, 875, 0, 0x12d20005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #1082 = Int_VCVTSS2SDrr
{ 1083, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x9620006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1083 = Int_VCVTTSD2SI64rm
{ 1084, 2, 1, 0, 897, 0, 0x9620006005ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #1084 = Int_VCVTTSD2SI64rr
{ 1085, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1620006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1085 = Int_VCVTTSD2SIrm
{ 1086, 2, 1, 0, 897, 0, 0x1620006005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #1086 = Int_VCVTTSD2SIrr
{ 1087, 6, 1, 0, 895, 0|(1ULL<<MCID::MayLoad), 0x9620005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1087 = Int_VCVTTSS2SI64rm
{ 1088, 2, 1, 0, 893, 0, 0x9620005805ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #1088 = Int_VCVTTSS2SI64rr
{ 1089, 6, 1, 0, 896, 0|(1ULL<<MCID::MayLoad), 0x1620005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1089 = Int_VCVTTSS2SIrm
{ 1090, 2, 1, 0, 894, 0, 0x1620005805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #1090 = Int_VCVTTSS2SIrr
{ 1091, 7, 1, 0, 205, 0|(1ULL<<MCID::MayLoad), 0x20011560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #1091 = Int_VCVTUSI2SDZrm
{ 1092, 3, 1, 0, 96, 0, 0x20011560006005ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, // Inst #1092 = Int_VCVTUSI2SDZrr
{ 1093, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x10109760005006ULL, nullptr, ImplicitList6, OperandInfo153, -1 ,nullptr }, // Inst #1093 = Int_VUCOMISDZrm
{ 1094, 2, 0, 0, 76, 0, 0x10109760005005ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr }, // Inst #1094 = Int_VUCOMISDZrr
{ 1095, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x1720005006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #1095 = Int_VUCOMISDrm
{ 1096, 2, 0, 0, 76, 0, 0x1720005005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #1096 = Int_VUCOMISDrr
{ 1097, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x8101760004806ULL, nullptr, ImplicitList6, OperandInfo153, -1 ,nullptr }, // Inst #1097 = Int_VUCOMISSZrm
{ 1098, 2, 0, 0, 76, 0, 0x8101760004805ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr }, // Inst #1098 = Int_VUCOMISSZrr
{ 1099, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x1720004806ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #1099 = Int_VUCOMISSrm
{ 1100, 2, 0, 0, 76, 0, 0x1720004805ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #1100 = Int_VUCOMISSrr
{ 1101, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3980080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1101 = JAE_1
{ 1102, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4180104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1102 = JAE_2
{ 1103, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4180184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1103 = JAE_4
{ 1104, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3b80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1104 = JA_1
{ 1105, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4380104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1105 = JA_2
{ 1106, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4380184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1106 = JA_4
{ 1107, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3b00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1107 = JBE_1
{ 1108, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4300104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1108 = JBE_2
{ 1109, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4300184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1109 = JBE_4
{ 1110, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3900080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1110 = JB_1
{ 1111, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4100104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1111 = JB_2
{ 1112, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4100184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1112 = JB_4
{ 1113, 1, 0, 0, 706, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080201ULL, ImplicitList34, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1113 = JCXZ
{ 1114, 1, 0, 0, 208, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080401ULL, ImplicitList35, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1114 = JECXZ
{ 1115, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3a00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1115 = JE_1
{ 1116, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4200104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1116 = JE_2
{ 1117, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4200184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1117 = JE_4
{ 1118, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3e80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1118 = JGE_1
{ 1119, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4680104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1119 = JGE_2
{ 1120, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4680184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1120 = JGE_4
{ 1121, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3f80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1121 = JG_1
{ 1122, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4780104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1122 = JG_2
{ 1123, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4780184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1123 = JG_4
{ 1124, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3f00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1124 = JLE_1
{ 1125, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4700104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1125 = JLE_2
{ 1126, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4700184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1126 = JLE_4
{ 1127, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3e00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1127 = JL_1
{ 1128, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4600104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1128 = JL_2
{ 1129, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4600184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1129 = JL_4
{ 1130, 5, 0, 0, 209, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f8000009cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1130 = JMP16m
{ 1131, 1, 0, 0, 210, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000094ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #1131 = JMP16r
{ 1132, 5, 0, 0, 209, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f8000011cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1132 = JMP32m
{ 1133, 1, 0, 0, 210, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000114ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #1133 = JMP32r
{ 1134, 5, 0, 0, 209, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x7f8000001cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1134 = JMP64m
{ 1135, 1, 0, 0, 210, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::IndirectBranch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7f80000014ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #1135 = JMP64r
{ 1136, 1, 0, 0, 211, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7580080001ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1136 = JMP_1
{ 1137, 1, 0, 0, 211, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7480100081ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1137 = JMP_2
{ 1138, 1, 0, 0, 211, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator), 0x7480180101ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1138 = JMP_4
{ 1139, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3a80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1139 = JNE_1
{ 1140, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4280104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1140 = JNE_2
{ 1141, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4280184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1141 = JNE_4
{ 1142, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3880080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1142 = JNO_1
{ 1143, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4080104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1143 = JNO_2
{ 1144, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4080184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1144 = JNO_4
{ 1145, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3d80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1145 = JNP_1
{ 1146, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4580104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1146 = JNP_2
{ 1147, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4580184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1147 = JNP_4
{ 1148, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3c80080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1148 = JNS_1
{ 1149, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4480104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1149 = JNS_2
{ 1150, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4480184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1150 = JNS_4
{ 1151, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3800080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1151 = JO_1
{ 1152, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4000104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1152 = JO_2
{ 1153, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4000184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1153 = JO_4
{ 1154, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3d00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1154 = JP_1
{ 1155, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4500104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1155 = JP_2
{ 1156, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4500184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1156 = JP_4
{ 1157, 1, 0, 0, 706, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x7180080601ULL, ImplicitList36, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1157 = JRCXZ
{ 1158, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x3c00080001ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1158 = JS_1
{ 1159, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4400104081ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1159 = JS_2
{ 1160, 1, 0, 0, 207, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator), 0x4400184101ULL, ImplicitList6, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1160 = JS_4
{ 1161, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x92520005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1161 = KADDBrr
{ 1162, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a520005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr }, // Inst #1162 = KADDDrr
{ 1163, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a520004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1163 = KADDQrr
{ 1164, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x92520004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr }, // Inst #1164 = KADDWrr
{ 1165, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x920a0005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1165 = KANDBrr
{ 1166, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a0a0005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr }, // Inst #1166 = KANDDrr
{ 1167, 3, 1, 0, 0, 0, 0x92120005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1167 = KANDNBrr
{ 1168, 3, 1, 0, 0, 0, 0x9a120005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr }, // Inst #1168 = KANDNDrr
{ 1169, 3, 1, 0, 0, 0, 0x9a120004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1169 = KANDNQrr
{ 1170, 3, 1, 0, 0, 0, 0x92120004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr }, // Inst #1170 = KANDNWrr
{ 1171, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a0a0004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1171 = KANDQrr
{ 1172, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x920a0004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr }, // Inst #1172 = KANDWrr
{ 1173, 2, 1, 0, 0, 0, 0x4820005005ULL, nullptr, nullptr, OperandInfo166, -1 ,nullptr }, // Inst #1173 = KMOVBkk
{ 1174, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4820005006ULL, nullptr, nullptr, OperandInfo167, -1 ,nullptr }, // Inst #1174 = KMOVBkm
{ 1175, 2, 1, 0, 0, 0, 0x4920005005ULL, nullptr, nullptr, OperandInfo168, -1 ,nullptr }, // Inst #1175 = KMOVBkr
{ 1176, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x48a0005004ULL, nullptr, nullptr, OperandInfo169, -1 ,nullptr }, // Inst #1176 = KMOVBmk
{ 1177, 2, 1, 0, 0, 0, 0x49a0005005ULL, nullptr, nullptr, OperandInfo170, -1 ,nullptr }, // Inst #1177 = KMOVBrk
{ 1178, 2, 1, 0, 0, 0, 0xc820005005ULL, nullptr, nullptr, OperandInfo171, -1 ,nullptr }, // Inst #1178 = KMOVDkk
{ 1179, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xc820005006ULL, nullptr, nullptr, OperandInfo172, -1 ,nullptr }, // Inst #1179 = KMOVDkm
{ 1180, 2, 1, 0, 0, 0, 0x4920006005ULL, nullptr, nullptr, OperandInfo173, -1 ,nullptr }, // Inst #1180 = KMOVDkr
{ 1181, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0xc8a0005004ULL, nullptr, nullptr, OperandInfo174, -1 ,nullptr }, // Inst #1181 = KMOVDmk
{ 1182, 2, 1, 0, 0, 0, 0x49a0006005ULL, nullptr, nullptr, OperandInfo175, -1 ,nullptr }, // Inst #1182 = KMOVDrk
{ 1183, 2, 1, 0, 0, 0, 0xc820004805ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr }, // Inst #1183 = KMOVQkk
{ 1184, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xc820004806ULL, nullptr, nullptr, OperandInfo177, -1 ,nullptr }, // Inst #1184 = KMOVQkm
{ 1185, 2, 1, 0, 0, 0, 0xc920006005ULL, nullptr, nullptr, OperandInfo178, -1 ,nullptr }, // Inst #1185 = KMOVQkr
{ 1186, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0xc8a0004804ULL, nullptr, nullptr, OperandInfo179, -1 ,nullptr }, // Inst #1186 = KMOVQmk
{ 1187, 2, 1, 0, 0, 0, 0xc9a0006005ULL, nullptr, nullptr, OperandInfo180, -1 ,nullptr }, // Inst #1187 = KMOVQrk
{ 1188, 2, 1, 0, 0, 0, 0x4820004805ULL, nullptr, nullptr, OperandInfo181, -1 ,nullptr }, // Inst #1188 = KMOVWkk
{ 1189, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4820004806ULL, nullptr, nullptr, OperandInfo182, -1 ,nullptr }, // Inst #1189 = KMOVWkm
{ 1190, 2, 1, 0, 0, 0, 0x4920004805ULL, nullptr, nullptr, OperandInfo183, -1 ,nullptr }, // Inst #1190 = KMOVWkr
{ 1191, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x48a0004804ULL, nullptr, nullptr, OperandInfo184, -1 ,nullptr }, // Inst #1191 = KMOVWmk
{ 1192, 2, 1, 0, 0, 0, 0x49a0004805ULL, nullptr, nullptr, OperandInfo185, -1 ,nullptr }, // Inst #1192 = KMOVWrk
{ 1193, 2, 1, 0, 0, 0, 0x2220005005ULL, nullptr, nullptr, OperandInfo166, -1 ,nullptr }, // Inst #1193 = KNOTBrr
{ 1194, 2, 1, 0, 0, 0, 0xa220005005ULL, nullptr, nullptr, OperandInfo171, -1 ,nullptr }, // Inst #1194 = KNOTDrr
{ 1195, 2, 1, 0, 0, 0, 0xa220004805ULL, nullptr, nullptr, OperandInfo176, -1 ,nullptr }, // Inst #1195 = KNOTQrr
{ 1196, 2, 1, 0, 0, 0, 0x2220004805ULL, nullptr, nullptr, OperandInfo181, -1 ,nullptr }, // Inst #1196 = KNOTWrr
{ 1197, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x922a0005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1197 = KORBrr
{ 1198, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a2a0005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr }, // Inst #1198 = KORDrr
{ 1199, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a2a0004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1199 = KORQrr
{ 1200, 2, 0, 0, 0, 0, 0x4c20005005ULL, nullptr, ImplicitList6, OperandInfo166, -1 ,nullptr }, // Inst #1200 = KORTESTBrr
{ 1201, 2, 0, 0, 0, 0, 0xcc20005005ULL, nullptr, ImplicitList6, OperandInfo171, -1 ,nullptr }, // Inst #1201 = KORTESTDrr
{ 1202, 2, 0, 0, 0, 0, 0xcc20004805ULL, nullptr, ImplicitList6, OperandInfo176, -1 ,nullptr }, // Inst #1202 = KORTESTQrr
{ 1203, 2, 0, 0, 0, 0, 0x4c20004805ULL, nullptr, ImplicitList6, OperandInfo181, -1 ,nullptr }, // Inst #1203 = KORTESTWrr
{ 1204, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x922a0004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr }, // Inst #1204 = KORWrr
{ 1205, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr }, // Inst #1205 = KSET0B
{ 1206, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, // Inst #1206 = KSET0D
{ 1207, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo188, -1 ,nullptr }, // Inst #1207 = KSET0Q
{ 1208, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo189, -1 ,nullptr }, // Inst #1208 = KSET0W
{ 1209, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo186, -1 ,nullptr }, // Inst #1209 = KSET1B
{ 1210, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo187, -1 ,nullptr }, // Inst #1210 = KSET1D
{ 1211, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo188, -1 ,nullptr }, // Inst #1211 = KSET1Q
{ 1212, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo189, -1 ,nullptr }, // Inst #1212 = KSET1W
{ 1213, 3, 1, 0, 0, 0, 0x192004d005ULL, nullptr, nullptr, OperandInfo190, -1 ,nullptr }, // Inst #1213 = KSHIFTLBri
{ 1214, 3, 1, 0, 0, 0, 0x19a004d005ULL, nullptr, nullptr, OperandInfo191, -1 ,nullptr }, // Inst #1214 = KSHIFTLDri
{ 1215, 3, 1, 0, 0, 0, 0x99a004d005ULL, nullptr, nullptr, OperandInfo192, -1 ,nullptr }, // Inst #1215 = KSHIFTLQri
{ 1216, 3, 1, 0, 0, 0, 0x992004d005ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr }, // Inst #1216 = KSHIFTLWri
{ 1217, 3, 1, 0, 0, 0, 0x182004d005ULL, nullptr, nullptr, OperandInfo190, -1 ,nullptr }, // Inst #1217 = KSHIFTRBri
{ 1218, 3, 1, 0, 0, 0, 0x18a004d005ULL, nullptr, nullptr, OperandInfo191, -1 ,nullptr }, // Inst #1218 = KSHIFTRDri
{ 1219, 3, 1, 0, 0, 0, 0x98a004d005ULL, nullptr, nullptr, OperandInfo192, -1 ,nullptr }, // Inst #1219 = KSHIFTRQri
{ 1220, 3, 1, 0, 0, 0, 0x982004d005ULL, nullptr, nullptr, OperandInfo193, -1 ,nullptr }, // Inst #1220 = KSHIFTRWri
{ 1221, 2, 0, 0, 0, 0, 0x4ca0005005ULL, nullptr, ImplicitList6, OperandInfo166, -1 ,nullptr }, // Inst #1221 = KTESTBrr
{ 1222, 2, 0, 0, 0, 0, 0xcca0005005ULL, nullptr, ImplicitList6, OperandInfo171, -1 ,nullptr }, // Inst #1222 = KTESTDrr
{ 1223, 2, 0, 0, 0, 0, 0xcca0004805ULL, nullptr, ImplicitList6, OperandInfo176, -1 ,nullptr }, // Inst #1223 = KTESTQrr
{ 1224, 2, 0, 0, 0, 0, 0x4ca0004805ULL, nullptr, ImplicitList6, OperandInfo181, -1 ,nullptr }, // Inst #1224 = KTESTWrr
{ 1225, 3, 1, 0, 0, 0, 0x925a0005005ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr }, // Inst #1225 = KUNPCKBWrr
{ 1226, 3, 1, 0, 0, 0, 0x9a5a0004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1226 = KUNPCKDQrr
{ 1227, 3, 1, 0, 0, 0, 0x925a0004805ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr }, // Inst #1227 = KUNPCKWDrr
{ 1228, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x92320005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1228 = KXNORBrr
{ 1229, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a320005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr }, // Inst #1229 = KXNORDrr
{ 1230, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a320004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1230 = KXNORQrr
{ 1231, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x92320004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr }, // Inst #1231 = KXNORWrr
{ 1232, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x923a0005005ULL, nullptr, nullptr, OperandInfo162, -1 ,nullptr }, // Inst #1232 = KXORBrr
{ 1233, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a3a0005005ULL, nullptr, nullptr, OperandInfo163, -1 ,nullptr }, // Inst #1233 = KXORDrr
{ 1234, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x9a3a0004805ULL, nullptr, nullptr, OperandInfo164, -1 ,nullptr }, // Inst #1234 = KXORQrr
{ 1235, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x923a0004805ULL, nullptr, nullptr, OperandInfo165, -1 ,nullptr }, // Inst #1235 = KXORWrr
{ 1236, 0, 0, 0, 605, 0, 0x4f80000001ULL, ImplicitList6, ImplicitList37, nullptr, -1 ,nullptr }, // Inst #1236 = LAHF
{ 1237, 6, 1, 0, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1237 = LAR16rm
{ 1238, 2, 1, 0, 214, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100004085ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #1238 = LAR16rr
{ 1239, 6, 1, 0, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1239 = LAR32rm
{ 1240, 2, 1, 0, 214, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100004105ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1240 = LAR32rr
{ 1241, 6, 1, 0, 213, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1241 = LAR64rm
{ 1242, 2, 1, 0, 214, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x100024005ULL, nullptr, nullptr, OperandInfo194, -1 ,nullptr }, // Inst #1242 = LAR64rr
{ 1243, 6, 0, 0, 215, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882004084ULL, ImplicitList3, ImplicitList2, OperandInfo21, -1 ,nullptr }, // Inst #1243 = LCMPXCHG16
{ 1244, 5, 0, 0, 216, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6382024019ULL, ImplicitList18, ImplicitList19, OperandInfo43, -1 ,nullptr }, // Inst #1244 = LCMPXCHG16B
{ 1245, 6, 0, 0, 215, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882004104ULL, ImplicitList9, ImplicitList7, OperandInfo25, -1 ,nullptr }, // Inst #1245 = LCMPXCHG32
{ 1246, 6, 0, 0, 215, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5882024004ULL, ImplicitList10, ImplicitList8, OperandInfo29, -1 ,nullptr }, // Inst #1246 = LCMPXCHG64
{ 1247, 6, 0, 0, 217, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5802004004ULL, ImplicitList4, ImplicitList1, OperandInfo33, -1 ,nullptr }, // Inst #1247 = LCMPXCHG8
{ 1248, 5, 0, 0, 218, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6382004019ULL, ImplicitList20, ImplicitList21, OperandInfo43, -1 ,nullptr }, // Inst #1248 = LCMPXCHG8B
{ 1249, 6, 1, 0, 219, 0|(1ULL<<MCID::MayLoad), 0x7810006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1249 = LDDQUrm
{ 1250, 5, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000401aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1250 = LDMXCSR
{ 1251, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6280000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1251 = LDS16rm
{ 1252, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6280000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1252 = LDS32rm
{ 1253, 0, 0, 0, 746, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000004eULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #1253 = LD_F0
{ 1254, 0, 0, 0, 747, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000048ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #1254 = LD_F1
{ 1255, 5, 0, 0, 224, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1255 = LD_F32m
{ 1256, 5, 0, 0, 224, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000018ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1256 = LD_F64m
{ 1257, 5, 0, 0, 738, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d8000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1257 = LD_F80m
{ 1258, 1, 1, 0, 0, 0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo195, -1 ,nullptr }, // Inst #1258 = LD_Fp032
{ 1259, 1, 1, 0, 0, 0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo196, -1 ,nullptr }, // Inst #1259 = LD_Fp064
{ 1260, 1, 1, 0, 0, 0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo197, -1 ,nullptr }, // Inst #1260 = LD_Fp080
{ 1261, 1, 1, 0, 0, 0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo195, -1 ,nullptr }, // Inst #1261 = LD_Fp132
{ 1262, 1, 1, 0, 0, 0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo196, -1 ,nullptr }, // Inst #1262 = LD_Fp164
{ 1263, 1, 1, 0, 0, 0|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo197, -1 ,nullptr }, // Inst #1263 = LD_Fp180
{ 1264, 6, 1, 0, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo143, -1 ,nullptr }, // Inst #1264 = LD_Fp32m
{ 1265, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr }, // Inst #1265 = LD_Fp32m64
{ 1266, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr }, // Inst #1266 = LD_Fp32m80
{ 1267, 6, 1, 0, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400000ULL, nullptr, ImplicitList5, OperandInfo144, -1 ,nullptr }, // Inst #1267 = LD_Fp64m
{ 1268, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr }, // Inst #1268 = LD_Fp64m80
{ 1269, 6, 1, 0, 0, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x400000ULL, nullptr, ImplicitList5, OperandInfo145, -1 ,nullptr }, // Inst #1269 = LD_Fp80m
{ 1270, 1, 0, 0, 737, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000010ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #1270 = LD_Frr
{ 1271, 6, 1, 0, 227, 0, 0x4680000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1271 = LEA16r
{ 1272, 6, 1, 0, 228, 0|(1ULL<<MCID::Rematerializable), 0x4680000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1272 = LEA32r
{ 1273, 6, 1, 0, 228, 0, 0x4680000106ULL, nullptr, nullptr, OperandInfo198, -1 ,nullptr }, // Inst #1273 = LEA64_32r
{ 1274, 6, 1, 0, 228, 0|(1ULL<<MCID::Rematerializable), 0x4680020006ULL, nullptr, nullptr, OperandInfo199, -1 ,nullptr }, // Inst #1274 = LEA64r
{ 1275, 0, 0, 0, 731, 0|(1ULL<<MCID::MayLoad), 0x6480000001ULL, ImplicitList38, ImplicitList38, nullptr, -1 ,nullptr }, // Inst #1275 = LEAVE
{ 1276, 0, 0, 0, 731, 0|(1ULL<<MCID::MayLoad), 0x6480000001ULL, ImplicitList39, ImplicitList39, nullptr, -1 ,nullptr }, // Inst #1276 = LEAVE64
{ 1277, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6200000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1277 = LES16rm
{ 1278, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6200000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1278 = LES32rm
{ 1279, 0, 0, 0, 230, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004048ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1279 = LFENCE
{ 1280, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1280 = LFS16rm
{ 1281, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1281 = LFS32rm
{ 1282, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a00024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1282 = LFS64rm
{ 1283, 5, 0, 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000409aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1283 = LGDT16m
{ 1284, 5, 0, 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000411aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1284 = LGDT32m
{ 1285, 5, 0, 0, 231, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1285 = LGDT64m
{ 1286, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1286 = LGS16rm
{ 1287, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1287 = LGS32rm
{ 1288, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5a80024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1288 = LGS64rm
{ 1289, 5, 0, 0, 232, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000409bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1289 = LIDT16m
{ 1290, 5, 0, 0, 232, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000411bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1290 = LIDT32m
{ 1291, 5, 0, 0, 232, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1291 = LIDT64m
{ 1292, 5, 0, 0, 233, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x401aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1292 = LLDT16m
{ 1293, 1, 0, 0, 234, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4012ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #1293 = LLDT16r
{ 1294, 5, 0, 0, 235, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1294 = LMSW16m
{ 1295, 1, 0, 0, 236, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004016ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #1295 = LMSW16r
{ 1296, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c0098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1296 = LOCK_ADD16mi
{ 1297, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1297 = LOCK_ADD16mi8
{ 1298, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #1298 = LOCK_ADD16mr
{ 1299, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4082140118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1299 = LOCK_ADD32mi
{ 1300, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1300 = LOCK_ADD32mi8
{ 1301, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #1301 = LOCK_ADD32mr
{ 1302, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e0018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1302 = LOCK_ADD64mi32
{ 1303, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182060018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1303 = LOCK_ADD64mi8
{ 1304, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #1304 = LOCK_ADD64mr
{ 1305, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4002040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1305 = LOCK_ADD8mi
{ 1306, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x2000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #1306 = LOCK_ADD8mr
{ 1307, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1307 = LOCK_AND16mi
{ 1308, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1308 = LOCK_AND16mi8
{ 1309, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1082000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #1309 = LOCK_AND16mr
{ 1310, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x408214011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1310 = LOCK_AND32mi
{ 1311, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1311 = LOCK_AND32mi8
{ 1312, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1082000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #1312 = LOCK_AND32mr
{ 1313, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1313 = LOCK_AND64mi32
{ 1314, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418206001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1314 = LOCK_AND64mi8
{ 1315, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1082020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #1315 = LOCK_AND64mr
{ 1316, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x400204001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1316 = LOCK_AND8mi
{ 1317, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1002000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #1317 = LOCK_AND8mr
{ 1318, 5, 0, 0, 103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82000099ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1318 = LOCK_DEC16m
{ 1319, 5, 0, 0, 103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82000119ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1319 = LOCK_DEC32m
{ 1320, 5, 0, 0, 103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82020019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1320 = LOCK_DEC64m
{ 1321, 5, 0, 0, 103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f02000019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1321 = LOCK_DEC8m
{ 1322, 5, 0, 0, 103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82000098ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1322 = LOCK_INC16m
{ 1323, 5, 0, 0, 103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82000118ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1323 = LOCK_INC32m
{ 1324, 5, 0, 0, 103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f82020018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1324 = LOCK_INC64m
{ 1325, 5, 0, 0, 103, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f02000018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1325 = LOCK_INC8m
{ 1326, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c0099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1326 = LOCK_OR16mi
{ 1327, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1327 = LOCK_OR16mi8
{ 1328, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x482000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #1328 = LOCK_OR16mr
{ 1329, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4082140119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1329 = LOCK_OR32mi
{ 1330, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182040119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1330 = LOCK_OR32mi8
{ 1331, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x482000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #1331 = LOCK_OR32mr
{ 1332, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e0019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1332 = LOCK_OR64mi32
{ 1333, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4182060019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1333 = LOCK_OR64mi8
{ 1334, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x482020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #1334 = LOCK_OR64mr
{ 1335, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4002040019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1335 = LOCK_OR8mi
{ 1336, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x402000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #1336 = LOCK_OR8mr
{ 1337, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7800000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1337 = LOCK_PREFIX
{ 1338, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1338 = LOCK_SUB16mi
{ 1339, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1339 = LOCK_SUB16mi8
{ 1340, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1482000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #1340 = LOCK_SUB16mr
{ 1341, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x408214011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1341 = LOCK_SUB32mi
{ 1342, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1342 = LOCK_SUB32mi8
{ 1343, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1482000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #1343 = LOCK_SUB32mr
{ 1344, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1344 = LOCK_SUB64mi32
{ 1345, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418206001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1345 = LOCK_SUB64mi8
{ 1346, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1482020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #1346 = LOCK_SUB64mr
{ 1347, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x400204001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1347 = LOCK_SUB8mi
{ 1348, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1402000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #1348 = LOCK_SUB8mr
{ 1349, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40820c009eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1349 = LOCK_XOR16mi
{ 1350, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204009eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1350 = LOCK_XOR16mi8
{ 1351, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1882000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #1351 = LOCK_XOR16mr
{ 1352, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x408214011eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1352 = LOCK_XOR32mi
{ 1353, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418204011eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1353 = LOCK_XOR32mi8
{ 1354, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1882000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #1354 = LOCK_XOR32mr
{ 1355, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40821e001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1355 = LOCK_XOR64mi32
{ 1356, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x418206001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1356 = LOCK_XOR64mi8
{ 1357, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1882020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #1357 = LOCK_XOR64mr
{ 1358, 6, 0, 0, 237, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x400204001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1358 = LOCK_XOR8mi
{ 1359, 6, 0, 0, 238, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1802000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #1359 = LOCK_XOR8mr
{ 1360, 2, 0, 0, 717, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5600000008ULL, ImplicitList40, ImplicitList41, OperandInfo200, -1 ,nullptr }, // Inst #1360 = LODSB
{ 1361, 2, 0, 0, 718, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680000108ULL, ImplicitList40, ImplicitList42, OperandInfo200, -1 ,nullptr }, // Inst #1361 = LODSL
{ 1362, 2, 0, 0, 718, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680020008ULL, ImplicitList40, ImplicitList43, OperandInfo200, -1 ,nullptr }, // Inst #1362 = LODSQ
{ 1363, 2, 0, 0, 717, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5680000088ULL, ImplicitList40, ImplicitList44, OperandInfo200, -1 ,nullptr }, // Inst #1363 = LODSW
{ 1364, 1, 0, 0, 707, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7100080001ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1364 = LOOP
{ 1365, 1, 0, 0, 708, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7080080001ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1365 = LOOPE
{ 1366, 1, 0, 0, 709, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7000080001ULL, nullptr, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #1366 = LOOPNE
{ 1367, 1, 0, 0, 713, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501cc0101ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1367 = LRETIL
{ 1368, 1, 0, 0, 713, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501ce0001ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1368 = LRETIQ
{ 1369, 1, 0, 0, 713, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6501cc0081ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1369 = LRETIW
{ 1370, 0, 0, 0, 712, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c00101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1370 = LRETL
{ 1371, 0, 0, 0, 712, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c20001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1371 = LRETQ
{ 1372, 0, 0, 0, 712, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6581c00081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1372 = LRETW
{ 1373, 6, 1, 0, 244, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1373 = LSL16rm
{ 1374, 2, 1, 0, 245, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180004085ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #1374 = LSL16rr
{ 1375, 6, 1, 0, 244, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1375 = LSL32rm
{ 1376, 2, 1, 0, 245, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180004105ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1376 = LSL32rr
{ 1377, 6, 1, 0, 244, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1377 = LSL64rm
{ 1378, 2, 1, 0, 245, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x180024005ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #1378 = LSL64rr
{ 1379, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1379 = LSS16rm
{ 1380, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1380 = LSS32rm
{ 1381, 6, 1, 0, 221, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5900024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1381 = LSS64rm
{ 1382, 5, 0, 0, 246, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x401bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1382 = LTRm
{ 1383, 1, 0, 0, 246, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4013ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #1383 = LTRr
{ 1384, 7, 1, 0, 247, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082004086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #1384 = LXADD16
{ 1385, 7, 1, 0, 247, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082004106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #1385 = LXADD32
{ 1386, 7, 1, 0, 247, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6082024006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #1386 = LXADD64
{ 1387, 7, 1, 0, 248, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6002004006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr }, // Inst #1387 = LXADD8
{ 1388, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x5e80005886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr }, // Inst #1388 = LZCNT16rm
{ 1389, 2, 1, 0, 0, 0, 0x5e80005885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #1389 = LZCNT16rr
{ 1390, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x5e80005906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #1390 = LZCNT32rm
{ 1391, 2, 1, 0, 0, 0, 0x5e80005905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #1391 = LZCNT32rr
{ 1392, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x5e80025806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #1392 = LZCNT64rm
{ 1393, 2, 1, 0, 0, 0, 0x5e80025805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #1393 = LZCNT64rr
{ 1394, 2, 0, 0, 800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b98005005ULL, ImplicitList32, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1394 = MASKMOVDQU
{ 1395, 2, 0, 0, 800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b98005005ULL, ImplicitList45, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1395 = MASKMOVDQU64
{ 1396, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x2f90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1396 = MAXCPDrm
{ 1397, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x2f90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1397 = MAXCPDrr
{ 1398, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x2f88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1398 = MAXCPSrm
{ 1399, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x2f88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1399 = MAXCPSrr
{ 1400, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2f90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #1400 = MAXCSDrm
{ 1401, 3, 1, 0, 18, 0|(1ULL<<MCID::Commutable), 0x2f90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1401 = MAXCSDrr
{ 1402, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2f88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #1402 = MAXCSSrm
{ 1403, 3, 1, 0, 20, 0|(1ULL<<MCID::Commutable), 0x2f88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #1403 = MAXCSSrr
{ 1404, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x2f90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1404 = MAXPDrm
{ 1405, 3, 1, 0, 14, 0, 0x2f90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1405 = MAXPDrr
{ 1406, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x2f88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1406 = MAXPSrm
{ 1407, 3, 1, 0, 16, 0, 0x2f88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1407 = MAXPSrr
{ 1408, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2f90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #1408 = MAXSDrm
{ 1409, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2f90006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1409 = MAXSDrm_Int
{ 1410, 3, 1, 0, 18, 0, 0x2f90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1410 = MAXSDrr
{ 1411, 3, 1, 0, 18, 0, 0x2f90006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1411 = MAXSDrr_Int
{ 1412, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2f88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #1412 = MAXSSrm
{ 1413, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2f88005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1413 = MAXSSrm_Int
{ 1414, 3, 1, 0, 20, 0, 0x2f88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #1414 = MAXSSrr
{ 1415, 3, 1, 0, 20, 0, 0x2f88005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1415 = MAXSSrr_Int
{ 1416, 0, 0, 0, 250, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004050ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1416 = MFENCE
{ 1417, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x2e90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1417 = MINCPDrm
{ 1418, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x2e90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1418 = MINCPDrr
{ 1419, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x2e88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1419 = MINCPSrm
{ 1420, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x2e88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1420 = MINCPSrr
{ 1421, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2e90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #1421 = MINCSDrm
{ 1422, 3, 1, 0, 18, 0|(1ULL<<MCID::Commutable), 0x2e90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1422 = MINCSDrr
{ 1423, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2e88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #1423 = MINCSSrm
{ 1424, 3, 1, 0, 20, 0|(1ULL<<MCID::Commutable), 0x2e88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #1424 = MINCSSrr
{ 1425, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x2e90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1425 = MINPDrm
{ 1426, 3, 1, 0, 14, 0, 0x2e90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1426 = MINPDrr
{ 1427, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x2e88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1427 = MINPSrm
{ 1428, 3, 1, 0, 16, 0, 0x2e88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1428 = MINPSrr
{ 1429, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2e90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #1429 = MINSDrm
{ 1430, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2e90006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1430 = MINSDrm_Int
{ 1431, 3, 1, 0, 18, 0, 0x2e90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1431 = MINSDrr
{ 1432, 3, 1, 0, 18, 0, 0x2e90006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1432 = MINSDrr_Int
{ 1433, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2e88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #1433 = MINSSrm
{ 1434, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2e88005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1434 = MINSSrm_Int
{ 1435, 3, 1, 0, 20, 0, 0x2e88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #1435 = MINSSrr
{ 1436, 3, 1, 0, 20, 0, 0x2e88005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1436 = MINSSrr_Int
{ 1437, 6, 1, 0, 251, 0|(1ULL<<MCID::MayLoad), 0x1690005006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1437 = MMX_CVTPD2PIirm
{ 1438, 2, 1, 0, 890, 0, 0x1690005005ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, // Inst #1438 = MMX_CVTPD2PIirr
{ 1439, 6, 1, 0, 251, 0|(1ULL<<MCID::MayLoad), 0x1510005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1439 = MMX_CVTPI2PDirm
{ 1440, 2, 1, 0, 889, 0, 0x1510005005ULL, nullptr, nullptr, OperandInfo203, -1 ,nullptr }, // Inst #1440 = MMX_CVTPI2PDirr
{ 1441, 7, 1, 0, 253, 0|(1ULL<<MCID::MayLoad), 0x1508004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1441 = MMX_CVTPI2PSirm
{ 1442, 3, 1, 0, 254, 0, 0x1508004805ULL, nullptr, nullptr, OperandInfo204, -1 ,nullptr }, // Inst #1442 = MMX_CVTPI2PSirr
{ 1443, 6, 1, 0, 255, 0|(1ULL<<MCID::MayLoad), 0x1688004806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1443 = MMX_CVTPS2PIirm
{ 1444, 2, 1, 0, 888, 0, 0x1688004805ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, // Inst #1444 = MMX_CVTPS2PIirr
{ 1445, 6, 1, 0, 251, 0|(1ULL<<MCID::MayLoad), 0x1610005006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1445 = MMX_CVTTPD2PIirm
{ 1446, 2, 1, 0, 890, 0, 0x1610005005ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, // Inst #1446 = MMX_CVTTPD2PIirr
{ 1447, 6, 1, 0, 255, 0|(1ULL<<MCID::MayLoad), 0x1608004806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1447 = MMX_CVTTPS2PIirm
{ 1448, 2, 1, 0, 888, 0, 0x1608004805ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, // Inst #1448 = MMX_CVTTPS2PIirr
{ 1449, 0, 0, 0, 838, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3b80004801ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1449 = MMX_EMMS
{ 1450, 2, 0, 0, 799, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80004805ULL, ImplicitList32, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #1450 = MMX_MASKMOVQ
{ 1451, 2, 0, 0, 799, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7b80004805ULL, ImplicitList45, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #1451 = MMX_MASKMOVQ64
{ 1452, 6, 1, 0, 259, 0|(1ULL<<MCID::MayStore), 0x3f00024804ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr }, // Inst #1452 = MMX_MOVD64from64rm
{ 1453, 2, 1, 0, 779, 0|(1ULL<<MCID::Bitcast), 0x3f00024803ULL, nullptr, nullptr, OperandInfo207, -1 ,nullptr }, // Inst #1453 = MMX_MOVD64from64rr
{ 1454, 2, 1, 0, 779, 0, 0x3f00004803ULL, nullptr, nullptr, OperandInfo208, -1 ,nullptr }, // Inst #1454 = MMX_MOVD64grr
{ 1455, 6, 0, 0, 261, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3f00004804ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr }, // Inst #1455 = MMX_MOVD64mr
{ 1456, 6, 1, 0, 262, 0|(1ULL<<MCID::MayLoad), 0x3700004806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1456 = MMX_MOVD64rm
{ 1457, 2, 1, 0, 781, 0, 0x3700004805ULL, nullptr, nullptr, OperandInfo209, -1 ,nullptr }, // Inst #1457 = MMX_MOVD64rr
{ 1458, 6, 1, 0, 264, 0|(1ULL<<MCID::MayLoad), 0x3700024806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1458 = MMX_MOVD64to64rm
{ 1459, 2, 1, 0, 781, 0|(1ULL<<MCID::Bitcast), 0x3700024805ULL, nullptr, nullptr, OperandInfo210, -1 ,nullptr }, // Inst #1459 = MMX_MOVD64to64rr
{ 1460, 2, 1, 0, 788, 0, 0x6b00046005ULL, nullptr, nullptr, OperandInfo202, -1 ,nullptr }, // Inst #1460 = MMX_MOVDQ2Qrr
{ 1461, 2, 1, 0, 265, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00046005ULL, nullptr, nullptr, OperandInfo211, -1 ,nullptr }, // Inst #1461 = MMX_MOVFR642Qrr
{ 1462, 6, 0, 0, 266, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7380004804ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr }, // Inst #1462 = MMX_MOVNTQmr
{ 1463, 2, 1, 0, 789, 0, 0x6b00045805ULL, nullptr, nullptr, OperandInfo203, -1 ,nullptr }, // Inst #1463 = MMX_MOVQ2DQrr
{ 1464, 2, 1, 0, 267, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00045805ULL, nullptr, nullptr, OperandInfo212, -1 ,nullptr }, // Inst #1464 = MMX_MOVQ2FR64rr
{ 1465, 6, 0, 0, 266, 0|(1ULL<<MCID::MayStore), 0x3f80004804ULL, nullptr, nullptr, OperandInfo206, -1 ,nullptr }, // Inst #1465 = MMX_MOVQ64mr
{ 1466, 6, 1, 0, 264, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x3780004806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1466 = MMX_MOVQ64rm
{ 1467, 2, 1, 0, 785, 0|(1ULL<<MCID::Bitcast), 0x3780004805ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #1467 = MMX_MOVQ64rr
{ 1468, 2, 1, 0, 785, 0|(1ULL<<MCID::Bitcast), 0x3f80004803ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #1468 = MMX_MOVQ64rr_REV
{ 1469, 6, 1, 0, 268, 0|(1ULL<<MCID::MayLoad), 0xe18008806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1469 = MMX_PABSBrm64
{ 1470, 2, 1, 0, 269, 0, 0xe18008805ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #1470 = MMX_PABSBrr64
{ 1471, 6, 1, 0, 268, 0|(1ULL<<MCID::MayLoad), 0xf18008806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1471 = MMX_PABSDrm64
{ 1472, 2, 1, 0, 269, 0, 0xf18008805ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #1472 = MMX_PABSDrr64
{ 1473, 6, 1, 0, 268, 0|(1ULL<<MCID::MayLoad), 0xe98008806ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #1473 = MMX_PABSWrm64
{ 1474, 2, 1, 0, 269, 0, 0xe98008805ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #1474 = MMX_PABSWrr64
{ 1475, 7, 1, 0, 791, 0|(1ULL<<MCID::MayLoad), 0x3580004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1475 = MMX_PACKSSDWirm
{ 1476, 3, 1, 0, 790, 0, 0x3580004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1476 = MMX_PACKSSDWirr
{ 1477, 7, 1, 0, 791, 0|(1ULL<<MCID::MayLoad), 0x3180004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1477 = MMX_PACKSSWBirm
{ 1478, 3, 1, 0, 790, 0, 0x3180004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1478 = MMX_PACKSSWBirr
{ 1479, 7, 1, 0, 791, 0|(1ULL<<MCID::MayLoad), 0x3380004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1479 = MMX_PACKUSWBirm
{ 1480, 3, 1, 0, 790, 0, 0x3380004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1480 = MMX_PACKUSWBirr
{ 1481, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7e00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1481 = MMX_PADDBirm
{ 1482, 3, 1, 0, 269, 0|(1ULL<<MCID::Commutable), 0x7e00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1482 = MMX_PADDBirr
{ 1483, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7f00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1483 = MMX_PADDDirm
{ 1484, 3, 1, 0, 269, 0|(1ULL<<MCID::Commutable), 0x7f00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1484 = MMX_PADDDirr
{ 1485, 7, 1, 0, 273, 0|(1ULL<<MCID::MayLoad), 0x6a00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1485 = MMX_PADDQirm
{ 1486, 3, 1, 0, 274, 0|(1ULL<<MCID::Commutable), 0x6a00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1486 = MMX_PADDQirr
{ 1487, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7600004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1487 = MMX_PADDSBirm
{ 1488, 3, 1, 0, 269, 0|(1ULL<<MCID::Commutable), 0x7600004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1488 = MMX_PADDSBirr
{ 1489, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7680004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1489 = MMX_PADDSWirm
{ 1490, 3, 1, 0, 269, 0|(1ULL<<MCID::Commutable), 0x7680004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1490 = MMX_PADDSWirr
{ 1491, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x6e00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1491 = MMX_PADDUSBirm
{ 1492, 3, 1, 0, 269, 0|(1ULL<<MCID::Commutable), 0x6e00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1492 = MMX_PADDUSBirr
{ 1493, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x6e80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1493 = MMX_PADDUSWirm
{ 1494, 3, 1, 0, 269, 0|(1ULL<<MCID::Commutable), 0x6e80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1494 = MMX_PADDUSWirr
{ 1495, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7e80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1495 = MMX_PADDWirm
{ 1496, 3, 1, 0, 269, 0|(1ULL<<MCID::Commutable), 0x7e80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1496 = MMX_PADDWirr
{ 1497, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x79804c806ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1497 = MMX_PALIGNR64irm
{ 1498, 4, 1, 0, 276, 0, 0x79804c805ULL, nullptr, nullptr, OperandInfo216, -1 ,nullptr }, // Inst #1498 = MMX_PALIGNR64irr
{ 1499, 7, 1, 0, 277, 0|(1ULL<<MCID::MayLoad), 0x6f80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1499 = MMX_PANDNirm
{ 1500, 3, 1, 0, 278, 0, 0x6f80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1500 = MMX_PANDNirr
{ 1501, 7, 1, 0, 277, 0|(1ULL<<MCID::MayLoad), 0x6d80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1501 = MMX_PANDirm
{ 1502, 3, 1, 0, 278, 0|(1ULL<<MCID::Commutable), 0x6d80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1502 = MMX_PANDirr
{ 1503, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x7000004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1503 = MMX_PAVGBirm
{ 1504, 3, 1, 0, 280, 0|(1ULL<<MCID::Commutable), 0x7000004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1504 = MMX_PAVGBirr
{ 1505, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x7180004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1505 = MMX_PAVGWirm
{ 1506, 3, 1, 0, 280, 0|(1ULL<<MCID::Commutable), 0x7180004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1506 = MMX_PAVGWirr
{ 1507, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x3a00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1507 = MMX_PCMPEQBirm
{ 1508, 3, 1, 0, 269, 0, 0x3a00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1508 = MMX_PCMPEQBirr
{ 1509, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x3b00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1509 = MMX_PCMPEQDirm
{ 1510, 3, 1, 0, 269, 0, 0x3b00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1510 = MMX_PCMPEQDirr
{ 1511, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x3a80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1511 = MMX_PCMPEQWirm
{ 1512, 3, 1, 0, 269, 0, 0x3a80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1512 = MMX_PCMPEQWirr
{ 1513, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x3200004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1513 = MMX_PCMPGTBirm
{ 1514, 3, 1, 0, 269, 0, 0x3200004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1514 = MMX_PCMPGTBirr
{ 1515, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x3300004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1515 = MMX_PCMPGTDirm
{ 1516, 3, 1, 0, 269, 0, 0x3300004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1516 = MMX_PCMPGTDirr
{ 1517, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x3280004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1517 = MMX_PCMPGTWirm
{ 1518, 3, 1, 0, 269, 0, 0x3280004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1518 = MMX_PCMPGTWirr
{ 1519, 3, 1, 0, 806, 0, 0x6280044805ULL, nullptr, nullptr, OperandInfo217, -1 ,nullptr }, // Inst #1519 = MMX_PEXTRWirri
{ 1520, 7, 1, 0, 824, 0|(1ULL<<MCID::MayLoad), 0x198008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1520 = MMX_PHADDSWrm64
{ 1521, 3, 1, 0, 819, 0, 0x198008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1521 = MMX_PHADDSWrr64
{ 1522, 7, 1, 0, 824, 0|(1ULL<<MCID::MayLoad), 0x98008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1522 = MMX_PHADDWrm64
{ 1523, 3, 1, 0, 819, 0, 0x98008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1523 = MMX_PHADDWrr64
{ 1524, 7, 1, 0, 825, 0|(1ULL<<MCID::MayLoad), 0x118008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1524 = MMX_PHADDrm64
{ 1525, 3, 1, 0, 820, 0, 0x118008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1525 = MMX_PHADDrr64
{ 1526, 7, 1, 0, 825, 0|(1ULL<<MCID::MayLoad), 0x318008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1526 = MMX_PHSUBDrm64
{ 1527, 3, 1, 0, 820, 0, 0x318008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1527 = MMX_PHSUBDrr64
{ 1528, 7, 1, 0, 824, 0|(1ULL<<MCID::MayLoad), 0x398008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1528 = MMX_PHSUBSWrm64
{ 1529, 3, 1, 0, 819, 0, 0x398008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1529 = MMX_PHSUBSWrr64
{ 1530, 7, 1, 0, 824, 0|(1ULL<<MCID::MayLoad), 0x298008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1530 = MMX_PHSUBWrm64
{ 1531, 3, 1, 0, 819, 0, 0x298008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1531 = MMX_PHSUBWrr64
{ 1532, 8, 1, 0, 286, 0|(1ULL<<MCID::MayLoad), 0x6200044806ULL, nullptr, nullptr, OperandInfo215, -1 ,nullptr }, // Inst #1532 = MMX_PINSRWirmi
{ 1533, 4, 1, 0, 287, 0, 0x6200044805ULL, nullptr, nullptr, OperandInfo218, -1 ,nullptr }, // Inst #1533 = MMX_PINSRWirri
{ 1534, 7, 1, 0, 288, 0|(1ULL<<MCID::MayLoad), 0x218008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1534 = MMX_PMADDUBSWrm64
{ 1535, 3, 1, 0, 289, 0, 0x218008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1535 = MMX_PMADDUBSWrr64
{ 1536, 7, 1, 0, 288, 0|(1ULL<<MCID::MayLoad), 0x7a80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1536 = MMX_PMADDWDirm
{ 1537, 3, 1, 0, 289, 0|(1ULL<<MCID::Commutable), 0x7a80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1537 = MMX_PMADDWDirr
{ 1538, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x7700004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1538 = MMX_PMAXSWirm
{ 1539, 3, 1, 0, 280, 0|(1ULL<<MCID::Commutable), 0x7700004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1539 = MMX_PMAXSWirr
{ 1540, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x6f00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1540 = MMX_PMAXUBirm
{ 1541, 3, 1, 0, 280, 0|(1ULL<<MCID::Commutable), 0x6f00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1541 = MMX_PMAXUBirr
{ 1542, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x7500004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1542 = MMX_PMINSWirm
{ 1543, 3, 1, 0, 280, 0|(1ULL<<MCID::Commutable), 0x7500004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1543 = MMX_PMINSWirr
{ 1544, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x6d00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1544 = MMX_PMINUBirm
{ 1545, 3, 1, 0, 280, 0|(1ULL<<MCID::Commutable), 0x6d00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1545 = MMX_PMINUBirr
{ 1546, 2, 1, 0, 803, 0, 0x6b80004805ULL, nullptr, nullptr, OperandInfo208, -1 ,nullptr }, // Inst #1546 = MMX_PMOVMSKBrr
{ 1547, 7, 1, 0, 288, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x598008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1547 = MMX_PMULHRSWrm64
{ 1548, 3, 1, 0, 289, 0|(1ULL<<MCID::Commutable), 0x598008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1548 = MMX_PMULHRSWrr64
{ 1549, 7, 1, 0, 288, 0|(1ULL<<MCID::MayLoad), 0x7200004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1549 = MMX_PMULHUWirm
{ 1550, 3, 1, 0, 289, 0|(1ULL<<MCID::Commutable), 0x7200004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1550 = MMX_PMULHUWirr
{ 1551, 7, 1, 0, 288, 0|(1ULL<<MCID::MayLoad), 0x7280004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1551 = MMX_PMULHWirm
{ 1552, 3, 1, 0, 289, 0|(1ULL<<MCID::Commutable), 0x7280004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1552 = MMX_PMULHWirr
{ 1553, 7, 1, 0, 288, 0|(1ULL<<MCID::MayLoad), 0x6a80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1553 = MMX_PMULLWirm
{ 1554, 3, 1, 0, 289, 0|(1ULL<<MCID::Commutable), 0x6a80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1554 = MMX_PMULLWirr
{ 1555, 7, 1, 0, 288, 0|(1ULL<<MCID::MayLoad), 0x7a00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1555 = MMX_PMULUDQirm
{ 1556, 3, 1, 0, 289, 0|(1ULL<<MCID::Commutable), 0x7a00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1556 = MMX_PMULUDQirr
{ 1557, 7, 1, 0, 277, 0|(1ULL<<MCID::MayLoad), 0x7580004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1557 = MMX_PORirm
{ 1558, 3, 1, 0, 278, 0|(1ULL<<MCID::Commutable), 0x7580004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1558 = MMX_PORirr
{ 1559, 7, 1, 0, 290, 0|(1ULL<<MCID::MayLoad), 0x7b00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1559 = MMX_PSADBWirm
{ 1560, 3, 1, 0, 291, 0|(1ULL<<MCID::Commutable), 0x7b00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1560 = MMX_PSADBWirr
{ 1561, 7, 1, 0, 292, 0|(1ULL<<MCID::MayLoad), 0x18008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1561 = MMX_PSHUFBrm64
{ 1562, 3, 1, 0, 293, 0, 0x18008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1562 = MMX_PSHUFBrr64
{ 1563, 7, 1, 0, 294, 0|(1ULL<<MCID::MayLoad), 0x3800044806ULL, nullptr, nullptr, OperandInfo219, -1 ,nullptr }, // Inst #1563 = MMX_PSHUFWmi
{ 1564, 3, 1, 0, 293, 0, 0x3800044805ULL, nullptr, nullptr, OperandInfo220, -1 ,nullptr }, // Inst #1564 = MMX_PSHUFWri
{ 1565, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x418008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1565 = MMX_PSIGNBrm64
{ 1566, 3, 1, 0, 280, 0, 0x418008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1566 = MMX_PSIGNBrr64
{ 1567, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x518008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1567 = MMX_PSIGNDrm64
{ 1568, 3, 1, 0, 280, 0, 0x518008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1568 = MMX_PSIGNDrr64
{ 1569, 7, 1, 0, 279, 0|(1ULL<<MCID::MayLoad), 0x498008806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1569 = MMX_PSIGNWrm64
{ 1570, 3, 1, 0, 280, 0, 0x498008805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1570 = MMX_PSIGNWrr64
{ 1571, 3, 1, 0, 295, 0, 0x3900044816ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr }, // Inst #1571 = MMX_PSLLDri
{ 1572, 7, 1, 0, 296, 0|(1ULL<<MCID::MayLoad), 0x7900004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1572 = MMX_PSLLDrm
{ 1573, 3, 1, 0, 297, 0, 0x7900004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1573 = MMX_PSLLDrr
{ 1574, 3, 1, 0, 295, 0, 0x3980044816ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr }, // Inst #1574 = MMX_PSLLQri
{ 1575, 7, 1, 0, 296, 0|(1ULL<<MCID::MayLoad), 0x7980004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1575 = MMX_PSLLQrm
{ 1576, 3, 1, 0, 297, 0, 0x7980004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1576 = MMX_PSLLQrr
{ 1577, 3, 1, 0, 295, 0, 0x3880044816ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr }, // Inst #1577 = MMX_PSLLWri
{ 1578, 7, 1, 0, 296, 0|(1ULL<<MCID::MayLoad), 0x7880004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1578 = MMX_PSLLWrm
{ 1579, 3, 1, 0, 297, 0, 0x7880004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1579 = MMX_PSLLWrr
{ 1580, 3, 1, 0, 295, 0, 0x3900044814ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr }, // Inst #1580 = MMX_PSRADri
{ 1581, 7, 1, 0, 296, 0|(1ULL<<MCID::MayLoad), 0x7100004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1581 = MMX_PSRADrm
{ 1582, 3, 1, 0, 297, 0, 0x7100004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1582 = MMX_PSRADrr
{ 1583, 3, 1, 0, 295, 0, 0x3880044814ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr }, // Inst #1583 = MMX_PSRAWri
{ 1584, 7, 1, 0, 296, 0|(1ULL<<MCID::MayLoad), 0x7080004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1584 = MMX_PSRAWrm
{ 1585, 3, 1, 0, 297, 0, 0x7080004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1585 = MMX_PSRAWrr
{ 1586, 3, 1, 0, 295, 0, 0x3900044812ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr }, // Inst #1586 = MMX_PSRLDri
{ 1587, 7, 1, 0, 296, 0|(1ULL<<MCID::MayLoad), 0x6900004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1587 = MMX_PSRLDrm
{ 1588, 3, 1, 0, 297, 0, 0x6900004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1588 = MMX_PSRLDrr
{ 1589, 3, 1, 0, 295, 0, 0x3980044812ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr }, // Inst #1589 = MMX_PSRLQri
{ 1590, 7, 1, 0, 296, 0|(1ULL<<MCID::MayLoad), 0x6980004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1590 = MMX_PSRLQrm
{ 1591, 3, 1, 0, 297, 0, 0x6980004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1591 = MMX_PSRLQrr
{ 1592, 3, 1, 0, 295, 0, 0x3880044812ULL, nullptr, nullptr, OperandInfo221, -1 ,nullptr }, // Inst #1592 = MMX_PSRLWri
{ 1593, 7, 1, 0, 296, 0|(1ULL<<MCID::MayLoad), 0x6880004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1593 = MMX_PSRLWrm
{ 1594, 3, 1, 0, 297, 0, 0x6880004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1594 = MMX_PSRLWrr
{ 1595, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7c00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1595 = MMX_PSUBBirm
{ 1596, 3, 1, 0, 269, 0, 0x7c00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1596 = MMX_PSUBBirr
{ 1597, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7d00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1597 = MMX_PSUBDirm
{ 1598, 3, 1, 0, 269, 0, 0x7d00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1598 = MMX_PSUBDirr
{ 1599, 7, 1, 0, 273, 0|(1ULL<<MCID::MayLoad), 0x7d80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1599 = MMX_PSUBQirm
{ 1600, 3, 1, 0, 274, 0, 0x7d80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1600 = MMX_PSUBQirr
{ 1601, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7400004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1601 = MMX_PSUBSBirm
{ 1602, 3, 1, 0, 269, 0, 0x7400004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1602 = MMX_PSUBSBirr
{ 1603, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7480004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1603 = MMX_PSUBSWirm
{ 1604, 3, 1, 0, 269, 0, 0x7480004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1604 = MMX_PSUBSWirr
{ 1605, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x6c00004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1605 = MMX_PSUBUSBirm
{ 1606, 3, 1, 0, 269, 0, 0x6c00004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1606 = MMX_PSUBUSBirr
{ 1607, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x6c80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1607 = MMX_PSUBUSWirm
{ 1608, 3, 1, 0, 269, 0, 0x6c80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1608 = MMX_PSUBUSWirr
{ 1609, 7, 1, 0, 272, 0|(1ULL<<MCID::MayLoad), 0x7c80004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1609 = MMX_PSUBWirm
{ 1610, 3, 1, 0, 269, 0, 0x7c80004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1610 = MMX_PSUBWirr
{ 1611, 7, 1, 0, 298, 0|(1ULL<<MCID::MayLoad), 0x3400004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1611 = MMX_PUNPCKHBWirm
{ 1612, 3, 1, 0, 299, 0, 0x3400004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1612 = MMX_PUNPCKHBWirr
{ 1613, 7, 1, 0, 298, 0|(1ULL<<MCID::MayLoad), 0x3500004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1613 = MMX_PUNPCKHDQirm
{ 1614, 3, 1, 0, 299, 0, 0x3500004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1614 = MMX_PUNPCKHDQirr
{ 1615, 7, 1, 0, 298, 0|(1ULL<<MCID::MayLoad), 0x3480004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1615 = MMX_PUNPCKHWDirm
{ 1616, 3, 1, 0, 299, 0, 0x3480004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1616 = MMX_PUNPCKHWDirr
{ 1617, 7, 1, 0, 300, 0|(1ULL<<MCID::MayLoad), 0x3000004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1617 = MMX_PUNPCKLBWirm
{ 1618, 3, 1, 0, 301, 0, 0x3000004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1618 = MMX_PUNPCKLBWirr
{ 1619, 7, 1, 0, 300, 0|(1ULL<<MCID::MayLoad), 0x3100004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1619 = MMX_PUNPCKLDQirm
{ 1620, 3, 1, 0, 301, 0, 0x3100004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1620 = MMX_PUNPCKLDQirr
{ 1621, 7, 1, 0, 300, 0|(1ULL<<MCID::MayLoad), 0x3080004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1621 = MMX_PUNPCKLWDirm
{ 1622, 3, 1, 0, 301, 0, 0x3080004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1622 = MMX_PUNPCKLWDirr
{ 1623, 7, 1, 0, 277, 0|(1ULL<<MCID::MayLoad), 0x7780004806ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #1623 = MMX_PXORirm
{ 1624, 3, 1, 0, 278, 0|(1ULL<<MCID::Commutable), 0x7780004805ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #1624 = MMX_PXORirr
{ 1625, 7, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo222, -1 ,nullptr }, // Inst #1625 = MONITOR
{ 1626, 0, 0, 0, 302, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000405aULL, ImplicitList46, nullptr, nullptr, -1 ,nullptr }, // Inst #1626 = MONITORXrrr
{ 1627, 0, 0, 0, 302, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004028ULL, ImplicitList46, nullptr, nullptr, -1 ,nullptr }, // Inst #1627 = MONITORrrr
{ 1628, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5300004020ULL, ImplicitList47, ImplicitList48, nullptr, -1 ,nullptr }, // Inst #1628 = MONTMUL
{ 1629, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1629 = MORESTACK_RET
{ 1630, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1630 = MORESTACK_RET_RESTORE_R10
{ 1631, 2, 0, 0, 303, 0|(1ULL<<MCID::MayLoad), 0x50800c0287ULL, nullptr, ImplicitList3, OperandInfo223, -1 ,nullptr }, // Inst #1631 = MOV16ao16
{ 1632, 2, 0, 0, 303, 0|(1ULL<<MCID::MayLoad), 0x5080140487ULL, nullptr, ImplicitList3, OperandInfo223, -1 ,nullptr }, // Inst #1632 = MOV16ao32
{ 1633, 2, 0, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x5080200687ULL, nullptr, ImplicitList3, OperandInfo223, -1 ,nullptr }, // Inst #1633 = MOV16ao64
{ 1634, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x63800c0098ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #1634 = MOV16mi
{ 1635, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x4480000084ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, // Inst #1635 = MOV16mr
{ 1636, 6, 1, 0, 305, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000084ULL, nullptr, nullptr, OperandInfo224, -1 ,nullptr }, // Inst #1636 = MOV16ms
{ 1637, 2, 1, 0, 303, 0|(1ULL<<MCID::MayStore), 0x51800c0287ULL, ImplicitList3, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1637 = MOV16o16a
{ 1638, 2, 1, 0, 303, 0|(1ULL<<MCID::MayStore), 0x5180140487ULL, ImplicitList3, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1638 = MOV16o32a
{ 1639, 2, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x5180200687ULL, ImplicitList3, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1639 = MOV16o64a
{ 1640, 2, 1, 0, 306, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5c000c0082ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, // Inst #1640 = MOV16ri
{ 1641, 2, 1, 0, 306, 0, 0x63800c0090ULL, nullptr, nullptr, OperandInfo79, -1 ,nullptr }, // Inst #1641 = MOV16ri_alt
{ 1642, 6, 1, 0, 588, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580000086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1642 = MOV16rm
{ 1643, 2, 1, 0, 306, 0, 0x4480000083ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #1643 = MOV16rr
{ 1644, 2, 1, 0, 306, 0, 0x4580000085ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #1644 = MOV16rr_REV
{ 1645, 2, 1, 0, 308, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000083ULL, nullptr, nullptr, OperandInfo225, -1 ,nullptr }, // Inst #1645 = MOV16rs
{ 1646, 6, 1, 0, 309, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000086ULL, nullptr, nullptr, OperandInfo226, -1 ,nullptr }, // Inst #1646 = MOV16sm
{ 1647, 2, 1, 0, 310, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000085ULL, nullptr, nullptr, OperandInfo227, -1 ,nullptr }, // Inst #1647 = MOV16sr
{ 1648, 2, 0, 0, 303, 0|(1ULL<<MCID::MayLoad), 0x50800c0307ULL, nullptr, ImplicitList9, OperandInfo223, -1 ,nullptr }, // Inst #1648 = MOV32ao16
{ 1649, 2, 0, 0, 303, 0|(1ULL<<MCID::MayLoad), 0x5080140507ULL, nullptr, ImplicitList9, OperandInfo223, -1 ,nullptr }, // Inst #1649 = MOV32ao32
{ 1650, 2, 0, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x5080200707ULL, nullptr, ImplicitList9, OperandInfo223, -1 ,nullptr }, // Inst #1650 = MOV32ao64
{ 1651, 2, 1, 0, 311, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100004005ULL, nullptr, nullptr, OperandInfo228, -1 ,nullptr }, // Inst #1651 = MOV32cr
{ 1652, 2, 1, 0, 312, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1180004005ULL, nullptr, nullptr, OperandInfo229, -1 ,nullptr }, // Inst #1652 = MOV32dr
{ 1653, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x6380140118ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #1653 = MOV32mi
{ 1654, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x4480000104ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, // Inst #1654 = MOV32mr
{ 1655, 6, 1, 0, 305, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000104ULL, nullptr, nullptr, OperandInfo224, -1 ,nullptr }, // Inst #1655 = MOV32ms
{ 1656, 2, 1, 0, 303, 0|(1ULL<<MCID::MayStore), 0x51800c0307ULL, ImplicitList9, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1656 = MOV32o16a
{ 1657, 2, 1, 0, 303, 0|(1ULL<<MCID::MayStore), 0x5180140507ULL, ImplicitList9, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1657 = MOV32o32a
{ 1658, 2, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x5180200707ULL, ImplicitList9, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1658 = MOV32o64a
{ 1659, 1, 1, 0, 313, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr }, // Inst #1659 = MOV32r0
{ 1660, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr }, // Inst #1660 = MOV32r1
{ 1661, 1, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable), 0x0ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr }, // Inst #1661 = MOV32r_1
{ 1662, 2, 1, 0, 314, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000004003ULL, nullptr, nullptr, OperandInfo230, -1 ,nullptr }, // Inst #1662 = MOV32rc
{ 1663, 2, 1, 0, 315, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1080004003ULL, nullptr, nullptr, OperandInfo231, -1 ,nullptr }, // Inst #1663 = MOV32rd
{ 1664, 2, 1, 0, 306, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5c00140102ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #1664 = MOV32ri
{ 1665, 2, 1, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #1665 = MOV32ri64
{ 1666, 2, 1, 0, 306, 0, 0x6380140110ULL, nullptr, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #1666 = MOV32ri_alt
{ 1667, 6, 1, 0, 307, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580000106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1667 = MOV32rm
{ 1668, 2, 1, 0, 306, 0, 0x4480000103ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1668 = MOV32rr
{ 1669, 2, 1, 0, 306, 0, 0x4580000105ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1669 = MOV32rr_REV
{ 1670, 2, 1, 0, 308, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600000103ULL, nullptr, nullptr, OperandInfo232, -1 ,nullptr }, // Inst #1670 = MOV32rs
{ 1671, 6, 1, 0, 309, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000106ULL, nullptr, nullptr, OperandInfo226, -1 ,nullptr }, // Inst #1671 = MOV32sm
{ 1672, 2, 1, 0, 310, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700000105ULL, nullptr, nullptr, OperandInfo233, -1 ,nullptr }, // Inst #1672 = MOV32sr
{ 1673, 2, 0, 0, 303, 0|(1ULL<<MCID::MayLoad), 0x5080160407ULL, nullptr, ImplicitList10, OperandInfo223, -1 ,nullptr }, // Inst #1673 = MOV64ao32
{ 1674, 2, 0, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x5080220607ULL, nullptr, ImplicitList10, OperandInfo223, -1 ,nullptr }, // Inst #1674 = MOV64ao64
{ 1675, 2, 1, 0, 311, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100004005ULL, nullptr, nullptr, OperandInfo234, -1 ,nullptr }, // Inst #1675 = MOV64cr
{ 1676, 2, 1, 0, 312, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1180004005ULL, nullptr, nullptr, OperandInfo235, -1 ,nullptr }, // Inst #1676 = MOV64dr
{ 1677, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x63801e0018ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #1677 = MOV64mi32
{ 1678, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x4480020004ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #1678 = MOV64mr
{ 1679, 6, 1, 0, 305, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600020004ULL, nullptr, nullptr, OperandInfo224, -1 ,nullptr }, // Inst #1679 = MOV64ms
{ 1680, 2, 1, 0, 303, 0|(1ULL<<MCID::MayStore), 0x5180160407ULL, ImplicitList10, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1680 = MOV64o32a
{ 1681, 2, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x5180220607ULL, ImplicitList10, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1681 = MOV64o64a
{ 1682, 2, 1, 0, 314, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1000004003ULL, nullptr, nullptr, OperandInfo236, -1 ,nullptr }, // Inst #1682 = MOV64rc
{ 1683, 2, 1, 0, 315, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1080004003ULL, nullptr, nullptr, OperandInfo237, -1 ,nullptr }, // Inst #1683 = MOV64rd
{ 1684, 2, 1, 0, 306, 0|(1ULL<<MCID::Rematerializable), 0x5c00220002ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr }, // Inst #1684 = MOV64ri
{ 1685, 2, 1, 0, 306, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x63801e0010ULL, nullptr, nullptr, OperandInfo81, -1 ,nullptr }, // Inst #1685 = MOV64ri32
{ 1686, 6, 1, 0, 307, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4580020006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1686 = MOV64rm
{ 1687, 2, 1, 0, 306, 0, 0x4480020003ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #1687 = MOV64rr
{ 1688, 2, 1, 0, 306, 0, 0x4580020005ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #1688 = MOV64rr_REV
{ 1689, 2, 1, 0, 308, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4600020003ULL, nullptr, nullptr, OperandInfo238, -1 ,nullptr }, // Inst #1689 = MOV64rs
{ 1690, 6, 1, 0, 309, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700020006ULL, nullptr, nullptr, OperandInfo226, -1 ,nullptr }, // Inst #1690 = MOV64sm
{ 1691, 2, 1, 0, 310, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4700020005ULL, nullptr, nullptr, OperandInfo239, -1 ,nullptr }, // Inst #1691 = MOV64sr
{ 1692, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3700025006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1692 = MOV64toPQIrm
{ 1693, 2, 1, 0, 317, 0, 0x3700025005ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #1693 = MOV64toPQIrr
{ 1694, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3f00005806ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #1694 = MOV64toSDrm
{ 1695, 2, 1, 0, 317, 0|(1ULL<<MCID::Bitcast), 0x3700025005ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr }, // Inst #1695 = MOV64toSDrr
{ 1696, 2, 0, 0, 303, 0|(1ULL<<MCID::MayLoad), 0x50000c0207ULL, nullptr, ImplicitList4, OperandInfo223, -1 ,nullptr }, // Inst #1696 = MOV8ao16
{ 1697, 2, 0, 0, 303, 0|(1ULL<<MCID::MayLoad), 0x5000140407ULL, nullptr, ImplicitList4, OperandInfo223, -1 ,nullptr }, // Inst #1697 = MOV8ao32
{ 1698, 2, 0, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x5000200607ULL, nullptr, ImplicitList4, OperandInfo223, -1 ,nullptr }, // Inst #1698 = MOV8ao64
{ 1699, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x6300040018ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #1699 = MOV8mi
{ 1700, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x4400000004ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #1700 = MOV8mr
{ 1701, 6, 0, 0, 304, 0|(1ULL<<MCID::MayStore), 0x4400000004ULL, nullptr, nullptr, OperandInfo241, -1 ,nullptr }, // Inst #1701 = MOV8mr_NOREX
{ 1702, 2, 1, 0, 303, 0|(1ULL<<MCID::MayStore), 0x51000c0207ULL, ImplicitList4, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1702 = MOV8o16a
{ 1703, 2, 1, 0, 303, 0|(1ULL<<MCID::MayStore), 0x5100140407ULL, ImplicitList4, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1703 = MOV8o32a
{ 1704, 2, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x5100200607ULL, ImplicitList4, nullptr, OperandInfo223, -1 ,nullptr }, // Inst #1704 = MOV8o64a
{ 1705, 2, 1, 0, 306, 0|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x5800040002ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #1705 = MOV8ri
{ 1706, 2, 1, 0, 306, 0, 0x6300040010ULL, nullptr, nullptr, OperandInfo106, -1 ,nullptr }, // Inst #1706 = MOV8ri_alt
{ 1707, 6, 1, 0, 307, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4500000006ULL, nullptr, nullptr, OperandInfo19, -1 ,nullptr }, // Inst #1707 = MOV8rm
{ 1708, 6, 1, 0, 307, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4500000006ULL, nullptr, nullptr, OperandInfo242, -1 ,nullptr }, // Inst #1708 = MOV8rm_NOREX
{ 1709, 2, 1, 0, 306, 0, 0x4400000003ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr }, // Inst #1709 = MOV8rr
{ 1710, 2, 1, 0, 306, 0, 0x4400000003ULL, nullptr, nullptr, OperandInfo243, -1 ,nullptr }, // Inst #1710 = MOV8rr_NOREX
{ 1711, 2, 1, 0, 306, 0, 0x4500000005ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr }, // Inst #1711 = MOV8rr_REV
{ 1712, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x1490005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1712 = MOVAPDmr
{ 1713, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1410005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1713 = MOVAPDrm
{ 1714, 2, 1, 0, 319, 0, 0x1410005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1714 = MOVAPDrr
{ 1715, 2, 1, 0, 319, 0, 0x1490005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1715 = MOVAPDrr_REV
{ 1716, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x1488004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1716 = MOVAPSmr
{ 1717, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1408004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1717 = MOVAPSrm
{ 1718, 2, 1, 0, 319, 0, 0x1408004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1718 = MOVAPSrr
{ 1719, 2, 1, 0, 319, 0, 0x1488004803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1719 = MOVAPSrr_REV
{ 1720, 6, 0, 0, 610, 0|(1ULL<<MCID::MayStore), 0x7880008884ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, // Inst #1720 = MOVBE16mr
{ 1721, 6, 1, 0, 608, 0|(1ULL<<MCID::MayLoad), 0x7800008886ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1721 = MOVBE16rm
{ 1722, 6, 0, 0, 611, 0|(1ULL<<MCID::MayStore), 0x7880008904ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, // Inst #1722 = MOVBE32mr
{ 1723, 6, 1, 0, 609, 0|(1ULL<<MCID::MayLoad), 0x7800008906ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1723 = MOVBE32rm
{ 1724, 6, 0, 0, 612, 0|(1ULL<<MCID::MayStore), 0x7880028804ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #1724 = MOVBE64mr
{ 1725, 6, 1, 0, 608, 0|(1ULL<<MCID::MayLoad), 0x7800028806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1725 = MOVBE64rm
{ 1726, 6, 1, 0, 322, 0|(1ULL<<MCID::MayLoad), 0x910006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1726 = MOVDDUPrm
{ 1727, 2, 1, 0, 323, 0, 0x910006005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1727 = MOVDDUPrr
{ 1728, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3700005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1728 = MOVDI2PDIrm
{ 1729, 2, 1, 0, 782, 0, 0x3700005005ULL, nullptr, nullptr, OperandInfo245, -1 ,nullptr }, // Inst #1729 = MOVDI2PDIrr
{ 1730, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3700005006ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #1730 = MOVDI2SSrm
{ 1731, 2, 1, 0, 317, 0|(1ULL<<MCID::Bitcast), 0x3700005005ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr }, // Inst #1731 = MOVDI2SSrr
{ 1732, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x3f98005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1732 = MOVDQAmr
{ 1733, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x3798005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1733 = MOVDQArm
{ 1734, 2, 1, 0, 786, 0, 0x3798005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1734 = MOVDQArr
{ 1735, 2, 1, 0, 786, 0, 0x3f98005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1735 = MOVDQArr_REV
{ 1736, 6, 0, 0, 325, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3f98005804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1736 = MOVDQUmr
{ 1737, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x3798005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1737 = MOVDQUrm
{ 1738, 2, 1, 0, 787, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3798005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1738 = MOVDQUrr
{ 1739, 2, 1, 0, 787, 0, 0x3f98005803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1739 = MOVDQUrr_REV
{ 1740, 3, 1, 0, 323, 0, 0x908004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1740 = MOVHLPSrr
{ 1741, 6, 0, 0, 328, 0|(1ULL<<MCID::MayStore), 0xb90005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1741 = MOVHPDmr
{ 1742, 7, 1, 0, 329, 0|(1ULL<<MCID::MayLoad), 0xb10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1742 = MOVHPDrm
{ 1743, 6, 0, 0, 328, 0|(1ULL<<MCID::MayStore), 0xb88004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1743 = MOVHPSmr
{ 1744, 7, 1, 0, 329, 0|(1ULL<<MCID::MayLoad), 0xb08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1744 = MOVHPSrm
{ 1745, 3, 1, 0, 323, 0, 0xb08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1745 = MOVLHPSrr
{ 1746, 6, 0, 0, 328, 0|(1ULL<<MCID::MayStore), 0x990005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1746 = MOVLPDmr
{ 1747, 7, 1, 0, 329, 0|(1ULL<<MCID::MayLoad), 0x910005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1747 = MOVLPDrm
{ 1748, 6, 0, 0, 328, 0|(1ULL<<MCID::MayStore), 0x988004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1748 = MOVLPSmr
{ 1749, 7, 1, 0, 329, 0|(1ULL<<MCID::MayLoad), 0x908004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1749 = MOVLPSrm
{ 1750, 2, 1, 0, 839, 0, 0x2810005005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #1750 = MOVMSKPDrr
{ 1751, 2, 1, 0, 839, 0, 0x2808004805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #1751 = MOVMSKPSrr
{ 1752, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x1518009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1752 = MOVNTDQArm
{ 1753, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x7398005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1753 = MOVNTDQmr
{ 1754, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x6180024804ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #1754 = MOVNTI_64mr
{ 1755, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x6180004804ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, // Inst #1755 = MOVNTImr
{ 1756, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x1590005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1756 = MOVNTPDmr
{ 1757, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x1588004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1757 = MOVNTPSmr
{ 1758, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1580006004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1758 = MOVNTSD
{ 1759, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1580005804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1759 = MOVNTSS
{ 1760, 2, 1, 0, 0, 0|(1ULL<<MCID::NotDuplicable), 0x7400140000ULL, ImplicitList11, nullptr, OperandInfo80, -1 ,nullptr }, // Inst #1760 = MOVPC32r
{ 1761, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x3f00005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1761 = MOVPDI2DImr
{ 1762, 2, 1, 0, 780, 0, 0x3f00005003ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #1762 = MOVPDI2DIrr
{ 1763, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x6b18005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1763 = MOVPQI2QImr
{ 1764, 2, 1, 0, 334, 0, 0x6b00005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1764 = MOVPQI2QIrr
{ 1765, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x3f00025004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1765 = MOVPQIto64rm
{ 1766, 2, 1, 0, 333, 0, 0x3f00025003ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #1766 = MOVPQIto64rr
{ 1767, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3f18005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1767 = MOVQI2PQIrm
{ 1768, 3, 1, 0, 720, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x520000000aULL, ImplicitList17, ImplicitList49, OperandInfo108, -1 ,nullptr }, // Inst #1768 = MOVSB
{ 1769, 6, 0, 0, 336, 0|(1ULL<<MCID::MayStore), 0x890006004ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr }, // Inst #1769 = MOVSDmr
{ 1770, 6, 1, 0, 337, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x810006006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #1770 = MOVSDrm
{ 1771, 3, 1, 0, 338, 0, 0x810006005ULL, nullptr, nullptr, OperandInfo247, -1 ,nullptr }, // Inst #1771 = MOVSDrr
{ 1772, 3, 1, 0, 338, 0, 0x880006003ULL, nullptr, nullptr, OperandInfo247, -1 ,nullptr }, // Inst #1772 = MOVSDrr_REV
{ 1773, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x3f00025004ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr }, // Inst #1773 = MOVSDto64mr
{ 1774, 2, 1, 0, 333, 0|(1ULL<<MCID::Bitcast), 0x3f00025003ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr }, // Inst #1774 = MOVSDto64rr
{ 1775, 6, 1, 0, 322, 0|(1ULL<<MCID::MayLoad), 0xb08005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1775 = MOVSHDUPrm
{ 1776, 2, 1, 0, 323, 0, 0xb08005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1776 = MOVSHDUPrr
{ 1777, 3, 1, 0, 720, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x528000010aULL, ImplicitList17, ImplicitList49, OperandInfo108, -1 ,nullptr }, // Inst #1777 = MOVSL
{ 1778, 6, 1, 0, 721, 0|(1ULL<<MCID::MayLoad), 0x908005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1778 = MOVSLDUPrm
{ 1779, 2, 1, 0, 722, 0, 0x908005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1779 = MOVSLDUPrr
{ 1780, 3, 1, 0, 720, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x528002000aULL, ImplicitList17, ImplicitList49, OperandInfo108, -1 ,nullptr }, // Inst #1780 = MOVSQ
{ 1781, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x3f00005004ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr }, // Inst #1781 = MOVSS2DImr
{ 1782, 2, 1, 0, 333, 0|(1ULL<<MCID::Bitcast), 0x3f00005003ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr }, // Inst #1782 = MOVSS2DIrr
{ 1783, 6, 0, 0, 336, 0|(1ULL<<MCID::MayStore), 0x888005804ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr }, // Inst #1783 = MOVSSmr
{ 1784, 6, 1, 0, 337, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #1784 = MOVSSrm
{ 1785, 3, 1, 0, 338, 0, 0x808005805ULL, nullptr, nullptr, OperandInfo249, -1 ,nullptr }, // Inst #1785 = MOVSSrr
{ 1786, 3, 1, 0, 338, 0, 0x880005803ULL, nullptr, nullptr, OperandInfo249, -1 ,nullptr }, // Inst #1786 = MOVSSrr_REV
{ 1787, 3, 1, 0, 720, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x528000008aULL, ImplicitList17, ImplicitList49, OperandInfo108, -1 ,nullptr }, // Inst #1787 = MOVSW
{ 1788, 6, 1, 0, 339, 0|(1ULL<<MCID::MayLoad), 0x5f00004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1788 = MOVSX16rm8
{ 1789, 2, 1, 0, 340, 0, 0x5f00004085ULL, nullptr, nullptr, OperandInfo250, -1 ,nullptr }, // Inst #1789 = MOVSX16rr8
{ 1790, 6, 1, 0, 341, 0|(1ULL<<MCID::MayLoad), 0x5f00004106ULL, nullptr, nullptr, OperandInfo251, -1 ,nullptr }, // Inst #1790 = MOVSX32_NOREXrm8
{ 1791, 2, 1, 0, 342, 0, 0x5f00004105ULL, nullptr, nullptr, OperandInfo252, -1 ,nullptr }, // Inst #1791 = MOVSX32_NOREXrr8
{ 1792, 6, 1, 0, 589, 0|(1ULL<<MCID::MayLoad), 0x5f80004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1792 = MOVSX32rm16
{ 1793, 6, 1, 0, 589, 0|(1ULL<<MCID::MayLoad), 0x5f00004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1793 = MOVSX32rm8
{ 1794, 2, 1, 0, 342, 0, 0x5f80004105ULL, nullptr, nullptr, OperandInfo253, -1 ,nullptr }, // Inst #1794 = MOVSX32rr16
{ 1795, 2, 1, 0, 342, 0, 0x5f00004105ULL, nullptr, nullptr, OperandInfo254, -1 ,nullptr }, // Inst #1795 = MOVSX32rr8
{ 1796, 6, 1, 0, 341, 0|(1ULL<<MCID::MayLoad), 0x5f80024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1796 = MOVSX64rm16
{ 1797, 6, 1, 0, 341, 0|(1ULL<<MCID::MayLoad), 0x3180020006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1797 = MOVSX64rm32
{ 1798, 6, 1, 0, 341, 0|(1ULL<<MCID::MayLoad), 0x5f00024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1798 = MOVSX64rm8
{ 1799, 2, 1, 0, 342, 0, 0x5f80024005ULL, nullptr, nullptr, OperandInfo255, -1 ,nullptr }, // Inst #1799 = MOVSX64rr16
{ 1800, 2, 1, 0, 342, 0, 0x3180020005ULL, nullptr, nullptr, OperandInfo194, -1 ,nullptr }, // Inst #1800 = MOVSX64rr32
{ 1801, 2, 1, 0, 342, 0, 0x5f00024005ULL, nullptr, nullptr, OperandInfo256, -1 ,nullptr }, // Inst #1801 = MOVSX64rr8
{ 1802, 6, 0, 0, 325, 0|(1ULL<<MCID::MayStore), 0x890005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1802 = MOVUPDmr
{ 1803, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x810005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1803 = MOVUPDrm
{ 1804, 2, 1, 0, 343, 0, 0x810005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1804 = MOVUPDrr
{ 1805, 2, 1, 0, 343, 0, 0x890005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1805 = MOVUPDrr_REV
{ 1806, 6, 0, 0, 325, 0|(1ULL<<MCID::MayStore), 0x888004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #1806 = MOVUPSmr
{ 1807, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1807 = MOVUPSrm
{ 1808, 2, 1, 0, 343, 0, 0x808004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1808 = MOVUPSrr
{ 1809, 2, 1, 0, 343, 0, 0x888004803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1809 = MOVUPSrr_REV
{ 1810, 6, 1, 0, 344, 0|(1ULL<<MCID::MayLoad), 0x3f18005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1810 = MOVZPQILo2PQIrm
{ 1811, 2, 1, 0, 334, 0, 0x3f18005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1811 = MOVZPQILo2PQIrr
{ 1812, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3f18005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1812 = MOVZQI2PQIrm
{ 1813, 6, 1, 0, 345, 0|(1ULL<<MCID::MayLoad), 0x5b00004086ULL, nullptr, nullptr, OperandInfo16, -1 ,nullptr }, // Inst #1813 = MOVZX16rm8
{ 1814, 2, 1, 0, 346, 0, 0x5b00004085ULL, nullptr, nullptr, OperandInfo250, -1 ,nullptr }, // Inst #1814 = MOVZX16rr8
{ 1815, 6, 1, 0, 347, 0|(1ULL<<MCID::MayLoad), 0x5b00004106ULL, nullptr, nullptr, OperandInfo251, -1 ,nullptr }, // Inst #1815 = MOVZX32_NOREXrm8
{ 1816, 2, 1, 0, 348, 0, 0x5b00004105ULL, nullptr, nullptr, OperandInfo252, -1 ,nullptr }, // Inst #1816 = MOVZX32_NOREXrr8
{ 1817, 6, 1, 0, 590, 0|(1ULL<<MCID::MayLoad), 0x5b80004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1817 = MOVZX32rm16
{ 1818, 6, 1, 0, 590, 0|(1ULL<<MCID::MayLoad), 0x5b00004106ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #1818 = MOVZX32rm8
{ 1819, 2, 1, 0, 348, 0, 0x5b80004105ULL, nullptr, nullptr, OperandInfo253, -1 ,nullptr }, // Inst #1819 = MOVZX32rr16
{ 1820, 2, 1, 0, 348, 0, 0x5b00004105ULL, nullptr, nullptr, OperandInfo254, -1 ,nullptr }, // Inst #1820 = MOVZX32rr8
{ 1821, 6, 1, 0, 347, 0|(1ULL<<MCID::MayLoad), 0x5b80024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1821 = MOVZX64rm16
{ 1822, 6, 1, 0, 347, 0|(1ULL<<MCID::MayLoad), 0x5b00024006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #1822 = MOVZX64rm8
{ 1823, 2, 1, 0, 348, 0, 0x5b80024005ULL, nullptr, nullptr, OperandInfo255, -1 ,nullptr }, // Inst #1823 = MOVZX64rr16
{ 1824, 2, 1, 0, 348, 0, 0x5b00024005ULL, nullptr, nullptr, OperandInfo256, -1 ,nullptr }, // Inst #1824 = MOVZX64rr8
{ 1825, 8, 1, 0, 349, 0|(1ULL<<MCID::MayLoad), 0x211804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #1825 = MPSADBWrmi
{ 1826, 4, 1, 0, 350, 0, 0x211804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #1826 = MPSADBWrri
{ 1827, 5, 0, 0, 624, 0|(1ULL<<MCID::MayLoad), 0x7b8000009cULL, ImplicitList3, ImplicitList26, OperandInfo43, -1 ,nullptr }, // Inst #1827 = MUL16m
{ 1828, 1, 0, 0, 622, 0, 0x7b80000094ULL, ImplicitList3, ImplicitList26, OperandInfo82, -1 ,nullptr }, // Inst #1828 = MUL16r
{ 1829, 5, 0, 0, 631, 0|(1ULL<<MCID::MayLoad), 0x7b8000011cULL, ImplicitList9, ImplicitList21, OperandInfo43, -1 ,nullptr }, // Inst #1829 = MUL32m
{ 1830, 1, 0, 0, 629, 0, 0x7b80000114ULL, ImplicitList9, ImplicitList21, OperandInfo83, -1 ,nullptr }, // Inst #1830 = MUL32r
{ 1831, 5, 0, 0, 638, 0|(1ULL<<MCID::MayLoad), 0x7b8002001cULL, ImplicitList10, ImplicitList19, OperandInfo43, -1 ,nullptr }, // Inst #1831 = MUL64m
{ 1832, 1, 0, 0, 636, 0, 0x7b80020014ULL, ImplicitList10, ImplicitList19, OperandInfo85, -1 ,nullptr }, // Inst #1832 = MUL64r
{ 1833, 5, 0, 0, 357, 0|(1ULL<<MCID::MayLoad), 0x7b0000001cULL, ImplicitList4, ImplicitList29, OperandInfo43, -1 ,nullptr }, // Inst #1833 = MUL8m
{ 1834, 1, 0, 0, 358, 0, 0x7b00000014ULL, ImplicitList4, ImplicitList29, OperandInfo134, -1 ,nullptr }, // Inst #1834 = MUL8r
{ 1835, 7, 1, 0, 908, 0|(1ULL<<MCID::MayLoad), 0x2c90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1835 = MULPDrm
{ 1836, 3, 1, 0, 904, 0|(1ULL<<MCID::Commutable), 0x2c90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1836 = MULPDrr
{ 1837, 7, 1, 0, 908, 0|(1ULL<<MCID::MayLoad), 0x2c88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1837 = MULPSrm
{ 1838, 3, 1, 0, 905, 0|(1ULL<<MCID::Commutable), 0x2c88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1838 = MULPSrr
{ 1839, 7, 1, 0, 909, 0|(1ULL<<MCID::MayLoad), 0x2c90006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #1839 = MULSDrm
{ 1840, 7, 1, 0, 909, 0|(1ULL<<MCID::MayLoad), 0x2c90006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1840 = MULSDrm_Int
{ 1841, 3, 1, 0, 906, 0|(1ULL<<MCID::Commutable), 0x2c90006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #1841 = MULSDrr
{ 1842, 3, 1, 0, 906, 0, 0x2c90006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1842 = MULSDrr_Int
{ 1843, 7, 1, 0, 909, 0|(1ULL<<MCID::MayLoad), 0x2c88005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #1843 = MULSSrm
{ 1844, 7, 1, 0, 909, 0|(1ULL<<MCID::MayLoad), 0x2c88005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1844 = MULSSrm_Int
{ 1845, 3, 1, 0, 907, 0|(1ULL<<MCID::Commutable), 0x2c88005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #1845 = MULSSrr
{ 1846, 3, 1, 0, 907, 0, 0x2c88005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1846 = MULSSrr_Int
{ 1847, 7, 2, 0, 640, 0|(1ULL<<MCID::MayLoad), 0x17b2000a006ULL, ImplicitList50, nullptr, OperandInfo57, -1 ,nullptr }, // Inst #1847 = MULX32rm
{ 1848, 3, 2, 0, 639, 0|(1ULL<<MCID::Commutable), 0x17b2000a005ULL, ImplicitList50, nullptr, OperandInfo58, -1 ,nullptr }, // Inst #1848 = MULX32rr
{ 1849, 7, 2, 0, 642, 0|(1ULL<<MCID::MayLoad), 0x1fb2000a006ULL, ImplicitList51, nullptr, OperandInfo59, -1 ,nullptr }, // Inst #1849 = MULX64rm
{ 1850, 3, 2, 0, 641, 0|(1ULL<<MCID::Commutable), 0x1fb2000a005ULL, ImplicitList51, nullptr, OperandInfo60, -1 ,nullptr }, // Inst #1850 = MULX64rr
{ 1851, 5, 0, 0, 367, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1851 = MUL_F32m
{ 1852, 5, 0, 0, 367, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1852 = MUL_F64m
{ 1853, 5, 0, 0, 367, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1853 = MUL_FI16m
{ 1854, 5, 0, 0, 367, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000019ULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #1854 = MUL_FI32m
{ 1855, 1, 0, 0, 368, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #1855 = MUL_FPrST0
{ 1856, 1, 0, 0, 368, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #1856 = MUL_FST0r
{ 1857, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo45, -1 ,nullptr }, // Inst #1857 = MUL_Fp32
{ 1858, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #1858 = MUL_Fp32m
{ 1859, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo47, -1 ,nullptr }, // Inst #1859 = MUL_Fp64
{ 1860, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #1860 = MUL_Fp64m
{ 1861, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #1861 = MUL_Fp64m32
{ 1862, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr }, // Inst #1862 = MUL_Fp80
{ 1863, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #1863 = MUL_Fp80m32
{ 1864, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #1864 = MUL_Fp80m64
{ 1865, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #1865 = MUL_FpI16m32
{ 1866, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #1866 = MUL_FpI16m64
{ 1867, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #1867 = MUL_FpI16m80
{ 1868, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #1868 = MUL_FpI32m32
{ 1869, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #1869 = MUL_FpI32m64
{ 1870, 7, 1, 0, 367, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #1870 = MUL_FpI32m80
{ 1871, 1, 0, 0, 368, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #1871 = MUL_FrST0
{ 1872, 0, 0, 0, 369, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000405bULL, ImplicitList52, nullptr, nullptr, -1 ,nullptr }, // Inst #1872 = MWAITXrr
{ 1873, 0, 0, 0, 369, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80004029ULL, ImplicitList53, nullptr, nullptr, -1 ,nullptr }, // Inst #1873 = MWAITrr
{ 1874, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8000009bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1874 = NEG16m
{ 1875, 2, 1, 0, 104, 0, 0x7b80000093ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #1875 = NEG16r
{ 1876, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8000011bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1876 = NEG32m
{ 1877, 2, 1, 0, 104, 0, 0x7b80000113ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #1877 = NEG32r
{ 1878, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8002001bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1878 = NEG64m
{ 1879, 2, 1, 0, 104, 0, 0x7b80020013ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #1879 = NEG64r
{ 1880, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b0000001bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #1880 = NEG8m
{ 1881, 2, 1, 0, 104, 0, 0x7b00000013ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #1881 = NEG8r
{ 1882, 0, 0, 0, 370, 0, 0x4800000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #1882 = NOOP
{ 1883, 5, 0, 0, 370, 0, 0xc0000409cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1883 = NOOP18_16m4
{ 1884, 5, 0, 0, 370, 0, 0xc0000409dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1884 = NOOP18_16m5
{ 1885, 5, 0, 0, 370, 0, 0xc0000409eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1885 = NOOP18_16m6
{ 1886, 5, 0, 0, 370, 0, 0xc0000409fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1886 = NOOP18_16m7
{ 1887, 1, 0, 0, 370, 0, 0xc00004094ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #1887 = NOOP18_16r4
{ 1888, 1, 0, 0, 370, 0, 0xc00004095ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #1888 = NOOP18_16r5
{ 1889, 1, 0, 0, 370, 0, 0xc00004096ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #1889 = NOOP18_16r6
{ 1890, 1, 0, 0, 370, 0, 0xc00004097ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #1890 = NOOP18_16r7
{ 1891, 5, 0, 0, 370, 0, 0xc0000411cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1891 = NOOP18_m4
{ 1892, 5, 0, 0, 370, 0, 0xc0000411dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1892 = NOOP18_m5
{ 1893, 5, 0, 0, 370, 0, 0xc0000411eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1893 = NOOP18_m6
{ 1894, 5, 0, 0, 370, 0, 0xc0000411fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1894 = NOOP18_m7
{ 1895, 1, 0, 0, 370, 0, 0xc00004114ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #1895 = NOOP18_r4
{ 1896, 1, 0, 0, 370, 0, 0xc00004115ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #1896 = NOOP18_r5
{ 1897, 1, 0, 0, 370, 0, 0xc00004116ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #1897 = NOOP18_r6
{ 1898, 1, 0, 0, 370, 0, 0xc00004117ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #1898 = NOOP18_r7
{ 1899, 2, 0, 0, 370, 0, 0xc80004105ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #1899 = NOOP19rr
{ 1900, 5, 0, 0, 370, 0, 0xf8000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1900 = NOOPL
{ 1901, 5, 0, 0, 370, 0, 0xc8000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1901 = NOOPL_19
{ 1902, 5, 0, 0, 370, 0, 0xe0000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1902 = NOOPL_1c
{ 1903, 5, 0, 0, 370, 0, 0xe8000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1903 = NOOPL_1d
{ 1904, 5, 0, 0, 370, 0, 0xf0000410fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1904 = NOOPL_1e
{ 1905, 5, 0, 0, 370, 0, 0xf8000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1905 = NOOPW
{ 1906, 5, 0, 0, 370, 0, 0xc8000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1906 = NOOPW_19
{ 1907, 5, 0, 0, 370, 0, 0xe0000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1907 = NOOPW_1c
{ 1908, 5, 0, 0, 370, 0, 0xe8000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1908 = NOOPW_1d
{ 1909, 5, 0, 0, 370, 0, 0xf0000408fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1909 = NOOPW_1e
{ 1910, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8000009aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1910 = NOT16m
{ 1911, 2, 1, 0, 104, 0, 0x7b80000092ULL, nullptr, nullptr, OperandInfo132, -1 ,nullptr }, // Inst #1911 = NOT16r
{ 1912, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8000011aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1912 = NOT32m
{ 1913, 2, 1, 0, 104, 0, 0x7b80000112ULL, nullptr, nullptr, OperandInfo77, -1 ,nullptr }, // Inst #1913 = NOT32r
{ 1914, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b8002001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1914 = NOT64m
{ 1915, 2, 1, 0, 104, 0, 0x7b80020012ULL, nullptr, nullptr, OperandInfo78, -1 ,nullptr }, // Inst #1915 = NOT64r
{ 1916, 5, 0, 0, 617, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7b0000001aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #1916 = NOT8m
{ 1917, 2, 1, 0, 104, 0, 0x7b00000012ULL, nullptr, nullptr, OperandInfo133, -1 ,nullptr }, // Inst #1917 = NOT8r
{ 1918, 1, 0, 0, 9, 0, 0x6800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #1918 = OR16i16
{ 1919, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c0099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1919 = OR16mi
{ 1920, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1920 = OR16mi8
{ 1921, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #1921 = OR16mr
{ 1922, 3, 1, 0, 9, 0, 0x40800c0091ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #1922 = OR16ri
{ 1923, 3, 1, 0, 9, 0, 0x4180040091ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #1923 = OR16ri8
{ 1924, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x580000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #1924 = OR16rm
{ 1925, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x480000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #1925 = OR16rr
{ 1926, 3, 1, 0, 9, 0, 0x580000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #1926 = OR16rr_REV
{ 1927, 1, 0, 0, 9, 0, 0x680140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr }, // Inst #1927 = OR32i32
{ 1928, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4080140119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1928 = OR32mi
{ 1929, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180040119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1929 = OR32mi8
{ 1930, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #1930 = OR32mr
{ 1931, 6, 0, 0, 652, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x482000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #1931 = OR32mrLocked
{ 1932, 3, 1, 0, 9, 0, 0x4080140111ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #1932 = OR32ri
{ 1933, 3, 1, 0, 9, 0, 0x4180040111ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #1933 = OR32ri8
{ 1934, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x580000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #1934 = OR32rm
{ 1935, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x480000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #1935 = OR32rr
{ 1936, 3, 1, 0, 9, 0, 0x580000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #1936 = OR32rr_REV
{ 1937, 1, 0, 0, 9, 0, 0x6801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr }, // Inst #1937 = OR64i32
{ 1938, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e0019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1938 = OR64mi32
{ 1939, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4180060019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1939 = OR64mi8
{ 1940, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x480020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #1940 = OR64mr
{ 1941, 3, 1, 0, 9, 0, 0x40801e0011ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #1941 = OR64ri32
{ 1942, 3, 1, 0, 9, 0, 0x4180060011ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #1942 = OR64ri8
{ 1943, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x580020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #1943 = OR64rm
{ 1944, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x480020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #1944 = OR64rr
{ 1945, 3, 1, 0, 9, 0, 0x580020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #1945 = OR64rr_REV
{ 1946, 1, 0, 0, 9, 0, 0x600040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr }, // Inst #1946 = OR8i8
{ 1947, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000040019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1947 = OR8mi
{ 1948, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4100040019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #1948 = OR8mi8
{ 1949, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #1949 = OR8mr
{ 1950, 3, 1, 0, 9, 0, 0x4000040011ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #1950 = OR8ri
{ 1951, 3, 1, 0, 9, 0, 0x4100040011ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #1951 = OR8ri8
{ 1952, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x500000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr }, // Inst #1952 = OR8rm
{ 1953, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x400000003ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #1953 = OR8rr
{ 1954, 3, 1, 0, 9, 0, 0x500000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #1954 = OR8rr_REV
{ 1955, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x2b10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1955 = ORPDrm
{ 1956, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x2b10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1956 = ORPDrr
{ 1957, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x2b08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1957 = ORPSrm
{ 1958, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x2b08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1958 = ORPSrr
{ 1959, 1, 0, 0, 371, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7380040081ULL, ImplicitList3, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1959 = OUT16ir
{ 1960, 0, 0, 0, 372, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7780000081ULL, ImplicitList54, nullptr, nullptr, -1 ,nullptr }, // Inst #1960 = OUT16rr
{ 1961, 1, 0, 0, 371, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7380040101ULL, ImplicitList9, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1961 = OUT32ir
{ 1962, 0, 0, 0, 372, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7780000101ULL, ImplicitList55, nullptr, nullptr, -1 ,nullptr }, // Inst #1962 = OUT32rr
{ 1963, 1, 0, 0, 371, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7300040001ULL, ImplicitList4, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #1963 = OUT8ir
{ 1964, 0, 0, 0, 372, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7700000001ULL, ImplicitList56, nullptr, nullptr, -1 ,nullptr }, // Inst #1964 = OUT8rr
{ 1965, 2, 0, 0, 373, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3700000008ULL, ImplicitList57, ImplicitList58, OperandInfo200, -1 ,nullptr }, // Inst #1965 = OUTSB
{ 1966, 2, 0, 0, 373, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000108ULL, ImplicitList57, ImplicitList58, OperandInfo200, -1 ,nullptr }, // Inst #1966 = OUTSL
{ 1967, 2, 0, 0, 373, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3780000088ULL, ImplicitList57, ImplicitList58, OperandInfo200, -1 ,nullptr }, // Inst #1967 = OUTSW
{ 1968, 6, 1, 0, 374, 0|(1ULL<<MCID::MayLoad), 0xe18009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1968 = PABSBrm128
{ 1969, 2, 1, 0, 375, 0, 0xe18009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1969 = PABSBrr128
{ 1970, 6, 1, 0, 374, 0|(1ULL<<MCID::MayLoad), 0xf18009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1970 = PABSDrm128
{ 1971, 2, 1, 0, 375, 0, 0xf18009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1971 = PABSDrr128
{ 1972, 6, 1, 0, 374, 0|(1ULL<<MCID::MayLoad), 0xe98009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #1972 = PABSWrm128
{ 1973, 2, 1, 0, 375, 0, 0xe98009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #1973 = PABSWrr128
{ 1974, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x3598005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1974 = PACKSSDWrm
{ 1975, 3, 1, 0, 276, 0, 0x3598005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1975 = PACKSSDWrr
{ 1976, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x3198005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1976 = PACKSSWBrm
{ 1977, 3, 1, 0, 276, 0, 0x3198005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1977 = PACKSSWBrr
{ 1978, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x1598009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1978 = PACKUSDWrm
{ 1979, 3, 1, 0, 276, 0, 0x1598009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1979 = PACKUSDWrr
{ 1980, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x3398005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1980 = PACKUSWBrm
{ 1981, 3, 1, 0, 276, 0, 0x3398005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1981 = PACKUSWBrr
{ 1982, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7e18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1982 = PADDBrm
{ 1983, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7e18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1983 = PADDBrr
{ 1984, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7f18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1984 = PADDDrm
{ 1985, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7f18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1985 = PADDDrr
{ 1986, 7, 1, 0, 378, 0|(1ULL<<MCID::MayLoad), 0x6a18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1986 = PADDQrm
{ 1987, 3, 1, 0, 379, 0|(1ULL<<MCID::Commutable), 0x6a18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1987 = PADDQrr
{ 1988, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7618005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1988 = PADDSBrm
{ 1989, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7618005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1989 = PADDSBrr
{ 1990, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7698005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1990 = PADDSWrm
{ 1991, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7698005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1991 = PADDSWrr
{ 1992, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x6e18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1992 = PADDUSBrm
{ 1993, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x6e18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1993 = PADDUSBrr
{ 1994, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x6e98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1994 = PADDUSWrm
{ 1995, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x6e98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1995 = PADDUSWrr
{ 1996, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7e98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #1996 = PADDWrm
{ 1997, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7e98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #1997 = PADDWrr
{ 1998, 8, 1, 0, 380, 0|(1ULL<<MCID::MayLoad), 0x79804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #1998 = PALIGNR128rm
{ 1999, 4, 1, 0, 381, 0, 0x79804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #1999 = PALIGNR128rr
{ 2000, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x6f98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2000 = PANDNrm
{ 2001, 3, 1, 0, 383, 0, 0x6f98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2001 = PANDNrr
{ 2002, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x6d98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2002 = PANDrm
{ 2003, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x6d98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2003 = PANDrr
{ 2004, 0, 0, 0, 730, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4800001801ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2004 = PAUSE
{ 2005, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7018005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2005 = PAVGBrm
{ 2006, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7018005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2006 = PAVGBrr
{ 2007, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005f80004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2007 = PAVGUSBrm
{ 2008, 3, 1, 0, 0, 0, 0x100005f80004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2008 = PAVGUSBrr
{ 2009, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7198005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2009 = PAVGWrm
{ 2010, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7198005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2010 = PAVGWrr
{ 2011, 7, 1, 0, 385, 0|(1ULL<<MCID::MayLoad), 0x818009006ULL, ImplicitList15, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2011 = PBLENDVBrm0
{ 2012, 3, 1, 0, 386, 0, 0x818009005ULL, ImplicitList15, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2012 = PBLENDVBrr0
{ 2013, 8, 1, 0, 795, 0|(1ULL<<MCID::MayLoad), 0x71804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2013 = PBLENDWrmi
{ 2014, 4, 1, 0, 793, 0|(1ULL<<MCID::Commutable), 0x71804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #2014 = PBLENDWrri
{ 2015, 8, 1, 0, 389, 0|(1ULL<<MCID::MayLoad), 0x221804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2015 = PCLMULQDQrm
{ 2016, 4, 1, 0, 390, 0|(1ULL<<MCID::Commutable), 0x221804d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #2016 = PCLMULQDQrr
{ 2017, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x3a18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2017 = PCMPEQBrm
{ 2018, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x3a18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2018 = PCMPEQBrr
{ 2019, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x3b18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2019 = PCMPEQDrm
{ 2020, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x3b18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2020 = PCMPEQDrr
{ 2021, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1498009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2021 = PCMPEQQrm
{ 2022, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1498009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2022 = PCMPEQQrr
{ 2023, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x3a98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2023 = PCMPEQWrm
{ 2024, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x3a98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2024 = PCMPEQWrr
{ 2025, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo257, -1 ,nullptr }, // Inst #2025 = PCMPESTRIMEM
{ 2026, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo258, -1 ,nullptr }, // Inst #2026 = PCMPESTRIREG
{ 2027, 7, 0, 0, 393, 0|(1ULL<<MCID::MayLoad), 0x309804d006ULL, ImplicitList16, ImplicitList59, OperandInfo55, -1 ,nullptr }, // Inst #2027 = PCMPESTRIrm
{ 2028, 3, 0, 0, 394, 0, 0x309804d005ULL, ImplicitList16, ImplicitList59, OperandInfo56, -1 ,nullptr }, // Inst #2028 = PCMPESTRIrr
{ 2029, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo152, -1 ,nullptr }, // Inst #2029 = PCMPESTRM128MEM
{ 2030, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo101, -1 ,nullptr }, // Inst #2030 = PCMPESTRM128REG
{ 2031, 7, 0, 0, 395, 0|(1ULL<<MCID::MayLoad), 0x301804d006ULL, ImplicitList16, ImplicitList60, OperandInfo55, -1 ,nullptr }, // Inst #2031 = PCMPESTRM128rm
{ 2032, 3, 0, 0, 396, 0, 0x301804d005ULL, ImplicitList16, ImplicitList60, OperandInfo56, -1 ,nullptr }, // Inst #2032 = PCMPESTRM128rr
{ 2033, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x3218005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2033 = PCMPGTBrm
{ 2034, 3, 1, 0, 377, 0, 0x3218005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2034 = PCMPGTBrr
{ 2035, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x3318005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2035 = PCMPGTDrm
{ 2036, 3, 1, 0, 377, 0, 0x3318005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2036 = PCMPGTDrr
{ 2037, 7, 1, 0, 830, 0|(1ULL<<MCID::MayLoad), 0x1b98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2037 = PCMPGTQrm
{ 2038, 3, 1, 0, 829, 0, 0x1b98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2038 = PCMPGTQrr
{ 2039, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x3298005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2039 = PCMPGTWrm
{ 2040, 3, 1, 0, 377, 0, 0x3298005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2040 = PCMPGTWrr
{ 2041, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo257, -1 ,nullptr }, // Inst #2041 = PCMPISTRIMEM
{ 2042, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo258, -1 ,nullptr }, // Inst #2042 = PCMPISTRIREG
{ 2043, 7, 0, 0, 397, 0|(1ULL<<MCID::MayLoad), 0x319804d006ULL, nullptr, ImplicitList59, OperandInfo55, -1 ,nullptr }, // Inst #2043 = PCMPISTRIrm
{ 2044, 3, 0, 0, 398, 0, 0x319804d005ULL, nullptr, ImplicitList59, OperandInfo56, -1 ,nullptr }, // Inst #2044 = PCMPISTRIrr
{ 2045, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo152, -1 ,nullptr }, // Inst #2045 = PCMPISTRM128MEM
{ 2046, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo101, -1 ,nullptr }, // Inst #2046 = PCMPISTRM128REG
{ 2047, 7, 0, 0, 399, 0|(1ULL<<MCID::MayLoad), 0x311804d006ULL, nullptr, ImplicitList60, OperandInfo55, -1 ,nullptr }, // Inst #2047 = PCMPISTRM128rm
{ 2048, 3, 0, 0, 400, 0, 0x311804d005ULL, nullptr, ImplicitList60, OperandInfo56, -1 ,nullptr }, // Inst #2048 = PCMPISTRM128rr
{ 2049, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005058ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2049 = PCOMMIT
{ 2050, 7, 1, 0, 705, 0|(1ULL<<MCID::MayLoad), 0x17aa000a006ULL, nullptr, nullptr, OperandInfo57, -1 ,nullptr }, // Inst #2050 = PDEP32rm
{ 2051, 3, 1, 0, 704, 0, 0x17aa000a005ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr }, // Inst #2051 = PDEP32rr
{ 2052, 7, 1, 0, 705, 0|(1ULL<<MCID::MayLoad), 0x1faa000a006ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, // Inst #2052 = PDEP64rm
{ 2053, 3, 1, 0, 704, 0, 0x1faa000a005ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, // Inst #2053 = PDEP64rr
{ 2054, 7, 1, 0, 705, 0|(1ULL<<MCID::MayLoad), 0x17aa0009806ULL, nullptr, nullptr, OperandInfo57, -1 ,nullptr }, // Inst #2054 = PEXT32rm
{ 2055, 3, 1, 0, 704, 0, 0x17aa0009805ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr }, // Inst #2055 = PEXT32rr
{ 2056, 7, 1, 0, 705, 0|(1ULL<<MCID::MayLoad), 0x1faa0009806ULL, nullptr, nullptr, OperandInfo59, -1 ,nullptr }, // Inst #2056 = PEXT64rm
{ 2057, 3, 1, 0, 704, 0, 0x1faa0009805ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, // Inst #2057 = PEXT64rr
{ 2058, 7, 0, 0, 808, 0|(1ULL<<MCID::MayStore), 0xa1804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #2058 = PEXTRBmr
{ 2059, 3, 1, 0, 807, 0, 0xa1804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #2059 = PEXTRBrr
{ 2060, 7, 0, 0, 808, 0|(1ULL<<MCID::MayStore), 0xb1804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #2060 = PEXTRDmr
{ 2061, 3, 1, 0, 807, 0, 0xb1804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #2061 = PEXTRDrr
{ 2062, 7, 0, 0, 808, 0|(1ULL<<MCID::MayStore), 0xb1806d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #2062 = PEXTRQmr
{ 2063, 3, 1, 0, 807, 0, 0xb1806d003ULL, nullptr, nullptr, OperandInfo259, -1 ,nullptr }, // Inst #2063 = PEXTRQrr
{ 2064, 7, 0, 0, 808, 0|(1ULL<<MCID::MayStore), 0xa9804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #2064 = PEXTRWmr
{ 2065, 3, 1, 0, 402, 0, 0x6298045005ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #2065 = PEXTRWri
{ 2066, 3, 1, 0, 807, 0, 0xa9804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #2066 = PEXTRWrr_REV
{ 2067, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100000e80004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #2067 = PF2IDrm
{ 2068, 2, 1, 0, 0, 0, 0x100000e80004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #2068 = PF2IDrr
{ 2069, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100000e00004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #2069 = PF2IWrm
{ 2070, 2, 1, 0, 0, 0, 0x100000e00004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #2070 = PF2IWrr
{ 2071, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005700004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2071 = PFACCrm
{ 2072, 3, 1, 0, 0, 0, 0x100005700004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2072 = PFACCrr
{ 2073, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100004f00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2073 = PFADDrm
{ 2074, 3, 1, 0, 0, 0, 0x100004f00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2074 = PFADDrr
{ 2075, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005800004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2075 = PFCMPEQrm
{ 2076, 3, 1, 0, 0, 0, 0x100005800004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2076 = PFCMPEQrr
{ 2077, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100004800004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2077 = PFCMPGErm
{ 2078, 3, 1, 0, 0, 0, 0x100004800004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2078 = PFCMPGErr
{ 2079, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005000004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2079 = PFCMPGTrm
{ 2080, 3, 1, 0, 0, 0, 0x100005000004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2080 = PFCMPGTrr
{ 2081, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005200004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2081 = PFMAXrm
{ 2082, 3, 1, 0, 0, 0, 0x100005200004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2082 = PFMAXrr
{ 2083, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100004a00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2083 = PFMINrm
{ 2084, 3, 1, 0, 0, 0, 0x100004a00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2084 = PFMINrr
{ 2085, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005a00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2085 = PFMULrm
{ 2086, 3, 1, 0, 0, 0, 0x100005a00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2086 = PFMULrr
{ 2087, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100004500004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2087 = PFNACCrm
{ 2088, 3, 1, 0, 0, 0, 0x100004500004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2088 = PFNACCrr
{ 2089, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100004700004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2089 = PFPNACCrm
{ 2090, 3, 1, 0, 0, 0, 0x100004700004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2090 = PFPNACCrr
{ 2091, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005300004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2091 = PFRCPIT1rm
{ 2092, 3, 1, 0, 0, 0, 0x100005300004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2092 = PFRCPIT1rr
{ 2093, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005b00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2093 = PFRCPIT2rm
{ 2094, 3, 1, 0, 0, 0, 0x100005b00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2094 = PFRCPIT2rr
{ 2095, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100004b00004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #2095 = PFRCPrm
{ 2096, 2, 1, 0, 0, 0, 0x100004b00004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #2096 = PFRCPrr
{ 2097, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005380004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2097 = PFRSQIT1rm
{ 2098, 3, 1, 0, 0, 0, 0x100005380004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2098 = PFRSQIT1rr
{ 2099, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100004b80004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #2099 = PFRSQRTrm
{ 2100, 2, 1, 0, 0, 0, 0x100004b80004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #2100 = PFRSQRTrr
{ 2101, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005500004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2101 = PFSUBRrm
{ 2102, 3, 1, 0, 0, 0, 0x100005500004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2102 = PFSUBRrr
{ 2103, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100004d00004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2103 = PFSUBrm
{ 2104, 3, 1, 0, 0, 0, 0x100004d00004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2104 = PFSUBrr
{ 2105, 7, 1, 0, 826, 0|(1ULL<<MCID::MayLoad), 0x118009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2105 = PHADDDrm
{ 2106, 3, 1, 0, 821, 0, 0x118009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2106 = PHADDDrr
{ 2107, 7, 1, 0, 827, 0|(1ULL<<MCID::MayLoad), 0x198009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2107 = PHADDSWrm128
{ 2108, 3, 1, 0, 822, 0, 0x198009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2108 = PHADDSWrr128
{ 2109, 7, 1, 0, 828, 0|(1ULL<<MCID::MayLoad), 0x98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2109 = PHADDWrm
{ 2110, 3, 1, 0, 823, 0, 0x98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2110 = PHADDWrr
{ 2111, 6, 1, 0, 407, 0|(1ULL<<MCID::MayLoad), 0x2098009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2111 = PHMINPOSUWrm128
{ 2112, 2, 1, 0, 408, 0, 0x2098009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2112 = PHMINPOSUWrr128
{ 2113, 7, 1, 0, 826, 0|(1ULL<<MCID::MayLoad), 0x318009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2113 = PHSUBDrm
{ 2114, 3, 1, 0, 821, 0, 0x318009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2114 = PHSUBDrr
{ 2115, 7, 1, 0, 827, 0|(1ULL<<MCID::MayLoad), 0x398009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2115 = PHSUBSWrm128
{ 2116, 3, 1, 0, 822, 0, 0x398009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2116 = PHSUBSWrr128
{ 2117, 7, 1, 0, 828, 0|(1ULL<<MCID::MayLoad), 0x298009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2117 = PHSUBWrm
{ 2118, 3, 1, 0, 823, 0, 0x298009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2118 = PHSUBWrr
{ 2119, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100000680004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #2119 = PI2FDrm
{ 2120, 2, 1, 0, 0, 0, 0x100000680004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #2120 = PI2FDrr
{ 2121, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100000600004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #2121 = PI2FWrm
{ 2122, 2, 1, 0, 0, 0, 0x100000600004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #2122 = PI2FWrr
{ 2123, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x101804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2123 = PINSRBrm
{ 2124, 4, 1, 0, 276, 0, 0x101804d005ULL, nullptr, nullptr, OperandInfo260, -1 ,nullptr }, // Inst #2124 = PINSRBrr
{ 2125, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x111804d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2125 = PINSRDrm
{ 2126, 4, 1, 0, 276, 0, 0x111804d005ULL, nullptr, nullptr, OperandInfo260, -1 ,nullptr }, // Inst #2126 = PINSRDrr
{ 2127, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x111806d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2127 = PINSRQrm
{ 2128, 4, 1, 0, 276, 0, 0x111806d005ULL, nullptr, nullptr, OperandInfo261, -1 ,nullptr }, // Inst #2128 = PINSRQrr
{ 2129, 8, 1, 0, 409, 0|(1ULL<<MCID::MayLoad), 0x6218045006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2129 = PINSRWrmi
{ 2130, 4, 1, 0, 410, 0, 0x6218045005ULL, nullptr, nullptr, OperandInfo260, -1 ,nullptr }, // Inst #2130 = PINSRWrri
{ 2131, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x218009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2131 = PMADDUBSWrm128
{ 2132, 3, 1, 0, 408, 0, 0x218009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2132 = PMADDUBSWrr128
{ 2133, 7, 1, 0, 412, 0|(1ULL<<MCID::MayLoad), 0x7a98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2133 = PMADDWDrm
{ 2134, 3, 1, 0, 413, 0|(1ULL<<MCID::Commutable), 0x7a98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2134 = PMADDWDrr
{ 2135, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1e18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2135 = PMAXSBrm
{ 2136, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1e18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2136 = PMAXSBrr
{ 2137, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1e98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2137 = PMAXSDrm
{ 2138, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1e98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2138 = PMAXSDrr
{ 2139, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7718005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2139 = PMAXSWrm
{ 2140, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7718005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2140 = PMAXSWrr
{ 2141, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x6f18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2141 = PMAXUBrm
{ 2142, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x6f18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2142 = PMAXUBrr
{ 2143, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1f98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2143 = PMAXUDrm
{ 2144, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1f98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2144 = PMAXUDrr
{ 2145, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1f18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2145 = PMAXUWrm
{ 2146, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1f18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2146 = PMAXUWrr
{ 2147, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1c18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2147 = PMINSBrm
{ 2148, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1c18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2148 = PMINSBrr
{ 2149, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1c98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2149 = PMINSDrm
{ 2150, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1c98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2150 = PMINSDrr
{ 2151, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7518005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2151 = PMINSWrm
{ 2152, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x7518005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2152 = PMINSWrr
{ 2153, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x6d18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2153 = PMINUBrm
{ 2154, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x6d18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2154 = PMINUBrr
{ 2155, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1d98009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2155 = PMINUDrm
{ 2156, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1d98009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2156 = PMINUDrr
{ 2157, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x1d18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2157 = PMINUWrm
{ 2158, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x1d18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2158 = PMINUWrr
{ 2159, 2, 1, 0, 804, 0, 0x6b98005005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #2159 = PMOVMSKBrr
{ 2160, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1098009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2160 = PMOVSXBDrm
{ 2161, 2, 1, 0, 415, 0, 0x1098009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2161 = PMOVSXBDrr
{ 2162, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1118009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2162 = PMOVSXBQrm
{ 2163, 2, 1, 0, 415, 0, 0x1118009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2163 = PMOVSXBQrr
{ 2164, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1018009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2164 = PMOVSXBWrm
{ 2165, 2, 1, 0, 415, 0, 0x1018009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2165 = PMOVSXBWrr
{ 2166, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1298009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2166 = PMOVSXDQrm
{ 2167, 2, 1, 0, 415, 0, 0x1298009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2167 = PMOVSXDQrr
{ 2168, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1198009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2168 = PMOVSXWDrm
{ 2169, 2, 1, 0, 415, 0, 0x1198009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2169 = PMOVSXWDrr
{ 2170, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1218009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2170 = PMOVSXWQrm
{ 2171, 2, 1, 0, 415, 0, 0x1218009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2171 = PMOVSXWQrr
{ 2172, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1898009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2172 = PMOVZXBDrm
{ 2173, 2, 1, 0, 415, 0, 0x1898009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2173 = PMOVZXBDrr
{ 2174, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1918009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2174 = PMOVZXBQrm
{ 2175, 2, 1, 0, 415, 0, 0x1918009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2175 = PMOVZXBQrr
{ 2176, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1818009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2176 = PMOVZXBWrm
{ 2177, 2, 1, 0, 415, 0, 0x1818009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2177 = PMOVZXBWrr
{ 2178, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1a98009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2178 = PMOVZXDQrm
{ 2179, 2, 1, 0, 415, 0, 0x1a98009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2179 = PMOVZXDQrr
{ 2180, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1998009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2180 = PMOVZXWDrm
{ 2181, 2, 1, 0, 415, 0, 0x1998009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2181 = PMOVZXWDrr
{ 2182, 6, 1, 0, 414, 0|(1ULL<<MCID::MayLoad), 0x1a18009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2182 = PMOVZXWQrm
{ 2183, 2, 1, 0, 415, 0, 0x1a18009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2183 = PMOVZXWQrr
{ 2184, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x1418009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2184 = PMULDQrm
{ 2185, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x1418009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2185 = PMULDQrr
{ 2186, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x598009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2186 = PMULHRSWrm128
{ 2187, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x598009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2187 = PMULHRSWrr128
{ 2188, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005b80004006ULL, nullptr, nullptr, OperandInfo213, -1 ,nullptr }, // Inst #2188 = PMULHRWrm
{ 2189, 3, 1, 0, 0, 0, 0x100005b80004005ULL, nullptr, nullptr, OperandInfo214, -1 ,nullptr }, // Inst #2189 = PMULHRWrr
{ 2190, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x7218005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2190 = PMULHUWrm
{ 2191, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x7218005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2191 = PMULHUWrr
{ 2192, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x7298005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2192 = PMULHWrm
{ 2193, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x7298005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2193 = PMULHWrr
{ 2194, 7, 1, 0, 832, 0|(1ULL<<MCID::MayLoad), 0x2018009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2194 = PMULLDrm
{ 2195, 3, 1, 0, 831, 0|(1ULL<<MCID::Commutable), 0x2018009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2195 = PMULLDrr
{ 2196, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x6a98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2196 = PMULLWrm
{ 2197, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x6a98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2197 = PMULLWrr
{ 2198, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x7a18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2198 = PMULUDQrm
{ 2199, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x7a18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2199 = PMULUDQrr
{ 2200, 1, 1, 0, 418, 0|(1ULL<<MCID::MayLoad), 0x2c00000082ULL, ImplicitList11, ImplicitList11, OperandInfo82, -1 ,nullptr }, // Inst #2200 = POP16r
{ 2201, 5, 0, 0, 601, 0|(1ULL<<MCID::MayLoad), 0x4780000098ULL, ImplicitList11, ImplicitList11, OperandInfo43, -1 ,nullptr }, // Inst #2201 = POP16rmm
{ 2202, 1, 1, 0, 420, 0|(1ULL<<MCID::MayLoad), 0x4780000090ULL, ImplicitList11, ImplicitList11, OperandInfo82, -1 ,nullptr }, // Inst #2202 = POP16rmr
{ 2203, 1, 1, 0, 420, 0|(1ULL<<MCID::MayLoad), 0x2c00000102ULL, ImplicitList11, ImplicitList11, OperandInfo83, -1 ,nullptr }, // Inst #2203 = POP32r
{ 2204, 5, 0, 0, 601, 0|(1ULL<<MCID::MayLoad), 0x4780000118ULL, ImplicitList11, ImplicitList11, OperandInfo43, -1 ,nullptr }, // Inst #2204 = POP32rmm
{ 2205, 1, 1, 0, 420, 0|(1ULL<<MCID::MayLoad), 0x4780000110ULL, ImplicitList11, ImplicitList11, OperandInfo83, -1 ,nullptr }, // Inst #2205 = POP32rmr
{ 2206, 1, 1, 0, 420, 0|(1ULL<<MCID::MayLoad), 0x2c00000102ULL, ImplicitList13, ImplicitList13, OperandInfo85, -1 ,nullptr }, // Inst #2206 = POP64r
{ 2207, 5, 0, 0, 419, 0|(1ULL<<MCID::MayLoad), 0x4780000118ULL, ImplicitList13, ImplicitList13, OperandInfo43, -1 ,nullptr }, // Inst #2207 = POP64rmm
{ 2208, 1, 1, 0, 420, 0|(1ULL<<MCID::MayLoad), 0x4780000110ULL, ImplicitList13, ImplicitList13, OperandInfo85, -1 ,nullptr }, // Inst #2208 = POP64rmr
{ 2209, 0, 0, 0, 604, 0|(1ULL<<MCID::MayLoad), 0x3080000081ULL, ImplicitList11, ImplicitList61, nullptr, -1 ,nullptr }, // Inst #2209 = POPA16
{ 2210, 0, 0, 0, 604, 0|(1ULL<<MCID::MayLoad), 0x3080000101ULL, ImplicitList11, ImplicitList61, nullptr, -1 ,nullptr }, // Inst #2210 = POPA32
{ 2211, 6, 1, 0, 422, 0|(1ULL<<MCID::MayLoad), 0x5c00005886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr }, // Inst #2211 = POPCNT16rm
{ 2212, 2, 1, 0, 423, 0, 0x5c00005885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #2212 = POPCNT16rr
{ 2213, 6, 1, 0, 422, 0|(1ULL<<MCID::MayLoad), 0x5c00005906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #2213 = POPCNT32rm
{ 2214, 2, 1, 0, 423, 0, 0x5c00005905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #2214 = POPCNT32rr
{ 2215, 6, 1, 0, 422, 0|(1ULL<<MCID::MayLoad), 0x5c00025806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #2215 = POPCNT64rm
{ 2216, 2, 1, 0, 423, 0, 0x5c00025805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #2216 = POPCNT64rr
{ 2217, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf80000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2217 = POPDS16
{ 2218, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf80000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2218 = POPDS32
{ 2219, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2219 = POPES16
{ 2220, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2220 = POPES32
{ 2221, 0, 0, 0, 602, 0|(1ULL<<MCID::MayLoad), 0x4e80000081ULL, ImplicitList11, ImplicitList12, nullptr, -1 ,nullptr }, // Inst #2221 = POPF16
{ 2222, 0, 0, 0, 603, 0|(1ULL<<MCID::MayLoad), 0x4e80000101ULL, ImplicitList11, ImplicitList12, nullptr, -1 ,nullptr }, // Inst #2222 = POPF32
{ 2223, 0, 0, 0, 426, 0|(1ULL<<MCID::MayLoad), 0x4e80000101ULL, ImplicitList13, ImplicitList14, nullptr, -1 ,nullptr }, // Inst #2223 = POPF64
{ 2224, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080004081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2224 = POPFS16
{ 2225, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2225 = POPFS32
{ 2226, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5080004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2226 = POPFS64
{ 2227, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480004081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2227 = POPGS16
{ 2228, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2228 = POPGS32
{ 2229, 0, 0, 0, 424, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5480004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2229 = POPGS64
{ 2230, 0, 0, 0, 427, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb80000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2230 = POPSS16
{ 2231, 0, 0, 0, 427, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb80000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2231 = POPSS32
{ 2232, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x7598005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2232 = PORrm
{ 2233, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x7598005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2233 = PORrr
{ 2234, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680004018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2234 = PREFETCH
{ 2235, 5, 0, 0, 60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00004018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2235 = PREFETCHNTA
{ 2236, 5, 0, 0, 60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00004019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2236 = PREFETCHT0
{ 2237, 5, 0, 0, 60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000401aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2237 = PREFETCHT1
{ 2238, 5, 0, 0, 60, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc0000401bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2238 = PREFETCHT2
{ 2239, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680004019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2239 = PREFETCHW
{ 2240, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x7b18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2240 = PSADBWrm
{ 2241, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x7b18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2241 = PSADBWrr
{ 2242, 7, 1, 0, 428, 0|(1ULL<<MCID::MayLoad), 0x18009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2242 = PSHUFBrm
{ 2243, 3, 1, 0, 429, 0, 0x18009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2243 = PSHUFBrr
{ 2244, 7, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x3818045006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2244 = PSHUFDmi
{ 2245, 3, 1, 0, 431, 0, 0x3818045005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #2245 = PSHUFDri
{ 2246, 7, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x3818045806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2246 = PSHUFHWmi
{ 2247, 3, 1, 0, 431, 0, 0x3818045805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #2247 = PSHUFHWri
{ 2248, 7, 1, 0, 430, 0|(1ULL<<MCID::MayLoad), 0x3818046006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2248 = PSHUFLWmi
{ 2249, 3, 1, 0, 431, 0, 0x3818046005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #2249 = PSHUFLWri
{ 2250, 7, 1, 0, 432, 0|(1ULL<<MCID::MayLoad), 0x418009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2250 = PSIGNBrm
{ 2251, 3, 1, 0, 433, 0, 0x418009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2251 = PSIGNBrr
{ 2252, 7, 1, 0, 432, 0|(1ULL<<MCID::MayLoad), 0x518009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2252 = PSIGNDrm
{ 2253, 3, 1, 0, 433, 0, 0x518009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2253 = PSIGNDrr
{ 2254, 7, 1, 0, 432, 0|(1ULL<<MCID::MayLoad), 0x498009006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2254 = PSIGNWrm
{ 2255, 3, 1, 0, 433, 0, 0x498009005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2255 = PSIGNWrr
{ 2256, 3, 1, 0, 836, 0, 0x3998045017ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2256 = PSLLDQri
{ 2257, 3, 1, 0, 435, 0, 0x3918045016ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2257 = PSLLDri
{ 2258, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x7918005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2258 = PSLLDrm
{ 2259, 3, 1, 0, 835, 0, 0x7918005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2259 = PSLLDrr
{ 2260, 3, 1, 0, 435, 0, 0x3998045016ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2260 = PSLLQri
{ 2261, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x7998005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2261 = PSLLQrm
{ 2262, 3, 1, 0, 835, 0, 0x7998005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2262 = PSLLQrr
{ 2263, 3, 1, 0, 435, 0, 0x3898045016ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2263 = PSLLWri
{ 2264, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x7898005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2264 = PSLLWrm
{ 2265, 3, 1, 0, 835, 0, 0x7898005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2265 = PSLLWrr
{ 2266, 3, 1, 0, 435, 0, 0x3918045014ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2266 = PSRADri
{ 2267, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x7118005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2267 = PSRADrm
{ 2268, 3, 1, 0, 835, 0, 0x7118005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2268 = PSRADrr
{ 2269, 3, 1, 0, 435, 0, 0x3898045014ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2269 = PSRAWri
{ 2270, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x7098005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2270 = PSRAWrm
{ 2271, 3, 1, 0, 835, 0, 0x7098005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2271 = PSRAWrr
{ 2272, 3, 1, 0, 836, 0, 0x3998045013ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2272 = PSRLDQri
{ 2273, 3, 1, 0, 435, 0, 0x3918045012ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2273 = PSRLDri
{ 2274, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x6918005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2274 = PSRLDrm
{ 2275, 3, 1, 0, 835, 0, 0x6918005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2275 = PSRLDrr
{ 2276, 3, 1, 0, 435, 0, 0x3998045012ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2276 = PSRLQri
{ 2277, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x6998005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2277 = PSRLQrm
{ 2278, 3, 1, 0, 835, 0, 0x6998005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2278 = PSRLQrr
{ 2279, 3, 1, 0, 435, 0, 0x3898045012ULL, nullptr, nullptr, OperandInfo262, -1 ,nullptr }, // Inst #2279 = PSRLWri
{ 2280, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x6898005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2280 = PSRLWrm
{ 2281, 3, 1, 0, 835, 0, 0x6898005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2281 = PSRLWrr
{ 2282, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7c18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2282 = PSUBBrm
{ 2283, 3, 1, 0, 377, 0, 0x7c18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2283 = PSUBBrr
{ 2284, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7d18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2284 = PSUBDrm
{ 2285, 3, 1, 0, 377, 0, 0x7d18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2285 = PSUBDrr
{ 2286, 7, 1, 0, 378, 0|(1ULL<<MCID::MayLoad), 0x7d98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2286 = PSUBQrm
{ 2287, 3, 1, 0, 379, 0, 0x7d98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2287 = PSUBQrr
{ 2288, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7418005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2288 = PSUBSBrm
{ 2289, 3, 1, 0, 377, 0, 0x7418005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2289 = PSUBSBrr
{ 2290, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7498005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2290 = PSUBSWrm
{ 2291, 3, 1, 0, 377, 0, 0x7498005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2291 = PSUBSWrr
{ 2292, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x6c18005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2292 = PSUBUSBrm
{ 2293, 3, 1, 0, 377, 0, 0x6c18005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2293 = PSUBUSBrr
{ 2294, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x6c98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2294 = PSUBUSWrm
{ 2295, 3, 1, 0, 377, 0, 0x6c98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2295 = PSUBUSWrr
{ 2296, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x7c98005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2296 = PSUBWrm
{ 2297, 3, 1, 0, 377, 0, 0x7c98005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2297 = PSUBWrr
{ 2298, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100005d80004006ULL, nullptr, nullptr, OperandInfo201, -1 ,nullptr }, // Inst #2298 = PSWAPDrm
{ 2299, 2, 1, 0, 0, 0, 0x100005d80004005ULL, nullptr, nullptr, OperandInfo205, -1 ,nullptr }, // Inst #2299 = PSWAPDrr
{ 2300, 6, 0, 0, 834, 0|(1ULL<<MCID::MayLoad), 0xb98009006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #2300 = PTESTrm
{ 2301, 2, 0, 0, 833, 0, 0xb98009005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #2301 = PTESTrr
{ 2302, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x3418005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2302 = PUNPCKHBWrm
{ 2303, 3, 1, 0, 439, 0, 0x3418005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2303 = PUNPCKHBWrr
{ 2304, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x3518005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2304 = PUNPCKHDQrm
{ 2305, 3, 1, 0, 439, 0, 0x3518005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2305 = PUNPCKHDQrr
{ 2306, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x3698005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2306 = PUNPCKHQDQrm
{ 2307, 3, 1, 0, 439, 0, 0x3698005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2307 = PUNPCKHQDQrr
{ 2308, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x3498005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2308 = PUNPCKHWDrm
{ 2309, 3, 1, 0, 439, 0, 0x3498005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2309 = PUNPCKHWDrr
{ 2310, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x3018005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2310 = PUNPCKLBWrm
{ 2311, 3, 1, 0, 439, 0, 0x3018005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2311 = PUNPCKLBWrr
{ 2312, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x3118005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2312 = PUNPCKLDQrm
{ 2313, 3, 1, 0, 439, 0, 0x3118005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2313 = PUNPCKLDQrr
{ 2314, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x3618005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2314 = PUNPCKLQDQrm
{ 2315, 3, 1, 0, 439, 0, 0x3618005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2315 = PUNPCKLQDQrr
{ 2316, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x3098005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2316 = PUNPCKLWDrm
{ 2317, 3, 1, 0, 439, 0, 0x3098005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2317 = PUNPCKLWDrr
{ 2318, 1, 0, 0, 440, 0|(1ULL<<MCID::MayStore), 0x3500040081ULL, ImplicitList11, ImplicitList11, OperandInfo2, -1 ,nullptr }, // Inst #2318 = PUSH16i8
{ 2319, 1, 0, 0, 441, 0|(1ULL<<MCID::MayStore), 0x2800000082ULL, ImplicitList11, ImplicitList11, OperandInfo82, -1 ,nullptr }, // Inst #2319 = PUSH16r
{ 2320, 5, 0, 0, 598, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f8000009eULL, ImplicitList11, ImplicitList11, OperandInfo43, -1 ,nullptr }, // Inst #2320 = PUSH16rmm
{ 2321, 1, 0, 0, 441, 0|(1ULL<<MCID::MayStore), 0x7f80000096ULL, ImplicitList11, ImplicitList11, OperandInfo82, -1 ,nullptr }, // Inst #2321 = PUSH16rmr
{ 2322, 1, 0, 0, 440, 0|(1ULL<<MCID::MayStore), 0x3500040101ULL, ImplicitList11, ImplicitList11, OperandInfo2, -1 ,nullptr }, // Inst #2322 = PUSH32i8
{ 2323, 1, 0, 0, 441, 0|(1ULL<<MCID::MayStore), 0x2800000102ULL, ImplicitList11, ImplicitList11, OperandInfo83, -1 ,nullptr }, // Inst #2323 = PUSH32r
{ 2324, 5, 0, 0, 598, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f8000011eULL, ImplicitList11, ImplicitList11, OperandInfo43, -1 ,nullptr }, // Inst #2324 = PUSH32rmm
{ 2325, 1, 0, 0, 441, 0|(1ULL<<MCID::MayStore), 0x7f80000116ULL, ImplicitList11, ImplicitList11, OperandInfo83, -1 ,nullptr }, // Inst #2325 = PUSH32rmr
{ 2326, 1, 0, 0, 440, 0|(1ULL<<MCID::MayStore), 0x34001c0101ULL, ImplicitList13, ImplicitList13, OperandInfo2, -1 ,nullptr }, // Inst #2326 = PUSH64i32
{ 2327, 1, 0, 0, 440, 0|(1ULL<<MCID::MayStore), 0x3500040101ULL, ImplicitList13, ImplicitList13, OperandInfo2, -1 ,nullptr }, // Inst #2327 = PUSH64i8
{ 2328, 1, 0, 0, 441, 0|(1ULL<<MCID::MayStore), 0x2800000102ULL, ImplicitList13, ImplicitList13, OperandInfo85, -1 ,nullptr }, // Inst #2328 = PUSH64r
{ 2329, 5, 0, 0, 442, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x7f8000011eULL, ImplicitList13, ImplicitList13, OperandInfo43, -1 ,nullptr }, // Inst #2329 = PUSH64rmm
{ 2330, 1, 0, 0, 441, 0|(1ULL<<MCID::MayStore), 0x7f80000116ULL, ImplicitList13, ImplicitList13, OperandInfo85, -1 ,nullptr }, // Inst #2330 = PUSH64rmr
{ 2331, 0, 0, 0, 600, 0|(1ULL<<MCID::MayStore), 0x3000000081ULL, ImplicitList61, ImplicitList11, nullptr, -1 ,nullptr }, // Inst #2331 = PUSHA16
{ 2332, 0, 0, 0, 600, 0|(1ULL<<MCID::MayStore), 0x3000000101ULL, ImplicitList61, ImplicitList11, nullptr, -1 ,nullptr }, // Inst #2332 = PUSHA32
{ 2333, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x700000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2333 = PUSHCS16
{ 2334, 0, 0, 0, 445, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x700000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2334 = PUSHCS32
{ 2335, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf00000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2335 = PUSHDS16
{ 2336, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xf00000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2336 = PUSHDS32
{ 2337, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2337 = PUSHES16
{ 2338, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x300000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2338 = PUSHES32
{ 2339, 0, 0, 0, 599, 0|(1ULL<<MCID::MayStore), 0x4e00000081ULL, ImplicitList12, ImplicitList11, nullptr, -1 ,nullptr }, // Inst #2339 = PUSHF16
{ 2340, 0, 0, 0, 599, 0|(1ULL<<MCID::MayStore), 0x4e00000101ULL, ImplicitList12, ImplicitList11, nullptr, -1 ,nullptr }, // Inst #2340 = PUSHF32
{ 2341, 0, 0, 0, 446, 0|(1ULL<<MCID::MayStore), 0x4e00000101ULL, ImplicitList14, ImplicitList13, nullptr, -1 ,nullptr }, // Inst #2341 = PUSHF64
{ 2342, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000004081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2342 = PUSHFS16
{ 2343, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2343 = PUSHFS32
{ 2344, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5000004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2344 = PUSHFS64
{ 2345, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400004081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2345 = PUSHGS16
{ 2346, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2346 = PUSHGS32
{ 2347, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5400004101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2347 = PUSHGS64
{ 2348, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb00000081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2348 = PUSHSS16
{ 2349, 0, 0, 0, 444, 0|(1ULL<<MCID::UnmodeledSideEffects), 0xb00000101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2349 = PUSHSS32
{ 2350, 1, 0, 0, 440, 0|(1ULL<<MCID::MayStore), 0x34000c0081ULL, ImplicitList11, ImplicitList11, OperandInfo2, -1 ,nullptr }, // Inst #2350 = PUSHi16
{ 2351, 1, 0, 0, 440, 0|(1ULL<<MCID::MayStore), 0x3400140101ULL, ImplicitList11, ImplicitList11, OperandInfo2, -1 ,nullptr }, // Inst #2351 = PUSHi32
{ 2352, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x7798005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2352 = PXORrm
{ 2353, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x7798005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2353 = PXORrr
{ 2354, 5, 0, 0, 661, 0, 0x688000009aULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2354 = RCL16m1
{ 2355, 5, 0, 0, 663, 0, 0x698000009aULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2355 = RCL16mCL
{ 2356, 6, 0, 0, 663, 0, 0x608004009aULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2356 = RCL16mi
{ 2357, 2, 1, 0, 660, 0, 0x6880000092ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2357 = RCL16r1
{ 2358, 2, 1, 0, 662, 0, 0x6980000092ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2358 = RCL16rCL
{ 2359, 3, 1, 0, 662, 0, 0x6080040092ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2359 = RCL16ri
{ 2360, 5, 0, 0, 661, 0, 0x688000011aULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2360 = RCL32m1
{ 2361, 5, 0, 0, 663, 0, 0x698000011aULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2361 = RCL32mCL
{ 2362, 6, 0, 0, 663, 0, 0x608004011aULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2362 = RCL32mi
{ 2363, 2, 1, 0, 660, 0, 0x6880000112ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2363 = RCL32r1
{ 2364, 2, 1, 0, 662, 0, 0x6980000112ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2364 = RCL32rCL
{ 2365, 3, 1, 0, 662, 0, 0x6080040112ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2365 = RCL32ri
{ 2366, 5, 0, 0, 661, 0, 0x688002001aULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2366 = RCL64m1
{ 2367, 5, 0, 0, 663, 0, 0x698002001aULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2367 = RCL64mCL
{ 2368, 6, 0, 0, 663, 0, 0x608006001aULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2368 = RCL64mi
{ 2369, 2, 1, 0, 660, 0, 0x6880020012ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2369 = RCL64r1
{ 2370, 2, 1, 0, 662, 0, 0x6980020012ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2370 = RCL64rCL
{ 2371, 3, 1, 0, 662, 0, 0x6080060012ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2371 = RCL64ri
{ 2372, 5, 0, 0, 661, 0, 0x680000001aULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2372 = RCL8m1
{ 2373, 5, 0, 0, 663, 0, 0x690000001aULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2373 = RCL8mCL
{ 2374, 6, 0, 0, 663, 0, 0x600004001aULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2374 = RCL8mi
{ 2375, 2, 1, 0, 660, 0, 0x6800000012ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2375 = RCL8r1
{ 2376, 2, 1, 0, 662, 0, 0x6900000012ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2376 = RCL8rCL
{ 2377, 3, 1, 0, 662, 0, 0x6000040012ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2377 = RCL8ri
{ 2378, 6, 1, 0, 449, 0|(1ULL<<MCID::MayLoad), 0x2988004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2378 = RCPPSm
{ 2379, 2, 1, 0, 450, 0, 0x2988004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2379 = RCPPSr
{ 2380, 6, 1, 0, 451, 0|(1ULL<<MCID::MayLoad), 0x2988005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #2380 = RCPSSm
{ 2381, 7, 1, 0, 452, 0|(1ULL<<MCID::MayLoad), 0x2980005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2381 = RCPSSm_Int
{ 2382, 2, 1, 0, 453, 0, 0x2988005805ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr }, // Inst #2382 = RCPSSr
{ 2383, 3, 1, 0, 452, 0, 0x2980005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2383 = RCPSSr_Int
{ 2384, 5, 0, 0, 661, 0, 0x688000009bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2384 = RCR16m1
{ 2385, 5, 0, 0, 663, 0, 0x698000009bULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2385 = RCR16mCL
{ 2386, 6, 0, 0, 663, 0, 0x608004009bULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2386 = RCR16mi
{ 2387, 2, 1, 0, 660, 0, 0x6880000093ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2387 = RCR16r1
{ 2388, 2, 1, 0, 662, 0, 0x6980000093ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2388 = RCR16rCL
{ 2389, 3, 1, 0, 662, 0, 0x6080040093ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2389 = RCR16ri
{ 2390, 5, 0, 0, 661, 0, 0x688000011bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2390 = RCR32m1
{ 2391, 5, 0, 0, 663, 0, 0x698000011bULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2391 = RCR32mCL
{ 2392, 6, 0, 0, 663, 0, 0x608004011bULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2392 = RCR32mi
{ 2393, 2, 1, 0, 660, 0, 0x6880000113ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2393 = RCR32r1
{ 2394, 2, 1, 0, 662, 0, 0x6980000113ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2394 = RCR32rCL
{ 2395, 3, 1, 0, 662, 0, 0x6080040113ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2395 = RCR32ri
{ 2396, 5, 0, 0, 661, 0, 0x688002001bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2396 = RCR64m1
{ 2397, 5, 0, 0, 663, 0, 0x698002001bULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2397 = RCR64mCL
{ 2398, 6, 0, 0, 663, 0, 0x608006001bULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2398 = RCR64mi
{ 2399, 2, 1, 0, 660, 0, 0x6880020013ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2399 = RCR64r1
{ 2400, 2, 1, 0, 662, 0, 0x6980020013ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2400 = RCR64rCL
{ 2401, 3, 1, 0, 662, 0, 0x6080060013ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2401 = RCR64ri
{ 2402, 5, 0, 0, 661, 0, 0x680000001bULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2402 = RCR8m1
{ 2403, 5, 0, 0, 663, 0, 0x690000001bULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2403 = RCR8mCL
{ 2404, 6, 0, 0, 663, 0, 0x600004001bULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2404 = RCR8mi
{ 2405, 2, 1, 0, 660, 0, 0x6800000013ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2405 = RCR8r1
{ 2406, 2, 1, 0, 662, 0, 0x6900000013ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2406 = RCR8rCL
{ 2407, 3, 1, 0, 662, 0, 0x6000040013ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2407 = RCR8ri
{ 2408, 1, 1, 0, 454, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList12, ImplicitList11, OperandInfo83, -1 ,nullptr }, // Inst #2408 = RDFLAGS32
{ 2409, 1, 1, 0, 454, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList14, ImplicitList11, OperandInfo85, -1 ,nullptr }, // Inst #2409 = RDFLAGS64
{ 2410, 1, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005810ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #2410 = RDFSBASE
{ 2411, 1, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700025810ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #2411 = RDFSBASE64
{ 2412, 1, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005811ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #2412 = RDGSBASE
{ 2413, 1, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700025811ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #2413 = RDGSBASE64
{ 2414, 0, 0, 0, 455, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1900004001ULL, ImplicitList35, ImplicitList16, nullptr, -1 ,nullptr }, // Inst #2414 = RDMSR
{ 2415, 1, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #2415 = RDPKRU
{ 2416, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000404eULL, ImplicitList35, ImplicitList16, nullptr, -1 ,nullptr }, // Inst #2416 = RDPKRUr
{ 2417, 0, 0, 0, 735, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1980004001ULL, ImplicitList35, ImplicitList24, nullptr, -1 ,nullptr }, // Inst #2417 = RDPMC
{ 2418, 1, 1, 0, 736, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004096ULL, nullptr, ImplicitList6, OperandInfo82, -1 ,nullptr }, // Inst #2418 = RDRAND16r
{ 2419, 1, 1, 0, 736, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004116ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr }, // Inst #2419 = RDRAND32r
{ 2420, 1, 1, 0, 736, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380024016ULL, nullptr, ImplicitList6, OperandInfo85, -1 ,nullptr }, // Inst #2420 = RDRAND64r
{ 2421, 1, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004097ULL, nullptr, ImplicitList6, OperandInfo82, -1 ,nullptr }, // Inst #2421 = RDSEED16r
{ 2422, 1, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380004117ULL, nullptr, ImplicitList6, OperandInfo83, -1 ,nullptr }, // Inst #2422 = RDSEED32r
{ 2423, 1, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6380024017ULL, nullptr, ImplicitList6, OperandInfo85, -1 ,nullptr }, // Inst #2423 = RDSEED64r
{ 2424, 0, 0, 0, 733, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1880004001ULL, nullptr, ImplicitList24, nullptr, -1 ,nullptr }, // Inst #2424 = RDTSC
{ 2425, 0, 0, 0, 734, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004059ULL, nullptr, ImplicitList63, nullptr, -1 ,nullptr }, // Inst #2425 = RDTSCP
{ 2426, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2426 = RELEASE_ADD32mi
{ 2427, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #2427 = RELEASE_ADD32mr
{ 2428, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2428 = RELEASE_ADD64mi32
{ 2429, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #2429 = RELEASE_ADD64mr
{ 2430, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2430 = RELEASE_ADD8mi
{ 2431, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #2431 = RELEASE_ADD8mr
{ 2432, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2432 = RELEASE_AND32mi
{ 2433, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #2433 = RELEASE_AND32mr
{ 2434, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2434 = RELEASE_AND64mi32
{ 2435, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #2435 = RELEASE_AND64mr
{ 2436, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2436 = RELEASE_AND8mi
{ 2437, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #2437 = RELEASE_AND8mr
{ 2438, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2438 = RELEASE_DEC16m
{ 2439, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2439 = RELEASE_DEC32m
{ 2440, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2440 = RELEASE_DEC64m
{ 2441, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2441 = RELEASE_DEC8m
{ 2442, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr }, // Inst #2442 = RELEASE_FADD32mr
{ 2443, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr }, // Inst #2443 = RELEASE_FADD64mr
{ 2444, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2444 = RELEASE_INC16m
{ 2445, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2445 = RELEASE_INC32m
{ 2446, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2446 = RELEASE_INC64m
{ 2447, 5, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2447 = RELEASE_INC8m
{ 2448, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #2448 = RELEASE_MOV16mi
{ 2449, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, // Inst #2449 = RELEASE_MOV16mr
{ 2450, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #2450 = RELEASE_MOV32mi
{ 2451, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, // Inst #2451 = RELEASE_MOV32mr
{ 2452, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #2452 = RELEASE_MOV64mi32
{ 2453, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #2453 = RELEASE_MOV64mr
{ 2454, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo20, -1 ,nullptr }, // Inst #2454 = RELEASE_MOV8mi
{ 2455, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #2455 = RELEASE_MOV8mr
{ 2456, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2456 = RELEASE_OR32mi
{ 2457, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #2457 = RELEASE_OR32mr
{ 2458, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2458 = RELEASE_OR64mi32
{ 2459, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #2459 = RELEASE_OR64mr
{ 2460, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2460 = RELEASE_OR8mi
{ 2461, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #2461 = RELEASE_OR8mr
{ 2462, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2462 = RELEASE_XOR32mi
{ 2463, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #2463 = RELEASE_XOR32mr
{ 2464, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2464 = RELEASE_XOR64mi32
{ 2465, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #2465 = RELEASE_XOR64mr
{ 2466, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2466 = RELEASE_XOR8mi
{ 2467, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x0ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #2467 = RELEASE_XOR8mr
{ 2468, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7900000001ULL, ImplicitList59, ImplicitList35, nullptr, -1 ,nullptr }, // Inst #2468 = REPNE_PREFIX
{ 2469, 0, 0, 0, 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5204000001ULL, ImplicitList64, ImplicitList64, nullptr, -1 ,nullptr }, // Inst #2469 = REP_MOVSB_32
{ 2470, 0, 0, 0, 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5204000001ULL, ImplicitList65, ImplicitList65, nullptr, -1 ,nullptr }, // Inst #2470 = REP_MOVSB_64
{ 2471, 0, 0, 0, 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000101ULL, ImplicitList64, ImplicitList64, nullptr, -1 ,nullptr }, // Inst #2471 = REP_MOVSD_32
{ 2472, 0, 0, 0, 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000101ULL, ImplicitList65, ImplicitList65, nullptr, -1 ,nullptr }, // Inst #2472 = REP_MOVSD_64
{ 2473, 0, 0, 0, 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284020001ULL, ImplicitList65, ImplicitList65, nullptr, -1 ,nullptr }, // Inst #2473 = REP_MOVSQ_64
{ 2474, 0, 0, 0, 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000081ULL, ImplicitList64, ImplicitList64, nullptr, -1 ,nullptr }, // Inst #2474 = REP_MOVSW_32
{ 2475, 0, 0, 0, 458, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5284000081ULL, ImplicitList65, ImplicitList65, nullptr, -1 ,nullptr }, // Inst #2475 = REP_MOVSW_64
{ 2476, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7980000001ULL, ImplicitList59, ImplicitList35, nullptr, -1 ,nullptr }, // Inst #2476 = REP_PREFIX
{ 2477, 0, 0, 0, 459, 0|(1ULL<<MCID::MayStore), 0x5504000001ULL, ImplicitList66, ImplicitList67, nullptr, -1 ,nullptr }, // Inst #2477 = REP_STOSB_32
{ 2478, 0, 0, 0, 459, 0|(1ULL<<MCID::MayStore), 0x5504000001ULL, ImplicitList68, ImplicitList69, nullptr, -1 ,nullptr }, // Inst #2478 = REP_STOSB_64
{ 2479, 0, 0, 0, 459, 0|(1ULL<<MCID::MayStore), 0x5584000101ULL, ImplicitList70, ImplicitList67, nullptr, -1 ,nullptr }, // Inst #2479 = REP_STOSD_32
{ 2480, 0, 0, 0, 459, 0|(1ULL<<MCID::MayStore), 0x5584000101ULL, ImplicitList71, ImplicitList69, nullptr, -1 ,nullptr }, // Inst #2480 = REP_STOSD_64
{ 2481, 0, 0, 0, 459, 0|(1ULL<<MCID::MayStore), 0x5584020001ULL, ImplicitList71, ImplicitList69, nullptr, -1 ,nullptr }, // Inst #2481 = REP_STOSQ_64
{ 2482, 0, 0, 0, 459, 0|(1ULL<<MCID::MayStore), 0x5584000081ULL, ImplicitList72, ImplicitList67, nullptr, -1 ,nullptr }, // Inst #2482 = REP_STOSW_32
{ 2483, 0, 0, 0, 459, 0|(1ULL<<MCID::MayStore), 0x5584000081ULL, ImplicitList73, ImplicitList69, nullptr, -1 ,nullptr }, // Inst #2483 = REP_STOSW_64
{ 2484, 1, 0, 0, 714, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x6101cc0101ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #2484 = RETIL
{ 2485, 1, 0, 0, 714, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x6101cc0101ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #2485 = RETIQ
{ 2486, 1, 0, 0, 714, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6101cc0081ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #2486 = RETIW
{ 2487, 0, 0, 0, 712, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x6181c00101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2487 = RETL
{ 2488, 0, 0, 0, 712, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::Variadic), 0x6181c00101ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2488 = RETQ
{ 2489, 0, 0, 0, 712, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6181c00081ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2489 = RETW
{ 2490, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2400000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2490 = REX64_PREFIX
{ 2491, 5, 0, 0, 447, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000098ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2491 = ROL16m1
{ 2492, 5, 0, 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000098ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2492 = ROL16mCL
{ 2493, 6, 0, 0, 657, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2493 = ROL16mi
{ 2494, 2, 1, 0, 656, 0, 0x6880000090ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2494 = ROL16r1
{ 2495, 2, 1, 0, 658, 0, 0x6980000090ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2495 = ROL16rCL
{ 2496, 3, 1, 0, 448, 0, 0x6080040090ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2496 = ROL16ri
{ 2497, 5, 0, 0, 447, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000118ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2497 = ROL32m1
{ 2498, 5, 0, 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000118ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2498 = ROL32mCL
{ 2499, 6, 0, 0, 657, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2499 = ROL32mi
{ 2500, 2, 1, 0, 656, 0, 0x6880000110ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2500 = ROL32r1
{ 2501, 2, 1, 0, 658, 0, 0x6980000110ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2501 = ROL32rCL
{ 2502, 3, 1, 0, 448, 0, 0x6080040110ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2502 = ROL32ri
{ 2503, 5, 0, 0, 447, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2503 = ROL64m1
{ 2504, 5, 0, 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020018ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2504 = ROL64mCL
{ 2505, 6, 0, 0, 657, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2505 = ROL64mi
{ 2506, 2, 1, 0, 656, 0, 0x6880020010ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2506 = ROL64r1
{ 2507, 2, 1, 0, 658, 0, 0x6980020010ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2507 = ROL64rCL
{ 2508, 3, 1, 0, 448, 0, 0x6080060010ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2508 = ROL64ri
{ 2509, 5, 0, 0, 447, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000018ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2509 = ROL8m1
{ 2510, 5, 0, 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000018ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2510 = ROL8mCL
{ 2511, 6, 0, 0, 657, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2511 = ROL8mi
{ 2512, 2, 1, 0, 656, 0, 0x6800000010ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2512 = ROL8r1
{ 2513, 2, 1, 0, 658, 0, 0x6900000010ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2513 = ROL8rCL
{ 2514, 3, 1, 0, 448, 0, 0x6000040010ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2514 = ROL8ri
{ 2515, 5, 0, 0, 447, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000099ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2515 = ROR16m1
{ 2516, 5, 0, 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000099ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2516 = ROR16mCL
{ 2517, 6, 0, 0, 657, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040099ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2517 = ROR16mi
{ 2518, 2, 1, 0, 656, 0, 0x6880000091ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2518 = ROR16r1
{ 2519, 2, 1, 0, 658, 0, 0x6980000091ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2519 = ROR16rCL
{ 2520, 3, 1, 0, 448, 0, 0x6080040091ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2520 = ROR16ri
{ 2521, 5, 0, 0, 447, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880000119ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2521 = ROR32m1
{ 2522, 5, 0, 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980000119ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2522 = ROR32mCL
{ 2523, 6, 0, 0, 657, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080040119ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2523 = ROR32mi
{ 2524, 2, 1, 0, 656, 0, 0x6880000111ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2524 = ROR32r1
{ 2525, 2, 1, 0, 658, 0, 0x6980000111ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2525 = ROR32rCL
{ 2526, 3, 1, 0, 448, 0, 0x6080040111ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2526 = ROR32ri
{ 2527, 5, 0, 0, 447, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6880020019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2527 = ROR64m1
{ 2528, 5, 0, 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6980020019ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2528 = ROR64mCL
{ 2529, 6, 0, 0, 657, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6080060019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2529 = ROR64mi
{ 2530, 2, 1, 0, 656, 0, 0x6880020011ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2530 = ROR64r1
{ 2531, 2, 1, 0, 658, 0, 0x6980020011ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2531 = ROR64rCL
{ 2532, 3, 1, 0, 448, 0, 0x6080060011ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2532 = ROR64ri
{ 2533, 5, 0, 0, 447, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6800000019ULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2533 = ROR8m1
{ 2534, 5, 0, 0, 659, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6900000019ULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2534 = ROR8mCL
{ 2535, 6, 0, 0, 657, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x6000040019ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2535 = ROR8mi
{ 2536, 2, 1, 0, 656, 0, 0x6800000011ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2536 = ROR8r1
{ 2537, 2, 1, 0, 658, 0, 0x6900000011ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2537 = ROR8rCL
{ 2538, 3, 1, 0, 448, 0, 0x6000040011ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2538 = ROR8ri
{ 2539, 7, 1, 0, 461, 0|(1ULL<<MCID::MayLoad), 0x782004e006ULL, nullptr, nullptr, OperandInfo66, -1 ,nullptr }, // Inst #2539 = RORX32mi
{ 2540, 3, 1, 0, 462, 0, 0x782004e005ULL, nullptr, nullptr, OperandInfo67, -1 ,nullptr }, // Inst #2540 = RORX32ri
{ 2541, 7, 1, 0, 461, 0|(1ULL<<MCID::MayLoad), 0xf82004e006ULL, nullptr, nullptr, OperandInfo68, -1 ,nullptr }, // Inst #2541 = RORX64mi
{ 2542, 3, 1, 0, 462, 0, 0xf82004e005ULL, nullptr, nullptr, OperandInfo69, -1 ,nullptr }, // Inst #2542 = RORX64ri
{ 2543, 7, 1, 0, 918, 0|(1ULL<<MCID::MayLoad), 0x49004d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2543 = ROUNDPDm
{ 2544, 3, 1, 0, 916, 0, 0x49004d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #2544 = ROUNDPDr
{ 2545, 7, 1, 0, 919, 0|(1ULL<<MCID::MayLoad), 0x40804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #2545 = ROUNDPSm
{ 2546, 3, 1, 0, 916, 0, 0x40804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #2546 = ROUNDPSr
{ 2547, 8, 1, 0, 920, 0|(1ULL<<MCID::MayLoad), 0x58004d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2547 = ROUNDSDm
{ 2548, 4, 1, 0, 917, 0, 0x58004d005ULL, nullptr, nullptr, OperandInfo110, -1 ,nullptr }, // Inst #2548 = ROUNDSDr
{ 2549, 4, 1, 0, 917, 0, 0x58004d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #2549 = ROUNDSDr_Int
{ 2550, 8, 1, 0, 920, 0|(1ULL<<MCID::MayLoad), 0x50004d006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2550 = ROUNDSSm
{ 2551, 4, 1, 0, 917, 0, 0x50004d005ULL, nullptr, nullptr, OperandInfo112, -1 ,nullptr }, // Inst #2551 = ROUNDSSr
{ 2552, 4, 1, 0, 917, 0, 0x50004d005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #2552 = ROUNDSSr_Int
{ 2553, 0, 0, 0, 467, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5500004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2553 = RSM
{ 2554, 6, 1, 0, 936, 0|(1ULL<<MCID::MayLoad), 0x2908004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2554 = RSQRTPSm
{ 2555, 2, 1, 0, 932, 0, 0x2908004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2555 = RSQRTPSr
{ 2556, 6, 1, 0, 937, 0|(1ULL<<MCID::MayLoad), 0x2908005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #2556 = RSQRTSSm
{ 2557, 7, 1, 0, 938, 0|(1ULL<<MCID::MayLoad), 0x2900005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2557 = RSQRTSSm_Int
{ 2558, 2, 1, 0, 933, 0, 0x2908005805ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr }, // Inst #2558 = RSQRTSSr
{ 2559, 3, 1, 0, 934, 0, 0x2900005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2559 = RSQRTSSr_Int
{ 2560, 0, 0, 0, 605, 0, 0x4f00000001ULL, ImplicitList37, ImplicitList6, nullptr, -1 ,nullptr }, // Inst #2560 = SAHF
{ 2561, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6b00000001ULL, ImplicitList6, ImplicitList4, nullptr, -1 ,nullptr }, // Inst #2561 = SALC
{ 2562, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000009fULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2562 = SAR16m1
{ 2563, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000009fULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2563 = SAR16mCL
{ 2564, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004009fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2564 = SAR16mi
{ 2565, 2, 1, 0, 448, 0, 0x6880000097ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2565 = SAR16r1
{ 2566, 2, 1, 0, 654, 0, 0x6980000097ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2566 = SAR16rCL
{ 2567, 3, 1, 0, 448, 0, 0x6080040097ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2567 = SAR16ri
{ 2568, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000011fULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2568 = SAR32m1
{ 2569, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000011fULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2569 = SAR32mCL
{ 2570, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004011fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2570 = SAR32mi
{ 2571, 2, 1, 0, 448, 0, 0x6880000117ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2571 = SAR32r1
{ 2572, 2, 1, 0, 654, 0, 0x6980000117ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2572 = SAR32rCL
{ 2573, 3, 1, 0, 448, 0, 0x6080040117ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2573 = SAR32ri
{ 2574, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688002001fULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2574 = SAR64m1
{ 2575, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698002001fULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2575 = SAR64mCL
{ 2576, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608006001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2576 = SAR64mi
{ 2577, 2, 1, 0, 448, 0, 0x6880020017ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2577 = SAR64r1
{ 2578, 2, 1, 0, 654, 0, 0x6980020017ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2578 = SAR64rCL
{ 2579, 3, 1, 0, 448, 0, 0x6080060017ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2579 = SAR64ri
{ 2580, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680000001fULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2580 = SAR8m1
{ 2581, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x690000001fULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2581 = SAR8mCL
{ 2582, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x600004001fULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2582 = SAR8mi
{ 2583, 2, 1, 0, 448, 0, 0x6800000017ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2583 = SAR8r1
{ 2584, 2, 1, 0, 654, 0, 0x6900000017ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2584 = SAR8rCL
{ 2585, 3, 1, 0, 448, 0, 0x6000040017ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2585 = SAR8ri
{ 2586, 7, 1, 0, 473, 0|(1ULL<<MCID::MayLoad), 0x27ba0009806ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr }, // Inst #2586 = SARX32rm
{ 2587, 3, 1, 0, 462, 0, 0x27ba0009805ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr }, // Inst #2587 = SARX32rr
{ 2588, 7, 1, 0, 473, 0|(1ULL<<MCID::MayLoad), 0x2fba0009806ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #2588 = SARX64rm
{ 2589, 3, 1, 0, 462, 0, 0x2fba0009805ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, // Inst #2589 = SARX64rr
{ 2590, 1, 0, 0, 5, 0, 0xe800c0081ULL, ImplicitList2, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #2590 = SBB16i16
{ 2591, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2591 = SBB16mi
{ 2592, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2592 = SBB16mi8
{ 2593, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80000084ULL, ImplicitList6, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #2593 = SBB16mr
{ 2594, 3, 1, 0, 614, 0, 0x40800c0093ULL, ImplicitList6, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2594 = SBB16ri
{ 2595, 3, 1, 0, 614, 0, 0x4180040093ULL, ImplicitList6, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2595 = SBB16ri8
{ 2596, 7, 1, 0, 615, 0|(1ULL<<MCID::MayLoad), 0xd80000086ULL, ImplicitList6, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #2596 = SBB16rm
{ 2597, 3, 1, 0, 614, 0, 0xc80000083ULL, ImplicitList6, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #2597 = SBB16rr
{ 2598, 3, 1, 0, 614, 0, 0xd80000085ULL, ImplicitList6, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #2598 = SBB16rr_REV
{ 2599, 1, 0, 0, 5, 0, 0xe80140101ULL, ImplicitList7, ImplicitList7, OperandInfo2, -1 ,nullptr }, // Inst #2599 = SBB32i32
{ 2600, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2600 = SBB32mi
{ 2601, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2601 = SBB32mi8
{ 2602, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80000104ULL, ImplicitList6, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #2602 = SBB32mr
{ 2603, 3, 1, 0, 614, 0, 0x4080140113ULL, ImplicitList6, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2603 = SBB32ri
{ 2604, 3, 1, 0, 614, 0, 0x4180040113ULL, ImplicitList6, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2604 = SBB32ri8
{ 2605, 7, 1, 0, 615, 0|(1ULL<<MCID::MayLoad), 0xd80000106ULL, ImplicitList6, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #2605 = SBB32rm
{ 2606, 3, 1, 0, 614, 0, 0xc80000103ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #2606 = SBB32rr
{ 2607, 3, 1, 0, 614, 0, 0xd80000105ULL, ImplicitList6, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #2607 = SBB32rr_REV
{ 2608, 1, 0, 0, 5, 0, 0xe801e0001ULL, ImplicitList8, ImplicitList8, OperandInfo2, -1 ,nullptr }, // Inst #2608 = SBB64i32
{ 2609, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2609 = SBB64mi32
{ 2610, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2610 = SBB64mi8
{ 2611, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc80020004ULL, ImplicitList6, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #2611 = SBB64mr
{ 2612, 3, 1, 0, 614, 0, 0x40801e0013ULL, ImplicitList6, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2612 = SBB64ri32
{ 2613, 3, 1, 0, 614, 0, 0x4180060013ULL, ImplicitList6, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2613 = SBB64ri8
{ 2614, 7, 1, 0, 615, 0|(1ULL<<MCID::MayLoad), 0xd80020006ULL, ImplicitList6, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #2614 = SBB64rm
{ 2615, 3, 1, 0, 614, 0, 0xc80020003ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #2615 = SBB64rr
{ 2616, 3, 1, 0, 614, 0, 0xd80020005ULL, ImplicitList6, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #2616 = SBB64rr_REV
{ 2617, 1, 0, 0, 5, 0, 0xe00040001ULL, ImplicitList1, ImplicitList1, OperandInfo2, -1 ,nullptr }, // Inst #2617 = SBB8i8
{ 2618, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2618 = SBB8mi
{ 2619, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001bULL, ImplicitList6, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2619 = SBB8mi8
{ 2620, 6, 0, 0, 616, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0xc00000004ULL, ImplicitList6, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #2620 = SBB8mr
{ 2621, 3, 1, 0, 614, 0, 0x4000040013ULL, ImplicitList6, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2621 = SBB8ri
{ 2622, 3, 1, 0, 614, 0, 0x4100040013ULL, ImplicitList6, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2622 = SBB8ri8
{ 2623, 7, 1, 0, 615, 0|(1ULL<<MCID::MayLoad), 0xd00000006ULL, ImplicitList6, ImplicitList6, OperandInfo35, -1 ,nullptr }, // Inst #2623 = SBB8rm
{ 2624, 3, 1, 0, 614, 0, 0xc00000003ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #2624 = SBB8rr
{ 2625, 3, 1, 0, 614, 0, 0xd00000005ULL, ImplicitList6, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #2625 = SBB8rr_REV
{ 2626, 1, 0, 0, 723, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5700000009ULL, ImplicitList74, ImplicitList75, OperandInfo148, -1 ,nullptr }, // Inst #2626 = SCASB
{ 2627, 1, 0, 0, 723, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780000109ULL, ImplicitList76, ImplicitList75, OperandInfo148, -1 ,nullptr }, // Inst #2627 = SCASL
{ 2628, 1, 0, 0, 723, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780020009ULL, ImplicitList77, ImplicitList75, OperandInfo148, -1 ,nullptr }, // Inst #2628 = SCASQ
{ 2629, 1, 0, 0, 723, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5780000089ULL, ImplicitList78, ImplicitList75, OperandInfo148, -1 ,nullptr }, // Inst #2629 = SCASW
{ 2630, 2, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList11, ImplicitList79, OperandInfo51, -1 ,nullptr }, // Inst #2630 = SEG_ALLOCA_32
{ 2631, 2, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList13, ImplicitList80, OperandInfo52, -1 ,nullptr }, // Inst #2631 = SEG_ALLOCA_64
{ 2632, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2632 = SEH_EndPrologue
{ 2633, 0, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2633 = SEH_Epilogue
{ 2634, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #2634 = SEH_PushFrame
{ 2635, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #2635 = SEH_PushReg
{ 2636, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #2636 = SEH_SaveReg
{ 2637, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #2637 = SEH_SaveXMM
{ 2638, 2, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo8, -1 ,nullptr }, // Inst #2638 = SEH_SetFrame
{ 2639, 1, 0, 0, 0, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #2639 = SEH_StackAlloc
{ 2640, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x498000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2640 = SETAEm
{ 2641, 1, 1, 0, 690, 0, 0x498000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2641 = SETAEr
{ 2642, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4b8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2642 = SETAm
{ 2643, 1, 1, 0, 690, 0, 0x4b8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2643 = SETAr
{ 2644, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4b0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2644 = SETBEm
{ 2645, 1, 1, 0, 690, 0, 0x4b0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2645 = SETBEr
{ 2646, 1, 1, 0, 11, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList6, ImplicitList6, OperandInfo82, -1 ,nullptr }, // Inst #2646 = SETB_C16r
{ 2647, 1, 1, 0, 11, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList6, ImplicitList6, OperandInfo83, -1 ,nullptr }, // Inst #2647 = SETB_C32r
{ 2648, 1, 1, 0, 11, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList6, ImplicitList6, OperandInfo85, -1 ,nullptr }, // Inst #2648 = SETB_C64r
{ 2649, 1, 1, 0, 11, 0|(1ULL<<MCID::Pseudo), 0x0ULL, ImplicitList6, ImplicitList6, OperandInfo134, -1 ,nullptr }, // Inst #2649 = SETB_C8r
{ 2650, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x490000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2650 = SETBm
{ 2651, 1, 1, 0, 690, 0, 0x490000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2651 = SETBr
{ 2652, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4a0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2652 = SETEm
{ 2653, 1, 1, 0, 690, 0, 0x4a0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2653 = SETEr
{ 2654, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4e8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2654 = SETGEm
{ 2655, 1, 1, 0, 690, 0, 0x4e8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2655 = SETGEr
{ 2656, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4f8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2656 = SETGm
{ 2657, 1, 1, 0, 690, 0, 0x4f8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2657 = SETGr
{ 2658, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4f0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2658 = SETLEm
{ 2659, 1, 1, 0, 690, 0, 0x4f0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2659 = SETLEr
{ 2660, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4e0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2660 = SETLm
{ 2661, 1, 1, 0, 690, 0, 0x4e0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2661 = SETLr
{ 2662, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4a8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2662 = SETNEm
{ 2663, 1, 1, 0, 690, 0, 0x4a8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2663 = SETNEr
{ 2664, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x488000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2664 = SETNOm
{ 2665, 1, 1, 0, 690, 0, 0x488000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2665 = SETNOr
{ 2666, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4d8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2666 = SETNPm
{ 2667, 1, 1, 0, 690, 0, 0x4d8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2667 = SETNPr
{ 2668, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4c8000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2668 = SETNSm
{ 2669, 1, 1, 0, 690, 0, 0x4c8000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2669 = SETNSr
{ 2670, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x480000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2670 = SETOm
{ 2671, 1, 1, 0, 690, 0, 0x480000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2671 = SETOr
{ 2672, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4d0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2672 = SETPm
{ 2673, 1, 1, 0, 690, 0, 0x4d0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2673 = SETPr
{ 2674, 5, 0, 0, 691, 0|(1ULL<<MCID::MayStore), 0x4c0000400fULL, ImplicitList6, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2674 = SETSm
{ 2675, 1, 1, 0, 690, 0, 0x4c0000400eULL, ImplicitList6, nullptr, OperandInfo134, -1 ,nullptr }, // Inst #2675 = SETSr
{ 2676, 0, 0, 0, 477, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700004858ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2676 = SFENCE
{ 2677, 5, 1, 0, 478, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004098ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2677 = SGDT16m
{ 2678, 5, 1, 0, 478, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004118ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2678 = SGDT32m
{ 2679, 5, 1, 0, 478, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2679 = SGDT64m
{ 2680, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6480008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2680 = SHA1MSG1rm
{ 2681, 3, 1, 0, 0, 0, 0x6480008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2681 = SHA1MSG1rr
{ 2682, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6500008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2682 = SHA1MSG2rm
{ 2683, 3, 1, 0, 0, 0, 0x6500008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2683 = SHA1MSG2rr
{ 2684, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6400008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2684 = SHA1NEXTErm
{ 2685, 3, 1, 0, 0, 0, 0x6400008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2685 = SHA1NEXTErr
{ 2686, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x660004c006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2686 = SHA1RNDS4rmi
{ 2687, 4, 1, 0, 0, 0, 0x660004c005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #2687 = SHA1RNDS4rri
{ 2688, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6600008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2688 = SHA256MSG1rm
{ 2689, 3, 1, 0, 0, 0, 0x6600008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2689 = SHA256MSG1rr
{ 2690, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6680008006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2690 = SHA256MSG2rm
{ 2691, 3, 1, 0, 0, 0, 0x6680008005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2691 = SHA256MSG2rr
{ 2692, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6580008006ULL, ImplicitList15, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2692 = SHA256RNDS2rm
{ 2693, 3, 1, 0, 0, 0, 0x6580008005ULL, ImplicitList15, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2693 = SHA256RNDS2rr
{ 2694, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000009cULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2694 = SHL16m1
{ 2695, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000009cULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2695 = SHL16mCL
{ 2696, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004009cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2696 = SHL16mi
{ 2697, 2, 1, 0, 448, 0, 0x6880000094ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2697 = SHL16r1
{ 2698, 2, 1, 0, 654, 0, 0x6980000094ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2698 = SHL16rCL
{ 2699, 3, 1, 0, 448, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080040094ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2699 = SHL16ri
{ 2700, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000011cULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2700 = SHL32m1
{ 2701, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000011cULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2701 = SHL32mCL
{ 2702, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004011cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2702 = SHL32mi
{ 2703, 2, 1, 0, 448, 0, 0x6880000114ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2703 = SHL32r1
{ 2704, 2, 1, 0, 654, 0, 0x6980000114ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2704 = SHL32rCL
{ 2705, 3, 1, 0, 448, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080040114ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2705 = SHL32ri
{ 2706, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688002001cULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2706 = SHL64m1
{ 2707, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698002001cULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2707 = SHL64mCL
{ 2708, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608006001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2708 = SHL64mi
{ 2709, 2, 1, 0, 448, 0, 0x6880020014ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2709 = SHL64r1
{ 2710, 2, 1, 0, 654, 0, 0x6980020014ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2710 = SHL64rCL
{ 2711, 3, 1, 0, 448, 0|(1ULL<<MCID::ConvertibleTo3Addr), 0x6080060014ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2711 = SHL64ri
{ 2712, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680000001cULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2712 = SHL8m1
{ 2713, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x690000001cULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2713 = SHL8mCL
{ 2714, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x600004001cULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2714 = SHL8mi
{ 2715, 2, 1, 0, 448, 0, 0x6800000014ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2715 = SHL8r1
{ 2716, 2, 1, 0, 654, 0, 0x6900000014ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2716 = SHL8rCL
{ 2717, 3, 1, 0, 448, 0, 0x6000040014ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2717 = SHL8ri
{ 2718, 6, 0, 0, 676, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280004084ULL, ImplicitList62, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #2718 = SHLD16mrCL
{ 2719, 7, 0, 0, 667, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200044084ULL, nullptr, ImplicitList6, OperandInfo263, -1 ,nullptr }, // Inst #2719 = SHLD16mri8
{ 2720, 3, 1, 0, 670, 0, 0x5280004083ULL, ImplicitList62, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #2720 = SHLD16rrCL
{ 2721, 4, 1, 0, 664, 0|(1ULL<<MCID::Commutable), 0x5200044083ULL, nullptr, ImplicitList6, OperandInfo264, -1 ,nullptr }, // Inst #2721 = SHLD16rri8
{ 2722, 6, 0, 0, 677, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280004104ULL, ImplicitList62, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #2722 = SHLD32mrCL
{ 2723, 7, 0, 0, 668, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200044104ULL, nullptr, ImplicitList6, OperandInfo265, -1 ,nullptr }, // Inst #2723 = SHLD32mri8
{ 2724, 3, 1, 0, 671, 0, 0x5280004103ULL, ImplicitList62, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #2724 = SHLD32rrCL
{ 2725, 4, 1, 0, 665, 0|(1ULL<<MCID::Commutable), 0x5200044103ULL, nullptr, ImplicitList6, OperandInfo266, -1 ,nullptr }, // Inst #2725 = SHLD32rri8
{ 2726, 6, 0, 0, 678, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5280024004ULL, ImplicitList62, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #2726 = SHLD64mrCL
{ 2727, 7, 0, 0, 669, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5200064004ULL, nullptr, ImplicitList6, OperandInfo267, -1 ,nullptr }, // Inst #2727 = SHLD64mri8
{ 2728, 3, 1, 0, 672, 0, 0x5280024003ULL, ImplicitList62, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #2728 = SHLD64rrCL
{ 2729, 4, 1, 0, 666, 0|(1ULL<<MCID::Commutable), 0x5200064003ULL, nullptr, ImplicitList6, OperandInfo268, -1 ,nullptr }, // Inst #2729 = SHLD64rri8
{ 2730, 7, 1, 0, 473, 0|(1ULL<<MCID::MayLoad), 0x27ba0009006ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr }, // Inst #2730 = SHLX32rm
{ 2731, 3, 1, 0, 462, 0, 0x27ba0009005ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr }, // Inst #2731 = SHLX32rr
{ 2732, 7, 1, 0, 473, 0|(1ULL<<MCID::MayLoad), 0x2fba0009006ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #2732 = SHLX64rm
{ 2733, 3, 1, 0, 462, 0, 0x2fba0009005ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, // Inst #2733 = SHLX64rr
{ 2734, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000009dULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2734 = SHR16m1
{ 2735, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000009dULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2735 = SHR16mCL
{ 2736, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2736 = SHR16mi
{ 2737, 2, 1, 0, 448, 0, 0x6880000095ULL, nullptr, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2737 = SHR16r1
{ 2738, 2, 1, 0, 654, 0, 0x6980000095ULL, ImplicitList62, ImplicitList6, OperandInfo132, -1 ,nullptr }, // Inst #2738 = SHR16rCL
{ 2739, 3, 1, 0, 448, 0, 0x6080040095ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2739 = SHR16ri
{ 2740, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688000011dULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2740 = SHR32m1
{ 2741, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698000011dULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2741 = SHR32mCL
{ 2742, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608004011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2742 = SHR32mi
{ 2743, 2, 1, 0, 448, 0, 0x6880000115ULL, nullptr, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2743 = SHR32r1
{ 2744, 2, 1, 0, 654, 0, 0x6980000115ULL, ImplicitList62, ImplicitList6, OperandInfo77, -1 ,nullptr }, // Inst #2744 = SHR32rCL
{ 2745, 3, 1, 0, 448, 0, 0x6080040115ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2745 = SHR32ri
{ 2746, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x688002001dULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2746 = SHR64m1
{ 2747, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x698002001dULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2747 = SHR64mCL
{ 2748, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x608006001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2748 = SHR64mi
{ 2749, 2, 1, 0, 448, 0, 0x6880020015ULL, nullptr, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2749 = SHR64r1
{ 2750, 2, 1, 0, 654, 0, 0x6980020015ULL, ImplicitList62, ImplicitList6, OperandInfo78, -1 ,nullptr }, // Inst #2750 = SHR64rCL
{ 2751, 3, 1, 0, 448, 0, 0x6080060015ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2751 = SHR64ri
{ 2752, 5, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x680000001dULL, nullptr, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2752 = SHR8m1
{ 2753, 5, 0, 0, 655, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x690000001dULL, ImplicitList62, ImplicitList6, OperandInfo43, -1 ,nullptr }, // Inst #2753 = SHR8mCL
{ 2754, 6, 0, 0, 653, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x600004001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2754 = SHR8mi
{ 2755, 2, 1, 0, 448, 0, 0x6800000015ULL, nullptr, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2755 = SHR8r1
{ 2756, 2, 1, 0, 654, 0, 0x6900000015ULL, ImplicitList62, ImplicitList6, OperandInfo133, -1 ,nullptr }, // Inst #2756 = SHR8rCL
{ 2757, 3, 1, 0, 448, 0, 0x6000040015ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2757 = SHR8ri
{ 2758, 6, 0, 0, 676, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680004084ULL, ImplicitList62, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #2758 = SHRD16mrCL
{ 2759, 7, 0, 0, 667, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600044084ULL, nullptr, ImplicitList6, OperandInfo263, -1 ,nullptr }, // Inst #2759 = SHRD16mri8
{ 2760, 3, 1, 0, 673, 0, 0x5680004083ULL, ImplicitList62, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #2760 = SHRD16rrCL
{ 2761, 4, 1, 0, 664, 0|(1ULL<<MCID::Commutable), 0x5600044083ULL, nullptr, ImplicitList6, OperandInfo264, -1 ,nullptr }, // Inst #2761 = SHRD16rri8
{ 2762, 6, 0, 0, 677, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680004104ULL, ImplicitList62, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #2762 = SHRD32mrCL
{ 2763, 7, 0, 0, 668, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600044104ULL, nullptr, ImplicitList6, OperandInfo265, -1 ,nullptr }, // Inst #2763 = SHRD32mri8
{ 2764, 3, 1, 0, 674, 0, 0x5680004103ULL, ImplicitList62, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #2764 = SHRD32rrCL
{ 2765, 4, 1, 0, 665, 0|(1ULL<<MCID::Commutable), 0x5600044103ULL, nullptr, ImplicitList6, OperandInfo266, -1 ,nullptr }, // Inst #2765 = SHRD32rri8
{ 2766, 6, 0, 0, 678, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5680024004ULL, ImplicitList62, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #2766 = SHRD64mrCL
{ 2767, 7, 0, 0, 669, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x5600064004ULL, nullptr, ImplicitList6, OperandInfo267, -1 ,nullptr }, // Inst #2767 = SHRD64mri8
{ 2768, 3, 1, 0, 675, 0, 0x5680024003ULL, ImplicitList62, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #2768 = SHRD64rrCL
{ 2769, 4, 1, 0, 666, 0|(1ULL<<MCID::Commutable), 0x5600064003ULL, nullptr, ImplicitList6, OperandInfo268, -1 ,nullptr }, // Inst #2769 = SHRD64rri8
{ 2770, 7, 1, 0, 473, 0|(1ULL<<MCID::MayLoad), 0x27ba000a006ULL, nullptr, nullptr, OperandInfo64, -1 ,nullptr }, // Inst #2770 = SHRX32rm
{ 2771, 3, 1, 0, 462, 0, 0x27ba000a005ULL, nullptr, nullptr, OperandInfo58, -1 ,nullptr }, // Inst #2771 = SHRX32rr
{ 2772, 7, 1, 0, 473, 0|(1ULL<<MCID::MayLoad), 0x2fba000a006ULL, nullptr, nullptr, OperandInfo65, -1 ,nullptr }, // Inst #2772 = SHRX64rm
{ 2773, 3, 1, 0, 462, 0, 0x2fba000a005ULL, nullptr, nullptr, OperandInfo60, -1 ,nullptr }, // Inst #2773 = SHRX64rr
{ 2774, 8, 1, 0, 491, 0|(1ULL<<MCID::MayLoad), 0x6310045006ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2774 = SHUFPDrmi
{ 2775, 4, 1, 0, 492, 0, 0x6310045005ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #2775 = SHUFPDrri
{ 2776, 8, 1, 0, 491, 0|(1ULL<<MCID::MayLoad), 0x6308044806ULL, nullptr, nullptr, OperandInfo70, -1 ,nullptr }, // Inst #2776 = SHUFPSrmi
{ 2777, 4, 1, 0, 492, 0, 0x6308044805ULL, nullptr, nullptr, OperandInfo71, -1 ,nullptr }, // Inst #2777 = SHUFPSrri
{ 2778, 5, 1, 0, 493, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004099ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2778 = SIDT16m
{ 2779, 5, 1, 0, 56, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004119ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2779 = SIDT32m
{ 2780, 5, 1, 0, 56, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2780 = SIDT64m
{ 2781, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005eULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #2781 = SIN_F
{ 2782, 2, 1, 0, 0, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr }, // Inst #2782 = SIN_Fp32
{ 2783, 2, 1, 0, 0, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr }, // Inst #2783 = SIN_Fp64
{ 2784, 2, 1, 0, 0, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr }, // Inst #2784 = SIN_Fp80
{ 2785, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403eULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr }, // Inst #2785 = SKINIT
{ 2786, 5, 1, 0, 494, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2786 = SLDT16m
{ 2787, 1, 1, 0, 494, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4090ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #2787 = SLDT16r
{ 2788, 1, 1, 0, 494, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4110ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #2788 = SLDT32r
{ 2789, 5, 1, 0, 494, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x24018ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2789 = SLDT64m
{ 2790, 1, 1, 0, 494, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x24010ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #2790 = SLDT64r
{ 2791, 5, 1, 0, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000401cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2791 = SMSW16m
{ 2792, 1, 1, 0, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004094ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #2792 = SMSW16r
{ 2793, 1, 1, 0, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004114ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #2793 = SMSW32r
{ 2794, 1, 1, 0, 495, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80024014ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #2794 = SMSW64r
{ 2795, 6, 1, 0, 496, 0|(1ULL<<MCID::MayLoad), 0x2890005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2795 = SQRTPDm
{ 2796, 2, 1, 0, 497, 0, 0x2890005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2796 = SQRTPDr
{ 2797, 6, 1, 0, 498, 0|(1ULL<<MCID::MayLoad), 0x2888004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #2797 = SQRTPSm
{ 2798, 2, 1, 0, 499, 0, 0x2888004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #2798 = SQRTPSr
{ 2799, 6, 1, 0, 500, 0|(1ULL<<MCID::MayLoad), 0x2890006006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #2799 = SQRTSDm
{ 2800, 7, 1, 0, 501, 0|(1ULL<<MCID::MayLoad), 0x2880006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2800 = SQRTSDm_Int
{ 2801, 2, 1, 0, 502, 0, 0x2890006005ULL, nullptr, nullptr, OperandInfo114, -1 ,nullptr }, // Inst #2801 = SQRTSDr
{ 2802, 3, 1, 0, 501, 0, 0x2880006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2802 = SQRTSDr_Int
{ 2803, 6, 1, 0, 503, 0|(1ULL<<MCID::MayLoad), 0x2888005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #2803 = SQRTSSm
{ 2804, 7, 1, 0, 501, 0|(1ULL<<MCID::MayLoad), 0x2880005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2804 = SQRTSSm_Int
{ 2805, 2, 1, 0, 504, 0, 0x2888005805ULL, nullptr, nullptr, OperandInfo116, -1 ,nullptr }, // Inst #2805 = SQRTSSr
{ 2806, 3, 1, 0, 501, 0, 0x2880005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2806 = SQRTSSr_Int
{ 2807, 0, 0, 0, 505, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000005aULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #2807 = SQRT_F
{ 2808, 2, 1, 0, 505, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr }, // Inst #2808 = SQRT_Fp32
{ 2809, 2, 1, 0, 505, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr }, // Inst #2809 = SQRT_Fp64
{ 2810, 2, 1, 0, 505, 0, 0xc00000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr }, // Inst #2810 = SQRT_Fp80
{ 2811, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1b00000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2811 = SS_PREFIX
{ 2812, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000402bULL, nullptr, ImplicitList6, nullptr, -1 ,nullptr }, // Inst #2812 = STAC
{ 2813, 0, 0, 0, 506, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7c80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2813 = STC
{ 2814, 0, 0, 0, 693, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7e80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2814 = STD
{ 2815, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403cULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2815 = STGI
{ 2816, 0, 0, 0, 508, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7d80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2816 = STI
{ 2817, 5, 0, 0, 946, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000401bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2817 = STMXCSR
{ 2818, 1, 1, 0, 719, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5500000009ULL, ImplicitList74, ImplicitList32, OperandInfo148, -1 ,nullptr }, // Inst #2818 = STOSB
{ 2819, 1, 1, 0, 719, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580000109ULL, ImplicitList76, ImplicitList32, OperandInfo148, -1 ,nullptr }, // Inst #2819 = STOSL
{ 2820, 1, 1, 0, 719, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580020009ULL, ImplicitList81, ImplicitList45, OperandInfo148, -1 ,nullptr }, // Inst #2820 = STOSQ
{ 2821, 1, 1, 0, 719, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5580000089ULL, ImplicitList78, ImplicitList32, OperandInfo148, -1 ,nullptr }, // Inst #2821 = STOSW
{ 2822, 1, 1, 0, 511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4091ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #2822 = STR16r
{ 2823, 1, 1, 0, 511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4111ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #2823 = STR32r
{ 2824, 1, 1, 0, 511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x24011ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #2824 = STR64r
{ 2825, 5, 1, 0, 511, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4019ULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #2825 = STRm
{ 2826, 5, 0, 0, 202, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001aULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2826 = ST_F32m
{ 2827, 5, 0, 0, 202, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001aULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2827 = ST_F64m
{ 2828, 1, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000013ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2828 = ST_FCOMPST0r
{ 2829, 1, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000012ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2829 = ST_FCOMPST0r_alt
{ 2830, 1, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000012ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2830 = ST_FCOMST0r
{ 2831, 5, 0, 0, 202, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c8000001bULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2831 = ST_FP32m
{ 2832, 5, 0, 0, 202, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e8000001bULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2832 = ST_FP64m
{ 2833, 5, 0, 0, 741, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d8000001fULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2833 = ST_FP80m
{ 2834, 1, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000013ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2834 = ST_FPNCEST0r
{ 2835, 1, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000012ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2835 = ST_FPST0r
{ 2836, 1, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000013ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2836 = ST_FPST0r_alt
{ 2837, 1, 0, 0, 740, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000013ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #2837 = ST_FPrr
{ 2838, 1, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2838 = ST_FXCHST0r
{ 2839, 1, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000011ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2839 = ST_FXCHST0r_alt
{ 2840, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr }, // Inst #2840 = ST_Fp32m
{ 2841, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #2841 = ST_Fp64m
{ 2842, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #2842 = ST_Fp64m32
{ 2843, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #2843 = ST_Fp80m32
{ 2844, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #2844 = ST_Fp80m64
{ 2845, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo138, -1 ,nullptr }, // Inst #2845 = ST_FpP32m
{ 2846, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #2846 = ST_FpP64m
{ 2847, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo139, -1 ,nullptr }, // Inst #2847 = ST_FpP64m32
{ 2848, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #2848 = ST_FpP80m
{ 2849, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #2849 = ST_FpP80m32
{ 2850, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x800000ULL, nullptr, ImplicitList5, OperandInfo140, -1 ,nullptr }, // Inst #2850 = ST_FpP80m64
{ 2851, 1, 0, 0, 740, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000012ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #2851 = ST_Frr
{ 2852, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x16800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #2852 = SUB16i16
{ 2853, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2853 = SUB16mi
{ 2854, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2854 = SUB16mi8
{ 2855, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #2855 = SUB16mr
{ 2856, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x40800c0095ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2856 = SUB16ri
{ 2857, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x4180040095ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #2857 = SUB16ri8
{ 2858, 7, 1, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #2858 = SUB16rm
{ 2859, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x1480000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #2859 = SUB16rr
{ 2860, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x1580000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #2860 = SUB16rr_REV
{ 2861, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1680140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr }, // Inst #2861 = SUB32i32
{ 2862, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2862 = SUB32mi
{ 2863, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2863 = SUB32mi8
{ 2864, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #2864 = SUB32mr
{ 2865, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x4080140115ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2865 = SUB32ri
{ 2866, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x4180040115ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #2866 = SUB32ri8
{ 2867, 7, 1, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #2867 = SUB32rm
{ 2868, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x1480000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #2868 = SUB32rr
{ 2869, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x1580000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #2869 = SUB32rr_REV
{ 2870, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x16801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr }, // Inst #2870 = SUB64i32
{ 2871, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2871 = SUB64mi32
{ 2872, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2872 = SUB64mi8
{ 2873, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1480020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #2873 = SUB64mr
{ 2874, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x40801e0015ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2874 = SUB64ri32
{ 2875, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x4180060015ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #2875 = SUB64ri8
{ 2876, 7, 1, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1580020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #2876 = SUB64rm
{ 2877, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x1480020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #2877 = SUB64rr
{ 2878, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x1580020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #2878 = SUB64rr_REV
{ 2879, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x1600040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr }, // Inst #2879 = SUB8i8
{ 2880, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2880 = SUB8mi
{ 2881, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001dULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2881 = SUB8mi8
{ 2882, 6, 0, 0, 613, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1400000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #2882 = SUB8mr
{ 2883, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x4000040015ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2883 = SUB8ri
{ 2884, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x4100040015ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #2884 = SUB8ri8
{ 2885, 7, 1, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x1500000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr }, // Inst #2885 = SUB8rm
{ 2886, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x1400000003ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #2886 = SUB8rr
{ 2887, 3, 1, 0, 9, 0|(1ULL<<MCID::Compare), 0x1500000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #2887 = SUB8rr_REV
{ 2888, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x2e10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2888 = SUBPDrm
{ 2889, 3, 1, 0, 14, 0, 0x2e10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2889 = SUBPDrr
{ 2890, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x2e08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2890 = SUBPSrm
{ 2891, 3, 1, 0, 16, 0, 0x2e08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2891 = SUBPSrr
{ 2892, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2892 = SUBR_F32m
{ 2893, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2893 = SUBR_F64m
{ 2894, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2894 = SUBR_FI16m
{ 2895, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001dULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2895 = SUBR_FI32m
{ 2896, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000014ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2896 = SUBR_FPrST0
{ 2897, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000015ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2897 = SUBR_FST0r
{ 2898, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #2898 = SUBR_Fp32m
{ 2899, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #2899 = SUBR_Fp64m
{ 2900, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #2900 = SUBR_Fp64m32
{ 2901, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #2901 = SUBR_Fp80m32
{ 2902, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #2902 = SUBR_Fp80m64
{ 2903, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #2903 = SUBR_FpI16m32
{ 2904, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #2904 = SUBR_FpI16m64
{ 2905, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #2905 = SUBR_FpI16m80
{ 2906, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #2906 = SUBR_FpI32m32
{ 2907, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #2907 = SUBR_FpI32m64
{ 2908, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #2908 = SUBR_FpI32m80
{ 2909, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000014ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2909 = SUBR_FrST0
{ 2910, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2e10006006ULL, nullptr, nullptr, OperandInfo39, -1 ,nullptr }, // Inst #2910 = SUBSDrm
{ 2911, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x2e10006006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2911 = SUBSDrm_Int
{ 2912, 3, 1, 0, 18, 0, 0x2e10006005ULL, nullptr, nullptr, OperandInfo40, -1 ,nullptr }, // Inst #2912 = SUBSDrr
{ 2913, 3, 1, 0, 18, 0, 0x2e10006005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2913 = SUBSDrr_Int
{ 2914, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2e08005806ULL, nullptr, nullptr, OperandInfo41, -1 ,nullptr }, // Inst #2914 = SUBSSrm
{ 2915, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x2e08005806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #2915 = SUBSSrm_Int
{ 2916, 3, 1, 0, 20, 0, 0x2e08005805ULL, nullptr, nullptr, OperandInfo42, -1 ,nullptr }, // Inst #2916 = SUBSSrr
{ 2917, 3, 1, 0, 20, 0, 0x2e08005805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #2917 = SUBSSrr_Int
{ 2918, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6c0000001cULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2918 = SUB_F32m
{ 2919, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6e0000001cULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2919 = SUB_F64m
{ 2920, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6f0000001cULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2920 = SUB_FI16m
{ 2921, 5, 0, 0, 23, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x6d0000001cULL, nullptr, ImplicitList5, OperandInfo43, -1 ,nullptr }, // Inst #2921 = SUB_FI32m
{ 2922, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f00000015ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2922 = SUB_FPrST0
{ 2923, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c00000014ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2923 = SUB_FST0r
{ 2924, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo45, -1 ,nullptr }, // Inst #2924 = SUB_Fp32
{ 2925, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #2925 = SUB_Fp32m
{ 2926, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo47, -1 ,nullptr }, // Inst #2926 = SUB_Fp64
{ 2927, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #2927 = SUB_Fp64m
{ 2928, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #2928 = SUB_Fp64m32
{ 2929, 3, 1, 0, 0, 0, 0x1000000ULL, nullptr, ImplicitList5, OperandInfo49, -1 ,nullptr }, // Inst #2929 = SUB_Fp80
{ 2930, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #2930 = SUB_Fp80m32
{ 2931, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #2931 = SUB_Fp80m64
{ 2932, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #2932 = SUB_FpI16m32
{ 2933, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #2933 = SUB_FpI16m64
{ 2934, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #2934 = SUB_FpI16m80
{ 2935, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo46, -1 ,nullptr }, // Inst #2935 = SUB_FpI32m32
{ 2936, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo48, -1 ,nullptr }, // Inst #2936 = SUB_FpI32m64
{ 2937, 7, 1, 0, 23, 0|(1ULL<<MCID::MayLoad), 0xc00000ULL, nullptr, ImplicitList5, OperandInfo50, -1 ,nullptr }, // Inst #2937 = SUB_FpI32m80
{ 2938, 1, 0, 0, 24, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e00000015ULL, nullptr, nullptr, OperandInfo44, -1 ,nullptr }, // Inst #2938 = SUB_FrST0
{ 2939, 0, 0, 0, 514, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004058ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2939 = SWAPGS
{ 2940, 0, 0, 0, 515, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x280004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2940 = SYSCALL
{ 2941, 0, 0, 0, 516, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a00004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2941 = SYSENTER
{ 2942, 0, 0, 0, 516, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a80004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2942 = SYSEXIT
{ 2943, 0, 0, 0, 516, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1a80024001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2943 = SYSEXIT64
{ 2944, 0, 0, 0, 515, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2944 = SYSRET
{ 2945, 0, 0, 0, 515, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x380024001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2945 = SYSRET64
{ 2946, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100c001481fULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #2946 = T1MSKC32rm
{ 2947, 2, 1, 0, 0, 0, 0x100c0014817ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #2947 = T1MSKC32rr
{ 2948, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x180c001481fULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #2948 = T1MSKC64rm
{ 2949, 2, 1, 0, 0, 0, 0x180c0014817ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #2949 = T1MSKC64rr
{ 2950, 1, 0, 0, 517, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7480180001ULL, ImplicitList11, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #2950 = TAILJMPd
{ 2951, 1, 0, 0, 211, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7480180001ULL, ImplicitList13, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #2951 = TAILJMPd64
{ 2952, 1, 0, 0, 211, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x74801a0001ULL, ImplicitList13, nullptr, OperandInfo84, -1 ,nullptr }, // Inst #2952 = TAILJMPd64_REX
{ 2953, 5, 0, 0, 209, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000001cULL, ImplicitList11, nullptr, OperandInfo269, -1 ,nullptr }, // Inst #2953 = TAILJMPm
{ 2954, 5, 0, 0, 518, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8000001cULL, ImplicitList13, nullptr, OperandInfo269, -1 ,nullptr }, // Inst #2954 = TAILJMPm64
{ 2955, 5, 0, 0, 518, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f8002001cULL, ImplicitList13, nullptr, OperandInfo269, -1 ,nullptr }, // Inst #2955 = TAILJMPm64_REX
{ 2956, 1, 0, 0, 519, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80000014ULL, ImplicitList11, nullptr, OperandInfo270, -1 ,nullptr }, // Inst #2956 = TAILJMPr
{ 2957, 1, 0, 0, 518, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80000014ULL, ImplicitList13, nullptr, OperandInfo270, -1 ,nullptr }, // Inst #2957 = TAILJMPr64
{ 2958, 1, 0, 0, 518, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x7f80020014ULL, ImplicitList13, nullptr, OperandInfo270, -1 ,nullptr }, // Inst #2958 = TAILJMPr64_REX
{ 2959, 2, 0, 0, 200, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList11, nullptr, OperandInfo271, -1 ,nullptr }, // Inst #2959 = TCRETURNdi
{ 2960, 2, 0, 0, 520, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList13, nullptr, OperandInfo271, -1 ,nullptr }, // Inst #2960 = TCRETURNdi64
{ 2961, 6, 0, 0, 200, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList11, nullptr, OperandInfo272, -1 ,nullptr }, // Inst #2961 = TCRETURNmi
{ 2962, 6, 0, 0, 520, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList13, nullptr, OperandInfo272, -1 ,nullptr }, // Inst #2962 = TCRETURNmi64
{ 2963, 2, 0, 0, 200, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator), 0x0ULL, ImplicitList11, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2963 = TCRETURNri
{ 2964, 2, 0, 0, 520, 0|(1ULL<<MCID::Return)|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Call)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList13, nullptr, OperandInfo273, -1 ,nullptr }, // Inst #2964 = TCRETURNri64
{ 2965, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x54800c0081ULL, ImplicitList3, ImplicitList6, OperandInfo2, -1 ,nullptr }, // Inst #2965 = TEST16i16
{ 2966, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b800c0098ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2966 = TEST16mi
{ 2967, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x7b800c0090ULL, nullptr, ImplicitList6, OperandInfo79, -1 ,nullptr }, // Inst #2967 = TEST16ri
{ 2968, 6, 0, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280000086ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr }, // Inst #2968 = TEST16rm
{ 2969, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280000083ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #2969 = TEST16rr
{ 2970, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x5480140101ULL, ImplicitList9, ImplicitList6, OperandInfo2, -1 ,nullptr }, // Inst #2970 = TEST32i32
{ 2971, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b80140118ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2971 = TEST32mi
{ 2972, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x7b80140110ULL, nullptr, ImplicitList6, OperandInfo80, -1 ,nullptr }, // Inst #2972 = TEST32ri
{ 2973, 6, 0, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280000106ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #2973 = TEST32rm
{ 2974, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280000103ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #2974 = TEST32rr
{ 2975, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x54801e0001ULL, ImplicitList10, ImplicitList6, OperandInfo2, -1 ,nullptr }, // Inst #2975 = TEST64i32
{ 2976, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b801e0018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2976 = TEST64mi32
{ 2977, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x7b801e0010ULL, nullptr, ImplicitList6, OperandInfo81, -1 ,nullptr }, // Inst #2977 = TEST64ri32
{ 2978, 6, 0, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4280020006ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #2978 = TEST64rm
{ 2979, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4280020003ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #2979 = TEST64rr
{ 2980, 1, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x5400040001ULL, ImplicitList4, ImplicitList6, OperandInfo2, -1 ,nullptr }, // Inst #2980 = TEST8i8
{ 2981, 6, 0, 0, 10, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x7b00040018ULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #2981 = TEST8mi
{ 2982, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare), 0x7b00040010ULL, nullptr, ImplicitList6, OperandInfo106, -1 ,nullptr }, // Inst #2982 = TEST8ri
{ 2983, 2, 0, 0, 9, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::Compare), 0x0ULL, nullptr, ImplicitList6, OperandInfo274, -1 ,nullptr }, // Inst #2983 = TEST8ri_NOREX
{ 2984, 6, 0, 0, 12, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::MayLoad), 0x4200000006ULL, nullptr, ImplicitList6, OperandInfo19, -1 ,nullptr }, // Inst #2984 = TEST8rm
{ 2985, 2, 0, 0, 9, 0|(1ULL<<MCID::Compare)|(1ULL<<MCID::Commutable), 0x4200000003ULL, nullptr, ImplicitList6, OperandInfo107, -1 ,nullptr }, // Inst #2985 = TEST8rr
{ 2986, 5, 0, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList11, ImplicitList82, OperandInfo43, -1 ,nullptr }, // Inst #2986 = TLSCall_32
{ 2987, 5, 0, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList83, ImplicitList8, OperandInfo43, -1 ,nullptr }, // Inst #2987 = TLSCall_64
{ 2988, 5, 0, 0, 0, 0, 0x0ULL, ImplicitList11, ImplicitList84, OperandInfo43, -1 ,nullptr }, // Inst #2988 = TLS_addr32
{ 2989, 5, 0, 0, 0, 0, 0x0ULL, ImplicitList13, ImplicitList85, OperandInfo43, -1 ,nullptr }, // Inst #2989 = TLS_addr64
{ 2990, 5, 0, 0, 0, 0, 0x0ULL, ImplicitList11, ImplicitList84, OperandInfo43, -1 ,nullptr }, // Inst #2990 = TLS_base_addr32
{ 2991, 5, 0, 0, 0, 0, 0x0ULL, ImplicitList13, ImplicitList85, OperandInfo43, -1 ,nullptr }, // Inst #2991 = TLS_base_addr64
{ 2992, 0, 0, 0, 56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x580004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #2992 = TRAP
{ 2993, 0, 0, 0, 768, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000044ULL, nullptr, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #2993 = TST_F
{ 2994, 1, 0, 0, 768, 0, 0x800000ULL, nullptr, ImplicitList5, OperandInfo195, -1 ,nullptr }, // Inst #2994 = TST_Fp32
{ 2995, 1, 0, 0, 768, 0, 0x800000ULL, nullptr, ImplicitList5, OperandInfo196, -1 ,nullptr }, // Inst #2995 = TST_Fp64
{ 2996, 1, 0, 0, 768, 0, 0x800000ULL, nullptr, ImplicitList5, OperandInfo197, -1 ,nullptr }, // Inst #2996 = TST_Fp80
{ 2997, 6, 1, 0, 695, 0|(1ULL<<MCID::MayLoad), 0x5e00005886ULL, nullptr, ImplicitList6, OperandInfo16, -1 ,nullptr }, // Inst #2997 = TZCNT16rm
{ 2998, 2, 1, 0, 694, 0, 0x5e00005885ULL, nullptr, ImplicitList6, OperandInfo61, -1 ,nullptr }, // Inst #2998 = TZCNT16rr
{ 2999, 6, 1, 0, 695, 0|(1ULL<<MCID::MayLoad), 0x5e00005906ULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #2999 = TZCNT32rm
{ 3000, 2, 1, 0, 694, 0, 0x5e00005905ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #3000 = TZCNT32rr
{ 3001, 6, 1, 0, 695, 0|(1ULL<<MCID::MayLoad), 0x5e00025806ULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #3001 = TZCNT64rm
{ 3002, 2, 1, 0, 694, 0, 0x5e00025805ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #3002 = TZCNT64rr
{ 3003, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100c001481cULL, nullptr, ImplicitList6, OperandInfo17, -1 ,nullptr }, // Inst #3003 = TZMSK32rm
{ 3004, 2, 1, 0, 0, 0, 0x100c0014814ULL, nullptr, ImplicitList6, OperandInfo51, -1 ,nullptr }, // Inst #3004 = TZMSK32rr
{ 3005, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x180c001481cULL, nullptr, ImplicitList6, OperandInfo18, -1 ,nullptr }, // Inst #3005 = TZMSK64rm
{ 3006, 2, 1, 0, 0, 0, 0x180c0014814ULL, nullptr, ImplicitList6, OperandInfo52, -1 ,nullptr }, // Inst #3006 = TZMSK64rr
{ 3007, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x1700005006ULL, nullptr, ImplicitList6, OperandInfo113, -1 ,nullptr }, // Inst #3007 = UCOMISDrm
{ 3008, 2, 0, 0, 76, 0, 0x1700005005ULL, nullptr, ImplicitList6, OperandInfo114, -1 ,nullptr }, // Inst #3008 = UCOMISDrr
{ 3009, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x1700004806ULL, nullptr, ImplicitList6, OperandInfo115, -1 ,nullptr }, // Inst #3009 = UCOMISSrm
{ 3010, 2, 0, 0, 76, 0, 0x1700004805ULL, nullptr, ImplicitList6, OperandInfo116, -1 ,nullptr }, // Inst #3010 = UCOMISSrr
{ 3011, 1, 0, 0, 766, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6f80000015ULL, ImplicitList86, ImplicitList22, OperandInfo44, -1 ,nullptr }, // Inst #3011 = UCOM_FIPr
{ 3012, 1, 0, 0, 766, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000015ULL, ImplicitList86, ImplicitList22, OperandInfo44, -1 ,nullptr }, // Inst #3012 = UCOM_FIr
{ 3013, 0, 0, 0, 764, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d00000049ULL, ImplicitList86, ImplicitList5, nullptr, -1 ,nullptr }, // Inst #3013 = UCOM_FPPr
{ 3014, 1, 0, 0, 761, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000015ULL, ImplicitList86, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #3014 = UCOM_FPr
{ 3015, 2, 0, 0, 24, 0, 0x1400000ULL, nullptr, ImplicitList22, OperandInfo13, -1 ,nullptr }, // Inst #3015 = UCOM_FpIr32
{ 3016, 2, 0, 0, 24, 0, 0x1400000ULL, nullptr, ImplicitList22, OperandInfo14, -1 ,nullptr }, // Inst #3016 = UCOM_FpIr64
{ 3017, 2, 0, 0, 24, 0, 0x1400000ULL, nullptr, ImplicitList22, OperandInfo15, -1 ,nullptr }, // Inst #3017 = UCOM_FpIr80
{ 3018, 2, 0, 0, 24, 0, 0x1400000ULL, nullptr, ImplicitList5, OperandInfo13, -1 ,nullptr }, // Inst #3018 = UCOM_Fpr32
{ 3019, 2, 0, 0, 24, 0, 0x1400000ULL, nullptr, ImplicitList5, OperandInfo14, -1 ,nullptr }, // Inst #3019 = UCOM_Fpr64
{ 3020, 2, 0, 0, 24, 0, 0x1400000ULL, nullptr, ImplicitList5, OperandInfo15, -1 ,nullptr }, // Inst #3020 = UCOM_Fpr80
{ 3021, 1, 0, 0, 761, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6e80000014ULL, ImplicitList86, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #3021 = UCOM_Fr
{ 3022, 0, 0, 0, 56, 0|(1ULL<<MCID::Barrier)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x5c80004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #3022 = UD2B
{ 3023, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0xa90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #3023 = UNPCKHPDrm
{ 3024, 3, 1, 0, 524, 0, 0xa90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #3024 = UNPCKHPDrr
{ 3025, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0xa88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #3025 = UNPCKHPSrm
{ 3026, 3, 1, 0, 524, 0, 0xa88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #3026 = UNPCKHPSrr
{ 3027, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0xa10005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #3027 = UNPCKLPDrm
{ 3028, 3, 1, 0, 524, 0, 0xa10005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #3028 = UNPCKLPDrr
{ 3029, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0xa08004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #3029 = UNPCKLPSrm
{ 3030, 3, 1, 0, 524, 0, 0xa08004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #3030 = UNPCKLPSrr
{ 3031, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo275, -1 ,nullptr }, // Inst #3031 = VAARG_64
{ 3032, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x92c30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #3032 = VADDPDYrm
{ 3033, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x92c30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #3033 = VADDPDYrr
{ 3034, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001ac60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3034 = VADDPDZ128rm
{ 3035, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101ac60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3035 = VADDPDZ128rmb
{ 3036, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121ac60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #3036 = VADDPDZ128rmbk
{ 3037, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161ac60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3037 = VADDPDZ128rmbkz
{ 3038, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021ac60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #3038 = VADDPDZ128rmk
{ 3039, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061ac60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3039 = VADDPDZ128rmkz
{ 3040, 3, 1, 0, 0, 0, 0x2001ac60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3040 = VADDPDZ128rr
{ 3041, 5, 1, 0, 0, 0, 0x2021ac60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3041 = VADDPDZ128rrk
{ 3042, 4, 1, 0, 0, 0, 0x2061ac60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #3042 = VADDPDZ128rrkz
{ 3043, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009ac60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3043 = VADDPDZ256rm
{ 3044, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109ac60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3044 = VADDPDZ256rmb
{ 3045, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129ac60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3045 = VADDPDZ256rmbk
{ 3046, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169ac60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3046 = VADDPDZ256rmbkz
{ 3047, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029ac60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3047 = VADDPDZ256rmk
{ 3048, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069ac60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3048 = VADDPDZ256rmkz
{ 3049, 3, 1, 0, 0, 0, 0x4009ac60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #3049 = VADDPDZ256rr
{ 3050, 5, 1, 0, 0, 0, 0x4029ac60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3050 = VADDPDZ256rrk
{ 3051, 4, 1, 0, 0, 0, 0x4069ac60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #3051 = VADDPDZ256rrkz
{ 3052, 4, 1, 0, 0, 0, 0x41181ac60005005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #3052 = VADDPDZrb
{ 3053, 6, 1, 0, 0, 0, 0x411a1ac60005005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #3053 = VADDPDZrbk
{ 3054, 5, 1, 0, 0, 0, 0x411e1ac60005005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #3054 = VADDPDZrbkz
{ 3055, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081ac60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3055 = VADDPDZrm
{ 3056, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181ac60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3056 = VADDPDZrmb
{ 3057, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1ac60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #3057 = VADDPDZrmbk
{ 3058, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1ac60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3058 = VADDPDZrmbkz
{ 3059, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1ac60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #3059 = VADDPDZrmk
{ 3060, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1ac60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3060 = VADDPDZrmkz
{ 3061, 3, 1, 0, 0, 0, 0x8081ac60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #3061 = VADDPDZrr
{ 3062, 5, 1, 0, 0, 0, 0x80a1ac60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #3062 = VADDPDZrrk
{ 3063, 4, 1, 0, 0, 0, 0x80e1ac60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #3063 = VADDPDZrrkz
{ 3064, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x12c30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3064 = VADDPDrm
{ 3065, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x12c30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3065 = VADDPDrr
{ 3066, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x92c28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #3066 = VADDPSYrm
{ 3067, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x92c28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #3067 = VADDPSYrr
{ 3068, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012c60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3068 = VADDPSZ128rm
{ 3069, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012c60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3069 = VADDPSZ128rmb
{ 3070, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212c60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #3070 = VADDPSZ128rmbk
{ 3071, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612c60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3071 = VADDPSZ128rmbkz
{ 3072, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212c60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #3072 = VADDPSZ128rmk
{ 3073, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612c60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3073 = VADDPSZ128rmkz
{ 3074, 3, 1, 0, 0, 0, 0x20012c60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3074 = VADDPSZ128rr
{ 3075, 5, 1, 0, 0, 0, 0x20212c60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #3075 = VADDPSZ128rrk
{ 3076, 4, 1, 0, 0, 0, 0x20612c60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #3076 = VADDPSZ128rrkz
{ 3077, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092c60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3077 = VADDPSZ256rm
{ 3078, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092c60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3078 = VADDPSZ256rmb
{ 3079, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292c60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #3079 = VADDPSZ256rmbk
{ 3080, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692c60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3080 = VADDPSZ256rmbkz
{ 3081, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292c60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #3081 = VADDPSZ256rmk
{ 3082, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692c60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3082 = VADDPSZ256rmkz
{ 3083, 3, 1, 0, 0, 0, 0x40092c60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #3083 = VADDPSZ256rr
{ 3084, 5, 1, 0, 0, 0, 0x40292c60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #3084 = VADDPSZ256rrk
{ 3085, 4, 1, 0, 0, 0, 0x40692c60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3085 = VADDPSZ256rrkz
{ 3086, 4, 1, 0, 0, 0, 0x409812c60004805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #3086 = VADDPSZrb
{ 3087, 6, 1, 0, 0, 0, 0x409a12c60004805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #3087 = VADDPSZrbk
{ 3088, 5, 1, 0, 0, 0, 0x409e12c60004805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #3088 = VADDPSZrbkz
{ 3089, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812c60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3089 = VADDPSZrm
{ 3090, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812c60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3090 = VADDPSZrmb
{ 3091, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12c60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3091 = VADDPSZrmbk
{ 3092, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12c60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3092 = VADDPSZrmbkz
{ 3093, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12c60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3093 = VADDPSZrmk
{ 3094, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12c60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3094 = VADDPSZrmkz
{ 3095, 3, 1, 0, 0, 0, 0x80812c60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #3095 = VADDPSZrr
{ 3096, 5, 1, 0, 0, 0, 0x80a12c60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #3096 = VADDPSZrrk
{ 3097, 4, 1, 0, 0, 0, 0x80e12c60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #3097 = VADDPSZrrkz
{ 3098, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x12c28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3098 = VADDPSrm
{ 3099, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x12c28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3099 = VADDPSrr
{ 3100, 7, 1, 0, 525, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011ac60006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #3100 = VADDSDZrm
{ 3101, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011ac60006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3101 = VADDSDZrm_Int
{ 3102, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031ac60006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #3102 = VADDSDZrm_Intk
{ 3103, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071ac60006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #3103 = VADDSDZrm_Intkz
{ 3104, 3, 1, 0, 525, 0|(1ULL<<MCID::Commutable), 0x1011ac60006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr }, // Inst #3104 = VADDSDZrr
{ 3105, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x1011ac60006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3105 = VADDSDZrr_Int
{ 3106, 5, 1, 0, 0, 0, 0x1031ac60006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #3106 = VADDSDZrr_Intk
{ 3107, 4, 1, 0, 0, 0, 0x1071ac60006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3107 = VADDSDZrr_Intkz
{ 3108, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x41111ac60006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #3108 = VADDSDZrrb
{ 3109, 6, 1, 0, 0, 0, 0x41131ac60006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #3109 = VADDSDZrrbk
{ 3110, 5, 1, 0, 0, 0, 0x41171ac60006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #3110 = VADDSDZrrbkz
{ 3111, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112c30006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #3111 = VADDSDrm
{ 3112, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112c30006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3112 = VADDSDrm_Int
{ 3113, 3, 1, 0, 18, 0|(1ULL<<MCID::Commutable), 0x112c30006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #3113 = VADDSDrr
{ 3114, 3, 1, 0, 18, 0, 0x112c30006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3114 = VADDSDrr_Int
{ 3115, 7, 1, 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112c60005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #3115 = VADDSSZrm
{ 3116, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112c60005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3116 = VADDSSZrm_Int
{ 3117, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8312c60005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #3117 = VADDSSZrm_Intk
{ 3118, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8712c60005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #3118 = VADDSSZrm_Intkz
{ 3119, 3, 1, 0, 526, 0|(1ULL<<MCID::Commutable), 0x8112c60005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr }, // Inst #3119 = VADDSSZrr
{ 3120, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8112c60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3120 = VADDSSZrr_Int
{ 3121, 5, 1, 0, 0, 0, 0x8312c60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #3121 = VADDSSZrr_Intk
{ 3122, 4, 1, 0, 0, 0, 0x8712c60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #3122 = VADDSSZrr_Intkz
{ 3123, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x409112c60005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #3123 = VADDSSZrrb
{ 3124, 6, 1, 0, 0, 0, 0x409312c60005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #3124 = VADDSSZrrbk
{ 3125, 5, 1, 0, 0, 0, 0x409712c60005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #3125 = VADDSSZrrbkz
{ 3126, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112c28005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #3126 = VADDSSrm
{ 3127, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112c28005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3127 = VADDSSrm_Int
{ 3128, 3, 1, 0, 20, 0|(1ULL<<MCID::Commutable), 0x112c28005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #3128 = VADDSSrr
{ 3129, 3, 1, 0, 20, 0, 0x112c28005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3129 = VADDSSrr_Int
{ 3130, 7, 1, 0, 21, 0|(1ULL<<MCID::MayLoad), 0x96830005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #3130 = VADDSUBPDYrm
{ 3131, 3, 1, 0, 14, 0, 0x96830005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #3131 = VADDSUBPDYrr
{ 3132, 7, 1, 0, 21, 0|(1ULL<<MCID::MayLoad), 0x16830005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3132 = VADDSUBPDrm
{ 3133, 3, 1, 0, 14, 0, 0x16830005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3133 = VADDSUBPDrr
{ 3134, 7, 1, 0, 22, 0|(1ULL<<MCID::MayLoad), 0x96828006006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #3134 = VADDSUBPSYrm
{ 3135, 3, 1, 0, 16, 0, 0x96828006005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #3135 = VADDSUBPSYrr
{ 3136, 7, 1, 0, 22, 0|(1ULL<<MCID::MayLoad), 0x16828006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3136 = VADDSUBPSrm
{ 3137, 3, 1, 0, 16, 0, 0x16828006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3137 = VADDSUBPSrr
{ 3138, 7, 1, 0, 26, 0|(1ULL<<MCID::MayLoad), 0x16fb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3138 = VAESDECLASTrm
{ 3139, 3, 1, 0, 27, 0, 0x16fb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3139 = VAESDECLASTrr
{ 3140, 7, 1, 0, 26, 0|(1ULL<<MCID::MayLoad), 0x16f38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3140 = VAESDECrm
{ 3141, 3, 1, 0, 27, 0, 0x16f38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3141 = VAESDECrr
{ 3142, 7, 1, 0, 26, 0|(1ULL<<MCID::MayLoad), 0x16eb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3142 = VAESENCLASTrm
{ 3143, 3, 1, 0, 27, 0, 0x16eb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3143 = VAESENCLASTrr
{ 3144, 7, 1, 0, 26, 0|(1ULL<<MCID::MayLoad), 0x16e38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3144 = VAESENCrm
{ 3145, 3, 1, 0, 27, 0, 0x16e38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3145 = VAESENCrr
{ 3146, 6, 1, 0, 28, 0|(1ULL<<MCID::MayLoad), 0x6db8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3146 = VAESIMCrm
{ 3147, 2, 1, 0, 29, 0, 0x6db8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3147 = VAESIMCrr
{ 3148, 7, 1, 0, 30, 0|(1ULL<<MCID::MayLoad), 0x6fb804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #3148 = VAESKEYGENASSIST128rm
{ 3149, 3, 1, 0, 31, 0, 0x6fb804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #3149 = VAESKEYGENASSIST128rr
{ 3150, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90101f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #3150 = VALIGNDZ128rmbi
{ 3151, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92101f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #3151 = VALIGNDZ128rmbik
{ 3152, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96101f804d006ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3152 = VALIGNDZ128rmbikz
{ 3153, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200101f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #3153 = VALIGNDZ128rmi
{ 3154, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202101f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #3154 = VALIGNDZ128rmik
{ 3155, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206101f804d006ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #3155 = VALIGNDZ128rmikz
{ 3156, 4, 1, 0, 0, 0, 0x200101f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #3156 = VALIGNDZ128rri
{ 3157, 6, 1, 0, 0, 0, 0x202101f804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr }, // Inst #3157 = VALIGNDZ128rrik
{ 3158, 5, 1, 0, 0, 0, 0x206101f804d005ULL, nullptr, nullptr, OperandInfo330, -1 ,nullptr }, // Inst #3158 = VALIGNDZ128rrikz
{ 3159, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90901f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3159 = VALIGNDZ256rmbi
{ 3160, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92901f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3160 = VALIGNDZ256rmbik
{ 3161, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96901f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #3161 = VALIGNDZ256rmbikz
{ 3162, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400901f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3162 = VALIGNDZ256rmi
{ 3163, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402901f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #3163 = VALIGNDZ256rmik
{ 3164, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406901f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #3164 = VALIGNDZ256rmikz
{ 3165, 4, 1, 0, 0, 0, 0x400901f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #3165 = VALIGNDZ256rri
{ 3166, 6, 1, 0, 0, 0, 0x402901f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #3166 = VALIGNDZ256rrik
{ 3167, 5, 1, 0, 0, 0, 0x406901f804d005ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr }, // Inst #3167 = VALIGNDZ256rrikz
{ 3168, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98101f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #3168 = VALIGNDZrmbi
{ 3169, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a101f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #3169 = VALIGNDZrmbik
{ 3170, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e101f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #3170 = VALIGNDZrmbikz
{ 3171, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808101f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #3171 = VALIGNDZrmi
{ 3172, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a101f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #3172 = VALIGNDZrmik
{ 3173, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e101f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #3173 = VALIGNDZrmikz
{ 3174, 4, 1, 0, 0, 0, 0x808101f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #3174 = VALIGNDZrri
{ 3175, 6, 1, 0, 0, 0, 0x80a101f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #3175 = VALIGNDZrrik
{ 3176, 5, 1, 0, 0, 0, 0x80e101f804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #3176 = VALIGNDZrrikz
{ 3177, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110181f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #3177 = VALIGNQZ128rmbi
{ 3178, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112181f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #3178 = VALIGNQZ128rmbik
{ 3179, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116181f804d006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr }, // Inst #3179 = VALIGNQZ128rmbikz
{ 3180, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200181f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #3180 = VALIGNQZ128rmi
{ 3181, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202181f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #3181 = VALIGNQZ128rmik
{ 3182, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206181f804d006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr }, // Inst #3182 = VALIGNQZ128rmikz
{ 3183, 4, 1, 0, 0, 0, 0x200181f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #3183 = VALIGNQZ128rri
{ 3184, 6, 1, 0, 0, 0, 0x202181f804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr }, // Inst #3184 = VALIGNQZ128rrik
{ 3185, 5, 1, 0, 0, 0, 0x206181f804d005ULL, nullptr, nullptr, OperandInfo343, -1 ,nullptr }, // Inst #3185 = VALIGNQZ128rrikz
{ 3186, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110981f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3186 = VALIGNQZ256rmbi
{ 3187, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112981f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #3187 = VALIGNQZ256rmbik
{ 3188, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116981f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #3188 = VALIGNQZ256rmbikz
{ 3189, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400981f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #3189 = VALIGNQZ256rmi
{ 3190, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402981f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #3190 = VALIGNQZ256rmik
{ 3191, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406981f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #3191 = VALIGNQZ256rmikz
{ 3192, 4, 1, 0, 0, 0, 0x400981f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #3192 = VALIGNQZ256rri
{ 3193, 6, 1, 0, 0, 0, 0x402981f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #3193 = VALIGNQZ256rrik
{ 3194, 5, 1, 0, 0, 0, 0x406981f804d005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr }, // Inst #3194 = VALIGNQZ256rrikz
{ 3195, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118181f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #3195 = VALIGNQZrmbi
{ 3196, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a181f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #3196 = VALIGNQZrmbik
{ 3197, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e181f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #3197 = VALIGNQZrmbikz
{ 3198, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808181f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #3198 = VALIGNQZrmi
{ 3199, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a181f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #3199 = VALIGNQZrmik
{ 3200, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e181f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #3200 = VALIGNQZrmikz
{ 3201, 4, 1, 0, 0, 0, 0x808181f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #3201 = VALIGNQZrri
{ 3202, 6, 1, 0, 0, 0, 0x80a181f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #3202 = VALIGNQZrrik
{ 3203, 5, 1, 0, 0, 0, 0x80e181f804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #3203 = VALIGNQZrrikz
{ 3204, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x92ab0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #3204 = VANDNPDYrm
{ 3205, 3, 1, 0, 941, 0, 0x92ab0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #3205 = VANDNPDYrr
{ 3206, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001aae0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3206 = VANDNPDZ128rm
{ 3207, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101aae0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3207 = VANDNPDZ128rmb
{ 3208, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121aae0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #3208 = VANDNPDZ128rmbk
{ 3209, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161aae0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3209 = VANDNPDZ128rmbkz
{ 3210, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021aae0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #3210 = VANDNPDZ128rmk
{ 3211, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061aae0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3211 = VANDNPDZ128rmkz
{ 3212, 3, 1, 0, 0, 0, 0x2001aae0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3212 = VANDNPDZ128rr
{ 3213, 5, 1, 0, 0, 0, 0x2021aae0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3213 = VANDNPDZ128rrk
{ 3214, 4, 1, 0, 0, 0, 0x2061aae0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #3214 = VANDNPDZ128rrkz
{ 3215, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009aae0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3215 = VANDNPDZ256rm
{ 3216, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109aae0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3216 = VANDNPDZ256rmb
{ 3217, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129aae0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3217 = VANDNPDZ256rmbk
{ 3218, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169aae0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3218 = VANDNPDZ256rmbkz
{ 3219, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029aae0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3219 = VANDNPDZ256rmk
{ 3220, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069aae0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3220 = VANDNPDZ256rmkz
{ 3221, 3, 1, 0, 0, 0, 0x4009aae0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #3221 = VANDNPDZ256rr
{ 3222, 5, 1, 0, 0, 0, 0x4029aae0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3222 = VANDNPDZ256rrk
{ 3223, 4, 1, 0, 0, 0, 0x4069aae0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #3223 = VANDNPDZ256rrkz
{ 3224, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081aae0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3224 = VANDNPDZrm
{ 3225, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181aae0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3225 = VANDNPDZrmb
{ 3226, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1aae0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #3226 = VANDNPDZrmbk
{ 3227, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1aae0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3227 = VANDNPDZrmbkz
{ 3228, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1aae0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #3228 = VANDNPDZrmk
{ 3229, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1aae0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3229 = VANDNPDZrmkz
{ 3230, 3, 1, 0, 0, 0, 0x8081aae0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #3230 = VANDNPDZrr
{ 3231, 5, 1, 0, 0, 0, 0x80a1aae0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #3231 = VANDNPDZrrk
{ 3232, 4, 1, 0, 0, 0, 0x80e1aae0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #3232 = VANDNPDZrrkz
{ 3233, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x12ab0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3233 = VANDNPDrm
{ 3234, 3, 1, 0, 941, 0, 0x12ab0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3234 = VANDNPDrr
{ 3235, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x92aa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #3235 = VANDNPSYrm
{ 3236, 3, 1, 0, 941, 0, 0x92aa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #3236 = VANDNPSYrr
{ 3237, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012ae0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3237 = VANDNPSZ128rm
{ 3238, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012ae0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3238 = VANDNPSZ128rmb
{ 3239, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212ae0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #3239 = VANDNPSZ128rmbk
{ 3240, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612ae0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3240 = VANDNPSZ128rmbkz
{ 3241, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212ae0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #3241 = VANDNPSZ128rmk
{ 3242, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612ae0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3242 = VANDNPSZ128rmkz
{ 3243, 3, 1, 0, 0, 0, 0x20012ae0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3243 = VANDNPSZ128rr
{ 3244, 5, 1, 0, 0, 0, 0x20212ae0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #3244 = VANDNPSZ128rrk
{ 3245, 4, 1, 0, 0, 0, 0x20612ae0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #3245 = VANDNPSZ128rrkz
{ 3246, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092ae0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3246 = VANDNPSZ256rm
{ 3247, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092ae0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3247 = VANDNPSZ256rmb
{ 3248, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292ae0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #3248 = VANDNPSZ256rmbk
{ 3249, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692ae0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3249 = VANDNPSZ256rmbkz
{ 3250, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292ae0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #3250 = VANDNPSZ256rmk
{ 3251, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692ae0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3251 = VANDNPSZ256rmkz
{ 3252, 3, 1, 0, 0, 0, 0x40092ae0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #3252 = VANDNPSZ256rr
{ 3253, 5, 1, 0, 0, 0, 0x40292ae0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #3253 = VANDNPSZ256rrk
{ 3254, 4, 1, 0, 0, 0, 0x40692ae0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3254 = VANDNPSZ256rrkz
{ 3255, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812ae0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3255 = VANDNPSZrm
{ 3256, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812ae0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3256 = VANDNPSZrmb
{ 3257, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12ae0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3257 = VANDNPSZrmbk
{ 3258, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12ae0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3258 = VANDNPSZrmbkz
{ 3259, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12ae0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3259 = VANDNPSZrmk
{ 3260, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12ae0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3260 = VANDNPSZrmkz
{ 3261, 3, 1, 0, 0, 0, 0x80812ae0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #3261 = VANDNPSZrr
{ 3262, 5, 1, 0, 0, 0, 0x80a12ae0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #3262 = VANDNPSZrrk
{ 3263, 4, 1, 0, 0, 0, 0x80e12ae0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #3263 = VANDNPSZrrkz
{ 3264, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x12aa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3264 = VANDNPSrm
{ 3265, 3, 1, 0, 941, 0, 0x12aa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3265 = VANDNPSrr
{ 3266, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x92a30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #3266 = VANDPDYrm
{ 3267, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x92a30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #3267 = VANDPDYrr
{ 3268, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001aa60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3268 = VANDPDZ128rm
{ 3269, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101aa60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3269 = VANDPDZ128rmb
{ 3270, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121aa60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #3270 = VANDPDZ128rmbk
{ 3271, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161aa60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3271 = VANDPDZ128rmbkz
{ 3272, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021aa60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #3272 = VANDPDZ128rmk
{ 3273, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061aa60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3273 = VANDPDZ128rmkz
{ 3274, 3, 1, 0, 0, 0, 0x2001aa60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3274 = VANDPDZ128rr
{ 3275, 5, 1, 0, 0, 0, 0x2021aa60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #3275 = VANDPDZ128rrk
{ 3276, 4, 1, 0, 0, 0, 0x2061aa60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #3276 = VANDPDZ128rrkz
{ 3277, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009aa60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3277 = VANDPDZ256rm
{ 3278, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109aa60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3278 = VANDPDZ256rmb
{ 3279, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129aa60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3279 = VANDPDZ256rmbk
{ 3280, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169aa60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3280 = VANDPDZ256rmbkz
{ 3281, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029aa60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #3281 = VANDPDZ256rmk
{ 3282, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069aa60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3282 = VANDPDZ256rmkz
{ 3283, 3, 1, 0, 0, 0, 0x4009aa60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #3283 = VANDPDZ256rr
{ 3284, 5, 1, 0, 0, 0, 0x4029aa60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #3284 = VANDPDZ256rrk
{ 3285, 4, 1, 0, 0, 0, 0x4069aa60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #3285 = VANDPDZ256rrkz
{ 3286, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081aa60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3286 = VANDPDZrm
{ 3287, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181aa60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3287 = VANDPDZrmb
{ 3288, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1aa60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #3288 = VANDPDZrmbk
{ 3289, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1aa60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3289 = VANDPDZrmbkz
{ 3290, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1aa60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #3290 = VANDPDZrmk
{ 3291, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1aa60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3291 = VANDPDZrmkz
{ 3292, 3, 1, 0, 0, 0, 0x8081aa60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #3292 = VANDPDZrr
{ 3293, 5, 1, 0, 0, 0, 0x80a1aa60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #3293 = VANDPDZrrk
{ 3294, 4, 1, 0, 0, 0, 0x80e1aa60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #3294 = VANDPDZrrkz
{ 3295, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x12a30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3295 = VANDPDrm
{ 3296, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x12a30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3296 = VANDPDrr
{ 3297, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x92a28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #3297 = VANDPSYrm
{ 3298, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x92a28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #3298 = VANDPSYrr
{ 3299, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012a60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3299 = VANDPSZ128rm
{ 3300, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012a60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3300 = VANDPSZ128rmb
{ 3301, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212a60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #3301 = VANDPSZ128rmbk
{ 3302, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612a60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3302 = VANDPSZ128rmbkz
{ 3303, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212a60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #3303 = VANDPSZ128rmk
{ 3304, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612a60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3304 = VANDPSZ128rmkz
{ 3305, 3, 1, 0, 0, 0, 0x20012a60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3305 = VANDPSZ128rr
{ 3306, 5, 1, 0, 0, 0, 0x20212a60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #3306 = VANDPSZ128rrk
{ 3307, 4, 1, 0, 0, 0, 0x20612a60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #3307 = VANDPSZ128rrkz
{ 3308, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092a60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3308 = VANDPSZ256rm
{ 3309, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092a60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3309 = VANDPSZ256rmb
{ 3310, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292a60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #3310 = VANDPSZ256rmbk
{ 3311, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692a60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3311 = VANDPSZ256rmbkz
{ 3312, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292a60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #3312 = VANDPSZ256rmk
{ 3313, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692a60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3313 = VANDPSZ256rmkz
{ 3314, 3, 1, 0, 0, 0, 0x40092a60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #3314 = VANDPSZ256rr
{ 3315, 5, 1, 0, 0, 0, 0x40292a60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #3315 = VANDPSZ256rrk
{ 3316, 4, 1, 0, 0, 0, 0x40692a60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3316 = VANDPSZ256rrkz
{ 3317, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812a60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3317 = VANDPSZrm
{ 3318, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812a60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3318 = VANDPSZrmb
{ 3319, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12a60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3319 = VANDPSZrmbk
{ 3320, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12a60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3320 = VANDPSZrmbkz
{ 3321, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12a60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #3321 = VANDPSZrmk
{ 3322, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12a60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3322 = VANDPSZrmkz
{ 3323, 3, 1, 0, 0, 0, 0x80812a60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #3323 = VANDPSZrr
{ 3324, 5, 1, 0, 0, 0, 0x80a12a60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #3324 = VANDPSZrrk
{ 3325, 4, 1, 0, 0, 0, 0x80e12a60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #3325 = VANDPSZrrkz
{ 3326, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x12a28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #3326 = VANDPSrm
{ 3327, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x12a28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #3327 = VANDPSrr
{ 3328, 3, 0, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::Variadic), 0x0ULL, nullptr, ImplicitList6, OperandInfo350, -1 ,nullptr }, // Inst #3328 = VASTART_SAVE_XMM_REGS
{ 3329, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b2f0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3329 = VBLENDMPDZ128rm
{ 3330, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1101b2f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3330 = VBLENDMPDZ128rmb
{ 3331, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b2f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3331 = VBLENDMPDZ128rmbk
{ 3332, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b2f0009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3332 = VBLENDMPDZ128rmk
{ 3333, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b2f0009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #3333 = VBLENDMPDZ128rmkz
{ 3334, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b2f0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3334 = VBLENDMPDZ128rr
{ 3335, 4, 1, 0, 0, 0, 0x2021b2f0009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #3335 = VBLENDMPDZ128rrk
{ 3336, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b2f0009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #3336 = VBLENDMPDZ128rrkz
{ 3337, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b2f0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3337 = VBLENDMPDZ256rm
{ 3338, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1109b2f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3338 = VBLENDMPDZ256rmb
{ 3339, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b2f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3339 = VBLENDMPDZ256rmbk
{ 3340, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b2f0009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3340 = VBLENDMPDZ256rmk
{ 3341, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b2f0009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #3341 = VBLENDMPDZ256rmkz
{ 3342, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b2f0009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #3342 = VBLENDMPDZ256rr
{ 3343, 4, 1, 0, 0, 0, 0x4029b2f0009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #3343 = VBLENDMPDZ256rrk
{ 3344, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b2f0009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #3344 = VBLENDMPDZ256rrkz
{ 3345, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b2f0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3345 = VBLENDMPDZrm
{ 3346, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1181b2f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3346 = VBLENDMPDZrmb
{ 3347, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b2f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3347 = VBLENDMPDZrmbk
{ 3348, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b2f0009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3348 = VBLENDMPDZrmk
{ 3349, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b2f0009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #3349 = VBLENDMPDZrmkz
{ 3350, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b2f0009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #3350 = VBLENDMPDZrr
{ 3351, 4, 1, 0, 0, 0, 0x80a1b2f0009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #3351 = VBLENDMPDZrrk
{ 3352, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b2f0009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #3352 = VBLENDMPDZrrkz
{ 3353, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x200132e8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3353 = VBLENDMPSZ128rm
{ 3354, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x90132f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #3354 = VBLENDMPSZ128rmb
{ 3355, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92132f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3355 = VBLENDMPSZ128rmbk
{ 3356, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202132e8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3356 = VBLENDMPSZ128rmk
{ 3357, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x206132e8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #3357 = VBLENDMPSZ128rmkz
{ 3358, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200132e8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #3358 = VBLENDMPSZ128rr
{ 3359, 4, 1, 0, 0, 0, 0x202132e8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #3359 = VBLENDMPSZ128rrk
{ 3360, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x206132e8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #3360 = VBLENDMPSZ128rrkz
{ 3361, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x400932e8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3361 = VBLENDMPSZ256rm
{ 3362, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x90932f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #3362 = VBLENDMPSZ256rmb
{ 3363, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92932f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3363 = VBLENDMPSZ256rmbk
{ 3364, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402932e8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3364 = VBLENDMPSZ256rmk
{ 3365, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x406932e8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #3365 = VBLENDMPSZ256rmkz
{ 3366, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x400932e8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #3366 = VBLENDMPSZ256rr
{ 3367, 4, 1, 0, 0, 0, 0x402932e8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3367 = VBLENDMPSZ256rrk
{ 3368, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x406932e8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #3368 = VBLENDMPSZ256rrkz
{ 3369, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x808132e8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3369 = VBLENDMPSZrm
{ 3370, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x98132f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #3370 = VBLENDMPSZrmb
{ 3371, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a132f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3371 = VBLENDMPSZrmbk
{ 3372, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a132e8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3372 = VBLENDMPSZrmk
{ 3373, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e132e8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #3373 = VBLENDMPSZrmkz
{ 3374, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808132e8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #3374 = VBLENDMPSZrr
{ 3375, 4, 1, 0, 0, 0, 0x80a132e8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #3375 = VBLENDMPSZrrk
{ 3376, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e132e8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #3376 = VBLENDMPSZrrkz
{ 3377, 8, 1, 0, 39, 0|(1ULL<<MCID::MayLoad), 0x906b004d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3377 = VBLENDPDYrmi
{ 3378, 4, 1, 0, 40, 0|(1ULL<<MCID::Commutable), 0x906b004d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #3378 = VBLENDPDYrri
{ 3379, 8, 1, 0, 39, 0|(1ULL<<MCID::MayLoad), 0x106b004d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #3379 = VBLENDPDrmi
{ 3380, 4, 1, 0, 40, 0|(1ULL<<MCID::Commutable), 0x106b004d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #3380 = VBLENDPDrri
{ 3381, 8, 1, 0, 39, 0|(1ULL<<MCID::MayLoad), 0x9062804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3381 = VBLENDPSYrmi
{ 3382, 4, 1, 0, 40, 0|(1ULL<<MCID::Commutable), 0x9062804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #3382 = VBLENDPSYrri
{ 3383, 8, 1, 0, 39, 0|(1ULL<<MCID::MayLoad), 0x1062804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #3383 = VBLENDPSrmi
{ 3384, 4, 1, 0, 40, 0|(1ULL<<MCID::Commutable), 0x1062804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #3384 = VBLENDPSrri
{ 3385, 8, 1, 0, 527, 0|(1ULL<<MCID::MayLoad), 0xd25b004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #3385 = VBLENDVPDYrm
{ 3386, 4, 1, 0, 528, 0, 0xd25b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #3386 = VBLENDVPDYrr
{ 3387, 8, 1, 0, 527, 0|(1ULL<<MCID::MayLoad), 0x525b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #3387 = VBLENDVPDrm
{ 3388, 4, 1, 0, 528, 0, 0x525b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #3388 = VBLENDVPDrr
{ 3389, 8, 1, 0, 527, 0|(1ULL<<MCID::MayLoad), 0xd252804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #3389 = VBLENDVPSYrm
{ 3390, 4, 1, 0, 528, 0, 0xd252804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #3390 = VBLENDVPSYrr
{ 3391, 8, 1, 0, 527, 0|(1ULL<<MCID::MayLoad), 0x5252804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #3391 = VBLENDVPSrm
{ 3392, 4, 1, 0, 528, 0, 0x5252804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #3392 = VBLENDVPSrr
{ 3393, 6, 1, 0, 845, 0|(1ULL<<MCID::MayLoad), 0x80d38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3393 = VBROADCASTF128
{ 3394, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20080d78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3394 = VBROADCASTF32X4Z256rm
{ 3395, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20280d78009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3395 = VBROADCASTF32X4Z256rmk
{ 3396, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20680d78009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3396 = VBROADCASTF32X4Z256rmkz
{ 3397, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20800d78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3397 = VBROADCASTF32X4rm
{ 3398, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a00d78009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3398 = VBROADCASTF32X4rmk
{ 3399, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e00d78009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3399 = VBROADCASTF32X4rmkz
{ 3400, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40800df8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3400 = VBROADCASTF32X8rm
{ 3401, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a00df8009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3401 = VBROADCASTF32X8rmk
{ 3402, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e00df8009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3402 = VBROADCASTF32X8rmkz
{ 3403, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20088d78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3403 = VBROADCASTF64X2Z128rm
{ 3404, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20288d78009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3404 = VBROADCASTF64X2Z128rmk
{ 3405, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20688d78009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3405 = VBROADCASTF64X2Z128rmkz
{ 3406, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20808d78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3406 = VBROADCASTF64X2rm
{ 3407, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a08d78009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3407 = VBROADCASTF64X2rmk
{ 3408, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e08d78009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3408 = VBROADCASTF64X2rmkz
{ 3409, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40808df8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3409 = VBROADCASTF64X4rm
{ 3410, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a08df8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3410 = VBROADCASTF64X4rmk
{ 3411, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e08df8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3411 = VBROADCASTF64X4rmkz
{ 3412, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x82d38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3412 = VBROADCASTI128
{ 3413, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20082d78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3413 = VBROADCASTI32X4Z256rm
{ 3414, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20282d78009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3414 = VBROADCASTI32X4Z256rmk
{ 3415, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20682d78009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3415 = VBROADCASTI32X4Z256rmkz
{ 3416, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20802d78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3416 = VBROADCASTI32X4rm
{ 3417, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a02d78009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3417 = VBROADCASTI32X4rmk
{ 3418, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e02d78009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3418 = VBROADCASTI32X4rmkz
{ 3419, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40802df8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3419 = VBROADCASTI32X8rm
{ 3420, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a02df8009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3420 = VBROADCASTI32X8rmk
{ 3421, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e02df8009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3421 = VBROADCASTI32X8rmkz
{ 3422, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2008ad78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3422 = VBROADCASTI64X2Z128rm
{ 3423, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2028ad78009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3423 = VBROADCASTI64X2Z128rmk
{ 3424, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2068ad78009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3424 = VBROADCASTI64X2Z128rmkz
{ 3425, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2080ad78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3425 = VBROADCASTI64X2rm
{ 3426, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a0ad78009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3426 = VBROADCASTI64X2rmk
{ 3427, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e0ad78009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3427 = VBROADCASTI64X2rmkz
{ 3428, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4080adf8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3428 = VBROADCASTI64X4rm
{ 3429, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a0adf8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3429 = VBROADCASTI64X4rmk
{ 3430, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e0adf8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3430 = VBROADCASTI64X4rmkz
{ 3431, 6, 1, 0, 529, 0|(1ULL<<MCID::MayLoad), 0x80cb0009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3431 = VBROADCASTSDYrm
{ 3432, 2, 1, 0, 530, 0, 0x80cb0009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #3432 = VBROADCASTSDYrr
{ 3433, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10088cf0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3433 = VBROADCASTSDZ256m
{ 3434, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10288cf0009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3434 = VBROADCASTSDZ256mk
{ 3435, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10688cf0009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3435 = VBROADCASTSDZ256mkz
{ 3436, 2, 1, 0, 0, 0, 0x40088cf0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #3436 = VBROADCASTSDZ256r
{ 3437, 4, 1, 0, 0, 0, 0x40288cf0009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #3437 = VBROADCASTSDZ256rk
{ 3438, 3, 1, 0, 0, 0, 0x40688cf0009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #3438 = VBROADCASTSDZ256rkz
{ 3439, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10808cf0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3439 = VBROADCASTSDZm
{ 3440, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a08cf0009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3440 = VBROADCASTSDZmk
{ 3441, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10e08cf0009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3441 = VBROADCASTSDZmkz
{ 3442, 2, 1, 0, 0, 0, 0x80808cf0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #3442 = VBROADCASTSDZr
{ 3443, 4, 1, 0, 0, 0, 0x80a08cf0009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr }, // Inst #3443 = VBROADCASTSDZrk
{ 3444, 3, 1, 0, 0, 0, 0x80e08cf0009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr }, // Inst #3444 = VBROADCASTSDZrkz
{ 3445, 6, 1, 0, 529, 0|(1ULL<<MCID::MayLoad), 0x80c28009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3445 = VBROADCASTSSYrm
{ 3446, 2, 1, 0, 530, 0, 0x80c28009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #3446 = VBROADCASTSSYrr
{ 3447, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8000c68009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3447 = VBROADCASTSSZ128m
{ 3448, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8200c68009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3448 = VBROADCASTSSZ128mk
{ 3449, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8600c68009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3449 = VBROADCASTSSZ128mkz
{ 3450, 2, 1, 0, 0, 0, 0x20000c68009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3450 = VBROADCASTSSZ128r
{ 3451, 4, 1, 0, 0, 0, 0x20200c68009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #3451 = VBROADCASTSSZ128rk
{ 3452, 3, 1, 0, 0, 0, 0x20600c68009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #3452 = VBROADCASTSSZ128rkz
{ 3453, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080c68009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3453 = VBROADCASTSSZ256m
{ 3454, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8280c68009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3454 = VBROADCASTSSZ256mk
{ 3455, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8680c68009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3455 = VBROADCASTSSZ256mkz
{ 3456, 2, 1, 0, 0, 0, 0x40080c68009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #3456 = VBROADCASTSSZ256r
{ 3457, 4, 1, 0, 0, 0, 0x40280c68009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #3457 = VBROADCASTSSZ256rk
{ 3458, 3, 1, 0, 0, 0, 0x40680c68009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #3458 = VBROADCASTSSZ256rkz
{ 3459, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8800c68009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3459 = VBROADCASTSSZm
{ 3460, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8a00c68009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3460 = VBROADCASTSSZmk
{ 3461, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8e00c68009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3461 = VBROADCASTSSZmkz
{ 3462, 2, 1, 0, 0, 0, 0x80800c68009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #3462 = VBROADCASTSSZr
{ 3463, 4, 1, 0, 0, 0, 0x80a00c68009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr }, // Inst #3463 = VBROADCASTSSZrk
{ 3464, 3, 1, 0, 0, 0, 0x80e00c68009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr }, // Inst #3464 = VBROADCASTSSZrkz
{ 3465, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0xc28009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3465 = VBROADCASTSSrm
{ 3466, 2, 1, 0, 531, 0, 0xc28009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3466 = VBROADCASTSSrr
{ 3467, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x96130045006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3467 = VCMPPDYrmi
{ 3468, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x96130045006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3468 = VCMPPDYrmi_alt
{ 3469, 4, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x96130045005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #3469 = VCMPPDYrri
{ 3470, 4, 1, 0, 16, 0, 0x96130045005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #3470 = VCMPPDYrri_alt
{ 3471, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101e170045006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #3471 = VCMPPDZ128rmbi
{ 3472, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101e170045006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #3472 = VCMPPDZ128rmbi_alt
{ 3473, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121e170045006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #3473 = VCMPPDZ128rmbi_altk
{ 3474, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121e170045006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #3474 = VCMPPDZ128rmbik
{ 3475, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001e170045006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #3475 = VCMPPDZ128rmi
{ 3476, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001e170045006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #3476 = VCMPPDZ128rmi_alt
{ 3477, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021e170045006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #3477 = VCMPPDZ128rmi_altk
{ 3478, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021e170045006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #3478 = VCMPPDZ128rmik
{ 3479, 4, 1, 0, 0, 0, 0x2001e170045005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr }, // Inst #3479 = VCMPPDZ128rri
{ 3480, 4, 1, 0, 0, 0, 0x2001e170045005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr }, // Inst #3480 = VCMPPDZ128rri_alt
{ 3481, 5, 1, 0, 0, 0, 0x2021e170045005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr }, // Inst #3481 = VCMPPDZ128rri_altk
{ 3482, 5, 1, 0, 0, 0, 0x2021e170045005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr }, // Inst #3482 = VCMPPDZ128rrik
{ 3483, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109e170045006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #3483 = VCMPPDZ256rmbi
{ 3484, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109e170045006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #3484 = VCMPPDZ256rmbi_alt
{ 3485, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129e170045006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #3485 = VCMPPDZ256rmbi_altk
{ 3486, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129e170045006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #3486 = VCMPPDZ256rmbik
{ 3487, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009e170045006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #3487 = VCMPPDZ256rmi
{ 3488, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009e170045006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #3488 = VCMPPDZ256rmi_alt
{ 3489, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029e170045006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #3489 = VCMPPDZ256rmi_altk
{ 3490, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029e170045006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #3490 = VCMPPDZ256rmik
{ 3491, 4, 1, 0, 0, 0, 0x4009e170045005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr }, // Inst #3491 = VCMPPDZ256rri
{ 3492, 4, 1, 0, 0, 0, 0x4009e170045005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr }, // Inst #3492 = VCMPPDZ256rri_alt
{ 3493, 5, 1, 0, 0, 0, 0x4029e170045005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr }, // Inst #3493 = VCMPPDZ256rri_altk
{ 3494, 5, 1, 0, 0, 0, 0x4029e170045005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr }, // Inst #3494 = VCMPPDZ256rrik
{ 3495, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181e170045006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #3495 = VCMPPDZrmbi
{ 3496, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181e170045006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #3496 = VCMPPDZrmbi_alt
{ 3497, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1e170045006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #3497 = VCMPPDZrmbi_altk
{ 3498, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1e170045006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #3498 = VCMPPDZrmbik
{ 3499, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081e170045006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #3499 = VCMPPDZrmi
{ 3500, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081e170045006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #3500 = VCMPPDZrmi_alt
{ 3501, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1e170045006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #3501 = VCMPPDZrmi_altk
{ 3502, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1e170045006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #3502 = VCMPPDZrmik
{ 3503, 4, 1, 0, 0, 0, 0x8081e170045005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr }, // Inst #3503 = VCMPPDZrri
{ 3504, 4, 1, 0, 0, 0, 0x8081e170045005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr }, // Inst #3504 = VCMPPDZrri_alt
{ 3505, 5, 1, 0, 0, 0, 0x80a1e170045005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr }, // Inst #3505 = VCMPPDZrri_altk
{ 3506, 4, 1, 0, 0, 0, 0x1181e170045005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr }, // Inst #3506 = VCMPPDZrrib
{ 3507, 4, 1, 0, 0, 0, 0x1181e170045005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr }, // Inst #3507 = VCMPPDZrrib_alt
{ 3508, 5, 1, 0, 0, 0, 0x11a1e170045005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr }, // Inst #3508 = VCMPPDZrrib_altk
{ 3509, 5, 1, 0, 0, 0, 0x11a1e170045005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr }, // Inst #3509 = VCMPPDZrribk
{ 3510, 5, 1, 0, 0, 0, 0x80a1e170045005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr }, // Inst #3510 = VCMPPDZrrik
{ 3511, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x16130045006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #3511 = VCMPPDrmi
{ 3512, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x16130045006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #3512 = VCMPPDrmi_alt
{ 3513, 4, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x16130045005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #3513 = VCMPPDrri
{ 3514, 4, 1, 0, 16, 0, 0x16130045005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #3514 = VCMPPDrri_alt
{ 3515, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x96128044806ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3515 = VCMPPSYrmi
{ 3516, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x96128044806ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #3516 = VCMPPSYrmi_alt
{ 3517, 4, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x96128044805ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #3517 = VCMPPSYrri
{ 3518, 4, 1, 0, 16, 0, 0x96128044805ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #3518 = VCMPPSYrri_alt
{ 3519, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9016168044806ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #3519 = VCMPPSZ128rmbi
{ 3520, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9016168044806ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #3520 = VCMPPSZ128rmbi_alt
{ 3521, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9216168044806ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3521 = VCMPPSZ128rmbi_altk
{ 3522, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9216168044806ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3522 = VCMPPSZ128rmbik
{ 3523, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016168044806ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #3523 = VCMPPSZ128rmi
{ 3524, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016168044806ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #3524 = VCMPPSZ128rmi_alt
{ 3525, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216168044806ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3525 = VCMPPSZ128rmi_altk
{ 3526, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216168044806ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #3526 = VCMPPSZ128rmik
{ 3527, 4, 1, 0, 0, 0, 0x20016168044805ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3527 = VCMPPSZ128rri
{ 3528, 4, 1, 0, 0, 0, 0x20016168044805ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #3528 = VCMPPSZ128rri_alt
{ 3529, 5, 1, 0, 0, 0, 0x20216168044805ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr }, // Inst #3529 = VCMPPSZ128rri_altk
{ 3530, 5, 1, 0, 0, 0, 0x20216168044805ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr }, // Inst #3530 = VCMPPSZ128rrik
{ 3531, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9096168044806ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3531 = VCMPPSZ256rmbi
{ 3532, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9096168044806ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3532 = VCMPPSZ256rmbi_alt
{ 3533, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9296168044806ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #3533 = VCMPPSZ256rmbi_altk
{ 3534, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9296168044806ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #3534 = VCMPPSZ256rmbik
{ 3535, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096168044806ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3535 = VCMPPSZ256rmi
{ 3536, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096168044806ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #3536 = VCMPPSZ256rmi_alt
{ 3537, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296168044806ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #3537 = VCMPPSZ256rmi_altk
{ 3538, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296168044806ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #3538 = VCMPPSZ256rmik
{ 3539, 4, 1, 0, 0, 0, 0x40096168044805ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr }, // Inst #3539 = VCMPPSZ256rri
{ 3540, 4, 1, 0, 0, 0, 0x40096168044805ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr }, // Inst #3540 = VCMPPSZ256rri_alt
{ 3541, 5, 1, 0, 0, 0, 0x40296168044805ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr }, // Inst #3541 = VCMPPSZ256rri_altk
{ 3542, 5, 1, 0, 0, 0, 0x40296168044805ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr }, // Inst #3542 = VCMPPSZ256rrik
{ 3543, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9816168044806ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #3543 = VCMPPSZrmbi
{ 3544, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9816168044806ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #3544 = VCMPPSZrmbi_alt
{ 3545, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a16168044806ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #3545 = VCMPPSZrmbi_altk
{ 3546, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a16168044806ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #3546 = VCMPPSZrmbik
{ 3547, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816168044806ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #3547 = VCMPPSZrmi
{ 3548, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816168044806ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #3548 = VCMPPSZrmi_alt
{ 3549, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16168044806ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #3549 = VCMPPSZrmi_altk
{ 3550, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16168044806ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #3550 = VCMPPSZrmik
{ 3551, 4, 1, 0, 0, 0, 0x80816168044805ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr }, // Inst #3551 = VCMPPSZrri
{ 3552, 4, 1, 0, 0, 0, 0x80816168044805ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr }, // Inst #3552 = VCMPPSZrri_alt
{ 3553, 5, 1, 0, 0, 0, 0x80a16168044805ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr }, // Inst #3553 = VCMPPSZrri_altk
{ 3554, 4, 1, 0, 0, 0, 0x9816168044805ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr }, // Inst #3554 = VCMPPSZrrib
{ 3555, 4, 1, 0, 0, 0, 0x9816168044805ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr }, // Inst #3555 = VCMPPSZrrib_alt
{ 3556, 5, 1, 0, 0, 0, 0x9a16168044805ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr }, // Inst #3556 = VCMPPSZrrib_altk
{ 3557, 5, 1, 0, 0, 0, 0x9a16168044805ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr }, // Inst #3557 = VCMPPSZrribk
{ 3558, 5, 1, 0, 0, 0, 0x80a16168044805ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr }, // Inst #3558 = VCMPPSZrrik
{ 3559, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x16128044806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #3559 = VCMPPSrmi
{ 3560, 8, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x16128044806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #3560 = VCMPPSrmi_alt
{ 3561, 4, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x16128044805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #3561 = VCMPPSrri
{ 3562, 4, 1, 0, 16, 0, 0x16128044805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #3562 = VCMPPSrri_alt
{ 3563, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x1001e178046006ULL, nullptr, nullptr, OperandInfo406, -1 ,nullptr }, // Inst #3563 = VCMPSDZrm
{ 3564, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1001e178046006ULL, nullptr, nullptr, OperandInfo407, -1 ,nullptr }, // Inst #3564 = VCMPSDZrm_Int
{ 3565, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1021e178046006ULL, nullptr, nullptr, OperandInfo408, -1 ,nullptr }, // Inst #3565 = VCMPSDZrm_Intk
{ 3566, 8, 1, 0, 0, 0, 0x1001e178046006ULL, nullptr, nullptr, OperandInfo407, -1 ,nullptr }, // Inst #3566 = VCMPSDZrmi_alt
{ 3567, 9, 1, 0, 0, 0, 0x1021e178046006ULL, nullptr, nullptr, OperandInfo408, -1 ,nullptr }, // Inst #3567 = VCMPSDZrmi_altk
{ 3568, 4, 1, 0, 526, 0, 0x2001e178046005ULL, nullptr, nullptr, OperandInfo409, -1 ,nullptr }, // Inst #3568 = VCMPSDZrr
{ 3569, 4, 1, 0, 0, 0, 0x2001e178046005ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr }, // Inst #3569 = VCMPSDZrr_Int
{ 3570, 5, 1, 0, 0, 0, 0x2021e178046005ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3570 = VCMPSDZrr_Intk
{ 3571, 4, 1, 0, 0, 0, 0x101e178046005ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr }, // Inst #3571 = VCMPSDZrrb_Int
{ 3572, 5, 1, 0, 0, 0, 0x121e178046005ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3572 = VCMPSDZrrb_Intk
{ 3573, 4, 1, 0, 0, 0, 0x101e178046005ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr }, // Inst #3573 = VCMPSDZrrb_alt
{ 3574, 5, 1, 0, 0, 0, 0x121e178046005ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3574 = VCMPSDZrrb_altk
{ 3575, 4, 1, 0, 0, 0, 0x2001e178046005ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr }, // Inst #3575 = VCMPSDZrri_alt
{ 3576, 5, 1, 0, 0, 0, 0x2021e178046005ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3576 = VCMPSDZrri_altk
{ 3577, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x116120046006ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr }, // Inst #3577 = VCMPSDrm
{ 3578, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x116120046006ULL, nullptr, nullptr, OperandInfo412, -1 ,nullptr }, // Inst #3578 = VCMPSDrm_alt
{ 3579, 4, 1, 0, 20, 0, 0x116120046005ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #3579 = VCMPSDrr
{ 3580, 4, 1, 0, 20, 0, 0x116120046005ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #3580 = VCMPSDrr_alt
{ 3581, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x8016178045806ULL, nullptr, nullptr, OperandInfo413, -1 ,nullptr }, // Inst #3581 = VCMPSSZrm
{ 3582, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8016178045806ULL, nullptr, nullptr, OperandInfo407, -1 ,nullptr }, // Inst #3582 = VCMPSSZrm_Int
{ 3583, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8216178045806ULL, nullptr, nullptr, OperandInfo408, -1 ,nullptr }, // Inst #3583 = VCMPSSZrm_Intk
{ 3584, 8, 1, 0, 0, 0, 0x8016178045806ULL, nullptr, nullptr, OperandInfo407, -1 ,nullptr }, // Inst #3584 = VCMPSSZrmi_alt
{ 3585, 9, 1, 0, 0, 0, 0x8216178045806ULL, nullptr, nullptr, OperandInfo408, -1 ,nullptr }, // Inst #3585 = VCMPSSZrmi_altk
{ 3586, 4, 1, 0, 526, 0, 0x20016178045805ULL, nullptr, nullptr, OperandInfo414, -1 ,nullptr }, // Inst #3586 = VCMPSSZrr
{ 3587, 4, 1, 0, 0, 0, 0x20016178045805ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr }, // Inst #3587 = VCMPSSZrr_Int
{ 3588, 5, 1, 0, 0, 0, 0x20216178045805ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3588 = VCMPSSZrr_Intk
{ 3589, 4, 1, 0, 0, 0, 0x1016178045805ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr }, // Inst #3589 = VCMPSSZrrb_Int
{ 3590, 5, 1, 0, 0, 0, 0x1216178045805ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3590 = VCMPSSZrrb_Intk
{ 3591, 4, 1, 0, 0, 0, 0x1016178045805ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr }, // Inst #3591 = VCMPSSZrrb_alt
{ 3592, 5, 1, 0, 0, 0, 0x1216178045805ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3592 = VCMPSSZrrb_altk
{ 3593, 4, 1, 0, 0, 0, 0x20016178045805ULL, nullptr, nullptr, OperandInfo410, -1 ,nullptr }, // Inst #3593 = VCMPSSZrri_alt
{ 3594, 5, 1, 0, 0, 0, 0x20216178045805ULL, nullptr, nullptr, OperandInfo411, -1 ,nullptr }, // Inst #3594 = VCMPSSZrri_altk
{ 3595, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x116120045806ULL, nullptr, nullptr, OperandInfo415, -1 ,nullptr }, // Inst #3595 = VCMPSSrm
{ 3596, 8, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x116120045806ULL, nullptr, nullptr, OperandInfo415, -1 ,nullptr }, // Inst #3596 = VCMPSSrm_alt
{ 3597, 4, 1, 0, 20, 0, 0x116120045805ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #3597 = VCMPSSrr
{ 3598, 4, 1, 0, 20, 0, 0x116120045805ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #3598 = VCMPSSrr_alt
{ 3599, 2, 0, 0, 76, 0, 0x111097f0045005ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr }, // Inst #3599 = VCOMISDZrb
{ 3600, 6, 0, 0, 75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x101097e0005006ULL, nullptr, ImplicitList6, OperandInfo416, -1 ,nullptr }, // Inst #3600 = VCOMISDZrm
{ 3601, 2, 0, 0, 76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x101097e0005005ULL, nullptr, ImplicitList6, OperandInfo417, -1 ,nullptr }, // Inst #3601 = VCOMISDZrr
{ 3602, 6, 0, 0, 75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1017a0005006ULL, nullptr, ImplicitList6, OperandInfo113, -1 ,nullptr }, // Inst #3602 = VCOMISDrm
{ 3603, 2, 0, 0, 76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1017a0005005ULL, nullptr, ImplicitList6, OperandInfo114, -1 ,nullptr }, // Inst #3603 = VCOMISDrr
{ 3604, 2, 0, 0, 76, 0, 0x91017e8044805ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr }, // Inst #3604 = VCOMISSZrb
{ 3605, 6, 0, 0, 75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81017e0004806ULL, nullptr, ImplicitList6, OperandInfo418, -1 ,nullptr }, // Inst #3605 = VCOMISSZrm
{ 3606, 2, 0, 0, 76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81017e0004805ULL, nullptr, ImplicitList6, OperandInfo419, -1 ,nullptr }, // Inst #3606 = VCOMISSZrr
{ 3607, 6, 0, 0, 75, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1017a0004806ULL, nullptr, ImplicitList6, OperandInfo115, -1 ,nullptr }, // Inst #3607 = VCOMISSrm
{ 3608, 2, 0, 0, 76, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1017a0004805ULL, nullptr, ImplicitList6, OperandInfo116, -1 ,nullptr }, // Inst #3608 = VCOMISSrr
{ 3609, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1000c578009004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #3609 = VCOMPRESSPDZ128mr
{ 3610, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1020c578009004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #3610 = VCOMPRESSPDZ128mrk
{ 3611, 2, 1, 0, 0, 0, 0x2000c578009003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3611 = VCOMPRESSPDZ128rr
{ 3612, 4, 1, 0, 0, 0, 0x2020c578009003ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #3612 = VCOMPRESSPDZ128rrk
{ 3613, 3, 1, 0, 0, 0, 0x2060c578009003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #3613 = VCOMPRESSPDZ128rrkz
{ 3614, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1008c578009004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #3614 = VCOMPRESSPDZ256mr
{ 3615, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1028c578009004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #3615 = VCOMPRESSPDZ256mrk
{ 3616, 2, 1, 0, 0, 0, 0x4008c578009003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #3616 = VCOMPRESSPDZ256rr
{ 3617, 4, 1, 0, 0, 0, 0x4028c578009003ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #3617 = VCOMPRESSPDZ256rrk
{ 3618, 3, 1, 0, 0, 0, 0x4068c578009003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #3618 = VCOMPRESSPDZ256rrkz
{ 3619, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1080c578009004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #3619 = VCOMPRESSPDZmr
{ 3620, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10a0c578009004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #3620 = VCOMPRESSPDZmrk
{ 3621, 2, 1, 0, 0, 0, 0x8080c578009003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3621 = VCOMPRESSPDZrr
{ 3622, 4, 1, 0, 0, 0, 0x80a0c578009003ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #3622 = VCOMPRESSPDZrrk
{ 3623, 3, 1, 0, 0, 0, 0x80e0c578009003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #3623 = VCOMPRESSPDZrrkz
{ 3624, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8004578009004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #3624 = VCOMPRESSPSZ128mr
{ 3625, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8204578009004ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #3625 = VCOMPRESSPSZ128mrk
{ 3626, 2, 1, 0, 0, 0, 0x20004578009003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3626 = VCOMPRESSPSZ128rr
{ 3627, 4, 1, 0, 0, 0, 0x20204578009003ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #3627 = VCOMPRESSPSZ128rrk
{ 3628, 3, 1, 0, 0, 0, 0x20604578009003ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #3628 = VCOMPRESSPSZ128rrkz
{ 3629, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8084578009004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #3629 = VCOMPRESSPSZ256mr
{ 3630, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8284578009004ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #3630 = VCOMPRESSPSZ256mrk
{ 3631, 2, 1, 0, 0, 0, 0x40084578009003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #3631 = VCOMPRESSPSZ256rr
{ 3632, 4, 1, 0, 0, 0, 0x40284578009003ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #3632 = VCOMPRESSPSZ256rrk
{ 3633, 3, 1, 0, 0, 0, 0x40684578009003ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #3633 = VCOMPRESSPSZ256rrkz
{ 3634, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8804578009004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #3634 = VCOMPRESSPSZmr
{ 3635, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8a04578009004ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #3635 = VCOMPRESSPSZmrk
{ 3636, 2, 1, 0, 0, 0, 0x80804578009003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3636 = VCOMPRESSPSZrr
{ 3637, 4, 1, 0, 0, 0, 0x80a04578009003ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #3637 = VCOMPRESSPSZrrk
{ 3638, 3, 1, 0, 0, 0, 0x80e04578009003ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #3638 = VCOMPRESSPSZrrkz
{ 3639, 6, 1, 0, 253, 0|(1ULL<<MCID::MayLoad), 0x87320005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3639 = VCVTDQ2PDYrm
{ 3640, 2, 1, 0, 880, 0, 0x87320005805ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #3640 = VCVTDQ2PDYrr
{ 3641, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10007360005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3641 = VCVTDQ2PDZ128rm
{ 3642, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9007360005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3642 = VCVTDQ2PDZ128rmb
{ 3643, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9207360005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3643 = VCVTDQ2PDZ128rmbk
{ 3644, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9607360005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3644 = VCVTDQ2PDZ128rmbkz
{ 3645, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10207360005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3645 = VCVTDQ2PDZ128rmk
{ 3646, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10607360005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3646 = VCVTDQ2PDZ128rmkz
{ 3647, 2, 1, 0, 0, 0, 0x10007360005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3647 = VCVTDQ2PDZ128rr
{ 3648, 4, 1, 0, 0, 0, 0x10207360005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #3648 = VCVTDQ2PDZ128rrk
{ 3649, 3, 1, 0, 0, 0, 0x10607360005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #3649 = VCVTDQ2PDZ128rrkz
{ 3650, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20087360005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3650 = VCVTDQ2PDZ256rm
{ 3651, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9087360005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3651 = VCVTDQ2PDZ256rmb
{ 3652, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9287360005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3652 = VCVTDQ2PDZ256rmbk
{ 3653, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9687360005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3653 = VCVTDQ2PDZ256rmbkz
{ 3654, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20287360005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3654 = VCVTDQ2PDZ256rmk
{ 3655, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20687360005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3655 = VCVTDQ2PDZ256rmkz
{ 3656, 2, 1, 0, 0, 0, 0x20087360005805ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #3656 = VCVTDQ2PDZ256rr
{ 3657, 4, 1, 0, 0, 0, 0x20287360005805ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #3657 = VCVTDQ2PDZ256rrk
{ 3658, 3, 1, 0, 0, 0, 0x20687360005805ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #3658 = VCVTDQ2PDZ256rrkz
{ 3659, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40807360005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3659 = VCVTDQ2PDZrm
{ 3660, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9807360005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3660 = VCVTDQ2PDZrmb
{ 3661, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a07360005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3661 = VCVTDQ2PDZrmbk
{ 3662, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e07360005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3662 = VCVTDQ2PDZrmbkz
{ 3663, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a07360005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3663 = VCVTDQ2PDZrmk
{ 3664, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e07360005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3664 = VCVTDQ2PDZrmkz
{ 3665, 2, 1, 0, 0, 0, 0x40807360005805ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #3665 = VCVTDQ2PDZrr
{ 3666, 4, 1, 0, 0, 0, 0x40a07360005805ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #3666 = VCVTDQ2PDZrrk
{ 3667, 3, 1, 0, 0, 0, 0x40e07360005805ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #3667 = VCVTDQ2PDZrrkz
{ 3668, 6, 1, 0, 253, 0|(1ULL<<MCID::MayLoad), 0x7320005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3668 = VCVTDQ2PDrm
{ 3669, 2, 1, 0, 879, 0, 0x7320005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3669 = VCVTDQ2PDrr
{ 3670, 6, 1, 0, 83, 0|(1ULL<<MCID::MayLoad), 0x82da8004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3670 = VCVTDQ2PSYrm
{ 3671, 2, 1, 0, 84, 0, 0x82da8004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #3671 = VCVTDQ2PSYrr
{ 3672, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20002de0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3672 = VCVTDQ2PSZ128rm
{ 3673, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002de0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3673 = VCVTDQ2PSZ128rmb
{ 3674, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202de0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3674 = VCVTDQ2PSZ128rmbk
{ 3675, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602de0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3675 = VCVTDQ2PSZ128rmbkz
{ 3676, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20202de0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3676 = VCVTDQ2PSZ128rmk
{ 3677, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20602de0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3677 = VCVTDQ2PSZ128rmkz
{ 3678, 2, 1, 0, 0, 0, 0x20002de0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3678 = VCVTDQ2PSZ128rr
{ 3679, 4, 1, 0, 0, 0, 0x20202de0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #3679 = VCVTDQ2PSZ128rrk
{ 3680, 3, 1, 0, 0, 0, 0x20602de0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #3680 = VCVTDQ2PSZ128rrkz
{ 3681, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40082de0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3681 = VCVTDQ2PSZ256rm
{ 3682, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082de0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3682 = VCVTDQ2PSZ256rmb
{ 3683, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282de0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3683 = VCVTDQ2PSZ256rmbk
{ 3684, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682de0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3684 = VCVTDQ2PSZ256rmbkz
{ 3685, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40282de0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3685 = VCVTDQ2PSZ256rmk
{ 3686, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40682de0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3686 = VCVTDQ2PSZ256rmkz
{ 3687, 2, 1, 0, 0, 0, 0x40082de0004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #3687 = VCVTDQ2PSZ256rr
{ 3688, 4, 1, 0, 0, 0, 0x40282de0004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #3688 = VCVTDQ2PSZ256rrk
{ 3689, 3, 1, 0, 0, 0, 0x40682de0004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #3689 = VCVTDQ2PSZ256rrkz
{ 3690, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80802de0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3690 = VCVTDQ2PSZrm
{ 3691, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802de0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3691 = VCVTDQ2PSZrmb
{ 3692, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02de0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3692 = VCVTDQ2PSZrmbk
{ 3693, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02de0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3693 = VCVTDQ2PSZrmbkz
{ 3694, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a02de0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3694 = VCVTDQ2PSZrmk
{ 3695, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e02de0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3695 = VCVTDQ2PSZrmkz
{ 3696, 2, 1, 0, 0, 0, 0x80802de0004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3696 = VCVTDQ2PSZrr
{ 3697, 3, 1, 0, 0, 0, 0x409802de0004805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #3697 = VCVTDQ2PSZrrb
{ 3698, 5, 1, 0, 0, 0, 0x409a02de0004805ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #3698 = VCVTDQ2PSZrrbk
{ 3699, 4, 1, 0, 0, 0, 0x409e02de0004805ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #3699 = VCVTDQ2PSZrrbkz
{ 3700, 4, 1, 0, 0, 0, 0x80a02de0004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #3700 = VCVTDQ2PSZrrk
{ 3701, 3, 1, 0, 0, 0, 0x80e02de0004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #3701 = VCVTDQ2PSZrrkz
{ 3702, 6, 1, 0, 83, 0|(1ULL<<MCID::MayLoad), 0x2da8004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3702 = VCVTDQ2PSrm
{ 3703, 2, 1, 0, 84, 0, 0x2da8004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3703 = VCVTDQ2PSrr
{ 3704, 6, 1, 0, 533, 0|(1ULL<<MCID::MayLoad), 0x7320006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3704 = VCVTPD2DQXrm
{ 3705, 6, 1, 0, 886, 0|(1ULL<<MCID::MayLoad), 0x87320006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3705 = VCVTPD2DQYrm
{ 3706, 2, 1, 0, 884, 0, 0x87320006005ULL, nullptr, nullptr, OperandInfo450, -1 ,nullptr }, // Inst #3706 = VCVTPD2DQYrr
{ 3707, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000f360006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3707 = VCVTPD2DQZ128rm
{ 3708, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100f360006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3708 = VCVTPD2DQZ128rmb
{ 3709, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120f360006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3709 = VCVTPD2DQZ128rmbk
{ 3710, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160f360006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3710 = VCVTPD2DQZ128rmbkz
{ 3711, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020f360006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3711 = VCVTPD2DQZ128rmk
{ 3712, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060f360006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3712 = VCVTPD2DQZ128rmkz
{ 3713, 2, 1, 0, 0, 0, 0x2000f360006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3713 = VCVTPD2DQZ128rr
{ 3714, 4, 1, 0, 0, 0, 0x2020f360006005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #3714 = VCVTPD2DQZ128rrk
{ 3715, 3, 1, 0, 0, 0, 0x2060f360006005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #3715 = VCVTPD2DQZ128rrkz
{ 3716, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008f360006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3716 = VCVTPD2DQZ256rm
{ 3717, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108f360006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3717 = VCVTPD2DQZ256rmb
{ 3718, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128f360006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3718 = VCVTPD2DQZ256rmbk
{ 3719, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168f360006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3719 = VCVTPD2DQZ256rmbkz
{ 3720, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028f360006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3720 = VCVTPD2DQZ256rmk
{ 3721, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068f360006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3721 = VCVTPD2DQZ256rmkz
{ 3722, 2, 1, 0, 0, 0, 0x4008f360006005ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #3722 = VCVTPD2DQZ256rr
{ 3723, 4, 1, 0, 0, 0, 0x4028f360006005ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #3723 = VCVTPD2DQZ256rrk
{ 3724, 3, 1, 0, 0, 0, 0x4068f360006005ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #3724 = VCVTPD2DQZ256rrkz
{ 3725, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080f360006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3725 = VCVTPD2DQZrm
{ 3726, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180f360006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3726 = VCVTPD2DQZrmb
{ 3727, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0f360006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3727 = VCVTPD2DQZrmbk
{ 3728, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0f360006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3728 = VCVTPD2DQZrmbkz
{ 3729, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0f360006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3729 = VCVTPD2DQZrmk
{ 3730, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0f360006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3730 = VCVTPD2DQZrmkz
{ 3731, 2, 1, 0, 0, 0, 0x8080f360006005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #3731 = VCVTPD2DQZrr
{ 3732, 3, 1, 0, 0, 0, 0x41180f360006005ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #3732 = VCVTPD2DQZrrb
{ 3733, 5, 1, 0, 0, 0, 0x411a0f360006005ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr }, // Inst #3733 = VCVTPD2DQZrrbk
{ 3734, 4, 1, 0, 0, 0, 0x411e0f360006005ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr }, // Inst #3734 = VCVTPD2DQZrrbkz
{ 3735, 4, 1, 0, 0, 0, 0x80a0f360006005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #3735 = VCVTPD2DQZrrk
{ 3736, 3, 1, 0, 0, 0, 0x80e0f360006005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #3736 = VCVTPD2DQZrrkz
{ 3737, 2, 1, 0, 882, 0, 0x7320006005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3737 = VCVTPD2DQrr
{ 3738, 6, 1, 0, 866, 0|(1ULL<<MCID::MayLoad), 0x2d30005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3738 = VCVTPD2PSXrm
{ 3739, 6, 1, 0, 868, 0|(1ULL<<MCID::MayLoad), 0x82d30005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3739 = VCVTPD2PSYrm
{ 3740, 2, 1, 0, 867, 0, 0x82d30005005ULL, nullptr, nullptr, OperandInfo450, -1 ,nullptr }, // Inst #3740 = VCVTPD2PSYrr
{ 3741, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000ad60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3741 = VCVTPD2PSZ128rm
{ 3742, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100ad60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3742 = VCVTPD2PSZ128rmb
{ 3743, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120ad60005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3743 = VCVTPD2PSZ128rmbk
{ 3744, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160ad60005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3744 = VCVTPD2PSZ128rmbkz
{ 3745, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020ad60005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3745 = VCVTPD2PSZ128rmk
{ 3746, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060ad60005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3746 = VCVTPD2PSZ128rmkz
{ 3747, 2, 1, 0, 0, 0, 0x2000ad60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3747 = VCVTPD2PSZ128rr
{ 3748, 4, 1, 0, 0, 0, 0x2020ad60005005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #3748 = VCVTPD2PSZ128rrk
{ 3749, 3, 1, 0, 0, 0, 0x2060ad60005005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #3749 = VCVTPD2PSZ128rrkz
{ 3750, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008ad60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3750 = VCVTPD2PSZ256rm
{ 3751, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108ad60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3751 = VCVTPD2PSZ256rmb
{ 3752, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128ad60005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3752 = VCVTPD2PSZ256rmbk
{ 3753, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168ad60005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3753 = VCVTPD2PSZ256rmbkz
{ 3754, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028ad60005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3754 = VCVTPD2PSZ256rmk
{ 3755, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068ad60005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3755 = VCVTPD2PSZ256rmkz
{ 3756, 2, 1, 0, 0, 0, 0x4008ad60005005ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #3756 = VCVTPD2PSZ256rr
{ 3757, 4, 1, 0, 0, 0, 0x4028ad60005005ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #3757 = VCVTPD2PSZ256rrk
{ 3758, 3, 1, 0, 0, 0, 0x4068ad60005005ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #3758 = VCVTPD2PSZ256rrkz
{ 3759, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080ad60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3759 = VCVTPD2PSZrm
{ 3760, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180ad60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3760 = VCVTPD2PSZrmb
{ 3761, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0ad60005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3761 = VCVTPD2PSZrmbk
{ 3762, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0ad60005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3762 = VCVTPD2PSZrmbkz
{ 3763, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0ad60005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3763 = VCVTPD2PSZrmk
{ 3764, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0ad60005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3764 = VCVTPD2PSZrmkz
{ 3765, 2, 1, 0, 0, 0, 0x8080ad60005005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #3765 = VCVTPD2PSZrr
{ 3766, 3, 1, 0, 0, 0, 0x41180ad60005005ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #3766 = VCVTPD2PSZrrb
{ 3767, 5, 1, 0, 0, 0, 0x411a0ad60005005ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr }, // Inst #3767 = VCVTPD2PSZrrbk
{ 3768, 4, 1, 0, 0, 0, 0x411e0ad60005005ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr }, // Inst #3768 = VCVTPD2PSZrrbkz
{ 3769, 4, 1, 0, 0, 0, 0x80a0ad60005005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #3769 = VCVTPD2PSZrrk
{ 3770, 3, 1, 0, 0, 0, 0x80e0ad60005005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #3770 = VCVTPD2PSZrrkz
{ 3771, 2, 1, 0, 865, 0, 0x2d30005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3771 = VCVTPD2PSrr
{ 3772, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000bde0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3772 = VCVTPD2QQZ128rm
{ 3773, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100bde0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3773 = VCVTPD2QQZ128rmb
{ 3774, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120bde0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3774 = VCVTPD2QQZ128rmbk
{ 3775, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160bde0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3775 = VCVTPD2QQZ128rmbkz
{ 3776, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020bde0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3776 = VCVTPD2QQZ128rmk
{ 3777, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060bde0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3777 = VCVTPD2QQZ128rmkz
{ 3778, 2, 1, 0, 0, 0, 0x2000bde0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3778 = VCVTPD2QQZ128rr
{ 3779, 4, 1, 0, 0, 0, 0x2020bde0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #3779 = VCVTPD2QQZ128rrk
{ 3780, 3, 1, 0, 0, 0, 0x2060bde0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #3780 = VCVTPD2QQZ128rrkz
{ 3781, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008bde0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3781 = VCVTPD2QQZ256rm
{ 3782, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108bde0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3782 = VCVTPD2QQZ256rmb
{ 3783, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128bde0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3783 = VCVTPD2QQZ256rmbk
{ 3784, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168bde0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3784 = VCVTPD2QQZ256rmbkz
{ 3785, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028bde0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3785 = VCVTPD2QQZ256rmk
{ 3786, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068bde0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3786 = VCVTPD2QQZ256rmkz
{ 3787, 2, 1, 0, 0, 0, 0x4008bde0005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #3787 = VCVTPD2QQZ256rr
{ 3788, 4, 1, 0, 0, 0, 0x4028bde0005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #3788 = VCVTPD2QQZ256rrk
{ 3789, 3, 1, 0, 0, 0, 0x4068bde0005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #3789 = VCVTPD2QQZ256rrkz
{ 3790, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080bde0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3790 = VCVTPD2QQZrm
{ 3791, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180bde0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3791 = VCVTPD2QQZrmb
{ 3792, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0bde0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3792 = VCVTPD2QQZrmbk
{ 3793, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0bde0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3793 = VCVTPD2QQZrmbkz
{ 3794, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0bde0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3794 = VCVTPD2QQZrmk
{ 3795, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0bde0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3795 = VCVTPD2QQZrmkz
{ 3796, 2, 1, 0, 0, 0, 0x8080bde0005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3796 = VCVTPD2QQZrr
{ 3797, 3, 1, 0, 0, 0, 0x41180bde0005005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #3797 = VCVTPD2QQZrrb
{ 3798, 5, 1, 0, 0, 0, 0x411a0bde0005005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #3798 = VCVTPD2QQZrrbk
{ 3799, 4, 1, 0, 0, 0, 0x411e0bde0005005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #3799 = VCVTPD2QQZrrbkz
{ 3800, 4, 1, 0, 0, 0, 0x80a0bde0005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #3800 = VCVTPD2QQZrrk
{ 3801, 3, 1, 0, 0, 0, 0x80e0bde0005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #3801 = VCVTPD2QQZrrkz
{ 3802, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000bce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3802 = VCVTPD2UDQZ128rm
{ 3803, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100bce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3803 = VCVTPD2UDQZ128rmb
{ 3804, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120bce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3804 = VCVTPD2UDQZ128rmbk
{ 3805, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160bce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3805 = VCVTPD2UDQZ128rmbkz
{ 3806, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020bce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3806 = VCVTPD2UDQZ128rmk
{ 3807, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060bce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3807 = VCVTPD2UDQZ128rmkz
{ 3808, 2, 1, 0, 0, 0, 0x2000bce0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3808 = VCVTPD2UDQZ128rr
{ 3809, 4, 1, 0, 0, 0, 0x2020bce0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #3809 = VCVTPD2UDQZ128rrk
{ 3810, 3, 1, 0, 0, 0, 0x2060bce0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #3810 = VCVTPD2UDQZ128rrkz
{ 3811, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008bce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3811 = VCVTPD2UDQZ256rm
{ 3812, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108bce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3812 = VCVTPD2UDQZ256rmb
{ 3813, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128bce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3813 = VCVTPD2UDQZ256rmbk
{ 3814, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168bce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3814 = VCVTPD2UDQZ256rmbkz
{ 3815, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028bce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3815 = VCVTPD2UDQZ256rmk
{ 3816, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068bce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3816 = VCVTPD2UDQZ256rmkz
{ 3817, 2, 1, 0, 0, 0, 0x4008bce0004805ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #3817 = VCVTPD2UDQZ256rr
{ 3818, 4, 1, 0, 0, 0, 0x4028bce0004805ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #3818 = VCVTPD2UDQZ256rrk
{ 3819, 3, 1, 0, 0, 0, 0x4068bce0004805ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #3819 = VCVTPD2UDQZ256rrkz
{ 3820, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080bce0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3820 = VCVTPD2UDQZrm
{ 3821, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180bce0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3821 = VCVTPD2UDQZrmb
{ 3822, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0bce0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3822 = VCVTPD2UDQZrmbk
{ 3823, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0bce0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3823 = VCVTPD2UDQZrmbkz
{ 3824, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0bce0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3824 = VCVTPD2UDQZrmk
{ 3825, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0bce0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3825 = VCVTPD2UDQZrmkz
{ 3826, 2, 1, 0, 0, 0, 0x8080bce0004805ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #3826 = VCVTPD2UDQZrr
{ 3827, 3, 1, 0, 0, 0, 0x41180bce0004805ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #3827 = VCVTPD2UDQZrrb
{ 3828, 5, 1, 0, 0, 0, 0x411a0bce0004805ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr }, // Inst #3828 = VCVTPD2UDQZrrbk
{ 3829, 4, 1, 0, 0, 0, 0x411e0bce0004805ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr }, // Inst #3829 = VCVTPD2UDQZrrbkz
{ 3830, 4, 1, 0, 0, 0, 0x80a0bce0004805ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #3830 = VCVTPD2UDQZrrk
{ 3831, 3, 1, 0, 0, 0, 0x80e0bce0004805ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #3831 = VCVTPD2UDQZrrkz
{ 3832, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000bce0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3832 = VCVTPD2UQQZ128rm
{ 3833, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100bce0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3833 = VCVTPD2UQQZ128rmb
{ 3834, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120bce0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3834 = VCVTPD2UQQZ128rmbk
{ 3835, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160bce0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3835 = VCVTPD2UQQZ128rmbkz
{ 3836, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020bce0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3836 = VCVTPD2UQQZ128rmk
{ 3837, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060bce0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3837 = VCVTPD2UQQZ128rmkz
{ 3838, 2, 1, 0, 0, 0, 0x2000bce0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3838 = VCVTPD2UQQZ128rr
{ 3839, 4, 1, 0, 0, 0, 0x2020bce0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #3839 = VCVTPD2UQQZ128rrk
{ 3840, 3, 1, 0, 0, 0, 0x2060bce0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #3840 = VCVTPD2UQQZ128rrkz
{ 3841, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008bce0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3841 = VCVTPD2UQQZ256rm
{ 3842, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108bce0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3842 = VCVTPD2UQQZ256rmb
{ 3843, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128bce0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3843 = VCVTPD2UQQZ256rmbk
{ 3844, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168bce0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3844 = VCVTPD2UQQZ256rmbkz
{ 3845, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028bce0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3845 = VCVTPD2UQQZ256rmk
{ 3846, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068bce0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3846 = VCVTPD2UQQZ256rmkz
{ 3847, 2, 1, 0, 0, 0, 0x4008bce0005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #3847 = VCVTPD2UQQZ256rr
{ 3848, 4, 1, 0, 0, 0, 0x4028bce0005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #3848 = VCVTPD2UQQZ256rrk
{ 3849, 3, 1, 0, 0, 0, 0x4068bce0005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #3849 = VCVTPD2UQQZ256rrkz
{ 3850, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080bce0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3850 = VCVTPD2UQQZrm
{ 3851, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180bce0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3851 = VCVTPD2UQQZrmb
{ 3852, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0bce0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3852 = VCVTPD2UQQZrmbk
{ 3853, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0bce0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3853 = VCVTPD2UQQZrmbkz
{ 3854, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0bce0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3854 = VCVTPD2UQQZrmk
{ 3855, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0bce0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3855 = VCVTPD2UQQZrmkz
{ 3856, 2, 1, 0, 0, 0, 0x8080bce0005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3856 = VCVTPD2UQQZrr
{ 3857, 3, 1, 0, 0, 0, 0x41180bce0005005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #3857 = VCVTPD2UQQZrrb
{ 3858, 5, 1, 0, 0, 0, 0x411a0bce0005005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #3858 = VCVTPD2UQQZrrbk
{ 3859, 4, 1, 0, 0, 0, 0x411e0bce0005005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #3859 = VCVTPD2UQQZrrbkz
{ 3860, 4, 1, 0, 0, 0, 0x80a0bce0005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #3860 = VCVTPD2UQQZrrk
{ 3861, 3, 1, 0, 0, 0, 0x80e0bce0005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #3861 = VCVTPD2UQQZrrkz
{ 3862, 6, 1, 0, 535, 0|(1ULL<<MCID::MayLoad), 0x809a0009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3862 = VCVTPH2PSYrm
{ 3863, 2, 1, 0, 901, 0, 0x809a0009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #3863 = VCVTPH2PSYrr
{ 3864, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100009e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3864 = VCVTPH2PSZ128rm
{ 3865, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x102009e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3865 = VCVTPH2PSZ128rmk
{ 3866, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x106009e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3866 = VCVTPH2PSZ128rmkz
{ 3867, 2, 1, 0, 0, 0, 0x100009e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3867 = VCVTPH2PSZ128rr
{ 3868, 4, 1, 0, 0, 0, 0x102009e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #3868 = VCVTPH2PSZ128rrk
{ 3869, 3, 1, 0, 0, 0, 0x106009e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #3869 = VCVTPH2PSZ128rrkz
{ 3870, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200809e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3870 = VCVTPH2PSZ256rm
{ 3871, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202809e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3871 = VCVTPH2PSZ256rmk
{ 3872, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206809e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3872 = VCVTPH2PSZ256rmkz
{ 3873, 2, 1, 0, 0, 0, 0x200809e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #3873 = VCVTPH2PSZ256rr
{ 3874, 4, 1, 0, 0, 0, 0x202809e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #3874 = VCVTPH2PSZ256rrk
{ 3875, 3, 1, 0, 0, 0, 0x206809e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #3875 = VCVTPH2PSZ256rrkz
{ 3876, 2, 1, 0, 0, 0, 0x98009e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #3876 = VCVTPH2PSZrb
{ 3877, 4, 1, 0, 0, 0, 0x9a009e0009005ULL, nullptr, nullptr, OperandInfo462, -1 ,nullptr }, // Inst #3877 = VCVTPH2PSZrbk
{ 3878, 3, 1, 0, 0, 0, 0x9e009e0009005ULL, nullptr, nullptr, OperandInfo463, -1 ,nullptr }, // Inst #3878 = VCVTPH2PSZrbkz
{ 3879, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x408009e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3879 = VCVTPH2PSZrm
{ 3880, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a009e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3880 = VCVTPH2PSZrmk
{ 3881, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e009e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3881 = VCVTPH2PSZrmkz
{ 3882, 2, 1, 0, 0, 0, 0x408009e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #3882 = VCVTPH2PSZrr
{ 3883, 4, 1, 0, 0, 0, 0x40a009e0009005ULL, nullptr, nullptr, OperandInfo462, -1 ,nullptr }, // Inst #3883 = VCVTPH2PSZrrk
{ 3884, 3, 1, 0, 0, 0, 0x40e009e0009005ULL, nullptr, nullptr, OperandInfo463, -1 ,nullptr }, // Inst #3884 = VCVTPH2PSZrrkz
{ 3885, 6, 1, 0, 535, 0|(1ULL<<MCID::MayLoad), 0x9a0009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3885 = VCVTPH2PSrm
{ 3886, 2, 1, 0, 901, 0, 0x9a0009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3886 = VCVTPH2PSrr
{ 3887, 6, 1, 0, 89, 0|(1ULL<<MCID::MayLoad), 0x82db0005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3887 = VCVTPS2DQYrm
{ 3888, 2, 1, 0, 90, 0, 0x82db0005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #3888 = VCVTPS2DQYrr
{ 3889, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20002de0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3889 = VCVTPS2DQZ128rm
{ 3890, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002de0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3890 = VCVTPS2DQZ128rmb
{ 3891, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202de0005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3891 = VCVTPS2DQZ128rmbk
{ 3892, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602de0005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3892 = VCVTPS2DQZ128rmbkz
{ 3893, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20202de0005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #3893 = VCVTPS2DQZ128rmk
{ 3894, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20602de0005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #3894 = VCVTPS2DQZ128rmkz
{ 3895, 2, 1, 0, 0, 0, 0x20002de0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3895 = VCVTPS2DQZ128rr
{ 3896, 4, 1, 0, 0, 0, 0x20202de0005005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #3896 = VCVTPS2DQZ128rrk
{ 3897, 3, 1, 0, 0, 0, 0x20602de0005005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #3897 = VCVTPS2DQZ128rrkz
{ 3898, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40082de0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3898 = VCVTPS2DQZ256rm
{ 3899, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082de0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3899 = VCVTPS2DQZ256rmb
{ 3900, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282de0005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3900 = VCVTPS2DQZ256rmbk
{ 3901, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682de0005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3901 = VCVTPS2DQZ256rmbkz
{ 3902, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40282de0005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #3902 = VCVTPS2DQZ256rmk
{ 3903, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40682de0005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #3903 = VCVTPS2DQZ256rmkz
{ 3904, 2, 1, 0, 0, 0, 0x40082de0005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #3904 = VCVTPS2DQZ256rr
{ 3905, 4, 1, 0, 0, 0, 0x40282de0005005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #3905 = VCVTPS2DQZ256rrk
{ 3906, 3, 1, 0, 0, 0, 0x40682de0005005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #3906 = VCVTPS2DQZ256rrkz
{ 3907, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80802de0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3907 = VCVTPS2DQZrm
{ 3908, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802de0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3908 = VCVTPS2DQZrmb
{ 3909, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02de0005006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3909 = VCVTPS2DQZrmbk
{ 3910, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02de0005006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3910 = VCVTPS2DQZrmbkz
{ 3911, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a02de0005006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #3911 = VCVTPS2DQZrmk
{ 3912, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e02de0005006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #3912 = VCVTPS2DQZrmkz
{ 3913, 2, 1, 0, 0, 0, 0x80802de0005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #3913 = VCVTPS2DQZrr
{ 3914, 3, 1, 0, 0, 0, 0x409802de0005005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #3914 = VCVTPS2DQZrrb
{ 3915, 5, 1, 0, 0, 0, 0x409a02de0005005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #3915 = VCVTPS2DQZrrbk
{ 3916, 4, 1, 0, 0, 0, 0x409e02de0005005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #3916 = VCVTPS2DQZrrbkz
{ 3917, 4, 1, 0, 0, 0, 0x80a02de0005005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #3917 = VCVTPS2DQZrrk
{ 3918, 3, 1, 0, 0, 0, 0x80e02de0005005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #3918 = VCVTPS2DQZrrkz
{ 3919, 6, 1, 0, 89, 0|(1ULL<<MCID::MayLoad), 0x2db0005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3919 = VCVTPS2DQrm
{ 3920, 2, 1, 0, 90, 0, 0x2db0005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3920 = VCVTPS2DQrr
{ 3921, 6, 1, 0, 873, 0|(1ULL<<MCID::MayLoad), 0x82d20004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #3921 = VCVTPS2PDYrm
{ 3922, 2, 1, 0, 874, 0, 0x82d20004805ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #3922 = VCVTPS2PDYrr
{ 3923, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10002d60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3923 = VCVTPS2PDZ128rm
{ 3924, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002d60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3924 = VCVTPS2PDZ128rmb
{ 3925, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202d60004806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3925 = VCVTPS2PDZ128rmbk
{ 3926, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602d60004806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3926 = VCVTPS2PDZ128rmbkz
{ 3927, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10202d60004806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3927 = VCVTPS2PDZ128rmk
{ 3928, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10602d60004806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3928 = VCVTPS2PDZ128rmkz
{ 3929, 2, 1, 0, 0, 0, 0x10002d60004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3929 = VCVTPS2PDZ128rr
{ 3930, 4, 1, 0, 0, 0, 0x10202d60004805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #3930 = VCVTPS2PDZ128rrk
{ 3931, 3, 1, 0, 0, 0, 0x10602d60004805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #3931 = VCVTPS2PDZ128rrkz
{ 3932, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20082d60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3932 = VCVTPS2PDZ256rm
{ 3933, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082d60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3933 = VCVTPS2PDZ256rmb
{ 3934, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282d60004806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3934 = VCVTPS2PDZ256rmbk
{ 3935, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682d60004806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3935 = VCVTPS2PDZ256rmbkz
{ 3936, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20282d60004806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3936 = VCVTPS2PDZ256rmk
{ 3937, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20682d60004806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3937 = VCVTPS2PDZ256rmkz
{ 3938, 2, 1, 0, 0, 0, 0x20082d60004805ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #3938 = VCVTPS2PDZ256rr
{ 3939, 4, 1, 0, 0, 0, 0x20282d60004805ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #3939 = VCVTPS2PDZ256rrk
{ 3940, 3, 1, 0, 0, 0, 0x20682d60004805ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #3940 = VCVTPS2PDZ256rrkz
{ 3941, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40802d60004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3941 = VCVTPS2PDZrm
{ 3942, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802d60004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3942 = VCVTPS2PDZrmb
{ 3943, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02d60004806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3943 = VCVTPS2PDZrmbk
{ 3944, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02d60004806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3944 = VCVTPS2PDZrmbkz
{ 3945, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a02d60004806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3945 = VCVTPS2PDZrmk
{ 3946, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e02d60004806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3946 = VCVTPS2PDZrmkz
{ 3947, 2, 1, 0, 0, 0, 0x40802d60004805ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #3947 = VCVTPS2PDZrr
{ 3948, 2, 1, 0, 0, 0, 0x9802d60004805ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #3948 = VCVTPS2PDZrrb
{ 3949, 4, 1, 0, 0, 0, 0x9a02d60004805ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #3949 = VCVTPS2PDZrrbk
{ 3950, 3, 1, 0, 0, 0, 0x9e02d60004805ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #3950 = VCVTPS2PDZrrbkz
{ 3951, 4, 1, 0, 0, 0, 0x40a02d60004805ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #3951 = VCVTPS2PDZrrk
{ 3952, 3, 1, 0, 0, 0, 0x40e02d60004805ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #3952 = VCVTPS2PDZrrkz
{ 3953, 6, 1, 0, 873, 0|(1ULL<<MCID::MayLoad), 0x2d20004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #3953 = VCVTPS2PDrm
{ 3954, 2, 1, 0, 872, 0, 0x2d20004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #3954 = VCVTPS2PDrr
{ 3955, 7, 0, 0, 900, 0|(1ULL<<MCID::MayStore), 0x80ea004d004ULL, nullptr, nullptr, OperandInfo464, -1 ,nullptr }, // Inst #3955 = VCVTPS2PHYmr
{ 3956, 3, 1, 0, 899, 0, 0x80ea004d003ULL, nullptr, nullptr, OperandInfo465, -1 ,nullptr }, // Inst #3956 = VCVTPS2PHYrr
{ 3957, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10000ef804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr }, // Inst #3957 = VCVTPS2PHZ128mr
{ 3958, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10200ef804d004ULL, nullptr, nullptr, OperandInfo467, -1 ,nullptr }, // Inst #3958 = VCVTPS2PHZ128mrk
{ 3959, 3, 1, 0, 0, 0, 0x10000ef804d003ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #3959 = VCVTPS2PHZ128rr
{ 3960, 5, 1, 0, 0, 0, 0x10200ef804d003ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr }, // Inst #3960 = VCVTPS2PHZ128rrk
{ 3961, 4, 1, 0, 0, 0, 0x10600ef804d003ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr }, // Inst #3961 = VCVTPS2PHZ128rrkz
{ 3962, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20080ef804d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr }, // Inst #3962 = VCVTPS2PHZ256mr
{ 3963, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20280ef804d004ULL, nullptr, nullptr, OperandInfo472, -1 ,nullptr }, // Inst #3963 = VCVTPS2PHZ256mrk
{ 3964, 3, 1, 0, 0, 0, 0x20080ef804d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #3964 = VCVTPS2PHZ256rr
{ 3965, 5, 1, 0, 0, 0, 0x20280ef804d003ULL, nullptr, nullptr, OperandInfo474, -1 ,nullptr }, // Inst #3965 = VCVTPS2PHZ256rrk
{ 3966, 4, 1, 0, 0, 0, 0x20680ef804d003ULL, nullptr, nullptr, OperandInfo475, -1 ,nullptr }, // Inst #3966 = VCVTPS2PHZ256rrkz
{ 3967, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40800ef804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #3967 = VCVTPS2PHZmr
{ 3968, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40a00ef804d004ULL, nullptr, nullptr, OperandInfo477, -1 ,nullptr }, // Inst #3968 = VCVTPS2PHZmrk
{ 3969, 3, 1, 0, 0, 0, 0x9800ef804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #3969 = VCVTPS2PHZrb
{ 3970, 5, 1, 0, 0, 0, 0x9a00ef804d003ULL, nullptr, nullptr, OperandInfo478, -1 ,nullptr }, // Inst #3970 = VCVTPS2PHZrbk
{ 3971, 4, 1, 0, 0, 0, 0x9e00ef804d003ULL, nullptr, nullptr, OperandInfo479, -1 ,nullptr }, // Inst #3971 = VCVTPS2PHZrbkz
{ 3972, 3, 1, 0, 0, 0, 0x40800ef804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #3972 = VCVTPS2PHZrr
{ 3973, 5, 1, 0, 0, 0, 0x40a00ef804d003ULL, nullptr, nullptr, OperandInfo478, -1 ,nullptr }, // Inst #3973 = VCVTPS2PHZrrk
{ 3974, 4, 1, 0, 0, 0, 0x40e00ef804d003ULL, nullptr, nullptr, OperandInfo479, -1 ,nullptr }, // Inst #3974 = VCVTPS2PHZrrkz
{ 3975, 7, 0, 0, 900, 0|(1ULL<<MCID::MayStore), 0xea004d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #3975 = VCVTPS2PHmr
{ 3976, 3, 1, 0, 899, 0, 0xea004d003ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #3976 = VCVTPS2PHrr
{ 3977, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10003de0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3977 = VCVTPS2QQZ128rm
{ 3978, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003de0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #3978 = VCVTPS2QQZ128rmb
{ 3979, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203de0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3979 = VCVTPS2QQZ128rmbk
{ 3980, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603de0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3980 = VCVTPS2QQZ128rmbkz
{ 3981, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10203de0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #3981 = VCVTPS2QQZ128rmk
{ 3982, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10603de0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #3982 = VCVTPS2QQZ128rmkz
{ 3983, 2, 1, 0, 0, 0, 0x10003de0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #3983 = VCVTPS2QQZ128rr
{ 3984, 4, 1, 0, 0, 0, 0x10203de0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #3984 = VCVTPS2QQZ128rrk
{ 3985, 3, 1, 0, 0, 0, 0x10603de0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #3985 = VCVTPS2QQZ128rrkz
{ 3986, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20083de0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3986 = VCVTPS2QQZ256rm
{ 3987, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083de0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #3987 = VCVTPS2QQZ256rmb
{ 3988, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283de0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3988 = VCVTPS2QQZ256rmbk
{ 3989, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683de0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3989 = VCVTPS2QQZ256rmbkz
{ 3990, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20283de0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #3990 = VCVTPS2QQZ256rmk
{ 3991, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20683de0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #3991 = VCVTPS2QQZ256rmkz
{ 3992, 2, 1, 0, 0, 0, 0x20083de0005005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #3992 = VCVTPS2QQZ256rr
{ 3993, 4, 1, 0, 0, 0, 0x20283de0005005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #3993 = VCVTPS2QQZ256rrk
{ 3994, 3, 1, 0, 0, 0, 0x20683de0005005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #3994 = VCVTPS2QQZ256rrkz
{ 3995, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40803de0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3995 = VCVTPS2QQZrm
{ 3996, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803de0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #3996 = VCVTPS2QQZrmb
{ 3997, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03de0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3997 = VCVTPS2QQZrmbk
{ 3998, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03de0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #3998 = VCVTPS2QQZrmbkz
{ 3999, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a03de0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #3999 = VCVTPS2QQZrmk
{ 4000, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e03de0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4000 = VCVTPS2QQZrmkz
{ 4001, 2, 1, 0, 0, 0, 0x40803de0005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #4001 = VCVTPS2QQZrr
{ 4002, 3, 1, 0, 0, 0, 0x409803de0005005ULL, nullptr, nullptr, OperandInfo480, -1 ,nullptr }, // Inst #4002 = VCVTPS2QQZrrb
{ 4003, 5, 1, 0, 0, 0, 0x409a03de0005005ULL, nullptr, nullptr, OperandInfo481, -1 ,nullptr }, // Inst #4003 = VCVTPS2QQZrrbk
{ 4004, 4, 1, 0, 0, 0, 0x409e03de0005005ULL, nullptr, nullptr, OperandInfo482, -1 ,nullptr }, // Inst #4004 = VCVTPS2QQZrrbkz
{ 4005, 4, 1, 0, 0, 0, 0x40a03de0005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #4005 = VCVTPS2QQZrrk
{ 4006, 3, 1, 0, 0, 0, 0x40e03de0005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #4006 = VCVTPS2QQZrrkz
{ 4007, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20003ce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4007 = VCVTPS2UDQZ128rm
{ 4008, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003ce0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4008 = VCVTPS2UDQZ128rmb
{ 4009, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203ce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4009 = VCVTPS2UDQZ128rmbk
{ 4010, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603ce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4010 = VCVTPS2UDQZ128rmbkz
{ 4011, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20203ce0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4011 = VCVTPS2UDQZ128rmk
{ 4012, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20603ce0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4012 = VCVTPS2UDQZ128rmkz
{ 4013, 2, 1, 0, 0, 0, 0x20003ce0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4013 = VCVTPS2UDQZ128rr
{ 4014, 4, 1, 0, 0, 0, 0x20203ce0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4014 = VCVTPS2UDQZ128rrk
{ 4015, 3, 1, 0, 0, 0, 0x20603ce0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4015 = VCVTPS2UDQZ128rrkz
{ 4016, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40083ce0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4016 = VCVTPS2UDQZ256rm
{ 4017, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083ce0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4017 = VCVTPS2UDQZ256rmb
{ 4018, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283ce0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4018 = VCVTPS2UDQZ256rmbk
{ 4019, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683ce0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4019 = VCVTPS2UDQZ256rmbkz
{ 4020, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40283ce0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4020 = VCVTPS2UDQZ256rmk
{ 4021, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40683ce0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4021 = VCVTPS2UDQZ256rmkz
{ 4022, 2, 1, 0, 0, 0, 0x40083ce0004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4022 = VCVTPS2UDQZ256rr
{ 4023, 4, 1, 0, 0, 0, 0x40283ce0004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #4023 = VCVTPS2UDQZ256rrk
{ 4024, 3, 1, 0, 0, 0, 0x40683ce0004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #4024 = VCVTPS2UDQZ256rrkz
{ 4025, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80803ce0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4025 = VCVTPS2UDQZrm
{ 4026, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803ce0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4026 = VCVTPS2UDQZrmb
{ 4027, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03ce0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4027 = VCVTPS2UDQZrmbk
{ 4028, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03ce0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4028 = VCVTPS2UDQZrmbkz
{ 4029, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a03ce0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4029 = VCVTPS2UDQZrmk
{ 4030, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e03ce0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4030 = VCVTPS2UDQZrmkz
{ 4031, 2, 1, 0, 0, 0, 0x80803ce0004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4031 = VCVTPS2UDQZrr
{ 4032, 3, 1, 0, 0, 0, 0x409803ce0004805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #4032 = VCVTPS2UDQZrrb
{ 4033, 5, 1, 0, 0, 0, 0x409a03ce0004805ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #4033 = VCVTPS2UDQZrrbk
{ 4034, 4, 1, 0, 0, 0, 0x409e03ce0004805ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #4034 = VCVTPS2UDQZrrbkz
{ 4035, 4, 1, 0, 0, 0, 0x80a03ce0004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4035 = VCVTPS2UDQZrrk
{ 4036, 3, 1, 0, 0, 0, 0x80e03ce0004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4036 = VCVTPS2UDQZrrkz
{ 4037, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10003ce0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4037 = VCVTPS2UQQZ128rm
{ 4038, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003ce0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4038 = VCVTPS2UQQZ128rmb
{ 4039, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203ce0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4039 = VCVTPS2UQQZ128rmbk
{ 4040, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603ce0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4040 = VCVTPS2UQQZ128rmbkz
{ 4041, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10203ce0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4041 = VCVTPS2UQQZ128rmk
{ 4042, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10603ce0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4042 = VCVTPS2UQQZ128rmkz
{ 4043, 2, 1, 0, 0, 0, 0x10003ce0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4043 = VCVTPS2UQQZ128rr
{ 4044, 4, 1, 0, 0, 0, 0x10203ce0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4044 = VCVTPS2UQQZ128rrk
{ 4045, 3, 1, 0, 0, 0, 0x10603ce0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4045 = VCVTPS2UQQZ128rrkz
{ 4046, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20083ce0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4046 = VCVTPS2UQQZ256rm
{ 4047, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083ce0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4047 = VCVTPS2UQQZ256rmb
{ 4048, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283ce0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4048 = VCVTPS2UQQZ256rmbk
{ 4049, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683ce0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4049 = VCVTPS2UQQZ256rmbkz
{ 4050, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20283ce0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4050 = VCVTPS2UQQZ256rmk
{ 4051, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20683ce0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4051 = VCVTPS2UQQZ256rmkz
{ 4052, 2, 1, 0, 0, 0, 0x20083ce0005005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #4052 = VCVTPS2UQQZ256rr
{ 4053, 4, 1, 0, 0, 0, 0x20283ce0005005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #4053 = VCVTPS2UQQZ256rrk
{ 4054, 3, 1, 0, 0, 0, 0x20683ce0005005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #4054 = VCVTPS2UQQZ256rrkz
{ 4055, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40803ce0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4055 = VCVTPS2UQQZrm
{ 4056, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803ce0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4056 = VCVTPS2UQQZrmb
{ 4057, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03ce0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4057 = VCVTPS2UQQZrmbk
{ 4058, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03ce0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4058 = VCVTPS2UQQZrmbkz
{ 4059, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a03ce0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4059 = VCVTPS2UQQZrmk
{ 4060, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e03ce0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4060 = VCVTPS2UQQZrmkz
{ 4061, 2, 1, 0, 0, 0, 0x40803ce0005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #4061 = VCVTPS2UQQZrr
{ 4062, 3, 1, 0, 0, 0, 0x409803ce0005005ULL, nullptr, nullptr, OperandInfo480, -1 ,nullptr }, // Inst #4062 = VCVTPS2UQQZrrb
{ 4063, 5, 1, 0, 0, 0, 0x409a03ce0005005ULL, nullptr, nullptr, OperandInfo481, -1 ,nullptr }, // Inst #4063 = VCVTPS2UQQZrrbk
{ 4064, 4, 1, 0, 0, 0, 0x409e03ce0005005ULL, nullptr, nullptr, OperandInfo482, -1 ,nullptr }, // Inst #4064 = VCVTPS2UQQZrrbkz
{ 4065, 4, 1, 0, 0, 0, 0x40a03ce0005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #4065 = VCVTPS2UQQZrrk
{ 4066, 3, 1, 0, 0, 0, 0x40e03ce0005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #4066 = VCVTPS2UQQZrrkz
{ 4067, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000f360005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4067 = VCVTQQ2PDZ128rm
{ 4068, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100f360005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4068 = VCVTQQ2PDZ128rmb
{ 4069, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120f360005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4069 = VCVTQQ2PDZ128rmbk
{ 4070, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160f360005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4070 = VCVTQQ2PDZ128rmbkz
{ 4071, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020f360005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4071 = VCVTQQ2PDZ128rmk
{ 4072, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060f360005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4072 = VCVTQQ2PDZ128rmkz
{ 4073, 2, 1, 0, 0, 0, 0x2000f360005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4073 = VCVTQQ2PDZ128rr
{ 4074, 4, 1, 0, 0, 0, 0x2020f360005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4074 = VCVTQQ2PDZ128rrk
{ 4075, 3, 1, 0, 0, 0, 0x2060f360005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4075 = VCVTQQ2PDZ128rrkz
{ 4076, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008f360005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4076 = VCVTQQ2PDZ256rm
{ 4077, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108f360005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4077 = VCVTQQ2PDZ256rmb
{ 4078, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128f360005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4078 = VCVTQQ2PDZ256rmbk
{ 4079, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168f360005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4079 = VCVTQQ2PDZ256rmbkz
{ 4080, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028f360005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4080 = VCVTQQ2PDZ256rmk
{ 4081, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068f360005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4081 = VCVTQQ2PDZ256rmkz
{ 4082, 2, 1, 0, 0, 0, 0x4008f360005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4082 = VCVTQQ2PDZ256rr
{ 4083, 4, 1, 0, 0, 0, 0x4028f360005805ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #4083 = VCVTQQ2PDZ256rrk
{ 4084, 3, 1, 0, 0, 0, 0x4068f360005805ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #4084 = VCVTQQ2PDZ256rrkz
{ 4085, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080f360005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4085 = VCVTQQ2PDZrm
{ 4086, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180f360005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4086 = VCVTQQ2PDZrmb
{ 4087, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0f360005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4087 = VCVTQQ2PDZrmbk
{ 4088, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0f360005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4088 = VCVTQQ2PDZrmbkz
{ 4089, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0f360005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4089 = VCVTQQ2PDZrmk
{ 4090, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0f360005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4090 = VCVTQQ2PDZrmkz
{ 4091, 2, 1, 0, 0, 0, 0x8080f360005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4091 = VCVTQQ2PDZrr
{ 4092, 3, 1, 0, 0, 0, 0x41180f360005805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #4092 = VCVTQQ2PDZrrb
{ 4093, 5, 1, 0, 0, 0, 0x411a0f360005805ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #4093 = VCVTQQ2PDZrrbk
{ 4094, 4, 1, 0, 0, 0, 0x411e0f360005805ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #4094 = VCVTQQ2PDZrrbkz
{ 4095, 4, 1, 0, 0, 0, 0x80a0f360005805ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4095 = VCVTQQ2PDZrrk
{ 4096, 3, 1, 0, 0, 0, 0x80e0f360005805ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4096 = VCVTQQ2PDZrrkz
{ 4097, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000ade0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4097 = VCVTQQ2PSZ128rm
{ 4098, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100ade0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4098 = VCVTQQ2PSZ128rmb
{ 4099, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120ade0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4099 = VCVTQQ2PSZ128rmbk
{ 4100, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160ade0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4100 = VCVTQQ2PSZ128rmbkz
{ 4101, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020ade0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4101 = VCVTQQ2PSZ128rmk
{ 4102, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060ade0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4102 = VCVTQQ2PSZ128rmkz
{ 4103, 2, 1, 0, 0, 0, 0x2000ade0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4103 = VCVTQQ2PSZ128rr
{ 4104, 4, 1, 0, 0, 0, 0x2020ade0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4104 = VCVTQQ2PSZ128rrk
{ 4105, 3, 1, 0, 0, 0, 0x2060ade0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4105 = VCVTQQ2PSZ128rrkz
{ 4106, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008ade0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4106 = VCVTQQ2PSZ256rm
{ 4107, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108ade0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4107 = VCVTQQ2PSZ256rmb
{ 4108, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128ade0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4108 = VCVTQQ2PSZ256rmbk
{ 4109, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168ade0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4109 = VCVTQQ2PSZ256rmbkz
{ 4110, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028ade0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4110 = VCVTQQ2PSZ256rmk
{ 4111, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068ade0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4111 = VCVTQQ2PSZ256rmkz
{ 4112, 2, 1, 0, 0, 0, 0x4008ade0004805ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #4112 = VCVTQQ2PSZ256rr
{ 4113, 4, 1, 0, 0, 0, 0x4028ade0004805ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #4113 = VCVTQQ2PSZ256rrk
{ 4114, 3, 1, 0, 0, 0, 0x4068ade0004805ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #4114 = VCVTQQ2PSZ256rrkz
{ 4115, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080ade0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4115 = VCVTQQ2PSZrm
{ 4116, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180ade0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4116 = VCVTQQ2PSZrmb
{ 4117, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0ade0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4117 = VCVTQQ2PSZrmbk
{ 4118, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0ade0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4118 = VCVTQQ2PSZrmbkz
{ 4119, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0ade0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4119 = VCVTQQ2PSZrmk
{ 4120, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0ade0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4120 = VCVTQQ2PSZrmkz
{ 4121, 2, 1, 0, 0, 0, 0x8080ade0004805ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #4121 = VCVTQQ2PSZrr
{ 4122, 3, 1, 0, 0, 0, 0x41180ade0004805ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #4122 = VCVTQQ2PSZrrb
{ 4123, 5, 1, 0, 0, 0, 0x411a0ade0004805ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr }, // Inst #4123 = VCVTQQ2PSZrrbk
{ 4124, 4, 1, 0, 0, 0, 0x411e0ade0004805ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr }, // Inst #4124 = VCVTQQ2PSZrrbkz
{ 4125, 4, 1, 0, 0, 0, 0x80a0ade0004805ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #4125 = VCVTQQ2PSZrrk
{ 4126, 3, 1, 0, 0, 0, 0x80e0ade0004805ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #4126 = VCVTQQ2PSZrrkz
{ 4127, 3, 1, 0, 0, 0, 0x4111096e0006005ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr }, // Inst #4127 = VCVTSD2SI64Zrb
{ 4128, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x101096e0006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4128 = VCVTSD2SI64Zrm
{ 4129, 2, 1, 0, 0, 0, 0x101096e0006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4129 = VCVTSD2SI64Zrr
{ 4130, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1096a0006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4130 = VCVTSD2SI64rm
{ 4131, 2, 1, 0, 897, 0, 0x1096a0006005ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #4131 = VCVTSD2SI64rr
{ 4132, 3, 1, 0, 0, 0, 0x4111016e0006005ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #4132 = VCVTSD2SIZrb
{ 4133, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x101016e0006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4133 = VCVTSD2SIZrm
{ 4134, 2, 1, 0, 0, 0, 0x101016e0006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4134 = VCVTSD2SIZrr
{ 4135, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x1016a0006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4135 = VCVTSD2SIrm
{ 4136, 2, 1, 0, 897, 0, 0x1016a0006005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #4136 = VCVTSD2SIrr
{ 4137, 7, 1, 0, 538, 0|(1ULL<<MCID::MayLoad), 0x1091ad60006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4137 = VCVTSD2SSZrm
{ 4138, 9, 1, 0, 538, 0|(1ULL<<MCID::MayLoad), 0x10b1ad60006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #4138 = VCVTSD2SSZrmk
{ 4139, 8, 1, 0, 538, 0|(1ULL<<MCID::MayLoad), 0x10f1ad60006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #4139 = VCVTSD2SSZrmkz
{ 4140, 3, 1, 0, 536, 0, 0x1091ad60006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #4140 = VCVTSD2SSZrr
{ 4141, 4, 1, 0, 538, 0, 0x41191ad60006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #4141 = VCVTSD2SSZrrb
{ 4142, 6, 1, 0, 538, 0, 0x411b1ad60006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4142 = VCVTSD2SSZrrbk
{ 4143, 5, 1, 0, 538, 0, 0x411f1ad60006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #4143 = VCVTSD2SSZrrbkz
{ 4144, 5, 1, 0, 536, 0, 0x10b1ad60006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #4144 = VCVTSD2SSZrrk
{ 4145, 4, 1, 0, 536, 0, 0x10f1ad60006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #4145 = VCVTSD2SSZrrkz
{ 4146, 7, 1, 0, 871, 0|(1ULL<<MCID::MayLoad), 0x112d20006006ULL, nullptr, nullptr, OperandInfo487, -1 ,nullptr }, // Inst #4146 = VCVTSD2SSrm
{ 4147, 3, 1, 0, 869, 0, 0x112d20006005ULL, nullptr, nullptr, OperandInfo488, -1 ,nullptr }, // Inst #4147 = VCVTSD2SSrr
{ 4148, 3, 1, 0, 0, 0, 0x41110bce0006005ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr }, // Inst #4148 = VCVTSD2USI64Zrb
{ 4149, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1010bce0006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4149 = VCVTSD2USI64Zrm
{ 4150, 2, 1, 0, 0, 0, 0x1010bce0006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4150 = VCVTSD2USI64Zrr
{ 4151, 3, 1, 0, 0, 0, 0x411103ce0006005ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #4151 = VCVTSD2USIZrb
{ 4152, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10103ce0006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4152 = VCVTSD2USIZrm
{ 4153, 2, 1, 0, 0, 0, 0x10103ce0006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4153 = VCVTSD2USIZrr
{ 4154, 7, 1, 0, 539, 0|(1ULL<<MCID::MayLoad), 0x119520006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #4154 = VCVTSI2SD64rm
{ 4155, 3, 1, 0, 254, 0, 0x119520006005ULL, nullptr, nullptr, OperandInfo489, -1 ,nullptr }, // Inst #4155 = VCVTSI2SD64rr
{ 4156, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8111560006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #4156 = VCVTSI2SDZrm
{ 4157, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8111560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4157 = VCVTSI2SDZrm_Int
{ 4158, 3, 1, 0, 0, 0, 0x8111560006005ULL, nullptr, nullptr, OperandInfo490, -1 ,nullptr }, // Inst #4158 = VCVTSI2SDZrr
{ 4159, 3, 1, 0, 0, 0, 0x8111560006005ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, // Inst #4159 = VCVTSI2SDZrr_Int
{ 4160, 4, 1, 0, 0, 0, 0x409111560006005ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr }, // Inst #4160 = VCVTSI2SDZrrb_Int
{ 4161, 7, 1, 0, 539, 0|(1ULL<<MCID::MayLoad), 0x111520006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #4161 = VCVTSI2SDrm
{ 4162, 3, 1, 0, 254, 0, 0x111520006005ULL, nullptr, nullptr, OperandInfo492, -1 ,nullptr }, // Inst #4162 = VCVTSI2SDrr
{ 4163, 7, 1, 0, 539, 0|(1ULL<<MCID::MayLoad), 0x119520005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #4163 = VCVTSI2SS64rm
{ 4164, 3, 1, 0, 892, 0, 0x119520005805ULL, nullptr, nullptr, OperandInfo493, -1 ,nullptr }, // Inst #4164 = VCVTSI2SS64rr
{ 4165, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8111560005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #4165 = VCVTSI2SSZrm
{ 4166, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8111560005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4166 = VCVTSI2SSZrm_Int
{ 4167, 3, 1, 0, 0, 0, 0x8111560005805ULL, nullptr, nullptr, OperandInfo494, -1 ,nullptr }, // Inst #4167 = VCVTSI2SSZrr
{ 4168, 3, 1, 0, 0, 0, 0x8111560005805ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, // Inst #4168 = VCVTSI2SSZrr_Int
{ 4169, 4, 1, 0, 0, 0, 0x409111560005805ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr }, // Inst #4169 = VCVTSI2SSZrrb_Int
{ 4170, 7, 1, 0, 539, 0|(1ULL<<MCID::MayLoad), 0x111520005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #4170 = VCVTSI2SSrm
{ 4171, 3, 1, 0, 892, 0, 0x111520005805ULL, nullptr, nullptr, OperandInfo495, -1 ,nullptr }, // Inst #4171 = VCVTSI2SSrr
{ 4172, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10119560006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #4172 = VCVTSI642SDZrm
{ 4173, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10119560006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4173 = VCVTSI642SDZrm_Int
{ 4174, 3, 1, 0, 0, 0, 0x10119560006005ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4174 = VCVTSI642SDZrr
{ 4175, 3, 1, 0, 0, 0, 0x10119560006005ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr }, // Inst #4175 = VCVTSI642SDZrr_Int
{ 4176, 4, 1, 0, 0, 0, 0x411119560006005ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4176 = VCVTSI642SDZrrb_Int
{ 4177, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10119560005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #4177 = VCVTSI642SSZrm
{ 4178, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10119560005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4178 = VCVTSI642SSZrm_Int
{ 4179, 3, 1, 0, 0, 0, 0x10119560005805ULL, nullptr, nullptr, OperandInfo498, -1 ,nullptr }, // Inst #4179 = VCVTSI642SSZrr
{ 4180, 3, 1, 0, 0, 0, 0x10119560005805ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr }, // Inst #4180 = VCVTSI642SSZrr_Int
{ 4181, 4, 1, 0, 0, 0, 0x411119560005805ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4181 = VCVTSI642SSZrrb_Int
{ 4182, 7, 1, 0, 538, 0|(1ULL<<MCID::MayLoad), 0x8912d60005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4182 = VCVTSS2SDZrm
{ 4183, 9, 1, 0, 538, 0|(1ULL<<MCID::MayLoad), 0x8b12d60005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #4183 = VCVTSS2SDZrmk
{ 4184, 8, 1, 0, 538, 0|(1ULL<<MCID::MayLoad), 0x8f12d60005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #4184 = VCVTSS2SDZrmkz
{ 4185, 3, 1, 0, 536, 0, 0x8912d60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #4185 = VCVTSS2SDZrr
{ 4186, 3, 1, 0, 0, 0, 0x9912d60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #4186 = VCVTSS2SDZrrb
{ 4187, 5, 1, 0, 0, 0, 0x9b12d60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #4187 = VCVTSS2SDZrrbk
{ 4188, 4, 1, 0, 0, 0, 0x9f12d60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #4188 = VCVTSS2SDZrrbkz
{ 4189, 5, 1, 0, 536, 0, 0x8b12d60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #4189 = VCVTSS2SDZrrk
{ 4190, 4, 1, 0, 536, 0, 0x8f12d60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #4190 = VCVTSS2SDZrrkz
{ 4191, 7, 1, 0, 877, 0|(1ULL<<MCID::MayLoad), 0x112d20005806ULL, nullptr, nullptr, OperandInfo499, -1 ,nullptr }, // Inst #4191 = VCVTSS2SDrm
{ 4192, 3, 1, 0, 875, 0, 0x112d20005805ULL, nullptr, nullptr, OperandInfo500, -1 ,nullptr }, // Inst #4192 = VCVTSS2SDrr
{ 4193, 3, 1, 0, 0, 0, 0x4091096e0005805ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr }, // Inst #4193 = VCVTSS2SI64Zrb
{ 4194, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81096e0005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4194 = VCVTSS2SI64Zrm
{ 4195, 2, 1, 0, 0, 0, 0x81096e0005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4195 = VCVTSS2SI64Zrr
{ 4196, 6, 1, 0, 895, 0|(1ULL<<MCID::MayLoad), 0x1096a0005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4196 = VCVTSS2SI64rm
{ 4197, 2, 1, 0, 893, 0, 0x1096a0005805ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #4197 = VCVTSS2SI64rr
{ 4198, 3, 1, 0, 0, 0, 0x4091016e0005805ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #4198 = VCVTSS2SIZrb
{ 4199, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81016e0005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4199 = VCVTSS2SIZrm
{ 4200, 2, 1, 0, 0, 0, 0x81016e0005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4200 = VCVTSS2SIZrr
{ 4201, 6, 1, 0, 896, 0|(1ULL<<MCID::MayLoad), 0x1016a0005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4201 = VCVTSS2SIrm
{ 4202, 2, 1, 0, 894, 0, 0x1016a0005805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #4202 = VCVTSS2SIrr
{ 4203, 3, 1, 0, 0, 0, 0x40910bce0005805ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr }, // Inst #4203 = VCVTSS2USI64Zrb
{ 4204, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x810bce0005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4204 = VCVTSS2USI64Zrm
{ 4205, 2, 1, 0, 0, 0, 0x810bce0005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4205 = VCVTSS2USI64Zrr
{ 4206, 3, 1, 0, 0, 0, 0x409103ce0005805ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #4206 = VCVTSS2USIZrb
{ 4207, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8103ce0005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4207 = VCVTSS2USIZrm
{ 4208, 2, 1, 0, 0, 0, 0x8103ce0005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4208 = VCVTSS2USIZrr
{ 4209, 6, 1, 0, 85, 0|(1ULL<<MCID::MayLoad), 0x7330005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #4209 = VCVTTPD2DQXrm
{ 4210, 6, 1, 0, 887, 0|(1ULL<<MCID::MayLoad), 0x87330005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #4210 = VCVTTPD2DQYrm
{ 4211, 2, 1, 0, 885, 0, 0x87330005005ULL, nullptr, nullptr, OperandInfo450, -1 ,nullptr }, // Inst #4211 = VCVTTPD2DQYrr
{ 4212, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000f360005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4212 = VCVTTPD2DQZ128rm
{ 4213, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100f360005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4213 = VCVTTPD2DQZ128rmb
{ 4214, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120f360005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4214 = VCVTTPD2DQZ128rmbk
{ 4215, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160f360005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4215 = VCVTTPD2DQZ128rmbkz
{ 4216, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020f360005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4216 = VCVTTPD2DQZ128rmk
{ 4217, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060f360005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4217 = VCVTTPD2DQZ128rmkz
{ 4218, 2, 1, 0, 0, 0, 0x2000f360005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4218 = VCVTTPD2DQZ128rr
{ 4219, 4, 1, 0, 0, 0, 0x2020f360005005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4219 = VCVTTPD2DQZ128rrk
{ 4220, 3, 1, 0, 0, 0, 0x2060f360005005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4220 = VCVTTPD2DQZ128rrkz
{ 4221, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008f360005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4221 = VCVTTPD2DQZ256rm
{ 4222, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108f360005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4222 = VCVTTPD2DQZ256rmb
{ 4223, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128f360005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4223 = VCVTTPD2DQZ256rmbk
{ 4224, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168f360005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4224 = VCVTTPD2DQZ256rmbkz
{ 4225, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028f360005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4225 = VCVTTPD2DQZ256rmk
{ 4226, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068f360005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4226 = VCVTTPD2DQZ256rmkz
{ 4227, 2, 1, 0, 0, 0, 0x4008f360005005ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #4227 = VCVTTPD2DQZ256rr
{ 4228, 4, 1, 0, 0, 0, 0x4028f360005005ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #4228 = VCVTTPD2DQZ256rrk
{ 4229, 3, 1, 0, 0, 0, 0x4068f360005005ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #4229 = VCVTTPD2DQZ256rrkz
{ 4230, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080f360005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4230 = VCVTTPD2DQZrm
{ 4231, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180f360005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4231 = VCVTTPD2DQZrmb
{ 4232, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0f360005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4232 = VCVTTPD2DQZrmbk
{ 4233, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0f360005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4233 = VCVTTPD2DQZrmbkz
{ 4234, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0f360005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4234 = VCVTTPD2DQZrmk
{ 4235, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0f360005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4235 = VCVTTPD2DQZrmkz
{ 4236, 2, 1, 0, 0, 0, 0x8080f360005005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #4236 = VCVTTPD2DQZrr
{ 4237, 2, 1, 0, 0, 0, 0x1180f360005005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #4237 = VCVTTPD2DQZrrb
{ 4238, 4, 1, 0, 0, 0, 0x11a0f360005005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #4238 = VCVTTPD2DQZrrbk
{ 4239, 3, 1, 0, 0, 0, 0x11e0f360005005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #4239 = VCVTTPD2DQZrrbkz
{ 4240, 4, 1, 0, 0, 0, 0x80a0f360005005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #4240 = VCVTTPD2DQZrrk
{ 4241, 3, 1, 0, 0, 0, 0x80e0f360005005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #4241 = VCVTTPD2DQZrrkz
{ 4242, 2, 1, 0, 881, 0, 0x7330005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #4242 = VCVTTPD2DQrr
{ 4243, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000bd60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4243 = VCVTTPD2QQZ128rm
{ 4244, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100bd60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4244 = VCVTTPD2QQZ128rmb
{ 4245, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120bd60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4245 = VCVTTPD2QQZ128rmbk
{ 4246, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160bd60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4246 = VCVTTPD2QQZ128rmbkz
{ 4247, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020bd60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4247 = VCVTTPD2QQZ128rmk
{ 4248, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060bd60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4248 = VCVTTPD2QQZ128rmkz
{ 4249, 2, 1, 0, 0, 0, 0x2000bd60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4249 = VCVTTPD2QQZ128rr
{ 4250, 4, 1, 0, 0, 0, 0x2020bd60005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4250 = VCVTTPD2QQZ128rrk
{ 4251, 3, 1, 0, 0, 0, 0x2060bd60005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4251 = VCVTTPD2QQZ128rrkz
{ 4252, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008bd60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4252 = VCVTTPD2QQZ256rm
{ 4253, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108bd60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4253 = VCVTTPD2QQZ256rmb
{ 4254, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128bd60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4254 = VCVTTPD2QQZ256rmbk
{ 4255, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168bd60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4255 = VCVTTPD2QQZ256rmbkz
{ 4256, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028bd60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4256 = VCVTTPD2QQZ256rmk
{ 4257, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068bd60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4257 = VCVTTPD2QQZ256rmkz
{ 4258, 2, 1, 0, 0, 0, 0x4008bd60005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4258 = VCVTTPD2QQZ256rr
{ 4259, 4, 1, 0, 0, 0, 0x4028bd60005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #4259 = VCVTTPD2QQZ256rrk
{ 4260, 3, 1, 0, 0, 0, 0x4068bd60005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #4260 = VCVTTPD2QQZ256rrkz
{ 4261, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080bd60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4261 = VCVTTPD2QQZrm
{ 4262, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180bd60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4262 = VCVTTPD2QQZrmb
{ 4263, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0bd60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4263 = VCVTTPD2QQZrmbk
{ 4264, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0bd60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4264 = VCVTTPD2QQZrmbkz
{ 4265, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0bd60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4265 = VCVTTPD2QQZrmk
{ 4266, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0bd60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4266 = VCVTTPD2QQZrmkz
{ 4267, 2, 1, 0, 0, 0, 0x8080bd60005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4267 = VCVTTPD2QQZrr
{ 4268, 2, 1, 0, 0, 0, 0x1180bd60005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4268 = VCVTTPD2QQZrrb
{ 4269, 4, 1, 0, 0, 0, 0x11a0bd60005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4269 = VCVTTPD2QQZrrbk
{ 4270, 3, 1, 0, 0, 0, 0x11e0bd60005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4270 = VCVTTPD2QQZrrbkz
{ 4271, 4, 1, 0, 0, 0, 0x80a0bd60005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4271 = VCVTTPD2QQZrrk
{ 4272, 3, 1, 0, 0, 0, 0x80e0bd60005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4272 = VCVTTPD2QQZrrkz
{ 4273, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000bc60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4273 = VCVTTPD2UDQZ128rm
{ 4274, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100bc60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4274 = VCVTTPD2UDQZ128rmb
{ 4275, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120bc60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4275 = VCVTTPD2UDQZ128rmbk
{ 4276, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160bc60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4276 = VCVTTPD2UDQZ128rmbkz
{ 4277, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020bc60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4277 = VCVTTPD2UDQZ128rmk
{ 4278, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060bc60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4278 = VCVTTPD2UDQZ128rmkz
{ 4279, 2, 1, 0, 0, 0, 0x2000bc60004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4279 = VCVTTPD2UDQZ128rr
{ 4280, 4, 1, 0, 0, 0, 0x2020bc60004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4280 = VCVTTPD2UDQZ128rrk
{ 4281, 3, 1, 0, 0, 0, 0x2060bc60004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4281 = VCVTTPD2UDQZ128rrkz
{ 4282, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008bc60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4282 = VCVTTPD2UDQZ256rm
{ 4283, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108bc60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4283 = VCVTTPD2UDQZ256rmb
{ 4284, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128bc60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4284 = VCVTTPD2UDQZ256rmbk
{ 4285, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168bc60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4285 = VCVTTPD2UDQZ256rmbkz
{ 4286, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028bc60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4286 = VCVTTPD2UDQZ256rmk
{ 4287, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068bc60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4287 = VCVTTPD2UDQZ256rmkz
{ 4288, 2, 1, 0, 0, 0, 0x4008bc60004805ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #4288 = VCVTTPD2UDQZ256rr
{ 4289, 4, 1, 0, 0, 0, 0x4028bc60004805ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #4289 = VCVTTPD2UDQZ256rrk
{ 4290, 3, 1, 0, 0, 0, 0x4068bc60004805ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #4290 = VCVTTPD2UDQZ256rrkz
{ 4291, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080bc60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4291 = VCVTTPD2UDQZrm
{ 4292, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180bc60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4292 = VCVTTPD2UDQZrmb
{ 4293, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0bc60004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4293 = VCVTTPD2UDQZrmbk
{ 4294, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0bc60004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4294 = VCVTTPD2UDQZrmbkz
{ 4295, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0bc60004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4295 = VCVTTPD2UDQZrmk
{ 4296, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0bc60004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4296 = VCVTTPD2UDQZrmkz
{ 4297, 2, 1, 0, 0, 0, 0x8080bc60004805ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #4297 = VCVTTPD2UDQZrr
{ 4298, 2, 1, 0, 0, 0, 0x1180bc60004805ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #4298 = VCVTTPD2UDQZrrb
{ 4299, 4, 1, 0, 0, 0, 0x11a0bc60004805ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #4299 = VCVTTPD2UDQZrrbk
{ 4300, 3, 1, 0, 0, 0, 0x11e0bc60004805ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #4300 = VCVTTPD2UDQZrrbkz
{ 4301, 4, 1, 0, 0, 0, 0x80a0bc60004805ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #4301 = VCVTTPD2UDQZrrk
{ 4302, 3, 1, 0, 0, 0, 0x80e0bc60004805ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #4302 = VCVTTPD2UDQZrrkz
{ 4303, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000bc60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4303 = VCVTTPD2UQQZ128rm
{ 4304, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100bc60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4304 = VCVTTPD2UQQZ128rmb
{ 4305, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120bc60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4305 = VCVTTPD2UQQZ128rmbk
{ 4306, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160bc60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4306 = VCVTTPD2UQQZ128rmbkz
{ 4307, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020bc60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4307 = VCVTTPD2UQQZ128rmk
{ 4308, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060bc60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4308 = VCVTTPD2UQQZ128rmkz
{ 4309, 2, 1, 0, 0, 0, 0x2000bc60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4309 = VCVTTPD2UQQZ128rr
{ 4310, 4, 1, 0, 0, 0, 0x2020bc60005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4310 = VCVTTPD2UQQZ128rrk
{ 4311, 3, 1, 0, 0, 0, 0x2060bc60005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4311 = VCVTTPD2UQQZ128rrkz
{ 4312, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008bc60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4312 = VCVTTPD2UQQZ256rm
{ 4313, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108bc60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4313 = VCVTTPD2UQQZ256rmb
{ 4314, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128bc60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4314 = VCVTTPD2UQQZ256rmbk
{ 4315, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168bc60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4315 = VCVTTPD2UQQZ256rmbkz
{ 4316, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028bc60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4316 = VCVTTPD2UQQZ256rmk
{ 4317, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068bc60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4317 = VCVTTPD2UQQZ256rmkz
{ 4318, 2, 1, 0, 0, 0, 0x4008bc60005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4318 = VCVTTPD2UQQZ256rr
{ 4319, 4, 1, 0, 0, 0, 0x4028bc60005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #4319 = VCVTTPD2UQQZ256rrk
{ 4320, 3, 1, 0, 0, 0, 0x4068bc60005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #4320 = VCVTTPD2UQQZ256rrkz
{ 4321, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080bc60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4321 = VCVTTPD2UQQZrm
{ 4322, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180bc60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4322 = VCVTTPD2UQQZrmb
{ 4323, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0bc60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4323 = VCVTTPD2UQQZrmbk
{ 4324, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0bc60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4324 = VCVTTPD2UQQZrmbkz
{ 4325, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0bc60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4325 = VCVTTPD2UQQZrmk
{ 4326, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0bc60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4326 = VCVTTPD2UQQZrmkz
{ 4327, 2, 1, 0, 0, 0, 0x8080bc60005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4327 = VCVTTPD2UQQZrr
{ 4328, 2, 1, 0, 0, 0, 0x1180bc60005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4328 = VCVTTPD2UQQZrrb
{ 4329, 4, 1, 0, 0, 0, 0x11a0bc60005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4329 = VCVTTPD2UQQZrrbk
{ 4330, 3, 1, 0, 0, 0, 0x11e0bc60005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4330 = VCVTTPD2UQQZrrbkz
{ 4331, 4, 1, 0, 0, 0, 0x80a0bc60005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4331 = VCVTTPD2UQQZrrk
{ 4332, 3, 1, 0, 0, 0, 0x80e0bc60005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4332 = VCVTTPD2UQQZrrkz
{ 4333, 6, 1, 0, 89, 0|(1ULL<<MCID::MayLoad), 0x82da0005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #4333 = VCVTTPS2DQYrm
{ 4334, 2, 1, 0, 90, 0, 0x82da0005805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #4334 = VCVTTPS2DQYrr
{ 4335, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20002de0005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4335 = VCVTTPS2DQZ128rm
{ 4336, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002de0005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4336 = VCVTTPS2DQZ128rmb
{ 4337, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202de0005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4337 = VCVTTPS2DQZ128rmbk
{ 4338, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602de0005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4338 = VCVTTPS2DQZ128rmbkz
{ 4339, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20202de0005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4339 = VCVTTPS2DQZ128rmk
{ 4340, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20602de0005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4340 = VCVTTPS2DQZ128rmkz
{ 4341, 2, 1, 0, 0, 0, 0x20002de0005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4341 = VCVTTPS2DQZ128rr
{ 4342, 4, 1, 0, 0, 0, 0x20202de0005805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4342 = VCVTTPS2DQZ128rrk
{ 4343, 3, 1, 0, 0, 0, 0x20602de0005805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4343 = VCVTTPS2DQZ128rrkz
{ 4344, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40082de0005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4344 = VCVTTPS2DQZ256rm
{ 4345, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082de0005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4345 = VCVTTPS2DQZ256rmb
{ 4346, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282de0005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4346 = VCVTTPS2DQZ256rmbk
{ 4347, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682de0005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4347 = VCVTTPS2DQZ256rmbkz
{ 4348, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40282de0005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4348 = VCVTTPS2DQZ256rmk
{ 4349, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40682de0005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4349 = VCVTTPS2DQZ256rmkz
{ 4350, 2, 1, 0, 0, 0, 0x40082de0005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4350 = VCVTTPS2DQZ256rr
{ 4351, 4, 1, 0, 0, 0, 0x40282de0005805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #4351 = VCVTTPS2DQZ256rrk
{ 4352, 3, 1, 0, 0, 0, 0x40682de0005805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #4352 = VCVTTPS2DQZ256rrkz
{ 4353, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80802de0005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4353 = VCVTTPS2DQZrm
{ 4354, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802de0005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4354 = VCVTTPS2DQZrmb
{ 4355, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02de0005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4355 = VCVTTPS2DQZrmbk
{ 4356, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02de0005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4356 = VCVTTPS2DQZrmbkz
{ 4357, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a02de0005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4357 = VCVTTPS2DQZrmk
{ 4358, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e02de0005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4358 = VCVTTPS2DQZrmkz
{ 4359, 2, 1, 0, 0, 0, 0x80802de0005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4359 = VCVTTPS2DQZrr
{ 4360, 2, 1, 0, 0, 0, 0x9802de0005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4360 = VCVTTPS2DQZrrb
{ 4361, 4, 1, 0, 0, 0, 0x9a02de0005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4361 = VCVTTPS2DQZrrbk
{ 4362, 3, 1, 0, 0, 0, 0x9e02de0005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4362 = VCVTTPS2DQZrrbkz
{ 4363, 4, 1, 0, 0, 0, 0x80a02de0005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4363 = VCVTTPS2DQZrrk
{ 4364, 3, 1, 0, 0, 0, 0x80e02de0005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4364 = VCVTTPS2DQZrrkz
{ 4365, 6, 1, 0, 89, 0|(1ULL<<MCID::MayLoad), 0x2da0005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #4365 = VCVTTPS2DQrm
{ 4366, 2, 1, 0, 90, 0, 0x2da0005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #4366 = VCVTTPS2DQrr
{ 4367, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10003d60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4367 = VCVTTPS2QQZ128rm
{ 4368, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003d60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4368 = VCVTTPS2QQZ128rmb
{ 4369, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203d60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4369 = VCVTTPS2QQZ128rmbk
{ 4370, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603d60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4370 = VCVTTPS2QQZ128rmbkz
{ 4371, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10203d60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4371 = VCVTTPS2QQZ128rmk
{ 4372, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10603d60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4372 = VCVTTPS2QQZ128rmkz
{ 4373, 2, 1, 0, 0, 0, 0x10003d60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4373 = VCVTTPS2QQZ128rr
{ 4374, 4, 1, 0, 0, 0, 0x10203d60005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4374 = VCVTTPS2QQZ128rrk
{ 4375, 3, 1, 0, 0, 0, 0x10603d60005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4375 = VCVTTPS2QQZ128rrkz
{ 4376, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20083d60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4376 = VCVTTPS2QQZ256rm
{ 4377, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083d60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4377 = VCVTTPS2QQZ256rmb
{ 4378, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283d60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4378 = VCVTTPS2QQZ256rmbk
{ 4379, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683d60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4379 = VCVTTPS2QQZ256rmbkz
{ 4380, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20283d60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4380 = VCVTTPS2QQZ256rmk
{ 4381, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20683d60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4381 = VCVTTPS2QQZ256rmkz
{ 4382, 2, 1, 0, 0, 0, 0x20083d60005005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #4382 = VCVTTPS2QQZ256rr
{ 4383, 4, 1, 0, 0, 0, 0x20283d60005005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #4383 = VCVTTPS2QQZ256rrk
{ 4384, 3, 1, 0, 0, 0, 0x20683d60005005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #4384 = VCVTTPS2QQZ256rrkz
{ 4385, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40803d60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4385 = VCVTTPS2QQZrm
{ 4386, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803d60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4386 = VCVTTPS2QQZrmb
{ 4387, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03d60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4387 = VCVTTPS2QQZrmbk
{ 4388, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03d60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4388 = VCVTTPS2QQZrmbkz
{ 4389, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a03d60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4389 = VCVTTPS2QQZrmk
{ 4390, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e03d60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4390 = VCVTTPS2QQZrmkz
{ 4391, 2, 1, 0, 0, 0, 0x40803d60005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #4391 = VCVTTPS2QQZrr
{ 4392, 2, 1, 0, 0, 0, 0x9803d60005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #4392 = VCVTTPS2QQZrrb
{ 4393, 4, 1, 0, 0, 0, 0x9a03d60005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #4393 = VCVTTPS2QQZrrbk
{ 4394, 3, 1, 0, 0, 0, 0x9e03d60005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #4394 = VCVTTPS2QQZrrbkz
{ 4395, 4, 1, 0, 0, 0, 0x40a03d60005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #4395 = VCVTTPS2QQZrrk
{ 4396, 3, 1, 0, 0, 0, 0x40e03d60005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #4396 = VCVTTPS2QQZrrkz
{ 4397, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20003c60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4397 = VCVTTPS2UDQZ128rm
{ 4398, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003c60004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4398 = VCVTTPS2UDQZ128rmb
{ 4399, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203c60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4399 = VCVTTPS2UDQZ128rmbk
{ 4400, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603c60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4400 = VCVTTPS2UDQZ128rmbkz
{ 4401, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20203c60004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4401 = VCVTTPS2UDQZ128rmk
{ 4402, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20603c60004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4402 = VCVTTPS2UDQZ128rmkz
{ 4403, 2, 1, 0, 0, 0, 0x20003c60004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4403 = VCVTTPS2UDQZ128rr
{ 4404, 4, 1, 0, 0, 0, 0x20203c60004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4404 = VCVTTPS2UDQZ128rrk
{ 4405, 3, 1, 0, 0, 0, 0x20603c60004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4405 = VCVTTPS2UDQZ128rrkz
{ 4406, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40083c60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4406 = VCVTTPS2UDQZ256rm
{ 4407, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083c60004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4407 = VCVTTPS2UDQZ256rmb
{ 4408, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283c60004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4408 = VCVTTPS2UDQZ256rmbk
{ 4409, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683c60004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4409 = VCVTTPS2UDQZ256rmbkz
{ 4410, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40283c60004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4410 = VCVTTPS2UDQZ256rmk
{ 4411, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40683c60004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4411 = VCVTTPS2UDQZ256rmkz
{ 4412, 2, 1, 0, 0, 0, 0x40083c60004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4412 = VCVTTPS2UDQZ256rr
{ 4413, 4, 1, 0, 0, 0, 0x40283c60004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #4413 = VCVTTPS2UDQZ256rrk
{ 4414, 3, 1, 0, 0, 0, 0x40683c60004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #4414 = VCVTTPS2UDQZ256rrkz
{ 4415, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80803c60004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4415 = VCVTTPS2UDQZrm
{ 4416, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803c60004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4416 = VCVTTPS2UDQZrmb
{ 4417, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03c60004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4417 = VCVTTPS2UDQZrmbk
{ 4418, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03c60004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4418 = VCVTTPS2UDQZrmbkz
{ 4419, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a03c60004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4419 = VCVTTPS2UDQZrmk
{ 4420, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e03c60004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4420 = VCVTTPS2UDQZrmkz
{ 4421, 2, 1, 0, 0, 0, 0x80803c60004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4421 = VCVTTPS2UDQZrr
{ 4422, 2, 1, 0, 0, 0, 0x9803c60004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4422 = VCVTTPS2UDQZrrb
{ 4423, 4, 1, 0, 0, 0, 0x9a03c60004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4423 = VCVTTPS2UDQZrrbk
{ 4424, 3, 1, 0, 0, 0, 0x9e03c60004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4424 = VCVTTPS2UDQZrrbkz
{ 4425, 4, 1, 0, 0, 0, 0x80a03c60004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4425 = VCVTTPS2UDQZrrk
{ 4426, 3, 1, 0, 0, 0, 0x80e03c60004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4426 = VCVTTPS2UDQZrrkz
{ 4427, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10003c60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4427 = VCVTTPS2UQQZ128rm
{ 4428, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003c60005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4428 = VCVTTPS2UQQZ128rmb
{ 4429, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203c60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4429 = VCVTTPS2UQQZ128rmbk
{ 4430, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603c60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4430 = VCVTTPS2UQQZ128rmbkz
{ 4431, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10203c60005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4431 = VCVTTPS2UQQZ128rmk
{ 4432, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10603c60005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4432 = VCVTTPS2UQQZ128rmkz
{ 4433, 2, 1, 0, 0, 0, 0x10003c60005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4433 = VCVTTPS2UQQZ128rr
{ 4434, 4, 1, 0, 0, 0, 0x10203c60005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4434 = VCVTTPS2UQQZ128rrk
{ 4435, 3, 1, 0, 0, 0, 0x10603c60005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4435 = VCVTTPS2UQQZ128rrkz
{ 4436, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20083c60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4436 = VCVTTPS2UQQZ256rm
{ 4437, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083c60005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4437 = VCVTTPS2UQQZ256rmb
{ 4438, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283c60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4438 = VCVTTPS2UQQZ256rmbk
{ 4439, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683c60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4439 = VCVTTPS2UQQZ256rmbkz
{ 4440, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20283c60005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4440 = VCVTTPS2UQQZ256rmk
{ 4441, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20683c60005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4441 = VCVTTPS2UQQZ256rmkz
{ 4442, 2, 1, 0, 0, 0, 0x20083c60005005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #4442 = VCVTTPS2UQQZ256rr
{ 4443, 4, 1, 0, 0, 0, 0x20283c60005005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #4443 = VCVTTPS2UQQZ256rrk
{ 4444, 3, 1, 0, 0, 0, 0x20683c60005005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #4444 = VCVTTPS2UQQZ256rrkz
{ 4445, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40803c60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4445 = VCVTTPS2UQQZrm
{ 4446, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803c60005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4446 = VCVTTPS2UQQZrmb
{ 4447, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03c60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4447 = VCVTTPS2UQQZrmbk
{ 4448, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03c60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4448 = VCVTTPS2UQQZrmbkz
{ 4449, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a03c60005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4449 = VCVTTPS2UQQZrmk
{ 4450, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e03c60005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4450 = VCVTTPS2UQQZrmkz
{ 4451, 2, 1, 0, 0, 0, 0x40803c60005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #4451 = VCVTTPS2UQQZrr
{ 4452, 2, 1, 0, 0, 0, 0x9803c60005005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #4452 = VCVTTPS2UQQZrrb
{ 4453, 4, 1, 0, 0, 0, 0x9a03c60005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #4453 = VCVTTPS2UQQZrrbk
{ 4454, 3, 1, 0, 0, 0, 0x9e03c60005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #4454 = VCVTTPS2UQQZrrbkz
{ 4455, 4, 1, 0, 0, 0, 0x40a03c60005005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #4455 = VCVTTPS2UQQZrrk
{ 4456, 3, 1, 0, 0, 0, 0x40e03c60005005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #4456 = VCVTTPS2UQQZrrkz
{ 4457, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x11009660006005ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr }, // Inst #4457 = VCVTTSD2SI64Zrb
{ 4458, 2, 1, 0, 0, 0, 0x11109660006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4458 = VCVTTSD2SI64Zrb_Int
{ 4459, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10009660006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4459 = VCVTTSD2SI64Zrm
{ 4460, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10109660006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4460 = VCVTTSD2SI64Zrm_Int
{ 4461, 2, 1, 0, 0, 0, 0x10009660006005ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr }, // Inst #4461 = VCVTTSD2SI64Zrr
{ 4462, 2, 1, 0, 0, 0, 0x10109660006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4462 = VCVTTSD2SI64Zrr_Int
{ 4463, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x109620006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4463 = VCVTTSD2SI64rm
{ 4464, 2, 1, 0, 897, 0, 0x109620006005ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr }, // Inst #4464 = VCVTTSD2SI64rr
{ 4465, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x11001660006005ULL, nullptr, nullptr, OperandInfo502, -1 ,nullptr }, // Inst #4465 = VCVTTSD2SIZrb
{ 4466, 2, 1, 0, 0, 0, 0x11101660006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4466 = VCVTTSD2SIZrb_Int
{ 4467, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10001660006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4467 = VCVTTSD2SIZrm
{ 4468, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10101660006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4468 = VCVTTSD2SIZrm_Int
{ 4469, 2, 1, 0, 0, 0, 0x10001660006005ULL, nullptr, nullptr, OperandInfo502, -1 ,nullptr }, // Inst #4469 = VCVTTSD2SIZrr
{ 4470, 2, 1, 0, 0, 0, 0x10101660006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4470 = VCVTTSD2SIZrr_Int
{ 4471, 6, 1, 0, 898, 0|(1ULL<<MCID::MayLoad), 0x101620006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4471 = VCVTTSD2SIrm
{ 4472, 2, 1, 0, 897, 0, 0x101620006005ULL, nullptr, nullptr, OperandInfo129, -1 ,nullptr }, // Inst #4472 = VCVTTSD2SIrr
{ 4473, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1100bc60006005ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr }, // Inst #4473 = VCVTTSD2USI64Zrb
{ 4474, 2, 1, 0, 0, 0, 0x1110bc60006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4474 = VCVTTSD2USI64Zrb_Int
{ 4475, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1000bc60006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4475 = VCVTTSD2USI64Zrm
{ 4476, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1010bc60006006ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4476 = VCVTTSD2USI64Zrm_Int
{ 4477, 2, 1, 0, 0, 0, 0x1000bc60006005ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr }, // Inst #4477 = VCVTTSD2USI64Zrr
{ 4478, 2, 1, 0, 0, 0, 0x1010bc60006005ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4478 = VCVTTSD2USI64Zrr_Int
{ 4479, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x11003c60006005ULL, nullptr, nullptr, OperandInfo502, -1 ,nullptr }, // Inst #4479 = VCVTTSD2USIZrb
{ 4480, 2, 1, 0, 0, 0, 0x11103c60006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4480 = VCVTTSD2USIZrb_Int
{ 4481, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10003c60006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4481 = VCVTTSD2USIZrm
{ 4482, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10103c60006006ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4482 = VCVTTSD2USIZrm_Int
{ 4483, 2, 1, 0, 0, 0, 0x10003c60006005ULL, nullptr, nullptr, OperandInfo502, -1 ,nullptr }, // Inst #4483 = VCVTTSD2USIZrr
{ 4484, 2, 1, 0, 0, 0, 0x10103c60006005ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4484 = VCVTTSD2USIZrr_Int
{ 4485, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9009660005805ULL, nullptr, nullptr, OperandInfo503, -1 ,nullptr }, // Inst #4485 = VCVTTSS2SI64Zrb
{ 4486, 2, 1, 0, 0, 0, 0x9109660005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4486 = VCVTTSS2SI64Zrb_Int
{ 4487, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8009660005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4487 = VCVTTSS2SI64Zrm
{ 4488, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8109660005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4488 = VCVTTSS2SI64Zrm_Int
{ 4489, 2, 1, 0, 0, 0, 0x8009660005805ULL, nullptr, nullptr, OperandInfo503, -1 ,nullptr }, // Inst #4489 = VCVTTSS2SI64Zrr
{ 4490, 2, 1, 0, 0, 0, 0x8109660005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4490 = VCVTTSS2SI64Zrr_Int
{ 4491, 6, 1, 0, 895, 0|(1ULL<<MCID::MayLoad), 0x109620005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4491 = VCVTTSS2SI64rm
{ 4492, 2, 1, 0, 893, 0, 0x109620005805ULL, nullptr, nullptr, OperandInfo130, -1 ,nullptr }, // Inst #4492 = VCVTTSS2SI64rr
{ 4493, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9001660005805ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr }, // Inst #4493 = VCVTTSS2SIZrb
{ 4494, 2, 1, 0, 0, 0, 0x9101660005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4494 = VCVTTSS2SIZrb_Int
{ 4495, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8001660005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4495 = VCVTTSS2SIZrm
{ 4496, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8101660005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4496 = VCVTTSS2SIZrm_Int
{ 4497, 2, 1, 0, 0, 0, 0x8001660005805ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr }, // Inst #4497 = VCVTTSS2SIZrr
{ 4498, 2, 1, 0, 0, 0, 0x8101660005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4498 = VCVTTSS2SIZrr_Int
{ 4499, 6, 1, 0, 896, 0|(1ULL<<MCID::MayLoad), 0x101620005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4499 = VCVTTSS2SIrm
{ 4500, 2, 1, 0, 894, 0, 0x101620005805ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr }, // Inst #4500 = VCVTTSS2SIrr
{ 4501, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x900bc60005805ULL, nullptr, nullptr, OperandInfo503, -1 ,nullptr }, // Inst #4501 = VCVTTSS2USI64Zrb
{ 4502, 2, 1, 0, 0, 0, 0x910bc60005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4502 = VCVTTSS2USI64Zrb_Int
{ 4503, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x800bc60005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4503 = VCVTTSS2USI64Zrm
{ 4504, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x810bc60005806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #4504 = VCVTTSS2USI64Zrm_Int
{ 4505, 2, 1, 0, 0, 0, 0x800bc60005805ULL, nullptr, nullptr, OperandInfo503, -1 ,nullptr }, // Inst #4505 = VCVTTSS2USI64Zrr
{ 4506, 2, 1, 0, 0, 0, 0x810bc60005805ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #4506 = VCVTTSS2USI64Zrr_Int
{ 4507, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9003c60005805ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr }, // Inst #4507 = VCVTTSS2USIZrb
{ 4508, 2, 1, 0, 0, 0, 0x9103c60005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4508 = VCVTTSS2USIZrb_Int
{ 4509, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8003c60005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4509 = VCVTTSS2USIZrm
{ 4510, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8103c60005806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #4510 = VCVTTSS2USIZrm_Int
{ 4511, 2, 1, 0, 0, 0, 0x8003c60005805ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr }, // Inst #4511 = VCVTTSS2USIZrr
{ 4512, 2, 1, 0, 0, 0, 0x8103c60005805ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #4512 = VCVTTSS2USIZrr_Int
{ 4513, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10003d60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4513 = VCVTUDQ2PDZ128rm
{ 4514, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003d60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4514 = VCVTUDQ2PDZ128rmb
{ 4515, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203d60005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4515 = VCVTUDQ2PDZ128rmbk
{ 4516, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603d60005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4516 = VCVTUDQ2PDZ128rmbkz
{ 4517, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10203d60005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4517 = VCVTUDQ2PDZ128rmk
{ 4518, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10603d60005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4518 = VCVTUDQ2PDZ128rmkz
{ 4519, 2, 1, 0, 0, 0, 0x10003d60005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4519 = VCVTUDQ2PDZ128rr
{ 4520, 4, 1, 0, 0, 0, 0x10203d60005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4520 = VCVTUDQ2PDZ128rrk
{ 4521, 3, 1, 0, 0, 0, 0x10603d60005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4521 = VCVTUDQ2PDZ128rrkz
{ 4522, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20083d60005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4522 = VCVTUDQ2PDZ256rm
{ 4523, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083d60005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4523 = VCVTUDQ2PDZ256rmb
{ 4524, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283d60005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4524 = VCVTUDQ2PDZ256rmbk
{ 4525, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683d60005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4525 = VCVTUDQ2PDZ256rmbkz
{ 4526, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20283d60005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4526 = VCVTUDQ2PDZ256rmk
{ 4527, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20683d60005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4527 = VCVTUDQ2PDZ256rmkz
{ 4528, 2, 1, 0, 0, 0, 0x20083d60005805ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #4528 = VCVTUDQ2PDZ256rr
{ 4529, 4, 1, 0, 0, 0, 0x20283d60005805ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #4529 = VCVTUDQ2PDZ256rrk
{ 4530, 3, 1, 0, 0, 0, 0x20683d60005805ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #4530 = VCVTUDQ2PDZ256rrkz
{ 4531, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40803d60005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4531 = VCVTUDQ2PDZrm
{ 4532, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803d60005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4532 = VCVTUDQ2PDZrmb
{ 4533, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03d60005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4533 = VCVTUDQ2PDZrmbk
{ 4534, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03d60005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4534 = VCVTUDQ2PDZrmbkz
{ 4535, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a03d60005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4535 = VCVTUDQ2PDZrmk
{ 4536, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e03d60005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4536 = VCVTUDQ2PDZrmkz
{ 4537, 2, 1, 0, 0, 0, 0x40803d60005805ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #4537 = VCVTUDQ2PDZrr
{ 4538, 4, 1, 0, 0, 0, 0x40a03d60005805ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #4538 = VCVTUDQ2PDZrrk
{ 4539, 3, 1, 0, 0, 0, 0x40e03d60005805ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #4539 = VCVTUDQ2PDZrrkz
{ 4540, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20003d60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4540 = VCVTUDQ2PSZ128rm
{ 4541, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003d60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4541 = VCVTUDQ2PSZ128rmb
{ 4542, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203d60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4542 = VCVTUDQ2PSZ128rmbk
{ 4543, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603d60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4543 = VCVTUDQ2PSZ128rmbkz
{ 4544, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20203d60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4544 = VCVTUDQ2PSZ128rmk
{ 4545, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20603d60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4545 = VCVTUDQ2PSZ128rmkz
{ 4546, 2, 1, 0, 0, 0, 0x20003d60006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4546 = VCVTUDQ2PSZ128rr
{ 4547, 4, 1, 0, 0, 0, 0x20203d60006005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4547 = VCVTUDQ2PSZ128rrk
{ 4548, 3, 1, 0, 0, 0, 0x20603d60006005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4548 = VCVTUDQ2PSZ128rrkz
{ 4549, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40083d60006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4549 = VCVTUDQ2PSZ256rm
{ 4550, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083d60006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4550 = VCVTUDQ2PSZ256rmb
{ 4551, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283d60006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4551 = VCVTUDQ2PSZ256rmbk
{ 4552, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683d60006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4552 = VCVTUDQ2PSZ256rmbkz
{ 4553, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40283d60006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4553 = VCVTUDQ2PSZ256rmk
{ 4554, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40683d60006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4554 = VCVTUDQ2PSZ256rmkz
{ 4555, 2, 1, 0, 0, 0, 0x40083d60006005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4555 = VCVTUDQ2PSZ256rr
{ 4556, 4, 1, 0, 0, 0, 0x40283d60006005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #4556 = VCVTUDQ2PSZ256rrk
{ 4557, 3, 1, 0, 0, 0, 0x40683d60006005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #4557 = VCVTUDQ2PSZ256rrkz
{ 4558, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80803d60006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4558 = VCVTUDQ2PSZrm
{ 4559, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803d60006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4559 = VCVTUDQ2PSZrmb
{ 4560, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03d60006006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4560 = VCVTUDQ2PSZrmbk
{ 4561, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03d60006006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4561 = VCVTUDQ2PSZrmbkz
{ 4562, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a03d60006006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4562 = VCVTUDQ2PSZrmk
{ 4563, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e03d60006006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4563 = VCVTUDQ2PSZrmkz
{ 4564, 2, 1, 0, 0, 0, 0x80803d60006005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4564 = VCVTUDQ2PSZrr
{ 4565, 3, 1, 0, 0, 0, 0x409803d60006005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #4565 = VCVTUDQ2PSZrrb
{ 4566, 5, 1, 0, 0, 0, 0x409a03d60006005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #4566 = VCVTUDQ2PSZrrbk
{ 4567, 4, 1, 0, 0, 0, 0x409e03d60006005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #4567 = VCVTUDQ2PSZrrbkz
{ 4568, 4, 1, 0, 0, 0, 0x80a03d60006005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4568 = VCVTUDQ2PSZrrk
{ 4569, 3, 1, 0, 0, 0, 0x80e03d60006005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4569 = VCVTUDQ2PSZrrkz
{ 4570, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000bd60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4570 = VCVTUQQ2PDZ128rm
{ 4571, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100bd60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4571 = VCVTUQQ2PDZ128rmb
{ 4572, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120bd60005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4572 = VCVTUQQ2PDZ128rmbk
{ 4573, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160bd60005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4573 = VCVTUQQ2PDZ128rmbkz
{ 4574, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020bd60005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4574 = VCVTUQQ2PDZ128rmk
{ 4575, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060bd60005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4575 = VCVTUQQ2PDZ128rmkz
{ 4576, 2, 1, 0, 0, 0, 0x2000bd60005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4576 = VCVTUQQ2PDZ128rr
{ 4577, 4, 1, 0, 0, 0, 0x2020bd60005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4577 = VCVTUQQ2PDZ128rrk
{ 4578, 3, 1, 0, 0, 0, 0x2060bd60005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4578 = VCVTUQQ2PDZ128rrkz
{ 4579, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008bd60005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4579 = VCVTUQQ2PDZ256rm
{ 4580, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108bd60005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4580 = VCVTUQQ2PDZ256rmb
{ 4581, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128bd60005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4581 = VCVTUQQ2PDZ256rmbk
{ 4582, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168bd60005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4582 = VCVTUQQ2PDZ256rmbkz
{ 4583, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028bd60005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4583 = VCVTUQQ2PDZ256rmk
{ 4584, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068bd60005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4584 = VCVTUQQ2PDZ256rmkz
{ 4585, 2, 1, 0, 0, 0, 0x4008bd60005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4585 = VCVTUQQ2PDZ256rr
{ 4586, 4, 1, 0, 0, 0, 0x4028bd60005805ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #4586 = VCVTUQQ2PDZ256rrk
{ 4587, 3, 1, 0, 0, 0, 0x4068bd60005805ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #4587 = VCVTUQQ2PDZ256rrkz
{ 4588, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080bd60005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4588 = VCVTUQQ2PDZrm
{ 4589, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180bd60005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4589 = VCVTUQQ2PDZrmb
{ 4590, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0bd60005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4590 = VCVTUQQ2PDZrmbk
{ 4591, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0bd60005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4591 = VCVTUQQ2PDZrmbkz
{ 4592, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0bd60005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4592 = VCVTUQQ2PDZrmk
{ 4593, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0bd60005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4593 = VCVTUQQ2PDZrmkz
{ 4594, 2, 1, 0, 0, 0, 0x8080bd60005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4594 = VCVTUQQ2PDZrr
{ 4595, 3, 1, 0, 0, 0, 0x41180bd60005805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #4595 = VCVTUQQ2PDZrrb
{ 4596, 5, 1, 0, 0, 0, 0x411a0bd60005805ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #4596 = VCVTUQQ2PDZrrbk
{ 4597, 4, 1, 0, 0, 0, 0x411e0bd60005805ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #4597 = VCVTUQQ2PDZrrbkz
{ 4598, 4, 1, 0, 0, 0, 0x80a0bd60005805ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4598 = VCVTUQQ2PDZrrk
{ 4599, 3, 1, 0, 0, 0, 0x80e0bd60005805ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4599 = VCVTUQQ2PDZrrkz
{ 4600, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000bd60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4600 = VCVTUQQ2PSZ128rm
{ 4601, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100bd60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4601 = VCVTUQQ2PSZ128rmb
{ 4602, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120bd60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4602 = VCVTUQQ2PSZ128rmbk
{ 4603, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160bd60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4603 = VCVTUQQ2PSZ128rmbkz
{ 4604, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020bd60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4604 = VCVTUQQ2PSZ128rmk
{ 4605, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060bd60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4605 = VCVTUQQ2PSZ128rmkz
{ 4606, 2, 1, 0, 0, 0, 0x2000bd60006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4606 = VCVTUQQ2PSZ128rr
{ 4607, 4, 1, 0, 0, 0, 0x2020bd60006005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4607 = VCVTUQQ2PSZ128rrk
{ 4608, 3, 1, 0, 0, 0, 0x2060bd60006005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4608 = VCVTUQQ2PSZ128rrkz
{ 4609, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008bd60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4609 = VCVTUQQ2PSZ256rm
{ 4610, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108bd60006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4610 = VCVTUQQ2PSZ256rmb
{ 4611, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128bd60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4611 = VCVTUQQ2PSZ256rmbk
{ 4612, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168bd60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4612 = VCVTUQQ2PSZ256rmbkz
{ 4613, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028bd60006006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4613 = VCVTUQQ2PSZ256rmk
{ 4614, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068bd60006006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4614 = VCVTUQQ2PSZ256rmkz
{ 4615, 2, 1, 0, 0, 0, 0x4008bd60006005ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #4615 = VCVTUQQ2PSZ256rr
{ 4616, 4, 1, 0, 0, 0, 0x4028bd60006005ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #4616 = VCVTUQQ2PSZ256rrk
{ 4617, 3, 1, 0, 0, 0, 0x4068bd60006005ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #4617 = VCVTUQQ2PSZ256rrkz
{ 4618, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080bd60006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4618 = VCVTUQQ2PSZrm
{ 4619, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180bd60006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4619 = VCVTUQQ2PSZrmb
{ 4620, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0bd60006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4620 = VCVTUQQ2PSZrmbk
{ 4621, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0bd60006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4621 = VCVTUQQ2PSZrmbkz
{ 4622, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0bd60006006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4622 = VCVTUQQ2PSZrmk
{ 4623, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0bd60006006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4623 = VCVTUQQ2PSZrmkz
{ 4624, 2, 1, 0, 0, 0, 0x8080bd60006005ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #4624 = VCVTUQQ2PSZrr
{ 4625, 3, 1, 0, 0, 0, 0x41180bd60006005ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #4625 = VCVTUQQ2PSZrrb
{ 4626, 5, 1, 0, 0, 0, 0x411a0bd60006005ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr }, // Inst #4626 = VCVTUQQ2PSZrrbk
{ 4627, 4, 1, 0, 0, 0, 0x411e0bd60006005ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr }, // Inst #4627 = VCVTUQQ2PSZrrbkz
{ 4628, 4, 1, 0, 0, 0, 0x80a0bd60006005ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #4628 = VCVTUQQ2PSZrrk
{ 4629, 3, 1, 0, 0, 0, 0x80e0bd60006005ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #4629 = VCVTUQQ2PSZrrkz
{ 4630, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8113de0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #4630 = VCVTUSI2SDZrm
{ 4631, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8113de0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4631 = VCVTUSI2SDZrm_Int
{ 4632, 3, 1, 0, 0, 0, 0x8113de0006005ULL, nullptr, nullptr, OperandInfo490, -1 ,nullptr }, // Inst #4632 = VCVTUSI2SDZrr
{ 4633, 3, 1, 0, 0, 0, 0x8113de0006005ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, // Inst #4633 = VCVTUSI2SDZrr_Int
{ 4634, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8113de0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #4634 = VCVTUSI2SSZrm
{ 4635, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8113de0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4635 = VCVTUSI2SSZrm_Int
{ 4636, 3, 1, 0, 0, 0, 0x8113de0005805ULL, nullptr, nullptr, OperandInfo494, -1 ,nullptr }, // Inst #4636 = VCVTUSI2SSZrr
{ 4637, 3, 1, 0, 0, 0, 0x8113de0005805ULL, nullptr, nullptr, OperandInfo160, -1 ,nullptr }, // Inst #4637 = VCVTUSI2SSZrr_Int
{ 4638, 4, 1, 0, 0, 0, 0x409113de0005805ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr }, // Inst #4638 = VCVTUSI2SSZrrb_Int
{ 4639, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011bde0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #4639 = VCVTUSI642SDZrm
{ 4640, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011bde0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4640 = VCVTUSI642SDZrm_Int
{ 4641, 3, 1, 0, 0, 0, 0x1011bde0006005ULL, nullptr, nullptr, OperandInfo496, -1 ,nullptr }, // Inst #4641 = VCVTUSI642SDZrr
{ 4642, 3, 1, 0, 0, 0, 0x1011bde0006005ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr }, // Inst #4642 = VCVTUSI642SDZrr_Int
{ 4643, 4, 1, 0, 0, 0, 0x41111bde0006005ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4643 = VCVTUSI642SDZrrb_Int
{ 4644, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011bde0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #4644 = VCVTUSI642SSZrm
{ 4645, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011bde0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4645 = VCVTUSI642SSZrm_Int
{ 4646, 3, 1, 0, 0, 0, 0x1011bde0005805ULL, nullptr, nullptr, OperandInfo498, -1 ,nullptr }, // Inst #4646 = VCVTUSI642SSZrr
{ 4647, 3, 1, 0, 0, 0, 0x1011bde0005805ULL, nullptr, nullptr, OperandInfo158, -1 ,nullptr }, // Inst #4647 = VCVTUSI642SSZrr_Int
{ 4648, 4, 1, 0, 0, 0, 0x41111bde0005805ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #4648 = VCVTUSI642SSZrrb_Int
{ 4649, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001217804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #4649 = VDBPSADBWZ128rmi
{ 4650, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021217804d006ULL, nullptr, nullptr, OperandInfo505, -1 ,nullptr }, // Inst #4650 = VDBPSADBWZ128rmik
{ 4651, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061217804d006ULL, nullptr, nullptr, OperandInfo506, -1 ,nullptr }, // Inst #4651 = VDBPSADBWZ128rmikz
{ 4652, 4, 1, 0, 0, 0, 0x2001217804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #4652 = VDBPSADBWZ128rri
{ 4653, 6, 1, 0, 0, 0, 0x2021217804d005ULL, nullptr, nullptr, OperandInfo507, -1 ,nullptr }, // Inst #4653 = VDBPSADBWZ128rrik
{ 4654, 5, 1, 0, 0, 0, 0x2061217804d005ULL, nullptr, nullptr, OperandInfo508, -1 ,nullptr }, // Inst #4654 = VDBPSADBWZ128rrikz
{ 4655, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009217804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #4655 = VDBPSADBWZ256rmi
{ 4656, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029217804d006ULL, nullptr, nullptr, OperandInfo509, -1 ,nullptr }, // Inst #4656 = VDBPSADBWZ256rmik
{ 4657, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069217804d006ULL, nullptr, nullptr, OperandInfo510, -1 ,nullptr }, // Inst #4657 = VDBPSADBWZ256rmikz
{ 4658, 4, 1, 0, 0, 0, 0x4009217804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #4658 = VDBPSADBWZ256rri
{ 4659, 6, 1, 0, 0, 0, 0x4029217804d005ULL, nullptr, nullptr, OperandInfo511, -1 ,nullptr }, // Inst #4659 = VDBPSADBWZ256rrik
{ 4660, 5, 1, 0, 0, 0, 0x4069217804d005ULL, nullptr, nullptr, OperandInfo512, -1 ,nullptr }, // Inst #4660 = VDBPSADBWZ256rrikz
{ 4661, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081217804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #4661 = VDBPSADBWZrmi
{ 4662, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1217804d006ULL, nullptr, nullptr, OperandInfo513, -1 ,nullptr }, // Inst #4662 = VDBPSADBWZrmik
{ 4663, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1217804d006ULL, nullptr, nullptr, OperandInfo514, -1 ,nullptr }, // Inst #4663 = VDBPSADBWZrmikz
{ 4664, 4, 1, 0, 0, 0, 0x8081217804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #4664 = VDBPSADBWZrri
{ 4665, 6, 1, 0, 0, 0, 0x80a1217804d005ULL, nullptr, nullptr, OperandInfo515, -1 ,nullptr }, // Inst #4665 = VDBPSADBWZrrik
{ 4666, 5, 1, 0, 0, 0, 0x80e1217804d005ULL, nullptr, nullptr, OperandInfo516, -1 ,nullptr }, // Inst #4666 = VDBPSADBWZrrikz
{ 4667, 7, 1, 0, 913, 0|(1ULL<<MCID::MayLoad), 0x92f30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #4667 = VDIVPDYrm
{ 4668, 3, 1, 0, 912, 0, 0x92f30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #4668 = VDIVPDYrr
{ 4669, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001af60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4669 = VDIVPDZ128rm
{ 4670, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101af60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4670 = VDIVPDZ128rmb
{ 4671, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121af60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #4671 = VDIVPDZ128rmbk
{ 4672, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161af60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #4672 = VDIVPDZ128rmbkz
{ 4673, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021af60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #4673 = VDIVPDZ128rmk
{ 4674, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061af60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #4674 = VDIVPDZ128rmkz
{ 4675, 3, 1, 0, 0, 0, 0x2001af60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #4675 = VDIVPDZ128rr
{ 4676, 5, 1, 0, 0, 0, 0x2021af60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #4676 = VDIVPDZ128rrk
{ 4677, 4, 1, 0, 0, 0, 0x2061af60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #4677 = VDIVPDZ128rrkz
{ 4678, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009af60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #4678 = VDIVPDZ256rm
{ 4679, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109af60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #4679 = VDIVPDZ256rmb
{ 4680, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129af60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #4680 = VDIVPDZ256rmbk
{ 4681, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169af60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #4681 = VDIVPDZ256rmbkz
{ 4682, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029af60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #4682 = VDIVPDZ256rmk
{ 4683, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069af60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #4683 = VDIVPDZ256rmkz
{ 4684, 3, 1, 0, 0, 0, 0x4009af60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #4684 = VDIVPDZ256rr
{ 4685, 5, 1, 0, 0, 0, 0x4029af60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #4685 = VDIVPDZ256rrk
{ 4686, 4, 1, 0, 0, 0, 0x4069af60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #4686 = VDIVPDZ256rrkz
{ 4687, 4, 1, 0, 0, 0, 0x41181af60005005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #4687 = VDIVPDZrb
{ 4688, 6, 1, 0, 0, 0, 0x411a1af60005005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #4688 = VDIVPDZrbk
{ 4689, 5, 1, 0, 0, 0, 0x411e1af60005005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #4689 = VDIVPDZrbkz
{ 4690, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081af60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #4690 = VDIVPDZrm
{ 4691, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181af60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #4691 = VDIVPDZrmb
{ 4692, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1af60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #4692 = VDIVPDZrmbk
{ 4693, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1af60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #4693 = VDIVPDZrmbkz
{ 4694, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1af60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #4694 = VDIVPDZrmk
{ 4695, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1af60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #4695 = VDIVPDZrmkz
{ 4696, 3, 1, 0, 0, 0, 0x8081af60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #4696 = VDIVPDZrr
{ 4697, 5, 1, 0, 0, 0, 0x80a1af60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #4697 = VDIVPDZrrk
{ 4698, 4, 1, 0, 0, 0, 0x80e1af60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #4698 = VDIVPDZrrkz
{ 4699, 7, 1, 0, 113, 0|(1ULL<<MCID::MayLoad), 0x12f30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #4699 = VDIVPDrm
{ 4700, 3, 1, 0, 114, 0, 0x12f30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #4700 = VDIVPDrr
{ 4701, 7, 1, 0, 911, 0|(1ULL<<MCID::MayLoad), 0x92f28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #4701 = VDIVPSYrm
{ 4702, 3, 1, 0, 910, 0, 0x92f28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #4702 = VDIVPSYrr
{ 4703, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012f60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4703 = VDIVPSZ128rm
{ 4704, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012f60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4704 = VDIVPSZ128rmb
{ 4705, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212f60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #4705 = VDIVPSZ128rmbk
{ 4706, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612f60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #4706 = VDIVPSZ128rmbkz
{ 4707, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212f60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #4707 = VDIVPSZ128rmk
{ 4708, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612f60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #4708 = VDIVPSZ128rmkz
{ 4709, 3, 1, 0, 0, 0, 0x20012f60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #4709 = VDIVPSZ128rr
{ 4710, 5, 1, 0, 0, 0, 0x20212f60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #4710 = VDIVPSZ128rrk
{ 4711, 4, 1, 0, 0, 0, 0x20612f60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #4711 = VDIVPSZ128rrkz
{ 4712, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092f60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #4712 = VDIVPSZ256rm
{ 4713, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092f60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #4713 = VDIVPSZ256rmb
{ 4714, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292f60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #4714 = VDIVPSZ256rmbk
{ 4715, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692f60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #4715 = VDIVPSZ256rmbkz
{ 4716, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292f60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #4716 = VDIVPSZ256rmk
{ 4717, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692f60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #4717 = VDIVPSZ256rmkz
{ 4718, 3, 1, 0, 0, 0, 0x40092f60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #4718 = VDIVPSZ256rr
{ 4719, 5, 1, 0, 0, 0, 0x40292f60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #4719 = VDIVPSZ256rrk
{ 4720, 4, 1, 0, 0, 0, 0x40692f60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #4720 = VDIVPSZ256rrkz
{ 4721, 4, 1, 0, 0, 0, 0x409812f60004805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #4721 = VDIVPSZrb
{ 4722, 6, 1, 0, 0, 0, 0x409a12f60004805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #4722 = VDIVPSZrbk
{ 4723, 5, 1, 0, 0, 0, 0x409e12f60004805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #4723 = VDIVPSZrbkz
{ 4724, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812f60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #4724 = VDIVPSZrm
{ 4725, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812f60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #4725 = VDIVPSZrmb
{ 4726, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12f60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #4726 = VDIVPSZrmbk
{ 4727, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12f60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #4727 = VDIVPSZrmbkz
{ 4728, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12f60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #4728 = VDIVPSZrmk
{ 4729, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12f60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #4729 = VDIVPSZrmkz
{ 4730, 3, 1, 0, 0, 0, 0x80812f60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #4730 = VDIVPSZrr
{ 4731, 5, 1, 0, 0, 0, 0x80a12f60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #4731 = VDIVPSZrrk
{ 4732, 4, 1, 0, 0, 0, 0x80e12f60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #4732 = VDIVPSZrrkz
{ 4733, 7, 1, 0, 113, 0|(1ULL<<MCID::MayLoad), 0x12f28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #4733 = VDIVPSrm
{ 4734, 3, 1, 0, 115, 0, 0x12f28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #4734 = VDIVPSrr
{ 4735, 7, 1, 0, 525, 0|(1ULL<<MCID::MayLoad), 0x1011af60006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #4735 = VDIVSDZrm
{ 4736, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011af60006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4736 = VDIVSDZrm_Int
{ 4737, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031af60006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #4737 = VDIVSDZrm_Intk
{ 4738, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071af60006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #4738 = VDIVSDZrm_Intkz
{ 4739, 3, 1, 0, 525, 0, 0x1011af60006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr }, // Inst #4739 = VDIVSDZrr
{ 4740, 3, 1, 0, 0, 0, 0x1011af60006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #4740 = VDIVSDZrr_Int
{ 4741, 5, 1, 0, 0, 0, 0x1031af60006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #4741 = VDIVSDZrr_Intk
{ 4742, 4, 1, 0, 0, 0, 0x1071af60006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #4742 = VDIVSDZrr_Intkz
{ 4743, 4, 1, 0, 0, 0, 0x41111af60006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #4743 = VDIVSDZrrb
{ 4744, 6, 1, 0, 0, 0, 0x41131af60006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4744 = VDIVSDZrrbk
{ 4745, 5, 1, 0, 0, 0, 0x41171af60006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #4745 = VDIVSDZrrbkz
{ 4746, 7, 1, 0, 118, 0|(1ULL<<MCID::MayLoad), 0x112f30006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #4746 = VDIVSDrm
{ 4747, 7, 1, 0, 118, 0|(1ULL<<MCID::MayLoad), 0x112f30006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #4747 = VDIVSDrm_Int
{ 4748, 3, 1, 0, 119, 0, 0x112f30006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #4748 = VDIVSDrr
{ 4749, 3, 1, 0, 119, 0, 0x112f30006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #4749 = VDIVSDrr_Int
{ 4750, 7, 1, 0, 526, 0|(1ULL<<MCID::MayLoad), 0x8112f60005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #4750 = VDIVSSZrm
{ 4751, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8112f60005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #4751 = VDIVSSZrm_Int
{ 4752, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8312f60005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #4752 = VDIVSSZrm_Intk
{ 4753, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8712f60005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #4753 = VDIVSSZrm_Intkz
{ 4754, 3, 1, 0, 526, 0, 0x8112f60005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr }, // Inst #4754 = VDIVSSZrr
{ 4755, 3, 1, 0, 0, 0, 0x8112f60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #4755 = VDIVSSZrr_Int
{ 4756, 5, 1, 0, 0, 0, 0x8312f60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #4756 = VDIVSSZrr_Intk
{ 4757, 4, 1, 0, 0, 0, 0x8712f60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #4757 = VDIVSSZrr_Intkz
{ 4758, 4, 1, 0, 0, 0, 0x409112f60005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #4758 = VDIVSSZrrb
{ 4759, 6, 1, 0, 0, 0, 0x409312f60005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4759 = VDIVSSZrrbk
{ 4760, 5, 1, 0, 0, 0, 0x409712f60005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #4760 = VDIVSSZrrbkz
{ 4761, 7, 1, 0, 118, 0|(1ULL<<MCID::MayLoad), 0x112f28005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #4761 = VDIVSSrm
{ 4762, 7, 1, 0, 118, 0|(1ULL<<MCID::MayLoad), 0x112f28005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #4762 = VDIVSSrm_Int
{ 4763, 3, 1, 0, 120, 0, 0x112f28005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #4763 = VDIVSSrr
{ 4764, 3, 1, 0, 120, 0, 0x112f28005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #4764 = VDIVSSrr_Int
{ 4765, 8, 1, 0, 925, 0|(1ULL<<MCID::MayLoad), 0x120b004d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #4765 = VDPPDrmi
{ 4766, 4, 1, 0, 924, 0|(1ULL<<MCID::Commutable), 0x120b004d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #4766 = VDPPDrri
{ 4767, 8, 1, 0, 922, 0|(1ULL<<MCID::MayLoad), 0x9202804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #4767 = VDPPSYrmi
{ 4768, 4, 1, 0, 921, 0|(1ULL<<MCID::Commutable), 0x9202804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #4768 = VDPPSYrri
{ 4769, 8, 1, 0, 922, 0|(1ULL<<MCID::MayLoad), 0x1202804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #4769 = VDPPSrmi
{ 4770, 4, 1, 0, 921, 0|(1ULL<<MCID::Commutable), 0x1202804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #4770 = VDPPSrri
{ 4771, 5, 0, 0, 540, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x401cULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #4771 = VERRm
{ 4772, 1, 0, 0, 540, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4014ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #4772 = VERRr
{ 4773, 5, 0, 0, 541, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x401dULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #4773 = VERWm
{ 4774, 1, 0, 0, 542, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4015ULL, nullptr, nullptr, OperandInfo82, -1 ,nullptr }, // Inst #4774 = VERWr
{ 4775, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080e460009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4775 = VEXP2PDm
{ 4776, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180e460009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4776 = VEXP2PDmb
{ 4777, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0e460009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4777 = VEXP2PDmbk
{ 4778, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0e460009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4778 = VEXP2PDmbkz
{ 4779, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0e460009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4779 = VEXP2PDmk
{ 4780, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0e460009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4780 = VEXP2PDmkz
{ 4781, 2, 1, 0, 0, 0, 0x8080e460009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4781 = VEXP2PDr
{ 4782, 2, 1, 0, 0, 0, 0x1180e460009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4782 = VEXP2PDrb
{ 4783, 4, 1, 0, 0, 0, 0x11a0e460009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4783 = VEXP2PDrbk
{ 4784, 3, 1, 0, 0, 0, 0x11e0e460009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4784 = VEXP2PDrbkz
{ 4785, 4, 1, 0, 0, 0, 0x80a0e460009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4785 = VEXP2PDrk
{ 4786, 3, 1, 0, 0, 0, 0x80e0e460009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4786 = VEXP2PDrkz
{ 4787, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80806460009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4787 = VEXP2PSm
{ 4788, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9806460009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4788 = VEXP2PSmb
{ 4789, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a06460009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4789 = VEXP2PSmbk
{ 4790, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e06460009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4790 = VEXP2PSmbkz
{ 4791, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a06460009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4791 = VEXP2PSmk
{ 4792, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e06460009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4792 = VEXP2PSmkz
{ 4793, 2, 1, 0, 0, 0, 0x80806460009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4793 = VEXP2PSr
{ 4794, 2, 1, 0, 0, 0, 0x9806460009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4794 = VEXP2PSrb
{ 4795, 4, 1, 0, 0, 0, 0x9a06460009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4795 = VEXP2PSrbk
{ 4796, 3, 1, 0, 0, 0, 0x9e06460009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4796 = VEXP2PSrbkz
{ 4797, 4, 1, 0, 0, 0, 0x80a06460009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4797 = VEXP2PSrk
{ 4798, 3, 1, 0, 0, 0, 0x80e06460009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4798 = VEXP2PSrkz
{ 4799, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1000c478009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4799 = VEXPANDPDZ128rm
{ 4800, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1020c478009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #4800 = VEXPANDPDZ128rmk
{ 4801, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1060c478009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #4801 = VEXPANDPDZ128rmkz
{ 4802, 2, 1, 0, 0, 0, 0x2000c478009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4802 = VEXPANDPDZ128rr
{ 4803, 4, 1, 0, 0, 0, 0x2020c478009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #4803 = VEXPANDPDZ128rrk
{ 4804, 3, 1, 0, 0, 0, 0x2060c478009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #4804 = VEXPANDPDZ128rrkz
{ 4805, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1008c478009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4805 = VEXPANDPDZ256rm
{ 4806, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1028c478009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #4806 = VEXPANDPDZ256rmk
{ 4807, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1068c478009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #4807 = VEXPANDPDZ256rmkz
{ 4808, 2, 1, 0, 0, 0, 0x4008c478009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4808 = VEXPANDPDZ256rr
{ 4809, 4, 1, 0, 0, 0, 0x4028c478009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #4809 = VEXPANDPDZ256rrk
{ 4810, 3, 1, 0, 0, 0, 0x4068c478009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #4810 = VEXPANDPDZ256rrkz
{ 4811, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1080c478009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4811 = VEXPANDPDZrm
{ 4812, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a0c478009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #4812 = VEXPANDPDZrmk
{ 4813, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10e0c478009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #4813 = VEXPANDPDZrmkz
{ 4814, 2, 1, 0, 0, 0, 0x8080c478009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4814 = VEXPANDPDZrr
{ 4815, 4, 1, 0, 0, 0, 0x80a0c478009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #4815 = VEXPANDPDZrrk
{ 4816, 3, 1, 0, 0, 0, 0x80e0c478009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #4816 = VEXPANDPDZrrkz
{ 4817, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8004478009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #4817 = VEXPANDPSZ128rm
{ 4818, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8204478009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #4818 = VEXPANDPSZ128rmk
{ 4819, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8604478009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #4819 = VEXPANDPSZ128rmkz
{ 4820, 2, 1, 0, 0, 0, 0x20004478009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #4820 = VEXPANDPSZ128rr
{ 4821, 4, 1, 0, 0, 0, 0x20204478009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #4821 = VEXPANDPSZ128rrk
{ 4822, 3, 1, 0, 0, 0, 0x20604478009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #4822 = VEXPANDPSZ128rrkz
{ 4823, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8084478009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #4823 = VEXPANDPSZ256rm
{ 4824, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8284478009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #4824 = VEXPANDPSZ256rmk
{ 4825, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8684478009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #4825 = VEXPANDPSZ256rmkz
{ 4826, 2, 1, 0, 0, 0, 0x40084478009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #4826 = VEXPANDPSZ256rr
{ 4827, 4, 1, 0, 0, 0, 0x40284478009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #4827 = VEXPANDPSZ256rrk
{ 4828, 3, 1, 0, 0, 0, 0x40684478009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #4828 = VEXPANDPSZ256rrkz
{ 4829, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8804478009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #4829 = VEXPANDPSZrm
{ 4830, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8a04478009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #4830 = VEXPANDPSZrmk
{ 4831, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8e04478009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #4831 = VEXPANDPSZrmkz
{ 4832, 2, 1, 0, 0, 0, 0x80804478009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #4832 = VEXPANDPSZrr
{ 4833, 4, 1, 0, 0, 0, 0x80a04478009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #4833 = VEXPANDPSZrrk
{ 4834, 3, 1, 0, 0, 0, 0x80e04478009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #4834 = VEXPANDPSZrrkz
{ 4835, 7, 0, 0, 851, 0|(1ULL<<MCID::MayStore), 0x80ca804d004ULL, nullptr, nullptr, OperandInfo464, -1 ,nullptr }, // Inst #4835 = VEXTRACTF128mr
{ 4836, 3, 1, 0, 850, 0, 0x80ca804d003ULL, nullptr, nullptr, OperandInfo465, -1 ,nullptr }, // Inst #4836 = VEXTRACTF128rr
{ 4837, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20080ce804d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr }, // Inst #4837 = VEXTRACTF32x4Z256rm
{ 4838, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20280ce804d004ULL, nullptr, nullptr, OperandInfo517, -1 ,nullptr }, // Inst #4838 = VEXTRACTF32x4Z256rmk
{ 4839, 3, 1, 0, 0, 0, 0x20080ce804d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #4839 = VEXTRACTF32x4Z256rr
{ 4840, 5, 1, 0, 0, 0, 0x20280ce804d003ULL, nullptr, nullptr, OperandInfo518, -1 ,nullptr }, // Inst #4840 = VEXTRACTF32x4Z256rrk
{ 4841, 4, 1, 0, 0, 0, 0x20680ce804d003ULL, nullptr, nullptr, OperandInfo519, -1 ,nullptr }, // Inst #4841 = VEXTRACTF32x4Z256rrkz
{ 4842, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20800ce804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #4842 = VEXTRACTF32x4Zrm
{ 4843, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20a00ce804d004ULL, nullptr, nullptr, OperandInfo520, -1 ,nullptr }, // Inst #4843 = VEXTRACTF32x4Zrmk
{ 4844, 3, 1, 0, 0, 0, 0x20800ce804d003ULL, nullptr, nullptr, OperandInfo521, -1 ,nullptr }, // Inst #4844 = VEXTRACTF32x4Zrr
{ 4845, 5, 1, 0, 0, 0, 0x20a00ce804d003ULL, nullptr, nullptr, OperandInfo522, -1 ,nullptr }, // Inst #4845 = VEXTRACTF32x4Zrrk
{ 4846, 4, 1, 0, 0, 0, 0x20e00ce804d003ULL, nullptr, nullptr, OperandInfo523, -1 ,nullptr }, // Inst #4846 = VEXTRACTF32x4Zrrkz
{ 4847, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40800de804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #4847 = VEXTRACTF32x8Zrm
{ 4848, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40a00de804d004ULL, nullptr, nullptr, OperandInfo524, -1 ,nullptr }, // Inst #4848 = VEXTRACTF32x8Zrmk
{ 4849, 3, 1, 0, 0, 0, 0x40800de804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #4849 = VEXTRACTF32x8Zrr
{ 4850, 5, 1, 0, 0, 0, 0x40a00de804d003ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr }, // Inst #4850 = VEXTRACTF32x8Zrrk
{ 4851, 4, 1, 0, 0, 0, 0x40e00de804d003ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr }, // Inst #4851 = VEXTRACTF32x8Zrrkz
{ 4852, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20088cf004d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr }, // Inst #4852 = VEXTRACTF64x2Z256rm
{ 4853, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20288cf004d004ULL, nullptr, nullptr, OperandInfo525, -1 ,nullptr }, // Inst #4853 = VEXTRACTF64x2Z256rmk
{ 4854, 3, 1, 0, 0, 0, 0x20088cf004d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #4854 = VEXTRACTF64x2Z256rr
{ 4855, 5, 1, 0, 0, 0, 0x20288cf004d003ULL, nullptr, nullptr, OperandInfo526, -1 ,nullptr }, // Inst #4855 = VEXTRACTF64x2Z256rrk
{ 4856, 4, 1, 0, 0, 0, 0x20688cf004d003ULL, nullptr, nullptr, OperandInfo527, -1 ,nullptr }, // Inst #4856 = VEXTRACTF64x2Z256rrkz
{ 4857, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20808cf004d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #4857 = VEXTRACTF64x2Zrm
{ 4858, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20a08cf004d004ULL, nullptr, nullptr, OperandInfo528, -1 ,nullptr }, // Inst #4858 = VEXTRACTF64x2Zrmk
{ 4859, 3, 1, 0, 0, 0, 0x20808cf004d003ULL, nullptr, nullptr, OperandInfo521, -1 ,nullptr }, // Inst #4859 = VEXTRACTF64x2Zrr
{ 4860, 5, 1, 0, 0, 0, 0x20a08cf004d003ULL, nullptr, nullptr, OperandInfo529, -1 ,nullptr }, // Inst #4860 = VEXTRACTF64x2Zrrk
{ 4861, 4, 1, 0, 0, 0, 0x20e08cf004d003ULL, nullptr, nullptr, OperandInfo530, -1 ,nullptr }, // Inst #4861 = VEXTRACTF64x2Zrrkz
{ 4862, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40808df004d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #4862 = VEXTRACTF64x4Zrm
{ 4863, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40a08df004d004ULL, nullptr, nullptr, OperandInfo520, -1 ,nullptr }, // Inst #4863 = VEXTRACTF64x4Zrmk
{ 4864, 3, 1, 0, 0, 0, 0x40808df004d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #4864 = VEXTRACTF64x4Zrr
{ 4865, 5, 1, 0, 0, 0, 0x40a08df004d003ULL, nullptr, nullptr, OperandInfo531, -1 ,nullptr }, // Inst #4865 = VEXTRACTF64x4Zrrk
{ 4866, 4, 1, 0, 0, 0, 0x40e08df004d003ULL, nullptr, nullptr, OperandInfo532, -1 ,nullptr }, // Inst #4866 = VEXTRACTF64x4Zrrkz
{ 4867, 7, 0, 0, 543, 0|(1ULL<<MCID::MayStore), 0x81cb804d004ULL, nullptr, nullptr, OperandInfo464, -1 ,nullptr }, // Inst #4867 = VEXTRACTI128mr
{ 4868, 3, 1, 0, 544, 0, 0x81cb804d003ULL, nullptr, nullptr, OperandInfo465, -1 ,nullptr }, // Inst #4868 = VEXTRACTI128rr
{ 4869, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20081cf804d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr }, // Inst #4869 = VEXTRACTI32x4Z256rm
{ 4870, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20281cf804d004ULL, nullptr, nullptr, OperandInfo517, -1 ,nullptr }, // Inst #4870 = VEXTRACTI32x4Z256rmk
{ 4871, 3, 1, 0, 0, 0, 0x20081cf804d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #4871 = VEXTRACTI32x4Z256rr
{ 4872, 5, 1, 0, 0, 0, 0x20281cf804d003ULL, nullptr, nullptr, OperandInfo518, -1 ,nullptr }, // Inst #4872 = VEXTRACTI32x4Z256rrk
{ 4873, 4, 1, 0, 0, 0, 0x20681cf804d003ULL, nullptr, nullptr, OperandInfo519, -1 ,nullptr }, // Inst #4873 = VEXTRACTI32x4Z256rrkz
{ 4874, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20801cf804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #4874 = VEXTRACTI32x4Zrm
{ 4875, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20a01cf804d004ULL, nullptr, nullptr, OperandInfo520, -1 ,nullptr }, // Inst #4875 = VEXTRACTI32x4Zrmk
{ 4876, 3, 1, 0, 0, 0, 0x20801cf804d003ULL, nullptr, nullptr, OperandInfo521, -1 ,nullptr }, // Inst #4876 = VEXTRACTI32x4Zrr
{ 4877, 5, 1, 0, 0, 0, 0x20a01cf804d003ULL, nullptr, nullptr, OperandInfo522, -1 ,nullptr }, // Inst #4877 = VEXTRACTI32x4Zrrk
{ 4878, 4, 1, 0, 0, 0, 0x20e01cf804d003ULL, nullptr, nullptr, OperandInfo523, -1 ,nullptr }, // Inst #4878 = VEXTRACTI32x4Zrrkz
{ 4879, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40801df804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #4879 = VEXTRACTI32x8Zrm
{ 4880, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40a01df804d004ULL, nullptr, nullptr, OperandInfo524, -1 ,nullptr }, // Inst #4880 = VEXTRACTI32x8Zrmk
{ 4881, 3, 1, 0, 0, 0, 0x40801df804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #4881 = VEXTRACTI32x8Zrr
{ 4882, 5, 1, 0, 0, 0, 0x40a01df804d003ULL, nullptr, nullptr, OperandInfo456, -1 ,nullptr }, // Inst #4882 = VEXTRACTI32x8Zrrk
{ 4883, 4, 1, 0, 0, 0, 0x40e01df804d003ULL, nullptr, nullptr, OperandInfo457, -1 ,nullptr }, // Inst #4883 = VEXTRACTI32x8Zrrkz
{ 4884, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20089cf804d004ULL, nullptr, nullptr, OperandInfo471, -1 ,nullptr }, // Inst #4884 = VEXTRACTI64x2Z256rm
{ 4885, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20289cf804d004ULL, nullptr, nullptr, OperandInfo525, -1 ,nullptr }, // Inst #4885 = VEXTRACTI64x2Z256rmk
{ 4886, 3, 1, 0, 0, 0, 0x20089cf804d003ULL, nullptr, nullptr, OperandInfo473, -1 ,nullptr }, // Inst #4886 = VEXTRACTI64x2Z256rr
{ 4887, 5, 1, 0, 0, 0, 0x20289cf804d003ULL, nullptr, nullptr, OperandInfo526, -1 ,nullptr }, // Inst #4887 = VEXTRACTI64x2Z256rrk
{ 4888, 4, 1, 0, 0, 0, 0x20689cf804d003ULL, nullptr, nullptr, OperandInfo527, -1 ,nullptr }, // Inst #4888 = VEXTRACTI64x2Z256rrkz
{ 4889, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20809cf804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #4889 = VEXTRACTI64x2Zrm
{ 4890, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20a09cf804d004ULL, nullptr, nullptr, OperandInfo528, -1 ,nullptr }, // Inst #4890 = VEXTRACTI64x2Zrmk
{ 4891, 3, 1, 0, 0, 0, 0x20809cf804d003ULL, nullptr, nullptr, OperandInfo521, -1 ,nullptr }, // Inst #4891 = VEXTRACTI64x2Zrr
{ 4892, 5, 1, 0, 0, 0, 0x20a09cf804d003ULL, nullptr, nullptr, OperandInfo529, -1 ,nullptr }, // Inst #4892 = VEXTRACTI64x2Zrrk
{ 4893, 4, 1, 0, 0, 0, 0x20e09cf804d003ULL, nullptr, nullptr, OperandInfo530, -1 ,nullptr }, // Inst #4893 = VEXTRACTI64x2Zrrkz
{ 4894, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40809df804d004ULL, nullptr, nullptr, OperandInfo476, -1 ,nullptr }, // Inst #4894 = VEXTRACTI64x4Zrm
{ 4895, 8, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40a09df804d004ULL, nullptr, nullptr, OperandInfo520, -1 ,nullptr }, // Inst #4895 = VEXTRACTI64x4Zrmk
{ 4896, 3, 1, 0, 0, 0, 0x40809df804d003ULL, nullptr, nullptr, OperandInfo455, -1 ,nullptr }, // Inst #4896 = VEXTRACTI64x4Zrr
{ 4897, 5, 1, 0, 0, 0, 0x40a09df804d003ULL, nullptr, nullptr, OperandInfo531, -1 ,nullptr }, // Inst #4897 = VEXTRACTI64x4Zrrk
{ 4898, 4, 1, 0, 0, 0, 0x40e09df804d003ULL, nullptr, nullptr, OperandInfo532, -1 ,nullptr }, // Inst #4898 = VEXTRACTI64x4Zrrkz
{ 4899, 7, 0, 0, 849, 0|(1ULL<<MCID::MayStore), 0xba804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #4899 = VEXTRACTPSmr
{ 4900, 3, 1, 0, 847, 0, 0xba804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #4900 = VEXTRACTPSrr
{ 4901, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8000bf804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr }, // Inst #4901 = VEXTRACTPSzmr
{ 4902, 3, 1, 0, 0, 0, 0x20000bf804d003ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #4902 = VEXTRACTPSzrr
{ 4903, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101aa7804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #4903 = VFIXUPIMMPDZ128rmbi
{ 4904, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121aa7804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #4904 = VFIXUPIMMPDZ128rmbik
{ 4905, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161aa7804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #4905 = VFIXUPIMMPDZ128rmbikz
{ 4906, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001aa7804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #4906 = VFIXUPIMMPDZ128rmi
{ 4907, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021aa7804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #4907 = VFIXUPIMMPDZ128rmik
{ 4908, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061aa7804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #4908 = VFIXUPIMMPDZ128rmikz
{ 4909, 5, 1, 0, 0, 0, 0x2001aa7804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #4909 = VFIXUPIMMPDZ128rri
{ 4910, 6, 1, 0, 0, 0, 0x2021aa7804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr }, // Inst #4910 = VFIXUPIMMPDZ128rrik
{ 4911, 6, 1, 0, 0, 0, 0x2061aa7804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr }, // Inst #4911 = VFIXUPIMMPDZ128rrikz
{ 4912, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109aa7804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr }, // Inst #4912 = VFIXUPIMMPDZ256rmbi
{ 4913, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129aa7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #4913 = VFIXUPIMMPDZ256rmbik
{ 4914, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169aa7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #4914 = VFIXUPIMMPDZ256rmbikz
{ 4915, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009aa7804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr }, // Inst #4915 = VFIXUPIMMPDZ256rmi
{ 4916, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029aa7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #4916 = VFIXUPIMMPDZ256rmik
{ 4917, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069aa7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #4917 = VFIXUPIMMPDZ256rmikz
{ 4918, 5, 1, 0, 0, 0, 0x4009aa7804d005ULL, nullptr, nullptr, OperandInfo536, -1 ,nullptr }, // Inst #4918 = VFIXUPIMMPDZ256rri
{ 4919, 6, 1, 0, 0, 0, 0x4029aa7804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #4919 = VFIXUPIMMPDZ256rrik
{ 4920, 6, 1, 0, 0, 0, 0x4069aa7804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #4920 = VFIXUPIMMPDZ256rrikz
{ 4921, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181aa7804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr }, // Inst #4921 = VFIXUPIMMPDZrmbi
{ 4922, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1aa7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #4922 = VFIXUPIMMPDZrmbik
{ 4923, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1aa7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #4923 = VFIXUPIMMPDZrmbikz
{ 4924, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081aa7804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr }, // Inst #4924 = VFIXUPIMMPDZrmi
{ 4925, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1aa7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #4925 = VFIXUPIMMPDZrmik
{ 4926, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1aa7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #4926 = VFIXUPIMMPDZrmikz
{ 4927, 5, 1, 0, 0, 0, 0x8081aa7804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #4927 = VFIXUPIMMPDZrri
{ 4928, 5, 1, 0, 0, 0, 0x1181aa7804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #4928 = VFIXUPIMMPDZrrib
{ 4929, 6, 1, 0, 0, 0, 0x11a1aa7804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #4929 = VFIXUPIMMPDZrribk
{ 4930, 6, 1, 0, 0, 0, 0x11e1aa7804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #4930 = VFIXUPIMMPDZrribkz
{ 4931, 6, 1, 0, 0, 0, 0x80a1aa7804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #4931 = VFIXUPIMMPDZrrik
{ 4932, 6, 1, 0, 0, 0, 0x80e1aa7804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #4932 = VFIXUPIMMPDZrrikz
{ 4933, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012a7804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #4933 = VFIXUPIMMPSZ128rmbi
{ 4934, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212a7804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #4934 = VFIXUPIMMPSZ128rmbik
{ 4935, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612a7804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #4935 = VFIXUPIMMPSZ128rmbikz
{ 4936, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012a7804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #4936 = VFIXUPIMMPSZ128rmi
{ 4937, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212a7804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #4937 = VFIXUPIMMPSZ128rmik
{ 4938, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612a7804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #4938 = VFIXUPIMMPSZ128rmikz
{ 4939, 5, 1, 0, 0, 0, 0x20012a7804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #4939 = VFIXUPIMMPSZ128rri
{ 4940, 6, 1, 0, 0, 0, 0x20212a7804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr }, // Inst #4940 = VFIXUPIMMPSZ128rrik
{ 4941, 6, 1, 0, 0, 0, 0x20612a7804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr }, // Inst #4941 = VFIXUPIMMPSZ128rrikz
{ 4942, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092a7804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr }, // Inst #4942 = VFIXUPIMMPSZ256rmbi
{ 4943, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292a7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4943 = VFIXUPIMMPSZ256rmbik
{ 4944, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692a7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4944 = VFIXUPIMMPSZ256rmbikz
{ 4945, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092a7804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr }, // Inst #4945 = VFIXUPIMMPSZ256rmi
{ 4946, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292a7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4946 = VFIXUPIMMPSZ256rmik
{ 4947, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692a7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #4947 = VFIXUPIMMPSZ256rmikz
{ 4948, 5, 1, 0, 0, 0, 0x40092a7804d005ULL, nullptr, nullptr, OperandInfo536, -1 ,nullptr }, // Inst #4948 = VFIXUPIMMPSZ256rri
{ 4949, 6, 1, 0, 0, 0, 0x40292a7804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #4949 = VFIXUPIMMPSZ256rrik
{ 4950, 6, 1, 0, 0, 0, 0x40692a7804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #4950 = VFIXUPIMMPSZ256rrikz
{ 4951, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812a7804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr }, // Inst #4951 = VFIXUPIMMPSZrmbi
{ 4952, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12a7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #4952 = VFIXUPIMMPSZrmbik
{ 4953, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12a7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #4953 = VFIXUPIMMPSZrmbikz
{ 4954, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812a7804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr }, // Inst #4954 = VFIXUPIMMPSZrmi
{ 4955, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12a7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #4955 = VFIXUPIMMPSZrmik
{ 4956, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12a7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #4956 = VFIXUPIMMPSZrmikz
{ 4957, 5, 1, 0, 0, 0, 0x80812a7804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #4957 = VFIXUPIMMPSZrri
{ 4958, 5, 1, 0, 0, 0, 0x9812a7804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #4958 = VFIXUPIMMPSZrrib
{ 4959, 6, 1, 0, 0, 0, 0x9a12a7804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #4959 = VFIXUPIMMPSZrribk
{ 4960, 6, 1, 0, 0, 0, 0x9e12a7804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #4960 = VFIXUPIMMPSZrribkz
{ 4961, 6, 1, 0, 0, 0, 0x80a12a7804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #4961 = VFIXUPIMMPSZrrik
{ 4962, 6, 1, 0, 0, 0, 0x80e12a7804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #4962 = VFIXUPIMMPSZrrikz
{ 4963, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011aaf804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #4963 = VFIXUPIMMSDrmi
{ 4964, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031aaf804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #4964 = VFIXUPIMMSDrmik
{ 4965, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071aaf804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #4965 = VFIXUPIMMSDrmikz
{ 4966, 5, 1, 0, 0, 0, 0x1011aaf804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #4966 = VFIXUPIMMSDrri
{ 4967, 5, 1, 0, 0, 0, 0x1111aaf804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #4967 = VFIXUPIMMSDrrib
{ 4968, 6, 1, 0, 0, 0, 0x1131aaf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4968 = VFIXUPIMMSDrribk
{ 4969, 6, 1, 0, 0, 0, 0x1171aaf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4969 = VFIXUPIMMSDrribkz
{ 4970, 6, 1, 0, 0, 0, 0x1031aaf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4970 = VFIXUPIMMSDrrik
{ 4971, 6, 1, 0, 0, 0, 0x1071aaf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4971 = VFIXUPIMMSDrrikz
{ 4972, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8112af804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #4972 = VFIXUPIMMSSrmi
{ 4973, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8312af804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #4973 = VFIXUPIMMSSrmik
{ 4974, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8712af804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #4974 = VFIXUPIMMSSrmikz
{ 4975, 5, 1, 0, 0, 0, 0x8112af804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #4975 = VFIXUPIMMSSrri
{ 4976, 5, 1, 0, 0, 0, 0x9112af804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #4976 = VFIXUPIMMSSrrib
{ 4977, 6, 1, 0, 0, 0, 0x9312af804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4977 = VFIXUPIMMSSrribk
{ 4978, 6, 1, 0, 0, 0, 0x9712af804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4978 = VFIXUPIMMSSrribkz
{ 4979, 6, 1, 0, 0, 0, 0x8312af804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4979 = VFIXUPIMMSSrrik
{ 4980, 6, 1, 0, 0, 0, 0x8712af804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #4980 = VFIXUPIMMSSrrikz
{ 4981, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001cc60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #4981 = VFMADD132PDZ128m
{ 4982, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101cc60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #4982 = VFMADD132PDZ128mb
{ 4983, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121cc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #4983 = VFMADD132PDZ128mbk
{ 4984, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161cc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #4984 = VFMADD132PDZ128mbkz
{ 4985, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021cc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #4985 = VFMADD132PDZ128mk
{ 4986, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061cc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #4986 = VFMADD132PDZ128mkz
{ 4987, 4, 1, 0, 0, 0, 0x2001cc60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #4987 = VFMADD132PDZ128r
{ 4988, 5, 1, 0, 0, 0, 0x2021cc60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #4988 = VFMADD132PDZ128rk
{ 4989, 5, 1, 0, 0, 0, 0x2061cc60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #4989 = VFMADD132PDZ128rkz
{ 4990, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009cc60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #4990 = VFMADD132PDZ256m
{ 4991, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109cc60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #4991 = VFMADD132PDZ256mb
{ 4992, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129cc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #4992 = VFMADD132PDZ256mbk
{ 4993, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169cc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #4993 = VFMADD132PDZ256mbkz
{ 4994, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029cc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #4994 = VFMADD132PDZ256mk
{ 4995, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069cc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #4995 = VFMADD132PDZ256mkz
{ 4996, 4, 1, 0, 0, 0, 0x4009cc60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #4996 = VFMADD132PDZ256r
{ 4997, 5, 1, 0, 0, 0, 0x4029cc60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #4997 = VFMADD132PDZ256rk
{ 4998, 5, 1, 0, 0, 0, 0x4069cc60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #4998 = VFMADD132PDZ256rkz
{ 4999, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081cc60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #4999 = VFMADD132PDZm
{ 5000, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181cc60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5000 = VFMADD132PDZmb
{ 5001, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1cc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5001 = VFMADD132PDZmbk
{ 5002, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1cc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5002 = VFMADD132PDZmbkz
{ 5003, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1cc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5003 = VFMADD132PDZmk
{ 5004, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1cc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5004 = VFMADD132PDZmkz
{ 5005, 4, 1, 0, 0, 0, 0x8081cc60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5005 = VFMADD132PDZr
{ 5006, 5, 1, 0, 0, 0, 0x41181cc60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5006 = VFMADD132PDZrb
{ 5007, 6, 1, 0, 0, 0, 0x411a1cc60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5007 = VFMADD132PDZrbk
{ 5008, 6, 1, 0, 0, 0, 0x411e1cc60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5008 = VFMADD132PDZrbkz
{ 5009, 5, 1, 0, 0, 0, 0x80a1cc60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5009 = VFMADD132PDZrk
{ 5010, 5, 1, 0, 0, 0, 0x80e1cc60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5010 = VFMADD132PDZrkz
{ 5011, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20014c60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5011 = VFMADD132PSZ128m
{ 5012, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9014c60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5012 = VFMADD132PSZ128mb
{ 5013, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9214c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5013 = VFMADD132PSZ128mbk
{ 5014, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9614c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5014 = VFMADD132PSZ128mbkz
{ 5015, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20214c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5015 = VFMADD132PSZ128mk
{ 5016, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20614c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5016 = VFMADD132PSZ128mkz
{ 5017, 4, 1, 0, 0, 0, 0x20014c60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5017 = VFMADD132PSZ128r
{ 5018, 5, 1, 0, 0, 0, 0x20214c60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5018 = VFMADD132PSZ128rk
{ 5019, 5, 1, 0, 0, 0, 0x20614c60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5019 = VFMADD132PSZ128rkz
{ 5020, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40094c60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5020 = VFMADD132PSZ256m
{ 5021, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9094c60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5021 = VFMADD132PSZ256mb
{ 5022, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9294c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5022 = VFMADD132PSZ256mbk
{ 5023, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9694c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5023 = VFMADD132PSZ256mbkz
{ 5024, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40294c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5024 = VFMADD132PSZ256mk
{ 5025, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40694c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5025 = VFMADD132PSZ256mkz
{ 5026, 4, 1, 0, 0, 0, 0x40094c60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5026 = VFMADD132PSZ256r
{ 5027, 5, 1, 0, 0, 0, 0x40294c60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5027 = VFMADD132PSZ256rk
{ 5028, 5, 1, 0, 0, 0, 0x40694c60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5028 = VFMADD132PSZ256rkz
{ 5029, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80814c60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5029 = VFMADD132PSZm
{ 5030, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9814c60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5030 = VFMADD132PSZmb
{ 5031, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a14c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5031 = VFMADD132PSZmbk
{ 5032, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e14c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5032 = VFMADD132PSZmbkz
{ 5033, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a14c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5033 = VFMADD132PSZmk
{ 5034, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e14c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5034 = VFMADD132PSZmkz
{ 5035, 4, 1, 0, 0, 0, 0x80814c60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5035 = VFMADD132PSZr
{ 5036, 5, 1, 0, 0, 0, 0x409814c60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5036 = VFMADD132PSZrb
{ 5037, 6, 1, 0, 0, 0, 0x409a14c60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5037 = VFMADD132PSZrbk
{ 5038, 6, 1, 0, 0, 0, 0x409e14c60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5038 = VFMADD132PSZrbkz
{ 5039, 5, 1, 0, 0, 0, 0x80a14c60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5039 = VFMADD132PSZrk
{ 5040, 5, 1, 0, 0, 0, 0x80e14c60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5040 = VFMADD132PSZrkz
{ 5041, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011cce0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #5041 = VFMADD132SDm
{ 5042, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011cce0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5042 = VFMADD132SDm_Int
{ 5043, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031cce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5043 = VFMADD132SDm_Intk
{ 5044, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071cce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5044 = VFMADD132SDm_Intkz
{ 5045, 4, 1, 0, 0, 0, 0x1011cce0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #5045 = VFMADD132SDr
{ 5046, 4, 1, 0, 0, 0, 0x1011cce0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5046 = VFMADD132SDr_Int
{ 5047, 5, 1, 0, 0, 0, 0x1031cce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5047 = VFMADD132SDr_Intk
{ 5048, 5, 1, 0, 0, 0, 0x1071cce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5048 = VFMADD132SDr_Intkz
{ 5049, 5, 1, 0, 0, 0, 0x41111cce0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5049 = VFMADD132SDrb_Int
{ 5050, 6, 1, 0, 0, 0, 0x41131cce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5050 = VFMADD132SDrb_Intk
{ 5051, 6, 1, 0, 0, 0, 0x41171cce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5051 = VFMADD132SDrb_Intkz
{ 5052, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8114ce0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #5052 = VFMADD132SSm
{ 5053, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8114ce0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5053 = VFMADD132SSm_Int
{ 5054, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8314ce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5054 = VFMADD132SSm_Intk
{ 5055, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8714ce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5055 = VFMADD132SSm_Intkz
{ 5056, 4, 1, 0, 0, 0, 0x8114ce0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #5056 = VFMADD132SSr
{ 5057, 4, 1, 0, 0, 0, 0x8114ce0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5057 = VFMADD132SSr_Int
{ 5058, 5, 1, 0, 0, 0, 0x8314ce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5058 = VFMADD132SSr_Intk
{ 5059, 5, 1, 0, 0, 0, 0x8714ce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5059 = VFMADD132SSr_Intkz
{ 5060, 5, 1, 0, 0, 0, 0x409114ce0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5060 = VFMADD132SSrb_Int
{ 5061, 6, 1, 0, 0, 0, 0x409314ce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5061 = VFMADD132SSrb_Intk
{ 5062, 6, 1, 0, 0, 0, 0x409714ce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5062 = VFMADD132SSrb_Intkz
{ 5063, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001d460009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5063 = VFMADD213PDZ128m
{ 5064, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101d460009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5064 = VFMADD213PDZ128mb
{ 5065, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121d460009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5065 = VFMADD213PDZ128mbk
{ 5066, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161d460009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5066 = VFMADD213PDZ128mbkz
{ 5067, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021d460009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5067 = VFMADD213PDZ128mk
{ 5068, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061d460009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5068 = VFMADD213PDZ128mkz
{ 5069, 4, 1, 0, 0, 0, 0x2001d460009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5069 = VFMADD213PDZ128r
{ 5070, 5, 1, 0, 0, 0, 0x2021d460009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5070 = VFMADD213PDZ128rk
{ 5071, 5, 1, 0, 0, 0, 0x2061d460009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5071 = VFMADD213PDZ128rkz
{ 5072, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009d460009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5072 = VFMADD213PDZ256m
{ 5073, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109d460009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5073 = VFMADD213PDZ256mb
{ 5074, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129d460009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5074 = VFMADD213PDZ256mbk
{ 5075, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169d460009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5075 = VFMADD213PDZ256mbkz
{ 5076, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029d460009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5076 = VFMADD213PDZ256mk
{ 5077, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069d460009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5077 = VFMADD213PDZ256mkz
{ 5078, 4, 1, 0, 0, 0, 0x4009d460009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5078 = VFMADD213PDZ256r
{ 5079, 5, 1, 0, 0, 0, 0x4029d460009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5079 = VFMADD213PDZ256rk
{ 5080, 5, 1, 0, 0, 0, 0x4069d460009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5080 = VFMADD213PDZ256rkz
{ 5081, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081d460009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5081 = VFMADD213PDZm
{ 5082, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181d460009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5082 = VFMADD213PDZmb
{ 5083, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1d460009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5083 = VFMADD213PDZmbk
{ 5084, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1d460009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5084 = VFMADD213PDZmbkz
{ 5085, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1d460009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5085 = VFMADD213PDZmk
{ 5086, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1d460009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5086 = VFMADD213PDZmkz
{ 5087, 4, 1, 0, 0, 0, 0x8081d460009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5087 = VFMADD213PDZr
{ 5088, 5, 1, 0, 0, 0, 0x41181d460009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5088 = VFMADD213PDZrb
{ 5089, 6, 1, 0, 0, 0, 0x411a1d460009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5089 = VFMADD213PDZrbk
{ 5090, 6, 1, 0, 0, 0, 0x411e1d460009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5090 = VFMADD213PDZrbkz
{ 5091, 5, 1, 0, 0, 0, 0x80a1d460009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5091 = VFMADD213PDZrk
{ 5092, 5, 1, 0, 0, 0, 0x80e1d460009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5092 = VFMADD213PDZrkz
{ 5093, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015460009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5093 = VFMADD213PSZ128m
{ 5094, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015460009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5094 = VFMADD213PSZ128mb
{ 5095, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215460009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5095 = VFMADD213PSZ128mbk
{ 5096, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615460009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5096 = VFMADD213PSZ128mbkz
{ 5097, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215460009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5097 = VFMADD213PSZ128mk
{ 5098, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615460009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5098 = VFMADD213PSZ128mkz
{ 5099, 4, 1, 0, 0, 0, 0x20015460009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5099 = VFMADD213PSZ128r
{ 5100, 5, 1, 0, 0, 0, 0x20215460009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5100 = VFMADD213PSZ128rk
{ 5101, 5, 1, 0, 0, 0, 0x20615460009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5101 = VFMADD213PSZ128rkz
{ 5102, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095460009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5102 = VFMADD213PSZ256m
{ 5103, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095460009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5103 = VFMADD213PSZ256mb
{ 5104, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295460009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5104 = VFMADD213PSZ256mbk
{ 5105, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695460009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5105 = VFMADD213PSZ256mbkz
{ 5106, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295460009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5106 = VFMADD213PSZ256mk
{ 5107, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695460009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5107 = VFMADD213PSZ256mkz
{ 5108, 4, 1, 0, 0, 0, 0x40095460009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5108 = VFMADD213PSZ256r
{ 5109, 5, 1, 0, 0, 0, 0x40295460009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5109 = VFMADD213PSZ256rk
{ 5110, 5, 1, 0, 0, 0, 0x40695460009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5110 = VFMADD213PSZ256rkz
{ 5111, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815460009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5111 = VFMADD213PSZm
{ 5112, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815460009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5112 = VFMADD213PSZmb
{ 5113, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15460009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5113 = VFMADD213PSZmbk
{ 5114, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15460009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5114 = VFMADD213PSZmbkz
{ 5115, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15460009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5115 = VFMADD213PSZmk
{ 5116, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15460009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5116 = VFMADD213PSZmkz
{ 5117, 4, 1, 0, 0, 0, 0x80815460009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5117 = VFMADD213PSZr
{ 5118, 5, 1, 0, 0, 0, 0x409815460009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5118 = VFMADD213PSZrb
{ 5119, 6, 1, 0, 0, 0, 0x409a15460009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5119 = VFMADD213PSZrbk
{ 5120, 6, 1, 0, 0, 0, 0x409e15460009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5120 = VFMADD213PSZrbkz
{ 5121, 5, 1, 0, 0, 0, 0x80a15460009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5121 = VFMADD213PSZrk
{ 5122, 5, 1, 0, 0, 0, 0x80e15460009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5122 = VFMADD213PSZrkz
{ 5123, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011d4e0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #5123 = VFMADD213SDm
{ 5124, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011d4e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5124 = VFMADD213SDm_Int
{ 5125, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031d4e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5125 = VFMADD213SDm_Intk
{ 5126, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071d4e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5126 = VFMADD213SDm_Intkz
{ 5127, 4, 1, 0, 0, 0, 0x1011d4e0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #5127 = VFMADD213SDr
{ 5128, 4, 1, 0, 0, 0, 0x1011d4e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5128 = VFMADD213SDr_Int
{ 5129, 5, 1, 0, 0, 0, 0x1031d4e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5129 = VFMADD213SDr_Intk
{ 5130, 5, 1, 0, 0, 0, 0x1071d4e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5130 = VFMADD213SDr_Intkz
{ 5131, 5, 1, 0, 0, 0, 0x41111d4e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5131 = VFMADD213SDrb_Int
{ 5132, 6, 1, 0, 0, 0, 0x41131d4e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5132 = VFMADD213SDrb_Intk
{ 5133, 6, 1, 0, 0, 0, 0x41171d4e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5133 = VFMADD213SDrb_Intkz
{ 5134, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81154e0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #5134 = VFMADD213SSm
{ 5135, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81154e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5135 = VFMADD213SSm_Int
{ 5136, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x83154e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5136 = VFMADD213SSm_Intk
{ 5137, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x87154e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5137 = VFMADD213SSm_Intkz
{ 5138, 4, 1, 0, 0, 0, 0x81154e0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #5138 = VFMADD213SSr
{ 5139, 4, 1, 0, 0, 0, 0x81154e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5139 = VFMADD213SSr_Int
{ 5140, 5, 1, 0, 0, 0, 0x83154e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5140 = VFMADD213SSr_Intk
{ 5141, 5, 1, 0, 0, 0, 0x87154e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5141 = VFMADD213SSr_Intkz
{ 5142, 5, 1, 0, 0, 0, 0x4091154e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5142 = VFMADD213SSrb_Int
{ 5143, 6, 1, 0, 0, 0, 0x4093154e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5143 = VFMADD213SSrb_Intk
{ 5144, 6, 1, 0, 0, 0, 0x4097154e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5144 = VFMADD213SSrb_Intkz
{ 5145, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001dc60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5145 = VFMADD231PDZ128m
{ 5146, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101dc60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5146 = VFMADD231PDZ128mb
{ 5147, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121dc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5147 = VFMADD231PDZ128mbk
{ 5148, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161dc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5148 = VFMADD231PDZ128mbkz
{ 5149, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021dc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5149 = VFMADD231PDZ128mk
{ 5150, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061dc60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5150 = VFMADD231PDZ128mkz
{ 5151, 4, 1, 0, 0, 0, 0x2001dc60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5151 = VFMADD231PDZ128r
{ 5152, 5, 1, 0, 0, 0, 0x2021dc60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5152 = VFMADD231PDZ128rk
{ 5153, 5, 1, 0, 0, 0, 0x2061dc60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5153 = VFMADD231PDZ128rkz
{ 5154, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009dc60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5154 = VFMADD231PDZ256m
{ 5155, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109dc60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5155 = VFMADD231PDZ256mb
{ 5156, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129dc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5156 = VFMADD231PDZ256mbk
{ 5157, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169dc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5157 = VFMADD231PDZ256mbkz
{ 5158, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029dc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5158 = VFMADD231PDZ256mk
{ 5159, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069dc60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5159 = VFMADD231PDZ256mkz
{ 5160, 4, 1, 0, 0, 0, 0x4009dc60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5160 = VFMADD231PDZ256r
{ 5161, 5, 1, 0, 0, 0, 0x4029dc60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5161 = VFMADD231PDZ256rk
{ 5162, 5, 1, 0, 0, 0, 0x4069dc60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5162 = VFMADD231PDZ256rkz
{ 5163, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081dc60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5163 = VFMADD231PDZm
{ 5164, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181dc60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5164 = VFMADD231PDZmb
{ 5165, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1dc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5165 = VFMADD231PDZmbk
{ 5166, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1dc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5166 = VFMADD231PDZmbkz
{ 5167, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1dc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5167 = VFMADD231PDZmk
{ 5168, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1dc60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5168 = VFMADD231PDZmkz
{ 5169, 4, 1, 0, 0, 0, 0x8081dc60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5169 = VFMADD231PDZr
{ 5170, 5, 1, 0, 0, 0, 0x41181dc60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5170 = VFMADD231PDZrb
{ 5171, 6, 1, 0, 0, 0, 0x411a1dc60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5171 = VFMADD231PDZrbk
{ 5172, 6, 1, 0, 0, 0, 0x411e1dc60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5172 = VFMADD231PDZrbkz
{ 5173, 5, 1, 0, 0, 0, 0x80a1dc60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5173 = VFMADD231PDZrk
{ 5174, 5, 1, 0, 0, 0, 0x80e1dc60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5174 = VFMADD231PDZrkz
{ 5175, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015c60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5175 = VFMADD231PSZ128m
{ 5176, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015c60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5176 = VFMADD231PSZ128mb
{ 5177, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5177 = VFMADD231PSZ128mbk
{ 5178, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5178 = VFMADD231PSZ128mbkz
{ 5179, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5179 = VFMADD231PSZ128mk
{ 5180, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615c60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5180 = VFMADD231PSZ128mkz
{ 5181, 4, 1, 0, 0, 0, 0x20015c60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5181 = VFMADD231PSZ128r
{ 5182, 5, 1, 0, 0, 0, 0x20215c60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5182 = VFMADD231PSZ128rk
{ 5183, 5, 1, 0, 0, 0, 0x20615c60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5183 = VFMADD231PSZ128rkz
{ 5184, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095c60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5184 = VFMADD231PSZ256m
{ 5185, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095c60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5185 = VFMADD231PSZ256mb
{ 5186, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5186 = VFMADD231PSZ256mbk
{ 5187, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5187 = VFMADD231PSZ256mbkz
{ 5188, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5188 = VFMADD231PSZ256mk
{ 5189, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695c60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5189 = VFMADD231PSZ256mkz
{ 5190, 4, 1, 0, 0, 0, 0x40095c60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5190 = VFMADD231PSZ256r
{ 5191, 5, 1, 0, 0, 0, 0x40295c60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5191 = VFMADD231PSZ256rk
{ 5192, 5, 1, 0, 0, 0, 0x40695c60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5192 = VFMADD231PSZ256rkz
{ 5193, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815c60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5193 = VFMADD231PSZm
{ 5194, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815c60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5194 = VFMADD231PSZmb
{ 5195, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5195 = VFMADD231PSZmbk
{ 5196, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5196 = VFMADD231PSZmbkz
{ 5197, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5197 = VFMADD231PSZmk
{ 5198, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15c60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5198 = VFMADD231PSZmkz
{ 5199, 4, 1, 0, 0, 0, 0x80815c60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5199 = VFMADD231PSZr
{ 5200, 5, 1, 0, 0, 0, 0x409815c60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5200 = VFMADD231PSZrb
{ 5201, 6, 1, 0, 0, 0, 0x409a15c60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5201 = VFMADD231PSZrbk
{ 5202, 6, 1, 0, 0, 0, 0x409e15c60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5202 = VFMADD231PSZrbkz
{ 5203, 5, 1, 0, 0, 0, 0x80a15c60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5203 = VFMADD231PSZrk
{ 5204, 5, 1, 0, 0, 0, 0x80e15c60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5204 = VFMADD231PSZrkz
{ 5205, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011dce0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #5205 = VFMADD231SDm
{ 5206, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011dce0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5206 = VFMADD231SDm_Int
{ 5207, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031dce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5207 = VFMADD231SDm_Intk
{ 5208, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071dce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5208 = VFMADD231SDm_Intkz
{ 5209, 4, 1, 0, 0, 0, 0x1011dce0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #5209 = VFMADD231SDr
{ 5210, 4, 1, 0, 0, 0, 0x1011dce0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5210 = VFMADD231SDr_Int
{ 5211, 5, 1, 0, 0, 0, 0x1031dce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5211 = VFMADD231SDr_Intk
{ 5212, 5, 1, 0, 0, 0, 0x1071dce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5212 = VFMADD231SDr_Intkz
{ 5213, 5, 1, 0, 0, 0, 0x41111dce0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5213 = VFMADD231SDrb_Int
{ 5214, 6, 1, 0, 0, 0, 0x41131dce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5214 = VFMADD231SDrb_Intk
{ 5215, 6, 1, 0, 0, 0, 0x41171dce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5215 = VFMADD231SDrb_Intkz
{ 5216, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8115ce0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #5216 = VFMADD231SSm
{ 5217, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8115ce0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5217 = VFMADD231SSm_Int
{ 5218, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8315ce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5218 = VFMADD231SSm_Intk
{ 5219, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8715ce0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5219 = VFMADD231SSm_Intkz
{ 5220, 4, 1, 0, 0, 0, 0x8115ce0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #5220 = VFMADD231SSr
{ 5221, 4, 1, 0, 0, 0, 0x8115ce0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5221 = VFMADD231SSr_Int
{ 5222, 5, 1, 0, 0, 0, 0x8315ce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5222 = VFMADD231SSr_Intk
{ 5223, 5, 1, 0, 0, 0, 0x8715ce0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5223 = VFMADD231SSr_Intkz
{ 5224, 5, 1, 0, 0, 0, 0x409115ce0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5224 = VFMADD231SSrb_Int
{ 5225, 6, 1, 0, 0, 0, 0x409315ce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5225 = VFMADD231SSrb_Intk
{ 5226, 6, 1, 0, 0, 0, 0x409715ce0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5226 = VFMADD231SSrb_Intkz
{ 5227, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x534b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5227 = VFMADDPD4mr
{ 5228, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0xd34b004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #5228 = VFMADDPD4mrY
{ 5229, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20005b4b004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5229 = VFMADDPD4rm
{ 5230, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x2000db4b004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #5230 = VFMADDPD4rmY
{ 5231, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20005b4b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5231 = VFMADDPD4rr
{ 5232, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x2000db4b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5232 = VFMADDPD4rrY
{ 5233, 4, 1, 0, 926, 0, 0xd34b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5233 = VFMADDPD4rrY_REV
{ 5234, 4, 1, 0, 926, 0, 0x534b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5234 = VFMADDPD4rr_REV
{ 5235, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cc30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5235 = VFMADDPDr132m
{ 5236, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cc30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5236 = VFMADDPDr132mY
{ 5237, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cc30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5237 = VFMADDPDr132r
{ 5238, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cc30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5238 = VFMADDPDr132rY
{ 5239, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d430009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5239 = VFMADDPDr213m
{ 5240, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d430009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5240 = VFMADDPDr213mY
{ 5241, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d430009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5241 = VFMADDPDr213r
{ 5242, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d430009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5242 = VFMADDPDr213rY
{ 5243, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1dc30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5243 = VFMADDPDr231m
{ 5244, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9dc30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5244 = VFMADDPDr231mY
{ 5245, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1dc30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5245 = VFMADDPDr231r
{ 5246, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9dc30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5246 = VFMADDPDr231rY
{ 5247, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x5342804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5247 = VFMADDPS4mr
{ 5248, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0xd342804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #5248 = VFMADDPS4mrY
{ 5249, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20005b42804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5249 = VFMADDPS4rm
{ 5250, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x2000db42804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #5250 = VFMADDPS4rmY
{ 5251, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20005b42804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5251 = VFMADDPS4rr
{ 5252, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x2000db42804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5252 = VFMADDPS4rrY
{ 5253, 4, 1, 0, 926, 0, 0xd342804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5253 = VFMADDPS4rrY_REV
{ 5254, 4, 1, 0, 926, 0, 0x5342804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5254 = VFMADDPS4rr_REV
{ 5255, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14c28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5255 = VFMADDPSr132m
{ 5256, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94c28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5256 = VFMADDPSr132mY
{ 5257, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14c28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5257 = VFMADDPSr132r
{ 5258, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94c28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5258 = VFMADDPSr132rY
{ 5259, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15428009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5259 = VFMADDPSr213m
{ 5260, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95428009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5260 = VFMADDPSr213mY
{ 5261, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15428009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5261 = VFMADDPSr213r
{ 5262, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95428009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5262 = VFMADDPSr213rY
{ 5263, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15c28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5263 = VFMADDPSr231m
{ 5264, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95c28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5264 = VFMADDPSr231mY
{ 5265, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15c28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5265 = VFMADDPSr231r
{ 5266, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95c28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5266 = VFMADDPSr231rY
{ 5267, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x1535b004d006ULL, nullptr, nullptr, OperandInfo556, -1 ,nullptr }, // Inst #5267 = VFMADDSD4mr
{ 5268, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x1535b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5268 = VFMADDSD4mr_Int
{ 5269, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015b5b004d006ULL, nullptr, nullptr, OperandInfo557, -1 ,nullptr }, // Inst #5269 = VFMADDSD4rm
{ 5270, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015b5b004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5270 = VFMADDSD4rm_Int
{ 5271, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015b5b004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #5271 = VFMADDSD4rr
{ 5272, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015b5b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5272 = VFMADDSD4rr_Int
{ 5273, 4, 1, 0, 926, 0, 0x1535b004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #5273 = VFMADDSD4rr_REV
{ 5274, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ccb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #5274 = VFMADDSDr132m
{ 5275, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ccb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5275 = VFMADDSDr132m_Int
{ 5276, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11ccb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #5276 = VFMADDSDr132r
{ 5277, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11ccb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5277 = VFMADDSDr132r_Int
{ 5278, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d4b0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #5278 = VFMADDSDr213m
{ 5279, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d4b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5279 = VFMADDSDr213m_Int
{ 5280, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11d4b0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #5280 = VFMADDSDr213r
{ 5281, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11d4b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5281 = VFMADDSDr213r_Int
{ 5282, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11dcb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #5282 = VFMADDSDr231m
{ 5283, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11dcb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5283 = VFMADDSDr231m_Int
{ 5284, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11dcb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #5284 = VFMADDSDr231r
{ 5285, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11dcb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5285 = VFMADDSDr231r_Int
{ 5286, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x15352804d006ULL, nullptr, nullptr, OperandInfo561, -1 ,nullptr }, // Inst #5286 = VFMADDSS4mr
{ 5287, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x15352804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5287 = VFMADDSS4mr_Int
{ 5288, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015b52804d006ULL, nullptr, nullptr, OperandInfo562, -1 ,nullptr }, // Inst #5288 = VFMADDSS4rm
{ 5289, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015b52804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5289 = VFMADDSS4rm_Int
{ 5290, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015b52804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr }, // Inst #5290 = VFMADDSS4rr
{ 5291, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015b52804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5291 = VFMADDSS4rr_Int
{ 5292, 4, 1, 0, 926, 0, 0x15352804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr }, // Inst #5292 = VFMADDSS4rr_REV
{ 5293, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114ca8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #5293 = VFMADDSSr132m
{ 5294, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114ca8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5294 = VFMADDSSr132m_Int
{ 5295, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x114ca8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #5295 = VFMADDSSr132r
{ 5296, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x114ca8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5296 = VFMADDSSr132r_Int
{ 5297, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1154a8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #5297 = VFMADDSSr213m
{ 5298, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1154a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5298 = VFMADDSSr213m_Int
{ 5299, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1154a8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #5299 = VFMADDSSr213r
{ 5300, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x1154a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5300 = VFMADDSSr213r_Int
{ 5301, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115ca8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #5301 = VFMADDSSr231m
{ 5302, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115ca8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5302 = VFMADDSSr231m_Int
{ 5303, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x115ca8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #5303 = VFMADDSSr231r
{ 5304, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x115ca8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5304 = VFMADDSSr231r_Int
{ 5305, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001cb60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5305 = VFMADDSUB132PDZ128m
{ 5306, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101cb60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5306 = VFMADDSUB132PDZ128mb
{ 5307, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121cb60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5307 = VFMADDSUB132PDZ128mbk
{ 5308, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161cb60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5308 = VFMADDSUB132PDZ128mbkz
{ 5309, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021cb60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5309 = VFMADDSUB132PDZ128mk
{ 5310, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061cb60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5310 = VFMADDSUB132PDZ128mkz
{ 5311, 4, 1, 0, 0, 0, 0x2001cb60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5311 = VFMADDSUB132PDZ128r
{ 5312, 5, 1, 0, 0, 0, 0x2021cb60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5312 = VFMADDSUB132PDZ128rk
{ 5313, 5, 1, 0, 0, 0, 0x2061cb60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5313 = VFMADDSUB132PDZ128rkz
{ 5314, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009cb60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5314 = VFMADDSUB132PDZ256m
{ 5315, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109cb60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5315 = VFMADDSUB132PDZ256mb
{ 5316, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129cb60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5316 = VFMADDSUB132PDZ256mbk
{ 5317, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169cb60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5317 = VFMADDSUB132PDZ256mbkz
{ 5318, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029cb60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5318 = VFMADDSUB132PDZ256mk
{ 5319, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069cb60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5319 = VFMADDSUB132PDZ256mkz
{ 5320, 4, 1, 0, 0, 0, 0x4009cb60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5320 = VFMADDSUB132PDZ256r
{ 5321, 5, 1, 0, 0, 0, 0x4029cb60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5321 = VFMADDSUB132PDZ256rk
{ 5322, 5, 1, 0, 0, 0, 0x4069cb60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5322 = VFMADDSUB132PDZ256rkz
{ 5323, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081cb60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5323 = VFMADDSUB132PDZm
{ 5324, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181cb60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5324 = VFMADDSUB132PDZmb
{ 5325, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1cb60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5325 = VFMADDSUB132PDZmbk
{ 5326, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1cb60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5326 = VFMADDSUB132PDZmbkz
{ 5327, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1cb60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5327 = VFMADDSUB132PDZmk
{ 5328, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1cb60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5328 = VFMADDSUB132PDZmkz
{ 5329, 4, 1, 0, 0, 0, 0x8081cb60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5329 = VFMADDSUB132PDZr
{ 5330, 5, 1, 0, 0, 0, 0x41181cb60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5330 = VFMADDSUB132PDZrb
{ 5331, 6, 1, 0, 0, 0, 0x411a1cb60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5331 = VFMADDSUB132PDZrbk
{ 5332, 6, 1, 0, 0, 0, 0x411e1cb60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5332 = VFMADDSUB132PDZrbkz
{ 5333, 5, 1, 0, 0, 0, 0x80a1cb60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5333 = VFMADDSUB132PDZrk
{ 5334, 5, 1, 0, 0, 0, 0x80e1cb60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5334 = VFMADDSUB132PDZrkz
{ 5335, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20014b60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5335 = VFMADDSUB132PSZ128m
{ 5336, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9014b60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5336 = VFMADDSUB132PSZ128mb
{ 5337, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9214b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5337 = VFMADDSUB132PSZ128mbk
{ 5338, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9614b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5338 = VFMADDSUB132PSZ128mbkz
{ 5339, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20214b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5339 = VFMADDSUB132PSZ128mk
{ 5340, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20614b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5340 = VFMADDSUB132PSZ128mkz
{ 5341, 4, 1, 0, 0, 0, 0x20014b60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5341 = VFMADDSUB132PSZ128r
{ 5342, 5, 1, 0, 0, 0, 0x20214b60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5342 = VFMADDSUB132PSZ128rk
{ 5343, 5, 1, 0, 0, 0, 0x20614b60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5343 = VFMADDSUB132PSZ128rkz
{ 5344, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40094b60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5344 = VFMADDSUB132PSZ256m
{ 5345, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9094b60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5345 = VFMADDSUB132PSZ256mb
{ 5346, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9294b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5346 = VFMADDSUB132PSZ256mbk
{ 5347, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9694b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5347 = VFMADDSUB132PSZ256mbkz
{ 5348, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40294b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5348 = VFMADDSUB132PSZ256mk
{ 5349, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40694b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5349 = VFMADDSUB132PSZ256mkz
{ 5350, 4, 1, 0, 0, 0, 0x40094b60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5350 = VFMADDSUB132PSZ256r
{ 5351, 5, 1, 0, 0, 0, 0x40294b60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5351 = VFMADDSUB132PSZ256rk
{ 5352, 5, 1, 0, 0, 0, 0x40694b60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5352 = VFMADDSUB132PSZ256rkz
{ 5353, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80814b60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5353 = VFMADDSUB132PSZm
{ 5354, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9814b60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5354 = VFMADDSUB132PSZmb
{ 5355, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a14b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5355 = VFMADDSUB132PSZmbk
{ 5356, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e14b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5356 = VFMADDSUB132PSZmbkz
{ 5357, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a14b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5357 = VFMADDSUB132PSZmk
{ 5358, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e14b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5358 = VFMADDSUB132PSZmkz
{ 5359, 4, 1, 0, 0, 0, 0x80814b60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5359 = VFMADDSUB132PSZr
{ 5360, 5, 1, 0, 0, 0, 0x409814b60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5360 = VFMADDSUB132PSZrb
{ 5361, 6, 1, 0, 0, 0, 0x409a14b60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5361 = VFMADDSUB132PSZrbk
{ 5362, 6, 1, 0, 0, 0, 0x409e14b60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5362 = VFMADDSUB132PSZrbkz
{ 5363, 5, 1, 0, 0, 0, 0x80a14b60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5363 = VFMADDSUB132PSZrk
{ 5364, 5, 1, 0, 0, 0, 0x80e14b60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5364 = VFMADDSUB132PSZrkz
{ 5365, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001d360009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5365 = VFMADDSUB213PDZ128m
{ 5366, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101d360009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5366 = VFMADDSUB213PDZ128mb
{ 5367, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121d360009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5367 = VFMADDSUB213PDZ128mbk
{ 5368, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161d360009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5368 = VFMADDSUB213PDZ128mbkz
{ 5369, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021d360009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5369 = VFMADDSUB213PDZ128mk
{ 5370, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061d360009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5370 = VFMADDSUB213PDZ128mkz
{ 5371, 4, 1, 0, 0, 0, 0x2001d360009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5371 = VFMADDSUB213PDZ128r
{ 5372, 5, 1, 0, 0, 0, 0x2021d360009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5372 = VFMADDSUB213PDZ128rk
{ 5373, 5, 1, 0, 0, 0, 0x2061d360009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5373 = VFMADDSUB213PDZ128rkz
{ 5374, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009d360009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5374 = VFMADDSUB213PDZ256m
{ 5375, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109d360009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5375 = VFMADDSUB213PDZ256mb
{ 5376, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129d360009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5376 = VFMADDSUB213PDZ256mbk
{ 5377, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169d360009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5377 = VFMADDSUB213PDZ256mbkz
{ 5378, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029d360009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5378 = VFMADDSUB213PDZ256mk
{ 5379, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069d360009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5379 = VFMADDSUB213PDZ256mkz
{ 5380, 4, 1, 0, 0, 0, 0x4009d360009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5380 = VFMADDSUB213PDZ256r
{ 5381, 5, 1, 0, 0, 0, 0x4029d360009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5381 = VFMADDSUB213PDZ256rk
{ 5382, 5, 1, 0, 0, 0, 0x4069d360009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5382 = VFMADDSUB213PDZ256rkz
{ 5383, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081d360009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5383 = VFMADDSUB213PDZm
{ 5384, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181d360009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5384 = VFMADDSUB213PDZmb
{ 5385, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1d360009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5385 = VFMADDSUB213PDZmbk
{ 5386, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1d360009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5386 = VFMADDSUB213PDZmbkz
{ 5387, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1d360009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5387 = VFMADDSUB213PDZmk
{ 5388, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1d360009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5388 = VFMADDSUB213PDZmkz
{ 5389, 4, 1, 0, 0, 0, 0x8081d360009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5389 = VFMADDSUB213PDZr
{ 5390, 5, 1, 0, 0, 0, 0x41181d360009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5390 = VFMADDSUB213PDZrb
{ 5391, 6, 1, 0, 0, 0, 0x411a1d360009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5391 = VFMADDSUB213PDZrbk
{ 5392, 6, 1, 0, 0, 0, 0x411e1d360009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5392 = VFMADDSUB213PDZrbkz
{ 5393, 5, 1, 0, 0, 0, 0x80a1d360009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5393 = VFMADDSUB213PDZrk
{ 5394, 5, 1, 0, 0, 0, 0x80e1d360009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5394 = VFMADDSUB213PDZrkz
{ 5395, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015360009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5395 = VFMADDSUB213PSZ128m
{ 5396, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015360009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5396 = VFMADDSUB213PSZ128mb
{ 5397, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215360009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5397 = VFMADDSUB213PSZ128mbk
{ 5398, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615360009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5398 = VFMADDSUB213PSZ128mbkz
{ 5399, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215360009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5399 = VFMADDSUB213PSZ128mk
{ 5400, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615360009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5400 = VFMADDSUB213PSZ128mkz
{ 5401, 4, 1, 0, 0, 0, 0x20015360009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5401 = VFMADDSUB213PSZ128r
{ 5402, 5, 1, 0, 0, 0, 0x20215360009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5402 = VFMADDSUB213PSZ128rk
{ 5403, 5, 1, 0, 0, 0, 0x20615360009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5403 = VFMADDSUB213PSZ128rkz
{ 5404, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095360009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5404 = VFMADDSUB213PSZ256m
{ 5405, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095360009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5405 = VFMADDSUB213PSZ256mb
{ 5406, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295360009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5406 = VFMADDSUB213PSZ256mbk
{ 5407, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695360009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5407 = VFMADDSUB213PSZ256mbkz
{ 5408, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295360009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5408 = VFMADDSUB213PSZ256mk
{ 5409, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695360009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5409 = VFMADDSUB213PSZ256mkz
{ 5410, 4, 1, 0, 0, 0, 0x40095360009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5410 = VFMADDSUB213PSZ256r
{ 5411, 5, 1, 0, 0, 0, 0x40295360009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5411 = VFMADDSUB213PSZ256rk
{ 5412, 5, 1, 0, 0, 0, 0x40695360009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5412 = VFMADDSUB213PSZ256rkz
{ 5413, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815360009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5413 = VFMADDSUB213PSZm
{ 5414, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815360009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5414 = VFMADDSUB213PSZmb
{ 5415, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15360009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5415 = VFMADDSUB213PSZmbk
{ 5416, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15360009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5416 = VFMADDSUB213PSZmbkz
{ 5417, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15360009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5417 = VFMADDSUB213PSZmk
{ 5418, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15360009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5418 = VFMADDSUB213PSZmkz
{ 5419, 4, 1, 0, 0, 0, 0x80815360009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5419 = VFMADDSUB213PSZr
{ 5420, 5, 1, 0, 0, 0, 0x409815360009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5420 = VFMADDSUB213PSZrb
{ 5421, 6, 1, 0, 0, 0, 0x409a15360009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5421 = VFMADDSUB213PSZrbk
{ 5422, 6, 1, 0, 0, 0, 0x409e15360009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5422 = VFMADDSUB213PSZrbkz
{ 5423, 5, 1, 0, 0, 0, 0x80a15360009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5423 = VFMADDSUB213PSZrk
{ 5424, 5, 1, 0, 0, 0, 0x80e15360009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5424 = VFMADDSUB213PSZrkz
{ 5425, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001db60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5425 = VFMADDSUB231PDZ128m
{ 5426, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101db60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5426 = VFMADDSUB231PDZ128mb
{ 5427, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121db60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5427 = VFMADDSUB231PDZ128mbk
{ 5428, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161db60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5428 = VFMADDSUB231PDZ128mbkz
{ 5429, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021db60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5429 = VFMADDSUB231PDZ128mk
{ 5430, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061db60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5430 = VFMADDSUB231PDZ128mkz
{ 5431, 4, 1, 0, 0, 0, 0x2001db60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5431 = VFMADDSUB231PDZ128r
{ 5432, 5, 1, 0, 0, 0, 0x2021db60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5432 = VFMADDSUB231PDZ128rk
{ 5433, 5, 1, 0, 0, 0, 0x2061db60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5433 = VFMADDSUB231PDZ128rkz
{ 5434, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009db60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5434 = VFMADDSUB231PDZ256m
{ 5435, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109db60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5435 = VFMADDSUB231PDZ256mb
{ 5436, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129db60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5436 = VFMADDSUB231PDZ256mbk
{ 5437, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169db60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5437 = VFMADDSUB231PDZ256mbkz
{ 5438, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029db60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5438 = VFMADDSUB231PDZ256mk
{ 5439, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069db60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5439 = VFMADDSUB231PDZ256mkz
{ 5440, 4, 1, 0, 0, 0, 0x4009db60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5440 = VFMADDSUB231PDZ256r
{ 5441, 5, 1, 0, 0, 0, 0x4029db60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5441 = VFMADDSUB231PDZ256rk
{ 5442, 5, 1, 0, 0, 0, 0x4069db60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5442 = VFMADDSUB231PDZ256rkz
{ 5443, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081db60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5443 = VFMADDSUB231PDZm
{ 5444, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181db60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5444 = VFMADDSUB231PDZmb
{ 5445, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1db60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5445 = VFMADDSUB231PDZmbk
{ 5446, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1db60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5446 = VFMADDSUB231PDZmbkz
{ 5447, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1db60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5447 = VFMADDSUB231PDZmk
{ 5448, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1db60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5448 = VFMADDSUB231PDZmkz
{ 5449, 4, 1, 0, 0, 0, 0x8081db60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5449 = VFMADDSUB231PDZr
{ 5450, 5, 1, 0, 0, 0, 0x41181db60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5450 = VFMADDSUB231PDZrb
{ 5451, 6, 1, 0, 0, 0, 0x411a1db60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5451 = VFMADDSUB231PDZrbk
{ 5452, 6, 1, 0, 0, 0, 0x411e1db60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5452 = VFMADDSUB231PDZrbkz
{ 5453, 5, 1, 0, 0, 0, 0x80a1db60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5453 = VFMADDSUB231PDZrk
{ 5454, 5, 1, 0, 0, 0, 0x80e1db60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5454 = VFMADDSUB231PDZrkz
{ 5455, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015b60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5455 = VFMADDSUB231PSZ128m
{ 5456, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015b60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5456 = VFMADDSUB231PSZ128mb
{ 5457, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5457 = VFMADDSUB231PSZ128mbk
{ 5458, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5458 = VFMADDSUB231PSZ128mbkz
{ 5459, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5459 = VFMADDSUB231PSZ128mk
{ 5460, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615b60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5460 = VFMADDSUB231PSZ128mkz
{ 5461, 4, 1, 0, 0, 0, 0x20015b60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5461 = VFMADDSUB231PSZ128r
{ 5462, 5, 1, 0, 0, 0, 0x20215b60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5462 = VFMADDSUB231PSZ128rk
{ 5463, 5, 1, 0, 0, 0, 0x20615b60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5463 = VFMADDSUB231PSZ128rkz
{ 5464, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095b60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5464 = VFMADDSUB231PSZ256m
{ 5465, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095b60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5465 = VFMADDSUB231PSZ256mb
{ 5466, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5466 = VFMADDSUB231PSZ256mbk
{ 5467, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5467 = VFMADDSUB231PSZ256mbkz
{ 5468, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5468 = VFMADDSUB231PSZ256mk
{ 5469, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695b60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5469 = VFMADDSUB231PSZ256mkz
{ 5470, 4, 1, 0, 0, 0, 0x40095b60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5470 = VFMADDSUB231PSZ256r
{ 5471, 5, 1, 0, 0, 0, 0x40295b60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5471 = VFMADDSUB231PSZ256rk
{ 5472, 5, 1, 0, 0, 0, 0x40695b60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5472 = VFMADDSUB231PSZ256rkz
{ 5473, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815b60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5473 = VFMADDSUB231PSZm
{ 5474, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815b60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5474 = VFMADDSUB231PSZmb
{ 5475, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5475 = VFMADDSUB231PSZmbk
{ 5476, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5476 = VFMADDSUB231PSZmbkz
{ 5477, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5477 = VFMADDSUB231PSZmk
{ 5478, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15b60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5478 = VFMADDSUB231PSZmkz
{ 5479, 4, 1, 0, 0, 0, 0x80815b60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5479 = VFMADDSUB231PSZr
{ 5480, 5, 1, 0, 0, 0, 0x409815b60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5480 = VFMADDSUB231PSZrb
{ 5481, 6, 1, 0, 0, 0, 0x409a15b60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5481 = VFMADDSUB231PSZrbk
{ 5482, 6, 1, 0, 0, 0, 0x409e15b60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5482 = VFMADDSUB231PSZrbkz
{ 5483, 5, 1, 0, 0, 0, 0x80a15b60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5483 = VFMADDSUB231PSZrk
{ 5484, 5, 1, 0, 0, 0, 0x80e15b60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5484 = VFMADDSUB231PSZrkz
{ 5485, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x52eb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5485 = VFMADDSUBPD4mr
{ 5486, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xd2eb004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #5486 = VFMADDSUBPD4mrY
{ 5487, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20005aeb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5487 = VFMADDSUBPD4rm
{ 5488, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000daeb004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #5488 = VFMADDSUBPD4rmY
{ 5489, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20005aeb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5489 = VFMADDSUBPD4rr
{ 5490, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2000daeb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5490 = VFMADDSUBPD4rrY
{ 5491, 4, 1, 0, 0, 0, 0xd2eb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5491 = VFMADDSUBPD4rrY_REV
{ 5492, 4, 1, 0, 0, 0, 0x52eb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5492 = VFMADDSUBPD4rr_REV
{ 5493, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cb30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5493 = VFMADDSUBPDr132m
{ 5494, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cb30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5494 = VFMADDSUBPDr132mY
{ 5495, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cb30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5495 = VFMADDSUBPDr132r
{ 5496, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cb30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5496 = VFMADDSUBPDr132rY
{ 5497, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d330009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5497 = VFMADDSUBPDr213m
{ 5498, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d330009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5498 = VFMADDSUBPDr213mY
{ 5499, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d330009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5499 = VFMADDSUBPDr213r
{ 5500, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d330009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5500 = VFMADDSUBPDr213rY
{ 5501, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1db30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5501 = VFMADDSUBPDr231m
{ 5502, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9db30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5502 = VFMADDSUBPDr231mY
{ 5503, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1db30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5503 = VFMADDSUBPDr231r
{ 5504, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9db30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5504 = VFMADDSUBPDr231rY
{ 5505, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x52e2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5505 = VFMADDSUBPS4mr
{ 5506, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xd2e2804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #5506 = VFMADDSUBPS4mrY
{ 5507, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20005ae2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5507 = VFMADDSUBPS4rm
{ 5508, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000dae2804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #5508 = VFMADDSUBPS4rmY
{ 5509, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20005ae2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5509 = VFMADDSUBPS4rr
{ 5510, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2000dae2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5510 = VFMADDSUBPS4rrY
{ 5511, 4, 1, 0, 0, 0, 0xd2e2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5511 = VFMADDSUBPS4rrY_REV
{ 5512, 4, 1, 0, 0, 0, 0x52e2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5512 = VFMADDSUBPS4rr_REV
{ 5513, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14b28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5513 = VFMADDSUBPSr132m
{ 5514, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94b28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5514 = VFMADDSUBPSr132mY
{ 5515, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14b28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5515 = VFMADDSUBPSr132r
{ 5516, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94b28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5516 = VFMADDSUBPSr132rY
{ 5517, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15328009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5517 = VFMADDSUBPSr213m
{ 5518, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95328009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5518 = VFMADDSUBPSr213mY
{ 5519, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15328009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5519 = VFMADDSUBPSr213r
{ 5520, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95328009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5520 = VFMADDSUBPSr213rY
{ 5521, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15b28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5521 = VFMADDSUBPSr231m
{ 5522, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95b28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5522 = VFMADDSUBPSr231mY
{ 5523, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15b28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5523 = VFMADDSUBPSr231r
{ 5524, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95b28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5524 = VFMADDSUBPSr231rY
{ 5525, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001cd60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5525 = VFMSUB132PDZ128m
{ 5526, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101cd60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5526 = VFMSUB132PDZ128mb
{ 5527, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121cd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5527 = VFMSUB132PDZ128mbk
{ 5528, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161cd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5528 = VFMSUB132PDZ128mbkz
{ 5529, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021cd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5529 = VFMSUB132PDZ128mk
{ 5530, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061cd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5530 = VFMSUB132PDZ128mkz
{ 5531, 4, 1, 0, 0, 0, 0x2001cd60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5531 = VFMSUB132PDZ128r
{ 5532, 5, 1, 0, 0, 0, 0x2021cd60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5532 = VFMSUB132PDZ128rk
{ 5533, 5, 1, 0, 0, 0, 0x2061cd60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5533 = VFMSUB132PDZ128rkz
{ 5534, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009cd60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5534 = VFMSUB132PDZ256m
{ 5535, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109cd60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5535 = VFMSUB132PDZ256mb
{ 5536, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129cd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5536 = VFMSUB132PDZ256mbk
{ 5537, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169cd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5537 = VFMSUB132PDZ256mbkz
{ 5538, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029cd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5538 = VFMSUB132PDZ256mk
{ 5539, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069cd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5539 = VFMSUB132PDZ256mkz
{ 5540, 4, 1, 0, 0, 0, 0x4009cd60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5540 = VFMSUB132PDZ256r
{ 5541, 5, 1, 0, 0, 0, 0x4029cd60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5541 = VFMSUB132PDZ256rk
{ 5542, 5, 1, 0, 0, 0, 0x4069cd60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5542 = VFMSUB132PDZ256rkz
{ 5543, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081cd60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5543 = VFMSUB132PDZm
{ 5544, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181cd60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5544 = VFMSUB132PDZmb
{ 5545, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1cd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5545 = VFMSUB132PDZmbk
{ 5546, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1cd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5546 = VFMSUB132PDZmbkz
{ 5547, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1cd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5547 = VFMSUB132PDZmk
{ 5548, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1cd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5548 = VFMSUB132PDZmkz
{ 5549, 4, 1, 0, 0, 0, 0x8081cd60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5549 = VFMSUB132PDZr
{ 5550, 5, 1, 0, 0, 0, 0x41181cd60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5550 = VFMSUB132PDZrb
{ 5551, 6, 1, 0, 0, 0, 0x411a1cd60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5551 = VFMSUB132PDZrbk
{ 5552, 6, 1, 0, 0, 0, 0x411e1cd60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5552 = VFMSUB132PDZrbkz
{ 5553, 5, 1, 0, 0, 0, 0x80a1cd60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5553 = VFMSUB132PDZrk
{ 5554, 5, 1, 0, 0, 0, 0x80e1cd60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5554 = VFMSUB132PDZrkz
{ 5555, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20014d60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5555 = VFMSUB132PSZ128m
{ 5556, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9014d60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5556 = VFMSUB132PSZ128mb
{ 5557, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9214d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5557 = VFMSUB132PSZ128mbk
{ 5558, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9614d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5558 = VFMSUB132PSZ128mbkz
{ 5559, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20214d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5559 = VFMSUB132PSZ128mk
{ 5560, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20614d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5560 = VFMSUB132PSZ128mkz
{ 5561, 4, 1, 0, 0, 0, 0x20014d60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5561 = VFMSUB132PSZ128r
{ 5562, 5, 1, 0, 0, 0, 0x20214d60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5562 = VFMSUB132PSZ128rk
{ 5563, 5, 1, 0, 0, 0, 0x20614d60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5563 = VFMSUB132PSZ128rkz
{ 5564, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40094d60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5564 = VFMSUB132PSZ256m
{ 5565, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9094d60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5565 = VFMSUB132PSZ256mb
{ 5566, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9294d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5566 = VFMSUB132PSZ256mbk
{ 5567, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9694d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5567 = VFMSUB132PSZ256mbkz
{ 5568, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40294d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5568 = VFMSUB132PSZ256mk
{ 5569, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40694d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5569 = VFMSUB132PSZ256mkz
{ 5570, 4, 1, 0, 0, 0, 0x40094d60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5570 = VFMSUB132PSZ256r
{ 5571, 5, 1, 0, 0, 0, 0x40294d60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5571 = VFMSUB132PSZ256rk
{ 5572, 5, 1, 0, 0, 0, 0x40694d60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5572 = VFMSUB132PSZ256rkz
{ 5573, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80814d60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5573 = VFMSUB132PSZm
{ 5574, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9814d60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5574 = VFMSUB132PSZmb
{ 5575, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a14d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5575 = VFMSUB132PSZmbk
{ 5576, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e14d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5576 = VFMSUB132PSZmbkz
{ 5577, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a14d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5577 = VFMSUB132PSZmk
{ 5578, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e14d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5578 = VFMSUB132PSZmkz
{ 5579, 4, 1, 0, 0, 0, 0x80814d60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5579 = VFMSUB132PSZr
{ 5580, 5, 1, 0, 0, 0, 0x409814d60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5580 = VFMSUB132PSZrb
{ 5581, 6, 1, 0, 0, 0, 0x409a14d60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5581 = VFMSUB132PSZrbk
{ 5582, 6, 1, 0, 0, 0, 0x409e14d60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5582 = VFMSUB132PSZrbkz
{ 5583, 5, 1, 0, 0, 0, 0x80a14d60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5583 = VFMSUB132PSZrk
{ 5584, 5, 1, 0, 0, 0, 0x80e14d60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5584 = VFMSUB132PSZrkz
{ 5585, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011cde0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #5585 = VFMSUB132SDm
{ 5586, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011cde0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5586 = VFMSUB132SDm_Int
{ 5587, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031cde0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5587 = VFMSUB132SDm_Intk
{ 5588, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071cde0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5588 = VFMSUB132SDm_Intkz
{ 5589, 4, 1, 0, 0, 0, 0x1011cde0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #5589 = VFMSUB132SDr
{ 5590, 4, 1, 0, 0, 0, 0x1011cde0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5590 = VFMSUB132SDr_Int
{ 5591, 5, 1, 0, 0, 0, 0x1031cde0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5591 = VFMSUB132SDr_Intk
{ 5592, 5, 1, 0, 0, 0, 0x1071cde0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5592 = VFMSUB132SDr_Intkz
{ 5593, 5, 1, 0, 0, 0, 0x41111cde0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5593 = VFMSUB132SDrb_Int
{ 5594, 6, 1, 0, 0, 0, 0x41131cde0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5594 = VFMSUB132SDrb_Intk
{ 5595, 6, 1, 0, 0, 0, 0x41171cde0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5595 = VFMSUB132SDrb_Intkz
{ 5596, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8114de0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #5596 = VFMSUB132SSm
{ 5597, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8114de0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5597 = VFMSUB132SSm_Int
{ 5598, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8314de0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5598 = VFMSUB132SSm_Intk
{ 5599, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8714de0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5599 = VFMSUB132SSm_Intkz
{ 5600, 4, 1, 0, 0, 0, 0x8114de0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #5600 = VFMSUB132SSr
{ 5601, 4, 1, 0, 0, 0, 0x8114de0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5601 = VFMSUB132SSr_Int
{ 5602, 5, 1, 0, 0, 0, 0x8314de0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5602 = VFMSUB132SSr_Intk
{ 5603, 5, 1, 0, 0, 0, 0x8714de0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5603 = VFMSUB132SSr_Intkz
{ 5604, 5, 1, 0, 0, 0, 0x409114de0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5604 = VFMSUB132SSrb_Int
{ 5605, 6, 1, 0, 0, 0, 0x409314de0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5605 = VFMSUB132SSrb_Intk
{ 5606, 6, 1, 0, 0, 0, 0x409714de0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5606 = VFMSUB132SSrb_Intkz
{ 5607, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001d560009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5607 = VFMSUB213PDZ128m
{ 5608, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101d560009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5608 = VFMSUB213PDZ128mb
{ 5609, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121d560009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5609 = VFMSUB213PDZ128mbk
{ 5610, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161d560009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5610 = VFMSUB213PDZ128mbkz
{ 5611, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021d560009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5611 = VFMSUB213PDZ128mk
{ 5612, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061d560009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5612 = VFMSUB213PDZ128mkz
{ 5613, 4, 1, 0, 0, 0, 0x2001d560009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5613 = VFMSUB213PDZ128r
{ 5614, 5, 1, 0, 0, 0, 0x2021d560009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5614 = VFMSUB213PDZ128rk
{ 5615, 5, 1, 0, 0, 0, 0x2061d560009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5615 = VFMSUB213PDZ128rkz
{ 5616, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009d560009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5616 = VFMSUB213PDZ256m
{ 5617, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109d560009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5617 = VFMSUB213PDZ256mb
{ 5618, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129d560009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5618 = VFMSUB213PDZ256mbk
{ 5619, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169d560009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5619 = VFMSUB213PDZ256mbkz
{ 5620, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029d560009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5620 = VFMSUB213PDZ256mk
{ 5621, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069d560009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5621 = VFMSUB213PDZ256mkz
{ 5622, 4, 1, 0, 0, 0, 0x4009d560009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5622 = VFMSUB213PDZ256r
{ 5623, 5, 1, 0, 0, 0, 0x4029d560009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5623 = VFMSUB213PDZ256rk
{ 5624, 5, 1, 0, 0, 0, 0x4069d560009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5624 = VFMSUB213PDZ256rkz
{ 5625, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081d560009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5625 = VFMSUB213PDZm
{ 5626, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181d560009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5626 = VFMSUB213PDZmb
{ 5627, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1d560009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5627 = VFMSUB213PDZmbk
{ 5628, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1d560009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5628 = VFMSUB213PDZmbkz
{ 5629, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1d560009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5629 = VFMSUB213PDZmk
{ 5630, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1d560009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5630 = VFMSUB213PDZmkz
{ 5631, 4, 1, 0, 0, 0, 0x8081d560009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5631 = VFMSUB213PDZr
{ 5632, 5, 1, 0, 0, 0, 0x41181d560009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5632 = VFMSUB213PDZrb
{ 5633, 6, 1, 0, 0, 0, 0x411a1d560009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5633 = VFMSUB213PDZrbk
{ 5634, 6, 1, 0, 0, 0, 0x411e1d560009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5634 = VFMSUB213PDZrbkz
{ 5635, 5, 1, 0, 0, 0, 0x80a1d560009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5635 = VFMSUB213PDZrk
{ 5636, 5, 1, 0, 0, 0, 0x80e1d560009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5636 = VFMSUB213PDZrkz
{ 5637, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015560009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5637 = VFMSUB213PSZ128m
{ 5638, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015560009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5638 = VFMSUB213PSZ128mb
{ 5639, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215560009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5639 = VFMSUB213PSZ128mbk
{ 5640, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615560009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5640 = VFMSUB213PSZ128mbkz
{ 5641, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215560009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5641 = VFMSUB213PSZ128mk
{ 5642, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615560009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5642 = VFMSUB213PSZ128mkz
{ 5643, 4, 1, 0, 0, 0, 0x20015560009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5643 = VFMSUB213PSZ128r
{ 5644, 5, 1, 0, 0, 0, 0x20215560009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5644 = VFMSUB213PSZ128rk
{ 5645, 5, 1, 0, 0, 0, 0x20615560009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5645 = VFMSUB213PSZ128rkz
{ 5646, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095560009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5646 = VFMSUB213PSZ256m
{ 5647, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095560009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5647 = VFMSUB213PSZ256mb
{ 5648, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295560009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5648 = VFMSUB213PSZ256mbk
{ 5649, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695560009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5649 = VFMSUB213PSZ256mbkz
{ 5650, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295560009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5650 = VFMSUB213PSZ256mk
{ 5651, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695560009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5651 = VFMSUB213PSZ256mkz
{ 5652, 4, 1, 0, 0, 0, 0x40095560009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5652 = VFMSUB213PSZ256r
{ 5653, 5, 1, 0, 0, 0, 0x40295560009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5653 = VFMSUB213PSZ256rk
{ 5654, 5, 1, 0, 0, 0, 0x40695560009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5654 = VFMSUB213PSZ256rkz
{ 5655, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815560009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5655 = VFMSUB213PSZm
{ 5656, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815560009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5656 = VFMSUB213PSZmb
{ 5657, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15560009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5657 = VFMSUB213PSZmbk
{ 5658, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15560009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5658 = VFMSUB213PSZmbkz
{ 5659, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15560009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5659 = VFMSUB213PSZmk
{ 5660, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15560009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5660 = VFMSUB213PSZmkz
{ 5661, 4, 1, 0, 0, 0, 0x80815560009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5661 = VFMSUB213PSZr
{ 5662, 5, 1, 0, 0, 0, 0x409815560009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5662 = VFMSUB213PSZrb
{ 5663, 6, 1, 0, 0, 0, 0x409a15560009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5663 = VFMSUB213PSZrbk
{ 5664, 6, 1, 0, 0, 0, 0x409e15560009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5664 = VFMSUB213PSZrbkz
{ 5665, 5, 1, 0, 0, 0, 0x80a15560009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5665 = VFMSUB213PSZrk
{ 5666, 5, 1, 0, 0, 0, 0x80e15560009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5666 = VFMSUB213PSZrkz
{ 5667, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011d5e0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #5667 = VFMSUB213SDm
{ 5668, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011d5e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5668 = VFMSUB213SDm_Int
{ 5669, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031d5e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5669 = VFMSUB213SDm_Intk
{ 5670, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071d5e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5670 = VFMSUB213SDm_Intkz
{ 5671, 4, 1, 0, 0, 0, 0x1011d5e0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #5671 = VFMSUB213SDr
{ 5672, 4, 1, 0, 0, 0, 0x1011d5e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5672 = VFMSUB213SDr_Int
{ 5673, 5, 1, 0, 0, 0, 0x1031d5e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5673 = VFMSUB213SDr_Intk
{ 5674, 5, 1, 0, 0, 0, 0x1071d5e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5674 = VFMSUB213SDr_Intkz
{ 5675, 5, 1, 0, 0, 0, 0x41111d5e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5675 = VFMSUB213SDrb_Int
{ 5676, 6, 1, 0, 0, 0, 0x41131d5e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5676 = VFMSUB213SDrb_Intk
{ 5677, 6, 1, 0, 0, 0, 0x41171d5e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5677 = VFMSUB213SDrb_Intkz
{ 5678, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81155e0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #5678 = VFMSUB213SSm
{ 5679, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81155e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5679 = VFMSUB213SSm_Int
{ 5680, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x83155e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5680 = VFMSUB213SSm_Intk
{ 5681, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x87155e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5681 = VFMSUB213SSm_Intkz
{ 5682, 4, 1, 0, 0, 0, 0x81155e0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #5682 = VFMSUB213SSr
{ 5683, 4, 1, 0, 0, 0, 0x81155e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5683 = VFMSUB213SSr_Int
{ 5684, 5, 1, 0, 0, 0, 0x83155e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5684 = VFMSUB213SSr_Intk
{ 5685, 5, 1, 0, 0, 0, 0x87155e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5685 = VFMSUB213SSr_Intkz
{ 5686, 5, 1, 0, 0, 0, 0x4091155e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5686 = VFMSUB213SSrb_Int
{ 5687, 6, 1, 0, 0, 0, 0x4093155e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5687 = VFMSUB213SSrb_Intk
{ 5688, 6, 1, 0, 0, 0, 0x4097155e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5688 = VFMSUB213SSrb_Intkz
{ 5689, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001dd60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5689 = VFMSUB231PDZ128m
{ 5690, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101dd60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5690 = VFMSUB231PDZ128mb
{ 5691, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121dd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5691 = VFMSUB231PDZ128mbk
{ 5692, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161dd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5692 = VFMSUB231PDZ128mbkz
{ 5693, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021dd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5693 = VFMSUB231PDZ128mk
{ 5694, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061dd60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5694 = VFMSUB231PDZ128mkz
{ 5695, 4, 1, 0, 0, 0, 0x2001dd60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5695 = VFMSUB231PDZ128r
{ 5696, 5, 1, 0, 0, 0, 0x2021dd60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5696 = VFMSUB231PDZ128rk
{ 5697, 5, 1, 0, 0, 0, 0x2061dd60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5697 = VFMSUB231PDZ128rkz
{ 5698, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009dd60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5698 = VFMSUB231PDZ256m
{ 5699, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109dd60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5699 = VFMSUB231PDZ256mb
{ 5700, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129dd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5700 = VFMSUB231PDZ256mbk
{ 5701, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169dd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5701 = VFMSUB231PDZ256mbkz
{ 5702, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029dd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5702 = VFMSUB231PDZ256mk
{ 5703, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069dd60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5703 = VFMSUB231PDZ256mkz
{ 5704, 4, 1, 0, 0, 0, 0x4009dd60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5704 = VFMSUB231PDZ256r
{ 5705, 5, 1, 0, 0, 0, 0x4029dd60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5705 = VFMSUB231PDZ256rk
{ 5706, 5, 1, 0, 0, 0, 0x4069dd60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5706 = VFMSUB231PDZ256rkz
{ 5707, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081dd60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5707 = VFMSUB231PDZm
{ 5708, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181dd60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5708 = VFMSUB231PDZmb
{ 5709, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1dd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5709 = VFMSUB231PDZmbk
{ 5710, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1dd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5710 = VFMSUB231PDZmbkz
{ 5711, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1dd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5711 = VFMSUB231PDZmk
{ 5712, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1dd60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5712 = VFMSUB231PDZmkz
{ 5713, 4, 1, 0, 0, 0, 0x8081dd60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5713 = VFMSUB231PDZr
{ 5714, 5, 1, 0, 0, 0, 0x41181dd60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5714 = VFMSUB231PDZrb
{ 5715, 6, 1, 0, 0, 0, 0x411a1dd60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5715 = VFMSUB231PDZrbk
{ 5716, 6, 1, 0, 0, 0, 0x411e1dd60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5716 = VFMSUB231PDZrbkz
{ 5717, 5, 1, 0, 0, 0, 0x80a1dd60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5717 = VFMSUB231PDZrk
{ 5718, 5, 1, 0, 0, 0, 0x80e1dd60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5718 = VFMSUB231PDZrkz
{ 5719, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015d60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5719 = VFMSUB231PSZ128m
{ 5720, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015d60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5720 = VFMSUB231PSZ128mb
{ 5721, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5721 = VFMSUB231PSZ128mbk
{ 5722, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5722 = VFMSUB231PSZ128mbkz
{ 5723, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5723 = VFMSUB231PSZ128mk
{ 5724, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615d60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5724 = VFMSUB231PSZ128mkz
{ 5725, 4, 1, 0, 0, 0, 0x20015d60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5725 = VFMSUB231PSZ128r
{ 5726, 5, 1, 0, 0, 0, 0x20215d60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5726 = VFMSUB231PSZ128rk
{ 5727, 5, 1, 0, 0, 0, 0x20615d60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5727 = VFMSUB231PSZ128rkz
{ 5728, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095d60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5728 = VFMSUB231PSZ256m
{ 5729, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095d60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5729 = VFMSUB231PSZ256mb
{ 5730, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5730 = VFMSUB231PSZ256mbk
{ 5731, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5731 = VFMSUB231PSZ256mbkz
{ 5732, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5732 = VFMSUB231PSZ256mk
{ 5733, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695d60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5733 = VFMSUB231PSZ256mkz
{ 5734, 4, 1, 0, 0, 0, 0x40095d60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5734 = VFMSUB231PSZ256r
{ 5735, 5, 1, 0, 0, 0, 0x40295d60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5735 = VFMSUB231PSZ256rk
{ 5736, 5, 1, 0, 0, 0, 0x40695d60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5736 = VFMSUB231PSZ256rkz
{ 5737, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815d60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5737 = VFMSUB231PSZm
{ 5738, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815d60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5738 = VFMSUB231PSZmb
{ 5739, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5739 = VFMSUB231PSZmbk
{ 5740, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5740 = VFMSUB231PSZmbkz
{ 5741, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5741 = VFMSUB231PSZmk
{ 5742, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15d60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5742 = VFMSUB231PSZmkz
{ 5743, 4, 1, 0, 0, 0, 0x80815d60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5743 = VFMSUB231PSZr
{ 5744, 5, 1, 0, 0, 0, 0x409815d60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5744 = VFMSUB231PSZrb
{ 5745, 6, 1, 0, 0, 0, 0x409a15d60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5745 = VFMSUB231PSZrbk
{ 5746, 6, 1, 0, 0, 0, 0x409e15d60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5746 = VFMSUB231PSZrbkz
{ 5747, 5, 1, 0, 0, 0, 0x80a15d60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5747 = VFMSUB231PSZrk
{ 5748, 5, 1, 0, 0, 0, 0x80e15d60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5748 = VFMSUB231PSZrkz
{ 5749, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011dde0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #5749 = VFMSUB231SDm
{ 5750, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011dde0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5750 = VFMSUB231SDm_Int
{ 5751, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031dde0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5751 = VFMSUB231SDm_Intk
{ 5752, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071dde0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5752 = VFMSUB231SDm_Intkz
{ 5753, 4, 1, 0, 0, 0, 0x1011dde0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #5753 = VFMSUB231SDr
{ 5754, 4, 1, 0, 0, 0, 0x1011dde0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5754 = VFMSUB231SDr_Int
{ 5755, 5, 1, 0, 0, 0, 0x1031dde0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5755 = VFMSUB231SDr_Intk
{ 5756, 5, 1, 0, 0, 0, 0x1071dde0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5756 = VFMSUB231SDr_Intkz
{ 5757, 5, 1, 0, 0, 0, 0x41111dde0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5757 = VFMSUB231SDrb_Int
{ 5758, 6, 1, 0, 0, 0, 0x41131dde0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5758 = VFMSUB231SDrb_Intk
{ 5759, 6, 1, 0, 0, 0, 0x41171dde0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5759 = VFMSUB231SDrb_Intkz
{ 5760, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8115de0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #5760 = VFMSUB231SSm
{ 5761, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8115de0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5761 = VFMSUB231SSm_Int
{ 5762, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8315de0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5762 = VFMSUB231SSm_Intk
{ 5763, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8715de0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #5763 = VFMSUB231SSm_Intkz
{ 5764, 4, 1, 0, 0, 0, 0x8115de0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #5764 = VFMSUB231SSr
{ 5765, 4, 1, 0, 0, 0, 0x8115de0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5765 = VFMSUB231SSr_Int
{ 5766, 5, 1, 0, 0, 0, 0x8315de0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5766 = VFMSUB231SSr_Intk
{ 5767, 5, 1, 0, 0, 0, 0x8715de0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #5767 = VFMSUB231SSr_Intkz
{ 5768, 5, 1, 0, 0, 0, 0x409115de0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #5768 = VFMSUB231SSrb_Int
{ 5769, 6, 1, 0, 0, 0, 0x409315de0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5769 = VFMSUB231SSrb_Intk
{ 5770, 6, 1, 0, 0, 0, 0x409715de0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #5770 = VFMSUB231SSrb_Intkz
{ 5771, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001cbe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5771 = VFMSUBADD132PDZ128m
{ 5772, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101cbe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5772 = VFMSUBADD132PDZ128mb
{ 5773, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121cbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5773 = VFMSUBADD132PDZ128mbk
{ 5774, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161cbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5774 = VFMSUBADD132PDZ128mbkz
{ 5775, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021cbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5775 = VFMSUBADD132PDZ128mk
{ 5776, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061cbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5776 = VFMSUBADD132PDZ128mkz
{ 5777, 4, 1, 0, 0, 0, 0x2001cbe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5777 = VFMSUBADD132PDZ128r
{ 5778, 5, 1, 0, 0, 0, 0x2021cbe0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5778 = VFMSUBADD132PDZ128rk
{ 5779, 5, 1, 0, 0, 0, 0x2061cbe0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5779 = VFMSUBADD132PDZ128rkz
{ 5780, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009cbe0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5780 = VFMSUBADD132PDZ256m
{ 5781, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109cbe0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5781 = VFMSUBADD132PDZ256mb
{ 5782, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129cbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5782 = VFMSUBADD132PDZ256mbk
{ 5783, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169cbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5783 = VFMSUBADD132PDZ256mbkz
{ 5784, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029cbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5784 = VFMSUBADD132PDZ256mk
{ 5785, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069cbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5785 = VFMSUBADD132PDZ256mkz
{ 5786, 4, 1, 0, 0, 0, 0x4009cbe0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5786 = VFMSUBADD132PDZ256r
{ 5787, 5, 1, 0, 0, 0, 0x4029cbe0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5787 = VFMSUBADD132PDZ256rk
{ 5788, 5, 1, 0, 0, 0, 0x4069cbe0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5788 = VFMSUBADD132PDZ256rkz
{ 5789, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081cbe0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5789 = VFMSUBADD132PDZm
{ 5790, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181cbe0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5790 = VFMSUBADD132PDZmb
{ 5791, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1cbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5791 = VFMSUBADD132PDZmbk
{ 5792, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1cbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5792 = VFMSUBADD132PDZmbkz
{ 5793, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1cbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5793 = VFMSUBADD132PDZmk
{ 5794, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1cbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5794 = VFMSUBADD132PDZmkz
{ 5795, 4, 1, 0, 0, 0, 0x8081cbe0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5795 = VFMSUBADD132PDZr
{ 5796, 5, 1, 0, 0, 0, 0x41181cbe0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5796 = VFMSUBADD132PDZrb
{ 5797, 6, 1, 0, 0, 0, 0x411a1cbe0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5797 = VFMSUBADD132PDZrbk
{ 5798, 6, 1, 0, 0, 0, 0x411e1cbe0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5798 = VFMSUBADD132PDZrbkz
{ 5799, 5, 1, 0, 0, 0, 0x80a1cbe0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5799 = VFMSUBADD132PDZrk
{ 5800, 5, 1, 0, 0, 0, 0x80e1cbe0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5800 = VFMSUBADD132PDZrkz
{ 5801, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20014be0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5801 = VFMSUBADD132PSZ128m
{ 5802, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9014be0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5802 = VFMSUBADD132PSZ128mb
{ 5803, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9214be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5803 = VFMSUBADD132PSZ128mbk
{ 5804, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9614be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5804 = VFMSUBADD132PSZ128mbkz
{ 5805, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20214be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5805 = VFMSUBADD132PSZ128mk
{ 5806, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20614be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5806 = VFMSUBADD132PSZ128mkz
{ 5807, 4, 1, 0, 0, 0, 0x20014be0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5807 = VFMSUBADD132PSZ128r
{ 5808, 5, 1, 0, 0, 0, 0x20214be0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5808 = VFMSUBADD132PSZ128rk
{ 5809, 5, 1, 0, 0, 0, 0x20614be0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5809 = VFMSUBADD132PSZ128rkz
{ 5810, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40094be0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5810 = VFMSUBADD132PSZ256m
{ 5811, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9094be0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5811 = VFMSUBADD132PSZ256mb
{ 5812, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9294be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5812 = VFMSUBADD132PSZ256mbk
{ 5813, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9694be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5813 = VFMSUBADD132PSZ256mbkz
{ 5814, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40294be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5814 = VFMSUBADD132PSZ256mk
{ 5815, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40694be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5815 = VFMSUBADD132PSZ256mkz
{ 5816, 4, 1, 0, 0, 0, 0x40094be0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5816 = VFMSUBADD132PSZ256r
{ 5817, 5, 1, 0, 0, 0, 0x40294be0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5817 = VFMSUBADD132PSZ256rk
{ 5818, 5, 1, 0, 0, 0, 0x40694be0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5818 = VFMSUBADD132PSZ256rkz
{ 5819, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80814be0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5819 = VFMSUBADD132PSZm
{ 5820, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9814be0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5820 = VFMSUBADD132PSZmb
{ 5821, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a14be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5821 = VFMSUBADD132PSZmbk
{ 5822, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e14be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5822 = VFMSUBADD132PSZmbkz
{ 5823, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a14be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5823 = VFMSUBADD132PSZmk
{ 5824, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e14be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5824 = VFMSUBADD132PSZmkz
{ 5825, 4, 1, 0, 0, 0, 0x80814be0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5825 = VFMSUBADD132PSZr
{ 5826, 5, 1, 0, 0, 0, 0x409814be0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5826 = VFMSUBADD132PSZrb
{ 5827, 6, 1, 0, 0, 0, 0x409a14be0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5827 = VFMSUBADD132PSZrbk
{ 5828, 6, 1, 0, 0, 0, 0x409e14be0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5828 = VFMSUBADD132PSZrbkz
{ 5829, 5, 1, 0, 0, 0, 0x80a14be0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5829 = VFMSUBADD132PSZrk
{ 5830, 5, 1, 0, 0, 0, 0x80e14be0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5830 = VFMSUBADD132PSZrkz
{ 5831, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001d3e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5831 = VFMSUBADD213PDZ128m
{ 5832, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101d3e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5832 = VFMSUBADD213PDZ128mb
{ 5833, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121d3e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5833 = VFMSUBADD213PDZ128mbk
{ 5834, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161d3e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5834 = VFMSUBADD213PDZ128mbkz
{ 5835, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021d3e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5835 = VFMSUBADD213PDZ128mk
{ 5836, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061d3e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5836 = VFMSUBADD213PDZ128mkz
{ 5837, 4, 1, 0, 0, 0, 0x2001d3e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5837 = VFMSUBADD213PDZ128r
{ 5838, 5, 1, 0, 0, 0, 0x2021d3e0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5838 = VFMSUBADD213PDZ128rk
{ 5839, 5, 1, 0, 0, 0, 0x2061d3e0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5839 = VFMSUBADD213PDZ128rkz
{ 5840, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009d3e0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5840 = VFMSUBADD213PDZ256m
{ 5841, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109d3e0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5841 = VFMSUBADD213PDZ256mb
{ 5842, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129d3e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5842 = VFMSUBADD213PDZ256mbk
{ 5843, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169d3e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5843 = VFMSUBADD213PDZ256mbkz
{ 5844, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029d3e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5844 = VFMSUBADD213PDZ256mk
{ 5845, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069d3e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5845 = VFMSUBADD213PDZ256mkz
{ 5846, 4, 1, 0, 0, 0, 0x4009d3e0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5846 = VFMSUBADD213PDZ256r
{ 5847, 5, 1, 0, 0, 0, 0x4029d3e0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5847 = VFMSUBADD213PDZ256rk
{ 5848, 5, 1, 0, 0, 0, 0x4069d3e0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5848 = VFMSUBADD213PDZ256rkz
{ 5849, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081d3e0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5849 = VFMSUBADD213PDZm
{ 5850, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181d3e0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5850 = VFMSUBADD213PDZmb
{ 5851, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1d3e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5851 = VFMSUBADD213PDZmbk
{ 5852, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1d3e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5852 = VFMSUBADD213PDZmbkz
{ 5853, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1d3e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5853 = VFMSUBADD213PDZmk
{ 5854, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1d3e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5854 = VFMSUBADD213PDZmkz
{ 5855, 4, 1, 0, 0, 0, 0x8081d3e0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5855 = VFMSUBADD213PDZr
{ 5856, 5, 1, 0, 0, 0, 0x41181d3e0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5856 = VFMSUBADD213PDZrb
{ 5857, 6, 1, 0, 0, 0, 0x411a1d3e0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5857 = VFMSUBADD213PDZrbk
{ 5858, 6, 1, 0, 0, 0, 0x411e1d3e0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5858 = VFMSUBADD213PDZrbkz
{ 5859, 5, 1, 0, 0, 0, 0x80a1d3e0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5859 = VFMSUBADD213PDZrk
{ 5860, 5, 1, 0, 0, 0, 0x80e1d3e0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5860 = VFMSUBADD213PDZrkz
{ 5861, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200153e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5861 = VFMSUBADD213PSZ128m
{ 5862, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90153e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5862 = VFMSUBADD213PSZ128mb
{ 5863, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92153e0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5863 = VFMSUBADD213PSZ128mbk
{ 5864, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96153e0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5864 = VFMSUBADD213PSZ128mbkz
{ 5865, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202153e0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5865 = VFMSUBADD213PSZ128mk
{ 5866, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206153e0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5866 = VFMSUBADD213PSZ128mkz
{ 5867, 4, 1, 0, 0, 0, 0x200153e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5867 = VFMSUBADD213PSZ128r
{ 5868, 5, 1, 0, 0, 0, 0x202153e0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5868 = VFMSUBADD213PSZ128rk
{ 5869, 5, 1, 0, 0, 0, 0x206153e0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5869 = VFMSUBADD213PSZ128rkz
{ 5870, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400953e0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5870 = VFMSUBADD213PSZ256m
{ 5871, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90953e0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5871 = VFMSUBADD213PSZ256mb
{ 5872, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92953e0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5872 = VFMSUBADD213PSZ256mbk
{ 5873, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96953e0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5873 = VFMSUBADD213PSZ256mbkz
{ 5874, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402953e0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5874 = VFMSUBADD213PSZ256mk
{ 5875, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406953e0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5875 = VFMSUBADD213PSZ256mkz
{ 5876, 4, 1, 0, 0, 0, 0x400953e0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5876 = VFMSUBADD213PSZ256r
{ 5877, 5, 1, 0, 0, 0, 0x402953e0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5877 = VFMSUBADD213PSZ256rk
{ 5878, 5, 1, 0, 0, 0, 0x406953e0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5878 = VFMSUBADD213PSZ256rkz
{ 5879, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808153e0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5879 = VFMSUBADD213PSZm
{ 5880, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98153e0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5880 = VFMSUBADD213PSZmb
{ 5881, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a153e0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5881 = VFMSUBADD213PSZmbk
{ 5882, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e153e0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5882 = VFMSUBADD213PSZmbkz
{ 5883, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a153e0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5883 = VFMSUBADD213PSZmk
{ 5884, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e153e0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5884 = VFMSUBADD213PSZmkz
{ 5885, 4, 1, 0, 0, 0, 0x808153e0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5885 = VFMSUBADD213PSZr
{ 5886, 5, 1, 0, 0, 0, 0x4098153e0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5886 = VFMSUBADD213PSZrb
{ 5887, 6, 1, 0, 0, 0, 0x409a153e0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5887 = VFMSUBADD213PSZrbk
{ 5888, 6, 1, 0, 0, 0, 0x409e153e0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5888 = VFMSUBADD213PSZrbkz
{ 5889, 5, 1, 0, 0, 0, 0x80a153e0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5889 = VFMSUBADD213PSZrk
{ 5890, 5, 1, 0, 0, 0, 0x80e153e0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5890 = VFMSUBADD213PSZrkz
{ 5891, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001dbe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5891 = VFMSUBADD231PDZ128m
{ 5892, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101dbe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5892 = VFMSUBADD231PDZ128mb
{ 5893, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121dbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5893 = VFMSUBADD231PDZ128mbk
{ 5894, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161dbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5894 = VFMSUBADD231PDZ128mbkz
{ 5895, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021dbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5895 = VFMSUBADD231PDZ128mk
{ 5896, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061dbe0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #5896 = VFMSUBADD231PDZ128mkz
{ 5897, 4, 1, 0, 0, 0, 0x2001dbe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5897 = VFMSUBADD231PDZ128r
{ 5898, 5, 1, 0, 0, 0, 0x2021dbe0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5898 = VFMSUBADD231PDZ128rk
{ 5899, 5, 1, 0, 0, 0, 0x2061dbe0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #5899 = VFMSUBADD231PDZ128rkz
{ 5900, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009dbe0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5900 = VFMSUBADD231PDZ256m
{ 5901, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109dbe0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5901 = VFMSUBADD231PDZ256mb
{ 5902, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129dbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5902 = VFMSUBADD231PDZ256mbk
{ 5903, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169dbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5903 = VFMSUBADD231PDZ256mbkz
{ 5904, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029dbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5904 = VFMSUBADD231PDZ256mk
{ 5905, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069dbe0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #5905 = VFMSUBADD231PDZ256mkz
{ 5906, 4, 1, 0, 0, 0, 0x4009dbe0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5906 = VFMSUBADD231PDZ256r
{ 5907, 5, 1, 0, 0, 0, 0x4029dbe0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5907 = VFMSUBADD231PDZ256rk
{ 5908, 5, 1, 0, 0, 0, 0x4069dbe0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #5908 = VFMSUBADD231PDZ256rkz
{ 5909, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081dbe0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5909 = VFMSUBADD231PDZm
{ 5910, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181dbe0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5910 = VFMSUBADD231PDZmb
{ 5911, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1dbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5911 = VFMSUBADD231PDZmbk
{ 5912, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1dbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5912 = VFMSUBADD231PDZmbkz
{ 5913, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1dbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5913 = VFMSUBADD231PDZmk
{ 5914, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1dbe0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #5914 = VFMSUBADD231PDZmkz
{ 5915, 4, 1, 0, 0, 0, 0x8081dbe0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5915 = VFMSUBADD231PDZr
{ 5916, 5, 1, 0, 0, 0, 0x41181dbe0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5916 = VFMSUBADD231PDZrb
{ 5917, 6, 1, 0, 0, 0, 0x411a1dbe0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5917 = VFMSUBADD231PDZrbk
{ 5918, 6, 1, 0, 0, 0, 0x411e1dbe0009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #5918 = VFMSUBADD231PDZrbkz
{ 5919, 5, 1, 0, 0, 0, 0x80a1dbe0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5919 = VFMSUBADD231PDZrk
{ 5920, 5, 1, 0, 0, 0, 0x80e1dbe0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #5920 = VFMSUBADD231PDZrkz
{ 5921, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015be0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5921 = VFMSUBADD231PSZ128m
{ 5922, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015be0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #5922 = VFMSUBADD231PSZ128mb
{ 5923, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5923 = VFMSUBADD231PSZ128mbk
{ 5924, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5924 = VFMSUBADD231PSZ128mbkz
{ 5925, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5925 = VFMSUBADD231PSZ128mk
{ 5926, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615be0009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #5926 = VFMSUBADD231PSZ128mkz
{ 5927, 4, 1, 0, 0, 0, 0x20015be0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #5927 = VFMSUBADD231PSZ128r
{ 5928, 5, 1, 0, 0, 0, 0x20215be0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5928 = VFMSUBADD231PSZ128rk
{ 5929, 5, 1, 0, 0, 0, 0x20615be0009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #5929 = VFMSUBADD231PSZ128rkz
{ 5930, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095be0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5930 = VFMSUBADD231PSZ256m
{ 5931, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095be0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #5931 = VFMSUBADD231PSZ256mb
{ 5932, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5932 = VFMSUBADD231PSZ256mbk
{ 5933, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5933 = VFMSUBADD231PSZ256mbkz
{ 5934, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5934 = VFMSUBADD231PSZ256mk
{ 5935, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695be0009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #5935 = VFMSUBADD231PSZ256mkz
{ 5936, 4, 1, 0, 0, 0, 0x40095be0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #5936 = VFMSUBADD231PSZ256r
{ 5937, 5, 1, 0, 0, 0, 0x40295be0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5937 = VFMSUBADD231PSZ256rk
{ 5938, 5, 1, 0, 0, 0, 0x40695be0009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #5938 = VFMSUBADD231PSZ256rkz
{ 5939, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815be0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5939 = VFMSUBADD231PSZm
{ 5940, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815be0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #5940 = VFMSUBADD231PSZmb
{ 5941, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5941 = VFMSUBADD231PSZmbk
{ 5942, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5942 = VFMSUBADD231PSZmbkz
{ 5943, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5943 = VFMSUBADD231PSZmk
{ 5944, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15be0009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #5944 = VFMSUBADD231PSZmkz
{ 5945, 4, 1, 0, 0, 0, 0x80815be0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #5945 = VFMSUBADD231PSZr
{ 5946, 5, 1, 0, 0, 0, 0x409815be0009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #5946 = VFMSUBADD231PSZrb
{ 5947, 6, 1, 0, 0, 0, 0x409a15be0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5947 = VFMSUBADD231PSZrbk
{ 5948, 6, 1, 0, 0, 0, 0x409e15be0009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #5948 = VFMSUBADD231PSZrbkz
{ 5949, 5, 1, 0, 0, 0, 0x80a15be0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5949 = VFMSUBADD231PSZrk
{ 5950, 5, 1, 0, 0, 0, 0x80e15be0009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #5950 = VFMSUBADD231PSZrkz
{ 5951, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x52fb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5951 = VFMSUBADDPD4mr
{ 5952, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xd2fb004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #5952 = VFMSUBADDPD4mrY
{ 5953, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20005afb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5953 = VFMSUBADDPD4rm
{ 5954, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000dafb004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #5954 = VFMSUBADDPD4rmY
{ 5955, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20005afb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5955 = VFMSUBADDPD4rr
{ 5956, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2000dafb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5956 = VFMSUBADDPD4rrY
{ 5957, 4, 1, 0, 0, 0, 0xd2fb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5957 = VFMSUBADDPD4rrY_REV
{ 5958, 4, 1, 0, 0, 0, 0x52fb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5958 = VFMSUBADDPD4rr_REV
{ 5959, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cbb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5959 = VFMSUBADDPDr132m
{ 5960, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cbb0009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5960 = VFMSUBADDPDr132mY
{ 5961, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cbb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5961 = VFMSUBADDPDr132r
{ 5962, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cbb0009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5962 = VFMSUBADDPDr132rY
{ 5963, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d3b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5963 = VFMSUBADDPDr213m
{ 5964, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d3b0009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5964 = VFMSUBADDPDr213mY
{ 5965, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d3b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5965 = VFMSUBADDPDr213r
{ 5966, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d3b0009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5966 = VFMSUBADDPDr213rY
{ 5967, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1dbb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5967 = VFMSUBADDPDr231m
{ 5968, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9dbb0009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5968 = VFMSUBADDPDr231mY
{ 5969, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1dbb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5969 = VFMSUBADDPDr231r
{ 5970, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9dbb0009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5970 = VFMSUBADDPDr231rY
{ 5971, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x52f2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5971 = VFMSUBADDPS4mr
{ 5972, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xd2f2804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #5972 = VFMSUBADDPS4mrY
{ 5973, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20005af2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5973 = VFMSUBADDPS4rm
{ 5974, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000daf2804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #5974 = VFMSUBADDPS4rmY
{ 5975, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20005af2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5975 = VFMSUBADDPS4rr
{ 5976, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2000daf2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5976 = VFMSUBADDPS4rrY
{ 5977, 4, 1, 0, 0, 0, 0xd2f2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5977 = VFMSUBADDPS4rrY_REV
{ 5978, 4, 1, 0, 0, 0, 0x52f2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5978 = VFMSUBADDPS4rr_REV
{ 5979, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14ba8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5979 = VFMSUBADDPSr132m
{ 5980, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94ba8009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5980 = VFMSUBADDPSr132mY
{ 5981, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14ba8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5981 = VFMSUBADDPSr132r
{ 5982, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94ba8009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5982 = VFMSUBADDPSr132rY
{ 5983, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x153a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5983 = VFMSUBADDPSr213m
{ 5984, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x953a8009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5984 = VFMSUBADDPSr213mY
{ 5985, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x153a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5985 = VFMSUBADDPSr213r
{ 5986, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x953a8009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5986 = VFMSUBADDPSr213rY
{ 5987, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15ba8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5987 = VFMSUBADDPSr231m
{ 5988, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95ba8009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #5988 = VFMSUBADDPSr231mY
{ 5989, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15ba8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #5989 = VFMSUBADDPSr231r
{ 5990, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95ba8009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #5990 = VFMSUBADDPSr231rY
{ 5991, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x536b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #5991 = VFMSUBPD4mr
{ 5992, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0xd36b004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #5992 = VFMSUBPD4mrY
{ 5993, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20005b6b004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #5993 = VFMSUBPD4rm
{ 5994, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x2000db6b004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #5994 = VFMSUBPD4rmY
{ 5995, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20005b6b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5995 = VFMSUBPD4rr
{ 5996, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x2000db6b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5996 = VFMSUBPD4rrY
{ 5997, 4, 1, 0, 926, 0, 0xd36b004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #5997 = VFMSUBPD4rrY_REV
{ 5998, 4, 1, 0, 926, 0, 0x536b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #5998 = VFMSUBPD4rr_REV
{ 5999, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cd30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #5999 = VFMSUBPDr132m
{ 6000, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cd30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6000 = VFMSUBPDr132mY
{ 6001, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cd30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6001 = VFMSUBPDr132r
{ 6002, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cd30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6002 = VFMSUBPDr132rY
{ 6003, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d530009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6003 = VFMSUBPDr213m
{ 6004, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d530009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6004 = VFMSUBPDr213mY
{ 6005, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d530009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6005 = VFMSUBPDr213r
{ 6006, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d530009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6006 = VFMSUBPDr213rY
{ 6007, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1dd30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6007 = VFMSUBPDr231m
{ 6008, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9dd30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6008 = VFMSUBPDr231mY
{ 6009, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1dd30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6009 = VFMSUBPDr231r
{ 6010, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9dd30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6010 = VFMSUBPDr231rY
{ 6011, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x5362804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6011 = VFMSUBPS4mr
{ 6012, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0xd362804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #6012 = VFMSUBPS4mrY
{ 6013, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20005b62804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6013 = VFMSUBPS4rm
{ 6014, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x2000db62804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #6014 = VFMSUBPS4rmY
{ 6015, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20005b62804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6015 = VFMSUBPS4rr
{ 6016, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x2000db62804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6016 = VFMSUBPS4rrY
{ 6017, 4, 1, 0, 926, 0, 0xd362804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6017 = VFMSUBPS4rrY_REV
{ 6018, 4, 1, 0, 926, 0, 0x5362804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6018 = VFMSUBPS4rr_REV
{ 6019, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14d28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6019 = VFMSUBPSr132m
{ 6020, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94d28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6020 = VFMSUBPSr132mY
{ 6021, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14d28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6021 = VFMSUBPSr132r
{ 6022, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94d28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6022 = VFMSUBPSr132rY
{ 6023, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15528009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6023 = VFMSUBPSr213m
{ 6024, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95528009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6024 = VFMSUBPSr213mY
{ 6025, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15528009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6025 = VFMSUBPSr213r
{ 6026, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95528009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6026 = VFMSUBPSr213rY
{ 6027, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15d28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6027 = VFMSUBPSr231m
{ 6028, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95d28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6028 = VFMSUBPSr231mY
{ 6029, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15d28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6029 = VFMSUBPSr231r
{ 6030, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95d28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6030 = VFMSUBPSr231rY
{ 6031, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x1537b004d006ULL, nullptr, nullptr, OperandInfo556, -1 ,nullptr }, // Inst #6031 = VFMSUBSD4mr
{ 6032, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x1537b004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6032 = VFMSUBSD4mr_Int
{ 6033, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015b7b004d006ULL, nullptr, nullptr, OperandInfo557, -1 ,nullptr }, // Inst #6033 = VFMSUBSD4rm
{ 6034, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015b7b004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6034 = VFMSUBSD4rm_Int
{ 6035, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015b7b004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #6035 = VFMSUBSD4rr
{ 6036, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015b7b004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6036 = VFMSUBSD4rr_Int
{ 6037, 4, 1, 0, 926, 0, 0x1537b004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #6037 = VFMSUBSD4rr_REV
{ 6038, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11cdb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6038 = VFMSUBSDr132m
{ 6039, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11cdb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6039 = VFMSUBSDr132m_Int
{ 6040, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11cdb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6040 = VFMSUBSDr132r
{ 6041, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11cdb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6041 = VFMSUBSDr132r_Int
{ 6042, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d5b0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6042 = VFMSUBSDr213m
{ 6043, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d5b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6043 = VFMSUBSDr213m_Int
{ 6044, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11d5b0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6044 = VFMSUBSDr213r
{ 6045, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11d5b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6045 = VFMSUBSDr213r_Int
{ 6046, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ddb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6046 = VFMSUBSDr231m
{ 6047, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ddb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6047 = VFMSUBSDr231m_Int
{ 6048, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11ddb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6048 = VFMSUBSDr231r
{ 6049, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11ddb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6049 = VFMSUBSDr231r_Int
{ 6050, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x15372804d006ULL, nullptr, nullptr, OperandInfo561, -1 ,nullptr }, // Inst #6050 = VFMSUBSS4mr
{ 6051, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x15372804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6051 = VFMSUBSS4mr_Int
{ 6052, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015b72804d006ULL, nullptr, nullptr, OperandInfo562, -1 ,nullptr }, // Inst #6052 = VFMSUBSS4rm
{ 6053, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015b72804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6053 = VFMSUBSS4rm_Int
{ 6054, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015b72804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr }, // Inst #6054 = VFMSUBSS4rr
{ 6055, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015b72804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6055 = VFMSUBSS4rr_Int
{ 6056, 4, 1, 0, 926, 0, 0x15372804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr }, // Inst #6056 = VFMSUBSS4rr_REV
{ 6057, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114da8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6057 = VFMSUBSSr132m
{ 6058, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114da8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6058 = VFMSUBSSr132m_Int
{ 6059, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x114da8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6059 = VFMSUBSSr132r
{ 6060, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x114da8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6060 = VFMSUBSSr132r_Int
{ 6061, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1155a8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6061 = VFMSUBSSr213m
{ 6062, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1155a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6062 = VFMSUBSSr213m_Int
{ 6063, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1155a8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6063 = VFMSUBSSr213r
{ 6064, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x1155a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6064 = VFMSUBSSr213r_Int
{ 6065, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115da8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6065 = VFMSUBSSr231m
{ 6066, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115da8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6066 = VFMSUBSSr231m_Int
{ 6067, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x115da8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6067 = VFMSUBSSr231r
{ 6068, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x115da8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6068 = VFMSUBSSr231r_Int
{ 6069, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001ce60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6069 = VFNMADD132PDZ128m
{ 6070, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101ce60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6070 = VFNMADD132PDZ128mb
{ 6071, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121ce60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6071 = VFNMADD132PDZ128mbk
{ 6072, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161ce60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6072 = VFNMADD132PDZ128mbkz
{ 6073, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021ce60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6073 = VFNMADD132PDZ128mk
{ 6074, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061ce60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6074 = VFNMADD132PDZ128mkz
{ 6075, 4, 1, 0, 0, 0, 0x2001ce60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6075 = VFNMADD132PDZ128r
{ 6076, 5, 1, 0, 0, 0, 0x2021ce60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6076 = VFNMADD132PDZ128rk
{ 6077, 5, 1, 0, 0, 0, 0x2061ce60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6077 = VFNMADD132PDZ128rkz
{ 6078, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009ce60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6078 = VFNMADD132PDZ256m
{ 6079, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109ce60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6079 = VFNMADD132PDZ256mb
{ 6080, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129ce60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6080 = VFNMADD132PDZ256mbk
{ 6081, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169ce60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6081 = VFNMADD132PDZ256mbkz
{ 6082, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029ce60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6082 = VFNMADD132PDZ256mk
{ 6083, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069ce60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6083 = VFNMADD132PDZ256mkz
{ 6084, 4, 1, 0, 0, 0, 0x4009ce60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6084 = VFNMADD132PDZ256r
{ 6085, 5, 1, 0, 0, 0, 0x4029ce60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6085 = VFNMADD132PDZ256rk
{ 6086, 5, 1, 0, 0, 0, 0x4069ce60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6086 = VFNMADD132PDZ256rkz
{ 6087, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081ce60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6087 = VFNMADD132PDZm
{ 6088, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181ce60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6088 = VFNMADD132PDZmb
{ 6089, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1ce60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6089 = VFNMADD132PDZmbk
{ 6090, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1ce60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6090 = VFNMADD132PDZmbkz
{ 6091, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1ce60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6091 = VFNMADD132PDZmk
{ 6092, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1ce60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6092 = VFNMADD132PDZmkz
{ 6093, 4, 1, 0, 0, 0, 0x8081ce60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6093 = VFNMADD132PDZr
{ 6094, 5, 1, 0, 0, 0, 0x41181ce60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6094 = VFNMADD132PDZrb
{ 6095, 6, 1, 0, 0, 0, 0x411a1ce60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6095 = VFNMADD132PDZrbk
{ 6096, 6, 1, 0, 0, 0, 0x411e1ce60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6096 = VFNMADD132PDZrbkz
{ 6097, 5, 1, 0, 0, 0, 0x80a1ce60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6097 = VFNMADD132PDZrk
{ 6098, 5, 1, 0, 0, 0, 0x80e1ce60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6098 = VFNMADD132PDZrkz
{ 6099, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20014e60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6099 = VFNMADD132PSZ128m
{ 6100, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9014e60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6100 = VFNMADD132PSZ128mb
{ 6101, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9214e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6101 = VFNMADD132PSZ128mbk
{ 6102, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9614e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6102 = VFNMADD132PSZ128mbkz
{ 6103, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20214e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6103 = VFNMADD132PSZ128mk
{ 6104, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20614e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6104 = VFNMADD132PSZ128mkz
{ 6105, 4, 1, 0, 0, 0, 0x20014e60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6105 = VFNMADD132PSZ128r
{ 6106, 5, 1, 0, 0, 0, 0x20214e60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6106 = VFNMADD132PSZ128rk
{ 6107, 5, 1, 0, 0, 0, 0x20614e60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6107 = VFNMADD132PSZ128rkz
{ 6108, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40094e60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6108 = VFNMADD132PSZ256m
{ 6109, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9094e60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6109 = VFNMADD132PSZ256mb
{ 6110, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9294e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6110 = VFNMADD132PSZ256mbk
{ 6111, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9694e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6111 = VFNMADD132PSZ256mbkz
{ 6112, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40294e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6112 = VFNMADD132PSZ256mk
{ 6113, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40694e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6113 = VFNMADD132PSZ256mkz
{ 6114, 4, 1, 0, 0, 0, 0x40094e60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6114 = VFNMADD132PSZ256r
{ 6115, 5, 1, 0, 0, 0, 0x40294e60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6115 = VFNMADD132PSZ256rk
{ 6116, 5, 1, 0, 0, 0, 0x40694e60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6116 = VFNMADD132PSZ256rkz
{ 6117, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80814e60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6117 = VFNMADD132PSZm
{ 6118, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9814e60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6118 = VFNMADD132PSZmb
{ 6119, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a14e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6119 = VFNMADD132PSZmbk
{ 6120, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e14e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6120 = VFNMADD132PSZmbkz
{ 6121, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a14e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6121 = VFNMADD132PSZmk
{ 6122, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e14e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6122 = VFNMADD132PSZmkz
{ 6123, 4, 1, 0, 0, 0, 0x80814e60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6123 = VFNMADD132PSZr
{ 6124, 5, 1, 0, 0, 0, 0x409814e60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6124 = VFNMADD132PSZrb
{ 6125, 6, 1, 0, 0, 0, 0x409a14e60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6125 = VFNMADD132PSZrbk
{ 6126, 6, 1, 0, 0, 0, 0x409e14e60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6126 = VFNMADD132PSZrbkz
{ 6127, 5, 1, 0, 0, 0, 0x80a14e60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6127 = VFNMADD132PSZrk
{ 6128, 5, 1, 0, 0, 0, 0x80e14e60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6128 = VFNMADD132PSZrkz
{ 6129, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011cee0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #6129 = VFNMADD132SDm
{ 6130, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011cee0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6130 = VFNMADD132SDm_Int
{ 6131, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031cee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6131 = VFNMADD132SDm_Intk
{ 6132, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071cee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6132 = VFNMADD132SDm_Intkz
{ 6133, 4, 1, 0, 0, 0, 0x1011cee0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #6133 = VFNMADD132SDr
{ 6134, 4, 1, 0, 0, 0, 0x1011cee0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6134 = VFNMADD132SDr_Int
{ 6135, 5, 1, 0, 0, 0, 0x1031cee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6135 = VFNMADD132SDr_Intk
{ 6136, 5, 1, 0, 0, 0, 0x1071cee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6136 = VFNMADD132SDr_Intkz
{ 6137, 5, 1, 0, 0, 0, 0x41111cee0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6137 = VFNMADD132SDrb_Int
{ 6138, 6, 1, 0, 0, 0, 0x41131cee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6138 = VFNMADD132SDrb_Intk
{ 6139, 6, 1, 0, 0, 0, 0x41171cee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6139 = VFNMADD132SDrb_Intkz
{ 6140, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8114ee0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #6140 = VFNMADD132SSm
{ 6141, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8114ee0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6141 = VFNMADD132SSm_Int
{ 6142, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8314ee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6142 = VFNMADD132SSm_Intk
{ 6143, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8714ee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6143 = VFNMADD132SSm_Intkz
{ 6144, 4, 1, 0, 0, 0, 0x8114ee0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #6144 = VFNMADD132SSr
{ 6145, 4, 1, 0, 0, 0, 0x8114ee0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6145 = VFNMADD132SSr_Int
{ 6146, 5, 1, 0, 0, 0, 0x8314ee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6146 = VFNMADD132SSr_Intk
{ 6147, 5, 1, 0, 0, 0, 0x8714ee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6147 = VFNMADD132SSr_Intkz
{ 6148, 5, 1, 0, 0, 0, 0x409114ee0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6148 = VFNMADD132SSrb_Int
{ 6149, 6, 1, 0, 0, 0, 0x409314ee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6149 = VFNMADD132SSrb_Intk
{ 6150, 6, 1, 0, 0, 0, 0x409714ee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6150 = VFNMADD132SSrb_Intkz
{ 6151, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001d660009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6151 = VFNMADD213PDZ128m
{ 6152, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101d660009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6152 = VFNMADD213PDZ128mb
{ 6153, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121d660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6153 = VFNMADD213PDZ128mbk
{ 6154, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161d660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6154 = VFNMADD213PDZ128mbkz
{ 6155, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021d660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6155 = VFNMADD213PDZ128mk
{ 6156, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061d660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6156 = VFNMADD213PDZ128mkz
{ 6157, 4, 1, 0, 0, 0, 0x2001d660009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6157 = VFNMADD213PDZ128r
{ 6158, 5, 1, 0, 0, 0, 0x2021d660009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6158 = VFNMADD213PDZ128rk
{ 6159, 5, 1, 0, 0, 0, 0x2061d660009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6159 = VFNMADD213PDZ128rkz
{ 6160, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009d660009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6160 = VFNMADD213PDZ256m
{ 6161, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109d660009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6161 = VFNMADD213PDZ256mb
{ 6162, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129d660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6162 = VFNMADD213PDZ256mbk
{ 6163, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169d660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6163 = VFNMADD213PDZ256mbkz
{ 6164, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029d660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6164 = VFNMADD213PDZ256mk
{ 6165, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069d660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6165 = VFNMADD213PDZ256mkz
{ 6166, 4, 1, 0, 0, 0, 0x4009d660009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6166 = VFNMADD213PDZ256r
{ 6167, 5, 1, 0, 0, 0, 0x4029d660009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6167 = VFNMADD213PDZ256rk
{ 6168, 5, 1, 0, 0, 0, 0x4069d660009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6168 = VFNMADD213PDZ256rkz
{ 6169, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081d660009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6169 = VFNMADD213PDZm
{ 6170, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181d660009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6170 = VFNMADD213PDZmb
{ 6171, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1d660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6171 = VFNMADD213PDZmbk
{ 6172, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1d660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6172 = VFNMADD213PDZmbkz
{ 6173, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1d660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6173 = VFNMADD213PDZmk
{ 6174, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1d660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6174 = VFNMADD213PDZmkz
{ 6175, 4, 1, 0, 0, 0, 0x8081d660009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6175 = VFNMADD213PDZr
{ 6176, 5, 1, 0, 0, 0, 0x41181d660009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6176 = VFNMADD213PDZrb
{ 6177, 6, 1, 0, 0, 0, 0x411a1d660009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6177 = VFNMADD213PDZrbk
{ 6178, 6, 1, 0, 0, 0, 0x411e1d660009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6178 = VFNMADD213PDZrbkz
{ 6179, 5, 1, 0, 0, 0, 0x80a1d660009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6179 = VFNMADD213PDZrk
{ 6180, 5, 1, 0, 0, 0, 0x80e1d660009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6180 = VFNMADD213PDZrkz
{ 6181, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015660009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6181 = VFNMADD213PSZ128m
{ 6182, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015660009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6182 = VFNMADD213PSZ128mb
{ 6183, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6183 = VFNMADD213PSZ128mbk
{ 6184, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6184 = VFNMADD213PSZ128mbkz
{ 6185, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6185 = VFNMADD213PSZ128mk
{ 6186, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6186 = VFNMADD213PSZ128mkz
{ 6187, 4, 1, 0, 0, 0, 0x20015660009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6187 = VFNMADD213PSZ128r
{ 6188, 5, 1, 0, 0, 0, 0x20215660009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6188 = VFNMADD213PSZ128rk
{ 6189, 5, 1, 0, 0, 0, 0x20615660009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6189 = VFNMADD213PSZ128rkz
{ 6190, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095660009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6190 = VFNMADD213PSZ256m
{ 6191, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095660009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6191 = VFNMADD213PSZ256mb
{ 6192, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6192 = VFNMADD213PSZ256mbk
{ 6193, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6193 = VFNMADD213PSZ256mbkz
{ 6194, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6194 = VFNMADD213PSZ256mk
{ 6195, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6195 = VFNMADD213PSZ256mkz
{ 6196, 4, 1, 0, 0, 0, 0x40095660009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6196 = VFNMADD213PSZ256r
{ 6197, 5, 1, 0, 0, 0, 0x40295660009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6197 = VFNMADD213PSZ256rk
{ 6198, 5, 1, 0, 0, 0, 0x40695660009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6198 = VFNMADD213PSZ256rkz
{ 6199, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815660009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6199 = VFNMADD213PSZm
{ 6200, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815660009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6200 = VFNMADD213PSZmb
{ 6201, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6201 = VFNMADD213PSZmbk
{ 6202, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6202 = VFNMADD213PSZmbkz
{ 6203, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6203 = VFNMADD213PSZmk
{ 6204, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6204 = VFNMADD213PSZmkz
{ 6205, 4, 1, 0, 0, 0, 0x80815660009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6205 = VFNMADD213PSZr
{ 6206, 5, 1, 0, 0, 0, 0x409815660009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6206 = VFNMADD213PSZrb
{ 6207, 6, 1, 0, 0, 0, 0x409a15660009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6207 = VFNMADD213PSZrbk
{ 6208, 6, 1, 0, 0, 0, 0x409e15660009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6208 = VFNMADD213PSZrbkz
{ 6209, 5, 1, 0, 0, 0, 0x80a15660009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6209 = VFNMADD213PSZrk
{ 6210, 5, 1, 0, 0, 0, 0x80e15660009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6210 = VFNMADD213PSZrkz
{ 6211, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011d6e0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #6211 = VFNMADD213SDm
{ 6212, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011d6e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6212 = VFNMADD213SDm_Int
{ 6213, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031d6e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6213 = VFNMADD213SDm_Intk
{ 6214, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071d6e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6214 = VFNMADD213SDm_Intkz
{ 6215, 4, 1, 0, 0, 0, 0x1011d6e0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #6215 = VFNMADD213SDr
{ 6216, 4, 1, 0, 0, 0, 0x1011d6e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6216 = VFNMADD213SDr_Int
{ 6217, 5, 1, 0, 0, 0, 0x1031d6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6217 = VFNMADD213SDr_Intk
{ 6218, 5, 1, 0, 0, 0, 0x1071d6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6218 = VFNMADD213SDr_Intkz
{ 6219, 5, 1, 0, 0, 0, 0x41111d6e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6219 = VFNMADD213SDrb_Int
{ 6220, 6, 1, 0, 0, 0, 0x41131d6e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6220 = VFNMADD213SDrb_Intk
{ 6221, 6, 1, 0, 0, 0, 0x41171d6e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6221 = VFNMADD213SDrb_Intkz
{ 6222, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81156e0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #6222 = VFNMADD213SSm
{ 6223, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81156e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6223 = VFNMADD213SSm_Int
{ 6224, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x83156e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6224 = VFNMADD213SSm_Intk
{ 6225, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x87156e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6225 = VFNMADD213SSm_Intkz
{ 6226, 4, 1, 0, 0, 0, 0x81156e0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #6226 = VFNMADD213SSr
{ 6227, 4, 1, 0, 0, 0, 0x81156e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6227 = VFNMADD213SSr_Int
{ 6228, 5, 1, 0, 0, 0, 0x83156e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6228 = VFNMADD213SSr_Intk
{ 6229, 5, 1, 0, 0, 0, 0x87156e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6229 = VFNMADD213SSr_Intkz
{ 6230, 5, 1, 0, 0, 0, 0x4091156e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6230 = VFNMADD213SSrb_Int
{ 6231, 6, 1, 0, 0, 0, 0x4093156e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6231 = VFNMADD213SSrb_Intk
{ 6232, 6, 1, 0, 0, 0, 0x4097156e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6232 = VFNMADD213SSrb_Intkz
{ 6233, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001de60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6233 = VFNMADD231PDZ128m
{ 6234, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101de60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6234 = VFNMADD231PDZ128mb
{ 6235, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121de60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6235 = VFNMADD231PDZ128mbk
{ 6236, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161de60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6236 = VFNMADD231PDZ128mbkz
{ 6237, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021de60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6237 = VFNMADD231PDZ128mk
{ 6238, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061de60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6238 = VFNMADD231PDZ128mkz
{ 6239, 4, 1, 0, 0, 0, 0x2001de60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6239 = VFNMADD231PDZ128r
{ 6240, 5, 1, 0, 0, 0, 0x2021de60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6240 = VFNMADD231PDZ128rk
{ 6241, 5, 1, 0, 0, 0, 0x2061de60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6241 = VFNMADD231PDZ128rkz
{ 6242, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009de60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6242 = VFNMADD231PDZ256m
{ 6243, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109de60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6243 = VFNMADD231PDZ256mb
{ 6244, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129de60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6244 = VFNMADD231PDZ256mbk
{ 6245, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169de60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6245 = VFNMADD231PDZ256mbkz
{ 6246, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029de60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6246 = VFNMADD231PDZ256mk
{ 6247, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069de60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6247 = VFNMADD231PDZ256mkz
{ 6248, 4, 1, 0, 0, 0, 0x4009de60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6248 = VFNMADD231PDZ256r
{ 6249, 5, 1, 0, 0, 0, 0x4029de60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6249 = VFNMADD231PDZ256rk
{ 6250, 5, 1, 0, 0, 0, 0x4069de60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6250 = VFNMADD231PDZ256rkz
{ 6251, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081de60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6251 = VFNMADD231PDZm
{ 6252, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181de60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6252 = VFNMADD231PDZmb
{ 6253, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1de60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6253 = VFNMADD231PDZmbk
{ 6254, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1de60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6254 = VFNMADD231PDZmbkz
{ 6255, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1de60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6255 = VFNMADD231PDZmk
{ 6256, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1de60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6256 = VFNMADD231PDZmkz
{ 6257, 4, 1, 0, 0, 0, 0x8081de60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6257 = VFNMADD231PDZr
{ 6258, 5, 1, 0, 0, 0, 0x41181de60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6258 = VFNMADD231PDZrb
{ 6259, 6, 1, 0, 0, 0, 0x411a1de60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6259 = VFNMADD231PDZrbk
{ 6260, 6, 1, 0, 0, 0, 0x411e1de60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6260 = VFNMADD231PDZrbkz
{ 6261, 5, 1, 0, 0, 0, 0x80a1de60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6261 = VFNMADD231PDZrk
{ 6262, 5, 1, 0, 0, 0, 0x80e1de60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6262 = VFNMADD231PDZrkz
{ 6263, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015e60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6263 = VFNMADD231PSZ128m
{ 6264, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015e60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6264 = VFNMADD231PSZ128mb
{ 6265, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6265 = VFNMADD231PSZ128mbk
{ 6266, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6266 = VFNMADD231PSZ128mbkz
{ 6267, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6267 = VFNMADD231PSZ128mk
{ 6268, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615e60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6268 = VFNMADD231PSZ128mkz
{ 6269, 4, 1, 0, 0, 0, 0x20015e60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6269 = VFNMADD231PSZ128r
{ 6270, 5, 1, 0, 0, 0, 0x20215e60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6270 = VFNMADD231PSZ128rk
{ 6271, 5, 1, 0, 0, 0, 0x20615e60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6271 = VFNMADD231PSZ128rkz
{ 6272, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095e60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6272 = VFNMADD231PSZ256m
{ 6273, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095e60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6273 = VFNMADD231PSZ256mb
{ 6274, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6274 = VFNMADD231PSZ256mbk
{ 6275, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6275 = VFNMADD231PSZ256mbkz
{ 6276, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6276 = VFNMADD231PSZ256mk
{ 6277, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695e60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6277 = VFNMADD231PSZ256mkz
{ 6278, 4, 1, 0, 0, 0, 0x40095e60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6278 = VFNMADD231PSZ256r
{ 6279, 5, 1, 0, 0, 0, 0x40295e60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6279 = VFNMADD231PSZ256rk
{ 6280, 5, 1, 0, 0, 0, 0x40695e60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6280 = VFNMADD231PSZ256rkz
{ 6281, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815e60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6281 = VFNMADD231PSZm
{ 6282, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815e60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6282 = VFNMADD231PSZmb
{ 6283, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6283 = VFNMADD231PSZmbk
{ 6284, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6284 = VFNMADD231PSZmbkz
{ 6285, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6285 = VFNMADD231PSZmk
{ 6286, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15e60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6286 = VFNMADD231PSZmkz
{ 6287, 4, 1, 0, 0, 0, 0x80815e60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6287 = VFNMADD231PSZr
{ 6288, 5, 1, 0, 0, 0, 0x409815e60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6288 = VFNMADD231PSZrb
{ 6289, 6, 1, 0, 0, 0, 0x409a15e60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6289 = VFNMADD231PSZrbk
{ 6290, 6, 1, 0, 0, 0, 0x409e15e60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6290 = VFNMADD231PSZrbkz
{ 6291, 5, 1, 0, 0, 0, 0x80a15e60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6291 = VFNMADD231PSZrk
{ 6292, 5, 1, 0, 0, 0, 0x80e15e60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6292 = VFNMADD231PSZrkz
{ 6293, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011dee0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #6293 = VFNMADD231SDm
{ 6294, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011dee0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6294 = VFNMADD231SDm_Int
{ 6295, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031dee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6295 = VFNMADD231SDm_Intk
{ 6296, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071dee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6296 = VFNMADD231SDm_Intkz
{ 6297, 4, 1, 0, 0, 0, 0x1011dee0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #6297 = VFNMADD231SDr
{ 6298, 4, 1, 0, 0, 0, 0x1011dee0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6298 = VFNMADD231SDr_Int
{ 6299, 5, 1, 0, 0, 0, 0x1031dee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6299 = VFNMADD231SDr_Intk
{ 6300, 5, 1, 0, 0, 0, 0x1071dee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6300 = VFNMADD231SDr_Intkz
{ 6301, 5, 1, 0, 0, 0, 0x41111dee0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6301 = VFNMADD231SDrb_Int
{ 6302, 6, 1, 0, 0, 0, 0x41131dee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6302 = VFNMADD231SDrb_Intk
{ 6303, 6, 1, 0, 0, 0, 0x41171dee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6303 = VFNMADD231SDrb_Intkz
{ 6304, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8115ee0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #6304 = VFNMADD231SSm
{ 6305, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8115ee0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6305 = VFNMADD231SSm_Int
{ 6306, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8315ee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6306 = VFNMADD231SSm_Intk
{ 6307, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8715ee0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6307 = VFNMADD231SSm_Intkz
{ 6308, 4, 1, 0, 0, 0, 0x8115ee0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #6308 = VFNMADD231SSr
{ 6309, 4, 1, 0, 0, 0, 0x8115ee0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6309 = VFNMADD231SSr_Int
{ 6310, 5, 1, 0, 0, 0, 0x8315ee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6310 = VFNMADD231SSr_Intk
{ 6311, 5, 1, 0, 0, 0, 0x8715ee0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6311 = VFNMADD231SSr_Intkz
{ 6312, 5, 1, 0, 0, 0, 0x409115ee0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6312 = VFNMADD231SSrb_Int
{ 6313, 6, 1, 0, 0, 0, 0x409315ee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6313 = VFNMADD231SSrb_Intk
{ 6314, 6, 1, 0, 0, 0, 0x409715ee0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6314 = VFNMADD231SSrb_Intkz
{ 6315, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x53cb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6315 = VFNMADDPD4mr
{ 6316, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0xd3cb004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #6316 = VFNMADDPD4mrY
{ 6317, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20005bcb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6317 = VFNMADDPD4rm
{ 6318, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x2000dbcb004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #6318 = VFNMADDPD4rmY
{ 6319, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20005bcb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6319 = VFNMADDPD4rr
{ 6320, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x2000dbcb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6320 = VFNMADDPD4rrY
{ 6321, 4, 1, 0, 926, 0, 0xd3cb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6321 = VFNMADDPD4rrY_REV
{ 6322, 4, 1, 0, 926, 0, 0x53cb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6322 = VFNMADDPD4rr_REV
{ 6323, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1ce30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6323 = VFNMADDPDr132m
{ 6324, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9ce30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6324 = VFNMADDPDr132mY
{ 6325, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1ce30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6325 = VFNMADDPDr132r
{ 6326, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9ce30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6326 = VFNMADDPDr132rY
{ 6327, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d630009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6327 = VFNMADDPDr213m
{ 6328, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d630009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6328 = VFNMADDPDr213mY
{ 6329, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d630009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6329 = VFNMADDPDr213r
{ 6330, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d630009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6330 = VFNMADDPDr213rY
{ 6331, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1de30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6331 = VFNMADDPDr231m
{ 6332, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9de30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6332 = VFNMADDPDr231mY
{ 6333, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1de30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6333 = VFNMADDPDr231r
{ 6334, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9de30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6334 = VFNMADDPDr231rY
{ 6335, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x53c2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6335 = VFNMADDPS4mr
{ 6336, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0xd3c2804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #6336 = VFNMADDPS4mrY
{ 6337, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20005bc2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6337 = VFNMADDPS4rm
{ 6338, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x2000dbc2804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #6338 = VFNMADDPS4rmY
{ 6339, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20005bc2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6339 = VFNMADDPS4rr
{ 6340, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x2000dbc2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6340 = VFNMADDPS4rrY
{ 6341, 4, 1, 0, 926, 0, 0xd3c2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6341 = VFNMADDPS4rrY_REV
{ 6342, 4, 1, 0, 926, 0, 0x53c2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6342 = VFNMADDPS4rr_REV
{ 6343, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14e28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6343 = VFNMADDPSr132m
{ 6344, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94e28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6344 = VFNMADDPSr132mY
{ 6345, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14e28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6345 = VFNMADDPSr132r
{ 6346, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94e28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6346 = VFNMADDPSr132rY
{ 6347, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15628009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6347 = VFNMADDPSr213m
{ 6348, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95628009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6348 = VFNMADDPSr213mY
{ 6349, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15628009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6349 = VFNMADDPSr213r
{ 6350, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95628009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6350 = VFNMADDPSr213rY
{ 6351, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15e28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6351 = VFNMADDPSr231m
{ 6352, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95e28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6352 = VFNMADDPSr231mY
{ 6353, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15e28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6353 = VFNMADDPSr231r
{ 6354, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95e28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6354 = VFNMADDPSr231rY
{ 6355, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x153db004d006ULL, nullptr, nullptr, OperandInfo556, -1 ,nullptr }, // Inst #6355 = VFNMADDSD4mr
{ 6356, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x153db004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6356 = VFNMADDSD4mr_Int
{ 6357, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015bdb004d006ULL, nullptr, nullptr, OperandInfo557, -1 ,nullptr }, // Inst #6357 = VFNMADDSD4rm
{ 6358, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015bdb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6358 = VFNMADDSD4rm_Int
{ 6359, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015bdb004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #6359 = VFNMADDSD4rr
{ 6360, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015bdb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6360 = VFNMADDSD4rr_Int
{ 6361, 4, 1, 0, 926, 0, 0x153db004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #6361 = VFNMADDSD4rr_REV
{ 6362, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ceb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6362 = VFNMADDSDr132m
{ 6363, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11ceb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6363 = VFNMADDSDr132m_Int
{ 6364, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11ceb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6364 = VFNMADDSDr132r
{ 6365, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11ceb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6365 = VFNMADDSDr132r_Int
{ 6366, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d6b0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6366 = VFNMADDSDr213m
{ 6367, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d6b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6367 = VFNMADDSDr213m_Int
{ 6368, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11d6b0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6368 = VFNMADDSDr213r
{ 6369, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11d6b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6369 = VFNMADDSDr213r_Int
{ 6370, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11deb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6370 = VFNMADDSDr231m
{ 6371, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11deb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6371 = VFNMADDSDr231m_Int
{ 6372, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11deb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6372 = VFNMADDSDr231r
{ 6373, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11deb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6373 = VFNMADDSDr231r_Int
{ 6374, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x153d2804d006ULL, nullptr, nullptr, OperandInfo561, -1 ,nullptr }, // Inst #6374 = VFNMADDSS4mr
{ 6375, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x153d2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6375 = VFNMADDSS4mr_Int
{ 6376, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015bd2804d006ULL, nullptr, nullptr, OperandInfo562, -1 ,nullptr }, // Inst #6376 = VFNMADDSS4rm
{ 6377, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015bd2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6377 = VFNMADDSS4rm_Int
{ 6378, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015bd2804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr }, // Inst #6378 = VFNMADDSS4rr
{ 6379, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015bd2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6379 = VFNMADDSS4rr_Int
{ 6380, 4, 1, 0, 926, 0, 0x153d2804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr }, // Inst #6380 = VFNMADDSS4rr_REV
{ 6381, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114ea8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6381 = VFNMADDSSr132m
{ 6382, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114ea8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6382 = VFNMADDSSr132m_Int
{ 6383, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x114ea8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6383 = VFNMADDSSr132r
{ 6384, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x114ea8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6384 = VFNMADDSSr132r_Int
{ 6385, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1156a8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6385 = VFNMADDSSr213m
{ 6386, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1156a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6386 = VFNMADDSSr213m_Int
{ 6387, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1156a8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6387 = VFNMADDSSr213r
{ 6388, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x1156a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6388 = VFNMADDSSr213r_Int
{ 6389, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115ea8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6389 = VFNMADDSSr231m
{ 6390, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115ea8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6390 = VFNMADDSSr231m_Int
{ 6391, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x115ea8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6391 = VFNMADDSSr231r
{ 6392, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x115ea8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6392 = VFNMADDSSr231r_Int
{ 6393, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001cf60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6393 = VFNMSUB132PDZ128m
{ 6394, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101cf60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6394 = VFNMSUB132PDZ128mb
{ 6395, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121cf60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6395 = VFNMSUB132PDZ128mbk
{ 6396, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161cf60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6396 = VFNMSUB132PDZ128mbkz
{ 6397, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021cf60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6397 = VFNMSUB132PDZ128mk
{ 6398, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061cf60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6398 = VFNMSUB132PDZ128mkz
{ 6399, 4, 1, 0, 0, 0, 0x2001cf60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6399 = VFNMSUB132PDZ128r
{ 6400, 5, 1, 0, 0, 0, 0x2021cf60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6400 = VFNMSUB132PDZ128rk
{ 6401, 5, 1, 0, 0, 0, 0x2061cf60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6401 = VFNMSUB132PDZ128rkz
{ 6402, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009cf60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6402 = VFNMSUB132PDZ256m
{ 6403, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109cf60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6403 = VFNMSUB132PDZ256mb
{ 6404, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129cf60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6404 = VFNMSUB132PDZ256mbk
{ 6405, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169cf60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6405 = VFNMSUB132PDZ256mbkz
{ 6406, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029cf60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6406 = VFNMSUB132PDZ256mk
{ 6407, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069cf60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6407 = VFNMSUB132PDZ256mkz
{ 6408, 4, 1, 0, 0, 0, 0x4009cf60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6408 = VFNMSUB132PDZ256r
{ 6409, 5, 1, 0, 0, 0, 0x4029cf60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6409 = VFNMSUB132PDZ256rk
{ 6410, 5, 1, 0, 0, 0, 0x4069cf60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6410 = VFNMSUB132PDZ256rkz
{ 6411, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081cf60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6411 = VFNMSUB132PDZm
{ 6412, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181cf60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6412 = VFNMSUB132PDZmb
{ 6413, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1cf60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6413 = VFNMSUB132PDZmbk
{ 6414, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1cf60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6414 = VFNMSUB132PDZmbkz
{ 6415, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1cf60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6415 = VFNMSUB132PDZmk
{ 6416, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1cf60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6416 = VFNMSUB132PDZmkz
{ 6417, 4, 1, 0, 0, 0, 0x8081cf60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6417 = VFNMSUB132PDZr
{ 6418, 5, 1, 0, 0, 0, 0x41181cf60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6418 = VFNMSUB132PDZrb
{ 6419, 6, 1, 0, 0, 0, 0x411a1cf60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6419 = VFNMSUB132PDZrbk
{ 6420, 6, 1, 0, 0, 0, 0x411e1cf60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6420 = VFNMSUB132PDZrbkz
{ 6421, 5, 1, 0, 0, 0, 0x80a1cf60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6421 = VFNMSUB132PDZrk
{ 6422, 5, 1, 0, 0, 0, 0x80e1cf60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6422 = VFNMSUB132PDZrkz
{ 6423, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20014f60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6423 = VFNMSUB132PSZ128m
{ 6424, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9014f60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6424 = VFNMSUB132PSZ128mb
{ 6425, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9214f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6425 = VFNMSUB132PSZ128mbk
{ 6426, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9614f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6426 = VFNMSUB132PSZ128mbkz
{ 6427, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20214f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6427 = VFNMSUB132PSZ128mk
{ 6428, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20614f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6428 = VFNMSUB132PSZ128mkz
{ 6429, 4, 1, 0, 0, 0, 0x20014f60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6429 = VFNMSUB132PSZ128r
{ 6430, 5, 1, 0, 0, 0, 0x20214f60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6430 = VFNMSUB132PSZ128rk
{ 6431, 5, 1, 0, 0, 0, 0x20614f60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6431 = VFNMSUB132PSZ128rkz
{ 6432, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40094f60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6432 = VFNMSUB132PSZ256m
{ 6433, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9094f60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6433 = VFNMSUB132PSZ256mb
{ 6434, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9294f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6434 = VFNMSUB132PSZ256mbk
{ 6435, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9694f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6435 = VFNMSUB132PSZ256mbkz
{ 6436, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40294f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6436 = VFNMSUB132PSZ256mk
{ 6437, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40694f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6437 = VFNMSUB132PSZ256mkz
{ 6438, 4, 1, 0, 0, 0, 0x40094f60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6438 = VFNMSUB132PSZ256r
{ 6439, 5, 1, 0, 0, 0, 0x40294f60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6439 = VFNMSUB132PSZ256rk
{ 6440, 5, 1, 0, 0, 0, 0x40694f60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6440 = VFNMSUB132PSZ256rkz
{ 6441, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80814f60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6441 = VFNMSUB132PSZm
{ 6442, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9814f60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6442 = VFNMSUB132PSZmb
{ 6443, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a14f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6443 = VFNMSUB132PSZmbk
{ 6444, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e14f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6444 = VFNMSUB132PSZmbkz
{ 6445, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a14f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6445 = VFNMSUB132PSZmk
{ 6446, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e14f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6446 = VFNMSUB132PSZmkz
{ 6447, 4, 1, 0, 0, 0, 0x80814f60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6447 = VFNMSUB132PSZr
{ 6448, 5, 1, 0, 0, 0, 0x409814f60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6448 = VFNMSUB132PSZrb
{ 6449, 6, 1, 0, 0, 0, 0x409a14f60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6449 = VFNMSUB132PSZrbk
{ 6450, 6, 1, 0, 0, 0, 0x409e14f60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6450 = VFNMSUB132PSZrbkz
{ 6451, 5, 1, 0, 0, 0, 0x80a14f60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6451 = VFNMSUB132PSZrk
{ 6452, 5, 1, 0, 0, 0, 0x80e14f60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6452 = VFNMSUB132PSZrkz
{ 6453, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011cfe0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #6453 = VFNMSUB132SDm
{ 6454, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011cfe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6454 = VFNMSUB132SDm_Int
{ 6455, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031cfe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6455 = VFNMSUB132SDm_Intk
{ 6456, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071cfe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6456 = VFNMSUB132SDm_Intkz
{ 6457, 4, 1, 0, 0, 0, 0x1011cfe0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #6457 = VFNMSUB132SDr
{ 6458, 4, 1, 0, 0, 0, 0x1011cfe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6458 = VFNMSUB132SDr_Int
{ 6459, 5, 1, 0, 0, 0, 0x1031cfe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6459 = VFNMSUB132SDr_Intk
{ 6460, 5, 1, 0, 0, 0, 0x1071cfe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6460 = VFNMSUB132SDr_Intkz
{ 6461, 5, 1, 0, 0, 0, 0x41111cfe0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6461 = VFNMSUB132SDrb_Int
{ 6462, 6, 1, 0, 0, 0, 0x41131cfe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6462 = VFNMSUB132SDrb_Intk
{ 6463, 6, 1, 0, 0, 0, 0x41171cfe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6463 = VFNMSUB132SDrb_Intkz
{ 6464, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8114fe0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #6464 = VFNMSUB132SSm
{ 6465, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8114fe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6465 = VFNMSUB132SSm_Int
{ 6466, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8314fe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6466 = VFNMSUB132SSm_Intk
{ 6467, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8714fe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6467 = VFNMSUB132SSm_Intkz
{ 6468, 4, 1, 0, 0, 0, 0x8114fe0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #6468 = VFNMSUB132SSr
{ 6469, 4, 1, 0, 0, 0, 0x8114fe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6469 = VFNMSUB132SSr_Int
{ 6470, 5, 1, 0, 0, 0, 0x8314fe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6470 = VFNMSUB132SSr_Intk
{ 6471, 5, 1, 0, 0, 0, 0x8714fe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6471 = VFNMSUB132SSr_Intkz
{ 6472, 5, 1, 0, 0, 0, 0x409114fe0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6472 = VFNMSUB132SSrb_Int
{ 6473, 6, 1, 0, 0, 0, 0x409314fe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6473 = VFNMSUB132SSrb_Intk
{ 6474, 6, 1, 0, 0, 0, 0x409714fe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6474 = VFNMSUB132SSrb_Intkz
{ 6475, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001d760009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6475 = VFNMSUB213PDZ128m
{ 6476, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101d760009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6476 = VFNMSUB213PDZ128mb
{ 6477, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121d760009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6477 = VFNMSUB213PDZ128mbk
{ 6478, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161d760009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6478 = VFNMSUB213PDZ128mbkz
{ 6479, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021d760009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6479 = VFNMSUB213PDZ128mk
{ 6480, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061d760009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6480 = VFNMSUB213PDZ128mkz
{ 6481, 4, 1, 0, 0, 0, 0x2001d760009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6481 = VFNMSUB213PDZ128r
{ 6482, 5, 1, 0, 0, 0, 0x2021d760009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6482 = VFNMSUB213PDZ128rk
{ 6483, 5, 1, 0, 0, 0, 0x2061d760009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6483 = VFNMSUB213PDZ128rkz
{ 6484, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009d760009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6484 = VFNMSUB213PDZ256m
{ 6485, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109d760009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6485 = VFNMSUB213PDZ256mb
{ 6486, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129d760009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6486 = VFNMSUB213PDZ256mbk
{ 6487, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169d760009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6487 = VFNMSUB213PDZ256mbkz
{ 6488, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029d760009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6488 = VFNMSUB213PDZ256mk
{ 6489, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069d760009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6489 = VFNMSUB213PDZ256mkz
{ 6490, 4, 1, 0, 0, 0, 0x4009d760009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6490 = VFNMSUB213PDZ256r
{ 6491, 5, 1, 0, 0, 0, 0x4029d760009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6491 = VFNMSUB213PDZ256rk
{ 6492, 5, 1, 0, 0, 0, 0x4069d760009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6492 = VFNMSUB213PDZ256rkz
{ 6493, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081d760009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6493 = VFNMSUB213PDZm
{ 6494, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181d760009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6494 = VFNMSUB213PDZmb
{ 6495, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1d760009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6495 = VFNMSUB213PDZmbk
{ 6496, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1d760009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6496 = VFNMSUB213PDZmbkz
{ 6497, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1d760009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6497 = VFNMSUB213PDZmk
{ 6498, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1d760009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6498 = VFNMSUB213PDZmkz
{ 6499, 4, 1, 0, 0, 0, 0x8081d760009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6499 = VFNMSUB213PDZr
{ 6500, 5, 1, 0, 0, 0, 0x41181d760009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6500 = VFNMSUB213PDZrb
{ 6501, 6, 1, 0, 0, 0, 0x411a1d760009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6501 = VFNMSUB213PDZrbk
{ 6502, 6, 1, 0, 0, 0, 0x411e1d760009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6502 = VFNMSUB213PDZrbkz
{ 6503, 5, 1, 0, 0, 0, 0x80a1d760009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6503 = VFNMSUB213PDZrk
{ 6504, 5, 1, 0, 0, 0, 0x80e1d760009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6504 = VFNMSUB213PDZrkz
{ 6505, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015760009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6505 = VFNMSUB213PSZ128m
{ 6506, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015760009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6506 = VFNMSUB213PSZ128mb
{ 6507, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215760009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6507 = VFNMSUB213PSZ128mbk
{ 6508, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615760009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6508 = VFNMSUB213PSZ128mbkz
{ 6509, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215760009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6509 = VFNMSUB213PSZ128mk
{ 6510, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615760009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6510 = VFNMSUB213PSZ128mkz
{ 6511, 4, 1, 0, 0, 0, 0x20015760009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6511 = VFNMSUB213PSZ128r
{ 6512, 5, 1, 0, 0, 0, 0x20215760009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6512 = VFNMSUB213PSZ128rk
{ 6513, 5, 1, 0, 0, 0, 0x20615760009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6513 = VFNMSUB213PSZ128rkz
{ 6514, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095760009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6514 = VFNMSUB213PSZ256m
{ 6515, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095760009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6515 = VFNMSUB213PSZ256mb
{ 6516, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295760009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6516 = VFNMSUB213PSZ256mbk
{ 6517, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695760009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6517 = VFNMSUB213PSZ256mbkz
{ 6518, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295760009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6518 = VFNMSUB213PSZ256mk
{ 6519, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695760009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6519 = VFNMSUB213PSZ256mkz
{ 6520, 4, 1, 0, 0, 0, 0x40095760009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6520 = VFNMSUB213PSZ256r
{ 6521, 5, 1, 0, 0, 0, 0x40295760009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6521 = VFNMSUB213PSZ256rk
{ 6522, 5, 1, 0, 0, 0, 0x40695760009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6522 = VFNMSUB213PSZ256rkz
{ 6523, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815760009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6523 = VFNMSUB213PSZm
{ 6524, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815760009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6524 = VFNMSUB213PSZmb
{ 6525, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15760009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6525 = VFNMSUB213PSZmbk
{ 6526, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15760009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6526 = VFNMSUB213PSZmbkz
{ 6527, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15760009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6527 = VFNMSUB213PSZmk
{ 6528, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15760009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6528 = VFNMSUB213PSZmkz
{ 6529, 4, 1, 0, 0, 0, 0x80815760009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6529 = VFNMSUB213PSZr
{ 6530, 5, 1, 0, 0, 0, 0x409815760009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6530 = VFNMSUB213PSZrb
{ 6531, 6, 1, 0, 0, 0, 0x409a15760009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6531 = VFNMSUB213PSZrbk
{ 6532, 6, 1, 0, 0, 0, 0x409e15760009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6532 = VFNMSUB213PSZrbkz
{ 6533, 5, 1, 0, 0, 0, 0x80a15760009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6533 = VFNMSUB213PSZrk
{ 6534, 5, 1, 0, 0, 0, 0x80e15760009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6534 = VFNMSUB213PSZrkz
{ 6535, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011d7e0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #6535 = VFNMSUB213SDm
{ 6536, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011d7e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6536 = VFNMSUB213SDm_Int
{ 6537, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031d7e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6537 = VFNMSUB213SDm_Intk
{ 6538, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071d7e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6538 = VFNMSUB213SDm_Intkz
{ 6539, 4, 1, 0, 0, 0, 0x1011d7e0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #6539 = VFNMSUB213SDr
{ 6540, 4, 1, 0, 0, 0, 0x1011d7e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6540 = VFNMSUB213SDr_Int
{ 6541, 5, 1, 0, 0, 0, 0x1031d7e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6541 = VFNMSUB213SDr_Intk
{ 6542, 5, 1, 0, 0, 0, 0x1071d7e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6542 = VFNMSUB213SDr_Intkz
{ 6543, 5, 1, 0, 0, 0, 0x41111d7e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6543 = VFNMSUB213SDrb_Int
{ 6544, 6, 1, 0, 0, 0, 0x41131d7e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6544 = VFNMSUB213SDrb_Intk
{ 6545, 6, 1, 0, 0, 0, 0x41171d7e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6545 = VFNMSUB213SDrb_Intkz
{ 6546, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81157e0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #6546 = VFNMSUB213SSm
{ 6547, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81157e0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6547 = VFNMSUB213SSm_Int
{ 6548, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x83157e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6548 = VFNMSUB213SSm_Intk
{ 6549, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x87157e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6549 = VFNMSUB213SSm_Intkz
{ 6550, 4, 1, 0, 0, 0, 0x81157e0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #6550 = VFNMSUB213SSr
{ 6551, 4, 1, 0, 0, 0, 0x81157e0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6551 = VFNMSUB213SSr_Int
{ 6552, 5, 1, 0, 0, 0, 0x83157e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6552 = VFNMSUB213SSr_Intk
{ 6553, 5, 1, 0, 0, 0, 0x87157e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6553 = VFNMSUB213SSr_Intkz
{ 6554, 5, 1, 0, 0, 0, 0x4091157e0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6554 = VFNMSUB213SSrb_Int
{ 6555, 6, 1, 0, 0, 0, 0x4093157e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6555 = VFNMSUB213SSrb_Intk
{ 6556, 6, 1, 0, 0, 0, 0x4097157e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6556 = VFNMSUB213SSrb_Intkz
{ 6557, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001df60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6557 = VFNMSUB231PDZ128m
{ 6558, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101df60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6558 = VFNMSUB231PDZ128mb
{ 6559, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121df60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6559 = VFNMSUB231PDZ128mbk
{ 6560, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161df60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6560 = VFNMSUB231PDZ128mbkz
{ 6561, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021df60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6561 = VFNMSUB231PDZ128mk
{ 6562, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061df60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #6562 = VFNMSUB231PDZ128mkz
{ 6563, 4, 1, 0, 0, 0, 0x2001df60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6563 = VFNMSUB231PDZ128r
{ 6564, 5, 1, 0, 0, 0, 0x2021df60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6564 = VFNMSUB231PDZ128rk
{ 6565, 5, 1, 0, 0, 0, 0x2061df60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #6565 = VFNMSUB231PDZ128rkz
{ 6566, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009df60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6566 = VFNMSUB231PDZ256m
{ 6567, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109df60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6567 = VFNMSUB231PDZ256mb
{ 6568, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129df60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6568 = VFNMSUB231PDZ256mbk
{ 6569, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169df60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6569 = VFNMSUB231PDZ256mbkz
{ 6570, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029df60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6570 = VFNMSUB231PDZ256mk
{ 6571, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069df60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #6571 = VFNMSUB231PDZ256mkz
{ 6572, 4, 1, 0, 0, 0, 0x4009df60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6572 = VFNMSUB231PDZ256r
{ 6573, 5, 1, 0, 0, 0, 0x4029df60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6573 = VFNMSUB231PDZ256rk
{ 6574, 5, 1, 0, 0, 0, 0x4069df60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #6574 = VFNMSUB231PDZ256rkz
{ 6575, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081df60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6575 = VFNMSUB231PDZm
{ 6576, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181df60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6576 = VFNMSUB231PDZmb
{ 6577, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1df60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6577 = VFNMSUB231PDZmbk
{ 6578, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1df60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6578 = VFNMSUB231PDZmbkz
{ 6579, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1df60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6579 = VFNMSUB231PDZmk
{ 6580, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1df60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #6580 = VFNMSUB231PDZmkz
{ 6581, 4, 1, 0, 0, 0, 0x8081df60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6581 = VFNMSUB231PDZr
{ 6582, 5, 1, 0, 0, 0, 0x41181df60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6582 = VFNMSUB231PDZrb
{ 6583, 6, 1, 0, 0, 0, 0x411a1df60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6583 = VFNMSUB231PDZrbk
{ 6584, 6, 1, 0, 0, 0, 0x411e1df60009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #6584 = VFNMSUB231PDZrbkz
{ 6585, 5, 1, 0, 0, 0, 0x80a1df60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6585 = VFNMSUB231PDZrk
{ 6586, 5, 1, 0, 0, 0, 0x80e1df60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #6586 = VFNMSUB231PDZrkz
{ 6587, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20015f60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6587 = VFNMSUB231PSZ128m
{ 6588, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9015f60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6588 = VFNMSUB231PSZ128mb
{ 6589, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9215f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6589 = VFNMSUB231PSZ128mbk
{ 6590, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9615f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6590 = VFNMSUB231PSZ128mbkz
{ 6591, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20215f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6591 = VFNMSUB231PSZ128mk
{ 6592, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20615f60009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #6592 = VFNMSUB231PSZ128mkz
{ 6593, 4, 1, 0, 0, 0, 0x20015f60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6593 = VFNMSUB231PSZ128r
{ 6594, 5, 1, 0, 0, 0, 0x20215f60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6594 = VFNMSUB231PSZ128rk
{ 6595, 5, 1, 0, 0, 0, 0x20615f60009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #6595 = VFNMSUB231PSZ128rkz
{ 6596, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40095f60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6596 = VFNMSUB231PSZ256m
{ 6597, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9095f60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #6597 = VFNMSUB231PSZ256mb
{ 6598, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9295f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6598 = VFNMSUB231PSZ256mbk
{ 6599, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9695f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6599 = VFNMSUB231PSZ256mbkz
{ 6600, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40295f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6600 = VFNMSUB231PSZ256mk
{ 6601, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40695f60009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #6601 = VFNMSUB231PSZ256mkz
{ 6602, 4, 1, 0, 0, 0, 0x40095f60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #6602 = VFNMSUB231PSZ256r
{ 6603, 5, 1, 0, 0, 0, 0x40295f60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6603 = VFNMSUB231PSZ256rk
{ 6604, 5, 1, 0, 0, 0, 0x40695f60009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #6604 = VFNMSUB231PSZ256rkz
{ 6605, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80815f60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6605 = VFNMSUB231PSZm
{ 6606, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9815f60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #6606 = VFNMSUB231PSZmb
{ 6607, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a15f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6607 = VFNMSUB231PSZmbk
{ 6608, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e15f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6608 = VFNMSUB231PSZmbkz
{ 6609, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a15f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6609 = VFNMSUB231PSZmk
{ 6610, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e15f60009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #6610 = VFNMSUB231PSZmkz
{ 6611, 4, 1, 0, 0, 0, 0x80815f60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #6611 = VFNMSUB231PSZr
{ 6612, 5, 1, 0, 0, 0, 0x409815f60009005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #6612 = VFNMSUB231PSZrb
{ 6613, 6, 1, 0, 0, 0, 0x409a15f60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6613 = VFNMSUB231PSZrbk
{ 6614, 6, 1, 0, 0, 0, 0x409e15f60009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #6614 = VFNMSUB231PSZrbkz
{ 6615, 5, 1, 0, 0, 0, 0x80a15f60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6615 = VFNMSUB231PSZrk
{ 6616, 5, 1, 0, 0, 0, 0x80e15f60009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #6616 = VFNMSUB231PSZrkz
{ 6617, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011dfe0009006ULL, nullptr, nullptr, OperandInfo546, -1 ,nullptr }, // Inst #6617 = VFNMSUB231SDm
{ 6618, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011dfe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6618 = VFNMSUB231SDm_Int
{ 6619, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031dfe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6619 = VFNMSUB231SDm_Intk
{ 6620, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071dfe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6620 = VFNMSUB231SDm_Intkz
{ 6621, 4, 1, 0, 0, 0, 0x1011dfe0009005ULL, nullptr, nullptr, OperandInfo547, -1 ,nullptr }, // Inst #6621 = VFNMSUB231SDr
{ 6622, 4, 1, 0, 0, 0, 0x1011dfe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6622 = VFNMSUB231SDr_Int
{ 6623, 5, 1, 0, 0, 0, 0x1031dfe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6623 = VFNMSUB231SDr_Intk
{ 6624, 5, 1, 0, 0, 0, 0x1071dfe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6624 = VFNMSUB231SDr_Intkz
{ 6625, 5, 1, 0, 0, 0, 0x41111dfe0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6625 = VFNMSUB231SDrb_Int
{ 6626, 6, 1, 0, 0, 0, 0x41131dfe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6626 = VFNMSUB231SDrb_Intk
{ 6627, 6, 1, 0, 0, 0, 0x41171dfe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6627 = VFNMSUB231SDrb_Intkz
{ 6628, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8115fe0009006ULL, nullptr, nullptr, OperandInfo548, -1 ,nullptr }, // Inst #6628 = VFNMSUB231SSm
{ 6629, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8115fe0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #6629 = VFNMSUB231SSm_Int
{ 6630, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8315fe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6630 = VFNMSUB231SSm_Intk
{ 6631, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8715fe0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6631 = VFNMSUB231SSm_Intkz
{ 6632, 4, 1, 0, 0, 0, 0x8115fe0009005ULL, nullptr, nullptr, OperandInfo549, -1 ,nullptr }, // Inst #6632 = VFNMSUB231SSr
{ 6633, 4, 1, 0, 0, 0, 0x8115fe0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #6633 = VFNMSUB231SSr_Int
{ 6634, 5, 1, 0, 0, 0, 0x8315fe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6634 = VFNMSUB231SSr_Intk
{ 6635, 5, 1, 0, 0, 0, 0x8715fe0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6635 = VFNMSUB231SSr_Intkz
{ 6636, 5, 1, 0, 0, 0, 0x409115fe0009005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #6636 = VFNMSUB231SSrb_Int
{ 6637, 6, 1, 0, 0, 0, 0x409315fe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6637 = VFNMSUB231SSrb_Intk
{ 6638, 6, 1, 0, 0, 0, 0x409715fe0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6638 = VFNMSUB231SSrb_Intkz
{ 6639, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x53eb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6639 = VFNMSUBPD4mr
{ 6640, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0xd3eb004d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #6640 = VFNMSUBPD4mrY
{ 6641, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20005beb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6641 = VFNMSUBPD4rm
{ 6642, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x2000dbeb004d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #6642 = VFNMSUBPD4rmY
{ 6643, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20005beb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6643 = VFNMSUBPD4rr
{ 6644, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x2000dbeb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6644 = VFNMSUBPD4rrY
{ 6645, 4, 1, 0, 926, 0, 0xd3eb004d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6645 = VFNMSUBPD4rrY_REV
{ 6646, 4, 1, 0, 926, 0, 0x53eb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6646 = VFNMSUBPD4rr_REV
{ 6647, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1cf30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6647 = VFNMSUBPDr132m
{ 6648, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9cf30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6648 = VFNMSUBPDr132mY
{ 6649, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1cf30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6649 = VFNMSUBPDr132r
{ 6650, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9cf30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6650 = VFNMSUBPDr132rY
{ 6651, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1d730009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6651 = VFNMSUBPDr213m
{ 6652, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9d730009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6652 = VFNMSUBPDr213mY
{ 6653, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1d730009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6653 = VFNMSUBPDr213r
{ 6654, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9d730009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6654 = VFNMSUBPDr213rY
{ 6655, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1df30009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6655 = VFNMSUBPDr231m
{ 6656, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x9df30009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6656 = VFNMSUBPDr231mY
{ 6657, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1df30009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6657 = VFNMSUBPDr231r
{ 6658, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x9df30009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6658 = VFNMSUBPDr231rY
{ 6659, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x53e2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6659 = VFNMSUBPS4mr
{ 6660, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0xd3e2804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #6660 = VFNMSUBPS4mrY
{ 6661, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20005be2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6661 = VFNMSUBPS4rm
{ 6662, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x2000dbe2804d006ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #6662 = VFNMSUBPS4rmY
{ 6663, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20005be2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6663 = VFNMSUBPS4rr
{ 6664, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x2000dbe2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6664 = VFNMSUBPS4rrY
{ 6665, 4, 1, 0, 926, 0, 0xd3e2804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #6665 = VFNMSUBPS4rrY_REV
{ 6666, 4, 1, 0, 926, 0, 0x53e2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6666 = VFNMSUBPS4rr_REV
{ 6667, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x14f28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6667 = VFNMSUBPSr132m
{ 6668, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x94f28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6668 = VFNMSUBPSr132mY
{ 6669, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x14f28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6669 = VFNMSUBPSr132r
{ 6670, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x94f28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6670 = VFNMSUBPSr132rY
{ 6671, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15728009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6671 = VFNMSUBPSr213m
{ 6672, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95728009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6672 = VFNMSUBPSr213mY
{ 6673, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15728009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6673 = VFNMSUBPSr213r
{ 6674, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95728009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6674 = VFNMSUBPSr213rY
{ 6675, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x15f28009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6675 = VFNMSUBPSr231m
{ 6676, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x95f28009006ULL, nullptr, nullptr, OperandInfo553, -1 ,nullptr }, // Inst #6676 = VFNMSUBPSr231mY
{ 6677, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x15f28009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6677 = VFNMSUBPSr231r
{ 6678, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x95f28009005ULL, nullptr, nullptr, OperandInfo555, -1 ,nullptr }, // Inst #6678 = VFNMSUBPSr231rY
{ 6679, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x153fb004d006ULL, nullptr, nullptr, OperandInfo556, -1 ,nullptr }, // Inst #6679 = VFNMSUBSD4mr
{ 6680, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x153fb004d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6680 = VFNMSUBSD4mr_Int
{ 6681, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015bfb004d006ULL, nullptr, nullptr, OperandInfo557, -1 ,nullptr }, // Inst #6681 = VFNMSUBSD4rm
{ 6682, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015bfb004d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6682 = VFNMSUBSD4rm_Int
{ 6683, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015bfb004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #6683 = VFNMSUBSD4rr
{ 6684, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015bfb004d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6684 = VFNMSUBSD4rr_Int
{ 6685, 4, 1, 0, 926, 0, 0x153fb004d005ULL, nullptr, nullptr, OperandInfo558, -1 ,nullptr }, // Inst #6685 = VFNMSUBSD4rr_REV
{ 6686, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11cfb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6686 = VFNMSUBSDr132m
{ 6687, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11cfb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6687 = VFNMSUBSDr132m_Int
{ 6688, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11cfb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6688 = VFNMSUBSDr132r
{ 6689, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11cfb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6689 = VFNMSUBSDr132r_Int
{ 6690, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d7b0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6690 = VFNMSUBSDr213m
{ 6691, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11d7b0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6691 = VFNMSUBSDr213m_Int
{ 6692, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11d7b0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6692 = VFNMSUBSDr213r
{ 6693, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11d7b0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6693 = VFNMSUBSDr213r_Int
{ 6694, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11dfb0009006ULL, nullptr, nullptr, OperandInfo559, -1 ,nullptr }, // Inst #6694 = VFNMSUBSDr231m
{ 6695, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x11dfb0009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6695 = VFNMSUBSDr231m_Int
{ 6696, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x11dfb0009005ULL, nullptr, nullptr, OperandInfo560, -1 ,nullptr }, // Inst #6696 = VFNMSUBSDr231r
{ 6697, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x11dfb0009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6697 = VFNMSUBSDr231r_Int
{ 6698, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x153f2804d006ULL, nullptr, nullptr, OperandInfo561, -1 ,nullptr }, // Inst #6698 = VFNMSUBSS4mr
{ 6699, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x153f2804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #6699 = VFNMSUBSS4mr_Int
{ 6700, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015bf2804d006ULL, nullptr, nullptr, OperandInfo562, -1 ,nullptr }, // Inst #6700 = VFNMSUBSS4rm
{ 6701, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad), 0x20015bf2804d006ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #6701 = VFNMSUBSS4rm_Int
{ 6702, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015bf2804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr }, // Inst #6702 = VFNMSUBSS4rr
{ 6703, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x20015bf2804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #6703 = VFNMSUBSS4rr_Int
{ 6704, 4, 1, 0, 926, 0, 0x153f2804d005ULL, nullptr, nullptr, OperandInfo563, -1 ,nullptr }, // Inst #6704 = VFNMSUBSS4rr_REV
{ 6705, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114fa8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6705 = VFNMSUBSSr132m
{ 6706, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x114fa8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6706 = VFNMSUBSSr132m_Int
{ 6707, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x114fa8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6707 = VFNMSUBSSr132r
{ 6708, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x114fa8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6708 = VFNMSUBSSr132r_Int
{ 6709, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1157a8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6709 = VFNMSUBSSr213m
{ 6710, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1157a8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6710 = VFNMSUBSSr213m_Int
{ 6711, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x1157a8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6711 = VFNMSUBSSr213r
{ 6712, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x1157a8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6712 = VFNMSUBSSr213r_Int
{ 6713, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115fa8009006ULL, nullptr, nullptr, OperandInfo564, -1 ,nullptr }, // Inst #6713 = VFNMSUBSSr231m
{ 6714, 8, 1, 0, 927, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x115fa8009006ULL, nullptr, nullptr, OperandInfo552, -1 ,nullptr }, // Inst #6714 = VFNMSUBSSr231m_Int
{ 6715, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable)|(1ULL<<MCID::UsesCustomInserter), 0x115fa8009005ULL, nullptr, nullptr, OperandInfo565, -1 ,nullptr }, // Inst #6715 = VFNMSUBSSr231r
{ 6716, 4, 1, 0, 926, 0|(1ULL<<MCID::Commutable), 0x115fa8009005ULL, nullptr, nullptr, OperandInfo554, -1 ,nullptr }, // Inst #6716 = VFNMSUBSSr231r_Int
{ 6717, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000b37804d006ULL, nullptr, nullptr, OperandInfo566, -1 ,nullptr }, // Inst #6717 = VFPCLASSPDZ128rm
{ 6718, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100b37804d006ULL, nullptr, nullptr, OperandInfo566, -1 ,nullptr }, // Inst #6718 = VFPCLASSPDZ128rmb
{ 6719, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120b37804d006ULL, nullptr, nullptr, OperandInfo567, -1 ,nullptr }, // Inst #6719 = VFPCLASSPDZ128rmbk
{ 6720, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020b37804d006ULL, nullptr, nullptr, OperandInfo567, -1 ,nullptr }, // Inst #6720 = VFPCLASSPDZ128rmk
{ 6721, 3, 1, 0, 0, 0, 0x2000b37804d005ULL, nullptr, nullptr, OperandInfo568, -1 ,nullptr }, // Inst #6721 = VFPCLASSPDZ128rr
{ 6722, 4, 1, 0, 0, 0, 0x2020b37804d005ULL, nullptr, nullptr, OperandInfo569, -1 ,nullptr }, // Inst #6722 = VFPCLASSPDZ128rrk
{ 6723, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008b37804d006ULL, nullptr, nullptr, OperandInfo570, -1 ,nullptr }, // Inst #6723 = VFPCLASSPDZ256rm
{ 6724, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108b37804d006ULL, nullptr, nullptr, OperandInfo570, -1 ,nullptr }, // Inst #6724 = VFPCLASSPDZ256rmb
{ 6725, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128b37804d006ULL, nullptr, nullptr, OperandInfo571, -1 ,nullptr }, // Inst #6725 = VFPCLASSPDZ256rmbk
{ 6726, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028b37804d006ULL, nullptr, nullptr, OperandInfo571, -1 ,nullptr }, // Inst #6726 = VFPCLASSPDZ256rmk
{ 6727, 3, 1, 0, 0, 0, 0x4008b37804d005ULL, nullptr, nullptr, OperandInfo572, -1 ,nullptr }, // Inst #6727 = VFPCLASSPDZ256rr
{ 6728, 4, 1, 0, 0, 0, 0x4028b37804d005ULL, nullptr, nullptr, OperandInfo573, -1 ,nullptr }, // Inst #6728 = VFPCLASSPDZ256rrk
{ 6729, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080b37804d006ULL, nullptr, nullptr, OperandInfo574, -1 ,nullptr }, // Inst #6729 = VFPCLASSPDZrm
{ 6730, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180b37804d006ULL, nullptr, nullptr, OperandInfo574, -1 ,nullptr }, // Inst #6730 = VFPCLASSPDZrmb
{ 6731, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0b37804d006ULL, nullptr, nullptr, OperandInfo575, -1 ,nullptr }, // Inst #6731 = VFPCLASSPDZrmbk
{ 6732, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0b37804d006ULL, nullptr, nullptr, OperandInfo575, -1 ,nullptr }, // Inst #6732 = VFPCLASSPDZrmk
{ 6733, 3, 1, 0, 0, 0, 0x8080b37804d005ULL, nullptr, nullptr, OperandInfo576, -1 ,nullptr }, // Inst #6733 = VFPCLASSPDZrr
{ 6734, 4, 1, 0, 0, 0, 0x80a0b37804d005ULL, nullptr, nullptr, OperandInfo577, -1 ,nullptr }, // Inst #6734 = VFPCLASSPDZrrk
{ 6735, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000337804d006ULL, nullptr, nullptr, OperandInfo570, -1 ,nullptr }, // Inst #6735 = VFPCLASSPSZ128rm
{ 6736, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x900337804d006ULL, nullptr, nullptr, OperandInfo570, -1 ,nullptr }, // Inst #6736 = VFPCLASSPSZ128rmb
{ 6737, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x920337804d006ULL, nullptr, nullptr, OperandInfo571, -1 ,nullptr }, // Inst #6737 = VFPCLASSPSZ128rmbk
{ 6738, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020337804d006ULL, nullptr, nullptr, OperandInfo571, -1 ,nullptr }, // Inst #6738 = VFPCLASSPSZ128rmk
{ 6739, 3, 1, 0, 0, 0, 0x2000337804d005ULL, nullptr, nullptr, OperandInfo578, -1 ,nullptr }, // Inst #6739 = VFPCLASSPSZ128rr
{ 6740, 4, 1, 0, 0, 0, 0x2020337804d005ULL, nullptr, nullptr, OperandInfo579, -1 ,nullptr }, // Inst #6740 = VFPCLASSPSZ128rrk
{ 6741, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008337804d006ULL, nullptr, nullptr, OperandInfo574, -1 ,nullptr }, // Inst #6741 = VFPCLASSPSZ256rm
{ 6742, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x908337804d006ULL, nullptr, nullptr, OperandInfo574, -1 ,nullptr }, // Inst #6742 = VFPCLASSPSZ256rmb
{ 6743, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x928337804d006ULL, nullptr, nullptr, OperandInfo575, -1 ,nullptr }, // Inst #6743 = VFPCLASSPSZ256rmbk
{ 6744, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028337804d006ULL, nullptr, nullptr, OperandInfo575, -1 ,nullptr }, // Inst #6744 = VFPCLASSPSZ256rmk
{ 6745, 3, 1, 0, 0, 0, 0x4008337804d005ULL, nullptr, nullptr, OperandInfo580, -1 ,nullptr }, // Inst #6745 = VFPCLASSPSZ256rr
{ 6746, 4, 1, 0, 0, 0, 0x4028337804d005ULL, nullptr, nullptr, OperandInfo581, -1 ,nullptr }, // Inst #6746 = VFPCLASSPSZ256rrk
{ 6747, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080337804d006ULL, nullptr, nullptr, OperandInfo582, -1 ,nullptr }, // Inst #6747 = VFPCLASSPSZrm
{ 6748, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x980337804d006ULL, nullptr, nullptr, OperandInfo582, -1 ,nullptr }, // Inst #6748 = VFPCLASSPSZrmb
{ 6749, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a0337804d006ULL, nullptr, nullptr, OperandInfo583, -1 ,nullptr }, // Inst #6749 = VFPCLASSPSZrmbk
{ 6750, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0337804d006ULL, nullptr, nullptr, OperandInfo583, -1 ,nullptr }, // Inst #6750 = VFPCLASSPSZrmk
{ 6751, 3, 1, 0, 0, 0, 0x8080337804d005ULL, nullptr, nullptr, OperandInfo584, -1 ,nullptr }, // Inst #6751 = VFPCLASSPSZrr
{ 6752, 4, 1, 0, 0, 0, 0x80a0337804d005ULL, nullptr, nullptr, OperandInfo585, -1 ,nullptr }, // Inst #6752 = VFPCLASSPSZrrk
{ 6753, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1000b3f804d006ULL, nullptr, nullptr, OperandInfo586, -1 ,nullptr }, // Inst #6753 = VFPCLASSSDrm
{ 6754, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1020b3f804d006ULL, nullptr, nullptr, OperandInfo587, -1 ,nullptr }, // Inst #6754 = VFPCLASSSDrmk
{ 6755, 3, 1, 0, 0, 0, 0x1000b3f804d005ULL, nullptr, nullptr, OperandInfo588, -1 ,nullptr }, // Inst #6755 = VFPCLASSSDrr
{ 6756, 4, 1, 0, 0, 0, 0x1020b3f804d005ULL, nullptr, nullptr, OperandInfo589, -1 ,nullptr }, // Inst #6756 = VFPCLASSSDrrk
{ 6757, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80033f804d006ULL, nullptr, nullptr, OperandInfo586, -1 ,nullptr }, // Inst #6757 = VFPCLASSSSrm
{ 6758, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82033f804d006ULL, nullptr, nullptr, OperandInfo587, -1 ,nullptr }, // Inst #6758 = VFPCLASSSSrmk
{ 6759, 3, 1, 0, 0, 0, 0x80033f804d005ULL, nullptr, nullptr, OperandInfo588, -1 ,nullptr }, // Inst #6759 = VFPCLASSSSrr
{ 6760, 4, 1, 0, 0, 0, 0x82033f804d005ULL, nullptr, nullptr, OperandInfo589, -1 ,nullptr }, // Inst #6760 = VFPCLASSSSrrk
{ 6761, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40d0014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #6761 = VFRCZPDrm
{ 6762, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x840d0014806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #6762 = VFRCZPDrmY
{ 6763, 2, 1, 0, 0, 0, 0x40d0014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #6763 = VFRCZPDrr
{ 6764, 2, 1, 0, 0, 0, 0x840d0014805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #6764 = VFRCZPDrrY
{ 6765, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4048014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #6765 = VFRCZPSrm
{ 6766, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x84048014806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #6766 = VFRCZPSrmY
{ 6767, 2, 1, 0, 0, 0, 0x4048014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #6767 = VFRCZPSrr
{ 6768, 2, 1, 0, 0, 0, 0x84048014805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #6768 = VFRCZPSrrY
{ 6769, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x41d0014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #6769 = VFRCZSDrm
{ 6770, 2, 1, 0, 0, 0, 0x41d0014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #6770 = VFRCZSDrr
{ 6771, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4148014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #6771 = VFRCZSSrm
{ 6772, 2, 1, 0, 0, 0, 0x4148014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #6772 = VFRCZSSrr
{ 6773, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12ab0005006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #6773 = VFsANDNPDrm
{ 6774, 3, 1, 0, 160, 0, 0x12ab0005005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #6774 = VFsANDNPDrr
{ 6775, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12aa8004806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #6775 = VFsANDNPSrm
{ 6776, 3, 1, 0, 160, 0, 0x12aa8004805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #6776 = VFsANDNPSrr
{ 6777, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12a30005006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #6777 = VFsANDPDrm
{ 6778, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12a30005005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #6778 = VFsANDPDrr
{ 6779, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12a28004806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #6779 = VFsANDPSrm
{ 6780, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12a28004805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #6780 = VFsANDPSrr
{ 6781, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12b30005006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #6781 = VFsORPDrm
{ 6782, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12b30005005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #6782 = VFsORPDrr
{ 6783, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12b28004806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #6783 = VFsORPSrm
{ 6784, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12b28004805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #6784 = VFsORPSrr
{ 6785, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12bb0005006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #6785 = VFsXORPDrm
{ 6786, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12bb0005005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #6786 = VFsXORPDrr
{ 6787, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12ba8004806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #6787 = VFsXORPSrm
{ 6788, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12ba8004805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #6788 = VFsXORPSrr
{ 6789, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x92ab0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #6789 = VFvANDNPDYrm
{ 6790, 3, 1, 0, 160, 0, 0x92ab0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #6790 = VFvANDNPDYrr
{ 6791, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12ab0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #6791 = VFvANDNPDrm
{ 6792, 3, 1, 0, 160, 0, 0x12ab0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #6792 = VFvANDNPDrr
{ 6793, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x92aa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #6793 = VFvANDNPSYrm
{ 6794, 3, 1, 0, 160, 0, 0x92aa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #6794 = VFvANDNPSYrr
{ 6795, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12aa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #6795 = VFvANDNPSrm
{ 6796, 3, 1, 0, 160, 0, 0x12aa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #6796 = VFvANDNPSrr
{ 6797, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x92a30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #6797 = VFvANDPDYrm
{ 6798, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x92a30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #6798 = VFvANDPDYrr
{ 6799, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12a30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #6799 = VFvANDPDrm
{ 6800, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12a30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #6800 = VFvANDPDrr
{ 6801, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x92a28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #6801 = VFvANDPSYrm
{ 6802, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x92a28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #6802 = VFvANDPSYrr
{ 6803, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12a28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #6803 = VFvANDPSrm
{ 6804, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12a28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #6804 = VFvANDPSrr
{ 6805, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x92b30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #6805 = VFvORPDYrm
{ 6806, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x92b30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #6806 = VFvORPDYrr
{ 6807, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12b30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #6807 = VFvORPDrm
{ 6808, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12b30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #6808 = VFvORPDrr
{ 6809, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x92b28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #6809 = VFvORPSYrm
{ 6810, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x92b28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #6810 = VFvORPSYrr
{ 6811, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12b28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #6811 = VFvORPSrm
{ 6812, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12b28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #6812 = VFvORPSrr
{ 6813, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x92bb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #6813 = VFvXORPDYrm
{ 6814, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x92bb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #6814 = VFvXORPDYrr
{ 6815, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12bb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #6815 = VFvXORPDrm
{ 6816, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12bb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #6816 = VFvXORPDrr
{ 6817, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x92ba8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #6817 = VFvXORPSYrm
{ 6818, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x92ba8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #6818 = VFvXORPSYrr
{ 6819, 7, 1, 0, 159, 0|(1ULL<<MCID::MayLoad), 0x12ba8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #6819 = VFvXORPSrm
{ 6820, 3, 1, 0, 160, 0|(1ULL<<MCID::Commutable), 0x12ba8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #6820 = VFvXORPSrr
{ 6821, 9, 2, 0, 862, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xac930009006ULL, nullptr, nullptr, OperandInfo590, -1 ,nullptr }, // Inst #6821 = VGATHERDPDYrm
{ 6822, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1020c970009006ULL, nullptr, nullptr, OperandInfo591, -1 ,nullptr }, // Inst #6822 = VGATHERDPDZ128rm
{ 6823, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1028c970009006ULL, nullptr, nullptr, OperandInfo592, -1 ,nullptr }, // Inst #6823 = VGATHERDPDZ256rm
{ 6824, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a0c970009006ULL, nullptr, nullptr, OperandInfo593, -1 ,nullptr }, // Inst #6824 = VGATHERDPDZrm
{ 6825, 9, 2, 0, 861, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2c930009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr }, // Inst #6825 = VGATHERDPDrm
{ 6826, 9, 2, 0, 858, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xa4928009006ULL, nullptr, nullptr, OperandInfo595, -1 ,nullptr }, // Inst #6826 = VGATHERDPSYrm
{ 6827, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8204968009006ULL, nullptr, nullptr, OperandInfo596, -1 ,nullptr }, // Inst #6827 = VGATHERDPSZ128rm
{ 6828, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8284968009006ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #6828 = VGATHERDPSZ256rm
{ 6829, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8a04968009006ULL, nullptr, nullptr, OperandInfo598, -1 ,nullptr }, // Inst #6829 = VGATHERDPSZrm
{ 6830, 9, 2, 0, 857, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x24928009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr }, // Inst #6830 = VGATHERDPSrm
{ 6831, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0e378009019ULL, nullptr, nullptr, OperandInfo599, -1 ,nullptr }, // Inst #6831 = VGATHERPF0DPDm
{ 6832, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a06378009019ULL, nullptr, nullptr, OperandInfo600, -1 ,nullptr }, // Inst #6832 = VGATHERPF0DPSm
{ 6833, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a0e3f8009019ULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr }, // Inst #6833 = VGATHERPF0QPDm
{ 6834, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a063f8009019ULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr }, // Inst #6834 = VGATHERPF0QPSm
{ 6835, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0e37800901aULL, nullptr, nullptr, OperandInfo599, -1 ,nullptr }, // Inst #6835 = VGATHERPF1DPDm
{ 6836, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0637800901aULL, nullptr, nullptr, OperandInfo600, -1 ,nullptr }, // Inst #6836 = VGATHERPF1DPSm
{ 6837, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a0e3f800901aULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr }, // Inst #6837 = VGATHERPF1QPDm
{ 6838, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a063f800901aULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr }, // Inst #6838 = VGATHERPF1QPSm
{ 6839, 9, 2, 0, 864, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xac9b0009006ULL, nullptr, nullptr, OperandInfo595, -1 ,nullptr }, // Inst #6839 = VGATHERQPDYrm
{ 6840, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1020c9f0009006ULL, nullptr, nullptr, OperandInfo591, -1 ,nullptr }, // Inst #6840 = VGATHERQPDZ128rm
{ 6841, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1028c9f0009006ULL, nullptr, nullptr, OperandInfo602, -1 ,nullptr }, // Inst #6841 = VGATHERQPDZ256rm
{ 6842, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a0c9f0009006ULL, nullptr, nullptr, OperandInfo603, -1 ,nullptr }, // Inst #6842 = VGATHERQPDZrm
{ 6843, 9, 2, 0, 863, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2c9b0009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr }, // Inst #6843 = VGATHERQPDrm
{ 6844, 9, 2, 0, 860, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xa49a8009006ULL, nullptr, nullptr, OperandInfo604, -1 ,nullptr }, // Inst #6844 = VGATHERQPSYrm
{ 6845, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82049e8009006ULL, nullptr, nullptr, OperandInfo596, -1 ,nullptr }, // Inst #6845 = VGATHERQPSZ128rm
{ 6846, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82849e8009006ULL, nullptr, nullptr, OperandInfo605, -1 ,nullptr }, // Inst #6846 = VGATHERQPSZ256rm
{ 6847, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8a049e8009006ULL, nullptr, nullptr, OperandInfo606, -1 ,nullptr }, // Inst #6847 = VGATHERQPSZrm
{ 6848, 9, 2, 0, 859, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x249a8009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr }, // Inst #6848 = VGATHERQPSrm
{ 6849, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000a160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #6849 = VGETEXPPDZ128m
{ 6850, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100a160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #6850 = VGETEXPPDZ128mb
{ 6851, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120a160009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #6851 = VGETEXPPDZ128mbk
{ 6852, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160a160009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #6852 = VGETEXPPDZ128mbkz
{ 6853, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020a160009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #6853 = VGETEXPPDZ128mk
{ 6854, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060a160009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #6854 = VGETEXPPDZ128mkz
{ 6855, 2, 1, 0, 0, 0, 0x2000a160009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #6855 = VGETEXPPDZ128r
{ 6856, 4, 1, 0, 0, 0, 0x2020a160009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #6856 = VGETEXPPDZ128rk
{ 6857, 3, 1, 0, 0, 0, 0x2060a160009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #6857 = VGETEXPPDZ128rkz
{ 6858, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008a160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #6858 = VGETEXPPDZ256m
{ 6859, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108a160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #6859 = VGETEXPPDZ256mb
{ 6860, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128a160009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #6860 = VGETEXPPDZ256mbk
{ 6861, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168a160009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #6861 = VGETEXPPDZ256mbkz
{ 6862, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028a160009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #6862 = VGETEXPPDZ256mk
{ 6863, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068a160009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #6863 = VGETEXPPDZ256mkz
{ 6864, 2, 1, 0, 0, 0, 0x4008a160009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #6864 = VGETEXPPDZ256r
{ 6865, 4, 1, 0, 0, 0, 0x4028a160009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #6865 = VGETEXPPDZ256rk
{ 6866, 3, 1, 0, 0, 0, 0x4068a160009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #6866 = VGETEXPPDZ256rkz
{ 6867, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080a160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #6867 = VGETEXPPDm
{ 6868, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180a160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #6868 = VGETEXPPDmb
{ 6869, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0a160009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #6869 = VGETEXPPDmbk
{ 6870, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0a160009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #6870 = VGETEXPPDmbkz
{ 6871, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0a160009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #6871 = VGETEXPPDmk
{ 6872, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0a160009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #6872 = VGETEXPPDmkz
{ 6873, 2, 1, 0, 0, 0, 0x8080a160009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #6873 = VGETEXPPDr
{ 6874, 2, 1, 0, 0, 0, 0x1180a160009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #6874 = VGETEXPPDrb
{ 6875, 4, 1, 0, 0, 0, 0x11a0a160009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #6875 = VGETEXPPDrbk
{ 6876, 3, 1, 0, 0, 0, 0x11e0a160009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #6876 = VGETEXPPDrbkz
{ 6877, 4, 1, 0, 0, 0, 0x80a0a160009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #6877 = VGETEXPPDrk
{ 6878, 3, 1, 0, 0, 0, 0x80e0a160009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #6878 = VGETEXPPDrkz
{ 6879, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20002160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #6879 = VGETEXPPSZ128m
{ 6880, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #6880 = VGETEXPPSZ128mb
{ 6881, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202160009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #6881 = VGETEXPPSZ128mbk
{ 6882, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602160009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #6882 = VGETEXPPSZ128mbkz
{ 6883, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20202160009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #6883 = VGETEXPPSZ128mk
{ 6884, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20602160009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #6884 = VGETEXPPSZ128mkz
{ 6885, 2, 1, 0, 0, 0, 0x20002160009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #6885 = VGETEXPPSZ128r
{ 6886, 4, 1, 0, 0, 0, 0x20202160009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #6886 = VGETEXPPSZ128rk
{ 6887, 3, 1, 0, 0, 0, 0x20602160009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #6887 = VGETEXPPSZ128rkz
{ 6888, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40082160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #6888 = VGETEXPPSZ256m
{ 6889, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #6889 = VGETEXPPSZ256mb
{ 6890, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282160009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #6890 = VGETEXPPSZ256mbk
{ 6891, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682160009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #6891 = VGETEXPPSZ256mbkz
{ 6892, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40282160009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #6892 = VGETEXPPSZ256mk
{ 6893, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40682160009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #6893 = VGETEXPPSZ256mkz
{ 6894, 2, 1, 0, 0, 0, 0x40082160009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #6894 = VGETEXPPSZ256r
{ 6895, 4, 1, 0, 0, 0, 0x40282160009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #6895 = VGETEXPPSZ256rk
{ 6896, 3, 1, 0, 0, 0, 0x40682160009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #6896 = VGETEXPPSZ256rkz
{ 6897, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80802160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #6897 = VGETEXPPSm
{ 6898, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #6898 = VGETEXPPSmb
{ 6899, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02160009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #6899 = VGETEXPPSmbk
{ 6900, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02160009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #6900 = VGETEXPPSmbkz
{ 6901, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a02160009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #6901 = VGETEXPPSmk
{ 6902, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e02160009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #6902 = VGETEXPPSmkz
{ 6903, 2, 1, 0, 0, 0, 0x80802160009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #6903 = VGETEXPPSr
{ 6904, 2, 1, 0, 0, 0, 0x9802160009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #6904 = VGETEXPPSrb
{ 6905, 4, 1, 0, 0, 0, 0x9a02160009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #6905 = VGETEXPPSrbk
{ 6906, 3, 1, 0, 0, 0, 0x9e02160009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #6906 = VGETEXPPSrbkz
{ 6907, 4, 1, 0, 0, 0, 0x80a02160009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #6907 = VGETEXPPSrk
{ 6908, 3, 1, 0, 0, 0, 0x80e02160009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #6908 = VGETEXPPSrkz
{ 6909, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1001a1e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #6909 = VGETEXPSDm
{ 6910, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1021a1e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6910 = VGETEXPSDmk
{ 6911, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1061a1e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #6911 = VGETEXPSDmkz
{ 6912, 3, 1, 0, 0, 0, 0x1001a1e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #6912 = VGETEXPSDr
{ 6913, 3, 1, 0, 0, 0, 0x1101a1e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #6913 = VGETEXPSDrb
{ 6914, 5, 1, 0, 0, 0, 0x1121a1e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6914 = VGETEXPSDrbk
{ 6915, 4, 1, 0, 0, 0, 0x1161a1e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #6915 = VGETEXPSDrbkz
{ 6916, 5, 1, 0, 0, 0, 0x1021a1e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6916 = VGETEXPSDrk
{ 6917, 4, 1, 0, 0, 0, 0x1061a1e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #6917 = VGETEXPSDrkz
{ 6918, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80121e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #6918 = VGETEXPSSm
{ 6919, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82121e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #6919 = VGETEXPSSmk
{ 6920, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86121e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #6920 = VGETEXPSSmkz
{ 6921, 3, 1, 0, 0, 0, 0x80121e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #6921 = VGETEXPSSr
{ 6922, 3, 1, 0, 0, 0, 0x90121e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #6922 = VGETEXPSSrb
{ 6923, 5, 1, 0, 0, 0, 0x92121e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6923 = VGETEXPSSrbk
{ 6924, 4, 1, 0, 0, 0, 0x96121e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #6924 = VGETEXPSSrbkz
{ 6925, 5, 1, 0, 0, 0, 0x82121e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #6925 = VGETEXPSSrk
{ 6926, 4, 1, 0, 0, 0, 0x86121e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #6926 = VGETEXPSSrkz
{ 6927, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100937804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #6927 = VGETMANTPDZ128rmbi
{ 6928, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120937804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #6928 = VGETMANTPDZ128rmbik
{ 6929, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160937804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #6929 = VGETMANTPDZ128rmbikz
{ 6930, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000937804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #6930 = VGETMANTPDZ128rmi
{ 6931, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020937804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #6931 = VGETMANTPDZ128rmik
{ 6932, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060937804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #6932 = VGETMANTPDZ128rmikz
{ 6933, 3, 1, 0, 0, 0, 0x2000937804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #6933 = VGETMANTPDZ128rri
{ 6934, 5, 1, 0, 0, 0, 0x2020937804d005ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #6934 = VGETMANTPDZ128rrik
{ 6935, 4, 1, 0, 0, 0, 0x2060937804d005ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #6935 = VGETMANTPDZ128rrikz
{ 6936, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108937804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #6936 = VGETMANTPDZ256rmbi
{ 6937, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128937804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #6937 = VGETMANTPDZ256rmbik
{ 6938, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168937804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #6938 = VGETMANTPDZ256rmbikz
{ 6939, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008937804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #6939 = VGETMANTPDZ256rmi
{ 6940, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028937804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #6940 = VGETMANTPDZ256rmik
{ 6941, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068937804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #6941 = VGETMANTPDZ256rmikz
{ 6942, 3, 1, 0, 0, 0, 0x4008937804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #6942 = VGETMANTPDZ256rri
{ 6943, 5, 1, 0, 0, 0, 0x4028937804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #6943 = VGETMANTPDZ256rrik
{ 6944, 4, 1, 0, 0, 0, 0x4068937804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #6944 = VGETMANTPDZ256rrikz
{ 6945, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180937804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #6945 = VGETMANTPDZrmbi
{ 6946, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0937804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #6946 = VGETMANTPDZrmbik
{ 6947, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0937804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #6947 = VGETMANTPDZrmbikz
{ 6948, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080937804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #6948 = VGETMANTPDZrmi
{ 6949, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0937804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #6949 = VGETMANTPDZrmik
{ 6950, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0937804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #6950 = VGETMANTPDZrmikz
{ 6951, 3, 1, 0, 0, 0, 0x8080937804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #6951 = VGETMANTPDZrri
{ 6952, 3, 1, 0, 0, 0, 0x1180937804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #6952 = VGETMANTPDZrrib
{ 6953, 5, 1, 0, 0, 0, 0x11a0937804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #6953 = VGETMANTPDZrribk
{ 6954, 4, 1, 0, 0, 0, 0x11e0937804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #6954 = VGETMANTPDZrribkz
{ 6955, 5, 1, 0, 0, 0, 0x80a0937804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #6955 = VGETMANTPDZrrik
{ 6956, 4, 1, 0, 0, 0, 0x80e0937804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #6956 = VGETMANTPDZrrikz
{ 6957, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x900137804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #6957 = VGETMANTPSZ128rmbi
{ 6958, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x920137804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #6958 = VGETMANTPSZ128rmbik
{ 6959, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x960137804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #6959 = VGETMANTPSZ128rmbikz
{ 6960, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000137804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #6960 = VGETMANTPSZ128rmi
{ 6961, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020137804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #6961 = VGETMANTPSZ128rmik
{ 6962, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060137804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #6962 = VGETMANTPSZ128rmikz
{ 6963, 3, 1, 0, 0, 0, 0x2000137804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #6963 = VGETMANTPSZ128rri
{ 6964, 5, 1, 0, 0, 0, 0x2020137804d005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #6964 = VGETMANTPSZ128rrik
{ 6965, 4, 1, 0, 0, 0, 0x2060137804d005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #6965 = VGETMANTPSZ128rrikz
{ 6966, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x908137804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #6966 = VGETMANTPSZ256rmbi
{ 6967, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x928137804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #6967 = VGETMANTPSZ256rmbik
{ 6968, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x968137804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #6968 = VGETMANTPSZ256rmbikz
{ 6969, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008137804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #6969 = VGETMANTPSZ256rmi
{ 6970, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028137804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #6970 = VGETMANTPSZ256rmik
{ 6971, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068137804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #6971 = VGETMANTPSZ256rmikz
{ 6972, 3, 1, 0, 0, 0, 0x4008137804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #6972 = VGETMANTPSZ256rri
{ 6973, 5, 1, 0, 0, 0, 0x4028137804d005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #6973 = VGETMANTPSZ256rrik
{ 6974, 4, 1, 0, 0, 0, 0x4068137804d005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #6974 = VGETMANTPSZ256rrikz
{ 6975, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x980137804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #6975 = VGETMANTPSZrmbi
{ 6976, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a0137804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #6976 = VGETMANTPSZrmbik
{ 6977, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e0137804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #6977 = VGETMANTPSZrmbikz
{ 6978, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080137804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #6978 = VGETMANTPSZrmi
{ 6979, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0137804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #6979 = VGETMANTPSZrmik
{ 6980, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0137804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #6980 = VGETMANTPSZrmikz
{ 6981, 3, 1, 0, 0, 0, 0x8080137804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #6981 = VGETMANTPSZrri
{ 6982, 3, 1, 0, 0, 0, 0x980137804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #6982 = VGETMANTPSZrrib
{ 6983, 5, 1, 0, 0, 0, 0x9a0137804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #6983 = VGETMANTPSZrribk
{ 6984, 4, 1, 0, 0, 0, 0x9e0137804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #6984 = VGETMANTPSZrribkz
{ 6985, 5, 1, 0, 0, 0, 0x80a0137804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #6985 = VGETMANTPSZrrik
{ 6986, 4, 1, 0, 0, 0, 0x80e0137804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #6986 = VGETMANTPSZrrikz
{ 6987, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x101193f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #6987 = VGETMANTSDZ128rmi
{ 6988, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x101193f804d006ULL, nullptr, nullptr, OperandInfo631, -1 ,nullptr }, // Inst #6988 = VGETMANTSDZ128rmi_alt
{ 6989, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x103193f804d006ULL, nullptr, nullptr, OperandInfo632, -1 ,nullptr }, // Inst #6989 = VGETMANTSDZ128rmi_altk
{ 6990, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x107193f804d006ULL, nullptr, nullptr, OperandInfo633, -1 ,nullptr }, // Inst #6990 = VGETMANTSDZ128rmi_altkz
{ 6991, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x103193f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #6991 = VGETMANTSDZ128rmik
{ 6992, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x107193f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr }, // Inst #6992 = VGETMANTSDZ128rmikz
{ 6993, 4, 1, 0, 0, 0, 0x101193f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #6993 = VGETMANTSDZ128rri
{ 6994, 4, 1, 0, 0, 0, 0x111193f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #6994 = VGETMANTSDZ128rrib
{ 6995, 6, 1, 0, 0, 0, 0x113193f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6995 = VGETMANTSDZ128rribk
{ 6996, 5, 1, 0, 0, 0, 0x117193f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #6996 = VGETMANTSDZ128rribkz
{ 6997, 6, 1, 0, 0, 0, 0x103193f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #6997 = VGETMANTSDZ128rrik
{ 6998, 5, 1, 0, 0, 0, 0x107193f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #6998 = VGETMANTSDZ128rrikz
{ 6999, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81113f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #6999 = VGETMANTSSZ128rmi
{ 7000, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x81113f804d006ULL, nullptr, nullptr, OperandInfo635, -1 ,nullptr }, // Inst #7000 = VGETMANTSSZ128rmi_alt
{ 7001, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x83113f804d006ULL, nullptr, nullptr, OperandInfo636, -1 ,nullptr }, // Inst #7001 = VGETMANTSSZ128rmi_altk
{ 7002, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x87113f804d006ULL, nullptr, nullptr, OperandInfo637, -1 ,nullptr }, // Inst #7002 = VGETMANTSSZ128rmi_altkz
{ 7003, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x83113f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #7003 = VGETMANTSSZ128rmik
{ 7004, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x87113f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr }, // Inst #7004 = VGETMANTSSZ128rmikz
{ 7005, 4, 1, 0, 0, 0, 0x81113f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #7005 = VGETMANTSSZ128rri
{ 7006, 4, 1, 0, 0, 0, 0x91113f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #7006 = VGETMANTSSZ128rrib
{ 7007, 6, 1, 0, 0, 0, 0x93113f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #7007 = VGETMANTSSZ128rribk
{ 7008, 5, 1, 0, 0, 0, 0x97113f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #7008 = VGETMANTSSZ128rribkz
{ 7009, 6, 1, 0, 0, 0, 0x83113f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #7009 = VGETMANTSSZ128rrik
{ 7010, 5, 1, 0, 0, 0, 0x87113f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #7010 = VGETMANTSSZ128rrikz
{ 7011, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x93e30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7011 = VHADDPDYrm
{ 7012, 3, 1, 0, 902, 0, 0x93e30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7012 = VHADDPDYrr
{ 7013, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x13e30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7013 = VHADDPDrm
{ 7014, 3, 1, 0, 902, 0, 0x13e30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7014 = VHADDPDrr
{ 7015, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x93e28006006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7015 = VHADDPSYrm
{ 7016, 3, 1, 0, 902, 0, 0x93e28006005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7016 = VHADDPSYrr
{ 7017, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x13e28006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7017 = VHADDPSrm
{ 7018, 3, 1, 0, 902, 0, 0x13e28006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7018 = VHADDPSrr
{ 7019, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x93eb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7019 = VHSUBPDYrm
{ 7020, 3, 1, 0, 902, 0, 0x93eb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7020 = VHSUBPDYrr
{ 7021, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x13eb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7021 = VHSUBPDrm
{ 7022, 3, 1, 0, 902, 0, 0x13eb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7022 = VHSUBPDrr
{ 7023, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x93ea8006006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7023 = VHSUBPSYrm
{ 7024, 3, 1, 0, 902, 0, 0x93ea8006005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7024 = VHSUBPSYrr
{ 7025, 7, 1, 0, 903, 0|(1ULL<<MCID::MayLoad), 0x13ea8006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7025 = VHSUBPSrm
{ 7026, 3, 1, 0, 902, 0, 0x13ea8006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7026 = VHSUBPSrr
{ 7027, 8, 1, 0, 853, 0|(1ULL<<MCID::MayLoad), 0x90c2804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7027 = VINSERTF128rm
{ 7028, 4, 1, 0, 852, 0, 0x90c2804d005ULL, nullptr, nullptr, OperandInfo638, -1 ,nullptr }, // Inst #7028 = VINSERTF128rr
{ 7029, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20090c6804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #7029 = VINSERTF32x4Z256rm
{ 7030, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20290c6804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7030 = VINSERTF32x4Z256rmk
{ 7031, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20690c6804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #7031 = VINSERTF32x4Z256rmkz
{ 7032, 4, 1, 0, 0, 0, 0x40090c6804d005ULL, nullptr, nullptr, OperandInfo639, -1 ,nullptr }, // Inst #7032 = VINSERTF32x4Z256rr
{ 7033, 6, 1, 0, 0, 0, 0x40290c6804d005ULL, nullptr, nullptr, OperandInfo640, -1 ,nullptr }, // Inst #7033 = VINSERTF32x4Z256rrk
{ 7034, 5, 1, 0, 0, 0, 0x40690c6804d005ULL, nullptr, nullptr, OperandInfo641, -1 ,nullptr }, // Inst #7034 = VINSERTF32x4Z256rrkz
{ 7035, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20810c6804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #7035 = VINSERTF32x4Zrm
{ 7036, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a10c6804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #7036 = VINSERTF32x4Zrmk
{ 7037, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e10c6804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #7037 = VINSERTF32x4Zrmkz
{ 7038, 4, 1, 0, 0, 0, 0x80810c6804d005ULL, nullptr, nullptr, OperandInfo642, -1 ,nullptr }, // Inst #7038 = VINSERTF32x4Zrr
{ 7039, 6, 1, 0, 0, 0, 0x80a10c6804d005ULL, nullptr, nullptr, OperandInfo643, -1 ,nullptr }, // Inst #7039 = VINSERTF32x4Zrrk
{ 7040, 5, 1, 0, 0, 0, 0x80e10c6804d005ULL, nullptr, nullptr, OperandInfo644, -1 ,nullptr }, // Inst #7040 = VINSERTF32x4Zrrkz
{ 7041, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40810d6804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #7041 = VINSERTF32x8Zrm
{ 7042, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a10d6804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #7042 = VINSERTF32x8Zrmk
{ 7043, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e10d6804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #7043 = VINSERTF32x8Zrmkz
{ 7044, 4, 1, 0, 0, 0, 0x80810d6804d005ULL, nullptr, nullptr, OperandInfo645, -1 ,nullptr }, // Inst #7044 = VINSERTF32x8Zrr
{ 7045, 6, 1, 0, 0, 0, 0x80a10d6804d005ULL, nullptr, nullptr, OperandInfo646, -1 ,nullptr }, // Inst #7045 = VINSERTF32x8Zrrk
{ 7046, 5, 1, 0, 0, 0, 0x80e10d6804d005ULL, nullptr, nullptr, OperandInfo647, -1 ,nullptr }, // Inst #7046 = VINSERTF32x8Zrrkz
{ 7047, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20098c7004d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #7047 = VINSERTF64x2Z256rm
{ 7048, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20298c7004d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #7048 = VINSERTF64x2Z256rmk
{ 7049, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20698c7004d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #7049 = VINSERTF64x2Z256rmkz
{ 7050, 4, 1, 0, 0, 0, 0x40098c7004d005ULL, nullptr, nullptr, OperandInfo639, -1 ,nullptr }, // Inst #7050 = VINSERTF64x2Z256rr
{ 7051, 6, 1, 0, 0, 0, 0x40298c7004d005ULL, nullptr, nullptr, OperandInfo648, -1 ,nullptr }, // Inst #7051 = VINSERTF64x2Z256rrk
{ 7052, 5, 1, 0, 0, 0, 0x40698c7004d005ULL, nullptr, nullptr, OperandInfo649, -1 ,nullptr }, // Inst #7052 = VINSERTF64x2Z256rrkz
{ 7053, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20818c7004d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #7053 = VINSERTF64x2Zrm
{ 7054, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a18c7004d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #7054 = VINSERTF64x2Zrmk
{ 7055, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e18c7004d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #7055 = VINSERTF64x2Zrmkz
{ 7056, 4, 1, 0, 0, 0, 0x80818c7004d005ULL, nullptr, nullptr, OperandInfo642, -1 ,nullptr }, // Inst #7056 = VINSERTF64x2Zrr
{ 7057, 6, 1, 0, 0, 0, 0x80a18c7004d005ULL, nullptr, nullptr, OperandInfo650, -1 ,nullptr }, // Inst #7057 = VINSERTF64x2Zrrk
{ 7058, 5, 1, 0, 0, 0, 0x80e18c7004d005ULL, nullptr, nullptr, OperandInfo651, -1 ,nullptr }, // Inst #7058 = VINSERTF64x2Zrrkz
{ 7059, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40818d7004d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #7059 = VINSERTF64x4Zrm
{ 7060, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a18d7004d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #7060 = VINSERTF64x4Zrmk
{ 7061, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e18d7004d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #7061 = VINSERTF64x4Zrmkz
{ 7062, 4, 1, 0, 0, 0, 0x80818d7004d005ULL, nullptr, nullptr, OperandInfo645, -1 ,nullptr }, // Inst #7062 = VINSERTF64x4Zrr
{ 7063, 6, 1, 0, 0, 0, 0x80a18d7004d005ULL, nullptr, nullptr, OperandInfo652, -1 ,nullptr }, // Inst #7063 = VINSERTF64x4Zrrk
{ 7064, 5, 1, 0, 0, 0, 0x80e18d7004d005ULL, nullptr, nullptr, OperandInfo653, -1 ,nullptr }, // Inst #7064 = VINSERTF64x4Zrrkz
{ 7065, 8, 1, 0, 547, 0|(1ULL<<MCID::MayLoad), 0x91c3804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7065 = VINSERTI128rm
{ 7066, 4, 1, 0, 544, 0, 0x91c3804d005ULL, nullptr, nullptr, OperandInfo638, -1 ,nullptr }, // Inst #7066 = VINSERTI128rr
{ 7067, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20091c7804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #7067 = VINSERTI32x4Z256rm
{ 7068, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20291c7804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #7068 = VINSERTI32x4Z256rmk
{ 7069, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20691c7804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #7069 = VINSERTI32x4Z256rmkz
{ 7070, 4, 1, 0, 0, 0, 0x40091c7804d005ULL, nullptr, nullptr, OperandInfo639, -1 ,nullptr }, // Inst #7070 = VINSERTI32x4Z256rr
{ 7071, 6, 1, 0, 0, 0, 0x40291c7804d005ULL, nullptr, nullptr, OperandInfo640, -1 ,nullptr }, // Inst #7071 = VINSERTI32x4Z256rrk
{ 7072, 5, 1, 0, 0, 0, 0x40691c7804d005ULL, nullptr, nullptr, OperandInfo641, -1 ,nullptr }, // Inst #7072 = VINSERTI32x4Z256rrkz
{ 7073, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20811c7804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #7073 = VINSERTI32x4Zrm
{ 7074, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a11c7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #7074 = VINSERTI32x4Zrmk
{ 7075, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e11c7804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #7075 = VINSERTI32x4Zrmkz
{ 7076, 4, 1, 0, 0, 0, 0x80811c7804d005ULL, nullptr, nullptr, OperandInfo642, -1 ,nullptr }, // Inst #7076 = VINSERTI32x4Zrr
{ 7077, 6, 1, 0, 0, 0, 0x80a11c7804d005ULL, nullptr, nullptr, OperandInfo643, -1 ,nullptr }, // Inst #7077 = VINSERTI32x4Zrrk
{ 7078, 5, 1, 0, 0, 0, 0x80e11c7804d005ULL, nullptr, nullptr, OperandInfo644, -1 ,nullptr }, // Inst #7078 = VINSERTI32x4Zrrkz
{ 7079, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40811d7804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #7079 = VINSERTI32x8Zrm
{ 7080, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a11d7804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #7080 = VINSERTI32x8Zrmk
{ 7081, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e11d7804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #7081 = VINSERTI32x8Zrmkz
{ 7082, 4, 1, 0, 0, 0, 0x80811d7804d005ULL, nullptr, nullptr, OperandInfo645, -1 ,nullptr }, // Inst #7082 = VINSERTI32x8Zrr
{ 7083, 6, 1, 0, 0, 0, 0x80a11d7804d005ULL, nullptr, nullptr, OperandInfo646, -1 ,nullptr }, // Inst #7083 = VINSERTI32x8Zrrk
{ 7084, 5, 1, 0, 0, 0, 0x80e11d7804d005ULL, nullptr, nullptr, OperandInfo647, -1 ,nullptr }, // Inst #7084 = VINSERTI32x8Zrrkz
{ 7085, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20099c7804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #7085 = VINSERTI64x2Z256rm
{ 7086, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20299c7804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #7086 = VINSERTI64x2Z256rmk
{ 7087, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20699c7804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #7087 = VINSERTI64x2Z256rmkz
{ 7088, 4, 1, 0, 0, 0, 0x40099c7804d005ULL, nullptr, nullptr, OperandInfo639, -1 ,nullptr }, // Inst #7088 = VINSERTI64x2Z256rr
{ 7089, 6, 1, 0, 0, 0, 0x40299c7804d005ULL, nullptr, nullptr, OperandInfo648, -1 ,nullptr }, // Inst #7089 = VINSERTI64x2Z256rrk
{ 7090, 5, 1, 0, 0, 0, 0x40699c7804d005ULL, nullptr, nullptr, OperandInfo649, -1 ,nullptr }, // Inst #7090 = VINSERTI64x2Z256rrkz
{ 7091, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20819c7804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #7091 = VINSERTI64x2Zrm
{ 7092, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a19c7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #7092 = VINSERTI64x2Zrmk
{ 7093, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e19c7804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #7093 = VINSERTI64x2Zrmkz
{ 7094, 4, 1, 0, 0, 0, 0x80819c7804d005ULL, nullptr, nullptr, OperandInfo642, -1 ,nullptr }, // Inst #7094 = VINSERTI64x2Zrr
{ 7095, 6, 1, 0, 0, 0, 0x80a19c7804d005ULL, nullptr, nullptr, OperandInfo650, -1 ,nullptr }, // Inst #7095 = VINSERTI64x2Zrrk
{ 7096, 5, 1, 0, 0, 0, 0x80e19c7804d005ULL, nullptr, nullptr, OperandInfo651, -1 ,nullptr }, // Inst #7096 = VINSERTI64x2Zrrkz
{ 7097, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40819d7804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #7097 = VINSERTI64x4Zrm
{ 7098, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a19d7804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #7098 = VINSERTI64x4Zrmk
{ 7099, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e19d7804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #7099 = VINSERTI64x4Zrmkz
{ 7100, 4, 1, 0, 0, 0, 0x80819d7804d005ULL, nullptr, nullptr, OperandInfo645, -1 ,nullptr }, // Inst #7100 = VINSERTI64x4Zrr
{ 7101, 6, 1, 0, 0, 0, 0x80a19d7804d005ULL, nullptr, nullptr, OperandInfo652, -1 ,nullptr }, // Inst #7101 = VINSERTI64x4Zrrk
{ 7102, 5, 1, 0, 0, 0, 0x80e19d7804d005ULL, nullptr, nullptr, OperandInfo653, -1 ,nullptr }, // Inst #7102 = VINSERTI64x4Zrrkz
{ 7103, 8, 1, 0, 548, 0|(1ULL<<MCID::MayLoad), 0x110a804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #7103 = VINSERTPSrm
{ 7104, 4, 1, 0, 549, 0, 0x110a804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #7104 = VINSERTPSrr
{ 7105, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80110f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #7105 = VINSERTPSzrm
{ 7106, 4, 1, 0, 0, 0, 0x200110f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #7106 = VINSERTPSzrr
{ 7107, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x87830006006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7107 = VLDDQUYrm
{ 7108, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x7830006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7108 = VLDDQUrm
{ 7109, 5, 0, 0, 945, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x572800481aULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #7109 = VLDMXCSR
{ 7110, 2, 0, 0, 800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7bb8005005ULL, ImplicitList32, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7110 = VMASKMOVDQU
{ 7111, 2, 0, 0, 800, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x7bb8005005ULL, ImplicitList45, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7111 = VMASKMOVDQU64
{ 7112, 7, 0, 0, 856, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x917b0009004ULL, nullptr, nullptr, OperandInfo654, -1 ,nullptr }, // Inst #7112 = VMASKMOVPDYmr
{ 7113, 7, 1, 0, 854, 0|(1ULL<<MCID::MayLoad), 0x916b0009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7113 = VMASKMOVPDYrm
{ 7114, 7, 0, 0, 855, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x117b0009004ULL, nullptr, nullptr, OperandInfo655, -1 ,nullptr }, // Inst #7114 = VMASKMOVPDmr
{ 7115, 7, 1, 0, 854, 0|(1ULL<<MCID::MayLoad), 0x116b0009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7115 = VMASKMOVPDrm
{ 7116, 7, 0, 0, 856, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x91728009004ULL, nullptr, nullptr, OperandInfo654, -1 ,nullptr }, // Inst #7116 = VMASKMOVPSYmr
{ 7117, 7, 1, 0, 854, 0|(1ULL<<MCID::MayLoad), 0x91628009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7117 = VMASKMOVPSYrm
{ 7118, 7, 0, 0, 855, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x11728009004ULL, nullptr, nullptr, OperandInfo655, -1 ,nullptr }, // Inst #7118 = VMASKMOVPSmr
{ 7119, 7, 1, 0, 854, 0|(1ULL<<MCID::MayLoad), 0x11628009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7119 = VMASKMOVPSrm
{ 7120, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x92fb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7120 = VMAXCPDYrm
{ 7121, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x92fb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7121 = VMAXCPDYrr
{ 7122, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x12fb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7122 = VMAXCPDrm
{ 7123, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x12fb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7123 = VMAXCPDrr
{ 7124, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x92fa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7124 = VMAXCPSYrm
{ 7125, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x92fa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7125 = VMAXCPSYrr
{ 7126, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x12fa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7126 = VMAXCPSrm
{ 7127, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x12fa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7127 = VMAXCPSrr
{ 7128, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112fb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #7128 = VMAXCSDrm
{ 7129, 3, 1, 0, 18, 0|(1ULL<<MCID::Commutable), 0x112fb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #7129 = VMAXCSDrr
{ 7130, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112fa8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #7130 = VMAXCSSrm
{ 7131, 3, 1, 0, 20, 0|(1ULL<<MCID::Commutable), 0x112fa8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #7131 = VMAXCSSrr
{ 7132, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x92fb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7132 = VMAXPDYrm
{ 7133, 3, 1, 0, 14, 0, 0x92fb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7133 = VMAXPDYrr
{ 7134, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001afe0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7134 = VMAXPDZ128rm
{ 7135, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101afe0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7135 = VMAXPDZ128rmb
{ 7136, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121afe0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #7136 = VMAXPDZ128rmbk
{ 7137, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161afe0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #7137 = VMAXPDZ128rmbkz
{ 7138, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021afe0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #7138 = VMAXPDZ128rmk
{ 7139, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061afe0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #7139 = VMAXPDZ128rmkz
{ 7140, 3, 1, 0, 0, 0, 0x2001afe0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7140 = VMAXPDZ128rr
{ 7141, 5, 1, 0, 0, 0, 0x2021afe0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #7141 = VMAXPDZ128rrk
{ 7142, 4, 1, 0, 0, 0, 0x2061afe0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #7142 = VMAXPDZ128rrkz
{ 7143, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009afe0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7143 = VMAXPDZ256rm
{ 7144, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109afe0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7144 = VMAXPDZ256rmb
{ 7145, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129afe0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #7145 = VMAXPDZ256rmbk
{ 7146, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169afe0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #7146 = VMAXPDZ256rmbkz
{ 7147, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029afe0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #7147 = VMAXPDZ256rmk
{ 7148, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069afe0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #7148 = VMAXPDZ256rmkz
{ 7149, 3, 1, 0, 0, 0, 0x4009afe0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #7149 = VMAXPDZ256rr
{ 7150, 5, 1, 0, 0, 0, 0x4029afe0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #7150 = VMAXPDZ256rrk
{ 7151, 4, 1, 0, 0, 0, 0x4069afe0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #7151 = VMAXPDZ256rrkz
{ 7152, 3, 1, 0, 0, 0, 0x1181afe0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7152 = VMAXPDZrb
{ 7153, 5, 1, 0, 0, 0, 0x11a1afe0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #7153 = VMAXPDZrbk
{ 7154, 4, 1, 0, 0, 0, 0x11e1afe0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #7154 = VMAXPDZrbkz
{ 7155, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081afe0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7155 = VMAXPDZrm
{ 7156, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181afe0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7156 = VMAXPDZrmb
{ 7157, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1afe0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #7157 = VMAXPDZrmbk
{ 7158, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1afe0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #7158 = VMAXPDZrmbkz
{ 7159, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1afe0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #7159 = VMAXPDZrmk
{ 7160, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1afe0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #7160 = VMAXPDZrmkz
{ 7161, 3, 1, 0, 0, 0, 0x8081afe0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7161 = VMAXPDZrr
{ 7162, 5, 1, 0, 0, 0, 0x80a1afe0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #7162 = VMAXPDZrrk
{ 7163, 4, 1, 0, 0, 0, 0x80e1afe0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #7163 = VMAXPDZrrkz
{ 7164, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x12fb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7164 = VMAXPDrm
{ 7165, 3, 1, 0, 14, 0, 0x12fb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7165 = VMAXPDrr
{ 7166, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x92fa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7166 = VMAXPSYrm
{ 7167, 3, 1, 0, 16, 0, 0x92fa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7167 = VMAXPSYrr
{ 7168, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012fe0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7168 = VMAXPSZ128rm
{ 7169, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012fe0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7169 = VMAXPSZ128rmb
{ 7170, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212fe0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #7170 = VMAXPSZ128rmbk
{ 7171, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612fe0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #7171 = VMAXPSZ128rmbkz
{ 7172, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212fe0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #7172 = VMAXPSZ128rmk
{ 7173, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612fe0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #7173 = VMAXPSZ128rmkz
{ 7174, 3, 1, 0, 0, 0, 0x20012fe0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7174 = VMAXPSZ128rr
{ 7175, 5, 1, 0, 0, 0, 0x20212fe0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #7175 = VMAXPSZ128rrk
{ 7176, 4, 1, 0, 0, 0, 0x20612fe0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #7176 = VMAXPSZ128rrkz
{ 7177, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092fe0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7177 = VMAXPSZ256rm
{ 7178, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092fe0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7178 = VMAXPSZ256rmb
{ 7179, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292fe0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #7179 = VMAXPSZ256rmbk
{ 7180, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692fe0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #7180 = VMAXPSZ256rmbkz
{ 7181, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292fe0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #7181 = VMAXPSZ256rmk
{ 7182, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692fe0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #7182 = VMAXPSZ256rmkz
{ 7183, 3, 1, 0, 0, 0, 0x40092fe0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #7183 = VMAXPSZ256rr
{ 7184, 5, 1, 0, 0, 0, 0x40292fe0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #7184 = VMAXPSZ256rrk
{ 7185, 4, 1, 0, 0, 0, 0x40692fe0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #7185 = VMAXPSZ256rrkz
{ 7186, 3, 1, 0, 0, 0, 0x9812fe0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7186 = VMAXPSZrb
{ 7187, 5, 1, 0, 0, 0, 0x9a12fe0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #7187 = VMAXPSZrbk
{ 7188, 4, 1, 0, 0, 0, 0x9e12fe0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #7188 = VMAXPSZrbkz
{ 7189, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812fe0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7189 = VMAXPSZrm
{ 7190, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812fe0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7190 = VMAXPSZrmb
{ 7191, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12fe0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #7191 = VMAXPSZrmbk
{ 7192, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12fe0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #7192 = VMAXPSZrmbkz
{ 7193, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12fe0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #7193 = VMAXPSZrmk
{ 7194, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12fe0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #7194 = VMAXPSZrmkz
{ 7195, 3, 1, 0, 0, 0, 0x80812fe0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7195 = VMAXPSZrr
{ 7196, 5, 1, 0, 0, 0, 0x80a12fe0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #7196 = VMAXPSZrrk
{ 7197, 4, 1, 0, 0, 0, 0x80e12fe0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #7197 = VMAXPSZrrkz
{ 7198, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x12fa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7198 = VMAXPSrm
{ 7199, 3, 1, 0, 16, 0, 0x12fa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7199 = VMAXPSrr
{ 7200, 7, 1, 0, 525, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011afe0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #7200 = VMAXSDZrm
{ 7201, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011afe0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7201 = VMAXSDZrm_Int
{ 7202, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031afe0006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #7202 = VMAXSDZrm_Intk
{ 7203, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071afe0006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #7203 = VMAXSDZrm_Intkz
{ 7204, 3, 1, 0, 525, 0|(1ULL<<MCID::Commutable), 0x1011afe0006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr }, // Inst #7204 = VMAXSDZrr
{ 7205, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x1011afe0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7205 = VMAXSDZrr_Int
{ 7206, 5, 1, 0, 0, 0, 0x1031afe0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7206 = VMAXSDZrr_Intk
{ 7207, 4, 1, 0, 0, 0, 0x1071afe0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7207 = VMAXSDZrr_Intkz
{ 7208, 3, 1, 0, 0, 0, 0x1111afe0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7208 = VMAXSDZrrb
{ 7209, 5, 1, 0, 0, 0, 0x1131afe0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7209 = VMAXSDZrrbk
{ 7210, 4, 1, 0, 0, 0, 0x1171afe0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7210 = VMAXSDZrrbkz
{ 7211, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112fb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #7211 = VMAXSDrm
{ 7212, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112fb0006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7212 = VMAXSDrm_Int
{ 7213, 3, 1, 0, 18, 0, 0x112fb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #7213 = VMAXSDrr
{ 7214, 3, 1, 0, 18, 0, 0x112fb0006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7214 = VMAXSDrr_Int
{ 7215, 7, 1, 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112fe0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #7215 = VMAXSSZrm
{ 7216, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112fe0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7216 = VMAXSSZrm_Int
{ 7217, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8312fe0005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #7217 = VMAXSSZrm_Intk
{ 7218, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8712fe0005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #7218 = VMAXSSZrm_Intkz
{ 7219, 3, 1, 0, 526, 0|(1ULL<<MCID::Commutable), 0x8112fe0005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr }, // Inst #7219 = VMAXSSZrr
{ 7220, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8112fe0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7220 = VMAXSSZrr_Int
{ 7221, 5, 1, 0, 0, 0, 0x8312fe0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7221 = VMAXSSZrr_Intk
{ 7222, 4, 1, 0, 0, 0, 0x8712fe0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7222 = VMAXSSZrr_Intkz
{ 7223, 3, 1, 0, 0, 0, 0x9112fe0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7223 = VMAXSSZrrb
{ 7224, 5, 1, 0, 0, 0, 0x9312fe0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7224 = VMAXSSZrrbk
{ 7225, 4, 1, 0, 0, 0, 0x9712fe0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7225 = VMAXSSZrrbkz
{ 7226, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112fa8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #7226 = VMAXSSrm
{ 7227, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112fa8005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7227 = VMAXSSrm_Int
{ 7228, 3, 1, 0, 20, 0, 0x112fa8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #7228 = VMAXSSrr
{ 7229, 3, 1, 0, 20, 0, 0x112fa8005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7229 = VMAXSSrr_Int
{ 7230, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004021ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #7230 = VMCALL
{ 7231, 5, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x638000501eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #7231 = VMCLEARm
{ 7232, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004034ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #7232 = VMFUNC
{ 7233, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x92eb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7233 = VMINCPDYrm
{ 7234, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x92eb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7234 = VMINCPDYrr
{ 7235, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x12eb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7235 = VMINCPDrm
{ 7236, 3, 1, 0, 14, 0|(1ULL<<MCID::Commutable), 0x12eb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7236 = VMINCPDrr
{ 7237, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x92ea8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7237 = VMINCPSYrm
{ 7238, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x92ea8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7238 = VMINCPSYrr
{ 7239, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x12ea8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7239 = VMINCPSrm
{ 7240, 3, 1, 0, 16, 0|(1ULL<<MCID::Commutable), 0x12ea8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7240 = VMINCPSrr
{ 7241, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112eb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #7241 = VMINCSDrm
{ 7242, 3, 1, 0, 18, 0|(1ULL<<MCID::Commutable), 0x112eb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #7242 = VMINCSDrr
{ 7243, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112ea8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #7243 = VMINCSSrm
{ 7244, 3, 1, 0, 20, 0|(1ULL<<MCID::Commutable), 0x112ea8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #7244 = VMINCSSrr
{ 7245, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x92eb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7245 = VMINPDYrm
{ 7246, 3, 1, 0, 14, 0, 0x92eb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7246 = VMINPDYrr
{ 7247, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001aee0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7247 = VMINPDZ128rm
{ 7248, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101aee0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7248 = VMINPDZ128rmb
{ 7249, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121aee0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #7249 = VMINPDZ128rmbk
{ 7250, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161aee0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #7250 = VMINPDZ128rmbkz
{ 7251, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021aee0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #7251 = VMINPDZ128rmk
{ 7252, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061aee0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #7252 = VMINPDZ128rmkz
{ 7253, 3, 1, 0, 0, 0, 0x2001aee0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7253 = VMINPDZ128rr
{ 7254, 5, 1, 0, 0, 0, 0x2021aee0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #7254 = VMINPDZ128rrk
{ 7255, 4, 1, 0, 0, 0, 0x2061aee0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #7255 = VMINPDZ128rrkz
{ 7256, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009aee0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7256 = VMINPDZ256rm
{ 7257, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109aee0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7257 = VMINPDZ256rmb
{ 7258, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129aee0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #7258 = VMINPDZ256rmbk
{ 7259, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169aee0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #7259 = VMINPDZ256rmbkz
{ 7260, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029aee0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #7260 = VMINPDZ256rmk
{ 7261, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069aee0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #7261 = VMINPDZ256rmkz
{ 7262, 3, 1, 0, 0, 0, 0x4009aee0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #7262 = VMINPDZ256rr
{ 7263, 5, 1, 0, 0, 0, 0x4029aee0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #7263 = VMINPDZ256rrk
{ 7264, 4, 1, 0, 0, 0, 0x4069aee0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #7264 = VMINPDZ256rrkz
{ 7265, 3, 1, 0, 0, 0, 0x1181aee0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7265 = VMINPDZrb
{ 7266, 5, 1, 0, 0, 0, 0x11a1aee0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #7266 = VMINPDZrbk
{ 7267, 4, 1, 0, 0, 0, 0x11e1aee0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #7267 = VMINPDZrbkz
{ 7268, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081aee0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7268 = VMINPDZrm
{ 7269, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181aee0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7269 = VMINPDZrmb
{ 7270, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1aee0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #7270 = VMINPDZrmbk
{ 7271, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1aee0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #7271 = VMINPDZrmbkz
{ 7272, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1aee0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #7272 = VMINPDZrmk
{ 7273, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1aee0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #7273 = VMINPDZrmkz
{ 7274, 3, 1, 0, 0, 0, 0x8081aee0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7274 = VMINPDZrr
{ 7275, 5, 1, 0, 0, 0, 0x80a1aee0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #7275 = VMINPDZrrk
{ 7276, 4, 1, 0, 0, 0, 0x80e1aee0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #7276 = VMINPDZrrkz
{ 7277, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x12eb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7277 = VMINPDrm
{ 7278, 3, 1, 0, 14, 0, 0x12eb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7278 = VMINPDrr
{ 7279, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x92ea8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7279 = VMINPSYrm
{ 7280, 3, 1, 0, 16, 0, 0x92ea8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7280 = VMINPSYrr
{ 7281, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012ee0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7281 = VMINPSZ128rm
{ 7282, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012ee0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7282 = VMINPSZ128rmb
{ 7283, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212ee0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #7283 = VMINPSZ128rmbk
{ 7284, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612ee0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #7284 = VMINPSZ128rmbkz
{ 7285, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212ee0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #7285 = VMINPSZ128rmk
{ 7286, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612ee0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #7286 = VMINPSZ128rmkz
{ 7287, 3, 1, 0, 0, 0, 0x20012ee0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7287 = VMINPSZ128rr
{ 7288, 5, 1, 0, 0, 0, 0x20212ee0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #7288 = VMINPSZ128rrk
{ 7289, 4, 1, 0, 0, 0, 0x20612ee0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #7289 = VMINPSZ128rrkz
{ 7290, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092ee0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7290 = VMINPSZ256rm
{ 7291, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092ee0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7291 = VMINPSZ256rmb
{ 7292, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292ee0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #7292 = VMINPSZ256rmbk
{ 7293, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692ee0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #7293 = VMINPSZ256rmbkz
{ 7294, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292ee0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #7294 = VMINPSZ256rmk
{ 7295, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692ee0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #7295 = VMINPSZ256rmkz
{ 7296, 3, 1, 0, 0, 0, 0x40092ee0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #7296 = VMINPSZ256rr
{ 7297, 5, 1, 0, 0, 0, 0x40292ee0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #7297 = VMINPSZ256rrk
{ 7298, 4, 1, 0, 0, 0, 0x40692ee0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #7298 = VMINPSZ256rrkz
{ 7299, 3, 1, 0, 0, 0, 0x9812ee0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7299 = VMINPSZrb
{ 7300, 5, 1, 0, 0, 0, 0x9a12ee0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #7300 = VMINPSZrbk
{ 7301, 4, 1, 0, 0, 0, 0x9e12ee0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #7301 = VMINPSZrbkz
{ 7302, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812ee0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7302 = VMINPSZrm
{ 7303, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812ee0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7303 = VMINPSZrmb
{ 7304, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12ee0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #7304 = VMINPSZrmbk
{ 7305, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12ee0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #7305 = VMINPSZrmbkz
{ 7306, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12ee0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #7306 = VMINPSZrmk
{ 7307, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12ee0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #7307 = VMINPSZrmkz
{ 7308, 3, 1, 0, 0, 0, 0x80812ee0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7308 = VMINPSZrr
{ 7309, 5, 1, 0, 0, 0, 0x80a12ee0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #7309 = VMINPSZrrk
{ 7310, 4, 1, 0, 0, 0, 0x80e12ee0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #7310 = VMINPSZrrkz
{ 7311, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x12ea8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7311 = VMINPSrm
{ 7312, 3, 1, 0, 16, 0, 0x12ea8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7312 = VMINPSrr
{ 7313, 7, 1, 0, 525, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011aee0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #7313 = VMINSDZrm
{ 7314, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011aee0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7314 = VMINSDZrm_Int
{ 7315, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031aee0006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #7315 = VMINSDZrm_Intk
{ 7316, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071aee0006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #7316 = VMINSDZrm_Intkz
{ 7317, 3, 1, 0, 525, 0|(1ULL<<MCID::Commutable), 0x1011aee0006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr }, // Inst #7317 = VMINSDZrr
{ 7318, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x1011aee0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7318 = VMINSDZrr_Int
{ 7319, 5, 1, 0, 0, 0, 0x1031aee0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7319 = VMINSDZrr_Intk
{ 7320, 4, 1, 0, 0, 0, 0x1071aee0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7320 = VMINSDZrr_Intkz
{ 7321, 3, 1, 0, 0, 0, 0x1111aee0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7321 = VMINSDZrrb
{ 7322, 5, 1, 0, 0, 0, 0x1131aee0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7322 = VMINSDZrrbk
{ 7323, 4, 1, 0, 0, 0, 0x1171aee0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7323 = VMINSDZrrbkz
{ 7324, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112eb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #7324 = VMINSDrm
{ 7325, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112eb0006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7325 = VMINSDrm_Int
{ 7326, 3, 1, 0, 18, 0, 0x112eb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #7326 = VMINSDrr
{ 7327, 3, 1, 0, 18, 0, 0x112eb0006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7327 = VMINSDrr_Int
{ 7328, 7, 1, 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112ee0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #7328 = VMINSSZrm
{ 7329, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112ee0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7329 = VMINSSZrm_Int
{ 7330, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8312ee0005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #7330 = VMINSSZrm_Intk
{ 7331, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8712ee0005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #7331 = VMINSSZrm_Intkz
{ 7332, 3, 1, 0, 526, 0|(1ULL<<MCID::Commutable), 0x8112ee0005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr }, // Inst #7332 = VMINSSZrr
{ 7333, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8112ee0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7333 = VMINSSZrr_Int
{ 7334, 5, 1, 0, 0, 0, 0x8312ee0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7334 = VMINSSZrr_Intk
{ 7335, 4, 1, 0, 0, 0, 0x8712ee0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7335 = VMINSSZrr_Intkz
{ 7336, 3, 1, 0, 0, 0, 0x9112ee0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7336 = VMINSSZrrb
{ 7337, 5, 1, 0, 0, 0, 0x9312ee0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7337 = VMINSSZrrbk
{ 7338, 4, 1, 0, 0, 0, 0x9712ee0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7338 = VMINSSZrrbkz
{ 7339, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112ea8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #7339 = VMINSSrm
{ 7340, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112ea8005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7340 = VMINSSrm_Int
{ 7341, 3, 1, 0, 20, 0, 0x112ea8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #7341 = VMINSSrr
{ 7342, 3, 1, 0, 20, 0, 0x112ea8005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7342 = VMINSSrr_Int
{ 7343, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004022ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #7343 = VMLAUNCH
{ 7344, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403aULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr }, // Inst #7344 = VMLOAD32
{ 7345, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403aULL, ImplicitList10, nullptr, nullptr, -1 ,nullptr }, // Inst #7345 = VMLOAD64
{ 7346, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004039ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #7346 = VMMCALL
{ 7347, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1000b778005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7347 = VMOV64toPQIZrm
{ 7348, 2, 1, 0, 550, 0, 0x2000b778005005ULL, nullptr, nullptr, OperandInfo656, -1 ,nullptr }, // Inst #7348 = VMOV64toPQIZrr
{ 7349, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0xb720005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7349 = VMOV64toPQIrm
{ 7350, 2, 1, 0, 784, 0, 0xb720005005ULL, nullptr, nullptr, OperandInfo240, -1 ,nullptr }, // Inst #7350 = VMOV64toPQIrr
{ 7351, 2, 1, 0, 317, 0|(1ULL<<MCID::Bitcast), 0x2000b778005005ULL, nullptr, nullptr, OperandInfo657, -1 ,nullptr }, // Inst #7351 = VMOV64toSDZrr
{ 7352, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x3f20005806ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #7352 = VMOV64toSDrm
{ 7353, 2, 1, 0, 317, 0|(1ULL<<MCID::Bitcast), 0xb720005005ULL, nullptr, nullptr, OperandInfo123, -1 ,nullptr }, // Inst #7353 = VMOV64toSDrr
{ 7354, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x814b0005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7354 = VMOVAPDYmr
{ 7355, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x81430005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7355 = VMOVAPDYrm
{ 7356, 2, 1, 0, 319, 0, 0x81430005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7356 = VMOVAPDYrr
{ 7357, 2, 1, 0, 319, 0, 0x814b0005003ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7357 = VMOVAPDYrr_REV
{ 7358, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x200094f0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7358 = VMOVAPDZ128mr
{ 7359, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x202094f0005004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #7359 = VMOVAPDZ128mrk
{ 7360, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x20009470005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7360 = VMOVAPDZ128rm
{ 7361, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x20209470005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #7361 = VMOVAPDZ128rmk
{ 7362, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x20609470005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #7362 = VMOVAPDZ128rmkz
{ 7363, 2, 1, 0, 0, 0, 0x20009470005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7363 = VMOVAPDZ128rr
{ 7364, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200094f0005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7364 = VMOVAPDZ128rr_REV
{ 7365, 4, 1, 0, 0, 0, 0x20209470005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #7365 = VMOVAPDZ128rrk
{ 7366, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x202094f0005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7366 = VMOVAPDZ128rrk_REV
{ 7367, 3, 1, 0, 0, 0, 0x20609470005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7367 = VMOVAPDZ128rrkz
{ 7368, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x206094f0005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7368 = VMOVAPDZ128rrkz_REV
{ 7369, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x400894f0005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7369 = VMOVAPDZ256mr
{ 7370, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x402894f0005004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #7370 = VMOVAPDZ256mrk
{ 7371, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x40089470005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7371 = VMOVAPDZ256rm
{ 7372, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x40289470005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #7372 = VMOVAPDZ256rmk
{ 7373, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x40689470005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #7373 = VMOVAPDZ256rmkz
{ 7374, 2, 1, 0, 0, 0, 0x40089470005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7374 = VMOVAPDZ256rr
{ 7375, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x400894f0005003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7375 = VMOVAPDZ256rr_REV
{ 7376, 4, 1, 0, 0, 0, 0x40289470005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #7376 = VMOVAPDZ256rrk
{ 7377, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402894f0005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7377 = VMOVAPDZ256rrk_REV
{ 7378, 3, 1, 0, 0, 0, 0x40689470005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7378 = VMOVAPDZ256rrkz
{ 7379, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x406894f0005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7379 = VMOVAPDZ256rrkz_REV
{ 7380, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x808094f0005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7380 = VMOVAPDZmr
{ 7381, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a094f0005004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #7381 = VMOVAPDZmrk
{ 7382, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x80809470005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7382 = VMOVAPDZrm
{ 7383, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a09470005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #7383 = VMOVAPDZrmk
{ 7384, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e09470005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #7384 = VMOVAPDZrmkz
{ 7385, 2, 1, 0, 0, 0, 0x80809470005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7385 = VMOVAPDZrr
{ 7386, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808094f0005003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7386 = VMOVAPDZrr_REV
{ 7387, 4, 1, 0, 0, 0, 0x80a09470005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #7387 = VMOVAPDZrrk
{ 7388, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a094f0005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7388 = VMOVAPDZrrk_REV
{ 7389, 3, 1, 0, 0, 0, 0x80e09470005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7389 = VMOVAPDZrrkz
{ 7390, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e094f0005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7390 = VMOVAPDZrrkz_REV
{ 7391, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x14b0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7391 = VMOVAPDmr
{ 7392, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1430005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7392 = VMOVAPDrm
{ 7393, 2, 1, 0, 319, 0, 0x1430005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7393 = VMOVAPDrr
{ 7394, 2, 1, 0, 319, 0, 0x14b0005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7394 = VMOVAPDrr_REV
{ 7395, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x814a8004804ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7395 = VMOVAPSYmr
{ 7396, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x81428004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7396 = VMOVAPSYrm
{ 7397, 2, 1, 0, 319, 0, 0x81428004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7397 = VMOVAPSYrr
{ 7398, 2, 1, 0, 319, 0, 0x814a8004803ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7398 = VMOVAPSYrr_REV
{ 7399, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x200014e8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7399 = VMOVAPSZ128mr
{ 7400, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x202014e8004804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #7400 = VMOVAPSZ128mrk
{ 7401, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x20001468004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7401 = VMOVAPSZ128rm
{ 7402, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x20201468004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #7402 = VMOVAPSZ128rmk
{ 7403, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x20601468004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #7403 = VMOVAPSZ128rmkz
{ 7404, 2, 1, 0, 0, 0, 0x20001468004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7404 = VMOVAPSZ128rr
{ 7405, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200014e8004803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7405 = VMOVAPSZ128rr_REV
{ 7406, 4, 1, 0, 0, 0, 0x20201468004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #7406 = VMOVAPSZ128rrk
{ 7407, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x202014e8004803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7407 = VMOVAPSZ128rrk_REV
{ 7408, 3, 1, 0, 0, 0, 0x20601468004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7408 = VMOVAPSZ128rrkz
{ 7409, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x206014e8004803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7409 = VMOVAPSZ128rrkz_REV
{ 7410, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x400814e8004804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7410 = VMOVAPSZ256mr
{ 7411, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x402814e8004804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #7411 = VMOVAPSZ256mrk
{ 7412, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x40081468004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7412 = VMOVAPSZ256rm
{ 7413, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x40281468004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #7413 = VMOVAPSZ256rmk
{ 7414, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x40681468004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #7414 = VMOVAPSZ256rmkz
{ 7415, 2, 1, 0, 0, 0, 0x40081468004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7415 = VMOVAPSZ256rr
{ 7416, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x400814e8004803ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7416 = VMOVAPSZ256rr_REV
{ 7417, 4, 1, 0, 0, 0, 0x40281468004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #7417 = VMOVAPSZ256rrk
{ 7418, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402814e8004803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7418 = VMOVAPSZ256rrk_REV
{ 7419, 3, 1, 0, 0, 0, 0x40681468004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7419 = VMOVAPSZ256rrkz
{ 7420, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x406814e8004803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7420 = VMOVAPSZ256rrkz_REV
{ 7421, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x808014e8004804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7421 = VMOVAPSZmr
{ 7422, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a014e8004804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #7422 = VMOVAPSZmrk
{ 7423, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x80801468004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7423 = VMOVAPSZrm
{ 7424, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a01468004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #7424 = VMOVAPSZrmk
{ 7425, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e01468004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #7425 = VMOVAPSZrmkz
{ 7426, 2, 1, 0, 0, 0, 0x80801468004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7426 = VMOVAPSZrr
{ 7427, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808014e8004803ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7427 = VMOVAPSZrr_REV
{ 7428, 4, 1, 0, 0, 0, 0x80a01468004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #7428 = VMOVAPSZrrk
{ 7429, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a014e8004803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7429 = VMOVAPSZrrk_REV
{ 7430, 3, 1, 0, 0, 0, 0x80e01468004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7430 = VMOVAPSZrrkz
{ 7431, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e014e8004803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7431 = VMOVAPSZrrkz_REV
{ 7432, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x14a8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7432 = VMOVAPSmr
{ 7433, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x1428004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7433 = VMOVAPSrm
{ 7434, 2, 1, 0, 319, 0, 0x1428004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7434 = VMOVAPSrr
{ 7435, 2, 1, 0, 319, 0, 0x14a8004803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7435 = VMOVAPSrr_REV
{ 7436, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80930006006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7436 = VMOVDDUPYrm
{ 7437, 2, 1, 0, 531, 0, 0x80930006005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7437 = VMOVDDUPYrr
{ 7438, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10008960006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7438 = VMOVDDUPZ128rm
{ 7439, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10208960006006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #7439 = VMOVDDUPZ128rmk
{ 7440, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10608960006006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #7440 = VMOVDDUPZ128rmkz
{ 7441, 2, 1, 0, 0, 0, 0x20008960006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7441 = VMOVDDUPZ128rr
{ 7442, 4, 1, 0, 0, 0, 0x20208960006005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #7442 = VMOVDDUPZ128rrk
{ 7443, 3, 1, 0, 0, 0, 0x20608960006005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7443 = VMOVDDUPZ128rrkz
{ 7444, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40088978006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7444 = VMOVDDUPZ256rm
{ 7445, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40288978006006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #7445 = VMOVDDUPZ256rmk
{ 7446, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40688978006006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #7446 = VMOVDDUPZ256rmkz
{ 7447, 2, 1, 0, 0, 0, 0x40088978006005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7447 = VMOVDDUPZ256rr
{ 7448, 4, 1, 0, 0, 0, 0x40288978006005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #7448 = VMOVDDUPZ256rrk
{ 7449, 3, 1, 0, 0, 0, 0x40688978006005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7449 = VMOVDDUPZ256rrkz
{ 7450, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80808978006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7450 = VMOVDDUPZrm
{ 7451, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a08978006006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #7451 = VMOVDDUPZrmk
{ 7452, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e08978006006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #7452 = VMOVDDUPZrmkz
{ 7453, 2, 1, 0, 0, 0, 0x80808978006005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7453 = VMOVDDUPZrr
{ 7454, 4, 1, 0, 0, 0, 0x80a08978006005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #7454 = VMOVDDUPZrrk
{ 7455, 3, 1, 0, 0, 0, 0x80e08978006005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7455 = VMOVDDUPZrrkz
{ 7456, 6, 1, 0, 322, 0|(1ULL<<MCID::MayLoad), 0x930006006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7456 = VMOVDDUPrm
{ 7457, 2, 1, 0, 323, 0, 0x930006005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7457 = VMOVDDUPrr
{ 7458, 6, 1, 0, 550, 0|(1ULL<<MCID::MayLoad), 0x8003778005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7458 = VMOVDI2PDIZrm
{ 7459, 2, 1, 0, 550, 0, 0x20003778005005ULL, nullptr, nullptr, OperandInfo659, -1 ,nullptr }, // Inst #7459 = VMOVDI2PDIZrr
{ 7460, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3720005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7460 = VMOVDI2PDIrm
{ 7461, 2, 1, 0, 782, 0, 0x3720005005ULL, nullptr, nullptr, OperandInfo245, -1 ,nullptr }, // Inst #7461 = VMOVDI2PDIrr
{ 7462, 6, 1, 0, 550, 0|(1ULL<<MCID::MayLoad), 0x8003778005006ULL, nullptr, nullptr, OperandInfo418, -1 ,nullptr }, // Inst #7462 = VMOVDI2SSZrm
{ 7463, 2, 1, 0, 550, 0|(1ULL<<MCID::Bitcast), 0x20003778005005ULL, nullptr, nullptr, OperandInfo660, -1 ,nullptr }, // Inst #7463 = VMOVDI2SSZrr
{ 7464, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3720005006ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #7464 = VMOVDI2SSrm
{ 7465, 2, 1, 0, 317, 0|(1ULL<<MCID::Bitcast), 0x3720005005ULL, nullptr, nullptr, OperandInfo126, -1 ,nullptr }, // Inst #7465 = VMOVDI2SSrr
{ 7466, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20003ff8005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7466 = VMOVDQA32Z128mr
{ 7467, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20203ff8005004ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #7467 = VMOVDQA32Z128mrk
{ 7468, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x200037f8005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7468 = VMOVDQA32Z128rm
{ 7469, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x202037f8005006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #7469 = VMOVDQA32Z128rmk
{ 7470, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x206037f8005006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #7470 = VMOVDQA32Z128rmkz
{ 7471, 2, 1, 0, 0, 0, 0x200037f8005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7471 = VMOVDQA32Z128rr
{ 7472, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003ff8005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7472 = VMOVDQA32Z128rr_REV
{ 7473, 4, 1, 0, 0, 0, 0x202037f8005005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #7473 = VMOVDQA32Z128rrk
{ 7474, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203ff8005003ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7474 = VMOVDQA32Z128rrk_REV
{ 7475, 3, 1, 0, 0, 0, 0x206037f8005005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7475 = VMOVDQA32Z128rrkz
{ 7476, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603ff8005003ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7476 = VMOVDQA32Z128rrkz_REV
{ 7477, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40083ff8005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7477 = VMOVDQA32Z256mr
{ 7478, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40283ff8005004ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #7478 = VMOVDQA32Z256mrk
{ 7479, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400837f8005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7479 = VMOVDQA32Z256rm
{ 7480, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x402837f8005006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #7480 = VMOVDQA32Z256rmk
{ 7481, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x406837f8005006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #7481 = VMOVDQA32Z256rmkz
{ 7482, 2, 1, 0, 0, 0, 0x400837f8005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7482 = VMOVDQA32Z256rr
{ 7483, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083ff8005003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7483 = VMOVDQA32Z256rr_REV
{ 7484, 4, 1, 0, 0, 0, 0x402837f8005005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #7484 = VMOVDQA32Z256rrk
{ 7485, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283ff8005003ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7485 = VMOVDQA32Z256rrk_REV
{ 7486, 3, 1, 0, 0, 0, 0x406837f8005005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7486 = VMOVDQA32Z256rrkz
{ 7487, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683ff8005003ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7487 = VMOVDQA32Z256rrkz_REV
{ 7488, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80803ff8005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7488 = VMOVDQA32Zmr
{ 7489, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a03ff8005004ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #7489 = VMOVDQA32Zmrk
{ 7490, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808037f8005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7490 = VMOVDQA32Zrm
{ 7491, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a037f8005006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #7491 = VMOVDQA32Zrmk
{ 7492, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e037f8005006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #7492 = VMOVDQA32Zrmkz
{ 7493, 2, 1, 0, 0, 0, 0x808037f8005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7493 = VMOVDQA32Zrr
{ 7494, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803ff8005003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7494 = VMOVDQA32Zrr_REV
{ 7495, 4, 1, 0, 0, 0, 0x80a037f8005005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #7495 = VMOVDQA32Zrrk
{ 7496, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03ff8005003ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7496 = VMOVDQA32Zrrk_REV
{ 7497, 3, 1, 0, 0, 0, 0x80e037f8005005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7497 = VMOVDQA32Zrrkz
{ 7498, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03ff8005003ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7498 = VMOVDQA32Zrrkz_REV
{ 7499, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x2000bff8005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7499 = VMOVDQA64Z128mr
{ 7500, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x2020bff8005004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #7500 = VMOVDQA64Z128mrk
{ 7501, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x2000b7f8005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7501 = VMOVDQA64Z128rm
{ 7502, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x2020b7f8005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #7502 = VMOVDQA64Z128rmk
{ 7503, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x2060b7f8005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #7503 = VMOVDQA64Z128rmkz
{ 7504, 2, 1, 0, 0, 0, 0x2000b7f8005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7504 = VMOVDQA64Z128rr
{ 7505, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2000bff8005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7505 = VMOVDQA64Z128rr_REV
{ 7506, 4, 1, 0, 0, 0, 0x2020b7f8005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #7506 = VMOVDQA64Z128rrk
{ 7507, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2020bff8005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7507 = VMOVDQA64Z128rrk_REV
{ 7508, 3, 1, 0, 0, 0, 0x2060b7f8005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7508 = VMOVDQA64Z128rrkz
{ 7509, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2060bff8005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7509 = VMOVDQA64Z128rrkz_REV
{ 7510, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4008bff8005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7510 = VMOVDQA64Z256mr
{ 7511, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4028bff8005004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #7511 = VMOVDQA64Z256mrk
{ 7512, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4008b7f8005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7512 = VMOVDQA64Z256rm
{ 7513, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x4028b7f8005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #7513 = VMOVDQA64Z256rmk
{ 7514, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x4068b7f8005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #7514 = VMOVDQA64Z256rmkz
{ 7515, 2, 1, 0, 0, 0, 0x4008b7f8005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7515 = VMOVDQA64Z256rr
{ 7516, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4008bff8005003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7516 = VMOVDQA64Z256rr_REV
{ 7517, 4, 1, 0, 0, 0, 0x4028b7f8005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #7517 = VMOVDQA64Z256rrk
{ 7518, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4028bff8005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7518 = VMOVDQA64Z256rrk_REV
{ 7519, 3, 1, 0, 0, 0, 0x4068b7f8005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7519 = VMOVDQA64Z256rrkz
{ 7520, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4068bff8005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7520 = VMOVDQA64Z256rrkz_REV
{ 7521, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8080bff8005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7521 = VMOVDQA64Zmr
{ 7522, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a0bff8005004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #7522 = VMOVDQA64Zmrk
{ 7523, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x8080b7f8005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7523 = VMOVDQA64Zrm
{ 7524, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a0b7f8005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #7524 = VMOVDQA64Zrmk
{ 7525, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e0b7f8005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #7525 = VMOVDQA64Zrmkz
{ 7526, 2, 1, 0, 0, 0, 0x8080b7f8005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7526 = VMOVDQA64Zrr
{ 7527, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080bff8005003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7527 = VMOVDQA64Zrr_REV
{ 7528, 4, 1, 0, 0, 0, 0x80a0b7f8005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #7528 = VMOVDQA64Zrrk
{ 7529, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a0bff8005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7529 = VMOVDQA64Zrrk_REV
{ 7530, 3, 1, 0, 0, 0, 0x80e0b7f8005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7530 = VMOVDQA64Zrrkz
{ 7531, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e0bff8005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7531 = VMOVDQA64Zrrkz_REV
{ 7532, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x83fb8005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7532 = VMOVDQAYmr
{ 7533, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x837b8005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7533 = VMOVDQAYrm
{ 7534, 2, 1, 0, 786, 0, 0x837b8005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7534 = VMOVDQAYrr
{ 7535, 2, 1, 0, 786, 0, 0x83fb8005003ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7535 = VMOVDQAYrr_REV
{ 7536, 6, 0, 0, 318, 0|(1ULL<<MCID::MayStore), 0x3fb8005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7536 = VMOVDQAmr
{ 7537, 6, 1, 0, 161, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x37b8005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7537 = VMOVDQArm
{ 7538, 2, 1, 0, 786, 0, 0x37b8005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7538 = VMOVDQArr
{ 7539, 2, 1, 0, 786, 0, 0x3fb8005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7539 = VMOVDQArr_REV
{ 7540, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x2000bff8006004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7540 = VMOVDQU16Z128mr
{ 7541, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x2020bff8006004ULL, nullptr, nullptr, OperandInfo661, -1 ,nullptr }, // Inst #7541 = VMOVDQU16Z128mrk
{ 7542, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x2000b7f8006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7542 = VMOVDQU16Z128rm
{ 7543, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x2020b7f8006006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr }, // Inst #7543 = VMOVDQU16Z128rmk
{ 7544, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x2060b7f8006006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr }, // Inst #7544 = VMOVDQU16Z128rmkz
{ 7545, 2, 1, 0, 0, 0, 0x2000b7f8006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7545 = VMOVDQU16Z128rr
{ 7546, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2000bff8006003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7546 = VMOVDQU16Z128rr_REV
{ 7547, 4, 1, 0, 0, 0, 0x2020b7f8006005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #7547 = VMOVDQU16Z128rrk
{ 7548, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2020bff8006003ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #7548 = VMOVDQU16Z128rrk_REV
{ 7549, 3, 1, 0, 0, 0, 0x2060b7f8006005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #7549 = VMOVDQU16Z128rrkz
{ 7550, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2060bff8006003ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #7550 = VMOVDQU16Z128rrkz_REV
{ 7551, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4008bff8006004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7551 = VMOVDQU16Z256mr
{ 7552, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4028bff8006004ULL, nullptr, nullptr, OperandInfo666, -1 ,nullptr }, // Inst #7552 = VMOVDQU16Z256mrk
{ 7553, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4008b7f8006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7553 = VMOVDQU16Z256rm
{ 7554, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x4028b7f8006006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr }, // Inst #7554 = VMOVDQU16Z256rmk
{ 7555, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x4068b7f8006006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr }, // Inst #7555 = VMOVDQU16Z256rmkz
{ 7556, 2, 1, 0, 0, 0, 0x4008b7f8006005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7556 = VMOVDQU16Z256rr
{ 7557, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4008bff8006003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7557 = VMOVDQU16Z256rr_REV
{ 7558, 4, 1, 0, 0, 0, 0x4028b7f8006005ULL, nullptr, nullptr, OperandInfo669, -1 ,nullptr }, // Inst #7558 = VMOVDQU16Z256rrk
{ 7559, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4028bff8006003ULL, nullptr, nullptr, OperandInfo670, -1 ,nullptr }, // Inst #7559 = VMOVDQU16Z256rrk_REV
{ 7560, 3, 1, 0, 0, 0, 0x4068b7f8006005ULL, nullptr, nullptr, OperandInfo670, -1 ,nullptr }, // Inst #7560 = VMOVDQU16Z256rrkz
{ 7561, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4068bff8006003ULL, nullptr, nullptr, OperandInfo670, -1 ,nullptr }, // Inst #7561 = VMOVDQU16Z256rrkz_REV
{ 7562, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8080bff8006004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7562 = VMOVDQU16Zmr
{ 7563, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a0bff8006004ULL, nullptr, nullptr, OperandInfo671, -1 ,nullptr }, // Inst #7563 = VMOVDQU16Zmrk
{ 7564, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x8080b7f8006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7564 = VMOVDQU16Zrm
{ 7565, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a0b7f8006006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr }, // Inst #7565 = VMOVDQU16Zrmk
{ 7566, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e0b7f8006006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr }, // Inst #7566 = VMOVDQU16Zrmkz
{ 7567, 2, 1, 0, 0, 0, 0x8080b7f8006005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7567 = VMOVDQU16Zrr
{ 7568, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080bff8006003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7568 = VMOVDQU16Zrr_REV
{ 7569, 4, 1, 0, 0, 0, 0x80a0b7f8006005ULL, nullptr, nullptr, OperandInfo674, -1 ,nullptr }, // Inst #7569 = VMOVDQU16Zrrk
{ 7570, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a0bff8006003ULL, nullptr, nullptr, OperandInfo675, -1 ,nullptr }, // Inst #7570 = VMOVDQU16Zrrk_REV
{ 7571, 3, 1, 0, 0, 0, 0x80e0b7f8006005ULL, nullptr, nullptr, OperandInfo675, -1 ,nullptr }, // Inst #7571 = VMOVDQU16Zrrkz
{ 7572, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e0bff8006003ULL, nullptr, nullptr, OperandInfo675, -1 ,nullptr }, // Inst #7572 = VMOVDQU16Zrrkz_REV
{ 7573, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20003ff8005804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7573 = VMOVDQU32Z128mr
{ 7574, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20203ff8005804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #7574 = VMOVDQU32Z128mrk
{ 7575, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x200037f8005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7575 = VMOVDQU32Z128rm
{ 7576, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x202037f8005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #7576 = VMOVDQU32Z128rmk
{ 7577, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x206037f8005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #7577 = VMOVDQU32Z128rmkz
{ 7578, 2, 1, 0, 0, 0, 0x200037f8005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7578 = VMOVDQU32Z128rr
{ 7579, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003ff8005803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7579 = VMOVDQU32Z128rr_REV
{ 7580, 4, 1, 0, 0, 0, 0x202037f8005805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #7580 = VMOVDQU32Z128rrk
{ 7581, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203ff8005803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7581 = VMOVDQU32Z128rrk_REV
{ 7582, 3, 1, 0, 0, 0, 0x206037f8005805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7582 = VMOVDQU32Z128rrkz
{ 7583, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603ff8005803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7583 = VMOVDQU32Z128rrkz_REV
{ 7584, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40083ff8005804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7584 = VMOVDQU32Z256mr
{ 7585, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40283ff8005804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #7585 = VMOVDQU32Z256mrk
{ 7586, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400837f8005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7586 = VMOVDQU32Z256rm
{ 7587, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x402837f8005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #7587 = VMOVDQU32Z256rmk
{ 7588, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x406837f8005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #7588 = VMOVDQU32Z256rmkz
{ 7589, 2, 1, 0, 0, 0, 0x400837f8005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7589 = VMOVDQU32Z256rr
{ 7590, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083ff8005803ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7590 = VMOVDQU32Z256rr_REV
{ 7591, 4, 1, 0, 0, 0, 0x402837f8005805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #7591 = VMOVDQU32Z256rrk
{ 7592, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283ff8005803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7592 = VMOVDQU32Z256rrk_REV
{ 7593, 3, 1, 0, 0, 0, 0x406837f8005805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7593 = VMOVDQU32Z256rrkz
{ 7594, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683ff8005803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7594 = VMOVDQU32Z256rrkz_REV
{ 7595, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80803ff8005804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7595 = VMOVDQU32Zmr
{ 7596, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a03ff8005804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #7596 = VMOVDQU32Zmrk
{ 7597, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808037f8005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7597 = VMOVDQU32Zrm
{ 7598, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a037f8005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #7598 = VMOVDQU32Zrmk
{ 7599, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e037f8005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #7599 = VMOVDQU32Zrmkz
{ 7600, 2, 1, 0, 0, 0, 0x808037f8005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7600 = VMOVDQU32Zrr
{ 7601, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803ff8005803ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7601 = VMOVDQU32Zrr_REV
{ 7602, 4, 1, 0, 0, 0, 0x80a037f8005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #7602 = VMOVDQU32Zrrk
{ 7603, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03ff8005803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7603 = VMOVDQU32Zrrk_REV
{ 7604, 3, 1, 0, 0, 0, 0x80e037f8005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7604 = VMOVDQU32Zrrkz
{ 7605, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03ff8005803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7605 = VMOVDQU32Zrrkz_REV
{ 7606, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x2000bff8005804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7606 = VMOVDQU64Z128mr
{ 7607, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x2020bff8005804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #7607 = VMOVDQU64Z128mrk
{ 7608, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x2000b7f8005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7608 = VMOVDQU64Z128rm
{ 7609, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x2020b7f8005806ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #7609 = VMOVDQU64Z128rmk
{ 7610, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x2060b7f8005806ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #7610 = VMOVDQU64Z128rmkz
{ 7611, 2, 1, 0, 0, 0, 0x2000b7f8005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7611 = VMOVDQU64Z128rr
{ 7612, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2000bff8005803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7612 = VMOVDQU64Z128rr_REV
{ 7613, 4, 1, 0, 0, 0, 0x2020b7f8005805ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #7613 = VMOVDQU64Z128rrk
{ 7614, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2020bff8005803ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7614 = VMOVDQU64Z128rrk_REV
{ 7615, 3, 1, 0, 0, 0, 0x2060b7f8005805ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7615 = VMOVDQU64Z128rrkz
{ 7616, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2060bff8005803ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7616 = VMOVDQU64Z128rrkz_REV
{ 7617, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4008bff8005804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7617 = VMOVDQU64Z256mr
{ 7618, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4028bff8005804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #7618 = VMOVDQU64Z256mrk
{ 7619, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x4008b7f8005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7619 = VMOVDQU64Z256rm
{ 7620, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x4028b7f8005806ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #7620 = VMOVDQU64Z256rmk
{ 7621, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x4068b7f8005806ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #7621 = VMOVDQU64Z256rmkz
{ 7622, 2, 1, 0, 0, 0, 0x4008b7f8005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7622 = VMOVDQU64Z256rr
{ 7623, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4008bff8005803ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7623 = VMOVDQU64Z256rr_REV
{ 7624, 4, 1, 0, 0, 0, 0x4028b7f8005805ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #7624 = VMOVDQU64Z256rrk
{ 7625, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4028bff8005803ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7625 = VMOVDQU64Z256rrk_REV
{ 7626, 3, 1, 0, 0, 0, 0x4068b7f8005805ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7626 = VMOVDQU64Z256rrkz
{ 7627, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4068bff8005803ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7627 = VMOVDQU64Z256rrkz_REV
{ 7628, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8080bff8005804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7628 = VMOVDQU64Zmr
{ 7629, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a0bff8005804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #7629 = VMOVDQU64Zmrk
{ 7630, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x8080b7f8005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7630 = VMOVDQU64Zrm
{ 7631, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a0b7f8005806ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #7631 = VMOVDQU64Zrmk
{ 7632, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e0b7f8005806ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #7632 = VMOVDQU64Zrmkz
{ 7633, 2, 1, 0, 0, 0, 0x8080b7f8005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7633 = VMOVDQU64Zrr
{ 7634, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8080bff8005803ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7634 = VMOVDQU64Zrr_REV
{ 7635, 4, 1, 0, 0, 0, 0x80a0b7f8005805ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #7635 = VMOVDQU64Zrrk
{ 7636, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a0bff8005803ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7636 = VMOVDQU64Zrrk_REV
{ 7637, 3, 1, 0, 0, 0, 0x80e0b7f8005805ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7637 = VMOVDQU64Zrrkz
{ 7638, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e0bff8005803ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7638 = VMOVDQU64Zrrkz_REV
{ 7639, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20003ff8006004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7639 = VMOVDQU8Z128mr
{ 7640, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20203ff8006004ULL, nullptr, nullptr, OperandInfo676, -1 ,nullptr }, // Inst #7640 = VMOVDQU8Z128mrk
{ 7641, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x200037f8006006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7641 = VMOVDQU8Z128rm
{ 7642, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x202037f8006006ULL, nullptr, nullptr, OperandInfo677, -1 ,nullptr }, // Inst #7642 = VMOVDQU8Z128rmk
{ 7643, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x206037f8006006ULL, nullptr, nullptr, OperandInfo678, -1 ,nullptr }, // Inst #7643 = VMOVDQU8Z128rmkz
{ 7644, 2, 1, 0, 0, 0, 0x200037f8006005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7644 = VMOVDQU8Z128rr
{ 7645, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003ff8006003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7645 = VMOVDQU8Z128rr_REV
{ 7646, 4, 1, 0, 0, 0, 0x202037f8006005ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #7646 = VMOVDQU8Z128rrk
{ 7647, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203ff8006003ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #7647 = VMOVDQU8Z128rrk_REV
{ 7648, 3, 1, 0, 0, 0, 0x206037f8006005ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #7648 = VMOVDQU8Z128rrkz
{ 7649, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603ff8006003ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #7649 = VMOVDQU8Z128rrkz_REV
{ 7650, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40083ff8006004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7650 = VMOVDQU8Z256mr
{ 7651, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40283ff8006004ULL, nullptr, nullptr, OperandInfo681, -1 ,nullptr }, // Inst #7651 = VMOVDQU8Z256mrk
{ 7652, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x400837f8006006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7652 = VMOVDQU8Z256rm
{ 7653, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x402837f8006006ULL, nullptr, nullptr, OperandInfo682, -1 ,nullptr }, // Inst #7653 = VMOVDQU8Z256rmk
{ 7654, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x406837f8006006ULL, nullptr, nullptr, OperandInfo683, -1 ,nullptr }, // Inst #7654 = VMOVDQU8Z256rmkz
{ 7655, 2, 1, 0, 0, 0, 0x400837f8006005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7655 = VMOVDQU8Z256rr
{ 7656, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083ff8006003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7656 = VMOVDQU8Z256rr_REV
{ 7657, 4, 1, 0, 0, 0, 0x402837f8006005ULL, nullptr, nullptr, OperandInfo684, -1 ,nullptr }, // Inst #7657 = VMOVDQU8Z256rrk
{ 7658, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283ff8006003ULL, nullptr, nullptr, OperandInfo685, -1 ,nullptr }, // Inst #7658 = VMOVDQU8Z256rrk_REV
{ 7659, 3, 1, 0, 0, 0, 0x406837f8006005ULL, nullptr, nullptr, OperandInfo685, -1 ,nullptr }, // Inst #7659 = VMOVDQU8Z256rrkz
{ 7660, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683ff8006003ULL, nullptr, nullptr, OperandInfo685, -1 ,nullptr }, // Inst #7660 = VMOVDQU8Z256rrkz_REV
{ 7661, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80803ff8006004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7661 = VMOVDQU8Zmr
{ 7662, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a03ff8006004ULL, nullptr, nullptr, OperandInfo686, -1 ,nullptr }, // Inst #7662 = VMOVDQU8Zmrk
{ 7663, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x808037f8006006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7663 = VMOVDQU8Zrm
{ 7664, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a037f8006006ULL, nullptr, nullptr, OperandInfo687, -1 ,nullptr }, // Inst #7664 = VMOVDQU8Zrmk
{ 7665, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e037f8006006ULL, nullptr, nullptr, OperandInfo688, -1 ,nullptr }, // Inst #7665 = VMOVDQU8Zrmkz
{ 7666, 2, 1, 0, 0, 0, 0x808037f8006005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7666 = VMOVDQU8Zrr
{ 7667, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803ff8006003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7667 = VMOVDQU8Zrr_REV
{ 7668, 4, 1, 0, 0, 0, 0x80a037f8006005ULL, nullptr, nullptr, OperandInfo689, -1 ,nullptr }, // Inst #7668 = VMOVDQU8Zrrk
{ 7669, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03ff8006003ULL, nullptr, nullptr, OperandInfo690, -1 ,nullptr }, // Inst #7669 = VMOVDQU8Zrrk_REV
{ 7670, 3, 1, 0, 0, 0, 0x80e037f8006005ULL, nullptr, nullptr, OperandInfo690, -1 ,nullptr }, // Inst #7670 = VMOVDQU8Zrrkz
{ 7671, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03ff8006003ULL, nullptr, nullptr, OperandInfo690, -1 ,nullptr }, // Inst #7671 = VMOVDQU8Zrrkz_REV
{ 7672, 6, 0, 0, 325, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x83fb8005804ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7672 = VMOVDQUYmr
{ 7673, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x837b8005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7673 = VMOVDQUYrm
{ 7674, 2, 1, 0, 787, 0, 0x837b8005805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7674 = VMOVDQUYrr
{ 7675, 2, 1, 0, 787, 0, 0x83fb8005803ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7675 = VMOVDQUYrr_REV
{ 7676, 6, 0, 0, 325, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x3fb8005804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7676 = VMOVDQUmr
{ 7677, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x37b8005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7677 = VMOVDQUrm
{ 7678, 2, 1, 0, 787, 0, 0x37b8005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7678 = VMOVDQUrr
{ 7679, 2, 1, 0, 787, 0, 0x3fb8005803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7679 = VMOVDQUrr_REV
{ 7680, 3, 1, 0, 551, 0, 0x20010968004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7680 = VMOVHLPSZrr
{ 7681, 3, 1, 0, 323, 0, 0x10928004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7681 = VMOVHLPSrr
{ 7682, 6, 0, 0, 551, 0|(1ULL<<MCID::MayStore), 0x10008bf0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7682 = VMOVHPDZ128mr
{ 7683, 7, 1, 0, 551, 0|(1ULL<<MCID::MayLoad), 0x10018b60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7683 = VMOVHPDZ128rm
{ 7684, 6, 0, 0, 328, 0|(1ULL<<MCID::MayStore), 0xbb0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7684 = VMOVHPDmr
{ 7685, 7, 1, 0, 329, 0|(1ULL<<MCID::MayLoad), 0x10b30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7685 = VMOVHPDrm
{ 7686, 6, 0, 0, 551, 0|(1ULL<<MCID::MayStore), 0x10000be8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7686 = VMOVHPSZ128mr
{ 7687, 7, 1, 0, 551, 0|(1ULL<<MCID::MayLoad), 0x10010b60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7687 = VMOVHPSZ128rm
{ 7688, 6, 0, 0, 328, 0|(1ULL<<MCID::MayStore), 0xba8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7688 = VMOVHPSmr
{ 7689, 7, 1, 0, 329, 0|(1ULL<<MCID::MayLoad), 0x10b28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7689 = VMOVHPSrm
{ 7690, 3, 1, 0, 551, 0, 0x20010b68004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7690 = VMOVLHPSZrr
{ 7691, 3, 1, 0, 323, 0, 0x10b28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7691 = VMOVLHPSrr
{ 7692, 6, 0, 0, 551, 0|(1ULL<<MCID::MayStore), 0x100089f0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7692 = VMOVLPDZ128mr
{ 7693, 7, 1, 0, 551, 0|(1ULL<<MCID::MayLoad), 0x10018960005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7693 = VMOVLPDZ128rm
{ 7694, 6, 0, 0, 328, 0|(1ULL<<MCID::MayStore), 0x9b0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7694 = VMOVLPDmr
{ 7695, 7, 1, 0, 329, 0|(1ULL<<MCID::MayLoad), 0x10930005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7695 = VMOVLPDrm
{ 7696, 6, 0, 0, 551, 0|(1ULL<<MCID::MayStore), 0x100009e8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7696 = VMOVLPSZ128mr
{ 7697, 7, 1, 0, 551, 0|(1ULL<<MCID::MayLoad), 0x10010960004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7697 = VMOVLPSZ128rm
{ 7698, 6, 0, 0, 328, 0|(1ULL<<MCID::MayStore), 0x9a8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7698 = VMOVLPSmr
{ 7699, 7, 1, 0, 329, 0|(1ULL<<MCID::MayLoad), 0x10928004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7699 = VMOVLPSrm
{ 7700, 2, 1, 0, 840, 0, 0x82830005005ULL, nullptr, nullptr, OperandInfo691, -1 ,nullptr }, // Inst #7700 = VMOVMSKPDYrr
{ 7701, 2, 1, 0, 839, 0, 0x2830005005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #7701 = VMOVMSKPDrr
{ 7702, 2, 1, 0, 840, 0, 0x82828004805ULL, nullptr, nullptr, OperandInfo691, -1 ,nullptr }, // Inst #7702 = VMOVMSKPSYrr
{ 7703, 2, 1, 0, 839, 0, 0x2828004805ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #7703 = VMOVMSKPSrr
{ 7704, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x81538009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7704 = VMOVNTDQAYrm
{ 7705, 6, 1, 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20001578009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7705 = VMOVNTDQAZ128rm
{ 7706, 6, 1, 0, 206, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40081578009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7706 = VMOVNTDQAZ256rm
{ 7707, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80801578009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7707 = VMOVNTDQAZrm
{ 7708, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x1538009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7708 = VMOVNTDQArm
{ 7709, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x873b8005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7709 = VMOVNTDQYmr
{ 7710, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x200073f8005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7710 = VMOVNTDQZ128mr
{ 7711, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x400873f8005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7711 = VMOVNTDQZ256mr
{ 7712, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x808073f8005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7712 = VMOVNTDQZmr
{ 7713, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x73b8005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7713 = VMOVNTDQmr
{ 7714, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x815b0005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7714 = VMOVNTPDYmr
{ 7715, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x200095f0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7715 = VMOVNTPDZ128mr
{ 7716, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x400895f0005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7716 = VMOVNTPDZ256mr
{ 7717, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x808095f0005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7717 = VMOVNTPDZmr
{ 7718, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x15b0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7718 = VMOVNTPDmr
{ 7719, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x815a8004804ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7719 = VMOVNTPSYmr
{ 7720, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x200015e8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7720 = VMOVNTPSZ128mr
{ 7721, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x400815e8004804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7721 = VMOVNTPSZ256mr
{ 7722, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x808015e8004804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7722 = VMOVNTPSZmr
{ 7723, 6, 0, 0, 331, 0|(1ULL<<MCID::MayStore), 0x15a8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7723 = VMOVNTPSmr
{ 7724, 6, 0, 0, 550, 0|(1ULL<<MCID::MayStore), 0x8003f78005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7724 = VMOVPDI2DIZmr
{ 7725, 2, 1, 0, 552, 0, 0x20003f78005003ULL, nullptr, nullptr, OperandInfo486, -1 ,nullptr }, // Inst #7725 = VMOVPDI2DIZrr
{ 7726, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x3f20005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7726 = VMOVPDI2DImr
{ 7727, 2, 1, 0, 780, 0, 0x3f20005003ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #7727 = VMOVPDI2DIrr
{ 7728, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x1000eb60005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7728 = VMOVPQI2QIZmr
{ 7729, 2, 1, 0, 0, 0, 0x2000eb78005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7729 = VMOVPQI2QIZrr
{ 7730, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x6b38005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7730 = VMOVPQI2QImr
{ 7731, 2, 1, 0, 334, 0, 0x6b20005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7731 = VMOVPQI2QIrr
{ 7732, 6, 0, 0, 552, 0|(1ULL<<MCID::MayStore), 0x2000bf60005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7732 = VMOVPQIto64Zmr
{ 7733, 2, 1, 0, 552, 0, 0x2000bf60005003ULL, nullptr, nullptr, OperandInfo484, -1 ,nullptr }, // Inst #7733 = VMOVPQIto64Zrr
{ 7734, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0xbf20005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7734 = VMOVPQIto64rm
{ 7735, 2, 1, 0, 783, 0, 0xbf20005003ULL, nullptr, nullptr, OperandInfo120, -1 ,nullptr }, // Inst #7735 = VMOVPQIto64rr
{ 7736, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1000bf60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7736 = VMOVQI2PQIZrm
{ 7737, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x3f38005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7737 = VMOVQI2PQIrm
{ 7738, 6, 0, 0, 553, 0|(1ULL<<MCID::MayStore), 0x101088f0006004ULL, nullptr, nullptr, OperandInfo692, -1 ,nullptr }, // Inst #7738 = VMOVSDZmr
{ 7739, 7, 0, 0, 553, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x103088f0006004ULL, nullptr, nullptr, OperandInfo693, -1 ,nullptr }, // Inst #7739 = VMOVSDZmrk
{ 7740, 6, 1, 0, 554, 0|(1ULL<<MCID::MayLoad), 0x10108870006006ULL, nullptr, nullptr, OperandInfo416, -1 ,nullptr }, // Inst #7740 = VMOVSDZrm
{ 7741, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10108860006006ULL, nullptr, nullptr, OperandInfo694, -1 ,nullptr }, // Inst #7741 = VMOVSDZrm_Int
{ 7742, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10308860006006ULL, nullptr, nullptr, OperandInfo695, -1 ,nullptr }, // Inst #7742 = VMOVSDZrm_Intk
{ 7743, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10708860006006ULL, nullptr, nullptr, OperandInfo695, -1 ,nullptr }, // Inst #7743 = VMOVSDZrm_Intkz
{ 7744, 3, 1, 0, 555, 0, 0x10118870006005ULL, nullptr, nullptr, OperandInfo696, -1 ,nullptr }, // Inst #7744 = VMOVSDZrr
{ 7745, 3, 1, 0, 0, 0, 0x10118860006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7745 = VMOVSDZrr_Int
{ 7746, 5, 1, 0, 0, 0, 0x10318860006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7746 = VMOVSDZrr_Intk
{ 7747, 4, 1, 0, 0, 0, 0x10718860006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7747 = VMOVSDZrr_Intkz
{ 7748, 6, 0, 0, 336, 0|(1ULL<<MCID::MayStore), 0x1008b0006004ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr }, // Inst #7748 = VMOVSDmr
{ 7749, 6, 1, 0, 337, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x100830006006ULL, nullptr, nullptr, OperandInfo113, -1 ,nullptr }, // Inst #7749 = VMOVSDrm
{ 7750, 3, 1, 0, 338, 0, 0x110830006005ULL, nullptr, nullptr, OperandInfo697, -1 ,nullptr }, // Inst #7750 = VMOVSDrr
{ 7751, 3, 1, 0, 338, 0, 0x1108a0006003ULL, nullptr, nullptr, OperandInfo697, -1 ,nullptr }, // Inst #7751 = VMOVSDrr_REV
{ 7752, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x1000bf78005004ULL, nullptr, nullptr, OperandInfo692, -1 ,nullptr }, // Inst #7752 = VMOVSDto64Zmr
{ 7753, 2, 1, 0, 317, 0|(1ULL<<MCID::Bitcast), 0x2000bf78005003ULL, nullptr, nullptr, OperandInfo501, -1 ,nullptr }, // Inst #7753 = VMOVSDto64Zrr
{ 7754, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0xbf20005004ULL, nullptr, nullptr, OperandInfo246, -1 ,nullptr }, // Inst #7754 = VMOVSDto64mr
{ 7755, 2, 1, 0, 317, 0|(1ULL<<MCID::Bitcast), 0xbf20005003ULL, nullptr, nullptr, OperandInfo128, -1 ,nullptr }, // Inst #7755 = VMOVSDto64rr
{ 7756, 6, 1, 0, 322, 0|(1ULL<<MCID::MayLoad), 0x80b28005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7756 = VMOVSHDUPYrm
{ 7757, 2, 1, 0, 323, 0, 0x80b28005805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7757 = VMOVSHDUPYrr
{ 7758, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20000b78005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7758 = VMOVSHDUPZ128rm
{ 7759, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20200b78005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #7759 = VMOVSHDUPZ128rmk
{ 7760, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20600b78005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #7760 = VMOVSHDUPZ128rmkz
{ 7761, 2, 1, 0, 0, 0, 0x20000b78005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7761 = VMOVSHDUPZ128rr
{ 7762, 4, 1, 0, 0, 0, 0x20200b78005805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #7762 = VMOVSHDUPZ128rrk
{ 7763, 3, 1, 0, 0, 0, 0x20600b78005805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7763 = VMOVSHDUPZ128rrkz
{ 7764, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40080b78005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7764 = VMOVSHDUPZ256rm
{ 7765, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40280b78005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #7765 = VMOVSHDUPZ256rmk
{ 7766, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40680b78005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #7766 = VMOVSHDUPZ256rmkz
{ 7767, 2, 1, 0, 0, 0, 0x40080b78005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7767 = VMOVSHDUPZ256rr
{ 7768, 4, 1, 0, 0, 0, 0x40280b78005805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #7768 = VMOVSHDUPZ256rrk
{ 7769, 3, 1, 0, 0, 0, 0x40680b78005805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7769 = VMOVSHDUPZ256rrkz
{ 7770, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80800b78005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7770 = VMOVSHDUPZrm
{ 7771, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a00b78005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #7771 = VMOVSHDUPZrmk
{ 7772, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e00b78005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #7772 = VMOVSHDUPZrmkz
{ 7773, 2, 1, 0, 0, 0, 0x80800b78005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7773 = VMOVSHDUPZrr
{ 7774, 4, 1, 0, 0, 0, 0x80a00b78005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #7774 = VMOVSHDUPZrrk
{ 7775, 3, 1, 0, 0, 0, 0x80e00b78005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7775 = VMOVSHDUPZrrkz
{ 7776, 6, 1, 0, 322, 0|(1ULL<<MCID::MayLoad), 0xb28005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7776 = VMOVSHDUPrm
{ 7777, 2, 1, 0, 323, 0, 0xb28005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7777 = VMOVSHDUPrr
{ 7778, 6, 1, 0, 322, 0|(1ULL<<MCID::MayLoad), 0x80928005806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7778 = VMOVSLDUPYrm
{ 7779, 2, 1, 0, 323, 0, 0x80928005805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7779 = VMOVSLDUPYrr
{ 7780, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20000978005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7780 = VMOVSLDUPZ128rm
{ 7781, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20200978005806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #7781 = VMOVSLDUPZ128rmk
{ 7782, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20600978005806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #7782 = VMOVSLDUPZ128rmkz
{ 7783, 2, 1, 0, 0, 0, 0x20000978005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7783 = VMOVSLDUPZ128rr
{ 7784, 4, 1, 0, 0, 0, 0x20200978005805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #7784 = VMOVSLDUPZ128rrk
{ 7785, 3, 1, 0, 0, 0, 0x20600978005805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7785 = VMOVSLDUPZ128rrkz
{ 7786, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40080978005806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7786 = VMOVSLDUPZ256rm
{ 7787, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40280978005806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #7787 = VMOVSLDUPZ256rmk
{ 7788, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40680978005806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #7788 = VMOVSLDUPZ256rmkz
{ 7789, 2, 1, 0, 0, 0, 0x40080978005805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7789 = VMOVSLDUPZ256rr
{ 7790, 4, 1, 0, 0, 0, 0x40280978005805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #7790 = VMOVSLDUPZ256rrk
{ 7791, 3, 1, 0, 0, 0, 0x40680978005805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7791 = VMOVSLDUPZ256rrkz
{ 7792, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80800978005806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7792 = VMOVSLDUPZrm
{ 7793, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a00978005806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #7793 = VMOVSLDUPZrmk
{ 7794, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e00978005806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #7794 = VMOVSLDUPZrmkz
{ 7795, 2, 1, 0, 0, 0, 0x80800978005805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7795 = VMOVSLDUPZrr
{ 7796, 4, 1, 0, 0, 0, 0x80a00978005805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #7796 = VMOVSLDUPZrrk
{ 7797, 3, 1, 0, 0, 0, 0x80e00978005805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7797 = VMOVSLDUPZrrkz
{ 7798, 6, 1, 0, 322, 0|(1ULL<<MCID::MayLoad), 0x928005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7798 = VMOVSLDUPrm
{ 7799, 2, 1, 0, 323, 0, 0x928005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7799 = VMOVSLDUPrr
{ 7800, 6, 0, 0, 550, 0|(1ULL<<MCID::MayStore), 0x8003f78005004ULL, nullptr, nullptr, OperandInfo698, -1 ,nullptr }, // Inst #7800 = VMOVSS2DIZmr
{ 7801, 2, 1, 0, 552, 0|(1ULL<<MCID::Bitcast), 0x20003f78005003ULL, nullptr, nullptr, OperandInfo504, -1 ,nullptr }, // Inst #7801 = VMOVSS2DIZrr
{ 7802, 6, 0, 0, 332, 0|(1ULL<<MCID::MayStore), 0x3f20005004ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr }, // Inst #7802 = VMOVSS2DImr
{ 7803, 2, 1, 0, 333, 0|(1ULL<<MCID::Bitcast), 0x3f20005003ULL, nullptr, nullptr, OperandInfo131, -1 ,nullptr }, // Inst #7803 = VMOVSS2DIrr
{ 7804, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x201188e0006003ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7804 = VMOVSSDrr_REV
{ 7805, 5, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x203188e0006003ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7805 = VMOVSSDrr_REVk
{ 7806, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x207188e0006003ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7806 = VMOVSSDrr_REVkz
{ 7807, 6, 0, 0, 553, 0|(1ULL<<MCID::MayStore), 0x81008e8005804ULL, nullptr, nullptr, OperandInfo698, -1 ,nullptr }, // Inst #7807 = VMOVSSZmr
{ 7808, 7, 0, 0, 553, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x83008e8005804ULL, nullptr, nullptr, OperandInfo699, -1 ,nullptr }, // Inst #7808 = VMOVSSZmrk
{ 7809, 6, 1, 0, 554, 0|(1ULL<<MCID::MayLoad), 0x8100868005806ULL, nullptr, nullptr, OperandInfo418, -1 ,nullptr }, // Inst #7809 = VMOVSSZrm
{ 7810, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8100860005806ULL, nullptr, nullptr, OperandInfo694, -1 ,nullptr }, // Inst #7810 = VMOVSSZrm_Int
{ 7811, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8300860005806ULL, nullptr, nullptr, OperandInfo695, -1 ,nullptr }, // Inst #7811 = VMOVSSZrm_Intk
{ 7812, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8700860005806ULL, nullptr, nullptr, OperandInfo695, -1 ,nullptr }, // Inst #7812 = VMOVSSZrm_Intkz
{ 7813, 3, 1, 0, 555, 0, 0x8110868005805ULL, nullptr, nullptr, OperandInfo700, -1 ,nullptr }, // Inst #7813 = VMOVSSZrr
{ 7814, 3, 1, 0, 0, 0, 0x8110860005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7814 = VMOVSSZrr_Int
{ 7815, 5, 1, 0, 0, 0, 0x8310860005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7815 = VMOVSSZrr_Intk
{ 7816, 4, 1, 0, 0, 0, 0x8710860005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7816 = VMOVSSZrr_Intkz
{ 7817, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x201108e0005803ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7817 = VMOVSSZrr_REV
{ 7818, 5, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x203108e0005803ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #7818 = VMOVSSZrr_REVk
{ 7819, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x207108e0005803ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #7819 = VMOVSSZrr_REVkz
{ 7820, 6, 0, 0, 336, 0|(1ULL<<MCID::MayStore), 0x1008a8005804ULL, nullptr, nullptr, OperandInfo248, -1 ,nullptr }, // Inst #7820 = VMOVSSmr
{ 7821, 6, 1, 0, 337, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x100828005806ULL, nullptr, nullptr, OperandInfo115, -1 ,nullptr }, // Inst #7821 = VMOVSSrm
{ 7822, 3, 1, 0, 338, 0, 0x110828005805ULL, nullptr, nullptr, OperandInfo701, -1 ,nullptr }, // Inst #7822 = VMOVSSrr
{ 7823, 3, 1, 0, 338, 0, 0x1108a0005803ULL, nullptr, nullptr, OperandInfo701, -1 ,nullptr }, // Inst #7823 = VMOVSSrr_REV
{ 7824, 6, 0, 0, 325, 0|(1ULL<<MCID::MayStore), 0x808b0005004ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7824 = VMOVUPDYmr
{ 7825, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x80830005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7825 = VMOVUPDYrm
{ 7826, 2, 1, 0, 343, 0, 0x80830005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7826 = VMOVUPDYrr
{ 7827, 2, 1, 0, 343, 0, 0x808b0005003ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7827 = VMOVUPDYrr_REV
{ 7828, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x200088f0005004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7828 = VMOVUPDZ128mr
{ 7829, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x202088f0005004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #7829 = VMOVUPDZ128mrk
{ 7830, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x20008870005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7830 = VMOVUPDZ128rm
{ 7831, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x20208870005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #7831 = VMOVUPDZ128rmk
{ 7832, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x20608870005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #7832 = VMOVUPDZ128rmkz
{ 7833, 2, 1, 0, 0, 0, 0x20008870005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7833 = VMOVUPDZ128rr
{ 7834, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200088f0005003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7834 = VMOVUPDZ128rr_REV
{ 7835, 4, 1, 0, 0, 0, 0x20208870005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #7835 = VMOVUPDZ128rrk
{ 7836, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x202088f0005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7836 = VMOVUPDZ128rrk_REV
{ 7837, 3, 1, 0, 0, 0, 0x20608870005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7837 = VMOVUPDZ128rrkz
{ 7838, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x206088f0005003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #7838 = VMOVUPDZ128rrkz_REV
{ 7839, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x400888f0005004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7839 = VMOVUPDZ256mr
{ 7840, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x402888f0005004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #7840 = VMOVUPDZ256mrk
{ 7841, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x40088870005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7841 = VMOVUPDZ256rm
{ 7842, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x40288870005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #7842 = VMOVUPDZ256rmk
{ 7843, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x40688870005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #7843 = VMOVUPDZ256rmkz
{ 7844, 2, 1, 0, 0, 0, 0x40088870005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7844 = VMOVUPDZ256rr
{ 7845, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x400888f0005003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7845 = VMOVUPDZ256rr_REV
{ 7846, 4, 1, 0, 0, 0, 0x40288870005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #7846 = VMOVUPDZ256rrk
{ 7847, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402888f0005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7847 = VMOVUPDZ256rrk_REV
{ 7848, 3, 1, 0, 0, 0, 0x40688870005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7848 = VMOVUPDZ256rrkz
{ 7849, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x406888f0005003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #7849 = VMOVUPDZ256rrkz_REV
{ 7850, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x808088f0005004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7850 = VMOVUPDZmr
{ 7851, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a088f0005004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #7851 = VMOVUPDZmrk
{ 7852, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x80808870005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7852 = VMOVUPDZrm
{ 7853, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a08870005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #7853 = VMOVUPDZrmk
{ 7854, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e08870005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #7854 = VMOVUPDZrmkz
{ 7855, 2, 1, 0, 0, 0, 0x80808870005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7855 = VMOVUPDZrr
{ 7856, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808088f0005003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7856 = VMOVUPDZrr_REV
{ 7857, 4, 1, 0, 0, 0, 0x80a08870005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #7857 = VMOVUPDZrrk
{ 7858, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a088f0005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7858 = VMOVUPDZrrk_REV
{ 7859, 3, 1, 0, 0, 0, 0x80e08870005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7859 = VMOVUPDZrrkz
{ 7860, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e088f0005003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #7860 = VMOVUPDZrrkz_REV
{ 7861, 6, 0, 0, 325, 0|(1ULL<<MCID::MayStore), 0x8b0005004ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7861 = VMOVUPDmr
{ 7862, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad), 0x830005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7862 = VMOVUPDrm
{ 7863, 2, 1, 0, 343, 0, 0x830005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7863 = VMOVUPDrr
{ 7864, 2, 1, 0, 343, 0, 0x8b0005003ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7864 = VMOVUPDrr_REV
{ 7865, 6, 0, 0, 325, 0|(1ULL<<MCID::MayStore), 0x808a8004804ULL, nullptr, nullptr, OperandInfo658, -1 ,nullptr }, // Inst #7865 = VMOVUPSYmr
{ 7866, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x80828004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #7866 = VMOVUPSYrm
{ 7867, 2, 1, 0, 343, 0, 0x80828004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7867 = VMOVUPSYrr
{ 7868, 2, 1, 0, 343, 0, 0x808a8004803ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #7868 = VMOVUPSYrr_REV
{ 7869, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x200008e8004804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #7869 = VMOVUPSZ128mr
{ 7870, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x202008e8004804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #7870 = VMOVUPSZ128mrk
{ 7871, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x20000868004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7871 = VMOVUPSZ128rm
{ 7872, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x20200868004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #7872 = VMOVUPSZ128rmk
{ 7873, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x20600868004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #7873 = VMOVUPSZ128rmkz
{ 7874, 2, 1, 0, 0, 0, 0x20000868004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7874 = VMOVUPSZ128rr
{ 7875, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x200008e8004803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7875 = VMOVUPSZ128rr_REV
{ 7876, 4, 1, 0, 0, 0, 0x20200868004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #7876 = VMOVUPSZ128rrk
{ 7877, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x202008e8004803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7877 = VMOVUPSZ128rrk_REV
{ 7878, 3, 1, 0, 0, 0, 0x20600868004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7878 = VMOVUPSZ128rrkz
{ 7879, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x206008e8004803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #7879 = VMOVUPSZ128rrkz_REV
{ 7880, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x400808e8004804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #7880 = VMOVUPSZ256mr
{ 7881, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x402808e8004804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #7881 = VMOVUPSZ256mrk
{ 7882, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x40080868004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #7882 = VMOVUPSZ256rm
{ 7883, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x40280868004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #7883 = VMOVUPSZ256rmk
{ 7884, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x40680868004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #7884 = VMOVUPSZ256rmkz
{ 7885, 2, 1, 0, 0, 0, 0x40080868004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7885 = VMOVUPSZ256rr
{ 7886, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x400808e8004803ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #7886 = VMOVUPSZ256rr_REV
{ 7887, 4, 1, 0, 0, 0, 0x40280868004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #7887 = VMOVUPSZ256rrk
{ 7888, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x402808e8004803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7888 = VMOVUPSZ256rrk_REV
{ 7889, 3, 1, 0, 0, 0, 0x40680868004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7889 = VMOVUPSZ256rrkz
{ 7890, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x406808e8004803ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #7890 = VMOVUPSZ256rrkz_REV
{ 7891, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x808008e8004804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #7891 = VMOVUPSZmr
{ 7892, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80a008e8004804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #7892 = VMOVUPSZmrk
{ 7893, 6, 1, 0, 206, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x80800868004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #7893 = VMOVUPSZrm
{ 7894, 8, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80a00868004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #7894 = VMOVUPSZrmk
{ 7895, 7, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x80e00868004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #7895 = VMOVUPSZrmkz
{ 7896, 2, 1, 0, 0, 0, 0x80800868004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7896 = VMOVUPSZrr
{ 7897, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x808008e8004803ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #7897 = VMOVUPSZrr_REV
{ 7898, 4, 1, 0, 0, 0, 0x80a00868004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #7898 = VMOVUPSZrrk
{ 7899, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a008e8004803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7899 = VMOVUPSZrrk_REV
{ 7900, 3, 1, 0, 0, 0, 0x80e00868004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7900 = VMOVUPSZrrkz
{ 7901, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e008e8004803ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #7901 = VMOVUPSZrrkz_REV
{ 7902, 6, 0, 0, 325, 0|(1ULL<<MCID::MayStore), 0x8a8004804ULL, nullptr, nullptr, OperandInfo244, -1 ,nullptr }, // Inst #7902 = VMOVUPSmr
{ 7903, 6, 1, 0, 326, 0|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Rematerializable), 0x828004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7903 = VMOVUPSrm
{ 7904, 2, 1, 0, 343, 0, 0x828004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7904 = VMOVUPSrr
{ 7905, 2, 1, 0, 343, 0, 0x8a8004803ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7905 = VMOVUPSrr_REV
{ 7906, 6, 1, 0, 550, 0|(1ULL<<MCID::MayLoad), 0x1000bf60005806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #7906 = VMOVZPQILo2PQIZrm
{ 7907, 2, 1, 0, 556, 0, 0x2000bf60005805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #7907 = VMOVZPQILo2PQIZrr
{ 7908, 6, 1, 0, 344, 0|(1ULL<<MCID::MayLoad), 0x3f38005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7908 = VMOVZPQILo2PQIrm
{ 7909, 2, 1, 0, 334, 0, 0x3f38005805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #7909 = VMOVZPQILo2PQIrr
{ 7910, 6, 1, 0, 316, 0|(1ULL<<MCID::MayLoad), 0x3f38005806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #7910 = VMOVZQI2PQIrm
{ 7911, 8, 1, 0, 557, 0|(1ULL<<MCID::MayLoad), 0x9213804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #7911 = VMPSADBWYrmi
{ 7912, 4, 1, 0, 558, 0, 0x9213804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #7912 = VMPSADBWYrri
{ 7913, 8, 1, 0, 557, 0|(1ULL<<MCID::MayLoad), 0x1213804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #7913 = VMPSADBWrmi
{ 7914, 4, 1, 0, 558, 0, 0x1213804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #7914 = VMPSADBWrri
{ 7915, 5, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x638000481eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #7915 = VMPTRLDm
{ 7916, 5, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x638000401fULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #7916 = VMPTRSTm
{ 7917, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00004804ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, // Inst #7917 = VMREAD32rm
{ 7918, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00004803ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #7918 = VMREAD32rr
{ 7919, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00004804ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #7919 = VMREAD64rm
{ 7920, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c00004803ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #7920 = VMREAD64rr
{ 7921, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004023ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #7921 = VMRESUME
{ 7922, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004038ULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr }, // Inst #7922 = VMRUN32
{ 7923, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004038ULL, ImplicitList10, nullptr, nullptr, -1 ,nullptr }, // Inst #7923 = VMRUN64
{ 7924, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403bULL, ImplicitList9, nullptr, nullptr, -1 ,nullptr }, // Inst #7924 = VMSAVE32
{ 7925, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000403bULL, ImplicitList10, nullptr, nullptr, -1 ,nullptr }, // Inst #7925 = VMSAVE64
{ 7926, 7, 1, 0, 359, 0|(1ULL<<MCID::MayLoad), 0x92cb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7926 = VMULPDYrm
{ 7927, 3, 1, 0, 360, 0|(1ULL<<MCID::Commutable), 0x92cb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7927 = VMULPDYrr
{ 7928, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001ace0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7928 = VMULPDZ128rm
{ 7929, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101ace0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7929 = VMULPDZ128rmb
{ 7930, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121ace0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #7930 = VMULPDZ128rmbk
{ 7931, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161ace0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #7931 = VMULPDZ128rmbkz
{ 7932, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021ace0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #7932 = VMULPDZ128rmk
{ 7933, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061ace0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #7933 = VMULPDZ128rmkz
{ 7934, 3, 1, 0, 0, 0, 0x2001ace0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7934 = VMULPDZ128rr
{ 7935, 5, 1, 0, 0, 0, 0x2021ace0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #7935 = VMULPDZ128rrk
{ 7936, 4, 1, 0, 0, 0, 0x2061ace0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #7936 = VMULPDZ128rrkz
{ 7937, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009ace0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7937 = VMULPDZ256rm
{ 7938, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109ace0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7938 = VMULPDZ256rmb
{ 7939, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129ace0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #7939 = VMULPDZ256rmbk
{ 7940, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169ace0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #7940 = VMULPDZ256rmbkz
{ 7941, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029ace0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #7941 = VMULPDZ256rmk
{ 7942, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069ace0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #7942 = VMULPDZ256rmkz
{ 7943, 3, 1, 0, 0, 0, 0x4009ace0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #7943 = VMULPDZ256rr
{ 7944, 5, 1, 0, 0, 0, 0x4029ace0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #7944 = VMULPDZ256rrk
{ 7945, 4, 1, 0, 0, 0, 0x4069ace0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #7945 = VMULPDZ256rrkz
{ 7946, 4, 1, 0, 0, 0, 0x41181ace0005005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #7946 = VMULPDZrb
{ 7947, 6, 1, 0, 0, 0, 0x411a1ace0005005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #7947 = VMULPDZrbk
{ 7948, 5, 1, 0, 0, 0, 0x411e1ace0005005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #7948 = VMULPDZrbkz
{ 7949, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081ace0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7949 = VMULPDZrm
{ 7950, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181ace0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7950 = VMULPDZrmb
{ 7951, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1ace0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #7951 = VMULPDZrmbk
{ 7952, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1ace0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #7952 = VMULPDZrmbkz
{ 7953, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1ace0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #7953 = VMULPDZrmk
{ 7954, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1ace0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #7954 = VMULPDZrmkz
{ 7955, 3, 1, 0, 0, 0, 0x8081ace0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7955 = VMULPDZrr
{ 7956, 5, 1, 0, 0, 0, 0x80a1ace0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #7956 = VMULPDZrrk
{ 7957, 4, 1, 0, 0, 0, 0x80e1ace0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #7957 = VMULPDZrrkz
{ 7958, 7, 1, 0, 908, 0|(1ULL<<MCID::MayLoad), 0x12cb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7958 = VMULPDrm
{ 7959, 3, 1, 0, 904, 0|(1ULL<<MCID::Commutable), 0x12cb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7959 = VMULPDrr
{ 7960, 7, 1, 0, 359, 0|(1ULL<<MCID::MayLoad), 0x92ca8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #7960 = VMULPSYrm
{ 7961, 3, 1, 0, 361, 0|(1ULL<<MCID::Commutable), 0x92ca8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #7961 = VMULPSYrr
{ 7962, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012ce0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7962 = VMULPSZ128rm
{ 7963, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012ce0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7963 = VMULPSZ128rmb
{ 7964, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212ce0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #7964 = VMULPSZ128rmbk
{ 7965, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612ce0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #7965 = VMULPSZ128rmbkz
{ 7966, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212ce0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #7966 = VMULPSZ128rmk
{ 7967, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612ce0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #7967 = VMULPSZ128rmkz
{ 7968, 3, 1, 0, 0, 0, 0x20012ce0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7968 = VMULPSZ128rr
{ 7969, 5, 1, 0, 0, 0, 0x20212ce0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #7969 = VMULPSZ128rrk
{ 7970, 4, 1, 0, 0, 0, 0x20612ce0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #7970 = VMULPSZ128rrkz
{ 7971, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092ce0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7971 = VMULPSZ256rm
{ 7972, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092ce0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #7972 = VMULPSZ256rmb
{ 7973, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292ce0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #7973 = VMULPSZ256rmbk
{ 7974, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692ce0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #7974 = VMULPSZ256rmbkz
{ 7975, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292ce0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #7975 = VMULPSZ256rmk
{ 7976, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692ce0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #7976 = VMULPSZ256rmkz
{ 7977, 3, 1, 0, 0, 0, 0x40092ce0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #7977 = VMULPSZ256rr
{ 7978, 5, 1, 0, 0, 0, 0x40292ce0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #7978 = VMULPSZ256rrk
{ 7979, 4, 1, 0, 0, 0, 0x40692ce0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #7979 = VMULPSZ256rrkz
{ 7980, 4, 1, 0, 0, 0, 0x409812ce0004805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #7980 = VMULPSZrb
{ 7981, 6, 1, 0, 0, 0, 0x409a12ce0004805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #7981 = VMULPSZrbk
{ 7982, 5, 1, 0, 0, 0, 0x409e12ce0004805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #7982 = VMULPSZrbkz
{ 7983, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812ce0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7983 = VMULPSZrm
{ 7984, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812ce0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #7984 = VMULPSZrmb
{ 7985, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12ce0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #7985 = VMULPSZrmbk
{ 7986, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12ce0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #7986 = VMULPSZrmbkz
{ 7987, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12ce0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #7987 = VMULPSZrmk
{ 7988, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12ce0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #7988 = VMULPSZrmkz
{ 7989, 3, 1, 0, 0, 0, 0x80812ce0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #7989 = VMULPSZrr
{ 7990, 5, 1, 0, 0, 0, 0x80a12ce0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #7990 = VMULPSZrrk
{ 7991, 4, 1, 0, 0, 0, 0x80e12ce0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #7991 = VMULPSZrrkz
{ 7992, 7, 1, 0, 908, 0|(1ULL<<MCID::MayLoad), 0x12ca8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #7992 = VMULPSrm
{ 7993, 3, 1, 0, 905, 0|(1ULL<<MCID::Commutable), 0x12ca8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #7993 = VMULPSrr
{ 7994, 7, 1, 0, 525, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011ace0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #7994 = VMULSDZrm
{ 7995, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x1011ace0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #7995 = VMULSDZrm_Int
{ 7996, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031ace0006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #7996 = VMULSDZrm_Intk
{ 7997, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071ace0006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #7997 = VMULSDZrm_Intkz
{ 7998, 3, 1, 0, 525, 0|(1ULL<<MCID::Commutable), 0x1011ace0006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr }, // Inst #7998 = VMULSDZrr
{ 7999, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x1011ace0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #7999 = VMULSDZrr_Int
{ 8000, 5, 1, 0, 0, 0, 0x1031ace0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #8000 = VMULSDZrr_Intk
{ 8001, 4, 1, 0, 0, 0, 0x1071ace0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #8001 = VMULSDZrr_Intkz
{ 8002, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x41111ace0006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #8002 = VMULSDZrrb
{ 8003, 6, 1, 0, 0, 0, 0x41131ace0006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #8003 = VMULSDZrrbk
{ 8004, 5, 1, 0, 0, 0, 0x41171ace0006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #8004 = VMULSDZrrbkz
{ 8005, 7, 1, 0, 909, 0|(1ULL<<MCID::MayLoad), 0x112cb0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #8005 = VMULSDrm
{ 8006, 7, 1, 0, 909, 0|(1ULL<<MCID::MayLoad), 0x112cb0006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8006 = VMULSDrm_Int
{ 8007, 3, 1, 0, 906, 0|(1ULL<<MCID::Commutable), 0x112cb0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #8007 = VMULSDrr
{ 8008, 3, 1, 0, 906, 0, 0x112cb0006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8008 = VMULSDrr_Int
{ 8009, 7, 1, 0, 526, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112ce0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #8009 = VMULSSZrm
{ 8010, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::Commutable), 0x8112ce0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8010 = VMULSSZrm_Int
{ 8011, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8312ce0005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #8011 = VMULSSZrm_Intk
{ 8012, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8712ce0005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #8012 = VMULSSZrm_Intkz
{ 8013, 3, 1, 0, 526, 0|(1ULL<<MCID::Commutable), 0x8112ce0005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr }, // Inst #8013 = VMULSSZrr
{ 8014, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8112ce0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8014 = VMULSSZrr_Int
{ 8015, 5, 1, 0, 0, 0, 0x8312ce0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #8015 = VMULSSZrr_Intk
{ 8016, 4, 1, 0, 0, 0, 0x8712ce0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #8016 = VMULSSZrr_Intkz
{ 8017, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x409112ce0005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #8017 = VMULSSZrrb
{ 8018, 6, 1, 0, 0, 0, 0x409312ce0005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #8018 = VMULSSZrrbk
{ 8019, 5, 1, 0, 0, 0, 0x409712ce0005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #8019 = VMULSSZrrbkz
{ 8020, 7, 1, 0, 909, 0|(1ULL<<MCID::MayLoad), 0x112ca8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #8020 = VMULSSrm
{ 8021, 7, 1, 0, 909, 0|(1ULL<<MCID::MayLoad), 0x112ca8005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8021 = VMULSSrm_Int
{ 8022, 3, 1, 0, 907, 0|(1ULL<<MCID::Commutable), 0x112ca8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #8022 = VMULSSrr
{ 8023, 3, 1, 0, 907, 0, 0x112ca8005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8023 = VMULSSrr_Int
{ 8024, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80004806ULL, nullptr, nullptr, OperandInfo17, -1 ,nullptr }, // Inst #8024 = VMWRITE32rm
{ 8025, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80004805ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #8025 = VMWRITE32rr
{ 8026, 6, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80004806ULL, nullptr, nullptr, OperandInfo18, -1 ,nullptr }, // Inst #8026 = VMWRITE64rm
{ 8027, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x3c80004805ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #8027 = VMWRITE64rr
{ 8028, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004024ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #8028 = VMXOFF
{ 8029, 5, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x638000581eULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #8029 = VMXON
{ 8030, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x92b30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8030 = VORPDYrm
{ 8031, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x92b30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8031 = VORPDYrr
{ 8032, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001ab60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8032 = VORPDZ128rm
{ 8033, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101ab60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8033 = VORPDZ128rmb
{ 8034, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121ab60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #8034 = VORPDZ128rmbk
{ 8035, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161ab60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8035 = VORPDZ128rmbkz
{ 8036, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021ab60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #8036 = VORPDZ128rmk
{ 8037, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061ab60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8037 = VORPDZ128rmkz
{ 8038, 3, 1, 0, 0, 0, 0x2001ab60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8038 = VORPDZ128rr
{ 8039, 5, 1, 0, 0, 0, 0x2021ab60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #8039 = VORPDZ128rrk
{ 8040, 4, 1, 0, 0, 0, 0x2061ab60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #8040 = VORPDZ128rrkz
{ 8041, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009ab60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8041 = VORPDZ256rm
{ 8042, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109ab60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8042 = VORPDZ256rmb
{ 8043, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129ab60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #8043 = VORPDZ256rmbk
{ 8044, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169ab60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8044 = VORPDZ256rmbkz
{ 8045, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029ab60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #8045 = VORPDZ256rmk
{ 8046, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069ab60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8046 = VORPDZ256rmkz
{ 8047, 3, 1, 0, 0, 0, 0x4009ab60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8047 = VORPDZ256rr
{ 8048, 5, 1, 0, 0, 0, 0x4029ab60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #8048 = VORPDZ256rrk
{ 8049, 4, 1, 0, 0, 0, 0x4069ab60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #8049 = VORPDZ256rrkz
{ 8050, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081ab60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8050 = VORPDZrm
{ 8051, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181ab60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8051 = VORPDZrmb
{ 8052, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1ab60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #8052 = VORPDZrmbk
{ 8053, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1ab60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8053 = VORPDZrmbkz
{ 8054, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1ab60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #8054 = VORPDZrmk
{ 8055, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1ab60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8055 = VORPDZrmkz
{ 8056, 3, 1, 0, 0, 0, 0x8081ab60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8056 = VORPDZrr
{ 8057, 5, 1, 0, 0, 0, 0x80a1ab60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #8057 = VORPDZrrk
{ 8058, 4, 1, 0, 0, 0, 0x80e1ab60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #8058 = VORPDZrrkz
{ 8059, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x12b30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8059 = VORPDrm
{ 8060, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x12b30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8060 = VORPDrr
{ 8061, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x92b28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8061 = VORPSYrm
{ 8062, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x92b28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8062 = VORPSYrr
{ 8063, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012b60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8063 = VORPSZ128rm
{ 8064, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012b60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8064 = VORPSZ128rmb
{ 8065, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212b60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #8065 = VORPSZ128rmbk
{ 8066, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612b60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8066 = VORPSZ128rmbkz
{ 8067, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212b60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #8067 = VORPSZ128rmk
{ 8068, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612b60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8068 = VORPSZ128rmkz
{ 8069, 3, 1, 0, 0, 0, 0x20012b60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8069 = VORPSZ128rr
{ 8070, 5, 1, 0, 0, 0, 0x20212b60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #8070 = VORPSZ128rrk
{ 8071, 4, 1, 0, 0, 0, 0x20612b60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #8071 = VORPSZ128rrkz
{ 8072, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092b60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8072 = VORPSZ256rm
{ 8073, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092b60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8073 = VORPSZ256rmb
{ 8074, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292b60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #8074 = VORPSZ256rmbk
{ 8075, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692b60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8075 = VORPSZ256rmbkz
{ 8076, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292b60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #8076 = VORPSZ256rmk
{ 8077, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692b60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8077 = VORPSZ256rmkz
{ 8078, 3, 1, 0, 0, 0, 0x40092b60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8078 = VORPSZ256rr
{ 8079, 5, 1, 0, 0, 0, 0x40292b60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #8079 = VORPSZ256rrk
{ 8080, 4, 1, 0, 0, 0, 0x40692b60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #8080 = VORPSZ256rrkz
{ 8081, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812b60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8081 = VORPSZrm
{ 8082, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812b60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8082 = VORPSZrmb
{ 8083, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12b60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #8083 = VORPSZrmbk
{ 8084, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12b60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8084 = VORPSZrmbkz
{ 8085, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12b60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #8085 = VORPSZrmk
{ 8086, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12b60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8086 = VORPSZrmkz
{ 8087, 3, 1, 0, 0, 0, 0x80812b60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8087 = VORPSZrr
{ 8088, 5, 1, 0, 0, 0, 0x80a12b60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #8088 = VORPSZrrk
{ 8089, 4, 1, 0, 0, 0, 0x80e12b60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #8089 = VORPSZrrkz
{ 8090, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x12b28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8090 = VORPSrm
{ 8091, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x12b28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8091 = VORPSrr
{ 8092, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20000e78009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8092 = VPABSBZ128rm
{ 8093, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20200e78009006ULL, nullptr, nullptr, OperandInfo677, -1 ,nullptr }, // Inst #8093 = VPABSBZ128rmk
{ 8094, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20600e78009006ULL, nullptr, nullptr, OperandInfo678, -1 ,nullptr }, // Inst #8094 = VPABSBZ128rmkz
{ 8095, 2, 1, 0, 0, 0, 0x20000e78009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8095 = VPABSBZ128rr
{ 8096, 4, 1, 0, 0, 0, 0x20200e78009005ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #8096 = VPABSBZ128rrk
{ 8097, 3, 1, 0, 0, 0, 0x20600e78009005ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #8097 = VPABSBZ128rrkz
{ 8098, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40080e78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8098 = VPABSBZ256rm
{ 8099, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40280e78009006ULL, nullptr, nullptr, OperandInfo682, -1 ,nullptr }, // Inst #8099 = VPABSBZ256rmk
{ 8100, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40680e78009006ULL, nullptr, nullptr, OperandInfo683, -1 ,nullptr }, // Inst #8100 = VPABSBZ256rmkz
{ 8101, 2, 1, 0, 0, 0, 0x40080e78009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #8101 = VPABSBZ256rr
{ 8102, 4, 1, 0, 0, 0, 0x40280e78009005ULL, nullptr, nullptr, OperandInfo684, -1 ,nullptr }, // Inst #8102 = VPABSBZ256rrk
{ 8103, 3, 1, 0, 0, 0, 0x40680e78009005ULL, nullptr, nullptr, OperandInfo685, -1 ,nullptr }, // Inst #8103 = VPABSBZ256rrkz
{ 8104, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80800e78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8104 = VPABSBZrm
{ 8105, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a00e78009006ULL, nullptr, nullptr, OperandInfo687, -1 ,nullptr }, // Inst #8105 = VPABSBZrmk
{ 8106, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e00e78009006ULL, nullptr, nullptr, OperandInfo688, -1 ,nullptr }, // Inst #8106 = VPABSBZrmkz
{ 8107, 2, 1, 0, 0, 0, 0x80800e78009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8107 = VPABSBZrr
{ 8108, 4, 1, 0, 0, 0, 0x80a00e78009005ULL, nullptr, nullptr, OperandInfo689, -1 ,nullptr }, // Inst #8108 = VPABSBZrrk
{ 8109, 3, 1, 0, 0, 0, 0x80e00e78009005ULL, nullptr, nullptr, OperandInfo690, -1 ,nullptr }, // Inst #8109 = VPABSBZrrkz
{ 8110, 6, 1, 0, 374, 0|(1ULL<<MCID::MayLoad), 0xe38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #8110 = VPABSBrm128
{ 8111, 6, 1, 0, 559, 0|(1ULL<<MCID::MayLoad), 0x80e38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #8111 = VPABSBrm256
{ 8112, 2, 1, 0, 375, 0, 0xe38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #8112 = VPABSBrr128
{ 8113, 2, 1, 0, 392, 0, 0x80e38009005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #8113 = VPABSBrr256
{ 8114, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20000f78009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8114 = VPABSDZ128rm
{ 8115, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9000f78009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8115 = VPABSDZ128rmb
{ 8116, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9200f78009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #8116 = VPABSDZ128rmbk
{ 8117, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9600f78009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #8117 = VPABSDZ128rmbkz
{ 8118, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20200f78009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #8118 = VPABSDZ128rmk
{ 8119, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20600f78009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #8119 = VPABSDZ128rmkz
{ 8120, 2, 1, 0, 0, 0, 0x20000f78009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8120 = VPABSDZ128rr
{ 8121, 4, 1, 0, 0, 0, 0x20200f78009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #8121 = VPABSDZ128rrk
{ 8122, 3, 1, 0, 0, 0, 0x20600f78009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #8122 = VPABSDZ128rrkz
{ 8123, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40080f78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8123 = VPABSDZ256rm
{ 8124, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9080f78009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8124 = VPABSDZ256rmb
{ 8125, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9280f78009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #8125 = VPABSDZ256rmbk
{ 8126, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9680f78009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #8126 = VPABSDZ256rmbkz
{ 8127, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40280f78009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #8127 = VPABSDZ256rmk
{ 8128, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40680f78009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #8128 = VPABSDZ256rmkz
{ 8129, 2, 1, 0, 0, 0, 0x40080f78009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #8129 = VPABSDZ256rr
{ 8130, 4, 1, 0, 0, 0, 0x40280f78009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #8130 = VPABSDZ256rrk
{ 8131, 3, 1, 0, 0, 0, 0x40680f78009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #8131 = VPABSDZ256rrkz
{ 8132, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80800f78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8132 = VPABSDZrm
{ 8133, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9800f78009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8133 = VPABSDZrmb
{ 8134, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a00f78009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #8134 = VPABSDZrmbk
{ 8135, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e00f78009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #8135 = VPABSDZrmbkz
{ 8136, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a00f78009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #8136 = VPABSDZrmk
{ 8137, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e00f78009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #8137 = VPABSDZrmkz
{ 8138, 2, 1, 0, 0, 0, 0x80800f78009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8138 = VPABSDZrr
{ 8139, 4, 1, 0, 0, 0, 0x80a00f78009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #8139 = VPABSDZrrk
{ 8140, 3, 1, 0, 0, 0, 0x80e00f78009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #8140 = VPABSDZrrkz
{ 8141, 6, 1, 0, 374, 0|(1ULL<<MCID::MayLoad), 0xf38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #8141 = VPABSDrm128
{ 8142, 6, 1, 0, 559, 0|(1ULL<<MCID::MayLoad), 0x80f38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #8142 = VPABSDrm256
{ 8143, 2, 1, 0, 375, 0, 0xf38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #8143 = VPABSDrr128
{ 8144, 2, 1, 0, 392, 0, 0x80f38009005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #8144 = VPABSDrr256
{ 8145, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20008ff8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8145 = VPABSQZ128rm
{ 8146, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11008ff8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8146 = VPABSQZ128rmb
{ 8147, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11208ff8009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #8147 = VPABSQZ128rmbk
{ 8148, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11608ff8009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #8148 = VPABSQZ128rmbkz
{ 8149, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20208ff8009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #8149 = VPABSQZ128rmk
{ 8150, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20608ff8009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #8150 = VPABSQZ128rmkz
{ 8151, 2, 1, 0, 0, 0, 0x20008ff8009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8151 = VPABSQZ128rr
{ 8152, 4, 1, 0, 0, 0, 0x20208ff8009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #8152 = VPABSQZ128rrk
{ 8153, 3, 1, 0, 0, 0, 0x20608ff8009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #8153 = VPABSQZ128rrkz
{ 8154, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40088ff8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8154 = VPABSQZ256rm
{ 8155, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11088ff8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8155 = VPABSQZ256rmb
{ 8156, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11288ff8009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #8156 = VPABSQZ256rmbk
{ 8157, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11688ff8009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #8157 = VPABSQZ256rmbkz
{ 8158, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40288ff8009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #8158 = VPABSQZ256rmk
{ 8159, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40688ff8009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #8159 = VPABSQZ256rmkz
{ 8160, 2, 1, 0, 0, 0, 0x40088ff8009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #8160 = VPABSQZ256rr
{ 8161, 4, 1, 0, 0, 0, 0x40288ff8009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #8161 = VPABSQZ256rrk
{ 8162, 3, 1, 0, 0, 0, 0x40688ff8009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #8162 = VPABSQZ256rrkz
{ 8163, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80808ff8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8163 = VPABSQZrm
{ 8164, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11808ff8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8164 = VPABSQZrmb
{ 8165, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a08ff8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #8165 = VPABSQZrmbk
{ 8166, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e08ff8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #8166 = VPABSQZrmbkz
{ 8167, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a08ff8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #8167 = VPABSQZrmk
{ 8168, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e08ff8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #8168 = VPABSQZrmkz
{ 8169, 2, 1, 0, 0, 0, 0x80808ff8009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8169 = VPABSQZrr
{ 8170, 4, 1, 0, 0, 0, 0x80a08ff8009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #8170 = VPABSQZrrk
{ 8171, 3, 1, 0, 0, 0, 0x80e08ff8009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #8171 = VPABSQZrrkz
{ 8172, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20000ef8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8172 = VPABSWZ128rm
{ 8173, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20200ef8009006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr }, // Inst #8173 = VPABSWZ128rmk
{ 8174, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20600ef8009006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr }, // Inst #8174 = VPABSWZ128rmkz
{ 8175, 2, 1, 0, 0, 0, 0x20000ef8009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8175 = VPABSWZ128rr
{ 8176, 4, 1, 0, 0, 0, 0x20200ef8009005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #8176 = VPABSWZ128rrk
{ 8177, 3, 1, 0, 0, 0, 0x20600ef8009005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #8177 = VPABSWZ128rrkz
{ 8178, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40080ef8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8178 = VPABSWZ256rm
{ 8179, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40280ef8009006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr }, // Inst #8179 = VPABSWZ256rmk
{ 8180, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40680ef8009006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr }, // Inst #8180 = VPABSWZ256rmkz
{ 8181, 2, 1, 0, 0, 0, 0x40080ef8009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #8181 = VPABSWZ256rr
{ 8182, 4, 1, 0, 0, 0, 0x40280ef8009005ULL, nullptr, nullptr, OperandInfo669, -1 ,nullptr }, // Inst #8182 = VPABSWZ256rrk
{ 8183, 3, 1, 0, 0, 0, 0x40680ef8009005ULL, nullptr, nullptr, OperandInfo670, -1 ,nullptr }, // Inst #8183 = VPABSWZ256rrkz
{ 8184, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80800ef8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8184 = VPABSWZrm
{ 8185, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a00ef8009006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr }, // Inst #8185 = VPABSWZrmk
{ 8186, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e00ef8009006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr }, // Inst #8186 = VPABSWZrmkz
{ 8187, 2, 1, 0, 0, 0, 0x80800ef8009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #8187 = VPABSWZrr
{ 8188, 4, 1, 0, 0, 0, 0x80a00ef8009005ULL, nullptr, nullptr, OperandInfo674, -1 ,nullptr }, // Inst #8188 = VPABSWZrrk
{ 8189, 3, 1, 0, 0, 0, 0x80e00ef8009005ULL, nullptr, nullptr, OperandInfo675, -1 ,nullptr }, // Inst #8189 = VPABSWZrrkz
{ 8190, 6, 1, 0, 374, 0|(1ULL<<MCID::MayLoad), 0xeb8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #8190 = VPABSWrm128
{ 8191, 6, 1, 0, 559, 0|(1ULL<<MCID::MayLoad), 0x80eb8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #8191 = VPABSWrm256
{ 8192, 2, 1, 0, 375, 0, 0xeb8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #8192 = VPABSWrr128
{ 8193, 2, 1, 0, 392, 0, 0x80eb8009005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #8193 = VPABSWrr256
{ 8194, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x935b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8194 = VPACKSSDWYrm
{ 8195, 3, 1, 0, 276, 0, 0x935b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8195 = VPACKSSDWYrr
{ 8196, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200135e0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8196 = VPACKSSDWZ128rm
{ 8197, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90135e0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8197 = VPACKSSDWZ128rmb
{ 8198, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92135e0005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #8198 = VPACKSSDWZ128rmbk
{ 8199, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96135e0005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8199 = VPACKSSDWZ128rmbkz
{ 8200, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202135e0005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #8200 = VPACKSSDWZ128rmk
{ 8201, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206135e0005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8201 = VPACKSSDWZ128rmkz
{ 8202, 3, 1, 0, 0, 0, 0x200135e0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8202 = VPACKSSDWZ128rr
{ 8203, 5, 1, 0, 0, 0, 0x202135e0005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #8203 = VPACKSSDWZ128rrk
{ 8204, 4, 1, 0, 0, 0, 0x206135e0005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #8204 = VPACKSSDWZ128rrkz
{ 8205, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400935e0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8205 = VPACKSSDWZ256rm
{ 8206, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90935e0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8206 = VPACKSSDWZ256rmb
{ 8207, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92935e0005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #8207 = VPACKSSDWZ256rmbk
{ 8208, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96935e0005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8208 = VPACKSSDWZ256rmbkz
{ 8209, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402935e0005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #8209 = VPACKSSDWZ256rmk
{ 8210, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406935e0005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8210 = VPACKSSDWZ256rmkz
{ 8211, 3, 1, 0, 0, 0, 0x400935e0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8211 = VPACKSSDWZ256rr
{ 8212, 5, 1, 0, 0, 0, 0x402935e0005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #8212 = VPACKSSDWZ256rrk
{ 8213, 4, 1, 0, 0, 0, 0x406935e0005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #8213 = VPACKSSDWZ256rrkz
{ 8214, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808135e0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8214 = VPACKSSDWZrm
{ 8215, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98135e0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8215 = VPACKSSDWZrmb
{ 8216, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a135e0005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #8216 = VPACKSSDWZrmbk
{ 8217, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e135e0005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8217 = VPACKSSDWZrmbkz
{ 8218, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a135e0005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #8218 = VPACKSSDWZrmk
{ 8219, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e135e0005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8219 = VPACKSSDWZrmkz
{ 8220, 3, 1, 0, 0, 0, 0x808135e0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8220 = VPACKSSDWZrr
{ 8221, 5, 1, 0, 0, 0, 0x80a135e0005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #8221 = VPACKSSDWZrrk
{ 8222, 4, 1, 0, 0, 0, 0x80e135e0005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #8222 = VPACKSSDWZrrkz
{ 8223, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x135b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8223 = VPACKSSDWrm
{ 8224, 3, 1, 0, 276, 0, 0x135b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8224 = VPACKSSDWrr
{ 8225, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x931b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8225 = VPACKSSWBYrm
{ 8226, 3, 1, 0, 276, 0, 0x931b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8226 = VPACKSSWBYrr
{ 8227, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b1f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8227 = VPACKSSWBZ128rm
{ 8228, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b1f8005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #8228 = VPACKSSWBZ128rmk
{ 8229, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b1f8005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #8229 = VPACKSSWBZ128rmkz
{ 8230, 3, 1, 0, 0, 0, 0x2001b1f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8230 = VPACKSSWBZ128rr
{ 8231, 5, 1, 0, 0, 0, 0x2021b1f8005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #8231 = VPACKSSWBZ128rrk
{ 8232, 4, 1, 0, 0, 0, 0x2061b1f8005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #8232 = VPACKSSWBZ128rrkz
{ 8233, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b1f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8233 = VPACKSSWBZ256rm
{ 8234, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b1f8005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #8234 = VPACKSSWBZ256rmk
{ 8235, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b1f8005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #8235 = VPACKSSWBZ256rmkz
{ 8236, 3, 1, 0, 0, 0, 0x4009b1f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8236 = VPACKSSWBZ256rr
{ 8237, 5, 1, 0, 0, 0, 0x4029b1f8005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #8237 = VPACKSSWBZ256rrk
{ 8238, 4, 1, 0, 0, 0, 0x4069b1f8005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #8238 = VPACKSSWBZ256rrkz
{ 8239, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b1f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8239 = VPACKSSWBZrm
{ 8240, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b1f8005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #8240 = VPACKSSWBZrmk
{ 8241, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b1f8005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #8241 = VPACKSSWBZrmkz
{ 8242, 3, 1, 0, 0, 0, 0x8081b1f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8242 = VPACKSSWBZrr
{ 8243, 5, 1, 0, 0, 0, 0x80a1b1f8005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #8243 = VPACKSSWBZrrk
{ 8244, 4, 1, 0, 0, 0, 0x80e1b1f8005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #8244 = VPACKSSWBZrrkz
{ 8245, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x131b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8245 = VPACKSSWBrm
{ 8246, 3, 1, 0, 276, 0, 0x131b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8246 = VPACKSSWBrr
{ 8247, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x915b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8247 = VPACKUSDWYrm
{ 8248, 3, 1, 0, 276, 0, 0x915b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8248 = VPACKUSDWYrr
{ 8249, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200115e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8249 = VPACKUSDWZ128rm
{ 8250, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90115e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8250 = VPACKUSDWZ128rmb
{ 8251, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92115e0009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #8251 = VPACKUSDWZ128rmbk
{ 8252, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96115e0009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8252 = VPACKUSDWZ128rmbkz
{ 8253, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202115e0009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #8253 = VPACKUSDWZ128rmk
{ 8254, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206115e0009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8254 = VPACKUSDWZ128rmkz
{ 8255, 3, 1, 0, 0, 0, 0x200115e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8255 = VPACKUSDWZ128rr
{ 8256, 5, 1, 0, 0, 0, 0x202115e0009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #8256 = VPACKUSDWZ128rrk
{ 8257, 4, 1, 0, 0, 0, 0x206115e0009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #8257 = VPACKUSDWZ128rrkz
{ 8258, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400915e0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8258 = VPACKUSDWZ256rm
{ 8259, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90915e0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8259 = VPACKUSDWZ256rmb
{ 8260, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92915e0009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #8260 = VPACKUSDWZ256rmbk
{ 8261, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96915e0009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8261 = VPACKUSDWZ256rmbkz
{ 8262, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402915e0009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #8262 = VPACKUSDWZ256rmk
{ 8263, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406915e0009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8263 = VPACKUSDWZ256rmkz
{ 8264, 3, 1, 0, 0, 0, 0x400915e0009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8264 = VPACKUSDWZ256rr
{ 8265, 5, 1, 0, 0, 0, 0x402915e0009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #8265 = VPACKUSDWZ256rrk
{ 8266, 4, 1, 0, 0, 0, 0x406915e0009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #8266 = VPACKUSDWZ256rrkz
{ 8267, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808115e0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8267 = VPACKUSDWZrm
{ 8268, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98115e0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8268 = VPACKUSDWZrmb
{ 8269, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a115e0009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #8269 = VPACKUSDWZrmbk
{ 8270, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e115e0009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8270 = VPACKUSDWZrmbkz
{ 8271, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a115e0009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #8271 = VPACKUSDWZrmk
{ 8272, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e115e0009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8272 = VPACKUSDWZrmkz
{ 8273, 3, 1, 0, 0, 0, 0x808115e0009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8273 = VPACKUSDWZrr
{ 8274, 5, 1, 0, 0, 0, 0x80a115e0009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #8274 = VPACKUSDWZrrk
{ 8275, 4, 1, 0, 0, 0, 0x80e115e0009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #8275 = VPACKUSDWZrrkz
{ 8276, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x115b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8276 = VPACKUSDWrm
{ 8277, 3, 1, 0, 276, 0, 0x115b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8277 = VPACKUSDWrr
{ 8278, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x933b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8278 = VPACKUSWBYrm
{ 8279, 3, 1, 0, 276, 0, 0x933b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8279 = VPACKUSWBYrr
{ 8280, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b3f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8280 = VPACKUSWBZ128rm
{ 8281, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b3f8005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #8281 = VPACKUSWBZ128rmk
{ 8282, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b3f8005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #8282 = VPACKUSWBZ128rmkz
{ 8283, 3, 1, 0, 0, 0, 0x2001b3f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8283 = VPACKUSWBZ128rr
{ 8284, 5, 1, 0, 0, 0, 0x2021b3f8005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #8284 = VPACKUSWBZ128rrk
{ 8285, 4, 1, 0, 0, 0, 0x2061b3f8005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #8285 = VPACKUSWBZ128rrkz
{ 8286, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b3f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8286 = VPACKUSWBZ256rm
{ 8287, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b3f8005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #8287 = VPACKUSWBZ256rmk
{ 8288, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b3f8005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #8288 = VPACKUSWBZ256rmkz
{ 8289, 3, 1, 0, 0, 0, 0x4009b3f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8289 = VPACKUSWBZ256rr
{ 8290, 5, 1, 0, 0, 0, 0x4029b3f8005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #8290 = VPACKUSWBZ256rrk
{ 8291, 4, 1, 0, 0, 0, 0x4069b3f8005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #8291 = VPACKUSWBZ256rrkz
{ 8292, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b3f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8292 = VPACKUSWBZrm
{ 8293, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b3f8005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #8293 = VPACKUSWBZrmk
{ 8294, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b3f8005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #8294 = VPACKUSWBZrmkz
{ 8295, 3, 1, 0, 0, 0, 0x8081b3f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8295 = VPACKUSWBZrr
{ 8296, 5, 1, 0, 0, 0, 0x80a1b3f8005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #8296 = VPACKUSWBZrrk
{ 8297, 4, 1, 0, 0, 0, 0x80e1b3f8005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #8297 = VPACKUSWBZrrkz
{ 8298, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x133b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8298 = VPACKUSWBrm
{ 8299, 3, 1, 0, 276, 0, 0x133b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8299 = VPACKUSWBrr
{ 8300, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97e38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8300 = VPADDBYrm
{ 8301, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x97e38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8301 = VPADDBYrr
{ 8302, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017e78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8302 = VPADDBZ128rm
{ 8303, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217e78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #8303 = VPADDBZ128rmk
{ 8304, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617e78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #8304 = VPADDBZ128rmkz
{ 8305, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20017e78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8305 = VPADDBZ128rr
{ 8306, 5, 1, 0, 0, 0, 0x20217e78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #8306 = VPADDBZ128rrk
{ 8307, 4, 1, 0, 0, 0, 0x20617e78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #8307 = VPADDBZ128rrkz
{ 8308, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097e78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8308 = VPADDBZ256rm
{ 8309, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297e78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #8309 = VPADDBZ256rmk
{ 8310, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697e78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #8310 = VPADDBZ256rmkz
{ 8311, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40097e78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8311 = VPADDBZ256rr
{ 8312, 5, 1, 0, 0, 0, 0x40297e78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #8312 = VPADDBZ256rrk
{ 8313, 4, 1, 0, 0, 0, 0x40697e78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #8313 = VPADDBZ256rrkz
{ 8314, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817e78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8314 = VPADDBZrm
{ 8315, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17e78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #8315 = VPADDBZrmk
{ 8316, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17e78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #8316 = VPADDBZrmkz
{ 8317, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80817e78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8317 = VPADDBZrr
{ 8318, 5, 1, 0, 0, 0, 0x80a17e78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #8318 = VPADDBZrrk
{ 8319, 4, 1, 0, 0, 0, 0x80e17e78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #8319 = VPADDBZrrkz
{ 8320, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17e38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8320 = VPADDBrm
{ 8321, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x17e38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8321 = VPADDBrr
{ 8322, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97f38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8322 = VPADDDYrm
{ 8323, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x97f38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8323 = VPADDDYrr
{ 8324, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017f78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8324 = VPADDDZ128rm
{ 8325, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9017f78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8325 = VPADDDZ128rmb
{ 8326, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9217f78005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #8326 = VPADDDZ128rmbk
{ 8327, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9617f78005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8327 = VPADDDZ128rmbkz
{ 8328, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217f78005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #8328 = VPADDDZ128rmk
{ 8329, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617f78005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8329 = VPADDDZ128rmkz
{ 8330, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20017f78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8330 = VPADDDZ128rr
{ 8331, 5, 1, 0, 0, 0, 0x20217f78005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #8331 = VPADDDZ128rrk
{ 8332, 4, 1, 0, 0, 0, 0x20617f78005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #8332 = VPADDDZ128rrkz
{ 8333, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097f78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8333 = VPADDDZ256rm
{ 8334, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9097f78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8334 = VPADDDZ256rmb
{ 8335, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9297f78005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #8335 = VPADDDZ256rmbk
{ 8336, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9697f78005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8336 = VPADDDZ256rmbkz
{ 8337, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297f78005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #8337 = VPADDDZ256rmk
{ 8338, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697f78005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8338 = VPADDDZ256rmkz
{ 8339, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40097f78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8339 = VPADDDZ256rr
{ 8340, 5, 1, 0, 0, 0, 0x40297f78005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #8340 = VPADDDZ256rrk
{ 8341, 4, 1, 0, 0, 0, 0x40697f78005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #8341 = VPADDDZ256rrkz
{ 8342, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817f78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8342 = VPADDDZrm
{ 8343, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9817f78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8343 = VPADDDZrmb
{ 8344, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a17f78005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #8344 = VPADDDZrmbk
{ 8345, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e17f78005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8345 = VPADDDZrmbkz
{ 8346, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17f78005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #8346 = VPADDDZrmk
{ 8347, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17f78005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8347 = VPADDDZrmkz
{ 8348, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80817f78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8348 = VPADDDZrr
{ 8349, 5, 1, 0, 0, 0, 0x80a17f78005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #8349 = VPADDDZrrk
{ 8350, 4, 1, 0, 0, 0, 0x80e17f78005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #8350 = VPADDDZrrkz
{ 8351, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17f38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8351 = VPADDDrm
{ 8352, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x17f38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8352 = VPADDDrr
{ 8353, 7, 1, 0, 378, 0|(1ULL<<MCID::MayLoad), 0x96a38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8353 = VPADDQYrm
{ 8354, 3, 1, 0, 379, 0|(1ULL<<MCID::Commutable), 0x96a38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8354 = VPADDQYrr
{ 8355, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001ea78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8355 = VPADDQZ128rm
{ 8356, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101ea78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8356 = VPADDQZ128rmb
{ 8357, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121ea78005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #8357 = VPADDQZ128rmbk
{ 8358, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161ea78005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8358 = VPADDQZ128rmbkz
{ 8359, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021ea78005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #8359 = VPADDQZ128rmk
{ 8360, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061ea78005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8360 = VPADDQZ128rmkz
{ 8361, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2001ea78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8361 = VPADDQZ128rr
{ 8362, 5, 1, 0, 0, 0, 0x2021ea78005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #8362 = VPADDQZ128rrk
{ 8363, 4, 1, 0, 0, 0, 0x2061ea78005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #8363 = VPADDQZ128rrkz
{ 8364, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009ea78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8364 = VPADDQZ256rm
{ 8365, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109ea78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8365 = VPADDQZ256rmb
{ 8366, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129ea78005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #8366 = VPADDQZ256rmbk
{ 8367, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169ea78005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8367 = VPADDQZ256rmbkz
{ 8368, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029ea78005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #8368 = VPADDQZ256rmk
{ 8369, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069ea78005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8369 = VPADDQZ256rmkz
{ 8370, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x4009ea78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8370 = VPADDQZ256rr
{ 8371, 5, 1, 0, 0, 0, 0x4029ea78005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #8371 = VPADDQZ256rrk
{ 8372, 4, 1, 0, 0, 0, 0x4069ea78005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #8372 = VPADDQZ256rrkz
{ 8373, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081ea78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8373 = VPADDQZrm
{ 8374, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181ea78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8374 = VPADDQZrmb
{ 8375, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1ea78005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #8375 = VPADDQZrmbk
{ 8376, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1ea78005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8376 = VPADDQZrmbkz
{ 8377, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1ea78005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #8377 = VPADDQZrmk
{ 8378, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1ea78005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8378 = VPADDQZrmkz
{ 8379, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8081ea78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8379 = VPADDQZrr
{ 8380, 5, 1, 0, 0, 0, 0x80a1ea78005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #8380 = VPADDQZrrk
{ 8381, 4, 1, 0, 0, 0, 0x80e1ea78005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #8381 = VPADDQZrrkz
{ 8382, 7, 1, 0, 378, 0|(1ULL<<MCID::MayLoad), 0x16a38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8382 = VPADDQrm
{ 8383, 3, 1, 0, 379, 0|(1ULL<<MCID::Commutable), 0x16a38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8383 = VPADDQrr
{ 8384, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97638005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8384 = VPADDSBYrm
{ 8385, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x97638005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8385 = VPADDSBYrr
{ 8386, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017678005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8386 = VPADDSBZ128rm
{ 8387, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217678005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #8387 = VPADDSBZ128rmk
{ 8388, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617678005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #8388 = VPADDSBZ128rmkz
{ 8389, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20017678005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8389 = VPADDSBZ128rr
{ 8390, 5, 1, 0, 0, 0, 0x20217678005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #8390 = VPADDSBZ128rrk
{ 8391, 4, 1, 0, 0, 0, 0x20617678005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #8391 = VPADDSBZ128rrkz
{ 8392, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097678005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8392 = VPADDSBZ256rm
{ 8393, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297678005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #8393 = VPADDSBZ256rmk
{ 8394, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697678005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #8394 = VPADDSBZ256rmkz
{ 8395, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40097678005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8395 = VPADDSBZ256rr
{ 8396, 5, 1, 0, 0, 0, 0x40297678005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #8396 = VPADDSBZ256rrk
{ 8397, 4, 1, 0, 0, 0, 0x40697678005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #8397 = VPADDSBZ256rrkz
{ 8398, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817678005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8398 = VPADDSBZrm
{ 8399, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17678005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #8399 = VPADDSBZrmk
{ 8400, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17678005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #8400 = VPADDSBZrmkz
{ 8401, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80817678005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8401 = VPADDSBZrr
{ 8402, 5, 1, 0, 0, 0, 0x80a17678005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #8402 = VPADDSBZrrk
{ 8403, 4, 1, 0, 0, 0, 0x80e17678005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #8403 = VPADDSBZrrkz
{ 8404, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17638005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8404 = VPADDSBrm
{ 8405, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x17638005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8405 = VPADDSBrr
{ 8406, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x976b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8406 = VPADDSWYrm
{ 8407, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x976b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8407 = VPADDSWYrr
{ 8408, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200176f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8408 = VPADDSWZ128rm
{ 8409, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202176f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #8409 = VPADDSWZ128rmk
{ 8410, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206176f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8410 = VPADDSWZ128rmkz
{ 8411, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x200176f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8411 = VPADDSWZ128rr
{ 8412, 5, 1, 0, 0, 0, 0x202176f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #8412 = VPADDSWZ128rrk
{ 8413, 4, 1, 0, 0, 0, 0x206176f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #8413 = VPADDSWZ128rrkz
{ 8414, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400976f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8414 = VPADDSWZ256rm
{ 8415, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402976f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #8415 = VPADDSWZ256rmk
{ 8416, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406976f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8416 = VPADDSWZ256rmkz
{ 8417, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x400976f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8417 = VPADDSWZ256rr
{ 8418, 5, 1, 0, 0, 0, 0x402976f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #8418 = VPADDSWZ256rrk
{ 8419, 4, 1, 0, 0, 0, 0x406976f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #8419 = VPADDSWZ256rrkz
{ 8420, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808176f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8420 = VPADDSWZrm
{ 8421, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a176f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #8421 = VPADDSWZrmk
{ 8422, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e176f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8422 = VPADDSWZrmkz
{ 8423, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x808176f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8423 = VPADDSWZrr
{ 8424, 5, 1, 0, 0, 0, 0x80a176f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #8424 = VPADDSWZrrk
{ 8425, 4, 1, 0, 0, 0, 0x80e176f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #8425 = VPADDSWZrrkz
{ 8426, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x176b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8426 = VPADDSWrm
{ 8427, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x176b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8427 = VPADDSWrr
{ 8428, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x96e38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8428 = VPADDUSBYrm
{ 8429, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x96e38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8429 = VPADDUSBYrr
{ 8430, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016e78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8430 = VPADDUSBZ128rm
{ 8431, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216e78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #8431 = VPADDUSBZ128rmk
{ 8432, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616e78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #8432 = VPADDUSBZ128rmkz
{ 8433, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20016e78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8433 = VPADDUSBZ128rr
{ 8434, 5, 1, 0, 0, 0, 0x20216e78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #8434 = VPADDUSBZ128rrk
{ 8435, 4, 1, 0, 0, 0, 0x20616e78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #8435 = VPADDUSBZ128rrkz
{ 8436, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096e78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8436 = VPADDUSBZ256rm
{ 8437, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296e78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #8437 = VPADDUSBZ256rmk
{ 8438, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696e78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #8438 = VPADDUSBZ256rmkz
{ 8439, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40096e78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8439 = VPADDUSBZ256rr
{ 8440, 5, 1, 0, 0, 0, 0x40296e78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #8440 = VPADDUSBZ256rrk
{ 8441, 4, 1, 0, 0, 0, 0x40696e78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #8441 = VPADDUSBZ256rrkz
{ 8442, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816e78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8442 = VPADDUSBZrm
{ 8443, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16e78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #8443 = VPADDUSBZrmk
{ 8444, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16e78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #8444 = VPADDUSBZrmkz
{ 8445, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80816e78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8445 = VPADDUSBZrr
{ 8446, 5, 1, 0, 0, 0, 0x80a16e78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #8446 = VPADDUSBZrrk
{ 8447, 4, 1, 0, 0, 0, 0x80e16e78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #8447 = VPADDUSBZrrkz
{ 8448, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x16e38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8448 = VPADDUSBrm
{ 8449, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x16e38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8449 = VPADDUSBrr
{ 8450, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x96eb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8450 = VPADDUSWYrm
{ 8451, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x96eb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8451 = VPADDUSWYrr
{ 8452, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016ef8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8452 = VPADDUSWZ128rm
{ 8453, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216ef8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #8453 = VPADDUSWZ128rmk
{ 8454, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616ef8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8454 = VPADDUSWZ128rmkz
{ 8455, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20016ef8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8455 = VPADDUSWZ128rr
{ 8456, 5, 1, 0, 0, 0, 0x20216ef8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #8456 = VPADDUSWZ128rrk
{ 8457, 4, 1, 0, 0, 0, 0x20616ef8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #8457 = VPADDUSWZ128rrkz
{ 8458, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096ef8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8458 = VPADDUSWZ256rm
{ 8459, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296ef8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #8459 = VPADDUSWZ256rmk
{ 8460, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696ef8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8460 = VPADDUSWZ256rmkz
{ 8461, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40096ef8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8461 = VPADDUSWZ256rr
{ 8462, 5, 1, 0, 0, 0, 0x40296ef8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #8462 = VPADDUSWZ256rrk
{ 8463, 4, 1, 0, 0, 0, 0x40696ef8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #8463 = VPADDUSWZ256rrkz
{ 8464, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816ef8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8464 = VPADDUSWZrm
{ 8465, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16ef8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #8465 = VPADDUSWZrmk
{ 8466, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16ef8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8466 = VPADDUSWZrmkz
{ 8467, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80816ef8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8467 = VPADDUSWZrr
{ 8468, 5, 1, 0, 0, 0, 0x80a16ef8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #8468 = VPADDUSWZrrk
{ 8469, 4, 1, 0, 0, 0, 0x80e16ef8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #8469 = VPADDUSWZrrkz
{ 8470, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x16eb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8470 = VPADDUSWrm
{ 8471, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x16eb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8471 = VPADDUSWrr
{ 8472, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97eb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8472 = VPADDWYrm
{ 8473, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x97eb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8473 = VPADDWYrr
{ 8474, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017ef8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8474 = VPADDWZ128rm
{ 8475, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217ef8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #8475 = VPADDWZ128rmk
{ 8476, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617ef8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8476 = VPADDWZ128rmkz
{ 8477, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20017ef8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8477 = VPADDWZ128rr
{ 8478, 5, 1, 0, 0, 0, 0x20217ef8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #8478 = VPADDWZ128rrk
{ 8479, 4, 1, 0, 0, 0, 0x20617ef8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #8479 = VPADDWZ128rrkz
{ 8480, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097ef8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8480 = VPADDWZ256rm
{ 8481, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297ef8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #8481 = VPADDWZ256rmk
{ 8482, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697ef8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8482 = VPADDWZ256rmkz
{ 8483, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40097ef8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8483 = VPADDWZ256rr
{ 8484, 5, 1, 0, 0, 0, 0x40297ef8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #8484 = VPADDWZ256rrk
{ 8485, 4, 1, 0, 0, 0, 0x40697ef8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #8485 = VPADDWZ256rrkz
{ 8486, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817ef8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8486 = VPADDWZrm
{ 8487, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17ef8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #8487 = VPADDWZrmk
{ 8488, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17ef8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8488 = VPADDWZrmkz
{ 8489, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80817ef8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8489 = VPADDWZrr
{ 8490, 5, 1, 0, 0, 0, 0x80a17ef8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #8490 = VPADDWZrrk
{ 8491, 4, 1, 0, 0, 0, 0x80e17ef8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #8491 = VPADDWZrrkz
{ 8492, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17eb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8492 = VPADDWrm
{ 8493, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x17eb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8493 = VPADDWrr
{ 8494, 8, 1, 0, 380, 0|(1ULL<<MCID::MayLoad), 0x107b804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #8494 = VPALIGNR128rm
{ 8495, 4, 1, 0, 381, 0, 0x107b804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #8495 = VPALIGNR128rr
{ 8496, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x907b804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8496 = VPALIGNR256rm
{ 8497, 4, 1, 0, 276, 0, 0x907b804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #8497 = VPALIGNR256rr
{ 8498, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200107f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #8498 = VPALIGNZ128rmi
{ 8499, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202107f804d006ULL, nullptr, nullptr, OperandInfo726, -1 ,nullptr }, // Inst #8499 = VPALIGNZ128rmik
{ 8500, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206107f804d006ULL, nullptr, nullptr, OperandInfo727, -1 ,nullptr }, // Inst #8500 = VPALIGNZ128rmikz
{ 8501, 4, 1, 0, 0, 0, 0x200107f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #8501 = VPALIGNZ128rri
{ 8502, 6, 1, 0, 0, 0, 0x202107f804d005ULL, nullptr, nullptr, OperandInfo728, -1 ,nullptr }, // Inst #8502 = VPALIGNZ128rrik
{ 8503, 5, 1, 0, 0, 0, 0x206107f804d005ULL, nullptr, nullptr, OperandInfo729, -1 ,nullptr }, // Inst #8503 = VPALIGNZ128rrikz
{ 8504, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400907f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #8504 = VPALIGNZ256rmi
{ 8505, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402907f804d006ULL, nullptr, nullptr, OperandInfo730, -1 ,nullptr }, // Inst #8505 = VPALIGNZ256rmik
{ 8506, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406907f804d006ULL, nullptr, nullptr, OperandInfo731, -1 ,nullptr }, // Inst #8506 = VPALIGNZ256rmikz
{ 8507, 4, 1, 0, 0, 0, 0x400907f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #8507 = VPALIGNZ256rri
{ 8508, 6, 1, 0, 0, 0, 0x402907f804d005ULL, nullptr, nullptr, OperandInfo732, -1 ,nullptr }, // Inst #8508 = VPALIGNZ256rrik
{ 8509, 5, 1, 0, 0, 0, 0x406907f804d005ULL, nullptr, nullptr, OperandInfo733, -1 ,nullptr }, // Inst #8509 = VPALIGNZ256rrikz
{ 8510, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808107f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #8510 = VPALIGNZrmi
{ 8511, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a107f804d006ULL, nullptr, nullptr, OperandInfo734, -1 ,nullptr }, // Inst #8511 = VPALIGNZrmik
{ 8512, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e107f804d006ULL, nullptr, nullptr, OperandInfo735, -1 ,nullptr }, // Inst #8512 = VPALIGNZrmikz
{ 8513, 4, 1, 0, 0, 0, 0x808107f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #8513 = VPALIGNZrri
{ 8514, 6, 1, 0, 0, 0, 0x80a107f804d005ULL, nullptr, nullptr, OperandInfo736, -1 ,nullptr }, // Inst #8514 = VPALIGNZrrik
{ 8515, 5, 1, 0, 0, 0, 0x80e107f804d005ULL, nullptr, nullptr, OperandInfo737, -1 ,nullptr }, // Inst #8515 = VPALIGNZrrikz
{ 8516, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016df8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8516 = VPANDDZ128rm
{ 8517, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9016df8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8517 = VPANDDZ128rmb
{ 8518, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9216df8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #8518 = VPANDDZ128rmbk
{ 8519, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9616df8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8519 = VPANDDZ128rmbkz
{ 8520, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216df8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #8520 = VPANDDZ128rmk
{ 8521, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616df8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8521 = VPANDDZ128rmkz
{ 8522, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20016df8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8522 = VPANDDZ128rr
{ 8523, 5, 1, 0, 0, 0, 0x20216df8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #8523 = VPANDDZ128rrk
{ 8524, 4, 1, 0, 0, 0, 0x20616df8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #8524 = VPANDDZ128rrkz
{ 8525, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096df8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8525 = VPANDDZ256rm
{ 8526, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9096df8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8526 = VPANDDZ256rmb
{ 8527, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9296df8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #8527 = VPANDDZ256rmbk
{ 8528, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9696df8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8528 = VPANDDZ256rmbkz
{ 8529, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296df8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #8529 = VPANDDZ256rmk
{ 8530, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696df8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8530 = VPANDDZ256rmkz
{ 8531, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40096df8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8531 = VPANDDZ256rr
{ 8532, 5, 1, 0, 0, 0, 0x40296df8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #8532 = VPANDDZ256rrk
{ 8533, 4, 1, 0, 0, 0, 0x40696df8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #8533 = VPANDDZ256rrkz
{ 8534, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816df8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8534 = VPANDDZrm
{ 8535, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9816df8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8535 = VPANDDZrmb
{ 8536, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a16df8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #8536 = VPANDDZrmbk
{ 8537, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e16df8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8537 = VPANDDZrmbkz
{ 8538, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16df8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #8538 = VPANDDZrmk
{ 8539, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16df8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8539 = VPANDDZrmkz
{ 8540, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80816df8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8540 = VPANDDZrr
{ 8541, 5, 1, 0, 0, 0, 0x80a16df8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #8541 = VPANDDZrrk
{ 8542, 4, 1, 0, 0, 0, 0x80e16df8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #8542 = VPANDDZrrkz
{ 8543, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016ff8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8543 = VPANDNDZ128rm
{ 8544, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9016ff8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8544 = VPANDNDZ128rmb
{ 8545, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9216ff8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #8545 = VPANDNDZ128rmbk
{ 8546, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9616ff8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8546 = VPANDNDZ128rmbkz
{ 8547, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216ff8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #8547 = VPANDNDZ128rmk
{ 8548, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616ff8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8548 = VPANDNDZ128rmkz
{ 8549, 3, 1, 0, 0, 0, 0x20016ff8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8549 = VPANDNDZ128rr
{ 8550, 5, 1, 0, 0, 0, 0x20216ff8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #8550 = VPANDNDZ128rrk
{ 8551, 4, 1, 0, 0, 0, 0x20616ff8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #8551 = VPANDNDZ128rrkz
{ 8552, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096ff8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8552 = VPANDNDZ256rm
{ 8553, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9096ff8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8553 = VPANDNDZ256rmb
{ 8554, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9296ff8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #8554 = VPANDNDZ256rmbk
{ 8555, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9696ff8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8555 = VPANDNDZ256rmbkz
{ 8556, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296ff8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #8556 = VPANDNDZ256rmk
{ 8557, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696ff8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8557 = VPANDNDZ256rmkz
{ 8558, 3, 1, 0, 0, 0, 0x40096ff8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8558 = VPANDNDZ256rr
{ 8559, 5, 1, 0, 0, 0, 0x40296ff8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #8559 = VPANDNDZ256rrk
{ 8560, 4, 1, 0, 0, 0, 0x40696ff8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #8560 = VPANDNDZ256rrkz
{ 8561, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816ff8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8561 = VPANDNDZrm
{ 8562, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9816ff8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8562 = VPANDNDZrmb
{ 8563, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a16ff8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #8563 = VPANDNDZrmbk
{ 8564, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e16ff8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8564 = VPANDNDZrmbkz
{ 8565, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16ff8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #8565 = VPANDNDZrmk
{ 8566, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16ff8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8566 = VPANDNDZrmkz
{ 8567, 3, 1, 0, 0, 0, 0x80816ff8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8567 = VPANDNDZrr
{ 8568, 5, 1, 0, 0, 0, 0x80a16ff8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #8568 = VPANDNDZrrk
{ 8569, 4, 1, 0, 0, 0, 0x80e16ff8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #8569 = VPANDNDZrrkz
{ 8570, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001eff8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8570 = VPANDNQZ128rm
{ 8571, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101eff8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8571 = VPANDNQZ128rmb
{ 8572, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121eff8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #8572 = VPANDNQZ128rmbk
{ 8573, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161eff8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8573 = VPANDNQZ128rmbkz
{ 8574, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021eff8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #8574 = VPANDNQZ128rmk
{ 8575, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061eff8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8575 = VPANDNQZ128rmkz
{ 8576, 3, 1, 0, 0, 0, 0x2001eff8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8576 = VPANDNQZ128rr
{ 8577, 5, 1, 0, 0, 0, 0x2021eff8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #8577 = VPANDNQZ128rrk
{ 8578, 4, 1, 0, 0, 0, 0x2061eff8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #8578 = VPANDNQZ128rrkz
{ 8579, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009eff8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8579 = VPANDNQZ256rm
{ 8580, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109eff8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8580 = VPANDNQZ256rmb
{ 8581, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129eff8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #8581 = VPANDNQZ256rmbk
{ 8582, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169eff8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8582 = VPANDNQZ256rmbkz
{ 8583, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029eff8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #8583 = VPANDNQZ256rmk
{ 8584, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069eff8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8584 = VPANDNQZ256rmkz
{ 8585, 3, 1, 0, 0, 0, 0x4009eff8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8585 = VPANDNQZ256rr
{ 8586, 5, 1, 0, 0, 0, 0x4029eff8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #8586 = VPANDNQZ256rrk
{ 8587, 4, 1, 0, 0, 0, 0x4069eff8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #8587 = VPANDNQZ256rrkz
{ 8588, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081eff8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8588 = VPANDNQZrm
{ 8589, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181eff8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8589 = VPANDNQZrmb
{ 8590, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1eff8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #8590 = VPANDNQZrmbk
{ 8591, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1eff8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8591 = VPANDNQZrmbkz
{ 8592, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1eff8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #8592 = VPANDNQZrmk
{ 8593, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1eff8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8593 = VPANDNQZrmkz
{ 8594, 3, 1, 0, 0, 0, 0x8081eff8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8594 = VPANDNQZrr
{ 8595, 5, 1, 0, 0, 0, 0x80a1eff8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #8595 = VPANDNQZrrk
{ 8596, 4, 1, 0, 0, 0, 0x80e1eff8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #8596 = VPANDNQZrrkz
{ 8597, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x96fb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8597 = VPANDNYrm
{ 8598, 3, 1, 0, 383, 0, 0x96fb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8598 = VPANDNYrr
{ 8599, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x16fb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8599 = VPANDNrm
{ 8600, 3, 1, 0, 383, 0, 0x16fb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8600 = VPANDNrr
{ 8601, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001edf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8601 = VPANDQZ128rm
{ 8602, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101edf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8602 = VPANDQZ128rmb
{ 8603, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121edf8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #8603 = VPANDQZ128rmbk
{ 8604, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161edf8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8604 = VPANDQZ128rmbkz
{ 8605, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021edf8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #8605 = VPANDQZ128rmk
{ 8606, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061edf8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8606 = VPANDQZ128rmkz
{ 8607, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2001edf8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8607 = VPANDQZ128rr
{ 8608, 5, 1, 0, 0, 0, 0x2021edf8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #8608 = VPANDQZ128rrk
{ 8609, 4, 1, 0, 0, 0, 0x2061edf8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #8609 = VPANDQZ128rrkz
{ 8610, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009edf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8610 = VPANDQZ256rm
{ 8611, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109edf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8611 = VPANDQZ256rmb
{ 8612, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129edf8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #8612 = VPANDQZ256rmbk
{ 8613, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169edf8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8613 = VPANDQZ256rmbkz
{ 8614, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029edf8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #8614 = VPANDQZ256rmk
{ 8615, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069edf8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8615 = VPANDQZ256rmkz
{ 8616, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x4009edf8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8616 = VPANDQZ256rr
{ 8617, 5, 1, 0, 0, 0, 0x4029edf8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #8617 = VPANDQZ256rrk
{ 8618, 4, 1, 0, 0, 0, 0x4069edf8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #8618 = VPANDQZ256rrkz
{ 8619, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081edf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8619 = VPANDQZrm
{ 8620, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181edf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8620 = VPANDQZrmb
{ 8621, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1edf8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #8621 = VPANDQZrmbk
{ 8622, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1edf8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8622 = VPANDQZrmbkz
{ 8623, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1edf8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #8623 = VPANDQZrmk
{ 8624, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1edf8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8624 = VPANDQZrmkz
{ 8625, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8081edf8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8625 = VPANDQZrr
{ 8626, 5, 1, 0, 0, 0, 0x80a1edf8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #8626 = VPANDQZrrk
{ 8627, 4, 1, 0, 0, 0, 0x80e1edf8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #8627 = VPANDQZrrkz
{ 8628, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x96db8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8628 = VPANDYrm
{ 8629, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x96db8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8629 = VPANDYrr
{ 8630, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x16db8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8630 = VPANDrm
{ 8631, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x16db8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8631 = VPANDrr
{ 8632, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97038005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8632 = VPAVGBYrm
{ 8633, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x97038005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8633 = VPAVGBYrr
{ 8634, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017078005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8634 = VPAVGBZ128rm
{ 8635, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217078005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #8635 = VPAVGBZ128rmk
{ 8636, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617078005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #8636 = VPAVGBZ128rmkz
{ 8637, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20017078005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8637 = VPAVGBZ128rr
{ 8638, 5, 1, 0, 0, 0, 0x20217078005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #8638 = VPAVGBZ128rrk
{ 8639, 4, 1, 0, 0, 0, 0x20617078005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #8639 = VPAVGBZ128rrkz
{ 8640, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097078005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8640 = VPAVGBZ256rm
{ 8641, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297078005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #8641 = VPAVGBZ256rmk
{ 8642, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697078005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #8642 = VPAVGBZ256rmkz
{ 8643, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40097078005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8643 = VPAVGBZ256rr
{ 8644, 5, 1, 0, 0, 0, 0x40297078005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #8644 = VPAVGBZ256rrk
{ 8645, 4, 1, 0, 0, 0, 0x40697078005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #8645 = VPAVGBZ256rrkz
{ 8646, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817078005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8646 = VPAVGBZrm
{ 8647, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17078005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #8647 = VPAVGBZrmk
{ 8648, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17078005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #8648 = VPAVGBZrmkz
{ 8649, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80817078005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8649 = VPAVGBZrr
{ 8650, 5, 1, 0, 0, 0, 0x80a17078005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #8650 = VPAVGBZrrk
{ 8651, 4, 1, 0, 0, 0, 0x80e17078005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #8651 = VPAVGBZrrkz
{ 8652, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17038005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8652 = VPAVGBrm
{ 8653, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x17038005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8653 = VPAVGBrr
{ 8654, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x971b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #8654 = VPAVGWYrm
{ 8655, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x971b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #8655 = VPAVGWYrr
{ 8656, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200171f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8656 = VPAVGWZ128rm
{ 8657, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202171f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #8657 = VPAVGWZ128rmk
{ 8658, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206171f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8658 = VPAVGWZ128rmkz
{ 8659, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x200171f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8659 = VPAVGWZ128rr
{ 8660, 5, 1, 0, 0, 0, 0x202171f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #8660 = VPAVGWZ128rrk
{ 8661, 4, 1, 0, 0, 0, 0x206171f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #8661 = VPAVGWZ128rrkz
{ 8662, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400971f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8662 = VPAVGWZ256rm
{ 8663, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402971f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #8663 = VPAVGWZ256rmk
{ 8664, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406971f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8664 = VPAVGWZ256rmkz
{ 8665, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x400971f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8665 = VPAVGWZ256rr
{ 8666, 5, 1, 0, 0, 0, 0x402971f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #8666 = VPAVGWZ256rrk
{ 8667, 4, 1, 0, 0, 0, 0x406971f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #8667 = VPAVGWZ256rrkz
{ 8668, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808171f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8668 = VPAVGWZrm
{ 8669, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a171f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #8669 = VPAVGWZrmk
{ 8670, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e171f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8670 = VPAVGWZrmkz
{ 8671, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x808171f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8671 = VPAVGWZrr
{ 8672, 5, 1, 0, 0, 0, 0x80a171f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #8672 = VPAVGWZrrk
{ 8673, 4, 1, 0, 0, 0, 0x80e171f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #8673 = VPAVGWZrrkz
{ 8674, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x171b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #8674 = VPAVGWrm
{ 8675, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x171b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #8675 = VPAVGWrr
{ 8676, 8, 1, 0, 798, 0|(1ULL<<MCID::MayLoad), 0x9013804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8676 = VPBLENDDYrmi
{ 8677, 4, 1, 0, 797, 0|(1ULL<<MCID::Commutable), 0x9013804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #8677 = VPBLENDDYrri
{ 8678, 8, 1, 0, 798, 0|(1ULL<<MCID::MayLoad), 0x1013804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #8678 = VPBLENDDrmi
{ 8679, 4, 1, 0, 797, 0|(1ULL<<MCID::Commutable), 0x1013804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #8679 = VPBLENDDrri
{ 8680, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20013378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8680 = VPBLENDMBZ128rm
{ 8681, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213378009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #8681 = VPBLENDMBZ128rmk
{ 8682, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20613378009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #8682 = VPBLENDMBZ128rmkz
{ 8683, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20013378009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8683 = VPBLENDMBZ128rr
{ 8684, 4, 1, 0, 0, 0, 0x20213378009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #8684 = VPBLENDMBZ128rrk
{ 8685, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20613378009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #8685 = VPBLENDMBZ128rrkz
{ 8686, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40093378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8686 = VPBLENDMBZ256rm
{ 8687, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293378009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #8687 = VPBLENDMBZ256rmk
{ 8688, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40693378009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #8688 = VPBLENDMBZ256rmkz
{ 8689, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40093378009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8689 = VPBLENDMBZ256rr
{ 8690, 4, 1, 0, 0, 0, 0x40293378009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #8690 = VPBLENDMBZ256rrk
{ 8691, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40693378009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #8691 = VPBLENDMBZ256rrkz
{ 8692, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80813378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8692 = VPBLENDMBZrm
{ 8693, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13378009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #8693 = VPBLENDMBZrmk
{ 8694, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e13378009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #8694 = VPBLENDMBZrmkz
{ 8695, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80813378009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8695 = VPBLENDMBZrr
{ 8696, 4, 1, 0, 0, 0, 0x80a13378009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #8696 = VPBLENDMBZrrk
{ 8697, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e13378009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #8697 = VPBLENDMBZrrkz
{ 8698, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20013278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8698 = VPBLENDMDZ128rm
{ 8699, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9013278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8699 = VPBLENDMDZ128rmb
{ 8700, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213278009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8700 = VPBLENDMDZ128rmbk
{ 8701, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213278009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8701 = VPBLENDMDZ128rmk
{ 8702, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x20613278009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #8702 = VPBLENDMDZ128rmkz
{ 8703, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20013278009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8703 = VPBLENDMDZ128rr
{ 8704, 4, 1, 0, 0, 0, 0x20213278009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #8704 = VPBLENDMDZ128rrk
{ 8705, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20613278009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #8705 = VPBLENDMDZ128rrkz
{ 8706, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40093278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8706 = VPBLENDMDZ256rm
{ 8707, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9093278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8707 = VPBLENDMDZ256rmb
{ 8708, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293278009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8708 = VPBLENDMDZ256rmbk
{ 8709, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293278009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8709 = VPBLENDMDZ256rmk
{ 8710, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x40693278009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #8710 = VPBLENDMDZ256rmkz
{ 8711, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40093278009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8711 = VPBLENDMDZ256rr
{ 8712, 4, 1, 0, 0, 0, 0x40293278009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #8712 = VPBLENDMDZ256rrk
{ 8713, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40693278009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #8713 = VPBLENDMDZ256rrkz
{ 8714, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80813278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8714 = VPBLENDMDZrm
{ 8715, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x9813278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8715 = VPBLENDMDZrmb
{ 8716, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13278009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8716 = VPBLENDMDZrmbk
{ 8717, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13278009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8717 = VPBLENDMDZrmk
{ 8718, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e13278009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #8718 = VPBLENDMDZrmkz
{ 8719, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80813278009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8719 = VPBLENDMDZrr
{ 8720, 4, 1, 0, 0, 0, 0x80a13278009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #8720 = VPBLENDMDZrrk
{ 8721, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e13278009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #8721 = VPBLENDMDZrrkz
{ 8722, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8722 = VPBLENDMQZ128rm
{ 8723, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1101b278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8723 = VPBLENDMQZ128rmb
{ 8724, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b278009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8724 = VPBLENDMQZ128rmbk
{ 8725, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b278009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8725 = VPBLENDMQZ128rmk
{ 8726, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b278009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #8726 = VPBLENDMQZ128rmkz
{ 8727, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b278009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8727 = VPBLENDMQZ128rr
{ 8728, 4, 1, 0, 0, 0, 0x2021b278009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #8728 = VPBLENDMQZ128rrk
{ 8729, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b278009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #8729 = VPBLENDMQZ128rrkz
{ 8730, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8730 = VPBLENDMQZ256rm
{ 8731, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1109b278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8731 = VPBLENDMQZ256rmb
{ 8732, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b278009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8732 = VPBLENDMQZ256rmbk
{ 8733, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b278009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8733 = VPBLENDMQZ256rmk
{ 8734, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b278009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #8734 = VPBLENDMQZ256rmkz
{ 8735, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b278009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8735 = VPBLENDMQZ256rr
{ 8736, 4, 1, 0, 0, 0, 0x4029b278009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #8736 = VPBLENDMQZ256rrk
{ 8737, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b278009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #8737 = VPBLENDMQZ256rrkz
{ 8738, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8738 = VPBLENDMQZrm
{ 8739, 7, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1181b278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8739 = VPBLENDMQZrmb
{ 8740, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b278009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8740 = VPBLENDMQZrmbk
{ 8741, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b278009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8741 = VPBLENDMQZrmk
{ 8742, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b278009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #8742 = VPBLENDMQZrmkz
{ 8743, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b278009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8743 = VPBLENDMQZrr
{ 8744, 4, 1, 0, 0, 0, 0x80a1b278009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #8744 = VPBLENDMQZrrk
{ 8745, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b278009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #8745 = VPBLENDMQZrrkz
{ 8746, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #8746 = VPBLENDMWZ128rm
{ 8747, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b378009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8747 = VPBLENDMWZ128rmk
{ 8748, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b378009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #8748 = VPBLENDMWZ128rmkz
{ 8749, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2001b378009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #8749 = VPBLENDMWZ128rr
{ 8750, 4, 1, 0, 0, 0, 0x2021b378009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #8750 = VPBLENDMWZ128rrk
{ 8751, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2061b378009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #8751 = VPBLENDMWZ128rrkz
{ 8752, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #8752 = VPBLENDMWZ256rm
{ 8753, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b378009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8753 = VPBLENDMWZ256rmk
{ 8754, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b378009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #8754 = VPBLENDMWZ256rmkz
{ 8755, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4009b378009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #8755 = VPBLENDMWZ256rr
{ 8756, 4, 1, 0, 0, 0, 0x4029b378009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #8756 = VPBLENDMWZ256rrk
{ 8757, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4069b378009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #8757 = VPBLENDMWZ256rrkz
{ 8758, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #8758 = VPBLENDMWZrm
{ 8759, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b378009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8759 = VPBLENDMWZrmk
{ 8760, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b378009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #8760 = VPBLENDMWZrmkz
{ 8761, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8081b378009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #8761 = VPBLENDMWZrr
{ 8762, 4, 1, 0, 0, 0, 0x80a1b378009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #8762 = VPBLENDMWZrrk
{ 8763, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e1b378009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #8763 = VPBLENDMWZrrkz
{ 8764, 8, 1, 0, 562, 0|(1ULL<<MCID::MayLoad), 0xd263804d006ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #8764 = VPBLENDVBYrm
{ 8765, 4, 1, 0, 563, 0, 0xd263804d005ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #8765 = VPBLENDVBYrr
{ 8766, 8, 1, 0, 562, 0|(1ULL<<MCID::MayLoad), 0x5263804d006ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #8766 = VPBLENDVBrm
{ 8767, 4, 1, 0, 563, 0, 0x5263804d005ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #8767 = VPBLENDVBrr
{ 8768, 8, 1, 0, 796, 0|(1ULL<<MCID::MayLoad), 0x9073804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #8768 = VPBLENDWYrmi
{ 8769, 4, 1, 0, 794, 0|(1ULL<<MCID::Commutable), 0x9073804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #8769 = VPBLENDWYrri
{ 8770, 8, 1, 0, 796, 0|(1ULL<<MCID::MayLoad), 0x1073804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #8770 = VPBLENDWrmi
{ 8771, 4, 1, 0, 794, 0|(1ULL<<MCID::Commutable), 0x1073804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #8771 = VPBLENDWrri
{ 8772, 6, 1, 0, 810, 0|(1ULL<<MCID::MayLoad), 0x83c38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #8772 = VPBROADCASTBYrm
{ 8773, 2, 1, 0, 544, 0, 0x83c38009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #8773 = VPBROADCASTBYrr
{ 8774, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2003c60009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8774 = VPBROADCASTBZ128m
{ 8775, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2203c60009006ULL, nullptr, nullptr, OperandInfo677, -1 ,nullptr }, // Inst #8775 = VPBROADCASTBZ128mk
{ 8776, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2603c60009006ULL, nullptr, nullptr, OperandInfo678, -1 ,nullptr }, // Inst #8776 = VPBROADCASTBZ128mkz
{ 8777, 2, 1, 0, 0, 0, 0x20003c60009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8777 = VPBROADCASTBZ128r
{ 8778, 4, 1, 0, 0, 0, 0x20203c60009005ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #8778 = VPBROADCASTBZ128rk
{ 8779, 3, 1, 0, 0, 0, 0x20603c60009005ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #8779 = VPBROADCASTBZ128rkz
{ 8780, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2083c60009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8780 = VPBROADCASTBZ256m
{ 8781, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2283c60009006ULL, nullptr, nullptr, OperandInfo682, -1 ,nullptr }, // Inst #8781 = VPBROADCASTBZ256mk
{ 8782, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2683c60009006ULL, nullptr, nullptr, OperandInfo683, -1 ,nullptr }, // Inst #8782 = VPBROADCASTBZ256mkz
{ 8783, 2, 1, 0, 0, 0, 0x40083c60009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #8783 = VPBROADCASTBZ256r
{ 8784, 4, 1, 0, 0, 0, 0x40283c60009005ULL, nullptr, nullptr, OperandInfo738, -1 ,nullptr }, // Inst #8784 = VPBROADCASTBZ256rk
{ 8785, 3, 1, 0, 0, 0, 0x40683c60009005ULL, nullptr, nullptr, OperandInfo739, -1 ,nullptr }, // Inst #8785 = VPBROADCASTBZ256rkz
{ 8786, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2803c60009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8786 = VPBROADCASTBZm
{ 8787, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2a03c60009006ULL, nullptr, nullptr, OperandInfo687, -1 ,nullptr }, // Inst #8787 = VPBROADCASTBZmk
{ 8788, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2e03c60009006ULL, nullptr, nullptr, OperandInfo688, -1 ,nullptr }, // Inst #8788 = VPBROADCASTBZmkz
{ 8789, 2, 1, 0, 0, 0, 0x80803c60009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #8789 = VPBROADCASTBZr
{ 8790, 4, 1, 0, 0, 0, 0x80a03c60009005ULL, nullptr, nullptr, OperandInfo740, -1 ,nullptr }, // Inst #8790 = VPBROADCASTBZrk
{ 8791, 3, 1, 0, 0, 0, 0x80e03c60009005ULL, nullptr, nullptr, OperandInfo741, -1 ,nullptr }, // Inst #8791 = VPBROADCASTBZrkz
{ 8792, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003d60009005ULL, nullptr, nullptr, OperandInfo659, -1 ,nullptr }, // Inst #8792 = VPBROADCASTBrZ128r
{ 8793, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203d60009005ULL, nullptr, nullptr, OperandInfo742, -1 ,nullptr }, // Inst #8793 = VPBROADCASTBrZ128rk
{ 8794, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603d60009005ULL, nullptr, nullptr, OperandInfo743, -1 ,nullptr }, // Inst #8794 = VPBROADCASTBrZ128rkz
{ 8795, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083d60009005ULL, nullptr, nullptr, OperandInfo744, -1 ,nullptr }, // Inst #8795 = VPBROADCASTBrZ256r
{ 8796, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283d60009005ULL, nullptr, nullptr, OperandInfo745, -1 ,nullptr }, // Inst #8796 = VPBROADCASTBrZ256rk
{ 8797, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683d60009005ULL, nullptr, nullptr, OperandInfo746, -1 ,nullptr }, // Inst #8797 = VPBROADCASTBrZ256rkz
{ 8798, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803d60009005ULL, nullptr, nullptr, OperandInfo747, -1 ,nullptr }, // Inst #8798 = VPBROADCASTBrZr
{ 8799, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03d60009005ULL, nullptr, nullptr, OperandInfo748, -1 ,nullptr }, // Inst #8799 = VPBROADCASTBrZrk
{ 8800, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03d60009005ULL, nullptr, nullptr, OperandInfo749, -1 ,nullptr }, // Inst #8800 = VPBROADCASTBrZrkz
{ 8801, 6, 1, 0, 809, 0|(1ULL<<MCID::MayLoad), 0x3c38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #8801 = VPBROADCASTBrm
{ 8802, 2, 1, 0, 276, 0, 0x3c38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #8802 = VPBROADCASTBrr
{ 8803, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x82c38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #8803 = VPBROADCASTDYrm
{ 8804, 2, 1, 0, 544, 0, 0x82c38009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #8804 = VPBROADCASTDYrr
{ 8805, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8002c60009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8805 = VPBROADCASTDZ128m
{ 8806, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8202c60009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #8806 = VPBROADCASTDZ128mk
{ 8807, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8602c60009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #8807 = VPBROADCASTDZ128mkz
{ 8808, 2, 1, 0, 0, 0, 0x20002c60009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8808 = VPBROADCASTDZ128r
{ 8809, 4, 1, 0, 0, 0, 0x20202c60009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #8809 = VPBROADCASTDZ128rk
{ 8810, 3, 1, 0, 0, 0, 0x20602c60009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #8810 = VPBROADCASTDZ128rkz
{ 8811, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8082c60009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8811 = VPBROADCASTDZ256m
{ 8812, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8282c60009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #8812 = VPBROADCASTDZ256mk
{ 8813, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8682c60009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #8813 = VPBROADCASTDZ256mkz
{ 8814, 2, 1, 0, 0, 0, 0x40082c60009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #8814 = VPBROADCASTDZ256r
{ 8815, 4, 1, 0, 0, 0, 0x40282c60009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #8815 = VPBROADCASTDZ256rk
{ 8816, 3, 1, 0, 0, 0, 0x40682c60009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #8816 = VPBROADCASTDZ256rkz
{ 8817, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8802c60009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8817 = VPBROADCASTDZm
{ 8818, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8a02c60009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #8818 = VPBROADCASTDZmk
{ 8819, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8e02c60009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #8819 = VPBROADCASTDZmkz
{ 8820, 2, 1, 0, 0, 0, 0x80802c60009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #8820 = VPBROADCASTDZr
{ 8821, 4, 1, 0, 0, 0, 0x80a02c60009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr }, // Inst #8821 = VPBROADCASTDZrk
{ 8822, 3, 1, 0, 0, 0, 0x80e02c60009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr }, // Inst #8822 = VPBROADCASTDZrkz
{ 8823, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003e60009005ULL, nullptr, nullptr, OperandInfo659, -1 ,nullptr }, // Inst #8823 = VPBROADCASTDrZ128r
{ 8824, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203e60009005ULL, nullptr, nullptr, OperandInfo750, -1 ,nullptr }, // Inst #8824 = VPBROADCASTDrZ128rk
{ 8825, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603e60009005ULL, nullptr, nullptr, OperandInfo751, -1 ,nullptr }, // Inst #8825 = VPBROADCASTDrZ128rkz
{ 8826, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083e60009005ULL, nullptr, nullptr, OperandInfo744, -1 ,nullptr }, // Inst #8826 = VPBROADCASTDrZ256r
{ 8827, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283e60009005ULL, nullptr, nullptr, OperandInfo752, -1 ,nullptr }, // Inst #8827 = VPBROADCASTDrZ256rk
{ 8828, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683e60009005ULL, nullptr, nullptr, OperandInfo753, -1 ,nullptr }, // Inst #8828 = VPBROADCASTDrZ256rkz
{ 8829, 2, 1, 0, 0, 0, 0x80803e60009005ULL, nullptr, nullptr, OperandInfo747, -1 ,nullptr }, // Inst #8829 = VPBROADCASTDrZr
{ 8830, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03e60009005ULL, nullptr, nullptr, OperandInfo754, -1 ,nullptr }, // Inst #8830 = VPBROADCASTDrZrk
{ 8831, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03e60009005ULL, nullptr, nullptr, OperandInfo755, -1 ,nullptr }, // Inst #8831 = VPBROADCASTDrZrkz
{ 8832, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x2c38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #8832 = VPBROADCASTDrm
{ 8833, 2, 1, 0, 276, 0, 0x2c38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #8833 = VPBROADCASTDrr
{ 8834, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10080ce0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8834 = VPBROADCASTF32X2Z256m
{ 8835, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10280ce0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #8835 = VPBROADCASTF32X2Z256mk
{ 8836, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10680ce0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #8836 = VPBROADCASTF32X2Z256mkz
{ 8837, 2, 1, 0, 0, 0, 0x40080ce0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #8837 = VPBROADCASTF32X2Z256r
{ 8838, 4, 1, 0, 0, 0, 0x40280ce0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #8838 = VPBROADCASTF32X2Z256rk
{ 8839, 3, 1, 0, 0, 0, 0x40680ce0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #8839 = VPBROADCASTF32X2Z256rkz
{ 8840, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10800ce0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8840 = VPBROADCASTF32X2Zm
{ 8841, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a00ce0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #8841 = VPBROADCASTF32X2Zmk
{ 8842, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10e00ce0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #8842 = VPBROADCASTF32X2Zmkz
{ 8843, 2, 1, 0, 0, 0, 0x80800ce0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #8843 = VPBROADCASTF32X2Zr
{ 8844, 4, 1, 0, 0, 0, 0x80a00ce0009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr }, // Inst #8844 = VPBROADCASTF32X2Zrk
{ 8845, 3, 1, 0, 0, 0, 0x80e00ce0009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr }, // Inst #8845 = VPBROADCASTF32X2Zrkz
{ 8846, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10002ce0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8846 = VPBROADCASTI32X2Z128m
{ 8847, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10202ce0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #8847 = VPBROADCASTI32X2Z128mk
{ 8848, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10602ce0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #8848 = VPBROADCASTI32X2Z128mkz
{ 8849, 2, 1, 0, 0, 0, 0x20002ce0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8849 = VPBROADCASTI32X2Z128r
{ 8850, 4, 1, 0, 0, 0, 0x20202ce0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #8850 = VPBROADCASTI32X2Z128rk
{ 8851, 3, 1, 0, 0, 0, 0x20602ce0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #8851 = VPBROADCASTI32X2Z128rkz
{ 8852, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10082ce0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8852 = VPBROADCASTI32X2Z256m
{ 8853, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10282ce0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #8853 = VPBROADCASTI32X2Z256mk
{ 8854, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10682ce0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #8854 = VPBROADCASTI32X2Z256mkz
{ 8855, 2, 1, 0, 0, 0, 0x40082ce0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #8855 = VPBROADCASTI32X2Z256r
{ 8856, 4, 1, 0, 0, 0, 0x40282ce0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #8856 = VPBROADCASTI32X2Z256rk
{ 8857, 3, 1, 0, 0, 0, 0x40682ce0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #8857 = VPBROADCASTI32X2Z256rkz
{ 8858, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10802ce0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8858 = VPBROADCASTI32X2Zm
{ 8859, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a02ce0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #8859 = VPBROADCASTI32X2Zmk
{ 8860, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10e02ce0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #8860 = VPBROADCASTI32X2Zmkz
{ 8861, 2, 1, 0, 0, 0, 0x80802ce0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #8861 = VPBROADCASTI32X2Zr
{ 8862, 4, 1, 0, 0, 0, 0x80a02ce0009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr }, // Inst #8862 = VPBROADCASTI32X2Zrk
{ 8863, 3, 1, 0, 0, 0, 0x80e02ce0009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr }, // Inst #8863 = VPBROADCASTI32X2Zrkz
{ 8864, 2, 1, 0, 0, 0, 0x20009578009805ULL, nullptr, nullptr, OperandInfo756, -1 ,nullptr }, // Inst #8864 = VPBROADCASTMB2QZ128rr
{ 8865, 2, 1, 0, 0, 0, 0x40089578009805ULL, nullptr, nullptr, OperandInfo757, -1 ,nullptr }, // Inst #8865 = VPBROADCASTMB2QZ256rr
{ 8866, 2, 1, 0, 0, 0, 0x80809578009805ULL, nullptr, nullptr, OperandInfo758, -1 ,nullptr }, // Inst #8866 = VPBROADCASTMB2QZrr
{ 8867, 2, 1, 0, 0, 0, 0x20001d78009805ULL, nullptr, nullptr, OperandInfo759, -1 ,nullptr }, // Inst #8867 = VPBROADCASTMW2DZ128rr
{ 8868, 2, 1, 0, 0, 0, 0x40081d78009805ULL, nullptr, nullptr, OperandInfo760, -1 ,nullptr }, // Inst #8868 = VPBROADCASTMW2DZ256rr
{ 8869, 2, 1, 0, 0, 0, 0x80801d78009805ULL, nullptr, nullptr, OperandInfo761, -1 ,nullptr }, // Inst #8869 = VPBROADCASTMW2DZrr
{ 8870, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x82cb8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #8870 = VPBROADCASTQYrm
{ 8871, 2, 1, 0, 544, 0, 0x82cb8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #8871 = VPBROADCASTQYrr
{ 8872, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1000ace0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8872 = VPBROADCASTQZ128m
{ 8873, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1020ace0009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #8873 = VPBROADCASTQZ128mk
{ 8874, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1060ace0009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #8874 = VPBROADCASTQZ128mkz
{ 8875, 2, 1, 0, 0, 0, 0x2000ace0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8875 = VPBROADCASTQZ128r
{ 8876, 4, 1, 0, 0, 0, 0x2020ace0009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #8876 = VPBROADCASTQZ128rk
{ 8877, 3, 1, 0, 0, 0, 0x2060ace0009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #8877 = VPBROADCASTQZ128rkz
{ 8878, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1008ace0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8878 = VPBROADCASTQZ256m
{ 8879, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1028ace0009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #8879 = VPBROADCASTQZ256mk
{ 8880, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1068ace0009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #8880 = VPBROADCASTQZ256mkz
{ 8881, 2, 1, 0, 0, 0, 0x4008ace0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #8881 = VPBROADCASTQZ256r
{ 8882, 4, 1, 0, 0, 0, 0x4028ace0009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #8882 = VPBROADCASTQZ256rk
{ 8883, 3, 1, 0, 0, 0, 0x4068ace0009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #8883 = VPBROADCASTQZ256rkz
{ 8884, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1080ace0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8884 = VPBROADCASTQZm
{ 8885, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a0ace0009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #8885 = VPBROADCASTQZmk
{ 8886, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10e0ace0009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #8886 = VPBROADCASTQZmkz
{ 8887, 2, 1, 0, 0, 0, 0x8080ace0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #8887 = VPBROADCASTQZr
{ 8888, 4, 1, 0, 0, 0, 0x80a0ace0009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr }, // Inst #8888 = VPBROADCASTQZrk
{ 8889, 3, 1, 0, 0, 0, 0x80e0ace0009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr }, // Inst #8889 = VPBROADCASTQZrkz
{ 8890, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2000be60009005ULL, nullptr, nullptr, OperandInfo656, -1 ,nullptr }, // Inst #8890 = VPBROADCASTQrZ128r
{ 8891, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2020be60009005ULL, nullptr, nullptr, OperandInfo762, -1 ,nullptr }, // Inst #8891 = VPBROADCASTQrZ128rk
{ 8892, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x2060be60009005ULL, nullptr, nullptr, OperandInfo763, -1 ,nullptr }, // Inst #8892 = VPBROADCASTQrZ128rkz
{ 8893, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4008be60009005ULL, nullptr, nullptr, OperandInfo764, -1 ,nullptr }, // Inst #8893 = VPBROADCASTQrZ256r
{ 8894, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4028be60009005ULL, nullptr, nullptr, OperandInfo765, -1 ,nullptr }, // Inst #8894 = VPBROADCASTQrZ256rk
{ 8895, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4068be60009005ULL, nullptr, nullptr, OperandInfo766, -1 ,nullptr }, // Inst #8895 = VPBROADCASTQrZ256rkz
{ 8896, 2, 1, 0, 0, 0, 0x8080be60009005ULL, nullptr, nullptr, OperandInfo767, -1 ,nullptr }, // Inst #8896 = VPBROADCASTQrZr
{ 8897, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a0be60009005ULL, nullptr, nullptr, OperandInfo768, -1 ,nullptr }, // Inst #8897 = VPBROADCASTQrZrk
{ 8898, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e0be60009005ULL, nullptr, nullptr, OperandInfo769, -1 ,nullptr }, // Inst #8898 = VPBROADCASTQrZrkz
{ 8899, 6, 1, 0, 206, 0|(1ULL<<MCID::MayLoad), 0x2cb8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #8899 = VPBROADCASTQrm
{ 8900, 2, 1, 0, 276, 0, 0x2cb8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #8900 = VPBROADCASTQrr
{ 8901, 6, 1, 0, 810, 0|(1ULL<<MCID::MayLoad), 0x83cb8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #8901 = VPBROADCASTWYrm
{ 8902, 2, 1, 0, 544, 0, 0x83cb8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #8902 = VPBROADCASTWYrr
{ 8903, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4003ce0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #8903 = VPBROADCASTWZ128m
{ 8904, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4203ce0009006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr }, // Inst #8904 = VPBROADCASTWZ128mk
{ 8905, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4603ce0009006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr }, // Inst #8905 = VPBROADCASTWZ128mkz
{ 8906, 2, 1, 0, 0, 0, 0x20003ce0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #8906 = VPBROADCASTWZ128r
{ 8907, 4, 1, 0, 0, 0, 0x20203ce0009005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #8907 = VPBROADCASTWZ128rk
{ 8908, 3, 1, 0, 0, 0, 0x20603ce0009005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #8908 = VPBROADCASTWZ128rkz
{ 8909, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4083ce0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #8909 = VPBROADCASTWZ256m
{ 8910, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4283ce0009006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr }, // Inst #8910 = VPBROADCASTWZ256mk
{ 8911, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4683ce0009006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr }, // Inst #8911 = VPBROADCASTWZ256mkz
{ 8912, 2, 1, 0, 0, 0, 0x40083ce0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #8912 = VPBROADCASTWZ256r
{ 8913, 4, 1, 0, 0, 0, 0x40283ce0009005ULL, nullptr, nullptr, OperandInfo770, -1 ,nullptr }, // Inst #8913 = VPBROADCASTWZ256rk
{ 8914, 3, 1, 0, 0, 0, 0x40683ce0009005ULL, nullptr, nullptr, OperandInfo771, -1 ,nullptr }, // Inst #8914 = VPBROADCASTWZ256rkz
{ 8915, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4803ce0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #8915 = VPBROADCASTWZm
{ 8916, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4a03ce0009006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr }, // Inst #8916 = VPBROADCASTWZmk
{ 8917, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4e03ce0009006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr }, // Inst #8917 = VPBROADCASTWZmkz
{ 8918, 2, 1, 0, 0, 0, 0x80803ce0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #8918 = VPBROADCASTWZr
{ 8919, 4, 1, 0, 0, 0, 0x80a03ce0009005ULL, nullptr, nullptr, OperandInfo772, -1 ,nullptr }, // Inst #8919 = VPBROADCASTWZrk
{ 8920, 3, 1, 0, 0, 0, 0x80e03ce0009005ULL, nullptr, nullptr, OperandInfo773, -1 ,nullptr }, // Inst #8920 = VPBROADCASTWZrkz
{ 8921, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20003de0009005ULL, nullptr, nullptr, OperandInfo659, -1 ,nullptr }, // Inst #8921 = VPBROADCASTWrZ128r
{ 8922, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20203de0009005ULL, nullptr, nullptr, OperandInfo774, -1 ,nullptr }, // Inst #8922 = VPBROADCASTWrZ128rk
{ 8923, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20603de0009005ULL, nullptr, nullptr, OperandInfo775, -1 ,nullptr }, // Inst #8923 = VPBROADCASTWrZ128rkz
{ 8924, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40083de0009005ULL, nullptr, nullptr, OperandInfo744, -1 ,nullptr }, // Inst #8924 = VPBROADCASTWrZ256r
{ 8925, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40283de0009005ULL, nullptr, nullptr, OperandInfo776, -1 ,nullptr }, // Inst #8925 = VPBROADCASTWrZ256rk
{ 8926, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x40683de0009005ULL, nullptr, nullptr, OperandInfo777, -1 ,nullptr }, // Inst #8926 = VPBROADCASTWrZ256rkz
{ 8927, 2, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80803de0009005ULL, nullptr, nullptr, OperandInfo747, -1 ,nullptr }, // Inst #8927 = VPBROADCASTWrZr
{ 8928, 4, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80a03de0009005ULL, nullptr, nullptr, OperandInfo778, -1 ,nullptr }, // Inst #8928 = VPBROADCASTWrZrk
{ 8929, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80e03de0009005ULL, nullptr, nullptr, OperandInfo779, -1 ,nullptr }, // Inst #8929 = VPBROADCASTWrZrkz
{ 8930, 6, 1, 0, 809, 0|(1ULL<<MCID::MayLoad), 0x3cb8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #8930 = VPBROADCASTWrm
{ 8931, 2, 1, 0, 276, 0, 0x3cb8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #8931 = VPBROADCASTWrr
{ 8932, 8, 1, 0, 566, 0|(1ULL<<MCID::MayLoad), 0x1223804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #8932 = VPCLMULQDQrm
{ 8933, 4, 1, 0, 567, 0|(1ULL<<MCID::Commutable), 0x1223804d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #8933 = VPCLMULQDQrr
{ 8934, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x55158050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #8934 = VPCMOVmr
{ 8935, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xd5158050806ULL, nullptr, nullptr, OperandInfo352, -1 ,nullptr }, // Inst #8935 = VPCMOVmrY
{ 8936, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20005d158050806ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #8936 = VPCMOVrm
{ 8937, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000dd158050806ULL, nullptr, nullptr, OperandInfo551, -1 ,nullptr }, // Inst #8937 = VPCMOVrmY
{ 8938, 4, 1, 0, 0, 0, 0x55158050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #8938 = VPCMOVrr
{ 8939, 4, 1, 0, 0, 0, 0xd5158050805ULL, nullptr, nullptr, OperandInfo353, -1 ,nullptr }, // Inst #8939 = VPCMOVrrY
{ 8940, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20011ff804d006ULL, nullptr, nullptr, OperandInfo780, -1 ,nullptr }, // Inst #8940 = VPCMPBZ128rmi
{ 8941, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20011ff804d006ULL, nullptr, nullptr, OperandInfo780, -1 ,nullptr }, // Inst #8941 = VPCMPBZ128rmi_alt
{ 8942, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20211ff804d006ULL, nullptr, nullptr, OperandInfo781, -1 ,nullptr }, // Inst #8942 = VPCMPBZ128rmik
{ 8943, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20211ff804d006ULL, nullptr, nullptr, OperandInfo781, -1 ,nullptr }, // Inst #8943 = VPCMPBZ128rmik_alt
{ 8944, 4, 1, 0, 568, 0, 0x20011ff804d005ULL, nullptr, nullptr, OperandInfo782, -1 ,nullptr }, // Inst #8944 = VPCMPBZ128rri
{ 8945, 4, 1, 0, 568, 0, 0x20011ff804d005ULL, nullptr, nullptr, OperandInfo782, -1 ,nullptr }, // Inst #8945 = VPCMPBZ128rri_alt
{ 8946, 5, 1, 0, 568, 0, 0x20211ff804d005ULL, nullptr, nullptr, OperandInfo783, -1 ,nullptr }, // Inst #8946 = VPCMPBZ128rrik
{ 8947, 5, 1, 0, 568, 0, 0x20211ff804d005ULL, nullptr, nullptr, OperandInfo783, -1 ,nullptr }, // Inst #8947 = VPCMPBZ128rrik_alt
{ 8948, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40091ff804d006ULL, nullptr, nullptr, OperandInfo784, -1 ,nullptr }, // Inst #8948 = VPCMPBZ256rmi
{ 8949, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40091ff804d006ULL, nullptr, nullptr, OperandInfo784, -1 ,nullptr }, // Inst #8949 = VPCMPBZ256rmi_alt
{ 8950, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40291ff804d006ULL, nullptr, nullptr, OperandInfo785, -1 ,nullptr }, // Inst #8950 = VPCMPBZ256rmik
{ 8951, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40291ff804d006ULL, nullptr, nullptr, OperandInfo785, -1 ,nullptr }, // Inst #8951 = VPCMPBZ256rmik_alt
{ 8952, 4, 1, 0, 568, 0, 0x40091ff804d005ULL, nullptr, nullptr, OperandInfo786, -1 ,nullptr }, // Inst #8952 = VPCMPBZ256rri
{ 8953, 4, 1, 0, 568, 0, 0x40091ff804d005ULL, nullptr, nullptr, OperandInfo786, -1 ,nullptr }, // Inst #8953 = VPCMPBZ256rri_alt
{ 8954, 5, 1, 0, 568, 0, 0x40291ff804d005ULL, nullptr, nullptr, OperandInfo787, -1 ,nullptr }, // Inst #8954 = VPCMPBZ256rrik
{ 8955, 5, 1, 0, 568, 0, 0x40291ff804d005ULL, nullptr, nullptr, OperandInfo787, -1 ,nullptr }, // Inst #8955 = VPCMPBZ256rrik_alt
{ 8956, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80811ff804d006ULL, nullptr, nullptr, OperandInfo788, -1 ,nullptr }, // Inst #8956 = VPCMPBZrmi
{ 8957, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80811ff804d006ULL, nullptr, nullptr, OperandInfo788, -1 ,nullptr }, // Inst #8957 = VPCMPBZrmi_alt
{ 8958, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a11ff804d006ULL, nullptr, nullptr, OperandInfo789, -1 ,nullptr }, // Inst #8958 = VPCMPBZrmik
{ 8959, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a11ff804d006ULL, nullptr, nullptr, OperandInfo789, -1 ,nullptr }, // Inst #8959 = VPCMPBZrmik_alt
{ 8960, 4, 1, 0, 568, 0, 0x80811ff804d005ULL, nullptr, nullptr, OperandInfo790, -1 ,nullptr }, // Inst #8960 = VPCMPBZrri
{ 8961, 4, 1, 0, 568, 0, 0x80811ff804d005ULL, nullptr, nullptr, OperandInfo790, -1 ,nullptr }, // Inst #8961 = VPCMPBZrri_alt
{ 8962, 5, 1, 0, 568, 0, 0x80a11ff804d005ULL, nullptr, nullptr, OperandInfo791, -1 ,nullptr }, // Inst #8962 = VPCMPBZrrik
{ 8963, 5, 1, 0, 568, 0, 0x80a11ff804d005ULL, nullptr, nullptr, OperandInfo791, -1 ,nullptr }, // Inst #8963 = VPCMPBZrrik_alt
{ 8964, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20010ff804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #8964 = VPCMPDZ128rmi
{ 8965, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20010ff804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #8965 = VPCMPDZ128rmi_alt
{ 8966, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9010ff804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #8966 = VPCMPDZ128rmib
{ 8967, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9010ff804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #8967 = VPCMPDZ128rmib_alt
{ 8968, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9210ff804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #8968 = VPCMPDZ128rmibk
{ 8969, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9210ff804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #8969 = VPCMPDZ128rmibk_alt
{ 8970, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20210ff804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #8970 = VPCMPDZ128rmik
{ 8971, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20210ff804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #8971 = VPCMPDZ128rmik_alt
{ 8972, 4, 1, 0, 568, 0, 0x20010ff804d005ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #8972 = VPCMPDZ128rri
{ 8973, 4, 1, 0, 568, 0, 0x20010ff804d005ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #8973 = VPCMPDZ128rri_alt
{ 8974, 5, 1, 0, 568, 0, 0x20210ff804d005ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr }, // Inst #8974 = VPCMPDZ128rrik
{ 8975, 5, 1, 0, 568, 0, 0x20210ff804d005ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr }, // Inst #8975 = VPCMPDZ128rrik_alt
{ 8976, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40090ff804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #8976 = VPCMPDZ256rmi
{ 8977, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40090ff804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #8977 = VPCMPDZ256rmi_alt
{ 8978, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9090ff804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #8978 = VPCMPDZ256rmib
{ 8979, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9090ff804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #8979 = VPCMPDZ256rmib_alt
{ 8980, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9290ff804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #8980 = VPCMPDZ256rmibk
{ 8981, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9290ff804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #8981 = VPCMPDZ256rmibk_alt
{ 8982, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40290ff804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #8982 = VPCMPDZ256rmik
{ 8983, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40290ff804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #8983 = VPCMPDZ256rmik_alt
{ 8984, 4, 1, 0, 568, 0, 0x40090ff804d005ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr }, // Inst #8984 = VPCMPDZ256rri
{ 8985, 4, 1, 0, 568, 0, 0x40090ff804d005ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr }, // Inst #8985 = VPCMPDZ256rri_alt
{ 8986, 5, 1, 0, 568, 0, 0x40290ff804d005ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr }, // Inst #8986 = VPCMPDZ256rrik
{ 8987, 5, 1, 0, 568, 0, 0x40290ff804d005ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr }, // Inst #8987 = VPCMPDZ256rrik_alt
{ 8988, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80810ff804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #8988 = VPCMPDZrmi
{ 8989, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80810ff804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #8989 = VPCMPDZrmi_alt
{ 8990, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9810ff804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #8990 = VPCMPDZrmib
{ 8991, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9810ff804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #8991 = VPCMPDZrmib_alt
{ 8992, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9a10ff804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #8992 = VPCMPDZrmibk
{ 8993, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9a10ff804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #8993 = VPCMPDZrmibk_alt
{ 8994, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a10ff804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #8994 = VPCMPDZrmik
{ 8995, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a10ff804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #8995 = VPCMPDZrmik_alt
{ 8996, 4, 1, 0, 568, 0, 0x80810ff804d005ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr }, // Inst #8996 = VPCMPDZrri
{ 8997, 4, 1, 0, 568, 0, 0x80810ff804d005ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr }, // Inst #8997 = VPCMPDZrri_alt
{ 8998, 5, 1, 0, 568, 0, 0x80a10ff804d005ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr }, // Inst #8998 = VPCMPDZrrik
{ 8999, 5, 1, 0, 568, 0, 0x80a10ff804d005ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr }, // Inst #8999 = VPCMPDZrrik_alt
{ 9000, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x93a38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9000 = VPCMPEQBYrm
{ 9001, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x93a38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9001 = VPCMPEQBYrr
{ 9002, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20013a78005006ULL, nullptr, nullptr, OperandInfo792, -1 ,nullptr }, // Inst #9002 = VPCMPEQBZ128rm
{ 9003, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20213a78005006ULL, nullptr, nullptr, OperandInfo793, -1 ,nullptr }, // Inst #9003 = VPCMPEQBZ128rmk
{ 9004, 3, 1, 0, 568, 0, 0x20013a78005005ULL, nullptr, nullptr, OperandInfo794, -1 ,nullptr }, // Inst #9004 = VPCMPEQBZ128rr
{ 9005, 4, 1, 0, 568, 0, 0x20213a78005005ULL, nullptr, nullptr, OperandInfo795, -1 ,nullptr }, // Inst #9005 = VPCMPEQBZ128rrk
{ 9006, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40093a78005006ULL, nullptr, nullptr, OperandInfo796, -1 ,nullptr }, // Inst #9006 = VPCMPEQBZ256rm
{ 9007, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40293a78005006ULL, nullptr, nullptr, OperandInfo797, -1 ,nullptr }, // Inst #9007 = VPCMPEQBZ256rmk
{ 9008, 3, 1, 0, 568, 0, 0x40093a78005005ULL, nullptr, nullptr, OperandInfo798, -1 ,nullptr }, // Inst #9008 = VPCMPEQBZ256rr
{ 9009, 4, 1, 0, 568, 0, 0x40293a78005005ULL, nullptr, nullptr, OperandInfo799, -1 ,nullptr }, // Inst #9009 = VPCMPEQBZ256rrk
{ 9010, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80813a78005006ULL, nullptr, nullptr, OperandInfo800, -1 ,nullptr }, // Inst #9010 = VPCMPEQBZrm
{ 9011, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a13a78005006ULL, nullptr, nullptr, OperandInfo801, -1 ,nullptr }, // Inst #9011 = VPCMPEQBZrmk
{ 9012, 3, 1, 0, 568, 0, 0x80813a78005005ULL, nullptr, nullptr, OperandInfo802, -1 ,nullptr }, // Inst #9012 = VPCMPEQBZrr
{ 9013, 4, 1, 0, 568, 0, 0x80a13a78005005ULL, nullptr, nullptr, OperandInfo803, -1 ,nullptr }, // Inst #9013 = VPCMPEQBZrrk
{ 9014, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x13a38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9014 = VPCMPEQBrm
{ 9015, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x13a38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9015 = VPCMPEQBrr
{ 9016, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x93b38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9016 = VPCMPEQDYrm
{ 9017, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x93b38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9017 = VPCMPEQDYrr
{ 9018, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20013b78005006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr }, // Inst #9018 = VPCMPEQDZ128rm
{ 9019, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9013b78005006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr }, // Inst #9019 = VPCMPEQDZ128rmb
{ 9020, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9213b78005006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr }, // Inst #9020 = VPCMPEQDZ128rmbk
{ 9021, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20213b78005006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr }, // Inst #9021 = VPCMPEQDZ128rmk
{ 9022, 3, 1, 0, 568, 0, 0x20013b78005005ULL, nullptr, nullptr, OperandInfo806, -1 ,nullptr }, // Inst #9022 = VPCMPEQDZ128rr
{ 9023, 4, 1, 0, 568, 0, 0x20213b78005005ULL, nullptr, nullptr, OperandInfo807, -1 ,nullptr }, // Inst #9023 = VPCMPEQDZ128rrk
{ 9024, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40093b78005006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr }, // Inst #9024 = VPCMPEQDZ256rm
{ 9025, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9093b78005006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr }, // Inst #9025 = VPCMPEQDZ256rmb
{ 9026, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9293b78005006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr }, // Inst #9026 = VPCMPEQDZ256rmbk
{ 9027, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40293b78005006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr }, // Inst #9027 = VPCMPEQDZ256rmk
{ 9028, 3, 1, 0, 568, 0, 0x40093b78005005ULL, nullptr, nullptr, OperandInfo810, -1 ,nullptr }, // Inst #9028 = VPCMPEQDZ256rr
{ 9029, 4, 1, 0, 568, 0, 0x40293b78005005ULL, nullptr, nullptr, OperandInfo811, -1 ,nullptr }, // Inst #9029 = VPCMPEQDZ256rrk
{ 9030, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80813b78005006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr }, // Inst #9030 = VPCMPEQDZrm
{ 9031, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9813b78005006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr }, // Inst #9031 = VPCMPEQDZrmb
{ 9032, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9a13b78005006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr }, // Inst #9032 = VPCMPEQDZrmbk
{ 9033, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a13b78005006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr }, // Inst #9033 = VPCMPEQDZrmk
{ 9034, 3, 1, 0, 568, 0, 0x80813b78005005ULL, nullptr, nullptr, OperandInfo814, -1 ,nullptr }, // Inst #9034 = VPCMPEQDZrr
{ 9035, 4, 1, 0, 568, 0, 0x80a13b78005005ULL, nullptr, nullptr, OperandInfo815, -1 ,nullptr }, // Inst #9035 = VPCMPEQDZrrk
{ 9036, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x13b38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9036 = VPCMPEQDrm
{ 9037, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x13b38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9037 = VPCMPEQDrr
{ 9038, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x914b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9038 = VPCMPEQQYrm
{ 9039, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x914b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9039 = VPCMPEQQYrr
{ 9040, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x200194f8009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr }, // Inst #9040 = VPCMPEQQZ128rm
{ 9041, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x110194f8009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr }, // Inst #9041 = VPCMPEQQZ128rmb
{ 9042, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x112194f8009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr }, // Inst #9042 = VPCMPEQQZ128rmbk
{ 9043, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x202194f8009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr }, // Inst #9043 = VPCMPEQQZ128rmk
{ 9044, 3, 1, 0, 568, 0, 0x200194f8009005ULL, nullptr, nullptr, OperandInfo818, -1 ,nullptr }, // Inst #9044 = VPCMPEQQZ128rr
{ 9045, 4, 1, 0, 568, 0, 0x202194f8009005ULL, nullptr, nullptr, OperandInfo819, -1 ,nullptr }, // Inst #9045 = VPCMPEQQZ128rrk
{ 9046, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x400994f8009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr }, // Inst #9046 = VPCMPEQQZ256rm
{ 9047, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x110994f8009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr }, // Inst #9047 = VPCMPEQQZ256rmb
{ 9048, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x112994f8009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr }, // Inst #9048 = VPCMPEQQZ256rmbk
{ 9049, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x402994f8009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr }, // Inst #9049 = VPCMPEQQZ256rmk
{ 9050, 3, 1, 0, 568, 0, 0x400994f8009005ULL, nullptr, nullptr, OperandInfo822, -1 ,nullptr }, // Inst #9050 = VPCMPEQQZ256rr
{ 9051, 4, 1, 0, 568, 0, 0x402994f8009005ULL, nullptr, nullptr, OperandInfo823, -1 ,nullptr }, // Inst #9051 = VPCMPEQQZ256rrk
{ 9052, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x808194f8009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr }, // Inst #9052 = VPCMPEQQZrm
{ 9053, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x118194f8009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr }, // Inst #9053 = VPCMPEQQZrmb
{ 9054, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11a194f8009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr }, // Inst #9054 = VPCMPEQQZrmbk
{ 9055, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a194f8009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr }, // Inst #9055 = VPCMPEQQZrmk
{ 9056, 3, 1, 0, 568, 0, 0x808194f8009005ULL, nullptr, nullptr, OperandInfo826, -1 ,nullptr }, // Inst #9056 = VPCMPEQQZrr
{ 9057, 4, 1, 0, 568, 0, 0x80a194f8009005ULL, nullptr, nullptr, OperandInfo827, -1 ,nullptr }, // Inst #9057 = VPCMPEQQZrrk
{ 9058, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x114b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9058 = VPCMPEQQrm
{ 9059, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x114b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9059 = VPCMPEQQrr
{ 9060, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x93ab8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9060 = VPCMPEQWYrm
{ 9061, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x93ab8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9061 = VPCMPEQWYrr
{ 9062, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20013af8005006ULL, nullptr, nullptr, OperandInfo828, -1 ,nullptr }, // Inst #9062 = VPCMPEQWZ128rm
{ 9063, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20213af8005006ULL, nullptr, nullptr, OperandInfo829, -1 ,nullptr }, // Inst #9063 = VPCMPEQWZ128rmk
{ 9064, 3, 1, 0, 568, 0, 0x20013af8005005ULL, nullptr, nullptr, OperandInfo830, -1 ,nullptr }, // Inst #9064 = VPCMPEQWZ128rr
{ 9065, 4, 1, 0, 568, 0, 0x20213af8005005ULL, nullptr, nullptr, OperandInfo831, -1 ,nullptr }, // Inst #9065 = VPCMPEQWZ128rrk
{ 9066, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40093af8005006ULL, nullptr, nullptr, OperandInfo832, -1 ,nullptr }, // Inst #9066 = VPCMPEQWZ256rm
{ 9067, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40293af8005006ULL, nullptr, nullptr, OperandInfo833, -1 ,nullptr }, // Inst #9067 = VPCMPEQWZ256rmk
{ 9068, 3, 1, 0, 568, 0, 0x40093af8005005ULL, nullptr, nullptr, OperandInfo834, -1 ,nullptr }, // Inst #9068 = VPCMPEQWZ256rr
{ 9069, 4, 1, 0, 568, 0, 0x40293af8005005ULL, nullptr, nullptr, OperandInfo835, -1 ,nullptr }, // Inst #9069 = VPCMPEQWZ256rrk
{ 9070, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80813af8005006ULL, nullptr, nullptr, OperandInfo836, -1 ,nullptr }, // Inst #9070 = VPCMPEQWZrm
{ 9071, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a13af8005006ULL, nullptr, nullptr, OperandInfo837, -1 ,nullptr }, // Inst #9071 = VPCMPEQWZrmk
{ 9072, 3, 1, 0, 568, 0, 0x80813af8005005ULL, nullptr, nullptr, OperandInfo838, -1 ,nullptr }, // Inst #9072 = VPCMPEQWZrr
{ 9073, 4, 1, 0, 568, 0, 0x80a13af8005005ULL, nullptr, nullptr, OperandInfo839, -1 ,nullptr }, // Inst #9073 = VPCMPEQWZrrk
{ 9074, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x13ab8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9074 = VPCMPEQWrm
{ 9075, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x13ab8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9075 = VPCMPEQWrr
{ 9076, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo257, -1 ,nullptr }, // Inst #9076 = VPCMPESTRIMEM
{ 9077, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo258, -1 ,nullptr }, // Inst #9077 = VPCMPESTRIREG
{ 9078, 7, 0, 0, 393, 0|(1ULL<<MCID::MayLoad), 0x30b804d006ULL, ImplicitList16, ImplicitList59, OperandInfo55, -1 ,nullptr }, // Inst #9078 = VPCMPESTRIrm
{ 9079, 3, 0, 0, 394, 0, 0x30b804d005ULL, ImplicitList16, ImplicitList59, OperandInfo56, -1 ,nullptr }, // Inst #9079 = VPCMPESTRIrr
{ 9080, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo152, -1 ,nullptr }, // Inst #9080 = VPCMPESTRM128MEM
{ 9081, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList16, ImplicitList6, OperandInfo101, -1 ,nullptr }, // Inst #9081 = VPCMPESTRM128REG
{ 9082, 7, 0, 0, 395, 0|(1ULL<<MCID::MayLoad), 0x303804d006ULL, ImplicitList16, ImplicitList60, OperandInfo55, -1 ,nullptr }, // Inst #9082 = VPCMPESTRM128rm
{ 9083, 3, 0, 0, 396, 0, 0x303804d005ULL, ImplicitList16, ImplicitList60, OperandInfo56, -1 ,nullptr }, // Inst #9083 = VPCMPESTRM128rr
{ 9084, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x93238005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9084 = VPCMPGTBYrm
{ 9085, 3, 1, 0, 377, 0, 0x93238005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9085 = VPCMPGTBYrr
{ 9086, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20013278005006ULL, nullptr, nullptr, OperandInfo792, -1 ,nullptr }, // Inst #9086 = VPCMPGTBZ128rm
{ 9087, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20213278005006ULL, nullptr, nullptr, OperandInfo793, -1 ,nullptr }, // Inst #9087 = VPCMPGTBZ128rmk
{ 9088, 3, 1, 0, 568, 0, 0x20013278005005ULL, nullptr, nullptr, OperandInfo794, -1 ,nullptr }, // Inst #9088 = VPCMPGTBZ128rr
{ 9089, 4, 1, 0, 568, 0, 0x20213278005005ULL, nullptr, nullptr, OperandInfo795, -1 ,nullptr }, // Inst #9089 = VPCMPGTBZ128rrk
{ 9090, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40093278005006ULL, nullptr, nullptr, OperandInfo796, -1 ,nullptr }, // Inst #9090 = VPCMPGTBZ256rm
{ 9091, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40293278005006ULL, nullptr, nullptr, OperandInfo797, -1 ,nullptr }, // Inst #9091 = VPCMPGTBZ256rmk
{ 9092, 3, 1, 0, 568, 0, 0x40093278005005ULL, nullptr, nullptr, OperandInfo798, -1 ,nullptr }, // Inst #9092 = VPCMPGTBZ256rr
{ 9093, 4, 1, 0, 568, 0, 0x40293278005005ULL, nullptr, nullptr, OperandInfo799, -1 ,nullptr }, // Inst #9093 = VPCMPGTBZ256rrk
{ 9094, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80813278005006ULL, nullptr, nullptr, OperandInfo800, -1 ,nullptr }, // Inst #9094 = VPCMPGTBZrm
{ 9095, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a13278005006ULL, nullptr, nullptr, OperandInfo801, -1 ,nullptr }, // Inst #9095 = VPCMPGTBZrmk
{ 9096, 3, 1, 0, 568, 0, 0x80813278005005ULL, nullptr, nullptr, OperandInfo802, -1 ,nullptr }, // Inst #9096 = VPCMPGTBZrr
{ 9097, 4, 1, 0, 568, 0, 0x80a13278005005ULL, nullptr, nullptr, OperandInfo803, -1 ,nullptr }, // Inst #9097 = VPCMPGTBZrrk
{ 9098, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x13238005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9098 = VPCMPGTBrm
{ 9099, 3, 1, 0, 377, 0, 0x13238005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9099 = VPCMPGTBrr
{ 9100, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x93338005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9100 = VPCMPGTDYrm
{ 9101, 3, 1, 0, 377, 0, 0x93338005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9101 = VPCMPGTDYrr
{ 9102, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20013378005006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr }, // Inst #9102 = VPCMPGTDZ128rm
{ 9103, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9013378005006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr }, // Inst #9103 = VPCMPGTDZ128rmb
{ 9104, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9213378005006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr }, // Inst #9104 = VPCMPGTDZ128rmbk
{ 9105, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20213378005006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr }, // Inst #9105 = VPCMPGTDZ128rmk
{ 9106, 3, 1, 0, 568, 0, 0x20013378005005ULL, nullptr, nullptr, OperandInfo806, -1 ,nullptr }, // Inst #9106 = VPCMPGTDZ128rr
{ 9107, 4, 1, 0, 568, 0, 0x20213378005005ULL, nullptr, nullptr, OperandInfo807, -1 ,nullptr }, // Inst #9107 = VPCMPGTDZ128rrk
{ 9108, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40093378005006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr }, // Inst #9108 = VPCMPGTDZ256rm
{ 9109, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9093378005006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr }, // Inst #9109 = VPCMPGTDZ256rmb
{ 9110, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9293378005006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr }, // Inst #9110 = VPCMPGTDZ256rmbk
{ 9111, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40293378005006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr }, // Inst #9111 = VPCMPGTDZ256rmk
{ 9112, 3, 1, 0, 568, 0, 0x40093378005005ULL, nullptr, nullptr, OperandInfo810, -1 ,nullptr }, // Inst #9112 = VPCMPGTDZ256rr
{ 9113, 4, 1, 0, 568, 0, 0x40293378005005ULL, nullptr, nullptr, OperandInfo811, -1 ,nullptr }, // Inst #9113 = VPCMPGTDZ256rrk
{ 9114, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80813378005006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr }, // Inst #9114 = VPCMPGTDZrm
{ 9115, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9813378005006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr }, // Inst #9115 = VPCMPGTDZrmb
{ 9116, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9a13378005006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr }, // Inst #9116 = VPCMPGTDZrmbk
{ 9117, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a13378005006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr }, // Inst #9117 = VPCMPGTDZrmk
{ 9118, 3, 1, 0, 568, 0, 0x80813378005005ULL, nullptr, nullptr, OperandInfo814, -1 ,nullptr }, // Inst #9118 = VPCMPGTDZrr
{ 9119, 4, 1, 0, 568, 0, 0x80a13378005005ULL, nullptr, nullptr, OperandInfo815, -1 ,nullptr }, // Inst #9119 = VPCMPGTDZrrk
{ 9120, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x13338005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9120 = VPCMPGTDrm
{ 9121, 3, 1, 0, 377, 0, 0x13338005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9121 = VPCMPGTDrr
{ 9122, 7, 1, 0, 830, 0|(1ULL<<MCID::MayLoad), 0x91bb8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9122 = VPCMPGTQYrm
{ 9123, 3, 1, 0, 829, 0, 0x91bb8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9123 = VPCMPGTQYrr
{ 9124, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20019bf8009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr }, // Inst #9124 = VPCMPGTQZ128rm
{ 9125, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11019bf8009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr }, // Inst #9125 = VPCMPGTQZ128rmb
{ 9126, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11219bf8009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr }, // Inst #9126 = VPCMPGTQZ128rmbk
{ 9127, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20219bf8009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr }, // Inst #9127 = VPCMPGTQZ128rmk
{ 9128, 3, 1, 0, 568, 0, 0x20019bf8009005ULL, nullptr, nullptr, OperandInfo818, -1 ,nullptr }, // Inst #9128 = VPCMPGTQZ128rr
{ 9129, 4, 1, 0, 568, 0, 0x20219bf8009005ULL, nullptr, nullptr, OperandInfo819, -1 ,nullptr }, // Inst #9129 = VPCMPGTQZ128rrk
{ 9130, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40099bf8009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr }, // Inst #9130 = VPCMPGTQZ256rm
{ 9131, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11099bf8009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr }, // Inst #9131 = VPCMPGTQZ256rmb
{ 9132, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11299bf8009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr }, // Inst #9132 = VPCMPGTQZ256rmbk
{ 9133, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40299bf8009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr }, // Inst #9133 = VPCMPGTQZ256rmk
{ 9134, 3, 1, 0, 568, 0, 0x40099bf8009005ULL, nullptr, nullptr, OperandInfo822, -1 ,nullptr }, // Inst #9134 = VPCMPGTQZ256rr
{ 9135, 4, 1, 0, 568, 0, 0x40299bf8009005ULL, nullptr, nullptr, OperandInfo823, -1 ,nullptr }, // Inst #9135 = VPCMPGTQZ256rrk
{ 9136, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80819bf8009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr }, // Inst #9136 = VPCMPGTQZrm
{ 9137, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11819bf8009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr }, // Inst #9137 = VPCMPGTQZrmb
{ 9138, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11a19bf8009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr }, // Inst #9138 = VPCMPGTQZrmbk
{ 9139, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a19bf8009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr }, // Inst #9139 = VPCMPGTQZrmk
{ 9140, 3, 1, 0, 568, 0, 0x80819bf8009005ULL, nullptr, nullptr, OperandInfo826, -1 ,nullptr }, // Inst #9140 = VPCMPGTQZrr
{ 9141, 4, 1, 0, 568, 0, 0x80a19bf8009005ULL, nullptr, nullptr, OperandInfo827, -1 ,nullptr }, // Inst #9141 = VPCMPGTQZrrk
{ 9142, 7, 1, 0, 830, 0|(1ULL<<MCID::MayLoad), 0x11bb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9142 = VPCMPGTQrm
{ 9143, 3, 1, 0, 829, 0, 0x11bb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9143 = VPCMPGTQrr
{ 9144, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x932b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9144 = VPCMPGTWYrm
{ 9145, 3, 1, 0, 377, 0, 0x932b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9145 = VPCMPGTWYrr
{ 9146, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x200132f8005006ULL, nullptr, nullptr, OperandInfo828, -1 ,nullptr }, // Inst #9146 = VPCMPGTWZ128rm
{ 9147, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x202132f8005006ULL, nullptr, nullptr, OperandInfo829, -1 ,nullptr }, // Inst #9147 = VPCMPGTWZ128rmk
{ 9148, 3, 1, 0, 568, 0, 0x200132f8005005ULL, nullptr, nullptr, OperandInfo830, -1 ,nullptr }, // Inst #9148 = VPCMPGTWZ128rr
{ 9149, 4, 1, 0, 568, 0, 0x202132f8005005ULL, nullptr, nullptr, OperandInfo831, -1 ,nullptr }, // Inst #9149 = VPCMPGTWZ128rrk
{ 9150, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x400932f8005006ULL, nullptr, nullptr, OperandInfo832, -1 ,nullptr }, // Inst #9150 = VPCMPGTWZ256rm
{ 9151, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x402932f8005006ULL, nullptr, nullptr, OperandInfo833, -1 ,nullptr }, // Inst #9151 = VPCMPGTWZ256rmk
{ 9152, 3, 1, 0, 568, 0, 0x400932f8005005ULL, nullptr, nullptr, OperandInfo834, -1 ,nullptr }, // Inst #9152 = VPCMPGTWZ256rr
{ 9153, 4, 1, 0, 568, 0, 0x402932f8005005ULL, nullptr, nullptr, OperandInfo835, -1 ,nullptr }, // Inst #9153 = VPCMPGTWZ256rrk
{ 9154, 7, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x808132f8005006ULL, nullptr, nullptr, OperandInfo836, -1 ,nullptr }, // Inst #9154 = VPCMPGTWZrm
{ 9155, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a132f8005006ULL, nullptr, nullptr, OperandInfo837, -1 ,nullptr }, // Inst #9155 = VPCMPGTWZrmk
{ 9156, 3, 1, 0, 568, 0, 0x808132f8005005ULL, nullptr, nullptr, OperandInfo838, -1 ,nullptr }, // Inst #9156 = VPCMPGTWZrr
{ 9157, 4, 1, 0, 568, 0, 0x80a132f8005005ULL, nullptr, nullptr, OperandInfo839, -1 ,nullptr }, // Inst #9157 = VPCMPGTWZrrk
{ 9158, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x132b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9158 = VPCMPGTWrm
{ 9159, 3, 1, 0, 377, 0, 0x132b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9159 = VPCMPGTWrr
{ 9160, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo257, -1 ,nullptr }, // Inst #9160 = VPCMPISTRIMEM
{ 9161, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo258, -1 ,nullptr }, // Inst #9161 = VPCMPISTRIREG
{ 9162, 7, 0, 0, 397, 0|(1ULL<<MCID::MayLoad), 0x31b804d006ULL, nullptr, ImplicitList59, OperandInfo55, -1 ,nullptr }, // Inst #9162 = VPCMPISTRIrm
{ 9163, 3, 0, 0, 398, 0, 0x31b804d005ULL, nullptr, ImplicitList59, OperandInfo56, -1 ,nullptr }, // Inst #9163 = VPCMPISTRIrr
{ 9164, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo152, -1 ,nullptr }, // Inst #9164 = VPCMPISTRM128MEM
{ 9165, 4, 1, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, nullptr, ImplicitList6, OperandInfo101, -1 ,nullptr }, // Inst #9165 = VPCMPISTRM128REG
{ 9166, 7, 0, 0, 399, 0|(1ULL<<MCID::MayLoad), 0x313804d006ULL, nullptr, ImplicitList60, OperandInfo55, -1 ,nullptr }, // Inst #9166 = VPCMPISTRM128rm
{ 9167, 3, 0, 0, 400, 0, 0x313804d005ULL, nullptr, ImplicitList60, OperandInfo56, -1 ,nullptr }, // Inst #9167 = VPCMPISTRM128rr
{ 9168, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20018ff804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #9168 = VPCMPQZ128rmi
{ 9169, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20018ff804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #9169 = VPCMPQZ128rmi_alt
{ 9170, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11018ff804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #9170 = VPCMPQZ128rmib
{ 9171, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11018ff804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #9171 = VPCMPQZ128rmib_alt
{ 9172, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11218ff804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #9172 = VPCMPQZ128rmibk
{ 9173, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11218ff804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #9173 = VPCMPQZ128rmibk_alt
{ 9174, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20218ff804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #9174 = VPCMPQZ128rmik
{ 9175, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20218ff804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #9175 = VPCMPQZ128rmik_alt
{ 9176, 4, 1, 0, 568, 0, 0x20018ff804d005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr }, // Inst #9176 = VPCMPQZ128rri
{ 9177, 4, 1, 0, 568, 0, 0x20018ff804d005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr }, // Inst #9177 = VPCMPQZ128rri_alt
{ 9178, 5, 1, 0, 568, 0, 0x20218ff804d005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr }, // Inst #9178 = VPCMPQZ128rrik
{ 9179, 5, 1, 0, 568, 0, 0x20218ff804d005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr }, // Inst #9179 = VPCMPQZ128rrik_alt
{ 9180, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40098ff804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #9180 = VPCMPQZ256rmi
{ 9181, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40098ff804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #9181 = VPCMPQZ256rmi_alt
{ 9182, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11098ff804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #9182 = VPCMPQZ256rmib
{ 9183, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11098ff804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #9183 = VPCMPQZ256rmib_alt
{ 9184, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11298ff804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #9184 = VPCMPQZ256rmibk
{ 9185, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11298ff804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #9185 = VPCMPQZ256rmibk_alt
{ 9186, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40298ff804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #9186 = VPCMPQZ256rmik
{ 9187, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40298ff804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #9187 = VPCMPQZ256rmik_alt
{ 9188, 4, 1, 0, 568, 0, 0x40098ff804d005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr }, // Inst #9188 = VPCMPQZ256rri
{ 9189, 4, 1, 0, 568, 0, 0x40098ff804d005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr }, // Inst #9189 = VPCMPQZ256rri_alt
{ 9190, 5, 1, 0, 568, 0, 0x40298ff804d005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr }, // Inst #9190 = VPCMPQZ256rrik
{ 9191, 5, 1, 0, 568, 0, 0x40298ff804d005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr }, // Inst #9191 = VPCMPQZ256rrik_alt
{ 9192, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80818ff804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #9192 = VPCMPQZrmi
{ 9193, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80818ff804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #9193 = VPCMPQZrmi_alt
{ 9194, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11818ff804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #9194 = VPCMPQZrmib
{ 9195, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11818ff804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #9195 = VPCMPQZrmib_alt
{ 9196, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11a18ff804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #9196 = VPCMPQZrmibk
{ 9197, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11a18ff804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #9197 = VPCMPQZrmibk_alt
{ 9198, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a18ff804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #9198 = VPCMPQZrmik
{ 9199, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a18ff804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #9199 = VPCMPQZrmik_alt
{ 9200, 4, 1, 0, 568, 0, 0x80818ff804d005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr }, // Inst #9200 = VPCMPQZrri
{ 9201, 4, 1, 0, 568, 0, 0x80818ff804d005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr }, // Inst #9201 = VPCMPQZrri_alt
{ 9202, 5, 1, 0, 568, 0, 0x80a18ff804d005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr }, // Inst #9202 = VPCMPQZrrik
{ 9203, 5, 1, 0, 568, 0, 0x80a18ff804d005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr }, // Inst #9203 = VPCMPQZrrik_alt
{ 9204, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20011f7804d006ULL, nullptr, nullptr, OperandInfo780, -1 ,nullptr }, // Inst #9204 = VPCMPUBZ128rmi
{ 9205, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20011f7804d006ULL, nullptr, nullptr, OperandInfo780, -1 ,nullptr }, // Inst #9205 = VPCMPUBZ128rmi_alt
{ 9206, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20211f7804d006ULL, nullptr, nullptr, OperandInfo781, -1 ,nullptr }, // Inst #9206 = VPCMPUBZ128rmik
{ 9207, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20211f7804d006ULL, nullptr, nullptr, OperandInfo781, -1 ,nullptr }, // Inst #9207 = VPCMPUBZ128rmik_alt
{ 9208, 4, 1, 0, 568, 0, 0x20011f7804d005ULL, nullptr, nullptr, OperandInfo782, -1 ,nullptr }, // Inst #9208 = VPCMPUBZ128rri
{ 9209, 4, 1, 0, 568, 0, 0x20011f7804d005ULL, nullptr, nullptr, OperandInfo782, -1 ,nullptr }, // Inst #9209 = VPCMPUBZ128rri_alt
{ 9210, 5, 1, 0, 568, 0, 0x20211f7804d005ULL, nullptr, nullptr, OperandInfo783, -1 ,nullptr }, // Inst #9210 = VPCMPUBZ128rrik
{ 9211, 5, 1, 0, 568, 0, 0x20211f7804d005ULL, nullptr, nullptr, OperandInfo783, -1 ,nullptr }, // Inst #9211 = VPCMPUBZ128rrik_alt
{ 9212, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40091f7804d006ULL, nullptr, nullptr, OperandInfo784, -1 ,nullptr }, // Inst #9212 = VPCMPUBZ256rmi
{ 9213, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40091f7804d006ULL, nullptr, nullptr, OperandInfo784, -1 ,nullptr }, // Inst #9213 = VPCMPUBZ256rmi_alt
{ 9214, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40291f7804d006ULL, nullptr, nullptr, OperandInfo785, -1 ,nullptr }, // Inst #9214 = VPCMPUBZ256rmik
{ 9215, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40291f7804d006ULL, nullptr, nullptr, OperandInfo785, -1 ,nullptr }, // Inst #9215 = VPCMPUBZ256rmik_alt
{ 9216, 4, 1, 0, 568, 0, 0x40091f7804d005ULL, nullptr, nullptr, OperandInfo786, -1 ,nullptr }, // Inst #9216 = VPCMPUBZ256rri
{ 9217, 4, 1, 0, 568, 0, 0x40091f7804d005ULL, nullptr, nullptr, OperandInfo786, -1 ,nullptr }, // Inst #9217 = VPCMPUBZ256rri_alt
{ 9218, 5, 1, 0, 568, 0, 0x40291f7804d005ULL, nullptr, nullptr, OperandInfo787, -1 ,nullptr }, // Inst #9218 = VPCMPUBZ256rrik
{ 9219, 5, 1, 0, 568, 0, 0x40291f7804d005ULL, nullptr, nullptr, OperandInfo787, -1 ,nullptr }, // Inst #9219 = VPCMPUBZ256rrik_alt
{ 9220, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80811f7804d006ULL, nullptr, nullptr, OperandInfo788, -1 ,nullptr }, // Inst #9220 = VPCMPUBZrmi
{ 9221, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80811f7804d006ULL, nullptr, nullptr, OperandInfo788, -1 ,nullptr }, // Inst #9221 = VPCMPUBZrmi_alt
{ 9222, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a11f7804d006ULL, nullptr, nullptr, OperandInfo789, -1 ,nullptr }, // Inst #9222 = VPCMPUBZrmik
{ 9223, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a11f7804d006ULL, nullptr, nullptr, OperandInfo789, -1 ,nullptr }, // Inst #9223 = VPCMPUBZrmik_alt
{ 9224, 4, 1, 0, 568, 0, 0x80811f7804d005ULL, nullptr, nullptr, OperandInfo790, -1 ,nullptr }, // Inst #9224 = VPCMPUBZrri
{ 9225, 4, 1, 0, 568, 0, 0x80811f7804d005ULL, nullptr, nullptr, OperandInfo790, -1 ,nullptr }, // Inst #9225 = VPCMPUBZrri_alt
{ 9226, 5, 1, 0, 568, 0, 0x80a11f7804d005ULL, nullptr, nullptr, OperandInfo791, -1 ,nullptr }, // Inst #9226 = VPCMPUBZrrik
{ 9227, 5, 1, 0, 568, 0, 0x80a11f7804d005ULL, nullptr, nullptr, OperandInfo791, -1 ,nullptr }, // Inst #9227 = VPCMPUBZrrik_alt
{ 9228, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20010f7804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #9228 = VPCMPUDZ128rmi
{ 9229, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20010f7804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #9229 = VPCMPUDZ128rmi_alt
{ 9230, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9010f7804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #9230 = VPCMPUDZ128rmib
{ 9231, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9010f7804d006ULL, nullptr, nullptr, OperandInfo394, -1 ,nullptr }, // Inst #9231 = VPCMPUDZ128rmib_alt
{ 9232, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9210f7804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #9232 = VPCMPUDZ128rmibk
{ 9233, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9210f7804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #9233 = VPCMPUDZ128rmibk_alt
{ 9234, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20210f7804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #9234 = VPCMPUDZ128rmik
{ 9235, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20210f7804d006ULL, nullptr, nullptr, OperandInfo395, -1 ,nullptr }, // Inst #9235 = VPCMPUDZ128rmik_alt
{ 9236, 4, 1, 0, 568, 0, 0x20010f7804d005ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #9236 = VPCMPUDZ128rri
{ 9237, 4, 1, 0, 568, 0, 0x20010f7804d005ULL, nullptr, nullptr, OperandInfo396, -1 ,nullptr }, // Inst #9237 = VPCMPUDZ128rri_alt
{ 9238, 5, 1, 0, 568, 0, 0x20210f7804d005ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr }, // Inst #9238 = VPCMPUDZ128rrik
{ 9239, 5, 1, 0, 568, 0, 0x20210f7804d005ULL, nullptr, nullptr, OperandInfo397, -1 ,nullptr }, // Inst #9239 = VPCMPUDZ128rrik_alt
{ 9240, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40090f7804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #9240 = VPCMPUDZ256rmi
{ 9241, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40090f7804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #9241 = VPCMPUDZ256rmi_alt
{ 9242, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9090f7804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #9242 = VPCMPUDZ256rmib
{ 9243, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9090f7804d006ULL, nullptr, nullptr, OperandInfo398, -1 ,nullptr }, // Inst #9243 = VPCMPUDZ256rmib_alt
{ 9244, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9290f7804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #9244 = VPCMPUDZ256rmibk
{ 9245, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9290f7804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #9245 = VPCMPUDZ256rmibk_alt
{ 9246, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40290f7804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #9246 = VPCMPUDZ256rmik
{ 9247, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40290f7804d006ULL, nullptr, nullptr, OperandInfo399, -1 ,nullptr }, // Inst #9247 = VPCMPUDZ256rmik_alt
{ 9248, 4, 1, 0, 568, 0, 0x40090f7804d005ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr }, // Inst #9248 = VPCMPUDZ256rri
{ 9249, 4, 1, 0, 568, 0, 0x40090f7804d005ULL, nullptr, nullptr, OperandInfo400, -1 ,nullptr }, // Inst #9249 = VPCMPUDZ256rri_alt
{ 9250, 5, 1, 0, 568, 0, 0x40290f7804d005ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr }, // Inst #9250 = VPCMPUDZ256rrik
{ 9251, 5, 1, 0, 568, 0, 0x40290f7804d005ULL, nullptr, nullptr, OperandInfo401, -1 ,nullptr }, // Inst #9251 = VPCMPUDZ256rrik_alt
{ 9252, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80810f7804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #9252 = VPCMPUDZrmi
{ 9253, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80810f7804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #9253 = VPCMPUDZrmi_alt
{ 9254, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9810f7804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #9254 = VPCMPUDZrmib
{ 9255, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9810f7804d006ULL, nullptr, nullptr, OperandInfo402, -1 ,nullptr }, // Inst #9255 = VPCMPUDZrmib_alt
{ 9256, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9a10f7804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #9256 = VPCMPUDZrmibk
{ 9257, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x9a10f7804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #9257 = VPCMPUDZrmibk_alt
{ 9258, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a10f7804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #9258 = VPCMPUDZrmik
{ 9259, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a10f7804d006ULL, nullptr, nullptr, OperandInfo403, -1 ,nullptr }, // Inst #9259 = VPCMPUDZrmik_alt
{ 9260, 4, 1, 0, 568, 0, 0x80810f7804d005ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr }, // Inst #9260 = VPCMPUDZrri
{ 9261, 4, 1, 0, 568, 0, 0x80810f7804d005ULL, nullptr, nullptr, OperandInfo404, -1 ,nullptr }, // Inst #9261 = VPCMPUDZrri_alt
{ 9262, 5, 1, 0, 568, 0, 0x80a10f7804d005ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr }, // Inst #9262 = VPCMPUDZrrik
{ 9263, 5, 1, 0, 568, 0, 0x80a10f7804d005ULL, nullptr, nullptr, OperandInfo405, -1 ,nullptr }, // Inst #9263 = VPCMPUDZrrik_alt
{ 9264, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20018f7804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #9264 = VPCMPUQZ128rmi
{ 9265, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20018f7804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #9265 = VPCMPUQZ128rmi_alt
{ 9266, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11018f7804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #9266 = VPCMPUQZ128rmib
{ 9267, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11018f7804d006ULL, nullptr, nullptr, OperandInfo382, -1 ,nullptr }, // Inst #9267 = VPCMPUQZ128rmib_alt
{ 9268, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11218f7804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #9268 = VPCMPUQZ128rmibk
{ 9269, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11218f7804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #9269 = VPCMPUQZ128rmibk_alt
{ 9270, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20218f7804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #9270 = VPCMPUQZ128rmik
{ 9271, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20218f7804d006ULL, nullptr, nullptr, OperandInfo383, -1 ,nullptr }, // Inst #9271 = VPCMPUQZ128rmik_alt
{ 9272, 4, 1, 0, 568, 0, 0x20018f7804d005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr }, // Inst #9272 = VPCMPUQZ128rri
{ 9273, 4, 1, 0, 568, 0, 0x20018f7804d005ULL, nullptr, nullptr, OperandInfo384, -1 ,nullptr }, // Inst #9273 = VPCMPUQZ128rri_alt
{ 9274, 5, 1, 0, 568, 0, 0x20218f7804d005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr }, // Inst #9274 = VPCMPUQZ128rrik
{ 9275, 5, 1, 0, 568, 0, 0x20218f7804d005ULL, nullptr, nullptr, OperandInfo385, -1 ,nullptr }, // Inst #9275 = VPCMPUQZ128rrik_alt
{ 9276, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40098f7804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #9276 = VPCMPUQZ256rmi
{ 9277, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40098f7804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #9277 = VPCMPUQZ256rmi_alt
{ 9278, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11098f7804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #9278 = VPCMPUQZ256rmib
{ 9279, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11098f7804d006ULL, nullptr, nullptr, OperandInfo386, -1 ,nullptr }, // Inst #9279 = VPCMPUQZ256rmib_alt
{ 9280, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11298f7804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #9280 = VPCMPUQZ256rmibk
{ 9281, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11298f7804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #9281 = VPCMPUQZ256rmibk_alt
{ 9282, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40298f7804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #9282 = VPCMPUQZ256rmik
{ 9283, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40298f7804d006ULL, nullptr, nullptr, OperandInfo387, -1 ,nullptr }, // Inst #9283 = VPCMPUQZ256rmik_alt
{ 9284, 4, 1, 0, 568, 0, 0x40098f7804d005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr }, // Inst #9284 = VPCMPUQZ256rri
{ 9285, 4, 1, 0, 568, 0, 0x40098f7804d005ULL, nullptr, nullptr, OperandInfo388, -1 ,nullptr }, // Inst #9285 = VPCMPUQZ256rri_alt
{ 9286, 5, 1, 0, 568, 0, 0x40298f7804d005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr }, // Inst #9286 = VPCMPUQZ256rrik
{ 9287, 5, 1, 0, 568, 0, 0x40298f7804d005ULL, nullptr, nullptr, OperandInfo389, -1 ,nullptr }, // Inst #9287 = VPCMPUQZ256rrik_alt
{ 9288, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80818f7804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #9288 = VPCMPUQZrmi
{ 9289, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80818f7804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #9289 = VPCMPUQZrmi_alt
{ 9290, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11818f7804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #9290 = VPCMPUQZrmib
{ 9291, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11818f7804d006ULL, nullptr, nullptr, OperandInfo390, -1 ,nullptr }, // Inst #9291 = VPCMPUQZrmib_alt
{ 9292, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11a18f7804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #9292 = VPCMPUQZrmibk
{ 9293, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x11a18f7804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #9293 = VPCMPUQZrmibk_alt
{ 9294, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a18f7804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #9294 = VPCMPUQZrmik
{ 9295, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a18f7804d006ULL, nullptr, nullptr, OperandInfo391, -1 ,nullptr }, // Inst #9295 = VPCMPUQZrmik_alt
{ 9296, 4, 1, 0, 568, 0, 0x80818f7804d005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr }, // Inst #9296 = VPCMPUQZrri
{ 9297, 4, 1, 0, 568, 0, 0x80818f7804d005ULL, nullptr, nullptr, OperandInfo392, -1 ,nullptr }, // Inst #9297 = VPCMPUQZrri_alt
{ 9298, 5, 1, 0, 568, 0, 0x80a18f7804d005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr }, // Inst #9298 = VPCMPUQZrrik
{ 9299, 5, 1, 0, 568, 0, 0x80a18f7804d005ULL, nullptr, nullptr, OperandInfo393, -1 ,nullptr }, // Inst #9299 = VPCMPUQZrrik_alt
{ 9300, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20019f7804d006ULL, nullptr, nullptr, OperandInfo840, -1 ,nullptr }, // Inst #9300 = VPCMPUWZ128rmi
{ 9301, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20019f7804d006ULL, nullptr, nullptr, OperandInfo840, -1 ,nullptr }, // Inst #9301 = VPCMPUWZ128rmi_alt
{ 9302, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20219f7804d006ULL, nullptr, nullptr, OperandInfo841, -1 ,nullptr }, // Inst #9302 = VPCMPUWZ128rmik
{ 9303, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20219f7804d006ULL, nullptr, nullptr, OperandInfo841, -1 ,nullptr }, // Inst #9303 = VPCMPUWZ128rmik_alt
{ 9304, 4, 1, 0, 568, 0, 0x20019f7804d005ULL, nullptr, nullptr, OperandInfo842, -1 ,nullptr }, // Inst #9304 = VPCMPUWZ128rri
{ 9305, 4, 1, 0, 568, 0, 0x20019f7804d005ULL, nullptr, nullptr, OperandInfo842, -1 ,nullptr }, // Inst #9305 = VPCMPUWZ128rri_alt
{ 9306, 5, 1, 0, 568, 0, 0x20219f7804d005ULL, nullptr, nullptr, OperandInfo843, -1 ,nullptr }, // Inst #9306 = VPCMPUWZ128rrik
{ 9307, 5, 1, 0, 568, 0, 0x20219f7804d005ULL, nullptr, nullptr, OperandInfo843, -1 ,nullptr }, // Inst #9307 = VPCMPUWZ128rrik_alt
{ 9308, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40099f7804d006ULL, nullptr, nullptr, OperandInfo844, -1 ,nullptr }, // Inst #9308 = VPCMPUWZ256rmi
{ 9309, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40099f7804d006ULL, nullptr, nullptr, OperandInfo844, -1 ,nullptr }, // Inst #9309 = VPCMPUWZ256rmi_alt
{ 9310, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40299f7804d006ULL, nullptr, nullptr, OperandInfo845, -1 ,nullptr }, // Inst #9310 = VPCMPUWZ256rmik
{ 9311, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40299f7804d006ULL, nullptr, nullptr, OperandInfo845, -1 ,nullptr }, // Inst #9311 = VPCMPUWZ256rmik_alt
{ 9312, 4, 1, 0, 568, 0, 0x40099f7804d005ULL, nullptr, nullptr, OperandInfo846, -1 ,nullptr }, // Inst #9312 = VPCMPUWZ256rri
{ 9313, 4, 1, 0, 568, 0, 0x40099f7804d005ULL, nullptr, nullptr, OperandInfo846, -1 ,nullptr }, // Inst #9313 = VPCMPUWZ256rri_alt
{ 9314, 5, 1, 0, 568, 0, 0x40299f7804d005ULL, nullptr, nullptr, OperandInfo847, -1 ,nullptr }, // Inst #9314 = VPCMPUWZ256rrik
{ 9315, 5, 1, 0, 568, 0, 0x40299f7804d005ULL, nullptr, nullptr, OperandInfo847, -1 ,nullptr }, // Inst #9315 = VPCMPUWZ256rrik_alt
{ 9316, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80819f7804d006ULL, nullptr, nullptr, OperandInfo848, -1 ,nullptr }, // Inst #9316 = VPCMPUWZrmi
{ 9317, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80819f7804d006ULL, nullptr, nullptr, OperandInfo848, -1 ,nullptr }, // Inst #9317 = VPCMPUWZrmi_alt
{ 9318, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a19f7804d006ULL, nullptr, nullptr, OperandInfo849, -1 ,nullptr }, // Inst #9318 = VPCMPUWZrmik
{ 9319, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a19f7804d006ULL, nullptr, nullptr, OperandInfo849, -1 ,nullptr }, // Inst #9319 = VPCMPUWZrmik_alt
{ 9320, 4, 1, 0, 568, 0, 0x80819f7804d005ULL, nullptr, nullptr, OperandInfo850, -1 ,nullptr }, // Inst #9320 = VPCMPUWZrri
{ 9321, 4, 1, 0, 568, 0, 0x80819f7804d005ULL, nullptr, nullptr, OperandInfo850, -1 ,nullptr }, // Inst #9321 = VPCMPUWZrri_alt
{ 9322, 5, 1, 0, 568, 0, 0x80a19f7804d005ULL, nullptr, nullptr, OperandInfo851, -1 ,nullptr }, // Inst #9322 = VPCMPUWZrrik
{ 9323, 5, 1, 0, 568, 0, 0x80a19f7804d005ULL, nullptr, nullptr, OperandInfo851, -1 ,nullptr }, // Inst #9323 = VPCMPUWZrrik_alt
{ 9324, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20019ff804d006ULL, nullptr, nullptr, OperandInfo840, -1 ,nullptr }, // Inst #9324 = VPCMPWZ128rmi
{ 9325, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20019ff804d006ULL, nullptr, nullptr, OperandInfo840, -1 ,nullptr }, // Inst #9325 = VPCMPWZ128rmi_alt
{ 9326, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20219ff804d006ULL, nullptr, nullptr, OperandInfo841, -1 ,nullptr }, // Inst #9326 = VPCMPWZ128rmik
{ 9327, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x20219ff804d006ULL, nullptr, nullptr, OperandInfo841, -1 ,nullptr }, // Inst #9327 = VPCMPWZ128rmik_alt
{ 9328, 4, 1, 0, 568, 0, 0x20019ff804d005ULL, nullptr, nullptr, OperandInfo842, -1 ,nullptr }, // Inst #9328 = VPCMPWZ128rri
{ 9329, 4, 1, 0, 568, 0, 0x20019ff804d005ULL, nullptr, nullptr, OperandInfo842, -1 ,nullptr }, // Inst #9329 = VPCMPWZ128rri_alt
{ 9330, 5, 1, 0, 568, 0, 0x20219ff804d005ULL, nullptr, nullptr, OperandInfo843, -1 ,nullptr }, // Inst #9330 = VPCMPWZ128rrik
{ 9331, 5, 1, 0, 568, 0, 0x20219ff804d005ULL, nullptr, nullptr, OperandInfo843, -1 ,nullptr }, // Inst #9331 = VPCMPWZ128rrik_alt
{ 9332, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40099ff804d006ULL, nullptr, nullptr, OperandInfo844, -1 ,nullptr }, // Inst #9332 = VPCMPWZ256rmi
{ 9333, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40099ff804d006ULL, nullptr, nullptr, OperandInfo844, -1 ,nullptr }, // Inst #9333 = VPCMPWZ256rmi_alt
{ 9334, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40299ff804d006ULL, nullptr, nullptr, OperandInfo845, -1 ,nullptr }, // Inst #9334 = VPCMPWZ256rmik
{ 9335, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x40299ff804d006ULL, nullptr, nullptr, OperandInfo845, -1 ,nullptr }, // Inst #9335 = VPCMPWZ256rmik_alt
{ 9336, 4, 1, 0, 568, 0, 0x40099ff804d005ULL, nullptr, nullptr, OperandInfo846, -1 ,nullptr }, // Inst #9336 = VPCMPWZ256rri
{ 9337, 4, 1, 0, 568, 0, 0x40099ff804d005ULL, nullptr, nullptr, OperandInfo846, -1 ,nullptr }, // Inst #9337 = VPCMPWZ256rri_alt
{ 9338, 5, 1, 0, 568, 0, 0x40299ff804d005ULL, nullptr, nullptr, OperandInfo847, -1 ,nullptr }, // Inst #9338 = VPCMPWZ256rrik
{ 9339, 5, 1, 0, 568, 0, 0x40299ff804d005ULL, nullptr, nullptr, OperandInfo847, -1 ,nullptr }, // Inst #9339 = VPCMPWZ256rrik_alt
{ 9340, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80819ff804d006ULL, nullptr, nullptr, OperandInfo848, -1 ,nullptr }, // Inst #9340 = VPCMPWZrmi
{ 9341, 8, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80819ff804d006ULL, nullptr, nullptr, OperandInfo848, -1 ,nullptr }, // Inst #9341 = VPCMPWZrmi_alt
{ 9342, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a19ff804d006ULL, nullptr, nullptr, OperandInfo849, -1 ,nullptr }, // Inst #9342 = VPCMPWZrmik
{ 9343, 9, 1, 0, 532, 0|(1ULL<<MCID::MayLoad), 0x80a19ff804d006ULL, nullptr, nullptr, OperandInfo849, -1 ,nullptr }, // Inst #9343 = VPCMPWZrmik_alt
{ 9344, 4, 1, 0, 568, 0, 0x80819ff804d005ULL, nullptr, nullptr, OperandInfo850, -1 ,nullptr }, // Inst #9344 = VPCMPWZrri
{ 9345, 4, 1, 0, 568, 0, 0x80819ff804d005ULL, nullptr, nullptr, OperandInfo850, -1 ,nullptr }, // Inst #9345 = VPCMPWZrri_alt
{ 9346, 5, 1, 0, 568, 0, 0x80a19ff804d005ULL, nullptr, nullptr, OperandInfo851, -1 ,nullptr }, // Inst #9346 = VPCMPWZrrik
{ 9347, 5, 1, 0, 568, 0, 0x80a19ff804d005ULL, nullptr, nullptr, OperandInfo851, -1 ,nullptr }, // Inst #9347 = VPCMPWZrrik_alt
{ 9348, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x16658050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9348 = VPCOMBmi
{ 9349, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x16658050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9349 = VPCOMBmi_alt
{ 9350, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x16658050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9350 = VPCOMBri
{ 9351, 4, 1, 0, 0, 0, 0x16658050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9351 = VPCOMBri_alt
{ 9352, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x16758050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9352 = VPCOMDmi
{ 9353, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x16758050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9353 = VPCOMDmi_alt
{ 9354, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x16758050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9354 = VPCOMDri
{ 9355, 4, 1, 0, 0, 0, 0x16758050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9355 = VPCOMDri_alt
{ 9356, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80045f8009004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #9356 = VPCOMPRESSDZ128mr
{ 9357, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x82045f8009004ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #9357 = VPCOMPRESSDZ128mrk
{ 9358, 2, 1, 0, 0, 0, 0x200045f8009003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #9358 = VPCOMPRESSDZ128rr
{ 9359, 4, 1, 0, 0, 0, 0x202045f8009003ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #9359 = VPCOMPRESSDZ128rrk
{ 9360, 3, 1, 0, 0, 0, 0x206045f8009003ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #9360 = VPCOMPRESSDZ128rrkz
{ 9361, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80845f8009004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #9361 = VPCOMPRESSDZ256mr
{ 9362, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x82845f8009004ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #9362 = VPCOMPRESSDZ256mrk
{ 9363, 2, 1, 0, 0, 0, 0x400845f8009003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #9363 = VPCOMPRESSDZ256rr
{ 9364, 4, 1, 0, 0, 0, 0x402845f8009003ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #9364 = VPCOMPRESSDZ256rrk
{ 9365, 3, 1, 0, 0, 0, 0x406845f8009003ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #9365 = VPCOMPRESSDZ256rrkz
{ 9366, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x88045f8009004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #9366 = VPCOMPRESSDZmr
{ 9367, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8a045f8009004ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #9367 = VPCOMPRESSDZmrk
{ 9368, 2, 1, 0, 0, 0, 0x808045f8009003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9368 = VPCOMPRESSDZrr
{ 9369, 4, 1, 0, 0, 0, 0x80a045f8009003ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #9369 = VPCOMPRESSDZrrk
{ 9370, 3, 1, 0, 0, 0, 0x80e045f8009003ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #9370 = VPCOMPRESSDZrrkz
{ 9371, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1000c5f8009004ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #9371 = VPCOMPRESSQZ128mr
{ 9372, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1020c5f8009004ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #9372 = VPCOMPRESSQZ128mrk
{ 9373, 2, 1, 0, 0, 0, 0x2000c5f8009003ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #9373 = VPCOMPRESSQZ128rr
{ 9374, 4, 1, 0, 0, 0, 0x2020c5f8009003ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #9374 = VPCOMPRESSQZ128rrk
{ 9375, 3, 1, 0, 0, 0, 0x2060c5f8009003ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #9375 = VPCOMPRESSQZ128rrkz
{ 9376, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1008c5f8009004ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #9376 = VPCOMPRESSQZ256mr
{ 9377, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1028c5f8009004ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #9377 = VPCOMPRESSQZ256mrk
{ 9378, 2, 1, 0, 0, 0, 0x4008c5f8009003ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #9378 = VPCOMPRESSQZ256rr
{ 9379, 4, 1, 0, 0, 0, 0x4028c5f8009003ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #9379 = VPCOMPRESSQZ256rrk
{ 9380, 3, 1, 0, 0, 0, 0x4068c5f8009003ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #9380 = VPCOMPRESSQZ256rrkz
{ 9381, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x1080c5f8009004ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #9381 = VPCOMPRESSQZmr
{ 9382, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10a0c5f8009004ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #9382 = VPCOMPRESSQZmrk
{ 9383, 2, 1, 0, 0, 0, 0x8080c5f8009003ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9383 = VPCOMPRESSQZrr
{ 9384, 4, 1, 0, 0, 0, 0x80a0c5f8009003ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #9384 = VPCOMPRESSQZrrk
{ 9385, 3, 1, 0, 0, 0, 0x80e0c5f8009003ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #9385 = VPCOMPRESSQZrrkz
{ 9386, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x167d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9386 = VPCOMQmi
{ 9387, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x167d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9387 = VPCOMQmi_alt
{ 9388, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x167d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9388 = VPCOMQri
{ 9389, 4, 1, 0, 0, 0, 0x167d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9389 = VPCOMQri_alt
{ 9390, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x17658050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9390 = VPCOMUBmi
{ 9391, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x17658050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9391 = VPCOMUBmi_alt
{ 9392, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x17658050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9392 = VPCOMUBri
{ 9393, 4, 1, 0, 0, 0, 0x17658050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9393 = VPCOMUBri_alt
{ 9394, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x17758050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9394 = VPCOMUDmi
{ 9395, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x17758050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9395 = VPCOMUDmi_alt
{ 9396, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x17758050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9396 = VPCOMUDri
{ 9397, 4, 1, 0, 0, 0, 0x17758050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9397 = VPCOMUDri_alt
{ 9398, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x177d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9398 = VPCOMUQmi
{ 9399, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x177d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9399 = VPCOMUQmi_alt
{ 9400, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x177d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9400 = VPCOMUQri
{ 9401, 4, 1, 0, 0, 0, 0x177d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9401 = VPCOMUQri_alt
{ 9402, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x176d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9402 = VPCOMUWmi
{ 9403, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x176d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9403 = VPCOMUWmi_alt
{ 9404, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x176d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9404 = VPCOMUWri
{ 9405, 4, 1, 0, 0, 0, 0x176d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9405 = VPCOMUWri_alt
{ 9406, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x166d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9406 = VPCOMWmi
{ 9407, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x166d8050806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #9407 = VPCOMWmi_alt
{ 9408, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x166d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9408 = VPCOMWri
{ 9409, 4, 1, 0, 0, 0, 0x166d8050805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #9409 = VPCOMWri_alt
{ 9410, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20006278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #9410 = VPCONFLICTDZ128rm
{ 9411, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9006278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #9411 = VPCONFLICTDZ128rmb
{ 9412, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9206278009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #9412 = VPCONFLICTDZ128rmbk
{ 9413, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9606278009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #9413 = VPCONFLICTDZ128rmbkz
{ 9414, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20206278009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #9414 = VPCONFLICTDZ128rmk
{ 9415, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20606278009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #9415 = VPCONFLICTDZ128rmkz
{ 9416, 2, 1, 0, 0, 0, 0x20006278009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #9416 = VPCONFLICTDZ128rr
{ 9417, 4, 1, 0, 0, 0, 0x20206278009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #9417 = VPCONFLICTDZ128rrk
{ 9418, 3, 1, 0, 0, 0, 0x20606278009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #9418 = VPCONFLICTDZ128rrkz
{ 9419, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40086278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #9419 = VPCONFLICTDZ256rm
{ 9420, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9086278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #9420 = VPCONFLICTDZ256rmb
{ 9421, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9286278009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #9421 = VPCONFLICTDZ256rmbk
{ 9422, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9686278009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #9422 = VPCONFLICTDZ256rmbkz
{ 9423, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40286278009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #9423 = VPCONFLICTDZ256rmk
{ 9424, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40686278009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #9424 = VPCONFLICTDZ256rmkz
{ 9425, 2, 1, 0, 0, 0, 0x40086278009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #9425 = VPCONFLICTDZ256rr
{ 9426, 4, 1, 0, 0, 0, 0x40286278009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #9426 = VPCONFLICTDZ256rrk
{ 9427, 3, 1, 0, 0, 0, 0x40686278009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #9427 = VPCONFLICTDZ256rrkz
{ 9428, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80806278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #9428 = VPCONFLICTDZrm
{ 9429, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9806278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #9429 = VPCONFLICTDZrmb
{ 9430, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a06278009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #9430 = VPCONFLICTDZrmbk
{ 9431, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e06278009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #9431 = VPCONFLICTDZrmbkz
{ 9432, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a06278009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #9432 = VPCONFLICTDZrmk
{ 9433, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e06278009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #9433 = VPCONFLICTDZrmkz
{ 9434, 2, 1, 0, 0, 0, 0x80806278009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9434 = VPCONFLICTDZrr
{ 9435, 4, 1, 0, 0, 0, 0x80a06278009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #9435 = VPCONFLICTDZrrk
{ 9436, 3, 1, 0, 0, 0, 0x80e06278009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #9436 = VPCONFLICTDZrrkz
{ 9437, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000e278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #9437 = VPCONFLICTQZ128rm
{ 9438, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100e278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #9438 = VPCONFLICTQZ128rmb
{ 9439, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120e278009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #9439 = VPCONFLICTQZ128rmbk
{ 9440, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160e278009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #9440 = VPCONFLICTQZ128rmbkz
{ 9441, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020e278009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #9441 = VPCONFLICTQZ128rmk
{ 9442, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060e278009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #9442 = VPCONFLICTQZ128rmkz
{ 9443, 2, 1, 0, 0, 0, 0x2000e278009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #9443 = VPCONFLICTQZ128rr
{ 9444, 4, 1, 0, 0, 0, 0x2020e278009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #9444 = VPCONFLICTQZ128rrk
{ 9445, 3, 1, 0, 0, 0, 0x2060e278009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #9445 = VPCONFLICTQZ128rrkz
{ 9446, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008e278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #9446 = VPCONFLICTQZ256rm
{ 9447, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108e278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #9447 = VPCONFLICTQZ256rmb
{ 9448, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128e278009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #9448 = VPCONFLICTQZ256rmbk
{ 9449, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168e278009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #9449 = VPCONFLICTQZ256rmbkz
{ 9450, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028e278009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #9450 = VPCONFLICTQZ256rmk
{ 9451, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068e278009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #9451 = VPCONFLICTQZ256rmkz
{ 9452, 2, 1, 0, 0, 0, 0x4008e278009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #9452 = VPCONFLICTQZ256rr
{ 9453, 4, 1, 0, 0, 0, 0x4028e278009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #9453 = VPCONFLICTQZ256rrk
{ 9454, 3, 1, 0, 0, 0, 0x4068e278009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #9454 = VPCONFLICTQZ256rrkz
{ 9455, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080e278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #9455 = VPCONFLICTQZrm
{ 9456, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180e278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #9456 = VPCONFLICTQZrmb
{ 9457, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0e278009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #9457 = VPCONFLICTQZrmbk
{ 9458, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0e278009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #9458 = VPCONFLICTQZrmbkz
{ 9459, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0e278009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #9459 = VPCONFLICTQZrmk
{ 9460, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0e278009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #9460 = VPCONFLICTQZrmkz
{ 9461, 2, 1, 0, 0, 0, 0x8080e278009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #9461 = VPCONFLICTQZrr
{ 9462, 4, 1, 0, 0, 0, 0x80a0e278009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #9462 = VPCONFLICTQZrrk
{ 9463, 3, 1, 0, 0, 0, 0x80e0e278009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #9463 = VPCONFLICTQZrrkz
{ 9464, 8, 1, 0, 842, 0|(1ULL<<MCID::MayLoad), 0x9032804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9464 = VPERM2F128rm
{ 9465, 4, 1, 0, 841, 0|(1ULL<<MCID::Commutable), 0x9032804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #9465 = VPERM2F128rr
{ 9466, 8, 1, 0, 547, 0|(1ULL<<MCID::MayLoad), 0x9233804d006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #9466 = VPERM2I128rm
{ 9467, 4, 1, 0, 544, 0|(1ULL<<MCID::Commutable), 0x9233804d005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #9467 = VPERM2I128rr
{ 9468, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200146f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #9468 = VPERMBZ128rm
{ 9469, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202146f8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #9469 = VPERMBZ128rmk
{ 9470, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206146f8009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #9470 = VPERMBZ128rmkz
{ 9471, 3, 1, 0, 0, 0, 0x200146f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #9471 = VPERMBZ128rr
{ 9472, 5, 1, 0, 0, 0, 0x202146f8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #9472 = VPERMBZ128rrk
{ 9473, 4, 1, 0, 0, 0, 0x206146f8009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #9473 = VPERMBZ128rrkz
{ 9474, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400946f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9474 = VPERMBZ256rm
{ 9475, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402946f8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #9475 = VPERMBZ256rmk
{ 9476, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406946f8009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #9476 = VPERMBZ256rmkz
{ 9477, 3, 1, 0, 0, 0, 0x400946f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #9477 = VPERMBZ256rr
{ 9478, 5, 1, 0, 0, 0, 0x402946f8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #9478 = VPERMBZ256rrk
{ 9479, 4, 1, 0, 0, 0, 0x406946f8009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #9479 = VPERMBZ256rrkz
{ 9480, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808146f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9480 = VPERMBZrm
{ 9481, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a146f8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #9481 = VPERMBZrmk
{ 9482, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e146f8009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #9482 = VPERMBZrmkz
{ 9483, 3, 1, 0, 0, 0, 0x808146f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #9483 = VPERMBZrr
{ 9484, 5, 1, 0, 0, 0, 0x80a146f8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #9484 = VPERMBZrrk
{ 9485, 4, 1, 0, 0, 0, 0x80e146f8009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #9485 = VPERMBZrrkz
{ 9486, 7, 1, 0, 547, 0|(1ULL<<MCID::MayLoad), 0x91b38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9486 = VPERMDYrm
{ 9487, 3, 1, 0, 544, 0, 0x91b38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9487 = VPERMDYrr
{ 9488, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9488 = VPERMDZ256rm
{ 9489, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9091b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9489 = VPERMDZ256rmb
{ 9490, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9291b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9490 = VPERMDZ256rmbk
{ 9491, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9691b78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #9491 = VPERMDZ256rmbkz
{ 9492, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9492 = VPERMDZ256rmk
{ 9493, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691b78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #9493 = VPERMDZ256rmkz
{ 9494, 3, 1, 0, 0, 0, 0x40091b78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #9494 = VPERMDZ256rr
{ 9495, 5, 1, 0, 0, 0, 0x40291b78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9495 = VPERMDZ256rrk
{ 9496, 4, 1, 0, 0, 0, 0x40691b78009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #9496 = VPERMDZ256rrkz
{ 9497, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9497 = VPERMDZrm
{ 9498, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9811b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9498 = VPERMDZrmb
{ 9499, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a11b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9499 = VPERMDZrmbk
{ 9500, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e11b78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #9500 = VPERMDZrmbkz
{ 9501, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9501 = VPERMDZrmk
{ 9502, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11b78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #9502 = VPERMDZrmkz
{ 9503, 3, 1, 0, 0, 0, 0x80811b78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #9503 = VPERMDZrr
{ 9504, 5, 1, 0, 0, 0, 0x80a11b78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9504 = VPERMDZrrk
{ 9505, 4, 1, 0, 0, 0, 0x80e11b78009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #9505 = VPERMDZrrkz
{ 9506, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013af8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9506 = VPERMI2B128rm
{ 9507, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213af8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #9507 = VPERMI2B128rmk
{ 9508, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613af8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #9508 = VPERMI2B128rmkz
{ 9509, 4, 1, 0, 0, 0, 0x20013af8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9509 = VPERMI2B128rr
{ 9510, 5, 1, 0, 0, 0, 0x20213af8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #9510 = VPERMI2B128rrk
{ 9511, 5, 1, 0, 0, 0, 0x20613af8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #9511 = VPERMI2B128rrkz
{ 9512, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093af8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9512 = VPERMI2B256rm
{ 9513, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293af8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #9513 = VPERMI2B256rmk
{ 9514, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693af8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #9514 = VPERMI2B256rmkz
{ 9515, 4, 1, 0, 0, 0, 0x40093af8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9515 = VPERMI2B256rr
{ 9516, 5, 1, 0, 0, 0, 0x40293af8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #9516 = VPERMI2B256rrk
{ 9517, 5, 1, 0, 0, 0, 0x40693af8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #9517 = VPERMI2B256rrkz
{ 9518, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813af8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9518 = VPERMI2Brm
{ 9519, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13af8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #9519 = VPERMI2Brmk
{ 9520, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13af8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #9520 = VPERMI2Brmkz
{ 9521, 4, 1, 0, 0, 0, 0x80813af8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9521 = VPERMI2Brr
{ 9522, 5, 1, 0, 0, 0, 0x80a13af8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #9522 = VPERMI2Brrk
{ 9523, 5, 1, 0, 0, 0, 0x80e13af8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #9523 = VPERMI2Brrkz
{ 9524, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013b78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9524 = VPERMI2D128rm
{ 9525, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9013b78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9525 = VPERMI2D128rmb
{ 9526, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213b78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9526 = VPERMI2D128rmbk
{ 9527, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9613b78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9527 = VPERMI2D128rmbkz
{ 9528, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213b78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9528 = VPERMI2D128rmk
{ 9529, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613b78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9529 = VPERMI2D128rmkz
{ 9530, 4, 1, 0, 0, 0, 0x20013b78009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9530 = VPERMI2D128rr
{ 9531, 5, 1, 0, 0, 0, 0x20213b78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9531 = VPERMI2D128rrk
{ 9532, 5, 1, 0, 0, 0, 0x20613b78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9532 = VPERMI2D128rrkz
{ 9533, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093b78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9533 = VPERMI2D256rm
{ 9534, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9093b78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9534 = VPERMI2D256rmb
{ 9535, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9535 = VPERMI2D256rmbk
{ 9536, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9693b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9536 = VPERMI2D256rmbkz
{ 9537, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9537 = VPERMI2D256rmk
{ 9538, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9538 = VPERMI2D256rmkz
{ 9539, 4, 1, 0, 0, 0, 0x40093b78009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9539 = VPERMI2D256rr
{ 9540, 5, 1, 0, 0, 0, 0x40293b78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9540 = VPERMI2D256rrk
{ 9541, 5, 1, 0, 0, 0, 0x40693b78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9541 = VPERMI2D256rrkz
{ 9542, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813b78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9542 = VPERMI2Drm
{ 9543, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9813b78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9543 = VPERMI2Drmb
{ 9544, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9544 = VPERMI2Drmbk
{ 9545, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e13b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9545 = VPERMI2Drmbkz
{ 9546, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9546 = VPERMI2Drmk
{ 9547, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9547 = VPERMI2Drmkz
{ 9548, 4, 1, 0, 0, 0, 0x80813b78009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9548 = VPERMI2Drr
{ 9549, 5, 1, 0, 0, 0, 0x80a13b78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9549 = VPERMI2Drrk
{ 9550, 5, 1, 0, 0, 0, 0x80e13b78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9550 = VPERMI2Drrkz
{ 9551, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001bbf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9551 = VPERMI2PD128rm
{ 9552, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101bbf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9552 = VPERMI2PD128rmb
{ 9553, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121bbf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9553 = VPERMI2PD128rmbk
{ 9554, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161bbf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9554 = VPERMI2PD128rmbkz
{ 9555, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021bbf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9555 = VPERMI2PD128rmk
{ 9556, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061bbf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9556 = VPERMI2PD128rmkz
{ 9557, 4, 1, 0, 0, 0, 0x2001bbf8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9557 = VPERMI2PD128rr
{ 9558, 5, 1, 0, 0, 0, 0x2021bbf8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9558 = VPERMI2PD128rrk
{ 9559, 5, 1, 0, 0, 0, 0x2061bbf8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9559 = VPERMI2PD128rrkz
{ 9560, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009bbf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9560 = VPERMI2PD256rm
{ 9561, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109bbf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9561 = VPERMI2PD256rmb
{ 9562, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129bbf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9562 = VPERMI2PD256rmbk
{ 9563, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169bbf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9563 = VPERMI2PD256rmbkz
{ 9564, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029bbf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9564 = VPERMI2PD256rmk
{ 9565, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069bbf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9565 = VPERMI2PD256rmkz
{ 9566, 4, 1, 0, 0, 0, 0x4009bbf8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9566 = VPERMI2PD256rr
{ 9567, 5, 1, 0, 0, 0, 0x4029bbf8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9567 = VPERMI2PD256rrk
{ 9568, 5, 1, 0, 0, 0, 0x4069bbf8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9568 = VPERMI2PD256rrkz
{ 9569, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081bbf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9569 = VPERMI2PDrm
{ 9570, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181bbf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9570 = VPERMI2PDrmb
{ 9571, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1bbf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9571 = VPERMI2PDrmbk
{ 9572, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1bbf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9572 = VPERMI2PDrmbkz
{ 9573, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1bbf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9573 = VPERMI2PDrmk
{ 9574, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1bbf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9574 = VPERMI2PDrmkz
{ 9575, 4, 1, 0, 0, 0, 0x8081bbf8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9575 = VPERMI2PDrr
{ 9576, 5, 1, 0, 0, 0, 0x80a1bbf8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9576 = VPERMI2PDrrk
{ 9577, 5, 1, 0, 0, 0, 0x80e1bbf8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9577 = VPERMI2PDrrkz
{ 9578, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013bf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9578 = VPERMI2PS128rm
{ 9579, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9013bf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9579 = VPERMI2PS128rmb
{ 9580, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213bf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9580 = VPERMI2PS128rmbk
{ 9581, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9613bf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9581 = VPERMI2PS128rmbkz
{ 9582, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213bf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9582 = VPERMI2PS128rmk
{ 9583, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613bf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9583 = VPERMI2PS128rmkz
{ 9584, 4, 1, 0, 0, 0, 0x20013bf8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9584 = VPERMI2PS128rr
{ 9585, 5, 1, 0, 0, 0, 0x20213bf8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9585 = VPERMI2PS128rrk
{ 9586, 5, 1, 0, 0, 0, 0x20613bf8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9586 = VPERMI2PS128rrkz
{ 9587, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093bf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9587 = VPERMI2PS256rm
{ 9588, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9093bf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9588 = VPERMI2PS256rmb
{ 9589, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293bf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9589 = VPERMI2PS256rmbk
{ 9590, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9693bf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9590 = VPERMI2PS256rmbkz
{ 9591, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293bf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9591 = VPERMI2PS256rmk
{ 9592, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693bf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9592 = VPERMI2PS256rmkz
{ 9593, 4, 1, 0, 0, 0, 0x40093bf8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9593 = VPERMI2PS256rr
{ 9594, 5, 1, 0, 0, 0, 0x40293bf8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9594 = VPERMI2PS256rrk
{ 9595, 5, 1, 0, 0, 0, 0x40693bf8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9595 = VPERMI2PS256rrkz
{ 9596, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813bf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9596 = VPERMI2PSrm
{ 9597, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9813bf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9597 = VPERMI2PSrmb
{ 9598, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13bf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9598 = VPERMI2PSrmbk
{ 9599, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e13bf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9599 = VPERMI2PSrmbkz
{ 9600, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13bf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9600 = VPERMI2PSrmk
{ 9601, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13bf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9601 = VPERMI2PSrmkz
{ 9602, 4, 1, 0, 0, 0, 0x80813bf8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9602 = VPERMI2PSrr
{ 9603, 5, 1, 0, 0, 0, 0x80a13bf8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9603 = VPERMI2PSrrk
{ 9604, 5, 1, 0, 0, 0, 0x80e13bf8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9604 = VPERMI2PSrrkz
{ 9605, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001bb78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9605 = VPERMI2Q128rm
{ 9606, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101bb78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9606 = VPERMI2Q128rmb
{ 9607, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121bb78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9607 = VPERMI2Q128rmbk
{ 9608, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161bb78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9608 = VPERMI2Q128rmbkz
{ 9609, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021bb78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9609 = VPERMI2Q128rmk
{ 9610, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061bb78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9610 = VPERMI2Q128rmkz
{ 9611, 4, 1, 0, 0, 0, 0x2001bb78009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9611 = VPERMI2Q128rr
{ 9612, 5, 1, 0, 0, 0, 0x2021bb78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9612 = VPERMI2Q128rrk
{ 9613, 5, 1, 0, 0, 0, 0x2061bb78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9613 = VPERMI2Q128rrkz
{ 9614, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009bb78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9614 = VPERMI2Q256rm
{ 9615, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109bb78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9615 = VPERMI2Q256rmb
{ 9616, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129bb78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9616 = VPERMI2Q256rmbk
{ 9617, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169bb78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9617 = VPERMI2Q256rmbkz
{ 9618, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029bb78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9618 = VPERMI2Q256rmk
{ 9619, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069bb78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9619 = VPERMI2Q256rmkz
{ 9620, 4, 1, 0, 0, 0, 0x4009bb78009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9620 = VPERMI2Q256rr
{ 9621, 5, 1, 0, 0, 0, 0x4029bb78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9621 = VPERMI2Q256rrk
{ 9622, 5, 1, 0, 0, 0, 0x4069bb78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9622 = VPERMI2Q256rrkz
{ 9623, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081bb78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9623 = VPERMI2Qrm
{ 9624, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181bb78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9624 = VPERMI2Qrmb
{ 9625, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1bb78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9625 = VPERMI2Qrmbk
{ 9626, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1bb78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9626 = VPERMI2Qrmbkz
{ 9627, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1bb78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9627 = VPERMI2Qrmk
{ 9628, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1bb78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9628 = VPERMI2Qrmkz
{ 9629, 4, 1, 0, 0, 0, 0x8081bb78009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9629 = VPERMI2Qrr
{ 9630, 5, 1, 0, 0, 0, 0x80a1bb78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9630 = VPERMI2Qrrk
{ 9631, 5, 1, 0, 0, 0, 0x80e1bb78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9631 = VPERMI2Qrrkz
{ 9632, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001baf8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9632 = VPERMI2W128rm
{ 9633, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021baf8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #9633 = VPERMI2W128rmk
{ 9634, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061baf8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #9634 = VPERMI2W128rmkz
{ 9635, 4, 1, 0, 0, 0, 0x2001baf8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9635 = VPERMI2W128rr
{ 9636, 5, 1, 0, 0, 0, 0x2021baf8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #9636 = VPERMI2W128rrk
{ 9637, 5, 1, 0, 0, 0, 0x2061baf8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #9637 = VPERMI2W128rrkz
{ 9638, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009baf8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9638 = VPERMI2W256rm
{ 9639, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029baf8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #9639 = VPERMI2W256rmk
{ 9640, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069baf8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #9640 = VPERMI2W256rmkz
{ 9641, 4, 1, 0, 0, 0, 0x4009baf8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9641 = VPERMI2W256rr
{ 9642, 5, 1, 0, 0, 0, 0x4029baf8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #9642 = VPERMI2W256rrk
{ 9643, 5, 1, 0, 0, 0, 0x4069baf8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #9643 = VPERMI2W256rrkz
{ 9644, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081baf8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9644 = VPERMI2Wrm
{ 9645, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1baf8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #9645 = VPERMI2Wrmk
{ 9646, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1baf8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #9646 = VPERMI2Wrmkz
{ 9647, 4, 1, 0, 0, 0, 0x8081baf8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9647 = VPERMI2Wrr
{ 9648, 5, 1, 0, 0, 0, 0x80a1baf8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #9648 = VPERMI2Wrrk
{ 9649, 5, 1, 0, 0, 0, 0x80e1baf8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #9649 = VPERMI2Wrrkz
{ 9650, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x524b004d006ULL, nullptr, nullptr, OperandInfo852, -1 ,nullptr }, // Inst #9650 = VPERMIL2PDmr
{ 9651, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xd24b004d006ULL, nullptr, nullptr, OperandInfo853, -1 ,nullptr }, // Inst #9651 = VPERMIL2PDmrY
{ 9652, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20005a4b004d006ULL, nullptr, nullptr, OperandInfo854, -1 ,nullptr }, // Inst #9652 = VPERMIL2PDrm
{ 9653, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000da4b004d006ULL, nullptr, nullptr, OperandInfo855, -1 ,nullptr }, // Inst #9653 = VPERMIL2PDrmY
{ 9654, 5, 1, 0, 0, 0, 0x524b004d005ULL, nullptr, nullptr, OperandInfo856, -1 ,nullptr }, // Inst #9654 = VPERMIL2PDrr
{ 9655, 5, 1, 0, 0, 0, 0xd24b004d005ULL, nullptr, nullptr, OperandInfo857, -1 ,nullptr }, // Inst #9655 = VPERMIL2PDrrY
{ 9656, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x5242804d006ULL, nullptr, nullptr, OperandInfo852, -1 ,nullptr }, // Inst #9656 = VPERMIL2PSmr
{ 9657, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0xd242804d006ULL, nullptr, nullptr, OperandInfo853, -1 ,nullptr }, // Inst #9657 = VPERMIL2PSmrY
{ 9658, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20005a42804d006ULL, nullptr, nullptr, OperandInfo854, -1 ,nullptr }, // Inst #9658 = VPERMIL2PSrm
{ 9659, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000da42804d006ULL, nullptr, nullptr, OperandInfo855, -1 ,nullptr }, // Inst #9659 = VPERMIL2PSrmY
{ 9660, 5, 1, 0, 0, 0, 0x5242804d005ULL, nullptr, nullptr, OperandInfo856, -1 ,nullptr }, // Inst #9660 = VPERMIL2PSrr
{ 9661, 5, 1, 0, 0, 0, 0xd242804d005ULL, nullptr, nullptr, OperandInfo857, -1 ,nullptr }, // Inst #9661 = VPERMIL2PSrrY
{ 9662, 7, 1, 0, 529, 0|(1ULL<<MCID::MayLoad), 0x802b004d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #9662 = VPERMILPDYmi
{ 9663, 3, 1, 0, 531, 0, 0x802b004d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #9663 = VPERMILPDYri
{ 9664, 7, 1, 0, 546, 0|(1ULL<<MCID::MayLoad), 0x906b0009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9664 = VPERMILPDYrm
{ 9665, 3, 1, 0, 531, 0, 0x906b0009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9665 = VPERMILPDYrr
{ 9666, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110082f804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #9666 = VPERMILPDZ128mbi
{ 9667, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112082f804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #9667 = VPERMILPDZ128mbik
{ 9668, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116082f804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #9668 = VPERMILPDZ128mbikz
{ 9669, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200082f804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #9669 = VPERMILPDZ128mi
{ 9670, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202082f804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #9670 = VPERMILPDZ128mik
{ 9671, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206082f804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #9671 = VPERMILPDZ128mikz
{ 9672, 3, 1, 0, 0, 0, 0x200082f804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #9672 = VPERMILPDZ128ri
{ 9673, 5, 1, 0, 0, 0, 0x202082f804d005ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #9673 = VPERMILPDZ128rik
{ 9674, 4, 1, 0, 0, 0, 0x206082f804d005ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #9674 = VPERMILPDZ128rikz
{ 9675, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200186e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #9675 = VPERMILPDZ128rm
{ 9676, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110186e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #9676 = VPERMILPDZ128rmb
{ 9677, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112186e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9677 = VPERMILPDZ128rmbk
{ 9678, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116186e0009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #9678 = VPERMILPDZ128rmbkz
{ 9679, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202186e0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9679 = VPERMILPDZ128rmk
{ 9680, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206186e0009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #9680 = VPERMILPDZ128rmkz
{ 9681, 3, 1, 0, 0, 0, 0x200186e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #9681 = VPERMILPDZ128rr
{ 9682, 5, 1, 0, 0, 0, 0x202186e0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9682 = VPERMILPDZ128rrk
{ 9683, 4, 1, 0, 0, 0, 0x206186e0009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #9683 = VPERMILPDZ128rrkz
{ 9684, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110882f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #9684 = VPERMILPDZ256mbi
{ 9685, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112882f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #9685 = VPERMILPDZ256mbik
{ 9686, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116882f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #9686 = VPERMILPDZ256mbikz
{ 9687, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400882f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #9687 = VPERMILPDZ256mi
{ 9688, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402882f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #9688 = VPERMILPDZ256mik
{ 9689, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406882f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #9689 = VPERMILPDZ256mikz
{ 9690, 3, 1, 0, 0, 0, 0x400882f804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #9690 = VPERMILPDZ256ri
{ 9691, 5, 1, 0, 0, 0, 0x402882f804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #9691 = VPERMILPDZ256rik
{ 9692, 4, 1, 0, 0, 0, 0x406882f804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #9692 = VPERMILPDZ256rikz
{ 9693, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400986e0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9693 = VPERMILPDZ256rm
{ 9694, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110986e0009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9694 = VPERMILPDZ256rmb
{ 9695, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112986e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9695 = VPERMILPDZ256rmbk
{ 9696, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116986e0009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #9696 = VPERMILPDZ256rmbkz
{ 9697, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402986e0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9697 = VPERMILPDZ256rmk
{ 9698, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406986e0009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #9698 = VPERMILPDZ256rmkz
{ 9699, 3, 1, 0, 0, 0, 0x400986e0009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #9699 = VPERMILPDZ256rr
{ 9700, 5, 1, 0, 0, 0, 0x402986e0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9700 = VPERMILPDZ256rrk
{ 9701, 4, 1, 0, 0, 0, 0x406986e0009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #9701 = VPERMILPDZ256rrkz
{ 9702, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118082f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #9702 = VPERMILPDZmbi
{ 9703, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a082f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #9703 = VPERMILPDZmbik
{ 9704, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e082f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #9704 = VPERMILPDZmbikz
{ 9705, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808082f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #9705 = VPERMILPDZmi
{ 9706, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a082f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #9706 = VPERMILPDZmik
{ 9707, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e082f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #9707 = VPERMILPDZmikz
{ 9708, 3, 1, 0, 0, 0, 0x808082f804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #9708 = VPERMILPDZri
{ 9709, 5, 1, 0, 0, 0, 0x80a082f804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #9709 = VPERMILPDZrik
{ 9710, 4, 1, 0, 0, 0, 0x80e082f804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #9710 = VPERMILPDZrikz
{ 9711, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808186e0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9711 = VPERMILPDZrm
{ 9712, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118186e0009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9712 = VPERMILPDZrmb
{ 9713, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a186e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9713 = VPERMILPDZrmbk
{ 9714, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e186e0009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #9714 = VPERMILPDZrmbkz
{ 9715, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a186e0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9715 = VPERMILPDZrmk
{ 9716, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e186e0009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #9716 = VPERMILPDZrmkz
{ 9717, 3, 1, 0, 0, 0, 0x808186e0009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #9717 = VPERMILPDZrr
{ 9718, 5, 1, 0, 0, 0, 0x80a186e0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9718 = VPERMILPDZrrk
{ 9719, 4, 1, 0, 0, 0, 0x80e186e0009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #9719 = VPERMILPDZrrkz
{ 9720, 7, 1, 0, 529, 0|(1ULL<<MCID::MayLoad), 0x2b004d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #9720 = VPERMILPDmi
{ 9721, 3, 1, 0, 531, 0, 0x2b004d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #9721 = VPERMILPDri
{ 9722, 7, 1, 0, 546, 0|(1ULL<<MCID::MayLoad), 0x106b0009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9722 = VPERMILPDrm
{ 9723, 3, 1, 0, 531, 0, 0x106b0009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9723 = VPERMILPDrr
{ 9724, 7, 1, 0, 529, 0|(1ULL<<MCID::MayLoad), 0x8022804d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #9724 = VPERMILPSYmi
{ 9725, 3, 1, 0, 531, 0, 0x8022804d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #9725 = VPERMILPSYri
{ 9726, 7, 1, 0, 546, 0|(1ULL<<MCID::MayLoad), 0x90628009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9726 = VPERMILPSYrm
{ 9727, 3, 1, 0, 531, 0, 0x90628009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9727 = VPERMILPSYrr
{ 9728, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x900027804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #9728 = VPERMILPSZ128mbi
{ 9729, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x920027804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #9729 = VPERMILPSZ128mbik
{ 9730, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x960027804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #9730 = VPERMILPSZ128mbikz
{ 9731, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000027804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #9731 = VPERMILPSZ128mi
{ 9732, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020027804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #9732 = VPERMILPSZ128mik
{ 9733, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060027804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #9733 = VPERMILPSZ128mikz
{ 9734, 3, 1, 0, 0, 0, 0x2000027804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #9734 = VPERMILPSZ128ri
{ 9735, 5, 1, 0, 0, 0, 0x2020027804d005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #9735 = VPERMILPSZ128rik
{ 9736, 4, 1, 0, 0, 0, 0x2060027804d005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #9736 = VPERMILPSZ128rikz
{ 9737, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20010660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #9737 = VPERMILPSZ128rm
{ 9738, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9010660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #9738 = VPERMILPSZ128rmb
{ 9739, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9210660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9739 = VPERMILPSZ128rmbk
{ 9740, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9610660009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #9740 = VPERMILPSZ128rmbkz
{ 9741, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20210660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9741 = VPERMILPSZ128rmk
{ 9742, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20610660009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #9742 = VPERMILPSZ128rmkz
{ 9743, 3, 1, 0, 0, 0, 0x20010660009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #9743 = VPERMILPSZ128rr
{ 9744, 5, 1, 0, 0, 0, 0x20210660009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9744 = VPERMILPSZ128rrk
{ 9745, 4, 1, 0, 0, 0, 0x20610660009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #9745 = VPERMILPSZ128rrkz
{ 9746, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x908027804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #9746 = VPERMILPSZ256mbi
{ 9747, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x928027804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #9747 = VPERMILPSZ256mbik
{ 9748, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x968027804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #9748 = VPERMILPSZ256mbikz
{ 9749, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008027804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #9749 = VPERMILPSZ256mi
{ 9750, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028027804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #9750 = VPERMILPSZ256mik
{ 9751, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068027804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #9751 = VPERMILPSZ256mikz
{ 9752, 3, 1, 0, 0, 0, 0x4008027804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #9752 = VPERMILPSZ256ri
{ 9753, 5, 1, 0, 0, 0, 0x4028027804d005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #9753 = VPERMILPSZ256rik
{ 9754, 4, 1, 0, 0, 0, 0x4068027804d005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #9754 = VPERMILPSZ256rikz
{ 9755, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40090660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9755 = VPERMILPSZ256rm
{ 9756, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9090660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9756 = VPERMILPSZ256rmb
{ 9757, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9290660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9757 = VPERMILPSZ256rmbk
{ 9758, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9690660009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #9758 = VPERMILPSZ256rmbkz
{ 9759, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40290660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9759 = VPERMILPSZ256rmk
{ 9760, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40690660009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #9760 = VPERMILPSZ256rmkz
{ 9761, 3, 1, 0, 0, 0, 0x40090660009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #9761 = VPERMILPSZ256rr
{ 9762, 5, 1, 0, 0, 0, 0x40290660009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9762 = VPERMILPSZ256rrk
{ 9763, 4, 1, 0, 0, 0, 0x40690660009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #9763 = VPERMILPSZ256rrkz
{ 9764, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x980027804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #9764 = VPERMILPSZmbi
{ 9765, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a0027804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #9765 = VPERMILPSZmbik
{ 9766, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e0027804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #9766 = VPERMILPSZmbikz
{ 9767, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080027804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #9767 = VPERMILPSZmi
{ 9768, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0027804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #9768 = VPERMILPSZmik
{ 9769, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0027804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #9769 = VPERMILPSZmikz
{ 9770, 3, 1, 0, 0, 0, 0x8080027804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #9770 = VPERMILPSZri
{ 9771, 5, 1, 0, 0, 0, 0x80a0027804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #9771 = VPERMILPSZrik
{ 9772, 4, 1, 0, 0, 0, 0x80e0027804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #9772 = VPERMILPSZrikz
{ 9773, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80810660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9773 = VPERMILPSZrm
{ 9774, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9810660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9774 = VPERMILPSZrmb
{ 9775, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a10660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9775 = VPERMILPSZrmbk
{ 9776, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e10660009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #9776 = VPERMILPSZrmbkz
{ 9777, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a10660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9777 = VPERMILPSZrmk
{ 9778, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e10660009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #9778 = VPERMILPSZrmkz
{ 9779, 3, 1, 0, 0, 0, 0x80810660009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #9779 = VPERMILPSZrr
{ 9780, 5, 1, 0, 0, 0, 0x80a10660009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9780 = VPERMILPSZrrk
{ 9781, 4, 1, 0, 0, 0, 0x80e10660009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #9781 = VPERMILPSZrrkz
{ 9782, 7, 1, 0, 529, 0|(1ULL<<MCID::MayLoad), 0x22804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #9782 = VPERMILPSmi
{ 9783, 3, 1, 0, 531, 0, 0x22804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #9783 = VPERMILPSri
{ 9784, 7, 1, 0, 546, 0|(1ULL<<MCID::MayLoad), 0x10628009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #9784 = VPERMILPSrm
{ 9785, 3, 1, 0, 531, 0, 0x10628009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #9785 = VPERMILPSrr
{ 9786, 7, 1, 0, 569, 0|(1ULL<<MCID::MayLoad), 0x880b004d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #9786 = VPERMPDYmi
{ 9787, 3, 1, 0, 530, 0, 0x880b004d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #9787 = VPERMPDYri
{ 9788, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110880f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #9788 = VPERMPDZ256mbi
{ 9789, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112880f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #9789 = VPERMPDZ256mbik
{ 9790, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116880f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #9790 = VPERMPDZ256mbikz
{ 9791, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400880f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #9791 = VPERMPDZ256mi
{ 9792, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402880f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #9792 = VPERMPDZ256mik
{ 9793, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406880f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #9793 = VPERMPDZ256mikz
{ 9794, 3, 1, 0, 0, 0, 0x400880f804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #9794 = VPERMPDZ256ri
{ 9795, 5, 1, 0, 0, 0, 0x402880f804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #9795 = VPERMPDZ256rik
{ 9796, 4, 1, 0, 0, 0, 0x406880f804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #9796 = VPERMPDZ256rikz
{ 9797, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40098b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9797 = VPERMPDZ256rm
{ 9798, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11098b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9798 = VPERMPDZ256rmb
{ 9799, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11298b78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9799 = VPERMPDZ256rmbk
{ 9800, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11698b78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #9800 = VPERMPDZ256rmbkz
{ 9801, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40298b78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9801 = VPERMPDZ256rmk
{ 9802, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40698b78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #9802 = VPERMPDZ256rmkz
{ 9803, 3, 1, 0, 0, 0, 0x40098b78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #9803 = VPERMPDZ256rr
{ 9804, 5, 1, 0, 0, 0, 0x40298b78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9804 = VPERMPDZ256rrk
{ 9805, 4, 1, 0, 0, 0, 0x40698b78009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #9805 = VPERMPDZ256rrkz
{ 9806, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118080f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #9806 = VPERMPDZmbi
{ 9807, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a080f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #9807 = VPERMPDZmbik
{ 9808, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e080f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #9808 = VPERMPDZmbikz
{ 9809, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808080f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #9809 = VPERMPDZmi
{ 9810, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a080f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #9810 = VPERMPDZmik
{ 9811, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e080f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #9811 = VPERMPDZmikz
{ 9812, 3, 1, 0, 0, 0, 0x808080f804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #9812 = VPERMPDZri
{ 9813, 5, 1, 0, 0, 0, 0x80a080f804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #9813 = VPERMPDZrik
{ 9814, 4, 1, 0, 0, 0, 0x80e080f804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #9814 = VPERMPDZrikz
{ 9815, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80818b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9815 = VPERMPDZrm
{ 9816, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11818b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9816 = VPERMPDZrmb
{ 9817, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a18b78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9817 = VPERMPDZrmbk
{ 9818, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e18b78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #9818 = VPERMPDZrmbkz
{ 9819, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a18b78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9819 = VPERMPDZrmk
{ 9820, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e18b78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #9820 = VPERMPDZrmkz
{ 9821, 3, 1, 0, 0, 0, 0x80818b78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #9821 = VPERMPDZrr
{ 9822, 5, 1, 0, 0, 0, 0x80a18b78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9822 = VPERMPDZrrk
{ 9823, 4, 1, 0, 0, 0, 0x80e18b78009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #9823 = VPERMPDZrrkz
{ 9824, 7, 1, 0, 569, 0|(1ULL<<MCID::MayLoad), 0x90b28009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #9824 = VPERMPSYrm
{ 9825, 3, 1, 0, 530, 0, 0x90b28009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #9825 = VPERMPSYrr
{ 9826, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40090b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9826 = VPERMPSZ256rm
{ 9827, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9090b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9827 = VPERMPSZ256rmb
{ 9828, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9290b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9828 = VPERMPSZ256rmbk
{ 9829, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9690b78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #9829 = VPERMPSZ256rmbkz
{ 9830, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40290b78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9830 = VPERMPSZ256rmk
{ 9831, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40690b78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #9831 = VPERMPSZ256rmkz
{ 9832, 3, 1, 0, 0, 0, 0x40090b78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #9832 = VPERMPSZ256rr
{ 9833, 5, 1, 0, 0, 0, 0x40290b78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9833 = VPERMPSZ256rrk
{ 9834, 4, 1, 0, 0, 0, 0x40690b78009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #9834 = VPERMPSZ256rrkz
{ 9835, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80810b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9835 = VPERMPSZrm
{ 9836, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9810b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9836 = VPERMPSZrmb
{ 9837, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a10b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9837 = VPERMPSZrmbk
{ 9838, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e10b78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #9838 = VPERMPSZrmbkz
{ 9839, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a10b78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9839 = VPERMPSZrmk
{ 9840, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e10b78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #9840 = VPERMPSZrmkz
{ 9841, 3, 1, 0, 0, 0, 0x80810b78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #9841 = VPERMPSZrr
{ 9842, 5, 1, 0, 0, 0, 0x80a10b78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9842 = VPERMPSZrrk
{ 9843, 4, 1, 0, 0, 0, 0x80e10b78009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #9843 = VPERMPSZrrkz
{ 9844, 7, 1, 0, 547, 0|(1ULL<<MCID::MayLoad), 0x8803804d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #9844 = VPERMQYmi
{ 9845, 3, 1, 0, 544, 0, 0x8803804d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #9845 = VPERMQYri
{ 9846, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108807804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #9846 = VPERMQZ256mbi
{ 9847, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128807804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #9847 = VPERMQZ256mbik
{ 9848, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168807804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #9848 = VPERMQZ256mbikz
{ 9849, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008807804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #9849 = VPERMQZ256mi
{ 9850, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028807804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #9850 = VPERMQZ256mik
{ 9851, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068807804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #9851 = VPERMQZ256mikz
{ 9852, 3, 1, 0, 0, 0, 0x4008807804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #9852 = VPERMQZ256ri
{ 9853, 5, 1, 0, 0, 0, 0x4028807804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #9853 = VPERMQZ256rik
{ 9854, 4, 1, 0, 0, 0, 0x4068807804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #9854 = VPERMQZ256rikz
{ 9855, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9855 = VPERMQZ256rm
{ 9856, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11099b78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #9856 = VPERMQZ256rmb
{ 9857, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11299b78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9857 = VPERMQZ256rmbk
{ 9858, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11699b78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #9858 = VPERMQZ256rmbkz
{ 9859, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299b78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9859 = VPERMQZ256rmk
{ 9860, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40699b78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #9860 = VPERMQZ256rmkz
{ 9861, 3, 1, 0, 0, 0, 0x40099b78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #9861 = VPERMQZ256rr
{ 9862, 5, 1, 0, 0, 0, 0x40299b78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9862 = VPERMQZ256rrk
{ 9863, 4, 1, 0, 0, 0, 0x40699b78009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #9863 = VPERMQZ256rrkz
{ 9864, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180807804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #9864 = VPERMQZmbi
{ 9865, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0807804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #9865 = VPERMQZmbik
{ 9866, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0807804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #9866 = VPERMQZmbikz
{ 9867, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080807804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #9867 = VPERMQZmi
{ 9868, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0807804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #9868 = VPERMQZmik
{ 9869, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0807804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #9869 = VPERMQZmikz
{ 9870, 3, 1, 0, 0, 0, 0x8080807804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #9870 = VPERMQZri
{ 9871, 5, 1, 0, 0, 0, 0x80a0807804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #9871 = VPERMQZrik
{ 9872, 4, 1, 0, 0, 0, 0x80e0807804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #9872 = VPERMQZrikz
{ 9873, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9873 = VPERMQZrm
{ 9874, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11819b78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #9874 = VPERMQZrmb
{ 9875, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a19b78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9875 = VPERMQZrmbk
{ 9876, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e19b78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #9876 = VPERMQZrmbkz
{ 9877, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19b78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9877 = VPERMQZrmk
{ 9878, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e19b78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #9878 = VPERMQZrmkz
{ 9879, 3, 1, 0, 0, 0, 0x80819b78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #9879 = VPERMQZrr
{ 9880, 5, 1, 0, 0, 0, 0x80a19b78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9880 = VPERMQZrrk
{ 9881, 4, 1, 0, 0, 0, 0x80e19b78009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #9881 = VPERMQZrrkz
{ 9882, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013ef8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9882 = VPERMT2B128rm
{ 9883, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213ef8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #9883 = VPERMT2B128rmk
{ 9884, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613ef8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #9884 = VPERMT2B128rmkz
{ 9885, 4, 1, 0, 0, 0, 0x20013ef8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9885 = VPERMT2B128rr
{ 9886, 5, 1, 0, 0, 0, 0x20213ef8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #9886 = VPERMT2B128rrk
{ 9887, 5, 1, 0, 0, 0, 0x20613ef8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #9887 = VPERMT2B128rrkz
{ 9888, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093ef8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9888 = VPERMT2B256rm
{ 9889, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293ef8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #9889 = VPERMT2B256rmk
{ 9890, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693ef8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #9890 = VPERMT2B256rmkz
{ 9891, 4, 1, 0, 0, 0, 0x40093ef8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9891 = VPERMT2B256rr
{ 9892, 5, 1, 0, 0, 0, 0x40293ef8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #9892 = VPERMT2B256rrk
{ 9893, 5, 1, 0, 0, 0, 0x40693ef8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #9893 = VPERMT2B256rrkz
{ 9894, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813ef8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9894 = VPERMT2Brm
{ 9895, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13ef8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #9895 = VPERMT2Brmk
{ 9896, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13ef8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #9896 = VPERMT2Brmkz
{ 9897, 4, 1, 0, 0, 0, 0x80813ef8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9897 = VPERMT2Brr
{ 9898, 5, 1, 0, 0, 0, 0x80a13ef8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #9898 = VPERMT2Brrk
{ 9899, 5, 1, 0, 0, 0, 0x80e13ef8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #9899 = VPERMT2Brrkz
{ 9900, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013f78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9900 = VPERMT2D128rm
{ 9901, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9013f78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9901 = VPERMT2D128rmb
{ 9902, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213f78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9902 = VPERMT2D128rmbk
{ 9903, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9613f78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9903 = VPERMT2D128rmbkz
{ 9904, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213f78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9904 = VPERMT2D128rmk
{ 9905, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613f78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9905 = VPERMT2D128rmkz
{ 9906, 4, 1, 0, 0, 0, 0x20013f78009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9906 = VPERMT2D128rr
{ 9907, 5, 1, 0, 0, 0, 0x20213f78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9907 = VPERMT2D128rrk
{ 9908, 5, 1, 0, 0, 0, 0x20613f78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9908 = VPERMT2D128rrkz
{ 9909, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093f78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9909 = VPERMT2D256rm
{ 9910, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9093f78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9910 = VPERMT2D256rmb
{ 9911, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293f78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9911 = VPERMT2D256rmbk
{ 9912, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9693f78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9912 = VPERMT2D256rmbkz
{ 9913, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293f78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9913 = VPERMT2D256rmk
{ 9914, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693f78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9914 = VPERMT2D256rmkz
{ 9915, 4, 1, 0, 0, 0, 0x40093f78009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9915 = VPERMT2D256rr
{ 9916, 5, 1, 0, 0, 0, 0x40293f78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9916 = VPERMT2D256rrk
{ 9917, 5, 1, 0, 0, 0, 0x40693f78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9917 = VPERMT2D256rrkz
{ 9918, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813f78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9918 = VPERMT2Drm
{ 9919, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9813f78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9919 = VPERMT2Drmb
{ 9920, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13f78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9920 = VPERMT2Drmbk
{ 9921, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e13f78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9921 = VPERMT2Drmbkz
{ 9922, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13f78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9922 = VPERMT2Drmk
{ 9923, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13f78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9923 = VPERMT2Drmkz
{ 9924, 4, 1, 0, 0, 0, 0x80813f78009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9924 = VPERMT2Drr
{ 9925, 5, 1, 0, 0, 0, 0x80a13f78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9925 = VPERMT2Drrk
{ 9926, 5, 1, 0, 0, 0, 0x80e13f78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9926 = VPERMT2Drrkz
{ 9927, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001bff8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9927 = VPERMT2PD128rm
{ 9928, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101bff8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9928 = VPERMT2PD128rmb
{ 9929, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121bff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9929 = VPERMT2PD128rmbk
{ 9930, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161bff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9930 = VPERMT2PD128rmbkz
{ 9931, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021bff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9931 = VPERMT2PD128rmk
{ 9932, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061bff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9932 = VPERMT2PD128rmkz
{ 9933, 4, 1, 0, 0, 0, 0x2001bff8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9933 = VPERMT2PD128rr
{ 9934, 5, 1, 0, 0, 0, 0x2021bff8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9934 = VPERMT2PD128rrk
{ 9935, 5, 1, 0, 0, 0, 0x2061bff8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9935 = VPERMT2PD128rrkz
{ 9936, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009bff8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9936 = VPERMT2PD256rm
{ 9937, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109bff8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9937 = VPERMT2PD256rmb
{ 9938, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129bff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9938 = VPERMT2PD256rmbk
{ 9939, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169bff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9939 = VPERMT2PD256rmbkz
{ 9940, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029bff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9940 = VPERMT2PD256rmk
{ 9941, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069bff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9941 = VPERMT2PD256rmkz
{ 9942, 4, 1, 0, 0, 0, 0x4009bff8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9942 = VPERMT2PD256rr
{ 9943, 5, 1, 0, 0, 0, 0x4029bff8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9943 = VPERMT2PD256rrk
{ 9944, 5, 1, 0, 0, 0, 0x4069bff8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9944 = VPERMT2PD256rrkz
{ 9945, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081bff8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9945 = VPERMT2PDrm
{ 9946, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181bff8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9946 = VPERMT2PDrmb
{ 9947, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1bff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9947 = VPERMT2PDrmbk
{ 9948, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1bff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9948 = VPERMT2PDrmbkz
{ 9949, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1bff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9949 = VPERMT2PDrmk
{ 9950, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1bff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #9950 = VPERMT2PDrmkz
{ 9951, 4, 1, 0, 0, 0, 0x8081bff8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9951 = VPERMT2PDrr
{ 9952, 5, 1, 0, 0, 0, 0x80a1bff8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9952 = VPERMT2PDrrk
{ 9953, 5, 1, 0, 0, 0, 0x80e1bff8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #9953 = VPERMT2PDrrkz
{ 9954, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013ff8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9954 = VPERMT2PS128rm
{ 9955, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9013ff8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9955 = VPERMT2PS128rmb
{ 9956, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9956 = VPERMT2PS128rmbk
{ 9957, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9613ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9957 = VPERMT2PS128rmbkz
{ 9958, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9958 = VPERMT2PS128rmk
{ 9959, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #9959 = VPERMT2PS128rmkz
{ 9960, 4, 1, 0, 0, 0, 0x20013ff8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9960 = VPERMT2PS128rr
{ 9961, 5, 1, 0, 0, 0, 0x20213ff8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9961 = VPERMT2PS128rrk
{ 9962, 5, 1, 0, 0, 0, 0x20613ff8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #9962 = VPERMT2PS128rrkz
{ 9963, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093ff8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9963 = VPERMT2PS256rm
{ 9964, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9093ff8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9964 = VPERMT2PS256rmb
{ 9965, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9965 = VPERMT2PS256rmbk
{ 9966, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9693ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9966 = VPERMT2PS256rmbkz
{ 9967, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9967 = VPERMT2PS256rmk
{ 9968, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #9968 = VPERMT2PS256rmkz
{ 9969, 4, 1, 0, 0, 0, 0x40093ff8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9969 = VPERMT2PS256rr
{ 9970, 5, 1, 0, 0, 0, 0x40293ff8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9970 = VPERMT2PS256rrk
{ 9971, 5, 1, 0, 0, 0, 0x40693ff8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #9971 = VPERMT2PS256rrkz
{ 9972, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813ff8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9972 = VPERMT2PSrm
{ 9973, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9813ff8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9973 = VPERMT2PSrmb
{ 9974, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9974 = VPERMT2PSrmbk
{ 9975, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e13ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9975 = VPERMT2PSrmbkz
{ 9976, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9976 = VPERMT2PSrmk
{ 9977, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #9977 = VPERMT2PSrmkz
{ 9978, 4, 1, 0, 0, 0, 0x80813ff8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #9978 = VPERMT2PSrr
{ 9979, 5, 1, 0, 0, 0, 0x80a13ff8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9979 = VPERMT2PSrrk
{ 9980, 5, 1, 0, 0, 0, 0x80e13ff8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #9980 = VPERMT2PSrrkz
{ 9981, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001bf78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9981 = VPERMT2Q128rm
{ 9982, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101bf78009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #9982 = VPERMT2Q128rmb
{ 9983, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121bf78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9983 = VPERMT2Q128rmbk
{ 9984, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161bf78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9984 = VPERMT2Q128rmbkz
{ 9985, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021bf78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9985 = VPERMT2Q128rmk
{ 9986, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061bf78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #9986 = VPERMT2Q128rmkz
{ 9987, 4, 1, 0, 0, 0, 0x2001bf78009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #9987 = VPERMT2Q128rr
{ 9988, 5, 1, 0, 0, 0, 0x2021bf78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9988 = VPERMT2Q128rrk
{ 9989, 5, 1, 0, 0, 0, 0x2061bf78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #9989 = VPERMT2Q128rrkz
{ 9990, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009bf78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9990 = VPERMT2Q256rm
{ 9991, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109bf78009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #9991 = VPERMT2Q256rmb
{ 9992, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129bf78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9992 = VPERMT2Q256rmbk
{ 9993, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169bf78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9993 = VPERMT2Q256rmbkz
{ 9994, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029bf78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9994 = VPERMT2Q256rmk
{ 9995, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069bf78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #9995 = VPERMT2Q256rmkz
{ 9996, 4, 1, 0, 0, 0, 0x4009bf78009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #9996 = VPERMT2Q256rr
{ 9997, 5, 1, 0, 0, 0, 0x4029bf78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9997 = VPERMT2Q256rrk
{ 9998, 5, 1, 0, 0, 0, 0x4069bf78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #9998 = VPERMT2Q256rrkz
{ 9999, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081bf78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #9999 = VPERMT2Qrm
{ 10000, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181bf78009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #10000 = VPERMT2Qrmb
{ 10001, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1bf78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10001 = VPERMT2Qrmbk
{ 10002, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1bf78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10002 = VPERMT2Qrmbkz
{ 10003, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1bf78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10003 = VPERMT2Qrmk
{ 10004, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1bf78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10004 = VPERMT2Qrmkz
{ 10005, 4, 1, 0, 0, 0, 0x8081bf78009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #10005 = VPERMT2Qrr
{ 10006, 5, 1, 0, 0, 0, 0x80a1bf78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10006 = VPERMT2Qrrk
{ 10007, 5, 1, 0, 0, 0, 0x80e1bf78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10007 = VPERMT2Qrrkz
{ 10008, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001bef8009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #10008 = VPERMT2W128rm
{ 10009, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021bef8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #10009 = VPERMT2W128rmk
{ 10010, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061bef8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #10010 = VPERMT2W128rmkz
{ 10011, 4, 1, 0, 0, 0, 0x2001bef8009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #10011 = VPERMT2W128rr
{ 10012, 5, 1, 0, 0, 0, 0x2021bef8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #10012 = VPERMT2W128rrk
{ 10013, 5, 1, 0, 0, 0, 0x2061bef8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #10013 = VPERMT2W128rrkz
{ 10014, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009bef8009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #10014 = VPERMT2W256rm
{ 10015, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029bef8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #10015 = VPERMT2W256rmk
{ 10016, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069bef8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #10016 = VPERMT2W256rmkz
{ 10017, 4, 1, 0, 0, 0, 0x4009bef8009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #10017 = VPERMT2W256rr
{ 10018, 5, 1, 0, 0, 0, 0x4029bef8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #10018 = VPERMT2W256rrk
{ 10019, 5, 1, 0, 0, 0, 0x4069bef8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #10019 = VPERMT2W256rrkz
{ 10020, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081bef8009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #10020 = VPERMT2Wrm
{ 10021, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1bef8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #10021 = VPERMT2Wrmk
{ 10022, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1bef8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #10022 = VPERMT2Wrmkz
{ 10023, 4, 1, 0, 0, 0, 0x8081bef8009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #10023 = VPERMT2Wrr
{ 10024, 5, 1, 0, 0, 0, 0x80a1bef8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #10024 = VPERMT2Wrrk
{ 10025, 5, 1, 0, 0, 0, 0x80e1bef8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #10025 = VPERMT2Wrrkz
{ 10026, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001c6f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10026 = VPERMWZ128rm
{ 10027, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021c6f8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #10027 = VPERMWZ128rmk
{ 10028, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061c6f8009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #10028 = VPERMWZ128rmkz
{ 10029, 3, 1, 0, 0, 0, 0x2001c6f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10029 = VPERMWZ128rr
{ 10030, 5, 1, 0, 0, 0, 0x2021c6f8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #10030 = VPERMWZ128rrk
{ 10031, 4, 1, 0, 0, 0, 0x2061c6f8009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #10031 = VPERMWZ128rrkz
{ 10032, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009c6f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10032 = VPERMWZ256rm
{ 10033, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029c6f8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #10033 = VPERMWZ256rmk
{ 10034, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069c6f8009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #10034 = VPERMWZ256rmkz
{ 10035, 3, 1, 0, 0, 0, 0x4009c6f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10035 = VPERMWZ256rr
{ 10036, 5, 1, 0, 0, 0, 0x4029c6f8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #10036 = VPERMWZ256rrk
{ 10037, 4, 1, 0, 0, 0, 0x4069c6f8009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #10037 = VPERMWZ256rrkz
{ 10038, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081c6f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10038 = VPERMWZrm
{ 10039, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1c6f8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #10039 = VPERMWZrmk
{ 10040, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1c6f8009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #10040 = VPERMWZrmkz
{ 10041, 3, 1, 0, 0, 0, 0x8081c6f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10041 = VPERMWZrr
{ 10042, 5, 1, 0, 0, 0, 0x80a1c6f8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #10042 = VPERMWZrrk
{ 10043, 4, 1, 0, 0, 0, 0x80e1c6f8009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #10043 = VPERMWZrrkz
{ 10044, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80044f8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #10044 = VPEXPANDDZ128rm
{ 10045, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82044f8009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #10045 = VPEXPANDDZ128rmk
{ 10046, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86044f8009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #10046 = VPEXPANDDZ128rmkz
{ 10047, 2, 1, 0, 0, 0, 0x200044f8009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10047 = VPEXPANDDZ128rr
{ 10048, 4, 1, 0, 0, 0, 0x202044f8009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #10048 = VPEXPANDDZ128rrk
{ 10049, 3, 1, 0, 0, 0, 0x206044f8009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #10049 = VPEXPANDDZ128rrkz
{ 10050, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80844f8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #10050 = VPEXPANDDZ256rm
{ 10051, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82844f8009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #10051 = VPEXPANDDZ256rmk
{ 10052, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86844f8009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #10052 = VPEXPANDDZ256rmkz
{ 10053, 2, 1, 0, 0, 0, 0x400844f8009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #10053 = VPEXPANDDZ256rr
{ 10054, 4, 1, 0, 0, 0, 0x402844f8009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #10054 = VPEXPANDDZ256rrk
{ 10055, 3, 1, 0, 0, 0, 0x406844f8009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #10055 = VPEXPANDDZ256rrkz
{ 10056, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x88044f8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #10056 = VPEXPANDDZrm
{ 10057, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8a044f8009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #10057 = VPEXPANDDZrmk
{ 10058, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8e044f8009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #10058 = VPEXPANDDZrmkz
{ 10059, 2, 1, 0, 0, 0, 0x808044f8009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10059 = VPEXPANDDZrr
{ 10060, 4, 1, 0, 0, 0, 0x80a044f8009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #10060 = VPEXPANDDZrrk
{ 10061, 3, 1, 0, 0, 0, 0x80e044f8009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #10061 = VPEXPANDDZrrkz
{ 10062, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1000c4f8009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #10062 = VPEXPANDQZ128rm
{ 10063, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1020c4f8009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #10063 = VPEXPANDQZ128rmk
{ 10064, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1060c4f8009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #10064 = VPEXPANDQZ128rmkz
{ 10065, 2, 1, 0, 0, 0, 0x2000c4f8009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10065 = VPEXPANDQZ128rr
{ 10066, 4, 1, 0, 0, 0, 0x2020c4f8009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #10066 = VPEXPANDQZ128rrk
{ 10067, 3, 1, 0, 0, 0, 0x2060c4f8009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #10067 = VPEXPANDQZ128rrkz
{ 10068, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1008c4f8009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #10068 = VPEXPANDQZ256rm
{ 10069, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1028c4f8009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #10069 = VPEXPANDQZ256rmk
{ 10070, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1068c4f8009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #10070 = VPEXPANDQZ256rmkz
{ 10071, 2, 1, 0, 0, 0, 0x4008c4f8009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #10071 = VPEXPANDQZ256rr
{ 10072, 4, 1, 0, 0, 0, 0x4028c4f8009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #10072 = VPEXPANDQZ256rrk
{ 10073, 3, 1, 0, 0, 0, 0x4068c4f8009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #10073 = VPEXPANDQZ256rrkz
{ 10074, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1080c4f8009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #10074 = VPEXPANDQZrm
{ 10075, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a0c4f8009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #10075 = VPEXPANDQZrmk
{ 10076, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10e0c4f8009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #10076 = VPEXPANDQZrmkz
{ 10077, 2, 1, 0, 0, 0, 0x8080c4f8009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10077 = VPEXPANDQZrr
{ 10078, 4, 1, 0, 0, 0, 0x80a0c4f8009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #10078 = VPEXPANDQZrrk
{ 10079, 3, 1, 0, 0, 0, 0x80e0c4f8009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #10079 = VPEXPANDQZrrkz
{ 10080, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x2000a7804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr }, // Inst #10080 = VPEXTRBZmr
{ 10081, 3, 1, 0, 0, 0, 0x20000a7804d003ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #10081 = VPEXTRBZrr
{ 10082, 7, 0, 0, 401, 0|(1ULL<<MCID::MayStore), 0xa3804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #10082 = VPEXTRBmr
{ 10083, 3, 1, 0, 276, 0, 0xa3804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #10083 = VPEXTRBrr
{ 10084, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8000b7804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr }, // Inst #10084 = VPEXTRDZmr
{ 10085, 3, 1, 0, 0, 0, 0x20000b7804d003ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #10085 = VPEXTRDZrr
{ 10086, 7, 0, 0, 401, 0|(1ULL<<MCID::MayStore), 0xb3804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #10086 = VPEXTRDmr
{ 10087, 3, 1, 0, 276, 0, 0xb3804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #10087 = VPEXTRDrr
{ 10088, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10008b7804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr }, // Inst #10088 = VPEXTRQZmr
{ 10089, 3, 1, 0, 0, 0, 0x20008b7804d003ULL, nullptr, nullptr, OperandInfo483, -1 ,nullptr }, // Inst #10089 = VPEXTRQZrr
{ 10090, 7, 0, 0, 401, 0|(1ULL<<MCID::MayStore), 0x8b3806d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #10090 = VPEXTRQmr
{ 10091, 3, 1, 0, 276, 0, 0x8b3806d003ULL, nullptr, nullptr, OperandInfo259, -1 ,nullptr }, // Inst #10091 = VPEXTRQrr
{ 10092, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4000af804d004ULL, nullptr, nullptr, OperandInfo466, -1 ,nullptr }, // Inst #10092 = VPEXTRWZmr
{ 10093, 3, 1, 0, 0, 0, 0x200062f8045005ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #10093 = VPEXTRWZrr
{ 10094, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x20000af804d003ULL, nullptr, nullptr, OperandInfo485, -1 ,nullptr }, // Inst #10094 = VPEXTRWZrr_REV
{ 10095, 7, 0, 0, 401, 0|(1ULL<<MCID::MayStore), 0xab804d004ULL, nullptr, nullptr, OperandInfo135, -1 ,nullptr }, // Inst #10095 = VPEXTRWmr
{ 10096, 3, 1, 0, 276, 0, 0x62b8045005ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #10096 = VPEXTRWri
{ 10097, 3, 1, 0, 276, 0, 0xab804d003ULL, nullptr, nullptr, OperandInfo136, -1 ,nullptr }, // Inst #10097 = VPEXTRWrr_REV
{ 10098, 9, 2, 0, 812, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xa4838009006ULL, nullptr, nullptr, OperandInfo595, -1 ,nullptr }, // Inst #10098 = VPGATHERDDYrm
{ 10099, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8204878009006ULL, nullptr, nullptr, OperandInfo596, -1 ,nullptr }, // Inst #10099 = VPGATHERDDZ128rm
{ 10100, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8284878009006ULL, nullptr, nullptr, OperandInfo597, -1 ,nullptr }, // Inst #10100 = VPGATHERDDZ256rm
{ 10101, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8a04878009006ULL, nullptr, nullptr, OperandInfo598, -1 ,nullptr }, // Inst #10101 = VPGATHERDDZrm
{ 10102, 9, 2, 0, 811, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x24838009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr }, // Inst #10102 = VPGATHERDDrm
{ 10103, 9, 2, 0, 816, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xac838009006ULL, nullptr, nullptr, OperandInfo590, -1 ,nullptr }, // Inst #10103 = VPGATHERDQYrm
{ 10104, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1020c878009006ULL, nullptr, nullptr, OperandInfo591, -1 ,nullptr }, // Inst #10104 = VPGATHERDQZ128rm
{ 10105, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1028c878009006ULL, nullptr, nullptr, OperandInfo592, -1 ,nullptr }, // Inst #10105 = VPGATHERDQZ256rm
{ 10106, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a0c878009006ULL, nullptr, nullptr, OperandInfo593, -1 ,nullptr }, // Inst #10106 = VPGATHERDQZrm
{ 10107, 9, 2, 0, 815, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2c838009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr }, // Inst #10107 = VPGATHERDQrm
{ 10108, 9, 2, 0, 814, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xa48b8009006ULL, nullptr, nullptr, OperandInfo604, -1 ,nullptr }, // Inst #10108 = VPGATHERQDYrm
{ 10109, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82048f8009006ULL, nullptr, nullptr, OperandInfo596, -1 ,nullptr }, // Inst #10109 = VPGATHERQDZ128rm
{ 10110, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82848f8009006ULL, nullptr, nullptr, OperandInfo605, -1 ,nullptr }, // Inst #10110 = VPGATHERQDZ256rm
{ 10111, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8a048f8009006ULL, nullptr, nullptr, OperandInfo606, -1 ,nullptr }, // Inst #10111 = VPGATHERQDZrm
{ 10112, 9, 2, 0, 813, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x248b8009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr }, // Inst #10112 = VPGATHERQDrm
{ 10113, 9, 2, 0, 818, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0xac8b8009006ULL, nullptr, nullptr, OperandInfo595, -1 ,nullptr }, // Inst #10113 = VPGATHERQQYrm
{ 10114, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1020c8f8009006ULL, nullptr, nullptr, OperandInfo591, -1 ,nullptr }, // Inst #10114 = VPGATHERQQZ128rm
{ 10115, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1028c8f8009006ULL, nullptr, nullptr, OperandInfo602, -1 ,nullptr }, // Inst #10115 = VPGATHERQQZ256rm
{ 10116, 9, 2, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a0c8f8009006ULL, nullptr, nullptr, OperandInfo603, -1 ,nullptr }, // Inst #10116 = VPGATHERQQZrm
{ 10117, 9, 2, 0, 817, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x2c8b8009006ULL, nullptr, nullptr, OperandInfo594, -1 ,nullptr }, // Inst #10117 = VPGATHERQQrm
{ 10118, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6158014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10118 = VPHADDBDrm
{ 10119, 2, 1, 0, 0, 0, 0x6158014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10119 = VPHADDBDrr
{ 10120, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x61d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10120 = VPHADDBQrm
{ 10121, 2, 1, 0, 0, 0, 0x61d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10121 = VPHADDBQrr
{ 10122, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x60d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10122 = VPHADDBWrm
{ 10123, 2, 1, 0, 0, 0, 0x60d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10123 = VPHADDBWrr
{ 10124, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x65d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10124 = VPHADDDQrm
{ 10125, 2, 1, 0, 0, 0, 0x65d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10125 = VPHADDDQrr
{ 10126, 7, 1, 0, 828, 0|(1ULL<<MCID::MayLoad), 0x90138009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10126 = VPHADDDYrm
{ 10127, 3, 1, 0, 823, 0, 0x90138009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10127 = VPHADDDYrr
{ 10128, 7, 1, 0, 826, 0|(1ULL<<MCID::MayLoad), 0x10138009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10128 = VPHADDDrm
{ 10129, 3, 1, 0, 821, 0, 0x10138009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10129 = VPHADDDrr
{ 10130, 7, 1, 0, 827, 0|(1ULL<<MCID::MayLoad), 0x101b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10130 = VPHADDSWrm128
{ 10131, 7, 1, 0, 827, 0|(1ULL<<MCID::MayLoad), 0x901b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10131 = VPHADDSWrm256
{ 10132, 3, 1, 0, 822, 0, 0x101b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10132 = VPHADDSWrr128
{ 10133, 3, 1, 0, 822, 0, 0x901b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10133 = VPHADDSWrr256
{ 10134, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6958014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10134 = VPHADDUBDrm
{ 10135, 2, 1, 0, 0, 0, 0x6958014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10135 = VPHADDUBDrr
{ 10136, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x69d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10136 = VPHADDUBQrm
{ 10137, 2, 1, 0, 0, 0, 0x69d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10137 = VPHADDUBQrr
{ 10138, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x68d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10138 = VPHADDUBWrm
{ 10139, 2, 1, 0, 0, 0, 0x68d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10139 = VPHADDUBWrr
{ 10140, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6dd8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10140 = VPHADDUDQrm
{ 10141, 2, 1, 0, 0, 0, 0x6dd8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10141 = VPHADDUDQrr
{ 10142, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6b58014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10142 = VPHADDUWDrm
{ 10143, 2, 1, 0, 0, 0, 0x6b58014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10143 = VPHADDUWDrr
{ 10144, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6bd8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10144 = VPHADDUWQrm
{ 10145, 2, 1, 0, 0, 0, 0x6bd8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10145 = VPHADDUWQrr
{ 10146, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6358014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10146 = VPHADDWDrm
{ 10147, 2, 1, 0, 0, 0, 0x6358014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10147 = VPHADDWDrr
{ 10148, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x63d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10148 = VPHADDWQrm
{ 10149, 2, 1, 0, 0, 0, 0x63d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10149 = VPHADDWQrr
{ 10150, 7, 1, 0, 828, 0|(1ULL<<MCID::MayLoad), 0x900b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10150 = VPHADDWYrm
{ 10151, 3, 1, 0, 823, 0, 0x900b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10151 = VPHADDWYrr
{ 10152, 7, 1, 0, 828, 0|(1ULL<<MCID::MayLoad), 0x100b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10152 = VPHADDWrm
{ 10153, 3, 1, 0, 823, 0, 0x100b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10153 = VPHADDWrr
{ 10154, 6, 1, 0, 407, 0|(1ULL<<MCID::MayLoad), 0x20b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10154 = VPHMINPOSUWrm128
{ 10155, 2, 1, 0, 408, 0, 0x20b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10155 = VPHMINPOSUWrr128
{ 10156, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x70d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10156 = VPHSUBBWrm
{ 10157, 2, 1, 0, 0, 0, 0x70d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10157 = VPHSUBBWrr
{ 10158, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x71d8014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10158 = VPHSUBDQrm
{ 10159, 2, 1, 0, 0, 0, 0x71d8014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10159 = VPHSUBDQrr
{ 10160, 7, 1, 0, 828, 0|(1ULL<<MCID::MayLoad), 0x90338009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10160 = VPHSUBDYrm
{ 10161, 3, 1, 0, 823, 0, 0x90338009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10161 = VPHSUBDYrr
{ 10162, 7, 1, 0, 826, 0|(1ULL<<MCID::MayLoad), 0x10338009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10162 = VPHSUBDrm
{ 10163, 3, 1, 0, 821, 0, 0x10338009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10163 = VPHSUBDrr
{ 10164, 7, 1, 0, 827, 0|(1ULL<<MCID::MayLoad), 0x103b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10164 = VPHSUBSWrm128
{ 10165, 7, 1, 0, 827, 0|(1ULL<<MCID::MayLoad), 0x903b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10165 = VPHSUBSWrm256
{ 10166, 3, 1, 0, 822, 0, 0x103b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10166 = VPHSUBSWrr128
{ 10167, 3, 1, 0, 822, 0, 0x903b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10167 = VPHSUBSWrr256
{ 10168, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x7158014806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10168 = VPHSUBWDrm
{ 10169, 2, 1, 0, 0, 0, 0x7158014805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10169 = VPHSUBWDrr
{ 10170, 7, 1, 0, 828, 0|(1ULL<<MCID::MayLoad), 0x902b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10170 = VPHSUBWYrm
{ 10171, 3, 1, 0, 823, 0, 0x902b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10171 = VPHSUBWYrr
{ 10172, 7, 1, 0, 828, 0|(1ULL<<MCID::MayLoad), 0x102b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10172 = VPHSUBWrm
{ 10173, 3, 1, 0, 823, 0, 0x102b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10173 = VPHSUBWrr
{ 10174, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x201107804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #10174 = VPINSRBZrm
{ 10175, 4, 1, 0, 0, 0, 0x2001107804d005ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr }, // Inst #10175 = VPINSRBZrr
{ 10176, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x1103804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #10176 = VPINSRBrm
{ 10177, 4, 1, 0, 276, 0, 0x1103804d005ULL, nullptr, nullptr, OperandInfo860, -1 ,nullptr }, // Inst #10177 = VPINSRBrr
{ 10178, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x801117804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #10178 = VPINSRDZrm
{ 10179, 4, 1, 0, 0, 0, 0x2001117804d005ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr }, // Inst #10179 = VPINSRDZrr
{ 10180, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x1113804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #10180 = VPINSRDrm
{ 10181, 4, 1, 0, 276, 0, 0x1113804d005ULL, nullptr, nullptr, OperandInfo860, -1 ,nullptr }, // Inst #10181 = VPINSRDrr
{ 10182, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1001917804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #10182 = VPINSRQZrm
{ 10183, 4, 1, 0, 0, 0, 0x2001917804d005ULL, nullptr, nullptr, OperandInfo497, -1 ,nullptr }, // Inst #10183 = VPINSRQZrr
{ 10184, 8, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x1913804d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #10184 = VPINSRQrm
{ 10185, 4, 1, 0, 276, 0, 0x1913804d005ULL, nullptr, nullptr, OperandInfo861, -1 ,nullptr }, // Inst #10185 = VPINSRQrr
{ 10186, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4016278045006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #10186 = VPINSRWZrm
{ 10187, 4, 1, 0, 0, 0, 0x20016278045005ULL, nullptr, nullptr, OperandInfo491, -1 ,nullptr }, // Inst #10187 = VPINSRWZrr
{ 10188, 8, 1, 0, 409, 0|(1ULL<<MCID::MayLoad), 0x16238045006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #10188 = VPINSRWrmi
{ 10189, 4, 1, 0, 410, 0, 0x16238045005ULL, nullptr, nullptr, OperandInfo860, -1 ,nullptr }, // Inst #10189 = VPINSRWrri
{ 10190, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20002278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #10190 = VPLZCNTDZ128rm
{ 10191, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #10191 = VPLZCNTDZ128rmb
{ 10192, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202278009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #10192 = VPLZCNTDZ128rmbk
{ 10193, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602278009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #10193 = VPLZCNTDZ128rmbkz
{ 10194, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20202278009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #10194 = VPLZCNTDZ128rmk
{ 10195, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20602278009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #10195 = VPLZCNTDZ128rmkz
{ 10196, 2, 1, 0, 0, 0, 0x20002278009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10196 = VPLZCNTDZ128rr
{ 10197, 4, 1, 0, 0, 0, 0x20202278009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #10197 = VPLZCNTDZ128rrk
{ 10198, 3, 1, 0, 0, 0, 0x20602278009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #10198 = VPLZCNTDZ128rrkz
{ 10199, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40082278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #10199 = VPLZCNTDZ256rm
{ 10200, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #10200 = VPLZCNTDZ256rmb
{ 10201, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282278009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #10201 = VPLZCNTDZ256rmbk
{ 10202, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682278009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #10202 = VPLZCNTDZ256rmbkz
{ 10203, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40282278009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #10203 = VPLZCNTDZ256rmk
{ 10204, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40682278009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #10204 = VPLZCNTDZ256rmkz
{ 10205, 2, 1, 0, 0, 0, 0x40082278009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #10205 = VPLZCNTDZ256rr
{ 10206, 4, 1, 0, 0, 0, 0x40282278009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #10206 = VPLZCNTDZ256rrk
{ 10207, 3, 1, 0, 0, 0, 0x40682278009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #10207 = VPLZCNTDZ256rrkz
{ 10208, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80802278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #10208 = VPLZCNTDZrm
{ 10209, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #10209 = VPLZCNTDZrmb
{ 10210, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02278009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #10210 = VPLZCNTDZrmbk
{ 10211, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02278009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #10211 = VPLZCNTDZrmbkz
{ 10212, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a02278009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #10212 = VPLZCNTDZrmk
{ 10213, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e02278009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #10213 = VPLZCNTDZrmkz
{ 10214, 2, 1, 0, 0, 0, 0x80802278009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10214 = VPLZCNTDZrr
{ 10215, 4, 1, 0, 0, 0, 0x80a02278009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #10215 = VPLZCNTDZrrk
{ 10216, 3, 1, 0, 0, 0, 0x80e02278009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #10216 = VPLZCNTDZrrkz
{ 10217, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000a278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #10217 = VPLZCNTQZ128rm
{ 10218, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100a278009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #10218 = VPLZCNTQZ128rmb
{ 10219, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120a278009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #10219 = VPLZCNTQZ128rmbk
{ 10220, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160a278009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #10220 = VPLZCNTQZ128rmbkz
{ 10221, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020a278009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #10221 = VPLZCNTQZ128rmk
{ 10222, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060a278009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #10222 = VPLZCNTQZ128rmkz
{ 10223, 2, 1, 0, 0, 0, 0x2000a278009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10223 = VPLZCNTQZ128rr
{ 10224, 4, 1, 0, 0, 0, 0x2020a278009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #10224 = VPLZCNTQZ128rrk
{ 10225, 3, 1, 0, 0, 0, 0x2060a278009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #10225 = VPLZCNTQZ128rrkz
{ 10226, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008a278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #10226 = VPLZCNTQZ256rm
{ 10227, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108a278009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #10227 = VPLZCNTQZ256rmb
{ 10228, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128a278009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #10228 = VPLZCNTQZ256rmbk
{ 10229, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168a278009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #10229 = VPLZCNTQZ256rmbkz
{ 10230, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028a278009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #10230 = VPLZCNTQZ256rmk
{ 10231, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068a278009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #10231 = VPLZCNTQZ256rmkz
{ 10232, 2, 1, 0, 0, 0, 0x4008a278009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #10232 = VPLZCNTQZ256rr
{ 10233, 4, 1, 0, 0, 0, 0x4028a278009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #10233 = VPLZCNTQZ256rrk
{ 10234, 3, 1, 0, 0, 0, 0x4068a278009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #10234 = VPLZCNTQZ256rrkz
{ 10235, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080a278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #10235 = VPLZCNTQZrm
{ 10236, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180a278009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #10236 = VPLZCNTQZrmb
{ 10237, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0a278009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #10237 = VPLZCNTQZrmbk
{ 10238, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0a278009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #10238 = VPLZCNTQZrmbkz
{ 10239, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0a278009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #10239 = VPLZCNTQZrmk
{ 10240, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0a278009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #10240 = VPLZCNTQZrmkz
{ 10241, 2, 1, 0, 0, 0, 0x8080a278009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #10241 = VPLZCNTQZrr
{ 10242, 4, 1, 0, 0, 0, 0x80a0a278009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #10242 = VPLZCNTQZrrk
{ 10243, 3, 1, 0, 0, 0, 0x80e0a278009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #10243 = VPLZCNTQZrrkz
{ 10244, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x54f58050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10244 = VPMACSDDrm
{ 10245, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x54f58050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10245 = VPMACSDDrr
{ 10246, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x54fd8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10246 = VPMACSDQHrm
{ 10247, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x54fd8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10247 = VPMACSDQHrr
{ 10248, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x54bd8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10248 = VPMACSDQLrm
{ 10249, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x54bd8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10249 = VPMACSDQLrr
{ 10250, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x54758050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10250 = VPMACSSDDrm
{ 10251, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x54758050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10251 = VPMACSSDDrr
{ 10252, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x547d8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10252 = VPMACSSDQHrm
{ 10253, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x547d8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10253 = VPMACSSDQHrr
{ 10254, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x543d8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10254 = VPMACSSDQLrm
{ 10255, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x543d8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10255 = VPMACSSDQLrr
{ 10256, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x54358050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10256 = VPMACSSWDrm
{ 10257, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x54358050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10257 = VPMACSSWDrr
{ 10258, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x542d8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10258 = VPMACSSWWrm
{ 10259, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x542d8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10259 = VPMACSSWWrr
{ 10260, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x54b58050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10260 = VPMACSWDrm
{ 10261, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x54b58050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10261 = VPMACSWDrr
{ 10262, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x54ad8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10262 = VPMACSWWrm
{ 10263, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x54ad8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10263 = VPMACSWWrr
{ 10264, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x55358050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10264 = VPMADCSSWDrm
{ 10265, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x55358050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10265 = VPMADCSSWDrr
{ 10266, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x55b58050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #10266 = VPMADCSWDrm
{ 10267, 4, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x55b58050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #10267 = VPMADCSWDrr
{ 10268, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001dae0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #10268 = VPMADD52HUQZ128m
{ 10269, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101dae0009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #10269 = VPMADD52HUQZ128mb
{ 10270, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121dae0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10270 = VPMADD52HUQZ128mbk
{ 10271, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161dae0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10271 = VPMADD52HUQZ128mbkz
{ 10272, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021dae0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10272 = VPMADD52HUQZ128mk
{ 10273, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061dae0009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10273 = VPMADD52HUQZ128mkz
{ 10274, 4, 1, 0, 0, 0, 0x2001dae0009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #10274 = VPMADD52HUQZ128r
{ 10275, 5, 1, 0, 0, 0, 0x2021dae0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #10275 = VPMADD52HUQZ128rk
{ 10276, 5, 1, 0, 0, 0, 0x2061dae0009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #10276 = VPMADD52HUQZ128rkz
{ 10277, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009dae0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #10277 = VPMADD52HUQZ256m
{ 10278, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109dae0009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #10278 = VPMADD52HUQZ256mb
{ 10279, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129dae0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10279 = VPMADD52HUQZ256mbk
{ 10280, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169dae0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10280 = VPMADD52HUQZ256mbkz
{ 10281, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029dae0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10281 = VPMADD52HUQZ256mk
{ 10282, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069dae0009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10282 = VPMADD52HUQZ256mkz
{ 10283, 4, 1, 0, 0, 0, 0x4009dae0009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #10283 = VPMADD52HUQZ256r
{ 10284, 5, 1, 0, 0, 0, 0x4029dae0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #10284 = VPMADD52HUQZ256rk
{ 10285, 5, 1, 0, 0, 0, 0x4069dae0009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #10285 = VPMADD52HUQZ256rkz
{ 10286, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081dae0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #10286 = VPMADD52HUQZm
{ 10287, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181dae0009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #10287 = VPMADD52HUQZmb
{ 10288, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1dae0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10288 = VPMADD52HUQZmbk
{ 10289, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1dae0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10289 = VPMADD52HUQZmbkz
{ 10290, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1dae0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10290 = VPMADD52HUQZmk
{ 10291, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1dae0009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10291 = VPMADD52HUQZmkz
{ 10292, 4, 1, 0, 0, 0, 0x8081dae0009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #10292 = VPMADD52HUQZr
{ 10293, 5, 1, 0, 0, 0, 0x80a1dae0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10293 = VPMADD52HUQZrk
{ 10294, 5, 1, 0, 0, 0, 0x80e1dae0009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10294 = VPMADD52HUQZrkz
{ 10295, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001da60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #10295 = VPMADD52LUQZ128m
{ 10296, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101da60009006ULL, nullptr, nullptr, OperandInfo540, -1 ,nullptr }, // Inst #10296 = VPMADD52LUQZ128mb
{ 10297, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121da60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10297 = VPMADD52LUQZ128mbk
{ 10298, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161da60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10298 = VPMADD52LUQZ128mbkz
{ 10299, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021da60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10299 = VPMADD52LUQZ128mk
{ 10300, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061da60009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10300 = VPMADD52LUQZ128mkz
{ 10301, 4, 1, 0, 0, 0, 0x2001da60009005ULL, nullptr, nullptr, OperandInfo541, -1 ,nullptr }, // Inst #10301 = VPMADD52LUQZ128r
{ 10302, 5, 1, 0, 0, 0, 0x2021da60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #10302 = VPMADD52LUQZ128rk
{ 10303, 5, 1, 0, 0, 0, 0x2061da60009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #10303 = VPMADD52LUQZ128rkz
{ 10304, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009da60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #10304 = VPMADD52LUQZ256m
{ 10305, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109da60009006ULL, nullptr, nullptr, OperandInfo542, -1 ,nullptr }, // Inst #10305 = VPMADD52LUQZ256mb
{ 10306, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129da60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10306 = VPMADD52LUQZ256mbk
{ 10307, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169da60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10307 = VPMADD52LUQZ256mbkz
{ 10308, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029da60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10308 = VPMADD52LUQZ256mk
{ 10309, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069da60009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10309 = VPMADD52LUQZ256mkz
{ 10310, 4, 1, 0, 0, 0, 0x4009da60009005ULL, nullptr, nullptr, OperandInfo543, -1 ,nullptr }, // Inst #10310 = VPMADD52LUQZ256r
{ 10311, 5, 1, 0, 0, 0, 0x4029da60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #10311 = VPMADD52LUQZ256rk
{ 10312, 5, 1, 0, 0, 0, 0x4069da60009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #10312 = VPMADD52LUQZ256rkz
{ 10313, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081da60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #10313 = VPMADD52LUQZm
{ 10314, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181da60009006ULL, nullptr, nullptr, OperandInfo544, -1 ,nullptr }, // Inst #10314 = VPMADD52LUQZmb
{ 10315, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1da60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10315 = VPMADD52LUQZmbk
{ 10316, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1da60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10316 = VPMADD52LUQZmbkz
{ 10317, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1da60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10317 = VPMADD52LUQZmk
{ 10318, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1da60009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10318 = VPMADD52LUQZmkz
{ 10319, 4, 1, 0, 0, 0, 0x8081da60009005ULL, nullptr, nullptr, OperandInfo545, -1 ,nullptr }, // Inst #10319 = VPMADD52LUQZr
{ 10320, 5, 1, 0, 0, 0, 0x80a1da60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10320 = VPMADD52LUQZrk
{ 10321, 5, 1, 0, 0, 0, 0x80e1da60009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10321 = VPMADD52LUQZrkz
{ 10322, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20010278009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10322 = VPMADDUBSWZ128rm
{ 10323, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20210278009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #10323 = VPMADDUBSWZ128rmk
{ 10324, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20610278009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #10324 = VPMADDUBSWZ128rmkz
{ 10325, 3, 1, 0, 0, 0, 0x20010278009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10325 = VPMADDUBSWZ128rr
{ 10326, 5, 1, 0, 0, 0, 0x20210278009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #10326 = VPMADDUBSWZ128rrk
{ 10327, 4, 1, 0, 0, 0, 0x20610278009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #10327 = VPMADDUBSWZ128rrkz
{ 10328, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40090278009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10328 = VPMADDUBSWZ256rm
{ 10329, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40290278009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #10329 = VPMADDUBSWZ256rmk
{ 10330, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40690278009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #10330 = VPMADDUBSWZ256rmkz
{ 10331, 3, 1, 0, 0, 0, 0x40090278009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10331 = VPMADDUBSWZ256rr
{ 10332, 5, 1, 0, 0, 0, 0x40290278009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #10332 = VPMADDUBSWZ256rrk
{ 10333, 4, 1, 0, 0, 0, 0x40690278009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #10333 = VPMADDUBSWZ256rrkz
{ 10334, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80810278009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10334 = VPMADDUBSWZrm
{ 10335, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a10278009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #10335 = VPMADDUBSWZrmk
{ 10336, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e10278009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #10336 = VPMADDUBSWZrmkz
{ 10337, 3, 1, 0, 0, 0, 0x80810278009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10337 = VPMADDUBSWZrr
{ 10338, 5, 1, 0, 0, 0, 0x80a10278009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #10338 = VPMADDUBSWZrrk
{ 10339, 4, 1, 0, 0, 0, 0x80e10278009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #10339 = VPMADDUBSWZrrkz
{ 10340, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x10238009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10340 = VPMADDUBSWrm128
{ 10341, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x90238009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10341 = VPMADDUBSWrm256
{ 10342, 3, 1, 0, 408, 0, 0x10238009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10342 = VPMADDUBSWrr128
{ 10343, 3, 1, 0, 408, 0, 0x90238009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10343 = VPMADDUBSWrr256
{ 10344, 7, 1, 0, 412, 0|(1ULL<<MCID::MayLoad), 0x97ab8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10344 = VPMADDWDYrm
{ 10345, 3, 1, 0, 413, 0|(1ULL<<MCID::Commutable), 0x97ab8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10345 = VPMADDWDYrr
{ 10346, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017af8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10346 = VPMADDWDZ128rm
{ 10347, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217af8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10347 = VPMADDWDZ128rmk
{ 10348, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617af8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10348 = VPMADDWDZ128rmkz
{ 10349, 3, 1, 0, 0, 0, 0x20017af8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10349 = VPMADDWDZ128rr
{ 10350, 5, 1, 0, 0, 0, 0x20217af8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #10350 = VPMADDWDZ128rrk
{ 10351, 4, 1, 0, 0, 0, 0x20617af8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #10351 = VPMADDWDZ128rrkz
{ 10352, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097af8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10352 = VPMADDWDZ256rm
{ 10353, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297af8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10353 = VPMADDWDZ256rmk
{ 10354, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697af8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10354 = VPMADDWDZ256rmkz
{ 10355, 3, 1, 0, 0, 0, 0x40097af8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10355 = VPMADDWDZ256rr
{ 10356, 5, 1, 0, 0, 0, 0x40297af8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #10356 = VPMADDWDZ256rrk
{ 10357, 4, 1, 0, 0, 0, 0x40697af8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #10357 = VPMADDWDZ256rrkz
{ 10358, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817af8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10358 = VPMADDWDZrm
{ 10359, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17af8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10359 = VPMADDWDZrmk
{ 10360, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17af8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10360 = VPMADDWDZrmkz
{ 10361, 3, 1, 0, 0, 0, 0x80817af8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10361 = VPMADDWDZrr
{ 10362, 5, 1, 0, 0, 0, 0x80a17af8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #10362 = VPMADDWDZrrk
{ 10363, 4, 1, 0, 0, 0, 0x80e17af8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #10363 = VPMADDWDZrrkz
{ 10364, 7, 1, 0, 412, 0|(1ULL<<MCID::MayLoad), 0x17ab8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10364 = VPMADDWDrm
{ 10365, 3, 1, 0, 413, 0|(1ULL<<MCID::Commutable), 0x17ab8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10365 = VPMADDWDrr
{ 10366, 7, 0, 0, 802, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x94738009004ULL, nullptr, nullptr, OperandInfo654, -1 ,nullptr }, // Inst #10366 = VPMASKMOVDYmr
{ 10367, 7, 1, 0, 801, 0|(1ULL<<MCID::MayLoad), 0x94638009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10367 = VPMASKMOVDYrm
{ 10368, 7, 0, 0, 802, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x14738009004ULL, nullptr, nullptr, OperandInfo655, -1 ,nullptr }, // Inst #10368 = VPMASKMOVDmr
{ 10369, 7, 1, 0, 801, 0|(1ULL<<MCID::MayLoad), 0x14638009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10369 = VPMASKMOVDrm
{ 10370, 7, 0, 0, 802, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x9c738009004ULL, nullptr, nullptr, OperandInfo654, -1 ,nullptr }, // Inst #10370 = VPMASKMOVQYmr
{ 10371, 7, 1, 0, 801, 0|(1ULL<<MCID::MayLoad), 0x9c638009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10371 = VPMASKMOVQYrm
{ 10372, 7, 0, 0, 802, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1c738009004ULL, nullptr, nullptr, OperandInfo655, -1 ,nullptr }, // Inst #10372 = VPMASKMOVQmr
{ 10373, 7, 1, 0, 801, 0|(1ULL<<MCID::MayLoad), 0x1c638009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10373 = VPMASKMOVQrm
{ 10374, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x91e38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10374 = VPMAXSBYrm
{ 10375, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x91e38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10375 = VPMAXSBYrr
{ 10376, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011e78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10376 = VPMAXSBZ128rm
{ 10377, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211e78009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #10377 = VPMAXSBZ128rmk
{ 10378, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611e78009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #10378 = VPMAXSBZ128rmkz
{ 10379, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20011e78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10379 = VPMAXSBZ128rr
{ 10380, 5, 1, 0, 0, 0, 0x20211e78009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #10380 = VPMAXSBZ128rrk
{ 10381, 4, 1, 0, 0, 0, 0x20611e78009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #10381 = VPMAXSBZ128rrkz
{ 10382, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091e78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10382 = VPMAXSBZ256rm
{ 10383, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291e78009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #10383 = VPMAXSBZ256rmk
{ 10384, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691e78009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #10384 = VPMAXSBZ256rmkz
{ 10385, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40091e78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10385 = VPMAXSBZ256rr
{ 10386, 5, 1, 0, 0, 0, 0x40291e78009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #10386 = VPMAXSBZ256rrk
{ 10387, 4, 1, 0, 0, 0, 0x40691e78009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #10387 = VPMAXSBZ256rrkz
{ 10388, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811e78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10388 = VPMAXSBZrm
{ 10389, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11e78009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #10389 = VPMAXSBZrmk
{ 10390, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11e78009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #10390 = VPMAXSBZrmkz
{ 10391, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80811e78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10391 = VPMAXSBZrr
{ 10392, 5, 1, 0, 0, 0, 0x80a11e78009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #10392 = VPMAXSBZrrk
{ 10393, 4, 1, 0, 0, 0, 0x80e11e78009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #10393 = VPMAXSBZrrkz
{ 10394, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x11e38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10394 = VPMAXSBrm
{ 10395, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x11e38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10395 = VPMAXSBrr
{ 10396, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x91eb8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10396 = VPMAXSDYrm
{ 10397, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x91eb8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10397 = VPMAXSDYrr
{ 10398, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011ef8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10398 = VPMAXSDZ128rm
{ 10399, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9011ef8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10399 = VPMAXSDZ128rmb
{ 10400, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9211ef8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10400 = VPMAXSDZ128rmbk
{ 10401, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9611ef8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10401 = VPMAXSDZ128rmbkz
{ 10402, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211ef8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10402 = VPMAXSDZ128rmk
{ 10403, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611ef8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10403 = VPMAXSDZ128rmkz
{ 10404, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20011ef8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10404 = VPMAXSDZ128rr
{ 10405, 5, 1, 0, 0, 0, 0x20211ef8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #10405 = VPMAXSDZ128rrk
{ 10406, 4, 1, 0, 0, 0, 0x20611ef8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #10406 = VPMAXSDZ128rrkz
{ 10407, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091ef8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10407 = VPMAXSDZ256rm
{ 10408, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9091ef8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10408 = VPMAXSDZ256rmb
{ 10409, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9291ef8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10409 = VPMAXSDZ256rmbk
{ 10410, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9691ef8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10410 = VPMAXSDZ256rmbkz
{ 10411, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291ef8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10411 = VPMAXSDZ256rmk
{ 10412, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691ef8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10412 = VPMAXSDZ256rmkz
{ 10413, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40091ef8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10413 = VPMAXSDZ256rr
{ 10414, 5, 1, 0, 0, 0, 0x40291ef8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #10414 = VPMAXSDZ256rrk
{ 10415, 4, 1, 0, 0, 0, 0x40691ef8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #10415 = VPMAXSDZ256rrkz
{ 10416, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811ef8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10416 = VPMAXSDZrm
{ 10417, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9811ef8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10417 = VPMAXSDZrmb
{ 10418, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a11ef8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10418 = VPMAXSDZrmbk
{ 10419, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e11ef8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10419 = VPMAXSDZrmbkz
{ 10420, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11ef8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10420 = VPMAXSDZrmk
{ 10421, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11ef8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10421 = VPMAXSDZrmkz
{ 10422, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80811ef8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10422 = VPMAXSDZrr
{ 10423, 5, 1, 0, 0, 0, 0x80a11ef8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #10423 = VPMAXSDZrrk
{ 10424, 4, 1, 0, 0, 0, 0x80e11ef8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #10424 = VPMAXSDZrrkz
{ 10425, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x11eb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10425 = VPMAXSDrm
{ 10426, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x11eb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10426 = VPMAXSDrr
{ 10427, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20019ef8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10427 = VPMAXSQZ128rm
{ 10428, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11019ef8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10428 = VPMAXSQZ128rmb
{ 10429, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11219ef8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10429 = VPMAXSQZ128rmbk
{ 10430, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11619ef8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #10430 = VPMAXSQZ128rmbkz
{ 10431, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20219ef8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10431 = VPMAXSQZ128rmk
{ 10432, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20619ef8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #10432 = VPMAXSQZ128rmkz
{ 10433, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20019ef8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10433 = VPMAXSQZ128rr
{ 10434, 5, 1, 0, 0, 0, 0x20219ef8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #10434 = VPMAXSQZ128rrk
{ 10435, 4, 1, 0, 0, 0, 0x20619ef8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #10435 = VPMAXSQZ128rrkz
{ 10436, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099ef8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10436 = VPMAXSQZ256rm
{ 10437, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11099ef8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10437 = VPMAXSQZ256rmb
{ 10438, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11299ef8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10438 = VPMAXSQZ256rmbk
{ 10439, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11699ef8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #10439 = VPMAXSQZ256rmbkz
{ 10440, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299ef8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10440 = VPMAXSQZ256rmk
{ 10441, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40699ef8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #10441 = VPMAXSQZ256rmkz
{ 10442, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40099ef8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10442 = VPMAXSQZ256rr
{ 10443, 5, 1, 0, 0, 0, 0x40299ef8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #10443 = VPMAXSQZ256rrk
{ 10444, 4, 1, 0, 0, 0, 0x40699ef8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #10444 = VPMAXSQZ256rrkz
{ 10445, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819ef8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10445 = VPMAXSQZrm
{ 10446, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11819ef8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10446 = VPMAXSQZrmb
{ 10447, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a19ef8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10447 = VPMAXSQZrmbk
{ 10448, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e19ef8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #10448 = VPMAXSQZrmbkz
{ 10449, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19ef8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10449 = VPMAXSQZrmk
{ 10450, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e19ef8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #10450 = VPMAXSQZrmkz
{ 10451, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80819ef8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10451 = VPMAXSQZrr
{ 10452, 5, 1, 0, 0, 0, 0x80a19ef8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10452 = VPMAXSQZrrk
{ 10453, 4, 1, 0, 0, 0, 0x80e19ef8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #10453 = VPMAXSQZrrkz
{ 10454, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97738005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10454 = VPMAXSWYrm
{ 10455, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x97738005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10455 = VPMAXSWYrr
{ 10456, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017778005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10456 = VPMAXSWZ128rm
{ 10457, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217778005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #10457 = VPMAXSWZ128rmk
{ 10458, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617778005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #10458 = VPMAXSWZ128rmkz
{ 10459, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20017778005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10459 = VPMAXSWZ128rr
{ 10460, 5, 1, 0, 0, 0, 0x20217778005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #10460 = VPMAXSWZ128rrk
{ 10461, 4, 1, 0, 0, 0, 0x20617778005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #10461 = VPMAXSWZ128rrkz
{ 10462, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097778005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10462 = VPMAXSWZ256rm
{ 10463, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297778005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #10463 = VPMAXSWZ256rmk
{ 10464, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697778005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #10464 = VPMAXSWZ256rmkz
{ 10465, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40097778005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10465 = VPMAXSWZ256rr
{ 10466, 5, 1, 0, 0, 0, 0x40297778005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #10466 = VPMAXSWZ256rrk
{ 10467, 4, 1, 0, 0, 0, 0x40697778005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #10467 = VPMAXSWZ256rrkz
{ 10468, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817778005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10468 = VPMAXSWZrm
{ 10469, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17778005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #10469 = VPMAXSWZrmk
{ 10470, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17778005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #10470 = VPMAXSWZrmkz
{ 10471, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80817778005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10471 = VPMAXSWZrr
{ 10472, 5, 1, 0, 0, 0, 0x80a17778005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #10472 = VPMAXSWZrrk
{ 10473, 4, 1, 0, 0, 0, 0x80e17778005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #10473 = VPMAXSWZrrkz
{ 10474, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17738005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10474 = VPMAXSWrm
{ 10475, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x17738005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10475 = VPMAXSWrr
{ 10476, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x96f38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10476 = VPMAXUBYrm
{ 10477, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x96f38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10477 = VPMAXUBYrr
{ 10478, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016f78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10478 = VPMAXUBZ128rm
{ 10479, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216f78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #10479 = VPMAXUBZ128rmk
{ 10480, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616f78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #10480 = VPMAXUBZ128rmkz
{ 10481, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20016f78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10481 = VPMAXUBZ128rr
{ 10482, 5, 1, 0, 0, 0, 0x20216f78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #10482 = VPMAXUBZ128rrk
{ 10483, 4, 1, 0, 0, 0, 0x20616f78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #10483 = VPMAXUBZ128rrkz
{ 10484, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096f78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10484 = VPMAXUBZ256rm
{ 10485, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296f78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #10485 = VPMAXUBZ256rmk
{ 10486, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696f78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #10486 = VPMAXUBZ256rmkz
{ 10487, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40096f78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10487 = VPMAXUBZ256rr
{ 10488, 5, 1, 0, 0, 0, 0x40296f78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #10488 = VPMAXUBZ256rrk
{ 10489, 4, 1, 0, 0, 0, 0x40696f78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #10489 = VPMAXUBZ256rrkz
{ 10490, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816f78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10490 = VPMAXUBZrm
{ 10491, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16f78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #10491 = VPMAXUBZrmk
{ 10492, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16f78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #10492 = VPMAXUBZrmkz
{ 10493, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80816f78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10493 = VPMAXUBZrr
{ 10494, 5, 1, 0, 0, 0, 0x80a16f78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #10494 = VPMAXUBZrrk
{ 10495, 4, 1, 0, 0, 0, 0x80e16f78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #10495 = VPMAXUBZrrkz
{ 10496, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x16f38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10496 = VPMAXUBrm
{ 10497, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x16f38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10497 = VPMAXUBrr
{ 10498, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x91fb8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10498 = VPMAXUDYrm
{ 10499, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x91fb8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10499 = VPMAXUDYrr
{ 10500, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011ff8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10500 = VPMAXUDZ128rm
{ 10501, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9011ff8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10501 = VPMAXUDZ128rmb
{ 10502, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9211ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10502 = VPMAXUDZ128rmbk
{ 10503, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9611ff8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10503 = VPMAXUDZ128rmbkz
{ 10504, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211ff8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10504 = VPMAXUDZ128rmk
{ 10505, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611ff8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10505 = VPMAXUDZ128rmkz
{ 10506, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20011ff8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10506 = VPMAXUDZ128rr
{ 10507, 5, 1, 0, 0, 0, 0x20211ff8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #10507 = VPMAXUDZ128rrk
{ 10508, 4, 1, 0, 0, 0, 0x20611ff8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #10508 = VPMAXUDZ128rrkz
{ 10509, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091ff8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10509 = VPMAXUDZ256rm
{ 10510, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9091ff8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10510 = VPMAXUDZ256rmb
{ 10511, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9291ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10511 = VPMAXUDZ256rmbk
{ 10512, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9691ff8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10512 = VPMAXUDZ256rmbkz
{ 10513, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291ff8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10513 = VPMAXUDZ256rmk
{ 10514, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691ff8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10514 = VPMAXUDZ256rmkz
{ 10515, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40091ff8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10515 = VPMAXUDZ256rr
{ 10516, 5, 1, 0, 0, 0, 0x40291ff8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #10516 = VPMAXUDZ256rrk
{ 10517, 4, 1, 0, 0, 0, 0x40691ff8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #10517 = VPMAXUDZ256rrkz
{ 10518, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811ff8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10518 = VPMAXUDZrm
{ 10519, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9811ff8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10519 = VPMAXUDZrmb
{ 10520, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a11ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10520 = VPMAXUDZrmbk
{ 10521, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e11ff8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10521 = VPMAXUDZrmbkz
{ 10522, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11ff8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10522 = VPMAXUDZrmk
{ 10523, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11ff8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10523 = VPMAXUDZrmkz
{ 10524, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80811ff8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10524 = VPMAXUDZrr
{ 10525, 5, 1, 0, 0, 0, 0x80a11ff8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #10525 = VPMAXUDZrrk
{ 10526, 4, 1, 0, 0, 0, 0x80e11ff8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #10526 = VPMAXUDZrrkz
{ 10527, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x11fb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10527 = VPMAXUDrm
{ 10528, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x11fb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10528 = VPMAXUDrr
{ 10529, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20019ff8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10529 = VPMAXUQZ128rm
{ 10530, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11019ff8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10530 = VPMAXUQZ128rmb
{ 10531, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11219ff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10531 = VPMAXUQZ128rmbk
{ 10532, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11619ff8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #10532 = VPMAXUQZ128rmbkz
{ 10533, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20219ff8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10533 = VPMAXUQZ128rmk
{ 10534, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20619ff8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #10534 = VPMAXUQZ128rmkz
{ 10535, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20019ff8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10535 = VPMAXUQZ128rr
{ 10536, 5, 1, 0, 0, 0, 0x20219ff8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #10536 = VPMAXUQZ128rrk
{ 10537, 4, 1, 0, 0, 0, 0x20619ff8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #10537 = VPMAXUQZ128rrkz
{ 10538, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099ff8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10538 = VPMAXUQZ256rm
{ 10539, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11099ff8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10539 = VPMAXUQZ256rmb
{ 10540, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11299ff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10540 = VPMAXUQZ256rmbk
{ 10541, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11699ff8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #10541 = VPMAXUQZ256rmbkz
{ 10542, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299ff8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10542 = VPMAXUQZ256rmk
{ 10543, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40699ff8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #10543 = VPMAXUQZ256rmkz
{ 10544, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40099ff8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10544 = VPMAXUQZ256rr
{ 10545, 5, 1, 0, 0, 0, 0x40299ff8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #10545 = VPMAXUQZ256rrk
{ 10546, 4, 1, 0, 0, 0, 0x40699ff8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #10546 = VPMAXUQZ256rrkz
{ 10547, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819ff8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10547 = VPMAXUQZrm
{ 10548, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11819ff8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10548 = VPMAXUQZrmb
{ 10549, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a19ff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10549 = VPMAXUQZrmbk
{ 10550, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e19ff8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #10550 = VPMAXUQZrmbkz
{ 10551, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19ff8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10551 = VPMAXUQZrmk
{ 10552, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e19ff8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #10552 = VPMAXUQZrmkz
{ 10553, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80819ff8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10553 = VPMAXUQZrr
{ 10554, 5, 1, 0, 0, 0, 0x80a19ff8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10554 = VPMAXUQZrrk
{ 10555, 4, 1, 0, 0, 0, 0x80e19ff8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #10555 = VPMAXUQZrrkz
{ 10556, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x91f38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10556 = VPMAXUWYrm
{ 10557, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x91f38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10557 = VPMAXUWYrr
{ 10558, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011f78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10558 = VPMAXUWZ128rm
{ 10559, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211f78009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #10559 = VPMAXUWZ128rmk
{ 10560, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611f78009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #10560 = VPMAXUWZ128rmkz
{ 10561, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20011f78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10561 = VPMAXUWZ128rr
{ 10562, 5, 1, 0, 0, 0, 0x20211f78009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #10562 = VPMAXUWZ128rrk
{ 10563, 4, 1, 0, 0, 0, 0x20611f78009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #10563 = VPMAXUWZ128rrkz
{ 10564, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091f78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10564 = VPMAXUWZ256rm
{ 10565, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291f78009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #10565 = VPMAXUWZ256rmk
{ 10566, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691f78009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #10566 = VPMAXUWZ256rmkz
{ 10567, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40091f78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10567 = VPMAXUWZ256rr
{ 10568, 5, 1, 0, 0, 0, 0x40291f78009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #10568 = VPMAXUWZ256rrk
{ 10569, 4, 1, 0, 0, 0, 0x40691f78009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #10569 = VPMAXUWZ256rrkz
{ 10570, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811f78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10570 = VPMAXUWZrm
{ 10571, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11f78009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #10571 = VPMAXUWZrmk
{ 10572, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11f78009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #10572 = VPMAXUWZrmkz
{ 10573, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80811f78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10573 = VPMAXUWZrr
{ 10574, 5, 1, 0, 0, 0, 0x80a11f78009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #10574 = VPMAXUWZrrk
{ 10575, 4, 1, 0, 0, 0, 0x80e11f78009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #10575 = VPMAXUWZrrkz
{ 10576, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x11f38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10576 = VPMAXUWrm
{ 10577, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x11f38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10577 = VPMAXUWrr
{ 10578, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x91c38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10578 = VPMINSBYrm
{ 10579, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x91c38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10579 = VPMINSBYrr
{ 10580, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011c78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10580 = VPMINSBZ128rm
{ 10581, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211c78009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #10581 = VPMINSBZ128rmk
{ 10582, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611c78009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #10582 = VPMINSBZ128rmkz
{ 10583, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20011c78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10583 = VPMINSBZ128rr
{ 10584, 5, 1, 0, 0, 0, 0x20211c78009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #10584 = VPMINSBZ128rrk
{ 10585, 4, 1, 0, 0, 0, 0x20611c78009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #10585 = VPMINSBZ128rrkz
{ 10586, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091c78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10586 = VPMINSBZ256rm
{ 10587, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291c78009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #10587 = VPMINSBZ256rmk
{ 10588, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691c78009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #10588 = VPMINSBZ256rmkz
{ 10589, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40091c78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10589 = VPMINSBZ256rr
{ 10590, 5, 1, 0, 0, 0, 0x40291c78009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #10590 = VPMINSBZ256rrk
{ 10591, 4, 1, 0, 0, 0, 0x40691c78009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #10591 = VPMINSBZ256rrkz
{ 10592, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811c78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10592 = VPMINSBZrm
{ 10593, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11c78009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #10593 = VPMINSBZrmk
{ 10594, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11c78009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #10594 = VPMINSBZrmkz
{ 10595, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80811c78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10595 = VPMINSBZrr
{ 10596, 5, 1, 0, 0, 0, 0x80a11c78009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #10596 = VPMINSBZrrk
{ 10597, 4, 1, 0, 0, 0, 0x80e11c78009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #10597 = VPMINSBZrrkz
{ 10598, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x11c38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10598 = VPMINSBrm
{ 10599, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x11c38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10599 = VPMINSBrr
{ 10600, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x91cb8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10600 = VPMINSDYrm
{ 10601, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x91cb8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10601 = VPMINSDYrr
{ 10602, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011cf8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10602 = VPMINSDZ128rm
{ 10603, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9011cf8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10603 = VPMINSDZ128rmb
{ 10604, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9211cf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10604 = VPMINSDZ128rmbk
{ 10605, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9611cf8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10605 = VPMINSDZ128rmbkz
{ 10606, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211cf8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10606 = VPMINSDZ128rmk
{ 10607, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611cf8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10607 = VPMINSDZ128rmkz
{ 10608, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20011cf8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10608 = VPMINSDZ128rr
{ 10609, 5, 1, 0, 0, 0, 0x20211cf8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #10609 = VPMINSDZ128rrk
{ 10610, 4, 1, 0, 0, 0, 0x20611cf8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #10610 = VPMINSDZ128rrkz
{ 10611, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091cf8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10611 = VPMINSDZ256rm
{ 10612, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9091cf8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10612 = VPMINSDZ256rmb
{ 10613, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9291cf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10613 = VPMINSDZ256rmbk
{ 10614, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9691cf8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10614 = VPMINSDZ256rmbkz
{ 10615, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291cf8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10615 = VPMINSDZ256rmk
{ 10616, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691cf8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10616 = VPMINSDZ256rmkz
{ 10617, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40091cf8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10617 = VPMINSDZ256rr
{ 10618, 5, 1, 0, 0, 0, 0x40291cf8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #10618 = VPMINSDZ256rrk
{ 10619, 4, 1, 0, 0, 0, 0x40691cf8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #10619 = VPMINSDZ256rrkz
{ 10620, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811cf8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10620 = VPMINSDZrm
{ 10621, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9811cf8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10621 = VPMINSDZrmb
{ 10622, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a11cf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10622 = VPMINSDZrmbk
{ 10623, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e11cf8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10623 = VPMINSDZrmbkz
{ 10624, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11cf8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10624 = VPMINSDZrmk
{ 10625, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11cf8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10625 = VPMINSDZrmkz
{ 10626, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80811cf8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10626 = VPMINSDZrr
{ 10627, 5, 1, 0, 0, 0, 0x80a11cf8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #10627 = VPMINSDZrrk
{ 10628, 4, 1, 0, 0, 0, 0x80e11cf8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #10628 = VPMINSDZrrkz
{ 10629, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x11cb8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10629 = VPMINSDrm
{ 10630, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x11cb8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10630 = VPMINSDrr
{ 10631, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20019cf8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10631 = VPMINSQZ128rm
{ 10632, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11019cf8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10632 = VPMINSQZ128rmb
{ 10633, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11219cf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10633 = VPMINSQZ128rmbk
{ 10634, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11619cf8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #10634 = VPMINSQZ128rmbkz
{ 10635, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20219cf8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10635 = VPMINSQZ128rmk
{ 10636, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20619cf8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #10636 = VPMINSQZ128rmkz
{ 10637, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20019cf8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10637 = VPMINSQZ128rr
{ 10638, 5, 1, 0, 0, 0, 0x20219cf8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #10638 = VPMINSQZ128rrk
{ 10639, 4, 1, 0, 0, 0, 0x20619cf8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #10639 = VPMINSQZ128rrkz
{ 10640, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099cf8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10640 = VPMINSQZ256rm
{ 10641, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11099cf8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10641 = VPMINSQZ256rmb
{ 10642, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11299cf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10642 = VPMINSQZ256rmbk
{ 10643, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11699cf8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #10643 = VPMINSQZ256rmbkz
{ 10644, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299cf8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10644 = VPMINSQZ256rmk
{ 10645, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40699cf8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #10645 = VPMINSQZ256rmkz
{ 10646, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40099cf8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10646 = VPMINSQZ256rr
{ 10647, 5, 1, 0, 0, 0, 0x40299cf8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #10647 = VPMINSQZ256rrk
{ 10648, 4, 1, 0, 0, 0, 0x40699cf8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #10648 = VPMINSQZ256rrkz
{ 10649, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819cf8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10649 = VPMINSQZrm
{ 10650, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11819cf8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10650 = VPMINSQZrmb
{ 10651, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a19cf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10651 = VPMINSQZrmbk
{ 10652, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e19cf8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #10652 = VPMINSQZrmbkz
{ 10653, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19cf8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10653 = VPMINSQZrmk
{ 10654, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e19cf8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #10654 = VPMINSQZrmkz
{ 10655, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80819cf8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10655 = VPMINSQZrr
{ 10656, 5, 1, 0, 0, 0, 0x80a19cf8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10656 = VPMINSQZrrk
{ 10657, 4, 1, 0, 0, 0, 0x80e19cf8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #10657 = VPMINSQZrrkz
{ 10658, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97538005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10658 = VPMINSWYrm
{ 10659, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x97538005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10659 = VPMINSWYrr
{ 10660, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017578005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10660 = VPMINSWZ128rm
{ 10661, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217578005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #10661 = VPMINSWZ128rmk
{ 10662, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617578005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #10662 = VPMINSWZ128rmkz
{ 10663, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20017578005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10663 = VPMINSWZ128rr
{ 10664, 5, 1, 0, 0, 0, 0x20217578005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #10664 = VPMINSWZ128rrk
{ 10665, 4, 1, 0, 0, 0, 0x20617578005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #10665 = VPMINSWZ128rrkz
{ 10666, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097578005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10666 = VPMINSWZ256rm
{ 10667, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297578005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #10667 = VPMINSWZ256rmk
{ 10668, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697578005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #10668 = VPMINSWZ256rmkz
{ 10669, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40097578005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10669 = VPMINSWZ256rr
{ 10670, 5, 1, 0, 0, 0, 0x40297578005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #10670 = VPMINSWZ256rrk
{ 10671, 4, 1, 0, 0, 0, 0x40697578005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #10671 = VPMINSWZ256rrkz
{ 10672, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817578005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10672 = VPMINSWZrm
{ 10673, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17578005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #10673 = VPMINSWZrmk
{ 10674, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17578005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #10674 = VPMINSWZrmkz
{ 10675, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80817578005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10675 = VPMINSWZrr
{ 10676, 5, 1, 0, 0, 0, 0x80a17578005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #10676 = VPMINSWZrrk
{ 10677, 4, 1, 0, 0, 0, 0x80e17578005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #10677 = VPMINSWZrrkz
{ 10678, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17538005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10678 = VPMINSWrm
{ 10679, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x17538005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10679 = VPMINSWrr
{ 10680, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x96d38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10680 = VPMINUBYrm
{ 10681, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x96d38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10681 = VPMINUBYrr
{ 10682, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016d78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10682 = VPMINUBZ128rm
{ 10683, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216d78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #10683 = VPMINUBZ128rmk
{ 10684, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616d78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #10684 = VPMINUBZ128rmkz
{ 10685, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20016d78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10685 = VPMINUBZ128rr
{ 10686, 5, 1, 0, 0, 0, 0x20216d78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #10686 = VPMINUBZ128rrk
{ 10687, 4, 1, 0, 0, 0, 0x20616d78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #10687 = VPMINUBZ128rrkz
{ 10688, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096d78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10688 = VPMINUBZ256rm
{ 10689, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296d78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #10689 = VPMINUBZ256rmk
{ 10690, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696d78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #10690 = VPMINUBZ256rmkz
{ 10691, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40096d78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10691 = VPMINUBZ256rr
{ 10692, 5, 1, 0, 0, 0, 0x40296d78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #10692 = VPMINUBZ256rrk
{ 10693, 4, 1, 0, 0, 0, 0x40696d78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #10693 = VPMINUBZ256rrkz
{ 10694, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816d78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10694 = VPMINUBZrm
{ 10695, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16d78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #10695 = VPMINUBZrmk
{ 10696, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16d78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #10696 = VPMINUBZrmkz
{ 10697, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80816d78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10697 = VPMINUBZrr
{ 10698, 5, 1, 0, 0, 0, 0x80a16d78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #10698 = VPMINUBZrrk
{ 10699, 4, 1, 0, 0, 0, 0x80e16d78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #10699 = VPMINUBZrrkz
{ 10700, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x16d38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10700 = VPMINUBrm
{ 10701, 3, 1, 0, 377, 0|(1ULL<<MCID::Commutable), 0x16d38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10701 = VPMINUBrr
{ 10702, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x91db8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10702 = VPMINUDYrm
{ 10703, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x91db8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10703 = VPMINUDYrr
{ 10704, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011df8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10704 = VPMINUDZ128rm
{ 10705, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9011df8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10705 = VPMINUDZ128rmb
{ 10706, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9211df8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10706 = VPMINUDZ128rmbk
{ 10707, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9611df8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10707 = VPMINUDZ128rmbkz
{ 10708, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211df8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #10708 = VPMINUDZ128rmk
{ 10709, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611df8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #10709 = VPMINUDZ128rmkz
{ 10710, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20011df8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10710 = VPMINUDZ128rr
{ 10711, 5, 1, 0, 0, 0, 0x20211df8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #10711 = VPMINUDZ128rrk
{ 10712, 4, 1, 0, 0, 0, 0x20611df8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #10712 = VPMINUDZ128rrkz
{ 10713, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091df8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10713 = VPMINUDZ256rm
{ 10714, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9091df8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10714 = VPMINUDZ256rmb
{ 10715, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9291df8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10715 = VPMINUDZ256rmbk
{ 10716, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9691df8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10716 = VPMINUDZ256rmbkz
{ 10717, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291df8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #10717 = VPMINUDZ256rmk
{ 10718, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691df8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #10718 = VPMINUDZ256rmkz
{ 10719, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40091df8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10719 = VPMINUDZ256rr
{ 10720, 5, 1, 0, 0, 0, 0x40291df8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #10720 = VPMINUDZ256rrk
{ 10721, 4, 1, 0, 0, 0, 0x40691df8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #10721 = VPMINUDZ256rrkz
{ 10722, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811df8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10722 = VPMINUDZrm
{ 10723, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9811df8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10723 = VPMINUDZrmb
{ 10724, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a11df8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10724 = VPMINUDZrmbk
{ 10725, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e11df8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10725 = VPMINUDZrmbkz
{ 10726, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11df8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #10726 = VPMINUDZrmk
{ 10727, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11df8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #10727 = VPMINUDZrmkz
{ 10728, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80811df8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10728 = VPMINUDZrr
{ 10729, 5, 1, 0, 0, 0, 0x80a11df8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #10729 = VPMINUDZrrk
{ 10730, 4, 1, 0, 0, 0, 0x80e11df8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #10730 = VPMINUDZrrkz
{ 10731, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x11db8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10731 = VPMINUDrm
{ 10732, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x11db8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10732 = VPMINUDrr
{ 10733, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20019df8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10733 = VPMINUQZ128rm
{ 10734, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11019df8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10734 = VPMINUQZ128rmb
{ 10735, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11219df8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10735 = VPMINUQZ128rmbk
{ 10736, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11619df8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #10736 = VPMINUQZ128rmbkz
{ 10737, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20219df8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #10737 = VPMINUQZ128rmk
{ 10738, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20619df8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #10738 = VPMINUQZ128rmkz
{ 10739, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20019df8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10739 = VPMINUQZ128rr
{ 10740, 5, 1, 0, 0, 0, 0x20219df8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #10740 = VPMINUQZ128rrk
{ 10741, 4, 1, 0, 0, 0, 0x20619df8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #10741 = VPMINUQZ128rrkz
{ 10742, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099df8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10742 = VPMINUQZ256rm
{ 10743, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11099df8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10743 = VPMINUQZ256rmb
{ 10744, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11299df8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10744 = VPMINUQZ256rmbk
{ 10745, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11699df8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #10745 = VPMINUQZ256rmbkz
{ 10746, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299df8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #10746 = VPMINUQZ256rmk
{ 10747, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40699df8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #10747 = VPMINUQZ256rmkz
{ 10748, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40099df8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10748 = VPMINUQZ256rr
{ 10749, 5, 1, 0, 0, 0, 0x40299df8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #10749 = VPMINUQZ256rrk
{ 10750, 4, 1, 0, 0, 0, 0x40699df8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #10750 = VPMINUQZ256rrkz
{ 10751, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819df8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10751 = VPMINUQZrm
{ 10752, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11819df8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10752 = VPMINUQZrmb
{ 10753, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a19df8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10753 = VPMINUQZrmbk
{ 10754, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e19df8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #10754 = VPMINUQZrmbkz
{ 10755, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19df8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #10755 = VPMINUQZrmk
{ 10756, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e19df8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #10756 = VPMINUQZrmkz
{ 10757, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80819df8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10757 = VPMINUQZrr
{ 10758, 5, 1, 0, 0, 0, 0x80a19df8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #10758 = VPMINUQZrrk
{ 10759, 4, 1, 0, 0, 0, 0x80e19df8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #10759 = VPMINUQZrrkz
{ 10760, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x91d38009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #10760 = VPMINUWYrm
{ 10761, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x91d38009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #10761 = VPMINUWYrr
{ 10762, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011d78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #10762 = VPMINUWZ128rm
{ 10763, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211d78009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #10763 = VPMINUWZ128rmk
{ 10764, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611d78009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #10764 = VPMINUWZ128rmkz
{ 10765, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20011d78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #10765 = VPMINUWZ128rr
{ 10766, 5, 1, 0, 0, 0, 0x20211d78009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #10766 = VPMINUWZ128rrk
{ 10767, 4, 1, 0, 0, 0, 0x20611d78009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #10767 = VPMINUWZ128rrkz
{ 10768, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091d78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #10768 = VPMINUWZ256rm
{ 10769, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291d78009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #10769 = VPMINUWZ256rmk
{ 10770, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691d78009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #10770 = VPMINUWZ256rmkz
{ 10771, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40091d78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #10771 = VPMINUWZ256rr
{ 10772, 5, 1, 0, 0, 0, 0x40291d78009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #10772 = VPMINUWZ256rrk
{ 10773, 4, 1, 0, 0, 0, 0x40691d78009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #10773 = VPMINUWZ256rrkz
{ 10774, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811d78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #10774 = VPMINUWZrm
{ 10775, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11d78009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #10775 = VPMINUWZrmk
{ 10776, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11d78009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #10776 = VPMINUWZrmkz
{ 10777, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80811d78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #10777 = VPMINUWZrr
{ 10778, 5, 1, 0, 0, 0, 0x80a11d78009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #10778 = VPMINUWZrrk
{ 10779, 4, 1, 0, 0, 0, 0x80e11d78009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #10779 = VPMINUWZrrkz
{ 10780, 7, 1, 0, 391, 0|(1ULL<<MCID::MayLoad), 0x11d38009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #10780 = VPMINUWrm
{ 10781, 3, 1, 0, 392, 0|(1ULL<<MCID::Commutable), 0x11d38009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #10781 = VPMINUWrr
{ 10782, 2, 1, 0, 0, 0, 0x200014f8009805ULL, nullptr, nullptr, OperandInfo862, -1 ,nullptr }, // Inst #10782 = VPMOVB2MZ128rr
{ 10783, 2, 1, 0, 0, 0, 0x400814f8009805ULL, nullptr, nullptr, OperandInfo863, -1 ,nullptr }, // Inst #10783 = VPMOVB2MZ256rr
{ 10784, 2, 1, 0, 0, 0, 0x808014f8009805ULL, nullptr, nullptr, OperandInfo864, -1 ,nullptr }, // Inst #10784 = VPMOVB2MZrr
{ 10785, 2, 1, 0, 0, 0, 0x20001cf8009805ULL, nullptr, nullptr, OperandInfo865, -1 ,nullptr }, // Inst #10785 = VPMOVD2MZ128rr
{ 10786, 2, 1, 0, 0, 0, 0x40081cf8009805ULL, nullptr, nullptr, OperandInfo866, -1 ,nullptr }, // Inst #10786 = VPMOVD2MZ256rr
{ 10787, 2, 1, 0, 0, 0, 0x80801cf8009805ULL, nullptr, nullptr, OperandInfo867, -1 ,nullptr }, // Inst #10787 = VPMOVD2MZrr
{ 10788, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x80018f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10788 = VPMOVDBZ128mr
{ 10789, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x82018f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #10789 = VPMOVDBZ128mrk
{ 10790, 2, 1, 0, 0, 0, 0x80018e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10790 = VPMOVDBZ128rr
{ 10791, 4, 1, 0, 0, 0, 0x82018e0009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #10791 = VPMOVDBZ128rrk
{ 10792, 3, 1, 0, 0, 0, 0x86018e0009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #10792 = VPMOVDBZ128rrkz
{ 10793, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x100818f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10793 = VPMOVDBZ256mr
{ 10794, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x102818f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #10794 = VPMOVDBZ256mrk
{ 10795, 2, 1, 0, 0, 0, 0x100818e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10795 = VPMOVDBZ256rr
{ 10796, 4, 1, 0, 0, 0, 0x102818e0009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #10796 = VPMOVDBZ256rrk
{ 10797, 3, 1, 0, 0, 0, 0x106818e0009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #10797 = VPMOVDBZ256rrkz
{ 10798, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x208018f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10798 = VPMOVDBZmr
{ 10799, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20a018f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #10799 = VPMOVDBZmrk
{ 10800, 2, 1, 0, 0, 0, 0x208018e0009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #10800 = VPMOVDBZrr
{ 10801, 4, 1, 0, 0, 0, 0x20a018e0009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr }, // Inst #10801 = VPMOVDBZrrk
{ 10802, 3, 1, 0, 0, 0, 0x20e018e0009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr }, // Inst #10802 = VPMOVDBZrrkz
{ 10803, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x100019f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10803 = VPMOVDWZ128mr
{ 10804, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x102019f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #10804 = VPMOVDWZ128mrk
{ 10805, 2, 1, 0, 0, 0, 0x100019e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10805 = VPMOVDWZ128rr
{ 10806, 4, 1, 0, 0, 0, 0x102019e0009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #10806 = VPMOVDWZ128rrk
{ 10807, 3, 1, 0, 0, 0, 0x106019e0009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #10807 = VPMOVDWZ128rrkz
{ 10808, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x200819f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10808 = VPMOVDWZ256mr
{ 10809, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x202819f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #10809 = VPMOVDWZ256mrk
{ 10810, 2, 1, 0, 0, 0, 0x200819e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10810 = VPMOVDWZ256rr
{ 10811, 4, 1, 0, 0, 0, 0x202819e0009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr }, // Inst #10811 = VPMOVDWZ256rrk
{ 10812, 3, 1, 0, 0, 0, 0x206819e0009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr }, // Inst #10812 = VPMOVDWZ256rrkz
{ 10813, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x408019f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10813 = VPMOVDWZmr
{ 10814, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40a019f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #10814 = VPMOVDWZmrk
{ 10815, 2, 1, 0, 0, 0, 0x408019e0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #10815 = VPMOVDWZrr
{ 10816, 4, 1, 0, 0, 0, 0x40a019e0009803ULL, nullptr, nullptr, OperandInfo875, -1 ,nullptr }, // Inst #10816 = VPMOVDWZrrk
{ 10817, 3, 1, 0, 0, 0, 0x40e019e0009803ULL, nullptr, nullptr, OperandInfo876, -1 ,nullptr }, // Inst #10817 = VPMOVDWZrrkz
{ 10818, 2, 1, 0, 0, 0, 0x20001478009805ULL, nullptr, nullptr, OperandInfo759, -1 ,nullptr }, // Inst #10818 = VPMOVM2BZ128rr
{ 10819, 2, 1, 0, 0, 0, 0x40081478009805ULL, nullptr, nullptr, OperandInfo877, -1 ,nullptr }, // Inst #10819 = VPMOVM2BZ256rr
{ 10820, 2, 1, 0, 0, 0, 0x80801478009805ULL, nullptr, nullptr, OperandInfo878, -1 ,nullptr }, // Inst #10820 = VPMOVM2BZrr
{ 10821, 2, 1, 0, 0, 0, 0x20001c78009805ULL, nullptr, nullptr, OperandInfo879, -1 ,nullptr }, // Inst #10821 = VPMOVM2DZ128rr
{ 10822, 2, 1, 0, 0, 0, 0x40081c78009805ULL, nullptr, nullptr, OperandInfo757, -1 ,nullptr }, // Inst #10822 = VPMOVM2DZ256rr
{ 10823, 2, 1, 0, 0, 0, 0x80801c78009805ULL, nullptr, nullptr, OperandInfo761, -1 ,nullptr }, // Inst #10823 = VPMOVM2DZrr
{ 10824, 2, 1, 0, 0, 0, 0x20009c78009805ULL, nullptr, nullptr, OperandInfo880, -1 ,nullptr }, // Inst #10824 = VPMOVM2QZ128rr
{ 10825, 2, 1, 0, 0, 0, 0x40089c78009805ULL, nullptr, nullptr, OperandInfo881, -1 ,nullptr }, // Inst #10825 = VPMOVM2QZ256rr
{ 10826, 2, 1, 0, 0, 0, 0x80809c78009805ULL, nullptr, nullptr, OperandInfo758, -1 ,nullptr }, // Inst #10826 = VPMOVM2QZrr
{ 10827, 2, 1, 0, 0, 0, 0x20009478009805ULL, nullptr, nullptr, OperandInfo756, -1 ,nullptr }, // Inst #10827 = VPMOVM2WZ128rr
{ 10828, 2, 1, 0, 0, 0, 0x40089478009805ULL, nullptr, nullptr, OperandInfo760, -1 ,nullptr }, // Inst #10828 = VPMOVM2WZ256rr
{ 10829, 2, 1, 0, 0, 0, 0x80809478009805ULL, nullptr, nullptr, OperandInfo882, -1 ,nullptr }, // Inst #10829 = VPMOVM2WZrr
{ 10830, 2, 1, 0, 805, 0, 0x86bb8005005ULL, nullptr, nullptr, OperandInfo691, -1 ,nullptr }, // Inst #10830 = VPMOVMSKBYrr
{ 10831, 2, 1, 0, 804, 0, 0x6bb8005005ULL, nullptr, nullptr, OperandInfo121, -1 ,nullptr }, // Inst #10831 = VPMOVMSKBrr
{ 10832, 2, 1, 0, 0, 0, 0x20009cf8009805ULL, nullptr, nullptr, OperandInfo883, -1 ,nullptr }, // Inst #10832 = VPMOVQ2MZ128rr
{ 10833, 2, 1, 0, 0, 0, 0x40089cf8009805ULL, nullptr, nullptr, OperandInfo884, -1 ,nullptr }, // Inst #10833 = VPMOVQ2MZ256rr
{ 10834, 2, 1, 0, 0, 0, 0x80809cf8009805ULL, nullptr, nullptr, OperandInfo885, -1 ,nullptr }, // Inst #10834 = VPMOVQ2MZrr
{ 10835, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4001978009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10835 = VPMOVQBZ128mr
{ 10836, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x4201978009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #10836 = VPMOVQBZ128mrk
{ 10837, 2, 1, 0, 0, 0, 0x4001960009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10837 = VPMOVQBZ128rr
{ 10838, 4, 1, 0, 0, 0, 0x4201960009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #10838 = VPMOVQBZ128rrk
{ 10839, 3, 1, 0, 0, 0, 0x4601960009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #10839 = VPMOVQBZ128rrkz
{ 10840, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8081978009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10840 = VPMOVQBZ256mr
{ 10841, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8281978009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #10841 = VPMOVQBZ256mrk
{ 10842, 2, 1, 0, 0, 0, 0x8081960009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10842 = VPMOVQBZ256rr
{ 10843, 4, 1, 0, 0, 0, 0x8281960009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #10843 = VPMOVQBZ256rrk
{ 10844, 3, 1, 0, 0, 0, 0x8681960009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #10844 = VPMOVQBZ256rrkz
{ 10845, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10801978009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10845 = VPMOVQBZmr
{ 10846, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10a01978009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #10846 = VPMOVQBZmrk
{ 10847, 2, 1, 0, 0, 0, 0x10801960009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #10847 = VPMOVQBZrr
{ 10848, 4, 1, 0, 0, 0, 0x10a01960009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr }, // Inst #10848 = VPMOVQBZrrk
{ 10849, 3, 1, 0, 0, 0, 0x10e01960009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr }, // Inst #10849 = VPMOVQBZrrkz
{ 10850, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10001af8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10850 = VPMOVQDZ128mr
{ 10851, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10201af8009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #10851 = VPMOVQDZ128mrk
{ 10852, 2, 1, 0, 0, 0, 0x10001ae0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10852 = VPMOVQDZ128rr
{ 10853, 4, 1, 0, 0, 0, 0x10201ae0009803ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #10853 = VPMOVQDZ128rrk
{ 10854, 3, 1, 0, 0, 0, 0x10601ae0009803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #10854 = VPMOVQDZ128rrkz
{ 10855, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20081af8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10855 = VPMOVQDZ256mr
{ 10856, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20281af8009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #10856 = VPMOVQDZ256mrk
{ 10857, 2, 1, 0, 0, 0, 0x20081ae0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10857 = VPMOVQDZ256rr
{ 10858, 4, 1, 0, 0, 0, 0x20281ae0009803ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #10858 = VPMOVQDZ256rrk
{ 10859, 3, 1, 0, 0, 0, 0x20681ae0009803ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #10859 = VPMOVQDZ256rrkz
{ 10860, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40801af8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10860 = VPMOVQDZmr
{ 10861, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40a01af8009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #10861 = VPMOVQDZmrk
{ 10862, 2, 1, 0, 0, 0, 0x40801ae0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #10862 = VPMOVQDZrr
{ 10863, 4, 1, 0, 0, 0, 0x40a01ae0009803ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #10863 = VPMOVQDZrrk
{ 10864, 3, 1, 0, 0, 0, 0x40e01ae0009803ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #10864 = VPMOVQDZrrkz
{ 10865, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8001a78009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10865 = VPMOVQWZ128mr
{ 10866, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8201a78009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #10866 = VPMOVQWZ128mrk
{ 10867, 2, 1, 0, 0, 0, 0x8001a60009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10867 = VPMOVQWZ128rr
{ 10868, 4, 1, 0, 0, 0, 0x8201a60009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #10868 = VPMOVQWZ128rrk
{ 10869, 3, 1, 0, 0, 0, 0x8601a60009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #10869 = VPMOVQWZ128rrkz
{ 10870, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10081a78009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10870 = VPMOVQWZ256mr
{ 10871, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10281a78009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #10871 = VPMOVQWZ256mrk
{ 10872, 2, 1, 0, 0, 0, 0x10081a60009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10872 = VPMOVQWZ256rr
{ 10873, 4, 1, 0, 0, 0, 0x10281a60009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr }, // Inst #10873 = VPMOVQWZ256rrk
{ 10874, 3, 1, 0, 0, 0, 0x10681a60009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr }, // Inst #10874 = VPMOVQWZ256rrkz
{ 10875, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20801a78009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10875 = VPMOVQWZmr
{ 10876, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20a01a78009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #10876 = VPMOVQWZmrk
{ 10877, 2, 1, 0, 0, 0, 0x20801a60009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #10877 = VPMOVQWZrr
{ 10878, 4, 1, 0, 0, 0, 0x20a01a60009803ULL, nullptr, nullptr, OperandInfo886, -1 ,nullptr }, // Inst #10878 = VPMOVQWZrrk
{ 10879, 3, 1, 0, 0, 0, 0x20e01a60009803ULL, nullptr, nullptr, OperandInfo887, -1 ,nullptr }, // Inst #10879 = VPMOVQWZrrkz
{ 10880, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80010f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10880 = VPMOVSDBZ128mr
{ 10881, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82010f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #10881 = VPMOVSDBZ128mrk
{ 10882, 2, 1, 0, 0, 0, 0x80010e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10882 = VPMOVSDBZ128rr
{ 10883, 4, 1, 0, 0, 0, 0x82010e0009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #10883 = VPMOVSDBZ128rrk
{ 10884, 3, 1, 0, 0, 0, 0x86010e0009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #10884 = VPMOVSDBZ128rrkz
{ 10885, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100810f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10885 = VPMOVSDBZ256mr
{ 10886, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102810f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #10886 = VPMOVSDBZ256mrk
{ 10887, 2, 1, 0, 0, 0, 0x100810e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10887 = VPMOVSDBZ256rr
{ 10888, 4, 1, 0, 0, 0, 0x102810e0009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #10888 = VPMOVSDBZ256rrk
{ 10889, 3, 1, 0, 0, 0, 0x106810e0009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #10889 = VPMOVSDBZ256rrkz
{ 10890, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208010f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10890 = VPMOVSDBZmr
{ 10891, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20a010f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #10891 = VPMOVSDBZmrk
{ 10892, 2, 1, 0, 0, 0, 0x208010e0009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #10892 = VPMOVSDBZrr
{ 10893, 4, 1, 0, 0, 0, 0x20a010e0009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr }, // Inst #10893 = VPMOVSDBZrrk
{ 10894, 3, 1, 0, 0, 0, 0x20e010e0009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr }, // Inst #10894 = VPMOVSDBZrrkz
{ 10895, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100011f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10895 = VPMOVSDWZ128mr
{ 10896, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102011f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #10896 = VPMOVSDWZ128mrk
{ 10897, 2, 1, 0, 0, 0, 0x100011e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10897 = VPMOVSDWZ128rr
{ 10898, 4, 1, 0, 0, 0, 0x102011e0009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #10898 = VPMOVSDWZ128rrk
{ 10899, 3, 1, 0, 0, 0, 0x106011e0009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #10899 = VPMOVSDWZ128rrkz
{ 10900, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200811f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10900 = VPMOVSDWZ256mr
{ 10901, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x202811f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #10901 = VPMOVSDWZ256mrk
{ 10902, 2, 1, 0, 0, 0, 0x200811e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10902 = VPMOVSDWZ256rr
{ 10903, 4, 1, 0, 0, 0, 0x202811e0009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr }, // Inst #10903 = VPMOVSDWZ256rrk
{ 10904, 3, 1, 0, 0, 0, 0x206811e0009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr }, // Inst #10904 = VPMOVSDWZ256rrkz
{ 10905, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408011f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10905 = VPMOVSDWZmr
{ 10906, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a011f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #10906 = VPMOVSDWZmrk
{ 10907, 2, 1, 0, 0, 0, 0x408011e0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #10907 = VPMOVSDWZrr
{ 10908, 4, 1, 0, 0, 0, 0x40a011e0009803ULL, nullptr, nullptr, OperandInfo875, -1 ,nullptr }, // Inst #10908 = VPMOVSDWZrrk
{ 10909, 3, 1, 0, 0, 0, 0x40e011e0009803ULL, nullptr, nullptr, OperandInfo876, -1 ,nullptr }, // Inst #10909 = VPMOVSDWZrrkz
{ 10910, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4001178009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10910 = VPMOVSQBZ128mr
{ 10911, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4201178009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #10911 = VPMOVSQBZ128mrk
{ 10912, 2, 1, 0, 0, 0, 0x4001160009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10912 = VPMOVSQBZ128rr
{ 10913, 4, 1, 0, 0, 0, 0x4201160009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #10913 = VPMOVSQBZ128rrk
{ 10914, 3, 1, 0, 0, 0, 0x4601160009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #10914 = VPMOVSQBZ128rrkz
{ 10915, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x8081178009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10915 = VPMOVSQBZ256mr
{ 10916, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8281178009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #10916 = VPMOVSQBZ256mrk
{ 10917, 2, 1, 0, 0, 0, 0x8081160009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10917 = VPMOVSQBZ256rr
{ 10918, 4, 1, 0, 0, 0, 0x8281160009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #10918 = VPMOVSQBZ256rrk
{ 10919, 3, 1, 0, 0, 0, 0x8681160009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #10919 = VPMOVSQBZ256rrkz
{ 10920, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10801178009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10920 = VPMOVSQBZmr
{ 10921, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10a01178009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #10921 = VPMOVSQBZmrk
{ 10922, 2, 1, 0, 0, 0, 0x10801160009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #10922 = VPMOVSQBZrr
{ 10923, 4, 1, 0, 0, 0, 0x10a01160009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr }, // Inst #10923 = VPMOVSQBZrrk
{ 10924, 3, 1, 0, 0, 0, 0x10e01160009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr }, // Inst #10924 = VPMOVSQBZrrkz
{ 10925, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100012f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10925 = VPMOVSQDZ128mr
{ 10926, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102012f8009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #10926 = VPMOVSQDZ128mrk
{ 10927, 2, 1, 0, 0, 0, 0x100012e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10927 = VPMOVSQDZ128rr
{ 10928, 4, 1, 0, 0, 0, 0x102012e0009803ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #10928 = VPMOVSQDZ128rrk
{ 10929, 3, 1, 0, 0, 0, 0x106012e0009803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #10929 = VPMOVSQDZ128rrkz
{ 10930, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200812f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10930 = VPMOVSQDZ256mr
{ 10931, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x202812f8009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #10931 = VPMOVSQDZ256mrk
{ 10932, 2, 1, 0, 0, 0, 0x200812e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10932 = VPMOVSQDZ256rr
{ 10933, 4, 1, 0, 0, 0, 0x202812e0009803ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #10933 = VPMOVSQDZ256rrk
{ 10934, 3, 1, 0, 0, 0, 0x206812e0009803ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #10934 = VPMOVSQDZ256rrkz
{ 10935, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408012f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10935 = VPMOVSQDZmr
{ 10936, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a012f8009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #10936 = VPMOVSQDZmrk
{ 10937, 2, 1, 0, 0, 0, 0x408012e0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #10937 = VPMOVSQDZrr
{ 10938, 4, 1, 0, 0, 0, 0x40a012e0009803ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #10938 = VPMOVSQDZrrk
{ 10939, 3, 1, 0, 0, 0, 0x40e012e0009803ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #10939 = VPMOVSQDZrrkz
{ 10940, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x8001278009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10940 = VPMOVSQWZ128mr
{ 10941, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8201278009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #10941 = VPMOVSQWZ128mrk
{ 10942, 2, 1, 0, 0, 0, 0x8001260009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10942 = VPMOVSQWZ128rr
{ 10943, 4, 1, 0, 0, 0, 0x8201260009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #10943 = VPMOVSQWZ128rrk
{ 10944, 3, 1, 0, 0, 0, 0x8601260009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #10944 = VPMOVSQWZ128rrkz
{ 10945, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10081278009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10945 = VPMOVSQWZ256mr
{ 10946, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10281278009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #10946 = VPMOVSQWZ256mrk
{ 10947, 2, 1, 0, 0, 0, 0x10081260009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10947 = VPMOVSQWZ256rr
{ 10948, 4, 1, 0, 0, 0, 0x10281260009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr }, // Inst #10948 = VPMOVSQWZ256rrk
{ 10949, 3, 1, 0, 0, 0, 0x10681260009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr }, // Inst #10949 = VPMOVSQWZ256rrkz
{ 10950, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20801278009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10950 = VPMOVSQWZmr
{ 10951, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20a01278009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #10951 = VPMOVSQWZmrk
{ 10952, 2, 1, 0, 0, 0, 0x20801260009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #10952 = VPMOVSQWZrr
{ 10953, 4, 1, 0, 0, 0, 0x20a01260009803ULL, nullptr, nullptr, OperandInfo886, -1 ,nullptr }, // Inst #10953 = VPMOVSQWZrrk
{ 10954, 3, 1, 0, 0, 0, 0x20e01260009803ULL, nullptr, nullptr, OperandInfo887, -1 ,nullptr }, // Inst #10954 = VPMOVSQWZrrkz
{ 10955, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10001078009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #10955 = VPMOVSWBZ128mr
{ 10956, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10201078009804ULL, nullptr, nullptr, OperandInfo661, -1 ,nullptr }, // Inst #10956 = VPMOVSWBZ128mrk
{ 10957, 2, 1, 0, 0, 0, 0x10001060009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10957 = VPMOVSWBZ128rr
{ 10958, 4, 1, 0, 0, 0, 0x10201060009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #10958 = VPMOVSWBZ128rrk
{ 10959, 3, 1, 0, 0, 0, 0x10601060009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #10959 = VPMOVSWBZ128rrkz
{ 10960, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20081078009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #10960 = VPMOVSWBZ256mr
{ 10961, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20281078009804ULL, nullptr, nullptr, OperandInfo666, -1 ,nullptr }, // Inst #10961 = VPMOVSWBZ256mrk
{ 10962, 2, 1, 0, 0, 0, 0x20081060009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #10962 = VPMOVSWBZ256rr
{ 10963, 4, 1, 0, 0, 0, 0x20281060009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #10963 = VPMOVSWBZ256rrk
{ 10964, 3, 1, 0, 0, 0, 0x20681060009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #10964 = VPMOVSWBZ256rrkz
{ 10965, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801078009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #10965 = VPMOVSWBZmr
{ 10966, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a01078009804ULL, nullptr, nullptr, OperandInfo671, -1 ,nullptr }, // Inst #10966 = VPMOVSWBZmrk
{ 10967, 2, 1, 0, 0, 0, 0x40801060009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #10967 = VPMOVSWBZrr
{ 10968, 4, 1, 0, 0, 0, 0x40a01060009803ULL, nullptr, nullptr, OperandInfo888, -1 ,nullptr }, // Inst #10968 = VPMOVSWBZrrk
{ 10969, 3, 1, 0, 0, 0, 0x40e01060009803ULL, nullptr, nullptr, OperandInfo889, -1 ,nullptr }, // Inst #10969 = VPMOVSWBZrrkz
{ 10970, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x810b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #10970 = VPMOVSXBDYrm
{ 10971, 2, 1, 0, 571, 0, 0x810b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #10971 = VPMOVSXBDYrr
{ 10972, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80010e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #10972 = VPMOVSXBDZ128rm
{ 10973, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82010e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #10973 = VPMOVSXBDZ128rmk
{ 10974, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86010e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #10974 = VPMOVSXBDZ128rmkz
{ 10975, 2, 1, 0, 0, 0, 0x80010e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10975 = VPMOVSXBDZ128rr
{ 10976, 4, 1, 0, 0, 0, 0x82010e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #10976 = VPMOVSXBDZ128rrk
{ 10977, 3, 1, 0, 0, 0, 0x86010e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #10977 = VPMOVSXBDZ128rrkz
{ 10978, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100810e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #10978 = VPMOVSXBDZ256rm
{ 10979, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x102810e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #10979 = VPMOVSXBDZ256rmk
{ 10980, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x106810e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #10980 = VPMOVSXBDZ256rmkz
{ 10981, 2, 1, 0, 0, 0, 0x100810e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #10981 = VPMOVSXBDZ256rr
{ 10982, 4, 1, 0, 0, 0, 0x102810e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #10982 = VPMOVSXBDZ256rrk
{ 10983, 3, 1, 0, 0, 0, 0x106810e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #10983 = VPMOVSXBDZ256rrkz
{ 10984, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x208010e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #10984 = VPMOVSXBDZrm
{ 10985, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a010e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #10985 = VPMOVSXBDZrmk
{ 10986, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e010e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #10986 = VPMOVSXBDZrmkz
{ 10987, 2, 1, 0, 0, 0, 0x208010e0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #10987 = VPMOVSXBDZrr
{ 10988, 4, 1, 0, 0, 0, 0x20a010e0009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr }, // Inst #10988 = VPMOVSXBDZrrk
{ 10989, 3, 1, 0, 0, 0, 0x20e010e0009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr }, // Inst #10989 = VPMOVSXBDZrrkz
{ 10990, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x10b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #10990 = VPMOVSXBDrm
{ 10991, 2, 1, 0, 571, 0, 0x10b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #10991 = VPMOVSXBDrr
{ 10992, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x81138009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #10992 = VPMOVSXBQYrm
{ 10993, 2, 1, 0, 792, 0, 0x81138009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #10993 = VPMOVSXBQYrr
{ 10994, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4001160009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #10994 = VPMOVSXBQZ128rm
{ 10995, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4201160009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #10995 = VPMOVSXBQZ128rmk
{ 10996, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4601160009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #10996 = VPMOVSXBQZ128rmkz
{ 10997, 2, 1, 0, 0, 0, 0x4001160009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #10997 = VPMOVSXBQZ128rr
{ 10998, 4, 1, 0, 0, 0, 0x4201160009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #10998 = VPMOVSXBQZ128rrk
{ 10999, 3, 1, 0, 0, 0, 0x4601160009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #10999 = VPMOVSXBQZ128rrkz
{ 11000, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081160009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11000 = VPMOVSXBQZ256rm
{ 11001, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8281160009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #11001 = VPMOVSXBQZ256rmk
{ 11002, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8681160009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #11002 = VPMOVSXBQZ256rmkz
{ 11003, 2, 1, 0, 0, 0, 0x8081160009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11003 = VPMOVSXBQZ256rr
{ 11004, 4, 1, 0, 0, 0, 0x8281160009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #11004 = VPMOVSXBQZ256rrk
{ 11005, 3, 1, 0, 0, 0, 0x8681160009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #11005 = VPMOVSXBQZ256rrkz
{ 11006, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10801160009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11006 = VPMOVSXBQZrm
{ 11007, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a01160009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #11007 = VPMOVSXBQZrmk
{ 11008, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10e01160009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #11008 = VPMOVSXBQZrmkz
{ 11009, 2, 1, 0, 0, 0, 0x10801160009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #11009 = VPMOVSXBQZrr
{ 11010, 4, 1, 0, 0, 0, 0x10a01160009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr }, // Inst #11010 = VPMOVSXBQZrrk
{ 11011, 3, 1, 0, 0, 0, 0x10e01160009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr }, // Inst #11011 = VPMOVSXBQZrrkz
{ 11012, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x1138009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11012 = VPMOVSXBQrm
{ 11013, 2, 1, 0, 571, 0, 0x1138009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11013 = VPMOVSXBQrr
{ 11014, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x81038009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11014 = VPMOVSXBWYrm
{ 11015, 2, 1, 0, 792, 0, 0x81038009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11015 = VPMOVSXBWYrr
{ 11016, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10001060009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11016 = VPMOVSXBWZ128rm
{ 11017, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10201060009006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr }, // Inst #11017 = VPMOVSXBWZ128rmk
{ 11018, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10601060009006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr }, // Inst #11018 = VPMOVSXBWZ128rmkz
{ 11019, 2, 1, 0, 0, 0, 0x10001060009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11019 = VPMOVSXBWZ128rr
{ 11020, 4, 1, 0, 0, 0, 0x10201060009005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #11020 = VPMOVSXBWZ128rrk
{ 11021, 3, 1, 0, 0, 0, 0x10601060009005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #11021 = VPMOVSXBWZ128rrkz
{ 11022, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20081060009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11022 = VPMOVSXBWZ256rm
{ 11023, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20281060009006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr }, // Inst #11023 = VPMOVSXBWZ256rmk
{ 11024, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20681060009006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr }, // Inst #11024 = VPMOVSXBWZ256rmkz
{ 11025, 2, 1, 0, 0, 0, 0x20081060009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11025 = VPMOVSXBWZ256rr
{ 11026, 4, 1, 0, 0, 0, 0x20281060009005ULL, nullptr, nullptr, OperandInfo770, -1 ,nullptr }, // Inst #11026 = VPMOVSXBWZ256rrk
{ 11027, 3, 1, 0, 0, 0, 0x20681060009005ULL, nullptr, nullptr, OperandInfo771, -1 ,nullptr }, // Inst #11027 = VPMOVSXBWZ256rrkz
{ 11028, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40801060009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11028 = VPMOVSXBWZrm
{ 11029, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a01060009006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr }, // Inst #11029 = VPMOVSXBWZrmk
{ 11030, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e01060009006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr }, // Inst #11030 = VPMOVSXBWZrmkz
{ 11031, 2, 1, 0, 0, 0, 0x40801060009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #11031 = VPMOVSXBWZrr
{ 11032, 4, 1, 0, 0, 0, 0x40a01060009005ULL, nullptr, nullptr, OperandInfo890, -1 ,nullptr }, // Inst #11032 = VPMOVSXBWZrrk
{ 11033, 3, 1, 0, 0, 0, 0x40e01060009005ULL, nullptr, nullptr, OperandInfo891, -1 ,nullptr }, // Inst #11033 = VPMOVSXBWZrrkz
{ 11034, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x1038009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11034 = VPMOVSXBWrm
{ 11035, 2, 1, 0, 571, 0, 0x1038009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11035 = VPMOVSXBWrr
{ 11036, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x812b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11036 = VPMOVSXDQYrm
{ 11037, 2, 1, 0, 792, 0, 0x812b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11037 = VPMOVSXDQYrr
{ 11038, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100012e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11038 = VPMOVSXDQZ128rm
{ 11039, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x102012e0009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #11039 = VPMOVSXDQZ128rmk
{ 11040, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x106012e0009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #11040 = VPMOVSXDQZ128rmkz
{ 11041, 2, 1, 0, 0, 0, 0x100012e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11041 = VPMOVSXDQZ128rr
{ 11042, 4, 1, 0, 0, 0, 0x102012e0009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #11042 = VPMOVSXDQZ128rrk
{ 11043, 3, 1, 0, 0, 0, 0x106012e0009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #11043 = VPMOVSXDQZ128rrkz
{ 11044, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200812e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11044 = VPMOVSXDQZ256rm
{ 11045, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202812e0009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #11045 = VPMOVSXDQZ256rmk
{ 11046, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206812e0009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #11046 = VPMOVSXDQZ256rmkz
{ 11047, 2, 1, 0, 0, 0, 0x200812e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11047 = VPMOVSXDQZ256rr
{ 11048, 4, 1, 0, 0, 0, 0x202812e0009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #11048 = VPMOVSXDQZ256rrk
{ 11049, 3, 1, 0, 0, 0, 0x206812e0009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #11049 = VPMOVSXDQZ256rrkz
{ 11050, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x408012e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11050 = VPMOVSXDQZrm
{ 11051, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a012e0009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #11051 = VPMOVSXDQZrmk
{ 11052, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e012e0009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #11052 = VPMOVSXDQZrmkz
{ 11053, 2, 1, 0, 0, 0, 0x408012e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #11053 = VPMOVSXDQZrr
{ 11054, 4, 1, 0, 0, 0, 0x40a012e0009005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #11054 = VPMOVSXDQZrrk
{ 11055, 3, 1, 0, 0, 0, 0x40e012e0009005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #11055 = VPMOVSXDQZrrkz
{ 11056, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x12b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11056 = VPMOVSXDQrm
{ 11057, 2, 1, 0, 571, 0, 0x12b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11057 = VPMOVSXDQrr
{ 11058, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x811b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11058 = VPMOVSXWDYrm
{ 11059, 2, 1, 0, 571, 0, 0x811b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11059 = VPMOVSXWDYrr
{ 11060, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100011e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11060 = VPMOVSXWDZ128rm
{ 11061, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x102011e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #11061 = VPMOVSXWDZ128rmk
{ 11062, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x106011e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #11062 = VPMOVSXWDZ128rmkz
{ 11063, 2, 1, 0, 0, 0, 0x100011e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11063 = VPMOVSXWDZ128rr
{ 11064, 4, 1, 0, 0, 0, 0x102011e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #11064 = VPMOVSXWDZ128rrk
{ 11065, 3, 1, 0, 0, 0, 0x106011e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #11065 = VPMOVSXWDZ128rrkz
{ 11066, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200811e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11066 = VPMOVSXWDZ256rm
{ 11067, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202811e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #11067 = VPMOVSXWDZ256rmk
{ 11068, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206811e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #11068 = VPMOVSXWDZ256rmkz
{ 11069, 2, 1, 0, 0, 0, 0x200811e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11069 = VPMOVSXWDZ256rr
{ 11070, 4, 1, 0, 0, 0, 0x202811e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #11070 = VPMOVSXWDZ256rrk
{ 11071, 3, 1, 0, 0, 0, 0x206811e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #11071 = VPMOVSXWDZ256rrkz
{ 11072, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x408011e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11072 = VPMOVSXWDZrm
{ 11073, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a011e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #11073 = VPMOVSXWDZrmk
{ 11074, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e011e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #11074 = VPMOVSXWDZrmkz
{ 11075, 2, 1, 0, 0, 0, 0x408011e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #11075 = VPMOVSXWDZrr
{ 11076, 4, 1, 0, 0, 0, 0x40a011e0009005ULL, nullptr, nullptr, OperandInfo462, -1 ,nullptr }, // Inst #11076 = VPMOVSXWDZrrk
{ 11077, 3, 1, 0, 0, 0, 0x40e011e0009005ULL, nullptr, nullptr, OperandInfo463, -1 ,nullptr }, // Inst #11077 = VPMOVSXWDZrrkz
{ 11078, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x11b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11078 = VPMOVSXWDrm
{ 11079, 2, 1, 0, 571, 0, 0x11b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11079 = VPMOVSXWDrr
{ 11080, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x81238009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11080 = VPMOVSXWQYrm
{ 11081, 2, 1, 0, 571, 0, 0x81238009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11081 = VPMOVSXWQYrr
{ 11082, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8001260009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11082 = VPMOVSXWQZ128rm
{ 11083, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8201260009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #11083 = VPMOVSXWQZ128rmk
{ 11084, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8601260009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #11084 = VPMOVSXWQZ128rmkz
{ 11085, 2, 1, 0, 0, 0, 0x8001260009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11085 = VPMOVSXWQZ128rr
{ 11086, 4, 1, 0, 0, 0, 0x8201260009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #11086 = VPMOVSXWQZ128rrk
{ 11087, 3, 1, 0, 0, 0, 0x8601260009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #11087 = VPMOVSXWQZ128rrkz
{ 11088, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10081260009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11088 = VPMOVSXWQZ256rm
{ 11089, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10281260009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #11089 = VPMOVSXWQZ256rmk
{ 11090, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10681260009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #11090 = VPMOVSXWQZ256rmkz
{ 11091, 2, 1, 0, 0, 0, 0x10081260009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11091 = VPMOVSXWQZ256rr
{ 11092, 4, 1, 0, 0, 0, 0x10281260009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #11092 = VPMOVSXWQZ256rrk
{ 11093, 3, 1, 0, 0, 0, 0x10681260009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #11093 = VPMOVSXWQZ256rrkz
{ 11094, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20801260009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11094 = VPMOVSXWQZrm
{ 11095, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a01260009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #11095 = VPMOVSXWQZrmk
{ 11096, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e01260009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #11096 = VPMOVSXWQZrmkz
{ 11097, 2, 1, 0, 0, 0, 0x20801260009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #11097 = VPMOVSXWQZrr
{ 11098, 4, 1, 0, 0, 0, 0x20a01260009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr }, // Inst #11098 = VPMOVSXWQZrrk
{ 11099, 3, 1, 0, 0, 0, 0x20e01260009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr }, // Inst #11099 = VPMOVSXWQZrrkz
{ 11100, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x1238009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11100 = VPMOVSXWQrm
{ 11101, 2, 1, 0, 571, 0, 0x1238009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11101 = VPMOVSXWQrr
{ 11102, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x80008f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #11102 = VPMOVUSDBZ128mr
{ 11103, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x82008f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #11103 = VPMOVUSDBZ128mrk
{ 11104, 2, 1, 0, 0, 0, 0x80008e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11104 = VPMOVUSDBZ128rr
{ 11105, 4, 1, 0, 0, 0, 0x82008e0009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #11105 = VPMOVUSDBZ128rrk
{ 11106, 3, 1, 0, 0, 0, 0x86008e0009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #11106 = VPMOVUSDBZ128rrkz
{ 11107, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100808f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #11107 = VPMOVUSDBZ256mr
{ 11108, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102808f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #11108 = VPMOVUSDBZ256mrk
{ 11109, 2, 1, 0, 0, 0, 0x100808e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #11109 = VPMOVUSDBZ256rr
{ 11110, 4, 1, 0, 0, 0, 0x102808e0009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #11110 = VPMOVUSDBZ256rrk
{ 11111, 3, 1, 0, 0, 0, 0x106808e0009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #11111 = VPMOVUSDBZ256rrkz
{ 11112, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x208008f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #11112 = VPMOVUSDBZmr
{ 11113, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20a008f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #11113 = VPMOVUSDBZmrk
{ 11114, 2, 1, 0, 0, 0, 0x208008e0009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #11114 = VPMOVUSDBZrr
{ 11115, 4, 1, 0, 0, 0, 0x20a008e0009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr }, // Inst #11115 = VPMOVUSDBZrrk
{ 11116, 3, 1, 0, 0, 0, 0x20e008e0009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr }, // Inst #11116 = VPMOVUSDBZrrkz
{ 11117, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x100009f8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #11117 = VPMOVUSDWZ128mr
{ 11118, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x102009f8009804ULL, nullptr, nullptr, OperandInfo434, -1 ,nullptr }, // Inst #11118 = VPMOVUSDWZ128mrk
{ 11119, 2, 1, 0, 0, 0, 0x100009e0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11119 = VPMOVUSDWZ128rr
{ 11120, 4, 1, 0, 0, 0, 0x102009e0009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #11120 = VPMOVUSDWZ128rrk
{ 11121, 3, 1, 0, 0, 0, 0x106009e0009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #11121 = VPMOVUSDWZ128rrkz
{ 11122, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x200809f8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #11122 = VPMOVUSDWZ256mr
{ 11123, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x202809f8009804ULL, nullptr, nullptr, OperandInfo435, -1 ,nullptr }, // Inst #11123 = VPMOVUSDWZ256mrk
{ 11124, 2, 1, 0, 0, 0, 0x200809e0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #11124 = VPMOVUSDWZ256rr
{ 11125, 4, 1, 0, 0, 0, 0x202809e0009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr }, // Inst #11125 = VPMOVUSDWZ256rrk
{ 11126, 3, 1, 0, 0, 0, 0x206809e0009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr }, // Inst #11126 = VPMOVUSDWZ256rrkz
{ 11127, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408009f8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #11127 = VPMOVUSDWZmr
{ 11128, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a009f8009804ULL, nullptr, nullptr, OperandInfo438, -1 ,nullptr }, // Inst #11128 = VPMOVUSDWZmrk
{ 11129, 2, 1, 0, 0, 0, 0x408009e0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #11129 = VPMOVUSDWZrr
{ 11130, 4, 1, 0, 0, 0, 0x40a009e0009803ULL, nullptr, nullptr, OperandInfo875, -1 ,nullptr }, // Inst #11130 = VPMOVUSDWZrrk
{ 11131, 3, 1, 0, 0, 0, 0x40e009e0009803ULL, nullptr, nullptr, OperandInfo876, -1 ,nullptr }, // Inst #11131 = VPMOVUSDWZrrkz
{ 11132, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4000978009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #11132 = VPMOVUSQBZ128mr
{ 11133, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x4200978009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #11133 = VPMOVUSQBZ128mrk
{ 11134, 2, 1, 0, 0, 0, 0x4000960009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11134 = VPMOVUSQBZ128rr
{ 11135, 4, 1, 0, 0, 0, 0x4200960009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #11135 = VPMOVUSQBZ128rrk
{ 11136, 3, 1, 0, 0, 0, 0x4600960009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #11136 = VPMOVUSQBZ128rrkz
{ 11137, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x8080978009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #11137 = VPMOVUSQBZ256mr
{ 11138, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8280978009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #11138 = VPMOVUSQBZ256mrk
{ 11139, 2, 1, 0, 0, 0, 0x8080960009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #11139 = VPMOVUSQBZ256rr
{ 11140, 4, 1, 0, 0, 0, 0x8280960009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #11140 = VPMOVUSQBZ256rrk
{ 11141, 3, 1, 0, 0, 0, 0x8680960009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #11141 = VPMOVUSQBZ256rrkz
{ 11142, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10800978009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #11142 = VPMOVUSQBZmr
{ 11143, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10a00978009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #11143 = VPMOVUSQBZmrk
{ 11144, 2, 1, 0, 0, 0, 0x10800960009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #11144 = VPMOVUSQBZrr
{ 11145, 4, 1, 0, 0, 0, 0x10a00960009803ULL, nullptr, nullptr, OperandInfo871, -1 ,nullptr }, // Inst #11145 = VPMOVUSQBZrrk
{ 11146, 3, 1, 0, 0, 0, 0x10e00960009803ULL, nullptr, nullptr, OperandInfo872, -1 ,nullptr }, // Inst #11146 = VPMOVUSQBZrrkz
{ 11147, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10000af8009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #11147 = VPMOVUSQDZ128mr
{ 11148, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10200af8009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #11148 = VPMOVUSQDZ128mrk
{ 11149, 2, 1, 0, 0, 0, 0x10000ae0009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11149 = VPMOVUSQDZ128rr
{ 11150, 4, 1, 0, 0, 0, 0x10200ae0009803ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #11150 = VPMOVUSQDZ128rrk
{ 11151, 3, 1, 0, 0, 0, 0x10600ae0009803ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #11151 = VPMOVUSQDZ128rrkz
{ 11152, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20080af8009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #11152 = VPMOVUSQDZ256mr
{ 11153, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20280af8009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #11153 = VPMOVUSQDZ256mrk
{ 11154, 2, 1, 0, 0, 0, 0x20080ae0009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #11154 = VPMOVUSQDZ256rr
{ 11155, 4, 1, 0, 0, 0, 0x20280ae0009803ULL, nullptr, nullptr, OperandInfo452, -1 ,nullptr }, // Inst #11155 = VPMOVUSQDZ256rrk
{ 11156, 3, 1, 0, 0, 0, 0x20680ae0009803ULL, nullptr, nullptr, OperandInfo453, -1 ,nullptr }, // Inst #11156 = VPMOVUSQDZ256rrkz
{ 11157, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800af8009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #11157 = VPMOVUSQDZmr
{ 11158, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a00af8009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #11158 = VPMOVUSQDZmrk
{ 11159, 2, 1, 0, 0, 0, 0x40800ae0009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #11159 = VPMOVUSQDZrr
{ 11160, 4, 1, 0, 0, 0, 0x40a00ae0009803ULL, nullptr, nullptr, OperandInfo458, -1 ,nullptr }, // Inst #11160 = VPMOVUSQDZrrk
{ 11161, 3, 1, 0, 0, 0, 0x40e00ae0009803ULL, nullptr, nullptr, OperandInfo459, -1 ,nullptr }, // Inst #11161 = VPMOVUSQDZrrkz
{ 11162, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x8000a78009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #11162 = VPMOVUSQWZ128mr
{ 11163, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x8200a78009804ULL, nullptr, nullptr, OperandInfo421, -1 ,nullptr }, // Inst #11163 = VPMOVUSQWZ128mrk
{ 11164, 2, 1, 0, 0, 0, 0x8000a60009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11164 = VPMOVUSQWZ128rr
{ 11165, 4, 1, 0, 0, 0, 0x8200a60009803ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #11165 = VPMOVUSQWZ128rrk
{ 11166, 3, 1, 0, 0, 0, 0x8600a60009803ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #11166 = VPMOVUSQWZ128rrkz
{ 11167, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10080a78009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #11167 = VPMOVUSQWZ256mr
{ 11168, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10280a78009804ULL, nullptr, nullptr, OperandInfo425, -1 ,nullptr }, // Inst #11168 = VPMOVUSQWZ256mrk
{ 11169, 2, 1, 0, 0, 0, 0x10080a60009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #11169 = VPMOVUSQWZ256rr
{ 11170, 4, 1, 0, 0, 0, 0x10280a60009803ULL, nullptr, nullptr, OperandInfo873, -1 ,nullptr }, // Inst #11170 = VPMOVUSQWZ256rrk
{ 11171, 3, 1, 0, 0, 0, 0x10680a60009803ULL, nullptr, nullptr, OperandInfo874, -1 ,nullptr }, // Inst #11171 = VPMOVUSQWZ256rrkz
{ 11172, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20800a78009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #11172 = VPMOVUSQWZmr
{ 11173, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20a00a78009804ULL, nullptr, nullptr, OperandInfo430, -1 ,nullptr }, // Inst #11173 = VPMOVUSQWZmrk
{ 11174, 2, 1, 0, 0, 0, 0x20800a60009803ULL, nullptr, nullptr, OperandInfo870, -1 ,nullptr }, // Inst #11174 = VPMOVUSQWZrr
{ 11175, 4, 1, 0, 0, 0, 0x20a00a60009803ULL, nullptr, nullptr, OperandInfo886, -1 ,nullptr }, // Inst #11175 = VPMOVUSQWZrrk
{ 11176, 3, 1, 0, 0, 0, 0x20e00a60009803ULL, nullptr, nullptr, OperandInfo887, -1 ,nullptr }, // Inst #11176 = VPMOVUSQWZrrkz
{ 11177, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x10000878009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #11177 = VPMOVUSWBZ128mr
{ 11178, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x10200878009804ULL, nullptr, nullptr, OperandInfo661, -1 ,nullptr }, // Inst #11178 = VPMOVUSWBZ128mrk
{ 11179, 2, 1, 0, 0, 0, 0x10000860009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11179 = VPMOVUSWBZ128rr
{ 11180, 4, 1, 0, 0, 0, 0x10200860009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #11180 = VPMOVUSWBZ128rrk
{ 11181, 3, 1, 0, 0, 0, 0x10600860009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #11181 = VPMOVUSWBZ128rrkz
{ 11182, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x20080878009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #11182 = VPMOVUSWBZ256mr
{ 11183, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x20280878009804ULL, nullptr, nullptr, OperandInfo666, -1 ,nullptr }, // Inst #11183 = VPMOVUSWBZ256mrk
{ 11184, 2, 1, 0, 0, 0, 0x20080860009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #11184 = VPMOVUSWBZ256rr
{ 11185, 4, 1, 0, 0, 0, 0x20280860009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #11185 = VPMOVUSWBZ256rrk
{ 11186, 3, 1, 0, 0, 0, 0x20680860009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #11186 = VPMOVUSWBZ256rrkz
{ 11187, 6, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800878009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #11187 = VPMOVUSWBZmr
{ 11188, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x40a00878009804ULL, nullptr, nullptr, OperandInfo671, -1 ,nullptr }, // Inst #11188 = VPMOVUSWBZmrk
{ 11189, 2, 1, 0, 0, 0, 0x40800860009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #11189 = VPMOVUSWBZrr
{ 11190, 4, 1, 0, 0, 0, 0x40a00860009803ULL, nullptr, nullptr, OperandInfo888, -1 ,nullptr }, // Inst #11190 = VPMOVUSWBZrrk
{ 11191, 3, 1, 0, 0, 0, 0x40e00860009803ULL, nullptr, nullptr, OperandInfo889, -1 ,nullptr }, // Inst #11191 = VPMOVUSWBZrrkz
{ 11192, 2, 1, 0, 0, 0, 0x200094f8009805ULL, nullptr, nullptr, OperandInfo892, -1 ,nullptr }, // Inst #11192 = VPMOVW2MZ128rr
{ 11193, 2, 1, 0, 0, 0, 0x400894f8009805ULL, nullptr, nullptr, OperandInfo893, -1 ,nullptr }, // Inst #11193 = VPMOVW2MZ256rr
{ 11194, 2, 1, 0, 0, 0, 0x808094f8009805ULL, nullptr, nullptr, OperandInfo894, -1 ,nullptr }, // Inst #11194 = VPMOVW2MZrr
{ 11195, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10001878009804ULL, nullptr, nullptr, OperandInfo420, -1 ,nullptr }, // Inst #11195 = VPMOVWBZ128mr
{ 11196, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10201878009804ULL, nullptr, nullptr, OperandInfo661, -1 ,nullptr }, // Inst #11196 = VPMOVWBZ128mrk
{ 11197, 2, 1, 0, 0, 0, 0x10001860009803ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11197 = VPMOVWBZ128rr
{ 11198, 4, 1, 0, 0, 0, 0x10201860009803ULL, nullptr, nullptr, OperandInfo679, -1 ,nullptr }, // Inst #11198 = VPMOVWBZ128rrk
{ 11199, 3, 1, 0, 0, 0, 0x10601860009803ULL, nullptr, nullptr, OperandInfo680, -1 ,nullptr }, // Inst #11199 = VPMOVWBZ128rrkz
{ 11200, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20081878009804ULL, nullptr, nullptr, OperandInfo424, -1 ,nullptr }, // Inst #11200 = VPMOVWBZ256mr
{ 11201, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x20281878009804ULL, nullptr, nullptr, OperandInfo666, -1 ,nullptr }, // Inst #11201 = VPMOVWBZ256mrk
{ 11202, 2, 1, 0, 0, 0, 0x20081860009803ULL, nullptr, nullptr, OperandInfo451, -1 ,nullptr }, // Inst #11202 = VPMOVWBZ256rr
{ 11203, 4, 1, 0, 0, 0, 0x20281860009803ULL, nullptr, nullptr, OperandInfo868, -1 ,nullptr }, // Inst #11203 = VPMOVWBZ256rrk
{ 11204, 3, 1, 0, 0, 0, 0x20681860009803ULL, nullptr, nullptr, OperandInfo869, -1 ,nullptr }, // Inst #11204 = VPMOVWBZ256rrkz
{ 11205, 6, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40801878009804ULL, nullptr, nullptr, OperandInfo429, -1 ,nullptr }, // Inst #11205 = VPMOVWBZmr
{ 11206, 7, 0, 0, 0, 0|(1ULL<<MCID::MayStore), 0x40a01878009804ULL, nullptr, nullptr, OperandInfo671, -1 ,nullptr }, // Inst #11206 = VPMOVWBZmrk
{ 11207, 2, 1, 0, 0, 0, 0x40801860009803ULL, nullptr, nullptr, OperandInfo454, -1 ,nullptr }, // Inst #11207 = VPMOVWBZrr
{ 11208, 4, 1, 0, 0, 0, 0x40a01860009803ULL, nullptr, nullptr, OperandInfo888, -1 ,nullptr }, // Inst #11208 = VPMOVWBZrrk
{ 11209, 3, 1, 0, 0, 0, 0x40e01860009803ULL, nullptr, nullptr, OperandInfo889, -1 ,nullptr }, // Inst #11209 = VPMOVWBZrrkz
{ 11210, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x818b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11210 = VPMOVZXBDYrm
{ 11211, 2, 1, 0, 571, 0, 0x818b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11211 = VPMOVZXBDYrr
{ 11212, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80018e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11212 = VPMOVZXBDZ128rm
{ 11213, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82018e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #11213 = VPMOVZXBDZ128rmk
{ 11214, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86018e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #11214 = VPMOVZXBDZ128rmkz
{ 11215, 2, 1, 0, 0, 0, 0x80018e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11215 = VPMOVZXBDZ128rr
{ 11216, 4, 1, 0, 0, 0, 0x82018e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #11216 = VPMOVZXBDZ128rrk
{ 11217, 3, 1, 0, 0, 0, 0x86018e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #11217 = VPMOVZXBDZ128rrkz
{ 11218, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100818e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11218 = VPMOVZXBDZ256rm
{ 11219, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x102818e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #11219 = VPMOVZXBDZ256rmk
{ 11220, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x106818e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #11220 = VPMOVZXBDZ256rmkz
{ 11221, 2, 1, 0, 0, 0, 0x100818e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11221 = VPMOVZXBDZ256rr
{ 11222, 4, 1, 0, 0, 0, 0x102818e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #11222 = VPMOVZXBDZ256rrk
{ 11223, 3, 1, 0, 0, 0, 0x106818e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #11223 = VPMOVZXBDZ256rrkz
{ 11224, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x208018e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11224 = VPMOVZXBDZrm
{ 11225, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a018e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #11225 = VPMOVZXBDZrmk
{ 11226, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e018e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #11226 = VPMOVZXBDZrmkz
{ 11227, 2, 1, 0, 0, 0, 0x208018e0009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #11227 = VPMOVZXBDZrr
{ 11228, 4, 1, 0, 0, 0, 0x20a018e0009005ULL, nullptr, nullptr, OperandInfo380, -1 ,nullptr }, // Inst #11228 = VPMOVZXBDZrrk
{ 11229, 3, 1, 0, 0, 0, 0x20e018e0009005ULL, nullptr, nullptr, OperandInfo381, -1 ,nullptr }, // Inst #11229 = VPMOVZXBDZrrkz
{ 11230, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x18b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11230 = VPMOVZXBDrm
{ 11231, 2, 1, 0, 571, 0, 0x18b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11231 = VPMOVZXBDrr
{ 11232, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x81938009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11232 = VPMOVZXBQYrm
{ 11233, 2, 1, 0, 792, 0, 0x81938009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11233 = VPMOVZXBQYrr
{ 11234, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4001960009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11234 = VPMOVZXBQZ128rm
{ 11235, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4201960009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #11235 = VPMOVZXBQZ128rmk
{ 11236, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4601960009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #11236 = VPMOVZXBQZ128rmkz
{ 11237, 2, 1, 0, 0, 0, 0x4001960009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11237 = VPMOVZXBQZ128rr
{ 11238, 4, 1, 0, 0, 0, 0x4201960009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #11238 = VPMOVZXBQZ128rrk
{ 11239, 3, 1, 0, 0, 0, 0x4601960009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #11239 = VPMOVZXBQZ128rrkz
{ 11240, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081960009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11240 = VPMOVZXBQZ256rm
{ 11241, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8281960009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #11241 = VPMOVZXBQZ256rmk
{ 11242, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8681960009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #11242 = VPMOVZXBQZ256rmkz
{ 11243, 2, 1, 0, 0, 0, 0x8081960009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11243 = VPMOVZXBQZ256rr
{ 11244, 4, 1, 0, 0, 0, 0x8281960009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #11244 = VPMOVZXBQZ256rrk
{ 11245, 3, 1, 0, 0, 0, 0x8681960009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #11245 = VPMOVZXBQZ256rrkz
{ 11246, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10801960009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11246 = VPMOVZXBQZrm
{ 11247, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10a01960009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #11247 = VPMOVZXBQZrmk
{ 11248, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10e01960009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #11248 = VPMOVZXBQZrmkz
{ 11249, 2, 1, 0, 0, 0, 0x10801960009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #11249 = VPMOVZXBQZrr
{ 11250, 4, 1, 0, 0, 0, 0x10a01960009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr }, // Inst #11250 = VPMOVZXBQZrrk
{ 11251, 3, 1, 0, 0, 0, 0x10e01960009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr }, // Inst #11251 = VPMOVZXBQZrrkz
{ 11252, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x1938009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11252 = VPMOVZXBQrm
{ 11253, 2, 1, 0, 571, 0, 0x1938009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11253 = VPMOVZXBQrr
{ 11254, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x81838009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11254 = VPMOVZXBWYrm
{ 11255, 2, 1, 0, 792, 0, 0x81838009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11255 = VPMOVZXBWYrr
{ 11256, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10001860009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11256 = VPMOVZXBWZ128rm
{ 11257, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10201860009006ULL, nullptr, nullptr, OperandInfo662, -1 ,nullptr }, // Inst #11257 = VPMOVZXBWZ128rmk
{ 11258, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10601860009006ULL, nullptr, nullptr, OperandInfo663, -1 ,nullptr }, // Inst #11258 = VPMOVZXBWZ128rmkz
{ 11259, 2, 1, 0, 0, 0, 0x10001860009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11259 = VPMOVZXBWZ128rr
{ 11260, 4, 1, 0, 0, 0, 0x10201860009005ULL, nullptr, nullptr, OperandInfo664, -1 ,nullptr }, // Inst #11260 = VPMOVZXBWZ128rrk
{ 11261, 3, 1, 0, 0, 0, 0x10601860009005ULL, nullptr, nullptr, OperandInfo665, -1 ,nullptr }, // Inst #11261 = VPMOVZXBWZ128rrkz
{ 11262, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20081860009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11262 = VPMOVZXBWZ256rm
{ 11263, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20281860009006ULL, nullptr, nullptr, OperandInfo667, -1 ,nullptr }, // Inst #11263 = VPMOVZXBWZ256rmk
{ 11264, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20681860009006ULL, nullptr, nullptr, OperandInfo668, -1 ,nullptr }, // Inst #11264 = VPMOVZXBWZ256rmkz
{ 11265, 2, 1, 0, 0, 0, 0x20081860009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11265 = VPMOVZXBWZ256rr
{ 11266, 4, 1, 0, 0, 0, 0x20281860009005ULL, nullptr, nullptr, OperandInfo770, -1 ,nullptr }, // Inst #11266 = VPMOVZXBWZ256rrk
{ 11267, 3, 1, 0, 0, 0, 0x20681860009005ULL, nullptr, nullptr, OperandInfo771, -1 ,nullptr }, // Inst #11267 = VPMOVZXBWZ256rrkz
{ 11268, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40801860009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11268 = VPMOVZXBWZrm
{ 11269, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a01860009006ULL, nullptr, nullptr, OperandInfo672, -1 ,nullptr }, // Inst #11269 = VPMOVZXBWZrmk
{ 11270, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e01860009006ULL, nullptr, nullptr, OperandInfo673, -1 ,nullptr }, // Inst #11270 = VPMOVZXBWZrmkz
{ 11271, 2, 1, 0, 0, 0, 0x40801860009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #11271 = VPMOVZXBWZrr
{ 11272, 4, 1, 0, 0, 0, 0x40a01860009005ULL, nullptr, nullptr, OperandInfo890, -1 ,nullptr }, // Inst #11272 = VPMOVZXBWZrrk
{ 11273, 3, 1, 0, 0, 0, 0x40e01860009005ULL, nullptr, nullptr, OperandInfo891, -1 ,nullptr }, // Inst #11273 = VPMOVZXBWZrrkz
{ 11274, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x1838009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11274 = VPMOVZXBWrm
{ 11275, 2, 1, 0, 571, 0, 0x1838009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11275 = VPMOVZXBWrr
{ 11276, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x81ab8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11276 = VPMOVZXDQYrm
{ 11277, 2, 1, 0, 792, 0, 0x81ab8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11277 = VPMOVZXDQYrr
{ 11278, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10001ae0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11278 = VPMOVZXDQZ128rm
{ 11279, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10201ae0009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #11279 = VPMOVZXDQZ128rmk
{ 11280, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10601ae0009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #11280 = VPMOVZXDQZ128rmkz
{ 11281, 2, 1, 0, 0, 0, 0x10001ae0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11281 = VPMOVZXDQZ128rr
{ 11282, 4, 1, 0, 0, 0, 0x10201ae0009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #11282 = VPMOVZXDQZ128rrk
{ 11283, 3, 1, 0, 0, 0, 0x10601ae0009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #11283 = VPMOVZXDQZ128rrkz
{ 11284, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20081ae0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11284 = VPMOVZXDQZ256rm
{ 11285, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20281ae0009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #11285 = VPMOVZXDQZ256rmk
{ 11286, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20681ae0009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #11286 = VPMOVZXDQZ256rmkz
{ 11287, 2, 1, 0, 0, 0, 0x20081ae0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11287 = VPMOVZXDQZ256rr
{ 11288, 4, 1, 0, 0, 0, 0x20281ae0009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #11288 = VPMOVZXDQZ256rrk
{ 11289, 3, 1, 0, 0, 0, 0x20681ae0009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #11289 = VPMOVZXDQZ256rrkz
{ 11290, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40801ae0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11290 = VPMOVZXDQZrm
{ 11291, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a01ae0009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #11291 = VPMOVZXDQZrmk
{ 11292, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e01ae0009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #11292 = VPMOVZXDQZrmkz
{ 11293, 2, 1, 0, 0, 0, 0x40801ae0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #11293 = VPMOVZXDQZrr
{ 11294, 4, 1, 0, 0, 0, 0x40a01ae0009005ULL, nullptr, nullptr, OperandInfo444, -1 ,nullptr }, // Inst #11294 = VPMOVZXDQZrrk
{ 11295, 3, 1, 0, 0, 0, 0x40e01ae0009005ULL, nullptr, nullptr, OperandInfo445, -1 ,nullptr }, // Inst #11295 = VPMOVZXDQZrrkz
{ 11296, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x1ab8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11296 = VPMOVZXDQrm
{ 11297, 2, 1, 0, 571, 0, 0x1ab8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11297 = VPMOVZXDQrr
{ 11298, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x819b8009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11298 = VPMOVZXWDYrm
{ 11299, 2, 1, 0, 571, 0, 0x819b8009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11299 = VPMOVZXWDYrr
{ 11300, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100019e0009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11300 = VPMOVZXWDZ128rm
{ 11301, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x102019e0009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #11301 = VPMOVZXWDZ128rmk
{ 11302, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x106019e0009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #11302 = VPMOVZXWDZ128rmkz
{ 11303, 2, 1, 0, 0, 0, 0x100019e0009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11303 = VPMOVZXWDZ128rr
{ 11304, 4, 1, 0, 0, 0, 0x102019e0009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #11304 = VPMOVZXWDZ128rrk
{ 11305, 3, 1, 0, 0, 0, 0x106019e0009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #11305 = VPMOVZXWDZ128rrkz
{ 11306, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200819e0009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11306 = VPMOVZXWDZ256rm
{ 11307, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202819e0009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #11307 = VPMOVZXWDZ256rmk
{ 11308, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206819e0009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #11308 = VPMOVZXWDZ256rmkz
{ 11309, 2, 1, 0, 0, 0, 0x200819e0009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11309 = VPMOVZXWDZ256rr
{ 11310, 4, 1, 0, 0, 0, 0x202819e0009005ULL, nullptr, nullptr, OperandInfo378, -1 ,nullptr }, // Inst #11310 = VPMOVZXWDZ256rrk
{ 11311, 3, 1, 0, 0, 0, 0x206819e0009005ULL, nullptr, nullptr, OperandInfo379, -1 ,nullptr }, // Inst #11311 = VPMOVZXWDZ256rrkz
{ 11312, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x408019e0009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11312 = VPMOVZXWDZrm
{ 11313, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40a019e0009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #11313 = VPMOVZXWDZrmk
{ 11314, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40e019e0009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #11314 = VPMOVZXWDZrmkz
{ 11315, 2, 1, 0, 0, 0, 0x408019e0009005ULL, nullptr, nullptr, OperandInfo443, -1 ,nullptr }, // Inst #11315 = VPMOVZXWDZrr
{ 11316, 4, 1, 0, 0, 0, 0x40a019e0009005ULL, nullptr, nullptr, OperandInfo462, -1 ,nullptr }, // Inst #11316 = VPMOVZXWDZrrk
{ 11317, 3, 1, 0, 0, 0, 0x40e019e0009005ULL, nullptr, nullptr, OperandInfo463, -1 ,nullptr }, // Inst #11317 = VPMOVZXWDZrrkz
{ 11318, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x19b8009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11318 = VPMOVZXWDrm
{ 11319, 2, 1, 0, 571, 0, 0x19b8009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11319 = VPMOVZXWDrr
{ 11320, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x81a38009006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #11320 = VPMOVZXWQYrm
{ 11321, 2, 1, 0, 571, 0, 0x81a38009005ULL, nullptr, nullptr, OperandInfo367, -1 ,nullptr }, // Inst #11321 = VPMOVZXWQYrr
{ 11322, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8001a60009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #11322 = VPMOVZXWQZ128rm
{ 11323, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8201a60009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #11323 = VPMOVZXWQZ128rmk
{ 11324, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8601a60009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #11324 = VPMOVZXWQZ128rmkz
{ 11325, 2, 1, 0, 0, 0, 0x8001a60009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #11325 = VPMOVZXWQZ128rr
{ 11326, 4, 1, 0, 0, 0, 0x8201a60009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #11326 = VPMOVZXWQZ128rrk
{ 11327, 3, 1, 0, 0, 0, 0x8601a60009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #11327 = VPMOVZXWQZ128rrkz
{ 11328, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10081a60009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #11328 = VPMOVZXWQZ256rm
{ 11329, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10281a60009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #11329 = VPMOVZXWQZ256rmk
{ 11330, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x10681a60009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #11330 = VPMOVZXWQZ256rmkz
{ 11331, 2, 1, 0, 0, 0, 0x10081a60009005ULL, nullptr, nullptr, OperandInfo368, -1 ,nullptr }, // Inst #11331 = VPMOVZXWQZ256rr
{ 11332, 4, 1, 0, 0, 0, 0x10281a60009005ULL, nullptr, nullptr, OperandInfo369, -1 ,nullptr }, // Inst #11332 = VPMOVZXWQZ256rrk
{ 11333, 3, 1, 0, 0, 0, 0x10681a60009005ULL, nullptr, nullptr, OperandInfo370, -1 ,nullptr }, // Inst #11333 = VPMOVZXWQZ256rrkz
{ 11334, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20801a60009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #11334 = VPMOVZXWQZrm
{ 11335, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a01a60009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #11335 = VPMOVZXWQZrmk
{ 11336, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e01a60009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #11336 = VPMOVZXWQZrmkz
{ 11337, 2, 1, 0, 0, 0, 0x20801a60009005ULL, nullptr, nullptr, OperandInfo371, -1 ,nullptr }, // Inst #11337 = VPMOVZXWQZrr
{ 11338, 4, 1, 0, 0, 0, 0x20a01a60009005ULL, nullptr, nullptr, OperandInfo372, -1 ,nullptr }, // Inst #11338 = VPMOVZXWQZrrk
{ 11339, 3, 1, 0, 0, 0, 0x20e01a60009005ULL, nullptr, nullptr, OperandInfo373, -1 ,nullptr }, // Inst #11339 = VPMOVZXWQZrrkz
{ 11340, 6, 1, 0, 570, 0|(1ULL<<MCID::MayLoad), 0x1a38009006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #11340 = VPMOVZXWQrm
{ 11341, 2, 1, 0, 571, 0, 0x1a38009005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #11341 = VPMOVZXWQrr
{ 11342, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x91438009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11342 = VPMULDQYrm
{ 11343, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x91438009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11343 = VPMULDQYrr
{ 11344, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20019478009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11344 = VPMULDQZ128rm
{ 11345, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11019478009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11345 = VPMULDQZ128rmb
{ 11346, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11219478009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11346 = VPMULDQZ128rmbk
{ 11347, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11619478009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11347 = VPMULDQZ128rmbkz
{ 11348, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20219478009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11348 = VPMULDQZ128rmk
{ 11349, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20619478009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11349 = VPMULDQZ128rmkz
{ 11350, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20019478009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11350 = VPMULDQZ128rr
{ 11351, 5, 1, 0, 0, 0, 0x20219478009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #11351 = VPMULDQZ128rrk
{ 11352, 4, 1, 0, 0, 0, 0x20619478009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #11352 = VPMULDQZ128rrkz
{ 11353, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099478009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11353 = VPMULDQZ256rm
{ 11354, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11099478009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11354 = VPMULDQZ256rmb
{ 11355, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11299478009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11355 = VPMULDQZ256rmbk
{ 11356, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11699478009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11356 = VPMULDQZ256rmbkz
{ 11357, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299478009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11357 = VPMULDQZ256rmk
{ 11358, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40699478009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11358 = VPMULDQZ256rmkz
{ 11359, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40099478009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11359 = VPMULDQZ256rr
{ 11360, 5, 1, 0, 0, 0, 0x40299478009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11360 = VPMULDQZ256rrk
{ 11361, 4, 1, 0, 0, 0, 0x40699478009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11361 = VPMULDQZ256rrkz
{ 11362, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819478009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11362 = VPMULDQZrm
{ 11363, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11819478009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11363 = VPMULDQZrmb
{ 11364, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a19478009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11364 = VPMULDQZrmbk
{ 11365, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e19478009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11365 = VPMULDQZrmbkz
{ 11366, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19478009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11366 = VPMULDQZrmk
{ 11367, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e19478009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11367 = VPMULDQZrmkz
{ 11368, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80819478009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11368 = VPMULDQZrr
{ 11369, 5, 1, 0, 0, 0, 0x80a19478009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #11369 = VPMULDQZrrk
{ 11370, 4, 1, 0, 0, 0, 0x80e19478009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #11370 = VPMULDQZrrkz
{ 11371, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x11438009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11371 = VPMULDQrm
{ 11372, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x11438009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11372 = VPMULDQrr
{ 11373, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200105f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11373 = VPMULHRSWZ128rm
{ 11374, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202105f8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #11374 = VPMULHRSWZ128rmk
{ 11375, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206105f8009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #11375 = VPMULHRSWZ128rmkz
{ 11376, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x200105f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11376 = VPMULHRSWZ128rr
{ 11377, 5, 1, 0, 0, 0, 0x202105f8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #11377 = VPMULHRSWZ128rrk
{ 11378, 4, 1, 0, 0, 0, 0x206105f8009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #11378 = VPMULHRSWZ128rrkz
{ 11379, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400905f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11379 = VPMULHRSWZ256rm
{ 11380, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402905f8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #11380 = VPMULHRSWZ256rmk
{ 11381, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406905f8009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #11381 = VPMULHRSWZ256rmkz
{ 11382, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x400905f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11382 = VPMULHRSWZ256rr
{ 11383, 5, 1, 0, 0, 0, 0x402905f8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #11383 = VPMULHRSWZ256rrk
{ 11384, 4, 1, 0, 0, 0, 0x406905f8009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #11384 = VPMULHRSWZ256rrkz
{ 11385, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808105f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11385 = VPMULHRSWZrm
{ 11386, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a105f8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #11386 = VPMULHRSWZrmk
{ 11387, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e105f8009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #11387 = VPMULHRSWZrmkz
{ 11388, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x808105f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11388 = VPMULHRSWZrr
{ 11389, 5, 1, 0, 0, 0, 0x80a105f8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #11389 = VPMULHRSWZrrk
{ 11390, 4, 1, 0, 0, 0, 0x80e105f8009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #11390 = VPMULHRSWZrrkz
{ 11391, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x105b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11391 = VPMULHRSWrm128
{ 11392, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x905b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11392 = VPMULHRSWrm256
{ 11393, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x105b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11393 = VPMULHRSWrr128
{ 11394, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x905b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11394 = VPMULHRSWrr256
{ 11395, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x97238005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11395 = VPMULHUWYrm
{ 11396, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x97238005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11396 = VPMULHUWYrr
{ 11397, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017278005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11397 = VPMULHUWZ128rm
{ 11398, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217278005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #11398 = VPMULHUWZ128rmk
{ 11399, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617278005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #11399 = VPMULHUWZ128rmkz
{ 11400, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20017278005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11400 = VPMULHUWZ128rr
{ 11401, 5, 1, 0, 0, 0, 0x20217278005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #11401 = VPMULHUWZ128rrk
{ 11402, 4, 1, 0, 0, 0, 0x20617278005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #11402 = VPMULHUWZ128rrkz
{ 11403, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097278005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11403 = VPMULHUWZ256rm
{ 11404, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297278005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #11404 = VPMULHUWZ256rmk
{ 11405, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697278005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #11405 = VPMULHUWZ256rmkz
{ 11406, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40097278005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11406 = VPMULHUWZ256rr
{ 11407, 5, 1, 0, 0, 0, 0x40297278005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #11407 = VPMULHUWZ256rrk
{ 11408, 4, 1, 0, 0, 0, 0x40697278005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #11408 = VPMULHUWZ256rrkz
{ 11409, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817278005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11409 = VPMULHUWZrm
{ 11410, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17278005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #11410 = VPMULHUWZrmk
{ 11411, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17278005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #11411 = VPMULHUWZrmkz
{ 11412, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80817278005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11412 = VPMULHUWZrr
{ 11413, 5, 1, 0, 0, 0, 0x80a17278005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #11413 = VPMULHUWZrrk
{ 11414, 4, 1, 0, 0, 0, 0x80e17278005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #11414 = VPMULHUWZrrkz
{ 11415, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x17238005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11415 = VPMULHUWrm
{ 11416, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x17238005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11416 = VPMULHUWrr
{ 11417, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x972b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11417 = VPMULHWYrm
{ 11418, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x972b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11418 = VPMULHWYrr
{ 11419, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200172f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11419 = VPMULHWZ128rm
{ 11420, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202172f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #11420 = VPMULHWZ128rmk
{ 11421, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206172f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #11421 = VPMULHWZ128rmkz
{ 11422, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x200172f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11422 = VPMULHWZ128rr
{ 11423, 5, 1, 0, 0, 0, 0x202172f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #11423 = VPMULHWZ128rrk
{ 11424, 4, 1, 0, 0, 0, 0x206172f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #11424 = VPMULHWZ128rrkz
{ 11425, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400972f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11425 = VPMULHWZ256rm
{ 11426, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402972f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #11426 = VPMULHWZ256rmk
{ 11427, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406972f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #11427 = VPMULHWZ256rmkz
{ 11428, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x400972f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11428 = VPMULHWZ256rr
{ 11429, 5, 1, 0, 0, 0, 0x402972f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #11429 = VPMULHWZ256rrk
{ 11430, 4, 1, 0, 0, 0, 0x406972f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #11430 = VPMULHWZ256rrkz
{ 11431, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808172f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11431 = VPMULHWZrm
{ 11432, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a172f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #11432 = VPMULHWZrmk
{ 11433, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e172f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #11433 = VPMULHWZrmkz
{ 11434, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x808172f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11434 = VPMULHWZrr
{ 11435, 5, 1, 0, 0, 0, 0x80a172f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #11435 = VPMULHWZrrk
{ 11436, 4, 1, 0, 0, 0, 0x80e172f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #11436 = VPMULHWZrrkz
{ 11437, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x172b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11437 = VPMULHWrm
{ 11438, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x172b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11438 = VPMULHWrr
{ 11439, 7, 1, 0, 832, 0|(1ULL<<MCID::MayLoad), 0x92038009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11439 = VPMULLDYrm
{ 11440, 3, 1, 0, 831, 0|(1ULL<<MCID::Commutable), 0x92038009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11440 = VPMULLDYrr
{ 11441, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11441 = VPMULLDZ128rm
{ 11442, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11442 = VPMULLDZ128rmb
{ 11443, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212078009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #11443 = VPMULLDZ128rmbk
{ 11444, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612078009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #11444 = VPMULLDZ128rmbkz
{ 11445, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212078009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #11445 = VPMULLDZ128rmk
{ 11446, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612078009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #11446 = VPMULLDZ128rmkz
{ 11447, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20012078009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11447 = VPMULLDZ128rr
{ 11448, 5, 1, 0, 0, 0, 0x20212078009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #11448 = VPMULLDZ128rrk
{ 11449, 4, 1, 0, 0, 0, 0x20612078009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #11449 = VPMULLDZ128rrkz
{ 11450, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11450 = VPMULLDZ256rm
{ 11451, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11451 = VPMULLDZ256rmb
{ 11452, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292078009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #11452 = VPMULLDZ256rmbk
{ 11453, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692078009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #11453 = VPMULLDZ256rmbkz
{ 11454, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292078009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #11454 = VPMULLDZ256rmk
{ 11455, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692078009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #11455 = VPMULLDZ256rmkz
{ 11456, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40092078009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11456 = VPMULLDZ256rr
{ 11457, 5, 1, 0, 0, 0, 0x40292078009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #11457 = VPMULLDZ256rrk
{ 11458, 4, 1, 0, 0, 0, 0x40692078009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #11458 = VPMULLDZ256rrkz
{ 11459, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11459 = VPMULLDZrm
{ 11460, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11460 = VPMULLDZrmb
{ 11461, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12078009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #11461 = VPMULLDZrmbk
{ 11462, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12078009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #11462 = VPMULLDZrmbkz
{ 11463, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12078009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #11463 = VPMULLDZrmk
{ 11464, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12078009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #11464 = VPMULLDZrmkz
{ 11465, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80812078009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11465 = VPMULLDZrr
{ 11466, 5, 1, 0, 0, 0, 0x80a12078009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #11466 = VPMULLDZrrk
{ 11467, 4, 1, 0, 0, 0, 0x80e12078009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #11467 = VPMULLDZrrkz
{ 11468, 7, 1, 0, 832, 0|(1ULL<<MCID::MayLoad), 0x12038009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11468 = VPMULLDrm
{ 11469, 3, 1, 0, 831, 0|(1ULL<<MCID::Commutable), 0x12038009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11469 = VPMULLDrr
{ 11470, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001a078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11470 = VPMULLQZ128rm
{ 11471, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101a078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11471 = VPMULLQZ128rmb
{ 11472, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121a078009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11472 = VPMULLQZ128rmbk
{ 11473, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161a078009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11473 = VPMULLQZ128rmbkz
{ 11474, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021a078009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11474 = VPMULLQZ128rmk
{ 11475, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061a078009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11475 = VPMULLQZ128rmkz
{ 11476, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2001a078009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11476 = VPMULLQZ128rr
{ 11477, 5, 1, 0, 0, 0, 0x2021a078009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #11477 = VPMULLQZ128rrk
{ 11478, 4, 1, 0, 0, 0, 0x2061a078009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #11478 = VPMULLQZ128rrkz
{ 11479, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009a078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11479 = VPMULLQZ256rm
{ 11480, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109a078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11480 = VPMULLQZ256rmb
{ 11481, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129a078009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11481 = VPMULLQZ256rmbk
{ 11482, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169a078009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11482 = VPMULLQZ256rmbkz
{ 11483, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029a078009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11483 = VPMULLQZ256rmk
{ 11484, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069a078009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11484 = VPMULLQZ256rmkz
{ 11485, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x4009a078009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11485 = VPMULLQZ256rr
{ 11486, 5, 1, 0, 0, 0, 0x4029a078009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11486 = VPMULLQZ256rrk
{ 11487, 4, 1, 0, 0, 0, 0x4069a078009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11487 = VPMULLQZ256rrkz
{ 11488, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081a078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11488 = VPMULLQZrm
{ 11489, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181a078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11489 = VPMULLQZrmb
{ 11490, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1a078009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11490 = VPMULLQZrmbk
{ 11491, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1a078009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11491 = VPMULLQZrmbkz
{ 11492, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1a078009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11492 = VPMULLQZrmk
{ 11493, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1a078009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11493 = VPMULLQZrmkz
{ 11494, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8081a078009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11494 = VPMULLQZrr
{ 11495, 5, 1, 0, 0, 0, 0x80a1a078009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #11495 = VPMULLQZrrk
{ 11496, 4, 1, 0, 0, 0, 0x80e1a078009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #11496 = VPMULLQZrrkz
{ 11497, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x96ab8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11497 = VPMULLWYrm
{ 11498, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x96ab8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11498 = VPMULLWYrr
{ 11499, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016af8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11499 = VPMULLWZ128rm
{ 11500, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216af8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #11500 = VPMULLWZ128rmk
{ 11501, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616af8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #11501 = VPMULLWZ128rmkz
{ 11502, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x20016af8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11502 = VPMULLWZ128rr
{ 11503, 5, 1, 0, 0, 0, 0x20216af8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #11503 = VPMULLWZ128rrk
{ 11504, 4, 1, 0, 0, 0, 0x20616af8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #11504 = VPMULLWZ128rrkz
{ 11505, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096af8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11505 = VPMULLWZ256rm
{ 11506, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296af8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #11506 = VPMULLWZ256rmk
{ 11507, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696af8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #11507 = VPMULLWZ256rmkz
{ 11508, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x40096af8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11508 = VPMULLWZ256rr
{ 11509, 5, 1, 0, 0, 0, 0x40296af8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #11509 = VPMULLWZ256rrk
{ 11510, 4, 1, 0, 0, 0, 0x40696af8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #11510 = VPMULLWZ256rrkz
{ 11511, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816af8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11511 = VPMULLWZrm
{ 11512, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16af8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #11512 = VPMULLWZrmk
{ 11513, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16af8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #11513 = VPMULLWZrmkz
{ 11514, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x80816af8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11514 = VPMULLWZrr
{ 11515, 5, 1, 0, 0, 0, 0x80a16af8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #11515 = VPMULLWZrrk
{ 11516, 4, 1, 0, 0, 0, 0x80e16af8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #11516 = VPMULLWZrrkz
{ 11517, 7, 1, 0, 416, 0|(1ULL<<MCID::MayLoad), 0x16ab8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11517 = VPMULLWrm
{ 11518, 3, 1, 0, 417, 0|(1ULL<<MCID::Commutable), 0x16ab8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11518 = VPMULLWrr
{ 11519, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001c1f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11519 = VPMULTISHIFTQBZ128rm
{ 11520, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101c1f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11520 = VPMULTISHIFTQBZ128rmb
{ 11521, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121c1f8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #11521 = VPMULTISHIFTQBZ128rmbk
{ 11522, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161c1f8009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #11522 = VPMULTISHIFTQBZ128rmbkz
{ 11523, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021c1f8009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #11523 = VPMULTISHIFTQBZ128rmk
{ 11524, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061c1f8009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #11524 = VPMULTISHIFTQBZ128rmkz
{ 11525, 3, 1, 0, 0, 0, 0x2001c1f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11525 = VPMULTISHIFTQBZ128rr
{ 11526, 5, 1, 0, 0, 0, 0x2021c1f8009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #11526 = VPMULTISHIFTQBZ128rrk
{ 11527, 4, 1, 0, 0, 0, 0x2061c1f8009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #11527 = VPMULTISHIFTQBZ128rrkz
{ 11528, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009c1f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11528 = VPMULTISHIFTQBZ256rm
{ 11529, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109c1f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11529 = VPMULTISHIFTQBZ256rmb
{ 11530, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129c1f8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #11530 = VPMULTISHIFTQBZ256rmbk
{ 11531, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169c1f8009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #11531 = VPMULTISHIFTQBZ256rmbkz
{ 11532, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029c1f8009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #11532 = VPMULTISHIFTQBZ256rmk
{ 11533, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069c1f8009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #11533 = VPMULTISHIFTQBZ256rmkz
{ 11534, 3, 1, 0, 0, 0, 0x4009c1f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11534 = VPMULTISHIFTQBZ256rr
{ 11535, 5, 1, 0, 0, 0, 0x4029c1f8009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #11535 = VPMULTISHIFTQBZ256rrk
{ 11536, 4, 1, 0, 0, 0, 0x4069c1f8009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #11536 = VPMULTISHIFTQBZ256rrkz
{ 11537, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081c1f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11537 = VPMULTISHIFTQBZrm
{ 11538, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181c1f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11538 = VPMULTISHIFTQBZrmb
{ 11539, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1c1f8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #11539 = VPMULTISHIFTQBZrmbk
{ 11540, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1c1f8009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #11540 = VPMULTISHIFTQBZrmbkz
{ 11541, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1c1f8009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #11541 = VPMULTISHIFTQBZrmk
{ 11542, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1c1f8009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #11542 = VPMULTISHIFTQBZrmkz
{ 11543, 3, 1, 0, 0, 0, 0x8081c1f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11543 = VPMULTISHIFTQBZrr
{ 11544, 5, 1, 0, 0, 0, 0x80a1c1f8009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #11544 = VPMULTISHIFTQBZrrk
{ 11545, 4, 1, 0, 0, 0, 0x80e1c1f8009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #11545 = VPMULTISHIFTQBZrrkz
{ 11546, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x97a38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11546 = VPMULUDQYrm
{ 11547, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x97a38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11547 = VPMULUDQYrr
{ 11548, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001fa78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11548 = VPMULUDQZ128rm
{ 11549, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101fa78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11549 = VPMULUDQZ128rmb
{ 11550, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121fa78005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11550 = VPMULUDQZ128rmbk
{ 11551, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161fa78005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11551 = VPMULUDQZ128rmbkz
{ 11552, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021fa78005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11552 = VPMULUDQZ128rmk
{ 11553, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061fa78005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11553 = VPMULUDQZ128rmkz
{ 11554, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2001fa78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11554 = VPMULUDQZ128rr
{ 11555, 5, 1, 0, 0, 0, 0x2021fa78005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #11555 = VPMULUDQZ128rrk
{ 11556, 4, 1, 0, 0, 0, 0x2061fa78005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #11556 = VPMULUDQZ128rrkz
{ 11557, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009fa78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11557 = VPMULUDQZ256rm
{ 11558, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109fa78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11558 = VPMULUDQZ256rmb
{ 11559, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129fa78005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11559 = VPMULUDQZ256rmbk
{ 11560, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169fa78005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11560 = VPMULUDQZ256rmbkz
{ 11561, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029fa78005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11561 = VPMULUDQZ256rmk
{ 11562, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069fa78005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11562 = VPMULUDQZ256rmkz
{ 11563, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x4009fa78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11563 = VPMULUDQZ256rr
{ 11564, 5, 1, 0, 0, 0, 0x4029fa78005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11564 = VPMULUDQZ256rrk
{ 11565, 4, 1, 0, 0, 0, 0x4069fa78005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11565 = VPMULUDQZ256rrkz
{ 11566, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081fa78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11566 = VPMULUDQZrm
{ 11567, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181fa78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11567 = VPMULUDQZrmb
{ 11568, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1fa78005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11568 = VPMULUDQZrmbk
{ 11569, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1fa78005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11569 = VPMULUDQZrmbkz
{ 11570, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1fa78005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11570 = VPMULUDQZrmk
{ 11571, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1fa78005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11571 = VPMULUDQZrmkz
{ 11572, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8081fa78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11572 = VPMULUDQZrr
{ 11573, 5, 1, 0, 0, 0, 0x80a1fa78005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #11573 = VPMULUDQZrrk
{ 11574, 4, 1, 0, 0, 0, 0x80e1fa78005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #11574 = VPMULUDQZrrkz
{ 11575, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x17a38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11575 = VPMULUDQrm
{ 11576, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x17a38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11576 = VPMULUDQrr
{ 11577, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200175f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11577 = VPORDZ128rm
{ 11578, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90175f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11578 = VPORDZ128rmb
{ 11579, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92175f8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #11579 = VPORDZ128rmbk
{ 11580, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96175f8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #11580 = VPORDZ128rmbkz
{ 11581, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202175f8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #11581 = VPORDZ128rmk
{ 11582, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206175f8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #11582 = VPORDZ128rmkz
{ 11583, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x200175f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11583 = VPORDZ128rr
{ 11584, 5, 1, 0, 0, 0, 0x202175f8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #11584 = VPORDZ128rrk
{ 11585, 4, 1, 0, 0, 0, 0x206175f8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #11585 = VPORDZ128rrkz
{ 11586, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400975f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11586 = VPORDZ256rm
{ 11587, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90975f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11587 = VPORDZ256rmb
{ 11588, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92975f8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #11588 = VPORDZ256rmbk
{ 11589, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96975f8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #11589 = VPORDZ256rmbkz
{ 11590, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402975f8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #11590 = VPORDZ256rmk
{ 11591, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406975f8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #11591 = VPORDZ256rmkz
{ 11592, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x400975f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11592 = VPORDZ256rr
{ 11593, 5, 1, 0, 0, 0, 0x402975f8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #11593 = VPORDZ256rrk
{ 11594, 4, 1, 0, 0, 0, 0x406975f8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #11594 = VPORDZ256rrkz
{ 11595, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808175f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11595 = VPORDZrm
{ 11596, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98175f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11596 = VPORDZrmb
{ 11597, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a175f8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #11597 = VPORDZrmbk
{ 11598, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e175f8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #11598 = VPORDZrmbkz
{ 11599, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a175f8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #11599 = VPORDZrmk
{ 11600, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e175f8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #11600 = VPORDZrmkz
{ 11601, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x808175f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11601 = VPORDZrr
{ 11602, 5, 1, 0, 0, 0, 0x80a175f8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #11602 = VPORDZrrk
{ 11603, 4, 1, 0, 0, 0, 0x80e175f8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #11603 = VPORDZrrkz
{ 11604, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001f5f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11604 = VPORQZ128rm
{ 11605, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101f5f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11605 = VPORQZ128rmb
{ 11606, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121f5f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11606 = VPORQZ128rmbk
{ 11607, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161f5f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11607 = VPORQZ128rmbkz
{ 11608, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021f5f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11608 = VPORQZ128rmk
{ 11609, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061f5f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11609 = VPORQZ128rmkz
{ 11610, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2001f5f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11610 = VPORQZ128rr
{ 11611, 5, 1, 0, 0, 0, 0x2021f5f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #11611 = VPORQZ128rrk
{ 11612, 4, 1, 0, 0, 0, 0x2061f5f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #11612 = VPORQZ128rrkz
{ 11613, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009f5f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11613 = VPORQZ256rm
{ 11614, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109f5f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11614 = VPORQZ256rmb
{ 11615, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129f5f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11615 = VPORQZ256rmbk
{ 11616, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169f5f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11616 = VPORQZ256rmbkz
{ 11617, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029f5f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11617 = VPORQZ256rmk
{ 11618, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069f5f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11618 = VPORQZ256rmkz
{ 11619, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x4009f5f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11619 = VPORQZ256rr
{ 11620, 5, 1, 0, 0, 0, 0x4029f5f8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11620 = VPORQZ256rrk
{ 11621, 4, 1, 0, 0, 0, 0x4069f5f8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11621 = VPORQZ256rrkz
{ 11622, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081f5f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11622 = VPORQZrm
{ 11623, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181f5f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11623 = VPORQZrmb
{ 11624, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1f5f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11624 = VPORQZrmbk
{ 11625, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1f5f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11625 = VPORQZrmbkz
{ 11626, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1f5f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11626 = VPORQZrmk
{ 11627, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1f5f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11627 = VPORQZrmkz
{ 11628, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8081f5f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11628 = VPORQZrr
{ 11629, 5, 1, 0, 0, 0, 0x80a1f5f8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #11629 = VPORQZrrk
{ 11630, 4, 1, 0, 0, 0, 0x80e1f5f8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #11630 = VPORQZrrkz
{ 11631, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x975b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11631 = VPORYrm
{ 11632, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x975b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11632 = VPORYrr
{ 11633, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x175b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11633 = VPORrm
{ 11634, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x175b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11634 = VPORrr
{ 11635, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x551d8050806ULL, nullptr, nullptr, OperandInfo354, -1 ,nullptr }, // Inst #11635 = VPPERMmr
{ 11636, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20005d1d8050806ULL, nullptr, nullptr, OperandInfo550, -1 ,nullptr }, // Inst #11636 = VPPERMrm
{ 11637, 4, 1, 0, 0, 0, 0x551d8050805ULL, nullptr, nullptr, OperandInfo355, -1 ,nullptr }, // Inst #11637 = VPPERMrr
{ 11638, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9013978045019ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11638 = VPROLDZ128mbi
{ 11639, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213978045019ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #11639 = VPROLDZ128mbik
{ 11640, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9613978045019ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #11640 = VPROLDZ128mbikz
{ 11641, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013978045019ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11641 = VPROLDZ128mi
{ 11642, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213978045019ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #11642 = VPROLDZ128mik
{ 11643, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613978045019ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #11643 = VPROLDZ128mikz
{ 11644, 3, 1, 0, 0, 0, 0x20013978045011ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #11644 = VPROLDZ128ri
{ 11645, 5, 1, 0, 0, 0, 0x20213978045011ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #11645 = VPROLDZ128rik
{ 11646, 4, 1, 0, 0, 0, 0x20613978045011ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #11646 = VPROLDZ128rikz
{ 11647, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9093978045019ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11647 = VPROLDZ256mbi
{ 11648, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293978045019ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #11648 = VPROLDZ256mbik
{ 11649, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9693978045019ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #11649 = VPROLDZ256mbikz
{ 11650, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093978045019ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11650 = VPROLDZ256mi
{ 11651, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293978045019ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #11651 = VPROLDZ256mik
{ 11652, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693978045019ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #11652 = VPROLDZ256mikz
{ 11653, 3, 1, 0, 0, 0, 0x40093978045011ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #11653 = VPROLDZ256ri
{ 11654, 5, 1, 0, 0, 0, 0x40293978045011ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #11654 = VPROLDZ256rik
{ 11655, 4, 1, 0, 0, 0, 0x40693978045011ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #11655 = VPROLDZ256rikz
{ 11656, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9813978045019ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11656 = VPROLDZmbi
{ 11657, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13978045019ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #11657 = VPROLDZmbik
{ 11658, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e13978045019ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #11658 = VPROLDZmbikz
{ 11659, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813978045019ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11659 = VPROLDZmi
{ 11660, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13978045019ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #11660 = VPROLDZmik
{ 11661, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13978045019ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #11661 = VPROLDZmikz
{ 11662, 3, 1, 0, 0, 0, 0x80813978045011ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #11662 = VPROLDZri
{ 11663, 5, 1, 0, 0, 0, 0x80a13978045011ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #11663 = VPROLDZrik
{ 11664, 4, 1, 0, 0, 0, 0x80e13978045011ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #11664 = VPROLDZrikz
{ 11665, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101b978045019ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11665 = VPROLQZ128mbi
{ 11666, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b978045019ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #11666 = VPROLQZ128mbik
{ 11667, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161b978045019ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #11667 = VPROLQZ128mbikz
{ 11668, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b978045019ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11668 = VPROLQZ128mi
{ 11669, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b978045019ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #11669 = VPROLQZ128mik
{ 11670, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b978045019ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #11670 = VPROLQZ128mikz
{ 11671, 3, 1, 0, 0, 0, 0x2001b978045011ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #11671 = VPROLQZ128ri
{ 11672, 5, 1, 0, 0, 0, 0x2021b978045011ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #11672 = VPROLQZ128rik
{ 11673, 4, 1, 0, 0, 0, 0x2061b978045011ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #11673 = VPROLQZ128rikz
{ 11674, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109b978045019ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11674 = VPROLQZ256mbi
{ 11675, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b978045019ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #11675 = VPROLQZ256mbik
{ 11676, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169b978045019ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #11676 = VPROLQZ256mbikz
{ 11677, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b978045019ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11677 = VPROLQZ256mi
{ 11678, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b978045019ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #11678 = VPROLQZ256mik
{ 11679, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b978045019ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #11679 = VPROLQZ256mikz
{ 11680, 3, 1, 0, 0, 0, 0x4009b978045011ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #11680 = VPROLQZ256ri
{ 11681, 5, 1, 0, 0, 0, 0x4029b978045011ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #11681 = VPROLQZ256rik
{ 11682, 4, 1, 0, 0, 0, 0x4069b978045011ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #11682 = VPROLQZ256rikz
{ 11683, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181b978045019ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11683 = VPROLQZmbi
{ 11684, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b978045019ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #11684 = VPROLQZmbik
{ 11685, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1b978045019ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #11685 = VPROLQZmbikz
{ 11686, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b978045019ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11686 = VPROLQZmi
{ 11687, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b978045019ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #11687 = VPROLQZmik
{ 11688, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b978045019ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #11688 = VPROLQZmikz
{ 11689, 3, 1, 0, 0, 0, 0x8081b978045011ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #11689 = VPROLQZri
{ 11690, 5, 1, 0, 0, 0, 0x80a1b978045011ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #11690 = VPROLQZrik
{ 11691, 4, 1, 0, 0, 0, 0x80e1b978045011ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #11691 = VPROLQZrikz
{ 11692, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20010af8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11692 = VPROLVDZ128rm
{ 11693, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9010af8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11693 = VPROLVDZ128rmb
{ 11694, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9210af8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #11694 = VPROLVDZ128rmbk
{ 11695, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9610af8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #11695 = VPROLVDZ128rmbkz
{ 11696, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20210af8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #11696 = VPROLVDZ128rmk
{ 11697, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20610af8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #11697 = VPROLVDZ128rmkz
{ 11698, 3, 1, 0, 0, 0, 0x20010af8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11698 = VPROLVDZ128rr
{ 11699, 5, 1, 0, 0, 0, 0x20210af8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #11699 = VPROLVDZ128rrk
{ 11700, 4, 1, 0, 0, 0, 0x20610af8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #11700 = VPROLVDZ128rrkz
{ 11701, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40090af8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11701 = VPROLVDZ256rm
{ 11702, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9090af8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11702 = VPROLVDZ256rmb
{ 11703, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9290af8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #11703 = VPROLVDZ256rmbk
{ 11704, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9690af8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #11704 = VPROLVDZ256rmbkz
{ 11705, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40290af8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #11705 = VPROLVDZ256rmk
{ 11706, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40690af8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #11706 = VPROLVDZ256rmkz
{ 11707, 3, 1, 0, 0, 0, 0x40090af8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11707 = VPROLVDZ256rr
{ 11708, 5, 1, 0, 0, 0, 0x40290af8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #11708 = VPROLVDZ256rrk
{ 11709, 4, 1, 0, 0, 0, 0x40690af8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #11709 = VPROLVDZ256rrkz
{ 11710, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80810af8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11710 = VPROLVDZrm
{ 11711, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9810af8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11711 = VPROLVDZrmb
{ 11712, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a10af8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #11712 = VPROLVDZrmbk
{ 11713, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e10af8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #11713 = VPROLVDZrmbkz
{ 11714, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a10af8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #11714 = VPROLVDZrmk
{ 11715, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e10af8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #11715 = VPROLVDZrmkz
{ 11716, 3, 1, 0, 0, 0, 0x80810af8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11716 = VPROLVDZrr
{ 11717, 5, 1, 0, 0, 0, 0x80a10af8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #11717 = VPROLVDZrrk
{ 11718, 4, 1, 0, 0, 0, 0x80e10af8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #11718 = VPROLVDZrrkz
{ 11719, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20018af8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11719 = VPROLVQZ128rm
{ 11720, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11018af8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11720 = VPROLVQZ128rmb
{ 11721, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11218af8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11721 = VPROLVQZ128rmbk
{ 11722, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11618af8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11722 = VPROLVQZ128rmbkz
{ 11723, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20218af8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11723 = VPROLVQZ128rmk
{ 11724, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20618af8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11724 = VPROLVQZ128rmkz
{ 11725, 3, 1, 0, 0, 0, 0x20018af8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11725 = VPROLVQZ128rr
{ 11726, 5, 1, 0, 0, 0, 0x20218af8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #11726 = VPROLVQZ128rrk
{ 11727, 4, 1, 0, 0, 0, 0x20618af8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #11727 = VPROLVQZ128rrkz
{ 11728, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40098af8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11728 = VPROLVQZ256rm
{ 11729, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11098af8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11729 = VPROLVQZ256rmb
{ 11730, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11298af8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11730 = VPROLVQZ256rmbk
{ 11731, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11698af8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11731 = VPROLVQZ256rmbkz
{ 11732, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40298af8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11732 = VPROLVQZ256rmk
{ 11733, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40698af8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11733 = VPROLVQZ256rmkz
{ 11734, 3, 1, 0, 0, 0, 0x40098af8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11734 = VPROLVQZ256rr
{ 11735, 5, 1, 0, 0, 0, 0x40298af8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11735 = VPROLVQZ256rrk
{ 11736, 4, 1, 0, 0, 0, 0x40698af8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11736 = VPROLVQZ256rrkz
{ 11737, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80818af8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11737 = VPROLVQZrm
{ 11738, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11818af8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11738 = VPROLVQZrmb
{ 11739, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a18af8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11739 = VPROLVQZrmbk
{ 11740, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e18af8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11740 = VPROLVQZrmbkz
{ 11741, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a18af8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11741 = VPROLVQZrmk
{ 11742, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e18af8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11742 = VPROLVQZrmkz
{ 11743, 3, 1, 0, 0, 0, 0x80818af8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11743 = VPROLVQZrr
{ 11744, 5, 1, 0, 0, 0, 0x80a18af8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #11744 = VPROLVQZrrk
{ 11745, 4, 1, 0, 0, 0, 0x80e18af8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #11745 = VPROLVQZrrkz
{ 11746, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9013978045018ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11746 = VPRORDZ128mbi
{ 11747, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213978045018ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #11747 = VPRORDZ128mbik
{ 11748, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9613978045018ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #11748 = VPRORDZ128mbikz
{ 11749, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013978045018ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11749 = VPRORDZ128mi
{ 11750, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213978045018ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #11750 = VPRORDZ128mik
{ 11751, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613978045018ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #11751 = VPRORDZ128mikz
{ 11752, 3, 1, 0, 0, 0, 0x20013978045010ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #11752 = VPRORDZ128ri
{ 11753, 5, 1, 0, 0, 0, 0x20213978045010ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #11753 = VPRORDZ128rik
{ 11754, 4, 1, 0, 0, 0, 0x20613978045010ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #11754 = VPRORDZ128rikz
{ 11755, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9093978045018ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11755 = VPRORDZ256mbi
{ 11756, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293978045018ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #11756 = VPRORDZ256mbik
{ 11757, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9693978045018ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #11757 = VPRORDZ256mbikz
{ 11758, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093978045018ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11758 = VPRORDZ256mi
{ 11759, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293978045018ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #11759 = VPRORDZ256mik
{ 11760, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693978045018ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #11760 = VPRORDZ256mikz
{ 11761, 3, 1, 0, 0, 0, 0x40093978045010ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #11761 = VPRORDZ256ri
{ 11762, 5, 1, 0, 0, 0, 0x40293978045010ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #11762 = VPRORDZ256rik
{ 11763, 4, 1, 0, 0, 0, 0x40693978045010ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #11763 = VPRORDZ256rikz
{ 11764, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9813978045018ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11764 = VPRORDZmbi
{ 11765, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13978045018ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #11765 = VPRORDZmbik
{ 11766, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e13978045018ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #11766 = VPRORDZmbikz
{ 11767, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813978045018ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11767 = VPRORDZmi
{ 11768, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13978045018ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #11768 = VPRORDZmik
{ 11769, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13978045018ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #11769 = VPRORDZmikz
{ 11770, 3, 1, 0, 0, 0, 0x80813978045010ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #11770 = VPRORDZri
{ 11771, 5, 1, 0, 0, 0, 0x80a13978045010ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #11771 = VPRORDZrik
{ 11772, 4, 1, 0, 0, 0, 0x80e13978045010ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #11772 = VPRORDZrikz
{ 11773, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101b978045018ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11773 = VPRORQZ128mbi
{ 11774, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b978045018ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #11774 = VPRORQZ128mbik
{ 11775, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161b978045018ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #11775 = VPRORQZ128mbikz
{ 11776, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b978045018ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11776 = VPRORQZ128mi
{ 11777, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b978045018ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #11777 = VPRORQZ128mik
{ 11778, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b978045018ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #11778 = VPRORQZ128mikz
{ 11779, 3, 1, 0, 0, 0, 0x2001b978045010ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #11779 = VPRORQZ128ri
{ 11780, 5, 1, 0, 0, 0, 0x2021b978045010ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #11780 = VPRORQZ128rik
{ 11781, 4, 1, 0, 0, 0, 0x2061b978045010ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #11781 = VPRORQZ128rikz
{ 11782, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109b978045018ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11782 = VPRORQZ256mbi
{ 11783, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b978045018ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #11783 = VPRORQZ256mbik
{ 11784, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169b978045018ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #11784 = VPRORQZ256mbikz
{ 11785, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b978045018ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11785 = VPRORQZ256mi
{ 11786, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b978045018ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #11786 = VPRORQZ256mik
{ 11787, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b978045018ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #11787 = VPRORQZ256mikz
{ 11788, 3, 1, 0, 0, 0, 0x4009b978045010ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #11788 = VPRORQZ256ri
{ 11789, 5, 1, 0, 0, 0, 0x4029b978045010ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #11789 = VPRORQZ256rik
{ 11790, 4, 1, 0, 0, 0, 0x4069b978045010ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #11790 = VPRORQZ256rikz
{ 11791, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181b978045018ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11791 = VPRORQZmbi
{ 11792, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b978045018ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #11792 = VPRORQZmbik
{ 11793, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1b978045018ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #11793 = VPRORQZmbikz
{ 11794, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b978045018ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11794 = VPRORQZmi
{ 11795, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b978045018ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #11795 = VPRORQZmik
{ 11796, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b978045018ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #11796 = VPRORQZmikz
{ 11797, 3, 1, 0, 0, 0, 0x8081b978045010ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #11797 = VPRORQZri
{ 11798, 5, 1, 0, 0, 0, 0x80a1b978045010ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #11798 = VPRORQZrik
{ 11799, 4, 1, 0, 0, 0, 0x80e1b978045010ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #11799 = VPRORQZrikz
{ 11800, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20010a78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11800 = VPRORVDZ128rm
{ 11801, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9010a78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11801 = VPRORVDZ128rmb
{ 11802, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9210a78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #11802 = VPRORVDZ128rmbk
{ 11803, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9610a78009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #11803 = VPRORVDZ128rmbkz
{ 11804, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20210a78009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #11804 = VPRORVDZ128rmk
{ 11805, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20610a78009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #11805 = VPRORVDZ128rmkz
{ 11806, 3, 1, 0, 0, 0, 0x20010a78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11806 = VPRORVDZ128rr
{ 11807, 5, 1, 0, 0, 0, 0x20210a78009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #11807 = VPRORVDZ128rrk
{ 11808, 4, 1, 0, 0, 0, 0x20610a78009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #11808 = VPRORVDZ128rrkz
{ 11809, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40090a78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11809 = VPRORVDZ256rm
{ 11810, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9090a78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11810 = VPRORVDZ256rmb
{ 11811, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9290a78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #11811 = VPRORVDZ256rmbk
{ 11812, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9690a78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #11812 = VPRORVDZ256rmbkz
{ 11813, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40290a78009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #11813 = VPRORVDZ256rmk
{ 11814, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40690a78009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #11814 = VPRORVDZ256rmkz
{ 11815, 3, 1, 0, 0, 0, 0x40090a78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11815 = VPRORVDZ256rr
{ 11816, 5, 1, 0, 0, 0, 0x40290a78009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #11816 = VPRORVDZ256rrk
{ 11817, 4, 1, 0, 0, 0, 0x40690a78009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #11817 = VPRORVDZ256rrkz
{ 11818, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80810a78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11818 = VPRORVDZrm
{ 11819, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9810a78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11819 = VPRORVDZrmb
{ 11820, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a10a78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #11820 = VPRORVDZrmbk
{ 11821, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e10a78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #11821 = VPRORVDZrmbkz
{ 11822, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a10a78009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #11822 = VPRORVDZrmk
{ 11823, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e10a78009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #11823 = VPRORVDZrmkz
{ 11824, 3, 1, 0, 0, 0, 0x80810a78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11824 = VPRORVDZrr
{ 11825, 5, 1, 0, 0, 0, 0x80a10a78009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #11825 = VPRORVDZrrk
{ 11826, 4, 1, 0, 0, 0, 0x80e10a78009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #11826 = VPRORVDZrrkz
{ 11827, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20018a78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11827 = VPRORVQZ128rm
{ 11828, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11018a78009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11828 = VPRORVQZ128rmb
{ 11829, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11218a78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11829 = VPRORVQZ128rmbk
{ 11830, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11618a78009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11830 = VPRORVQZ128rmbkz
{ 11831, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20218a78009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #11831 = VPRORVQZ128rmk
{ 11832, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20618a78009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #11832 = VPRORVQZ128rmkz
{ 11833, 3, 1, 0, 0, 0, 0x20018a78009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11833 = VPRORVQZ128rr
{ 11834, 5, 1, 0, 0, 0, 0x20218a78009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #11834 = VPRORVQZ128rrk
{ 11835, 4, 1, 0, 0, 0, 0x20618a78009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #11835 = VPRORVQZ128rrkz
{ 11836, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40098a78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11836 = VPRORVQZ256rm
{ 11837, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11098a78009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11837 = VPRORVQZ256rmb
{ 11838, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11298a78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11838 = VPRORVQZ256rmbk
{ 11839, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11698a78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11839 = VPRORVQZ256rmbkz
{ 11840, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40298a78009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #11840 = VPRORVQZ256rmk
{ 11841, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40698a78009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #11841 = VPRORVQZ256rmkz
{ 11842, 3, 1, 0, 0, 0, 0x40098a78009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11842 = VPRORVQZ256rr
{ 11843, 5, 1, 0, 0, 0, 0x40298a78009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #11843 = VPRORVQZ256rrk
{ 11844, 4, 1, 0, 0, 0, 0x40698a78009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #11844 = VPRORVQZ256rrkz
{ 11845, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80818a78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11845 = VPRORVQZrm
{ 11846, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11818a78009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11846 = VPRORVQZrmb
{ 11847, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a18a78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11847 = VPRORVQZrmbk
{ 11848, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e18a78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11848 = VPRORVQZrmbkz
{ 11849, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a18a78009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #11849 = VPRORVQZrmk
{ 11850, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e18a78009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #11850 = VPRORVQZrmkz
{ 11851, 3, 1, 0, 0, 0, 0x80818a78009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11851 = VPRORVQZrr
{ 11852, 5, 1, 0, 0, 0, 0x80a18a78009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #11852 = VPRORVQZrrk
{ 11853, 4, 1, 0, 0, 0, 0x80e18a78009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #11853 = VPRORVQZrrkz
{ 11854, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6058050806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #11854 = VPROTBmi
{ 11855, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24858014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11855 = VPROTBmr
{ 11856, 3, 1, 0, 0, 0, 0x6058050805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #11856 = VPROTBri
{ 11857, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1c858014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11857 = VPROTBrm
{ 11858, 3, 1, 0, 573, 0, 0x24858014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11858 = VPROTBrr
{ 11859, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x6158050806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #11859 = VPROTDmi
{ 11860, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24958014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11860 = VPROTDmr
{ 11861, 3, 1, 0, 0, 0, 0x6158050805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #11861 = VPROTDri
{ 11862, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1c958014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11862 = VPROTDrm
{ 11863, 3, 1, 0, 573, 0, 0x24958014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11863 = VPROTDrr
{ 11864, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x61d8050806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #11864 = VPROTQmi
{ 11865, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x249d8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11865 = VPROTQmr
{ 11866, 3, 1, 0, 0, 0, 0x61d8050805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #11866 = VPROTQri
{ 11867, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1c9d8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11867 = VPROTQrm
{ 11868, 3, 1, 0, 573, 0, 0x249d8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11868 = VPROTQrr
{ 11869, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x60d8050806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #11869 = VPROTWmi
{ 11870, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x248d8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11870 = VPROTWmr
{ 11871, 3, 1, 0, 0, 0, 0x60d8050805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #11871 = VPROTWri
{ 11872, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1c8d8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11872 = VPROTWrm
{ 11873, 3, 1, 0, 573, 0, 0x248d8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11873 = VPROTWrr
{ 11874, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x97b38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11874 = VPSADBWYrm
{ 11875, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x97b38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11875 = VPSADBWYrr
{ 11876, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017b78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11876 = VPSADBWZ128rm
{ 11877, 3, 1, 0, 0, 0, 0x20017b78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11877 = VPSADBWZ128rr
{ 11878, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097b78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11878 = VPSADBWZ256rm
{ 11879, 3, 1, 0, 0, 0, 0x40097b78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11879 = VPSADBWZ256rr
{ 11880, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817b78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11880 = VPSADBWZ512rm
{ 11881, 3, 1, 0, 0, 0, 0x80817b78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11881 = VPSADBWZ512rr
{ 11882, 7, 1, 0, 411, 0|(1ULL<<MCID::MayLoad), 0x17b38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11882 = VPSADBWrm
{ 11883, 3, 1, 0, 408, 0|(1ULL<<MCID::Commutable), 0x17b38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11883 = VPSADBWrr
{ 11884, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8205078009004ULL, nullptr, nullptr, OperandInfo896, -1 ,nullptr }, // Inst #11884 = VPSCATTERDDZ128mr
{ 11885, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8285078009004ULL, nullptr, nullptr, OperandInfo897, -1 ,nullptr }, // Inst #11885 = VPSCATTERDDZ256mr
{ 11886, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8a05078009004ULL, nullptr, nullptr, OperandInfo898, -1 ,nullptr }, // Inst #11886 = VPSCATTERDDZmr
{ 11887, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1020d078009004ULL, nullptr, nullptr, OperandInfo899, -1 ,nullptr }, // Inst #11887 = VPSCATTERDQZ128mr
{ 11888, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1028d078009004ULL, nullptr, nullptr, OperandInfo900, -1 ,nullptr }, // Inst #11888 = VPSCATTERDQZ256mr
{ 11889, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10a0d078009004ULL, nullptr, nullptr, OperandInfo901, -1 ,nullptr }, // Inst #11889 = VPSCATTERDQZmr
{ 11890, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x82050f8009004ULL, nullptr, nullptr, OperandInfo896, -1 ,nullptr }, // Inst #11890 = VPSCATTERQDZ128mr
{ 11891, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x82850f8009004ULL, nullptr, nullptr, OperandInfo902, -1 ,nullptr }, // Inst #11891 = VPSCATTERQDZ256mr
{ 11892, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8a050f8009004ULL, nullptr, nullptr, OperandInfo903, -1 ,nullptr }, // Inst #11892 = VPSCATTERQDZmr
{ 11893, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1020d0f8009004ULL, nullptr, nullptr, OperandInfo899, -1 ,nullptr }, // Inst #11893 = VPSCATTERQQZ128mr
{ 11894, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1028d0f8009004ULL, nullptr, nullptr, OperandInfo904, -1 ,nullptr }, // Inst #11894 = VPSCATTERQQZ256mr
{ 11895, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10a0d0f8009004ULL, nullptr, nullptr, OperandInfo905, -1 ,nullptr }, // Inst #11895 = VPSCATTERQQZmr
{ 11896, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24c58014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11896 = VPSHABmr
{ 11897, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1cc58014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11897 = VPSHABrm
{ 11898, 3, 1, 0, 573, 0, 0x24c58014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11898 = VPSHABrr
{ 11899, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24d58014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11899 = VPSHADmr
{ 11900, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1cd58014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11900 = VPSHADrm
{ 11901, 3, 1, 0, 573, 0, 0x24d58014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11901 = VPSHADrr
{ 11902, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24dd8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11902 = VPSHAQmr
{ 11903, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1cdd8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11903 = VPSHAQrm
{ 11904, 3, 1, 0, 573, 0, 0x24dd8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11904 = VPSHAQrr
{ 11905, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24cd8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11905 = VPSHAWmr
{ 11906, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1ccd8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11906 = VPSHAWrm
{ 11907, 3, 1, 0, 573, 0, 0x24cd8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11907 = VPSHAWrr
{ 11908, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24a58014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11908 = VPSHLBmr
{ 11909, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1ca58014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11909 = VPSHLBrm
{ 11910, 3, 1, 0, 573, 0, 0x24a58014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11910 = VPSHLBrr
{ 11911, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24b58014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11911 = VPSHLDmr
{ 11912, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1cb58014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11912 = VPSHLDrm
{ 11913, 3, 1, 0, 573, 0, 0x24b58014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11913 = VPSHLDrr
{ 11914, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24bd8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11914 = VPSHLQmr
{ 11915, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1cbd8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11915 = VPSHLQrm
{ 11916, 3, 1, 0, 573, 0, 0x24bd8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11916 = VPSHLQrr
{ 11917, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x24ad8014806ULL, nullptr, nullptr, OperandInfo895, -1 ,nullptr }, // Inst #11917 = VPSHLWmr
{ 11918, 7, 1, 0, 572, 0|(1ULL<<MCID::MayLoad), 0x1cad8014806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11918 = VPSHLWrm
{ 11919, 3, 1, 0, 573, 0, 0x24ad8014805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11919 = VPSHLWrr
{ 11920, 7, 1, 0, 428, 0|(1ULL<<MCID::MayLoad), 0x90038009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #11920 = VPSHUFBYrm
{ 11921, 3, 1, 0, 429, 0, 0x90038009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #11921 = VPSHUFBYrr
{ 11922, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20010078009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #11922 = VPSHUFBZ128rm
{ 11923, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20210078009006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #11923 = VPSHUFBZ128rmk
{ 11924, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20610078009006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #11924 = VPSHUFBZ128rmkz
{ 11925, 3, 1, 0, 0, 0, 0x20010078009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #11925 = VPSHUFBZ128rr
{ 11926, 5, 1, 0, 0, 0, 0x20210078009005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #11926 = VPSHUFBZ128rrk
{ 11927, 4, 1, 0, 0, 0, 0x20610078009005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #11927 = VPSHUFBZ128rrkz
{ 11928, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40090078009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #11928 = VPSHUFBZ256rm
{ 11929, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40290078009006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #11929 = VPSHUFBZ256rmk
{ 11930, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40690078009006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #11930 = VPSHUFBZ256rmkz
{ 11931, 3, 1, 0, 0, 0, 0x40090078009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #11931 = VPSHUFBZ256rr
{ 11932, 5, 1, 0, 0, 0, 0x40290078009005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #11932 = VPSHUFBZ256rrk
{ 11933, 4, 1, 0, 0, 0, 0x40690078009005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #11933 = VPSHUFBZ256rrkz
{ 11934, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80810078009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #11934 = VPSHUFBZrm
{ 11935, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a10078009006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #11935 = VPSHUFBZrmk
{ 11936, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e10078009006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #11936 = VPSHUFBZrmkz
{ 11937, 3, 1, 0, 0, 0, 0x80810078009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #11937 = VPSHUFBZrr
{ 11938, 5, 1, 0, 0, 0, 0x80a10078009005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #11938 = VPSHUFBZrrk
{ 11939, 4, 1, 0, 0, 0, 0x80e10078009005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #11939 = VPSHUFBZrrkz
{ 11940, 7, 1, 0, 428, 0|(1ULL<<MCID::MayLoad), 0x10038009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #11940 = VPSHUFBrm
{ 11941, 3, 1, 0, 429, 0, 0x10038009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #11941 = VPSHUFBrr
{ 11942, 7, 1, 0, 574, 0|(1ULL<<MCID::MayLoad), 0x83838045006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #11942 = VPSHUFDYmi
{ 11943, 3, 1, 0, 431, 0, 0x83838045005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #11943 = VPSHUFDYri
{ 11944, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9003878045006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11944 = VPSHUFDZ128mbi
{ 11945, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9203878045006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #11945 = VPSHUFDZ128mbik
{ 11946, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9603878045006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #11946 = VPSHUFDZ128mbikz
{ 11947, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20003878045006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11947 = VPSHUFDZ128mi
{ 11948, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20203878045006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #11948 = VPSHUFDZ128mik
{ 11949, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20603878045006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #11949 = VPSHUFDZ128mikz
{ 11950, 3, 1, 0, 0, 0, 0x20003878045005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #11950 = VPSHUFDZ128ri
{ 11951, 5, 1, 0, 0, 0, 0x20203878045005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #11951 = VPSHUFDZ128rik
{ 11952, 4, 1, 0, 0, 0, 0x20603878045005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #11952 = VPSHUFDZ128rikz
{ 11953, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9083878045006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11953 = VPSHUFDZ256mbi
{ 11954, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9283878045006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #11954 = VPSHUFDZ256mbik
{ 11955, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9683878045006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #11955 = VPSHUFDZ256mbikz
{ 11956, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40083878045006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11956 = VPSHUFDZ256mi
{ 11957, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40283878045006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #11957 = VPSHUFDZ256mik
{ 11958, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40683878045006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #11958 = VPSHUFDZ256mikz
{ 11959, 3, 1, 0, 0, 0, 0x40083878045005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #11959 = VPSHUFDZ256ri
{ 11960, 5, 1, 0, 0, 0, 0x40283878045005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #11960 = VPSHUFDZ256rik
{ 11961, 4, 1, 0, 0, 0, 0x40683878045005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #11961 = VPSHUFDZ256rikz
{ 11962, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9803878045006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11962 = VPSHUFDZmbi
{ 11963, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a03878045006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #11963 = VPSHUFDZmbik
{ 11964, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e03878045006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #11964 = VPSHUFDZmbikz
{ 11965, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80803878045006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11965 = VPSHUFDZmi
{ 11966, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a03878045006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #11966 = VPSHUFDZmik
{ 11967, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e03878045006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #11967 = VPSHUFDZmikz
{ 11968, 3, 1, 0, 0, 0, 0x80803878045005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #11968 = VPSHUFDZri
{ 11969, 5, 1, 0, 0, 0, 0x80a03878045005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #11969 = VPSHUFDZrik
{ 11970, 4, 1, 0, 0, 0, 0x80e03878045005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #11970 = VPSHUFDZrikz
{ 11971, 7, 1, 0, 574, 0|(1ULL<<MCID::MayLoad), 0x3838045006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #11971 = VPSHUFDmi
{ 11972, 3, 1, 0, 431, 0, 0x3838045005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #11972 = VPSHUFDri
{ 11973, 7, 1, 0, 574, 0|(1ULL<<MCID::MayLoad), 0x83838045806ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #11973 = VPSHUFHWYmi
{ 11974, 3, 1, 0, 431, 0, 0x83838045805ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #11974 = VPSHUFHWYri
{ 11975, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20003878045806ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11975 = VPSHUFHWZ128mi
{ 11976, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20203878045806ULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr }, // Inst #11976 = VPSHUFHWZ128mik
{ 11977, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20603878045806ULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr }, // Inst #11977 = VPSHUFHWZ128mikz
{ 11978, 3, 1, 0, 0, 0, 0x20003878045805ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #11978 = VPSHUFHWZ128ri
{ 11979, 5, 1, 0, 0, 0, 0x20203878045805ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr }, // Inst #11979 = VPSHUFHWZ128rik
{ 11980, 4, 1, 0, 0, 0, 0x20603878045805ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr }, // Inst #11980 = VPSHUFHWZ128rikz
{ 11981, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40083878045806ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #11981 = VPSHUFHWZ256mi
{ 11982, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40283878045806ULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr }, // Inst #11982 = VPSHUFHWZ256mik
{ 11983, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40683878045806ULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr }, // Inst #11983 = VPSHUFHWZ256mikz
{ 11984, 3, 1, 0, 0, 0, 0x40083878045805ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #11984 = VPSHUFHWZ256ri
{ 11985, 5, 1, 0, 0, 0, 0x40283878045805ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr }, // Inst #11985 = VPSHUFHWZ256rik
{ 11986, 4, 1, 0, 0, 0, 0x40683878045805ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr }, // Inst #11986 = VPSHUFHWZ256rikz
{ 11987, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80803878045806ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #11987 = VPSHUFHWZmi
{ 11988, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a03878045806ULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr }, // Inst #11988 = VPSHUFHWZmik
{ 11989, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e03878045806ULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr }, // Inst #11989 = VPSHUFHWZmikz
{ 11990, 3, 1, 0, 0, 0, 0x80803878045805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #11990 = VPSHUFHWZri
{ 11991, 5, 1, 0, 0, 0, 0x80a03878045805ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr }, // Inst #11991 = VPSHUFHWZrik
{ 11992, 4, 1, 0, 0, 0, 0x80e03878045805ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr }, // Inst #11992 = VPSHUFHWZrikz
{ 11993, 7, 1, 0, 574, 0|(1ULL<<MCID::MayLoad), 0x3838045806ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #11993 = VPSHUFHWmi
{ 11994, 3, 1, 0, 431, 0, 0x3838045805ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #11994 = VPSHUFHWri
{ 11995, 7, 1, 0, 574, 0|(1ULL<<MCID::MayLoad), 0x83838046006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #11995 = VPSHUFLWYmi
{ 11996, 3, 1, 0, 431, 0, 0x83838046005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #11996 = VPSHUFLWYri
{ 11997, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20003878046006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #11997 = VPSHUFLWZ128mi
{ 11998, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20203878046006ULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr }, // Inst #11998 = VPSHUFLWZ128mik
{ 11999, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20603878046006ULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr }, // Inst #11999 = VPSHUFLWZ128mikz
{ 12000, 3, 1, 0, 0, 0, 0x20003878046005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12000 = VPSHUFLWZ128ri
{ 12001, 5, 1, 0, 0, 0, 0x20203878046005ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr }, // Inst #12001 = VPSHUFLWZ128rik
{ 12002, 4, 1, 0, 0, 0, 0x20603878046005ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr }, // Inst #12002 = VPSHUFLWZ128rikz
{ 12003, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40083878046006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12003 = VPSHUFLWZ256mi
{ 12004, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40283878046006ULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr }, // Inst #12004 = VPSHUFLWZ256mik
{ 12005, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40683878046006ULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr }, // Inst #12005 = VPSHUFLWZ256mikz
{ 12006, 3, 1, 0, 0, 0, 0x40083878046005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12006 = VPSHUFLWZ256ri
{ 12007, 5, 1, 0, 0, 0, 0x40283878046005ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr }, // Inst #12007 = VPSHUFLWZ256rik
{ 12008, 4, 1, 0, 0, 0, 0x40683878046005ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr }, // Inst #12008 = VPSHUFLWZ256rikz
{ 12009, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80803878046006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12009 = VPSHUFLWZmi
{ 12010, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a03878046006ULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr }, // Inst #12010 = VPSHUFLWZmik
{ 12011, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e03878046006ULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr }, // Inst #12011 = VPSHUFLWZmikz
{ 12012, 3, 1, 0, 0, 0, 0x80803878046005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12012 = VPSHUFLWZri
{ 12013, 5, 1, 0, 0, 0, 0x80a03878046005ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr }, // Inst #12013 = VPSHUFLWZrik
{ 12014, 4, 1, 0, 0, 0, 0x80e03878046005ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr }, // Inst #12014 = VPSHUFLWZrikz
{ 12015, 7, 1, 0, 574, 0|(1ULL<<MCID::MayLoad), 0x3838046006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #12015 = VPSHUFLWmi
{ 12016, 3, 1, 0, 431, 0, 0x3838046005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12016 = VPSHUFLWri
{ 12017, 7, 1, 0, 405, 0|(1ULL<<MCID::MayLoad), 0x90438009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12017 = VPSIGNBYrm
{ 12018, 3, 1, 0, 406, 0, 0x90438009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12018 = VPSIGNBYrr
{ 12019, 7, 1, 0, 432, 0|(1ULL<<MCID::MayLoad), 0x10438009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12019 = VPSIGNBrm
{ 12020, 3, 1, 0, 433, 0, 0x10438009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12020 = VPSIGNBrr
{ 12021, 7, 1, 0, 405, 0|(1ULL<<MCID::MayLoad), 0x90538009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12021 = VPSIGNDYrm
{ 12022, 3, 1, 0, 406, 0, 0x90538009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12022 = VPSIGNDYrr
{ 12023, 7, 1, 0, 432, 0|(1ULL<<MCID::MayLoad), 0x10538009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12023 = VPSIGNDrm
{ 12024, 3, 1, 0, 433, 0, 0x10538009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12024 = VPSIGNDrr
{ 12025, 7, 1, 0, 405, 0|(1ULL<<MCID::MayLoad), 0x904b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12025 = VPSIGNWYrm
{ 12026, 3, 1, 0, 406, 0, 0x904b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12026 = VPSIGNWYrr
{ 12027, 7, 1, 0, 432, 0|(1ULL<<MCID::MayLoad), 0x104b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12027 = VPSIGNWrm
{ 12028, 3, 1, 0, 433, 0, 0x104b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12028 = VPSIGNWrr
{ 12029, 3, 1, 0, 837, 0, 0x939b8045017ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12029 = VPSLLDQYri
{ 12030, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200139f004501fULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12030 = VPSLLDQZ128rm
{ 12031, 3, 1, 0, 0, 0, 0x200139f0045017ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12031 = VPSLLDQZ128rr
{ 12032, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400939f004501fULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12032 = VPSLLDQZ256rm
{ 12033, 3, 1, 0, 0, 0, 0x400939f0045017ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12033 = VPSLLDQZ256rr
{ 12034, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808139f004501fULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12034 = VPSLLDQZ512rm
{ 12035, 3, 1, 0, 0, 0, 0x808139f0045017ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12035 = VPSLLDQZ512rr
{ 12036, 3, 1, 0, 837, 0, 0x139b8045017ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12036 = VPSLLDQri
{ 12037, 3, 1, 0, 435, 0, 0x93938045016ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12037 = VPSLLDYri
{ 12038, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x97938005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12038 = VPSLLDYrm
{ 12039, 3, 1, 0, 835, 0, 0x97938005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr }, // Inst #12039 = VPSLLDYrr
{ 12040, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x901397804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12040 = VPSLLDZ128mbi
{ 12041, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x921397804501eULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #12041 = VPSLLDZ128mbik
{ 12042, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x961397804501eULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #12042 = VPSLLDZ128mbikz
{ 12043, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001397804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12043 = VPSLLDZ128mi
{ 12044, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021397804501eULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #12044 = VPSLLDZ128mik
{ 12045, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061397804501eULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #12045 = VPSLLDZ128mikz
{ 12046, 3, 1, 0, 0, 0, 0x20013978045016ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12046 = VPSLLDZ128ri
{ 12047, 5, 1, 0, 0, 0, 0x20213978045016ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #12047 = VPSLLDZ128rik
{ 12048, 4, 1, 0, 0, 0, 0x20613978045016ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #12048 = VPSLLDZ128rikz
{ 12049, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017978005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12049 = VPSLLDZ128rm
{ 12050, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217978005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12050 = VPSLLDZ128rmk
{ 12051, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617978005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12051 = VPSLLDZ128rmkz
{ 12052, 3, 1, 0, 0, 0, 0x20017978005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12052 = VPSLLDZ128rr
{ 12053, 5, 1, 0, 0, 0, 0x20217978005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #12053 = VPSLLDZ128rrk
{ 12054, 4, 1, 0, 0, 0, 0x20617978005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #12054 = VPSLLDZ128rrkz
{ 12055, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x909397804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12055 = VPSLLDZ256mbi
{ 12056, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x929397804501eULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #12056 = VPSLLDZ256mbik
{ 12057, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x969397804501eULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #12057 = VPSLLDZ256mbikz
{ 12058, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009397804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12058 = VPSLLDZ256mi
{ 12059, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029397804501eULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #12059 = VPSLLDZ256mik
{ 12060, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069397804501eULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #12060 = VPSLLDZ256mikz
{ 12061, 3, 1, 0, 0, 0, 0x40093978045016ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12061 = VPSLLDZ256ri
{ 12062, 5, 1, 0, 0, 0, 0x40293978045016ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #12062 = VPSLLDZ256rik
{ 12063, 4, 1, 0, 0, 0, 0x40693978045016ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #12063 = VPSLLDZ256rikz
{ 12064, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20097978005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12064 = VPSLLDZ256rm
{ 12065, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20297978005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12065 = VPSLLDZ256rmk
{ 12066, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20697978005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12066 = VPSLLDZ256rmkz
{ 12067, 3, 1, 0, 0, 0, 0x20097978005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12067 = VPSLLDZ256rr
{ 12068, 5, 1, 0, 0, 0, 0x20297978005005ULL, nullptr, nullptr, OperandInfo918, -1 ,nullptr }, // Inst #12068 = VPSLLDZ256rrk
{ 12069, 4, 1, 0, 0, 0, 0x20697978005005ULL, nullptr, nullptr, OperandInfo919, -1 ,nullptr }, // Inst #12069 = VPSLLDZ256rrkz
{ 12070, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x981397804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12070 = VPSLLDZmbi
{ 12071, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a1397804501eULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #12071 = VPSLLDZmbik
{ 12072, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e1397804501eULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #12072 = VPSLLDZmbikz
{ 12073, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081397804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12073 = VPSLLDZmi
{ 12074, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1397804501eULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #12074 = VPSLLDZmik
{ 12075, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1397804501eULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #12075 = VPSLLDZmikz
{ 12076, 3, 1, 0, 0, 0, 0x80813978045016ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12076 = VPSLLDZri
{ 12077, 5, 1, 0, 0, 0, 0x80a13978045016ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #12077 = VPSLLDZrik
{ 12078, 4, 1, 0, 0, 0, 0x80e13978045016ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #12078 = VPSLLDZrikz
{ 12079, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20817978005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12079 = VPSLLDZrm
{ 12080, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a17978005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12080 = VPSLLDZrmk
{ 12081, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e17978005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12081 = VPSLLDZrmkz
{ 12082, 3, 1, 0, 0, 0, 0x20817978005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12082 = VPSLLDZrr
{ 12083, 5, 1, 0, 0, 0, 0x20a17978005005ULL, nullptr, nullptr, OperandInfo921, -1 ,nullptr }, // Inst #12083 = VPSLLDZrrk
{ 12084, 4, 1, 0, 0, 0, 0x20e17978005005ULL, nullptr, nullptr, OperandInfo922, -1 ,nullptr }, // Inst #12084 = VPSLLDZrrkz
{ 12085, 3, 1, 0, 435, 0, 0x13938045016ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12085 = VPSLLDri
{ 12086, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x17938005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12086 = VPSLLDrm
{ 12087, 3, 1, 0, 835, 0, 0x17938005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12087 = VPSLLDrr
{ 12088, 3, 1, 0, 435, 0, 0x939b8045016ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12088 = VPSLLQYri
{ 12089, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x979b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12089 = VPSLLQYrm
{ 12090, 3, 1, 0, 835, 0, 0x979b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr }, // Inst #12090 = VPSLLQYrr
{ 12091, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101b9f804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12091 = VPSLLQZ128mbi
{ 12092, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b9f804501eULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #12092 = VPSLLQZ128mbik
{ 12093, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161b9f804501eULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #12093 = VPSLLQZ128mbikz
{ 12094, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b9f804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12094 = VPSLLQZ128mi
{ 12095, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b9f804501eULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #12095 = VPSLLQZ128mik
{ 12096, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b9f804501eULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #12096 = VPSLLQZ128mikz
{ 12097, 3, 1, 0, 0, 0, 0x2001b9f8045016ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12097 = VPSLLQZ128ri
{ 12098, 5, 1, 0, 0, 0, 0x2021b9f8045016ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #12098 = VPSLLQZ128rik
{ 12099, 4, 1, 0, 0, 0, 0x2061b9f8045016ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #12099 = VPSLLQZ128rikz
{ 12100, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001f9f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12100 = VPSLLQZ128rm
{ 12101, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021f9f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12101 = VPSLLQZ128rmk
{ 12102, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061f9f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12102 = VPSLLQZ128rmkz
{ 12103, 3, 1, 0, 0, 0, 0x2001f9f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12103 = VPSLLQZ128rr
{ 12104, 5, 1, 0, 0, 0, 0x2021f9f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #12104 = VPSLLQZ128rrk
{ 12105, 4, 1, 0, 0, 0, 0x2061f9f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #12105 = VPSLLQZ128rrkz
{ 12106, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109b9f804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12106 = VPSLLQZ256mbi
{ 12107, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b9f804501eULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #12107 = VPSLLQZ256mbik
{ 12108, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169b9f804501eULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #12108 = VPSLLQZ256mbikz
{ 12109, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b9f804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12109 = VPSLLQZ256mi
{ 12110, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b9f804501eULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #12110 = VPSLLQZ256mik
{ 12111, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b9f804501eULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #12111 = VPSLLQZ256mikz
{ 12112, 3, 1, 0, 0, 0, 0x4009b9f8045016ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12112 = VPSLLQZ256ri
{ 12113, 5, 1, 0, 0, 0, 0x4029b9f8045016ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #12113 = VPSLLQZ256rik
{ 12114, 4, 1, 0, 0, 0, 0x4069b9f8045016ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #12114 = VPSLLQZ256rikz
{ 12115, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2009f9f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12115 = VPSLLQZ256rm
{ 12116, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2029f9f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12116 = VPSLLQZ256rmk
{ 12117, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2069f9f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12117 = VPSLLQZ256rmkz
{ 12118, 3, 1, 0, 0, 0, 0x2009f9f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12118 = VPSLLQZ256rr
{ 12119, 5, 1, 0, 0, 0, 0x2029f9f8005005ULL, nullptr, nullptr, OperandInfo923, -1 ,nullptr }, // Inst #12119 = VPSLLQZ256rrk
{ 12120, 4, 1, 0, 0, 0, 0x2069f9f8005005ULL, nullptr, nullptr, OperandInfo924, -1 ,nullptr }, // Inst #12120 = VPSLLQZ256rrkz
{ 12121, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181b9f804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12121 = VPSLLQZmbi
{ 12122, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b9f804501eULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #12122 = VPSLLQZmbik
{ 12123, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1b9f804501eULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #12123 = VPSLLQZmbikz
{ 12124, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b9f804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12124 = VPSLLQZmi
{ 12125, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b9f804501eULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #12125 = VPSLLQZmik
{ 12126, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b9f804501eULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #12126 = VPSLLQZmikz
{ 12127, 3, 1, 0, 0, 0, 0x8081b9f8045016ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12127 = VPSLLQZri
{ 12128, 5, 1, 0, 0, 0, 0x80a1b9f8045016ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #12128 = VPSLLQZrik
{ 12129, 4, 1, 0, 0, 0, 0x80e1b9f8045016ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #12129 = VPSLLQZrikz
{ 12130, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2081f9f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12130 = VPSLLQZrm
{ 12131, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a1f9f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12131 = VPSLLQZrmk
{ 12132, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e1f9f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12132 = VPSLLQZrmkz
{ 12133, 3, 1, 0, 0, 0, 0x2081f9f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12133 = VPSLLQZrr
{ 12134, 5, 1, 0, 0, 0, 0x20a1f9f8005005ULL, nullptr, nullptr, OperandInfo925, -1 ,nullptr }, // Inst #12134 = VPSLLQZrrk
{ 12135, 4, 1, 0, 0, 0, 0x20e1f9f8005005ULL, nullptr, nullptr, OperandInfo926, -1 ,nullptr }, // Inst #12135 = VPSLLQZrrkz
{ 12136, 3, 1, 0, 435, 0, 0x139b8045016ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12136 = VPSLLQri
{ 12137, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x179b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12137 = VPSLLQrm
{ 12138, 3, 1, 0, 835, 0, 0x179b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12138 = VPSLLQrr
{ 12139, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x923b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12139 = VPSLLVDYrm
{ 12140, 3, 1, 0, 573, 0, 0x923b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12140 = VPSLLVDYrr
{ 12141, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200123f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12141 = VPSLLVDZ128rm
{ 12142, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90123f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12142 = VPSLLVDZ128rmb
{ 12143, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92123f8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12143 = VPSLLVDZ128rmbk
{ 12144, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96123f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12144 = VPSLLVDZ128rmbkz
{ 12145, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202123f8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12145 = VPSLLVDZ128rmk
{ 12146, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206123f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12146 = VPSLLVDZ128rmkz
{ 12147, 3, 1, 0, 0, 0, 0x200123f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12147 = VPSLLVDZ128rr
{ 12148, 5, 1, 0, 0, 0, 0x202123f8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #12148 = VPSLLVDZ128rrk
{ 12149, 4, 1, 0, 0, 0, 0x206123f8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #12149 = VPSLLVDZ128rrkz
{ 12150, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400923f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12150 = VPSLLVDZ256rm
{ 12151, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90923f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12151 = VPSLLVDZ256rmb
{ 12152, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92923f8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12152 = VPSLLVDZ256rmbk
{ 12153, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96923f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12153 = VPSLLVDZ256rmbkz
{ 12154, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402923f8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12154 = VPSLLVDZ256rmk
{ 12155, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406923f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12155 = VPSLLVDZ256rmkz
{ 12156, 3, 1, 0, 0, 0, 0x400923f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12156 = VPSLLVDZ256rr
{ 12157, 5, 1, 0, 0, 0, 0x402923f8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #12157 = VPSLLVDZ256rrk
{ 12158, 4, 1, 0, 0, 0, 0x406923f8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #12158 = VPSLLVDZ256rrkz
{ 12159, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808123f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12159 = VPSLLVDZrm
{ 12160, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98123f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12160 = VPSLLVDZrmb
{ 12161, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a123f8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12161 = VPSLLVDZrmbk
{ 12162, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e123f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12162 = VPSLLVDZrmbkz
{ 12163, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a123f8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12163 = VPSLLVDZrmk
{ 12164, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e123f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12164 = VPSLLVDZrmkz
{ 12165, 3, 1, 0, 0, 0, 0x808123f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12165 = VPSLLVDZrr
{ 12166, 5, 1, 0, 0, 0, 0x80a123f8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #12166 = VPSLLVDZrrk
{ 12167, 4, 1, 0, 0, 0, 0x80e123f8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #12167 = VPSLLVDZrrkz
{ 12168, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x123b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12168 = VPSLLVDrm
{ 12169, 3, 1, 0, 573, 0, 0x123b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12169 = VPSLLVDrr
{ 12170, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x9a3b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12170 = VPSLLVQYrm
{ 12171, 3, 1, 0, 573, 0, 0x9a3b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12171 = VPSLLVQYrr
{ 12172, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001a3f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12172 = VPSLLVQZ128rm
{ 12173, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101a3f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12173 = VPSLLVQZ128rmb
{ 12174, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121a3f8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12174 = VPSLLVQZ128rmbk
{ 12175, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161a3f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12175 = VPSLLVQZ128rmbkz
{ 12176, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021a3f8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12176 = VPSLLVQZ128rmk
{ 12177, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061a3f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12177 = VPSLLVQZ128rmkz
{ 12178, 3, 1, 0, 0, 0, 0x2001a3f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12178 = VPSLLVQZ128rr
{ 12179, 5, 1, 0, 0, 0, 0x2021a3f8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #12179 = VPSLLVQZ128rrk
{ 12180, 4, 1, 0, 0, 0, 0x2061a3f8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #12180 = VPSLLVQZ128rrkz
{ 12181, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009a3f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12181 = VPSLLVQZ256rm
{ 12182, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109a3f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12182 = VPSLLVQZ256rmb
{ 12183, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129a3f8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12183 = VPSLLVQZ256rmbk
{ 12184, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169a3f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12184 = VPSLLVQZ256rmbkz
{ 12185, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029a3f8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12185 = VPSLLVQZ256rmk
{ 12186, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069a3f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12186 = VPSLLVQZ256rmkz
{ 12187, 3, 1, 0, 0, 0, 0x4009a3f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12187 = VPSLLVQZ256rr
{ 12188, 5, 1, 0, 0, 0, 0x4029a3f8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #12188 = VPSLLVQZ256rrk
{ 12189, 4, 1, 0, 0, 0, 0x4069a3f8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #12189 = VPSLLVQZ256rrkz
{ 12190, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081a3f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12190 = VPSLLVQZrm
{ 12191, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181a3f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12191 = VPSLLVQZrmb
{ 12192, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1a3f8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12192 = VPSLLVQZrmbk
{ 12193, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1a3f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12193 = VPSLLVQZrmbkz
{ 12194, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1a3f8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12194 = VPSLLVQZrmk
{ 12195, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1a3f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12195 = VPSLLVQZrmkz
{ 12196, 3, 1, 0, 0, 0, 0x8081a3f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12196 = VPSLLVQZrr
{ 12197, 5, 1, 0, 0, 0, 0x80a1a3f8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #12197 = VPSLLVQZrrk
{ 12198, 4, 1, 0, 0, 0, 0x80e1a3f8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #12198 = VPSLLVQZrrkz
{ 12199, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x1a3b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12199 = VPSLLVQrm
{ 12200, 3, 1, 0, 573, 0, 0x1a3b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12200 = VPSLLVQrr
{ 12201, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20018978009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12201 = VPSLLVWZ128rm
{ 12202, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20218978009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12202 = VPSLLVWZ128rmk
{ 12203, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20618978009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12203 = VPSLLVWZ128rmkz
{ 12204, 3, 1, 0, 0, 0, 0x20018978009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12204 = VPSLLVWZ128rr
{ 12205, 5, 1, 0, 0, 0, 0x20218978009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12205 = VPSLLVWZ128rrk
{ 12206, 4, 1, 0, 0, 0, 0x20618978009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12206 = VPSLLVWZ128rrkz
{ 12207, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40098978009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12207 = VPSLLVWZ256rm
{ 12208, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40298978009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12208 = VPSLLVWZ256rmk
{ 12209, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40698978009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12209 = VPSLLVWZ256rmkz
{ 12210, 3, 1, 0, 0, 0, 0x40098978009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12210 = VPSLLVWZ256rr
{ 12211, 5, 1, 0, 0, 0, 0x40298978009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #12211 = VPSLLVWZ256rrk
{ 12212, 4, 1, 0, 0, 0, 0x40698978009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #12212 = VPSLLVWZ256rrkz
{ 12213, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80818978009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12213 = VPSLLVWZrm
{ 12214, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a18978009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12214 = VPSLLVWZrmk
{ 12215, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e18978009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12215 = VPSLLVWZrmkz
{ 12216, 3, 1, 0, 0, 0, 0x80818978009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12216 = VPSLLVWZrr
{ 12217, 5, 1, 0, 0, 0, 0x80a18978009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #12217 = VPSLLVWZrrk
{ 12218, 4, 1, 0, 0, 0, 0x80e18978009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #12218 = VPSLLVWZrrkz
{ 12219, 3, 1, 0, 435, 0, 0x938b8045016ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12219 = VPSLLWYri
{ 12220, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x978b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12220 = VPSLLWYrm
{ 12221, 3, 1, 0, 835, 0, 0x978b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr }, // Inst #12221 = VPSLLWYrr
{ 12222, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200138f804501eULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12222 = VPSLLWZ128mi
{ 12223, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202138f804501eULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr }, // Inst #12223 = VPSLLWZ128mik
{ 12224, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206138f804501eULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr }, // Inst #12224 = VPSLLWZ128mikz
{ 12225, 3, 1, 0, 0, 0, 0x200138f8045016ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12225 = VPSLLWZ128ri
{ 12226, 5, 1, 0, 0, 0, 0x202138f8045016ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr }, // Inst #12226 = VPSLLWZ128rik
{ 12227, 4, 1, 0, 0, 0, 0x206138f8045016ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr }, // Inst #12227 = VPSLLWZ128rikz
{ 12228, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200178f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12228 = VPSLLWZ128rm
{ 12229, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202178f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12229 = VPSLLWZ128rmk
{ 12230, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206178f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12230 = VPSLLWZ128rmkz
{ 12231, 3, 1, 0, 0, 0, 0x200178f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12231 = VPSLLWZ128rr
{ 12232, 5, 1, 0, 0, 0, 0x202178f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12232 = VPSLLWZ128rrk
{ 12233, 4, 1, 0, 0, 0, 0x206178f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12233 = VPSLLWZ128rrkz
{ 12234, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400938f804501eULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12234 = VPSLLWZ256mi
{ 12235, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402938f804501eULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr }, // Inst #12235 = VPSLLWZ256mik
{ 12236, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406938f804501eULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr }, // Inst #12236 = VPSLLWZ256mikz
{ 12237, 3, 1, 0, 0, 0, 0x400938f8045016ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12237 = VPSLLWZ256ri
{ 12238, 5, 1, 0, 0, 0, 0x402938f8045016ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr }, // Inst #12238 = VPSLLWZ256rik
{ 12239, 4, 1, 0, 0, 0, 0x406938f8045016ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr }, // Inst #12239 = VPSLLWZ256rikz
{ 12240, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200978f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12240 = VPSLLWZ256rm
{ 12241, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202978f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12241 = VPSLLWZ256rmk
{ 12242, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206978f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12242 = VPSLLWZ256rmkz
{ 12243, 3, 1, 0, 0, 0, 0x200978f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12243 = VPSLLWZ256rr
{ 12244, 5, 1, 0, 0, 0, 0x202978f8005005ULL, nullptr, nullptr, OperandInfo927, -1 ,nullptr }, // Inst #12244 = VPSLLWZ256rrk
{ 12245, 4, 1, 0, 0, 0, 0x206978f8005005ULL, nullptr, nullptr, OperandInfo928, -1 ,nullptr }, // Inst #12245 = VPSLLWZ256rrkz
{ 12246, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808138f804501eULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12246 = VPSLLWZmi
{ 12247, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a138f804501eULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr }, // Inst #12247 = VPSLLWZmik
{ 12248, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e138f804501eULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr }, // Inst #12248 = VPSLLWZmikz
{ 12249, 3, 1, 0, 0, 0, 0x808138f8045016ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12249 = VPSLLWZri
{ 12250, 5, 1, 0, 0, 0, 0x80a138f8045016ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr }, // Inst #12250 = VPSLLWZrik
{ 12251, 4, 1, 0, 0, 0, 0x80e138f8045016ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr }, // Inst #12251 = VPSLLWZrikz
{ 12252, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x208178f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12252 = VPSLLWZrm
{ 12253, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a178f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12253 = VPSLLWZrmk
{ 12254, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e178f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12254 = VPSLLWZrmkz
{ 12255, 3, 1, 0, 0, 0, 0x208178f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12255 = VPSLLWZrr
{ 12256, 5, 1, 0, 0, 0, 0x20a178f8005005ULL, nullptr, nullptr, OperandInfo929, -1 ,nullptr }, // Inst #12256 = VPSLLWZrrk
{ 12257, 4, 1, 0, 0, 0, 0x20e178f8005005ULL, nullptr, nullptr, OperandInfo930, -1 ,nullptr }, // Inst #12257 = VPSLLWZrrkz
{ 12258, 3, 1, 0, 435, 0, 0x138b8045016ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12258 = VPSLLWri
{ 12259, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x178b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12259 = VPSLLWrm
{ 12260, 3, 1, 0, 835, 0, 0x178b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12260 = VPSLLWrr
{ 12261, 3, 1, 0, 435, 0, 0x93938045014ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12261 = VPSRADYri
{ 12262, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x97138005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12262 = VPSRADYrm
{ 12263, 3, 1, 0, 835, 0, 0x97138005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr }, // Inst #12263 = VPSRADYrr
{ 12264, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x901397804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12264 = VPSRADZ128mbi
{ 12265, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x921397804501cULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #12265 = VPSRADZ128mbik
{ 12266, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x961397804501cULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #12266 = VPSRADZ128mbikz
{ 12267, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001397804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12267 = VPSRADZ128mi
{ 12268, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021397804501cULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #12268 = VPSRADZ128mik
{ 12269, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061397804501cULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #12269 = VPSRADZ128mikz
{ 12270, 3, 1, 0, 0, 0, 0x20013978045014ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12270 = VPSRADZ128ri
{ 12271, 5, 1, 0, 0, 0, 0x20213978045014ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #12271 = VPSRADZ128rik
{ 12272, 4, 1, 0, 0, 0, 0x20613978045014ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #12272 = VPSRADZ128rikz
{ 12273, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017178005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12273 = VPSRADZ128rm
{ 12274, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217178005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12274 = VPSRADZ128rmk
{ 12275, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617178005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12275 = VPSRADZ128rmkz
{ 12276, 3, 1, 0, 0, 0, 0x20017178005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12276 = VPSRADZ128rr
{ 12277, 5, 1, 0, 0, 0, 0x20217178005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #12277 = VPSRADZ128rrk
{ 12278, 4, 1, 0, 0, 0, 0x20617178005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #12278 = VPSRADZ128rrkz
{ 12279, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x909397804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12279 = VPSRADZ256mbi
{ 12280, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x929397804501cULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #12280 = VPSRADZ256mbik
{ 12281, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x969397804501cULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #12281 = VPSRADZ256mbikz
{ 12282, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009397804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12282 = VPSRADZ256mi
{ 12283, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029397804501cULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #12283 = VPSRADZ256mik
{ 12284, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069397804501cULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #12284 = VPSRADZ256mikz
{ 12285, 3, 1, 0, 0, 0, 0x40093978045014ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12285 = VPSRADZ256ri
{ 12286, 5, 1, 0, 0, 0, 0x40293978045014ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #12286 = VPSRADZ256rik
{ 12287, 4, 1, 0, 0, 0, 0x40693978045014ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #12287 = VPSRADZ256rikz
{ 12288, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20097178005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12288 = VPSRADZ256rm
{ 12289, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20297178005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12289 = VPSRADZ256rmk
{ 12290, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20697178005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12290 = VPSRADZ256rmkz
{ 12291, 3, 1, 0, 0, 0, 0x20097178005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12291 = VPSRADZ256rr
{ 12292, 5, 1, 0, 0, 0, 0x20297178005005ULL, nullptr, nullptr, OperandInfo918, -1 ,nullptr }, // Inst #12292 = VPSRADZ256rrk
{ 12293, 4, 1, 0, 0, 0, 0x20697178005005ULL, nullptr, nullptr, OperandInfo919, -1 ,nullptr }, // Inst #12293 = VPSRADZ256rrkz
{ 12294, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x981397804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12294 = VPSRADZmbi
{ 12295, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a1397804501cULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #12295 = VPSRADZmbik
{ 12296, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e1397804501cULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #12296 = VPSRADZmbikz
{ 12297, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081397804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12297 = VPSRADZmi
{ 12298, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1397804501cULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #12298 = VPSRADZmik
{ 12299, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1397804501cULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #12299 = VPSRADZmikz
{ 12300, 3, 1, 0, 0, 0, 0x80813978045014ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12300 = VPSRADZri
{ 12301, 5, 1, 0, 0, 0, 0x80a13978045014ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #12301 = VPSRADZrik
{ 12302, 4, 1, 0, 0, 0, 0x80e13978045014ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #12302 = VPSRADZrikz
{ 12303, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20817178005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12303 = VPSRADZrm
{ 12304, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a17178005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12304 = VPSRADZrmk
{ 12305, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e17178005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12305 = VPSRADZrmkz
{ 12306, 3, 1, 0, 0, 0, 0x20817178005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12306 = VPSRADZrr
{ 12307, 5, 1, 0, 0, 0, 0x20a17178005005ULL, nullptr, nullptr, OperandInfo921, -1 ,nullptr }, // Inst #12307 = VPSRADZrrk
{ 12308, 4, 1, 0, 0, 0, 0x20e17178005005ULL, nullptr, nullptr, OperandInfo922, -1 ,nullptr }, // Inst #12308 = VPSRADZrrkz
{ 12309, 3, 1, 0, 435, 0, 0x13938045014ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12309 = VPSRADri
{ 12310, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x17138005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12310 = VPSRADrm
{ 12311, 3, 1, 0, 835, 0, 0x17138005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12311 = VPSRADrr
{ 12312, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101b97804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12312 = VPSRAQZ128mbi
{ 12313, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b97804501cULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #12313 = VPSRAQZ128mbik
{ 12314, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161b97804501cULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #12314 = VPSRAQZ128mbikz
{ 12315, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b97804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12315 = VPSRAQZ128mi
{ 12316, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b97804501cULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #12316 = VPSRAQZ128mik
{ 12317, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b97804501cULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #12317 = VPSRAQZ128mikz
{ 12318, 3, 1, 0, 0, 0, 0x2001b978045014ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12318 = VPSRAQZ128ri
{ 12319, 5, 1, 0, 0, 0, 0x2021b978045014ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #12319 = VPSRAQZ128rik
{ 12320, 4, 1, 0, 0, 0, 0x2061b978045014ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #12320 = VPSRAQZ128rikz
{ 12321, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001f178005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12321 = VPSRAQZ128rm
{ 12322, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021f178005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12322 = VPSRAQZ128rmk
{ 12323, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061f178005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12323 = VPSRAQZ128rmkz
{ 12324, 3, 1, 0, 0, 0, 0x2001f178005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12324 = VPSRAQZ128rr
{ 12325, 5, 1, 0, 0, 0, 0x2021f178005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #12325 = VPSRAQZ128rrk
{ 12326, 4, 1, 0, 0, 0, 0x2061f178005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #12326 = VPSRAQZ128rrkz
{ 12327, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109b97804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12327 = VPSRAQZ256mbi
{ 12328, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b97804501cULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #12328 = VPSRAQZ256mbik
{ 12329, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169b97804501cULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #12329 = VPSRAQZ256mbikz
{ 12330, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b97804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12330 = VPSRAQZ256mi
{ 12331, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b97804501cULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #12331 = VPSRAQZ256mik
{ 12332, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b97804501cULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #12332 = VPSRAQZ256mikz
{ 12333, 3, 1, 0, 0, 0, 0x4009b978045014ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12333 = VPSRAQZ256ri
{ 12334, 5, 1, 0, 0, 0, 0x4029b978045014ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #12334 = VPSRAQZ256rik
{ 12335, 4, 1, 0, 0, 0, 0x4069b978045014ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #12335 = VPSRAQZ256rikz
{ 12336, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2009f178005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12336 = VPSRAQZ256rm
{ 12337, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2029f178005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12337 = VPSRAQZ256rmk
{ 12338, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2069f178005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12338 = VPSRAQZ256rmkz
{ 12339, 3, 1, 0, 0, 0, 0x2009f178005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12339 = VPSRAQZ256rr
{ 12340, 5, 1, 0, 0, 0, 0x2029f178005005ULL, nullptr, nullptr, OperandInfo923, -1 ,nullptr }, // Inst #12340 = VPSRAQZ256rrk
{ 12341, 4, 1, 0, 0, 0, 0x2069f178005005ULL, nullptr, nullptr, OperandInfo924, -1 ,nullptr }, // Inst #12341 = VPSRAQZ256rrkz
{ 12342, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181b97804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12342 = VPSRAQZmbi
{ 12343, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b97804501cULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #12343 = VPSRAQZmbik
{ 12344, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1b97804501cULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #12344 = VPSRAQZmbikz
{ 12345, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b97804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12345 = VPSRAQZmi
{ 12346, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b97804501cULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #12346 = VPSRAQZmik
{ 12347, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b97804501cULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #12347 = VPSRAQZmikz
{ 12348, 3, 1, 0, 0, 0, 0x8081b978045014ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12348 = VPSRAQZri
{ 12349, 5, 1, 0, 0, 0, 0x80a1b978045014ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #12349 = VPSRAQZrik
{ 12350, 4, 1, 0, 0, 0, 0x80e1b978045014ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #12350 = VPSRAQZrikz
{ 12351, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2081f178005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12351 = VPSRAQZrm
{ 12352, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a1f178005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12352 = VPSRAQZrmk
{ 12353, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e1f178005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12353 = VPSRAQZrmkz
{ 12354, 3, 1, 0, 0, 0, 0x2081f178005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12354 = VPSRAQZrr
{ 12355, 5, 1, 0, 0, 0, 0x20a1f178005005ULL, nullptr, nullptr, OperandInfo925, -1 ,nullptr }, // Inst #12355 = VPSRAQZrrk
{ 12356, 4, 1, 0, 0, 0, 0x20e1f178005005ULL, nullptr, nullptr, OperandInfo926, -1 ,nullptr }, // Inst #12356 = VPSRAQZrrkz
{ 12357, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x92338009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12357 = VPSRAVDYrm
{ 12358, 3, 1, 0, 573, 0, 0x92338009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12358 = VPSRAVDYrr
{ 12359, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12359 = VPSRAVDZ128rm
{ 12360, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12360 = VPSRAVDZ128rmb
{ 12361, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212378009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12361 = VPSRAVDZ128rmbk
{ 12362, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612378009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12362 = VPSRAVDZ128rmbkz
{ 12363, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212378009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12363 = VPSRAVDZ128rmk
{ 12364, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612378009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12364 = VPSRAVDZ128rmkz
{ 12365, 3, 1, 0, 0, 0, 0x20012378009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12365 = VPSRAVDZ128rr
{ 12366, 5, 1, 0, 0, 0, 0x20212378009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #12366 = VPSRAVDZ128rrk
{ 12367, 4, 1, 0, 0, 0, 0x20612378009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #12367 = VPSRAVDZ128rrkz
{ 12368, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12368 = VPSRAVDZ256rm
{ 12369, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12369 = VPSRAVDZ256rmb
{ 12370, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292378009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12370 = VPSRAVDZ256rmbk
{ 12371, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692378009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12371 = VPSRAVDZ256rmbkz
{ 12372, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292378009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12372 = VPSRAVDZ256rmk
{ 12373, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692378009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12373 = VPSRAVDZ256rmkz
{ 12374, 3, 1, 0, 0, 0, 0x40092378009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12374 = VPSRAVDZ256rr
{ 12375, 5, 1, 0, 0, 0, 0x40292378009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #12375 = VPSRAVDZ256rrk
{ 12376, 4, 1, 0, 0, 0, 0x40692378009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #12376 = VPSRAVDZ256rrkz
{ 12377, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12377 = VPSRAVDZrm
{ 12378, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12378 = VPSRAVDZrmb
{ 12379, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12378009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12379 = VPSRAVDZrmbk
{ 12380, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12378009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12380 = VPSRAVDZrmbkz
{ 12381, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12378009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12381 = VPSRAVDZrmk
{ 12382, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12378009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12382 = VPSRAVDZrmkz
{ 12383, 3, 1, 0, 0, 0, 0x80812378009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12383 = VPSRAVDZrr
{ 12384, 5, 1, 0, 0, 0, 0x80a12378009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #12384 = VPSRAVDZrrk
{ 12385, 4, 1, 0, 0, 0, 0x80e12378009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #12385 = VPSRAVDZrrkz
{ 12386, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x12338009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12386 = VPSRAVDrm
{ 12387, 3, 1, 0, 573, 0, 0x12338009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12387 = VPSRAVDrr
{ 12388, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001a378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12388 = VPSRAVQZ128rm
{ 12389, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101a378009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12389 = VPSRAVQZ128rmb
{ 12390, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121a378009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12390 = VPSRAVQZ128rmbk
{ 12391, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161a378009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12391 = VPSRAVQZ128rmbkz
{ 12392, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021a378009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12392 = VPSRAVQZ128rmk
{ 12393, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061a378009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12393 = VPSRAVQZ128rmkz
{ 12394, 3, 1, 0, 0, 0, 0x2001a378009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12394 = VPSRAVQZ128rr
{ 12395, 5, 1, 0, 0, 0, 0x2021a378009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #12395 = VPSRAVQZ128rrk
{ 12396, 4, 1, 0, 0, 0, 0x2061a378009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #12396 = VPSRAVQZ128rrkz
{ 12397, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009a378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12397 = VPSRAVQZ256rm
{ 12398, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109a378009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12398 = VPSRAVQZ256rmb
{ 12399, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129a378009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12399 = VPSRAVQZ256rmbk
{ 12400, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169a378009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12400 = VPSRAVQZ256rmbkz
{ 12401, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029a378009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12401 = VPSRAVQZ256rmk
{ 12402, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069a378009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12402 = VPSRAVQZ256rmkz
{ 12403, 3, 1, 0, 0, 0, 0x4009a378009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12403 = VPSRAVQZ256rr
{ 12404, 5, 1, 0, 0, 0, 0x4029a378009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #12404 = VPSRAVQZ256rrk
{ 12405, 4, 1, 0, 0, 0, 0x4069a378009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #12405 = VPSRAVQZ256rrkz
{ 12406, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081a378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12406 = VPSRAVQZrm
{ 12407, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181a378009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12407 = VPSRAVQZrmb
{ 12408, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1a378009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12408 = VPSRAVQZrmbk
{ 12409, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1a378009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12409 = VPSRAVQZrmbkz
{ 12410, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1a378009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12410 = VPSRAVQZrmk
{ 12411, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1a378009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12411 = VPSRAVQZrmkz
{ 12412, 3, 1, 0, 0, 0, 0x8081a378009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12412 = VPSRAVQZrr
{ 12413, 5, 1, 0, 0, 0, 0x80a1a378009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #12413 = VPSRAVQZrrk
{ 12414, 4, 1, 0, 0, 0, 0x80e1a378009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #12414 = VPSRAVQZrrkz
{ 12415, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200188f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12415 = VPSRAVWZ128rm
{ 12416, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202188f8009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12416 = VPSRAVWZ128rmk
{ 12417, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206188f8009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12417 = VPSRAVWZ128rmkz
{ 12418, 3, 1, 0, 0, 0, 0x200188f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12418 = VPSRAVWZ128rr
{ 12419, 5, 1, 0, 0, 0, 0x202188f8009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12419 = VPSRAVWZ128rrk
{ 12420, 4, 1, 0, 0, 0, 0x206188f8009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12420 = VPSRAVWZ128rrkz
{ 12421, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400988f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12421 = VPSRAVWZ256rm
{ 12422, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402988f8009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12422 = VPSRAVWZ256rmk
{ 12423, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406988f8009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12423 = VPSRAVWZ256rmkz
{ 12424, 3, 1, 0, 0, 0, 0x400988f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12424 = VPSRAVWZ256rr
{ 12425, 5, 1, 0, 0, 0, 0x402988f8009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #12425 = VPSRAVWZ256rrk
{ 12426, 4, 1, 0, 0, 0, 0x406988f8009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #12426 = VPSRAVWZ256rrkz
{ 12427, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808188f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12427 = VPSRAVWZrm
{ 12428, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a188f8009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12428 = VPSRAVWZrmk
{ 12429, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e188f8009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12429 = VPSRAVWZrmkz
{ 12430, 3, 1, 0, 0, 0, 0x808188f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12430 = VPSRAVWZrr
{ 12431, 5, 1, 0, 0, 0, 0x80a188f8009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #12431 = VPSRAVWZrrk
{ 12432, 4, 1, 0, 0, 0, 0x80e188f8009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #12432 = VPSRAVWZrrkz
{ 12433, 3, 1, 0, 435, 0, 0x938b8045014ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12433 = VPSRAWYri
{ 12434, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x970b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12434 = VPSRAWYrm
{ 12435, 3, 1, 0, 835, 0, 0x970b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr }, // Inst #12435 = VPSRAWYrr
{ 12436, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200138f804501cULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12436 = VPSRAWZ128mi
{ 12437, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202138f804501cULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr }, // Inst #12437 = VPSRAWZ128mik
{ 12438, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206138f804501cULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr }, // Inst #12438 = VPSRAWZ128mikz
{ 12439, 3, 1, 0, 0, 0, 0x200138f8045014ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12439 = VPSRAWZ128ri
{ 12440, 5, 1, 0, 0, 0, 0x202138f8045014ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr }, // Inst #12440 = VPSRAWZ128rik
{ 12441, 4, 1, 0, 0, 0, 0x206138f8045014ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr }, // Inst #12441 = VPSRAWZ128rikz
{ 12442, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200170f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12442 = VPSRAWZ128rm
{ 12443, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202170f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12443 = VPSRAWZ128rmk
{ 12444, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206170f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12444 = VPSRAWZ128rmkz
{ 12445, 3, 1, 0, 0, 0, 0x200170f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12445 = VPSRAWZ128rr
{ 12446, 5, 1, 0, 0, 0, 0x202170f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12446 = VPSRAWZ128rrk
{ 12447, 4, 1, 0, 0, 0, 0x206170f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12447 = VPSRAWZ128rrkz
{ 12448, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400938f804501cULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12448 = VPSRAWZ256mi
{ 12449, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402938f804501cULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr }, // Inst #12449 = VPSRAWZ256mik
{ 12450, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406938f804501cULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr }, // Inst #12450 = VPSRAWZ256mikz
{ 12451, 3, 1, 0, 0, 0, 0x400938f8045014ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12451 = VPSRAWZ256ri
{ 12452, 5, 1, 0, 0, 0, 0x402938f8045014ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr }, // Inst #12452 = VPSRAWZ256rik
{ 12453, 4, 1, 0, 0, 0, 0x406938f8045014ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr }, // Inst #12453 = VPSRAWZ256rikz
{ 12454, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200970f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12454 = VPSRAWZ256rm
{ 12455, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202970f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12455 = VPSRAWZ256rmk
{ 12456, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206970f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12456 = VPSRAWZ256rmkz
{ 12457, 3, 1, 0, 0, 0, 0x200970f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12457 = VPSRAWZ256rr
{ 12458, 5, 1, 0, 0, 0, 0x202970f8005005ULL, nullptr, nullptr, OperandInfo927, -1 ,nullptr }, // Inst #12458 = VPSRAWZ256rrk
{ 12459, 4, 1, 0, 0, 0, 0x206970f8005005ULL, nullptr, nullptr, OperandInfo928, -1 ,nullptr }, // Inst #12459 = VPSRAWZ256rrkz
{ 12460, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808138f804501cULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12460 = VPSRAWZmi
{ 12461, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a138f804501cULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr }, // Inst #12461 = VPSRAWZmik
{ 12462, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e138f804501cULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr }, // Inst #12462 = VPSRAWZmikz
{ 12463, 3, 1, 0, 0, 0, 0x808138f8045014ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12463 = VPSRAWZri
{ 12464, 5, 1, 0, 0, 0, 0x80a138f8045014ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr }, // Inst #12464 = VPSRAWZrik
{ 12465, 4, 1, 0, 0, 0, 0x80e138f8045014ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr }, // Inst #12465 = VPSRAWZrikz
{ 12466, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x208170f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12466 = VPSRAWZrm
{ 12467, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a170f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12467 = VPSRAWZrmk
{ 12468, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e170f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12468 = VPSRAWZrmkz
{ 12469, 3, 1, 0, 0, 0, 0x208170f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12469 = VPSRAWZrr
{ 12470, 5, 1, 0, 0, 0, 0x20a170f8005005ULL, nullptr, nullptr, OperandInfo929, -1 ,nullptr }, // Inst #12470 = VPSRAWZrrk
{ 12471, 4, 1, 0, 0, 0, 0x20e170f8005005ULL, nullptr, nullptr, OperandInfo930, -1 ,nullptr }, // Inst #12471 = VPSRAWZrrkz
{ 12472, 3, 1, 0, 435, 0, 0x138b8045014ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12472 = VPSRAWri
{ 12473, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x170b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12473 = VPSRAWrm
{ 12474, 3, 1, 0, 835, 0, 0x170b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12474 = VPSRAWrr
{ 12475, 3, 1, 0, 837, 0, 0x939b8045013ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12475 = VPSRLDQYri
{ 12476, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200139f004501bULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12476 = VPSRLDQZ128rm
{ 12477, 3, 1, 0, 0, 0, 0x200139f0045013ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12477 = VPSRLDQZ128rr
{ 12478, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400939f004501bULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12478 = VPSRLDQZ256rm
{ 12479, 3, 1, 0, 0, 0, 0x400939f0045013ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12479 = VPSRLDQZ256rr
{ 12480, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808139f004501bULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12480 = VPSRLDQZ512rm
{ 12481, 3, 1, 0, 0, 0, 0x808139f0045013ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12481 = VPSRLDQZ512rr
{ 12482, 3, 1, 0, 837, 0, 0x139b8045013ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12482 = VPSRLDQri
{ 12483, 3, 1, 0, 435, 0, 0x93938045012ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12483 = VPSRLDYri
{ 12484, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x96938005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12484 = VPSRLDYrm
{ 12485, 3, 1, 0, 835, 0, 0x96938005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr }, // Inst #12485 = VPSRLDYrr
{ 12486, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x901397804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12486 = VPSRLDZ128mbi
{ 12487, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x921397804501aULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #12487 = VPSRLDZ128mbik
{ 12488, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x961397804501aULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #12488 = VPSRLDZ128mbikz
{ 12489, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001397804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12489 = VPSRLDZ128mi
{ 12490, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021397804501aULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #12490 = VPSRLDZ128mik
{ 12491, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061397804501aULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #12491 = VPSRLDZ128mikz
{ 12492, 3, 1, 0, 0, 0, 0x20013978045012ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12492 = VPSRLDZ128ri
{ 12493, 5, 1, 0, 0, 0, 0x20213978045012ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #12493 = VPSRLDZ128rik
{ 12494, 4, 1, 0, 0, 0, 0x20613978045012ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #12494 = VPSRLDZ128rikz
{ 12495, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016978005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12495 = VPSRLDZ128rm
{ 12496, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216978005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12496 = VPSRLDZ128rmk
{ 12497, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616978005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12497 = VPSRLDZ128rmkz
{ 12498, 3, 1, 0, 0, 0, 0x20016978005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12498 = VPSRLDZ128rr
{ 12499, 5, 1, 0, 0, 0, 0x20216978005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #12499 = VPSRLDZ128rrk
{ 12500, 4, 1, 0, 0, 0, 0x20616978005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #12500 = VPSRLDZ128rrkz
{ 12501, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x909397804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12501 = VPSRLDZ256mbi
{ 12502, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x929397804501aULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #12502 = VPSRLDZ256mbik
{ 12503, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x969397804501aULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #12503 = VPSRLDZ256mbikz
{ 12504, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009397804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12504 = VPSRLDZ256mi
{ 12505, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029397804501aULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #12505 = VPSRLDZ256mik
{ 12506, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069397804501aULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #12506 = VPSRLDZ256mikz
{ 12507, 3, 1, 0, 0, 0, 0x40093978045012ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12507 = VPSRLDZ256ri
{ 12508, 5, 1, 0, 0, 0, 0x40293978045012ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #12508 = VPSRLDZ256rik
{ 12509, 4, 1, 0, 0, 0, 0x40693978045012ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #12509 = VPSRLDZ256rikz
{ 12510, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20096978005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12510 = VPSRLDZ256rm
{ 12511, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20296978005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12511 = VPSRLDZ256rmk
{ 12512, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20696978005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12512 = VPSRLDZ256rmkz
{ 12513, 3, 1, 0, 0, 0, 0x20096978005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12513 = VPSRLDZ256rr
{ 12514, 5, 1, 0, 0, 0, 0x20296978005005ULL, nullptr, nullptr, OperandInfo918, -1 ,nullptr }, // Inst #12514 = VPSRLDZ256rrk
{ 12515, 4, 1, 0, 0, 0, 0x20696978005005ULL, nullptr, nullptr, OperandInfo919, -1 ,nullptr }, // Inst #12515 = VPSRLDZ256rrkz
{ 12516, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x981397804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12516 = VPSRLDZmbi
{ 12517, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a1397804501aULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #12517 = VPSRLDZmbik
{ 12518, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e1397804501aULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #12518 = VPSRLDZmbikz
{ 12519, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081397804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12519 = VPSRLDZmi
{ 12520, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1397804501aULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #12520 = VPSRLDZmik
{ 12521, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1397804501aULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #12521 = VPSRLDZmikz
{ 12522, 3, 1, 0, 0, 0, 0x80813978045012ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12522 = VPSRLDZri
{ 12523, 5, 1, 0, 0, 0, 0x80a13978045012ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #12523 = VPSRLDZrik
{ 12524, 4, 1, 0, 0, 0, 0x80e13978045012ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #12524 = VPSRLDZrikz
{ 12525, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20816978005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12525 = VPSRLDZrm
{ 12526, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a16978005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12526 = VPSRLDZrmk
{ 12527, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e16978005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12527 = VPSRLDZrmkz
{ 12528, 3, 1, 0, 0, 0, 0x20816978005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12528 = VPSRLDZrr
{ 12529, 5, 1, 0, 0, 0, 0x20a16978005005ULL, nullptr, nullptr, OperandInfo921, -1 ,nullptr }, // Inst #12529 = VPSRLDZrrk
{ 12530, 4, 1, 0, 0, 0, 0x20e16978005005ULL, nullptr, nullptr, OperandInfo922, -1 ,nullptr }, // Inst #12530 = VPSRLDZrrkz
{ 12531, 3, 1, 0, 435, 0, 0x13938045012ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12531 = VPSRLDri
{ 12532, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x16938005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12532 = VPSRLDrm
{ 12533, 3, 1, 0, 835, 0, 0x16938005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12533 = VPSRLDrr
{ 12534, 3, 1, 0, 435, 0, 0x939b8045012ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12534 = VPSRLQYri
{ 12535, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x969b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12535 = VPSRLQYrm
{ 12536, 3, 1, 0, 835, 0, 0x969b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr }, // Inst #12536 = VPSRLQYrr
{ 12537, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101b9f804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12537 = VPSRLQZ128mbi
{ 12538, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b9f804501aULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #12538 = VPSRLQZ128mbik
{ 12539, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161b9f804501aULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #12539 = VPSRLQZ128mbikz
{ 12540, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b9f804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12540 = VPSRLQZ128mi
{ 12541, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b9f804501aULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #12541 = VPSRLQZ128mik
{ 12542, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b9f804501aULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #12542 = VPSRLQZ128mikz
{ 12543, 3, 1, 0, 0, 0, 0x2001b9f8045012ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12543 = VPSRLQZ128ri
{ 12544, 5, 1, 0, 0, 0, 0x2021b9f8045012ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #12544 = VPSRLQZ128rik
{ 12545, 4, 1, 0, 0, 0, 0x2061b9f8045012ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #12545 = VPSRLQZ128rikz
{ 12546, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001e9f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12546 = VPSRLQZ128rm
{ 12547, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021e9f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12547 = VPSRLQZ128rmk
{ 12548, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061e9f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12548 = VPSRLQZ128rmkz
{ 12549, 3, 1, 0, 0, 0, 0x2001e9f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12549 = VPSRLQZ128rr
{ 12550, 5, 1, 0, 0, 0, 0x2021e9f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #12550 = VPSRLQZ128rrk
{ 12551, 4, 1, 0, 0, 0, 0x2061e9f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #12551 = VPSRLQZ128rrkz
{ 12552, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109b9f804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12552 = VPSRLQZ256mbi
{ 12553, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b9f804501aULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #12553 = VPSRLQZ256mbik
{ 12554, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169b9f804501aULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #12554 = VPSRLQZ256mbikz
{ 12555, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b9f804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12555 = VPSRLQZ256mi
{ 12556, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b9f804501aULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #12556 = VPSRLQZ256mik
{ 12557, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b9f804501aULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #12557 = VPSRLQZ256mikz
{ 12558, 3, 1, 0, 0, 0, 0x4009b9f8045012ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12558 = VPSRLQZ256ri
{ 12559, 5, 1, 0, 0, 0, 0x4029b9f8045012ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #12559 = VPSRLQZ256rik
{ 12560, 4, 1, 0, 0, 0, 0x4069b9f8045012ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #12560 = VPSRLQZ256rikz
{ 12561, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2009e9f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12561 = VPSRLQZ256rm
{ 12562, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2029e9f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12562 = VPSRLQZ256rmk
{ 12563, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2069e9f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12563 = VPSRLQZ256rmkz
{ 12564, 3, 1, 0, 0, 0, 0x2009e9f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12564 = VPSRLQZ256rr
{ 12565, 5, 1, 0, 0, 0, 0x2029e9f8005005ULL, nullptr, nullptr, OperandInfo923, -1 ,nullptr }, // Inst #12565 = VPSRLQZ256rrk
{ 12566, 4, 1, 0, 0, 0, 0x2069e9f8005005ULL, nullptr, nullptr, OperandInfo924, -1 ,nullptr }, // Inst #12566 = VPSRLQZ256rrkz
{ 12567, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181b9f804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12567 = VPSRLQZmbi
{ 12568, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b9f804501aULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #12568 = VPSRLQZmbik
{ 12569, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1b9f804501aULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #12569 = VPSRLQZmbikz
{ 12570, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b9f804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12570 = VPSRLQZmi
{ 12571, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b9f804501aULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #12571 = VPSRLQZmik
{ 12572, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b9f804501aULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #12572 = VPSRLQZmikz
{ 12573, 3, 1, 0, 0, 0, 0x8081b9f8045012ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12573 = VPSRLQZri
{ 12574, 5, 1, 0, 0, 0, 0x80a1b9f8045012ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #12574 = VPSRLQZrik
{ 12575, 4, 1, 0, 0, 0, 0x80e1b9f8045012ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #12575 = VPSRLQZrikz
{ 12576, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2081e9f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12576 = VPSRLQZrm
{ 12577, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a1e9f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12577 = VPSRLQZrmk
{ 12578, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e1e9f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12578 = VPSRLQZrmkz
{ 12579, 3, 1, 0, 0, 0, 0x2081e9f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12579 = VPSRLQZrr
{ 12580, 5, 1, 0, 0, 0, 0x20a1e9f8005005ULL, nullptr, nullptr, OperandInfo925, -1 ,nullptr }, // Inst #12580 = VPSRLQZrrk
{ 12581, 4, 1, 0, 0, 0, 0x20e1e9f8005005ULL, nullptr, nullptr, OperandInfo926, -1 ,nullptr }, // Inst #12581 = VPSRLQZrrkz
{ 12582, 3, 1, 0, 435, 0, 0x139b8045012ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12582 = VPSRLQri
{ 12583, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x169b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12583 = VPSRLQrm
{ 12584, 3, 1, 0, 835, 0, 0x169b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12584 = VPSRLQrr
{ 12585, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x922b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12585 = VPSRLVDYrm
{ 12586, 3, 1, 0, 573, 0, 0x922b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12586 = VPSRLVDYrr
{ 12587, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200122f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12587 = VPSRLVDZ128rm
{ 12588, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90122f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12588 = VPSRLVDZ128rmb
{ 12589, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92122f8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12589 = VPSRLVDZ128rmbk
{ 12590, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96122f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12590 = VPSRLVDZ128rmbkz
{ 12591, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202122f8009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12591 = VPSRLVDZ128rmk
{ 12592, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206122f8009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12592 = VPSRLVDZ128rmkz
{ 12593, 3, 1, 0, 0, 0, 0x200122f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12593 = VPSRLVDZ128rr
{ 12594, 5, 1, 0, 0, 0, 0x202122f8009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #12594 = VPSRLVDZ128rrk
{ 12595, 4, 1, 0, 0, 0, 0x206122f8009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #12595 = VPSRLVDZ128rrkz
{ 12596, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400922f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12596 = VPSRLVDZ256rm
{ 12597, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90922f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12597 = VPSRLVDZ256rmb
{ 12598, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92922f8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12598 = VPSRLVDZ256rmbk
{ 12599, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96922f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12599 = VPSRLVDZ256rmbkz
{ 12600, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402922f8009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12600 = VPSRLVDZ256rmk
{ 12601, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406922f8009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12601 = VPSRLVDZ256rmkz
{ 12602, 3, 1, 0, 0, 0, 0x400922f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12602 = VPSRLVDZ256rr
{ 12603, 5, 1, 0, 0, 0, 0x402922f8009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #12603 = VPSRLVDZ256rrk
{ 12604, 4, 1, 0, 0, 0, 0x406922f8009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #12604 = VPSRLVDZ256rrkz
{ 12605, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808122f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12605 = VPSRLVDZrm
{ 12606, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98122f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12606 = VPSRLVDZrmb
{ 12607, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a122f8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12607 = VPSRLVDZrmbk
{ 12608, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e122f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12608 = VPSRLVDZrmbkz
{ 12609, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a122f8009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12609 = VPSRLVDZrmk
{ 12610, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e122f8009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12610 = VPSRLVDZrmkz
{ 12611, 3, 1, 0, 0, 0, 0x808122f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12611 = VPSRLVDZrr
{ 12612, 5, 1, 0, 0, 0, 0x80a122f8009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #12612 = VPSRLVDZrrk
{ 12613, 4, 1, 0, 0, 0, 0x80e122f8009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #12613 = VPSRLVDZrrkz
{ 12614, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x122b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12614 = VPSRLVDrm
{ 12615, 3, 1, 0, 573, 0, 0x122b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12615 = VPSRLVDrr
{ 12616, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x9a2b8009006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12616 = VPSRLVQYrm
{ 12617, 3, 1, 0, 573, 0, 0x9a2b8009005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12617 = VPSRLVQYrr
{ 12618, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001a2f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12618 = VPSRLVQZ128rm
{ 12619, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101a2f8009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12619 = VPSRLVQZ128rmb
{ 12620, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121a2f8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12620 = VPSRLVQZ128rmbk
{ 12621, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161a2f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12621 = VPSRLVQZ128rmbkz
{ 12622, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021a2f8009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12622 = VPSRLVQZ128rmk
{ 12623, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061a2f8009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12623 = VPSRLVQZ128rmkz
{ 12624, 3, 1, 0, 0, 0, 0x2001a2f8009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12624 = VPSRLVQZ128rr
{ 12625, 5, 1, 0, 0, 0, 0x2021a2f8009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #12625 = VPSRLVQZ128rrk
{ 12626, 4, 1, 0, 0, 0, 0x2061a2f8009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #12626 = VPSRLVQZ128rrkz
{ 12627, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009a2f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12627 = VPSRLVQZ256rm
{ 12628, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109a2f8009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12628 = VPSRLVQZ256rmb
{ 12629, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129a2f8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12629 = VPSRLVQZ256rmbk
{ 12630, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169a2f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12630 = VPSRLVQZ256rmbkz
{ 12631, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029a2f8009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12631 = VPSRLVQZ256rmk
{ 12632, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069a2f8009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12632 = VPSRLVQZ256rmkz
{ 12633, 3, 1, 0, 0, 0, 0x4009a2f8009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12633 = VPSRLVQZ256rr
{ 12634, 5, 1, 0, 0, 0, 0x4029a2f8009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #12634 = VPSRLVQZ256rrk
{ 12635, 4, 1, 0, 0, 0, 0x4069a2f8009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #12635 = VPSRLVQZ256rrkz
{ 12636, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081a2f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12636 = VPSRLVQZrm
{ 12637, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181a2f8009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12637 = VPSRLVQZrmb
{ 12638, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1a2f8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12638 = VPSRLVQZrmbk
{ 12639, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1a2f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12639 = VPSRLVQZrmbkz
{ 12640, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1a2f8009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12640 = VPSRLVQZrmk
{ 12641, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1a2f8009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12641 = VPSRLVQZrmkz
{ 12642, 3, 1, 0, 0, 0, 0x8081a2f8009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12642 = VPSRLVQZrr
{ 12643, 5, 1, 0, 0, 0, 0x80a1a2f8009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #12643 = VPSRLVQZrrk
{ 12644, 4, 1, 0, 0, 0, 0x80e1a2f8009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #12644 = VPSRLVQZrrkz
{ 12645, 7, 1, 0, 576, 0|(1ULL<<MCID::MayLoad), 0x1a2b8009006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12645 = VPSRLVQrm
{ 12646, 3, 1, 0, 573, 0, 0x1a2b8009005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12646 = VPSRLVQrr
{ 12647, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20018878009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12647 = VPSRLVWZ128rm
{ 12648, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20218878009006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12648 = VPSRLVWZ128rmk
{ 12649, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20618878009006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12649 = VPSRLVWZ128rmkz
{ 12650, 3, 1, 0, 0, 0, 0x20018878009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12650 = VPSRLVWZ128rr
{ 12651, 5, 1, 0, 0, 0, 0x20218878009005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12651 = VPSRLVWZ128rrk
{ 12652, 4, 1, 0, 0, 0, 0x20618878009005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12652 = VPSRLVWZ128rrkz
{ 12653, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40098878009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12653 = VPSRLVWZ256rm
{ 12654, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40298878009006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12654 = VPSRLVWZ256rmk
{ 12655, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40698878009006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12655 = VPSRLVWZ256rmkz
{ 12656, 3, 1, 0, 0, 0, 0x40098878009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12656 = VPSRLVWZ256rr
{ 12657, 5, 1, 0, 0, 0, 0x40298878009005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #12657 = VPSRLVWZ256rrk
{ 12658, 4, 1, 0, 0, 0, 0x40698878009005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #12658 = VPSRLVWZ256rrkz
{ 12659, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80818878009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12659 = VPSRLVWZrm
{ 12660, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a18878009006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12660 = VPSRLVWZrmk
{ 12661, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e18878009006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12661 = VPSRLVWZrmkz
{ 12662, 3, 1, 0, 0, 0, 0x80818878009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12662 = VPSRLVWZrr
{ 12663, 5, 1, 0, 0, 0, 0x80a18878009005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #12663 = VPSRLVWZrrk
{ 12664, 4, 1, 0, 0, 0, 0x80e18878009005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #12664 = VPSRLVWZrrkz
{ 12665, 3, 1, 0, 435, 0, 0x938b8045012ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #12665 = VPSRLWYri
{ 12666, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x968b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12666 = VPSRLWYrm
{ 12667, 3, 1, 0, 835, 0, 0x968b8005005ULL, nullptr, nullptr, OperandInfo916, -1 ,nullptr }, // Inst #12667 = VPSRLWYrr
{ 12668, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200138f804501aULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #12668 = VPSRLWZ128mi
{ 12669, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202138f804501aULL, nullptr, nullptr, OperandInfo906, -1 ,nullptr }, // Inst #12669 = VPSRLWZ128mik
{ 12670, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206138f804501aULL, nullptr, nullptr, OperandInfo907, -1 ,nullptr }, // Inst #12670 = VPSRLWZ128mikz
{ 12671, 3, 1, 0, 0, 0, 0x200138f8045012ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #12671 = VPSRLWZ128ri
{ 12672, 5, 1, 0, 0, 0, 0x202138f8045012ULL, nullptr, nullptr, OperandInfo469, -1 ,nullptr }, // Inst #12672 = VPSRLWZ128rik
{ 12673, 4, 1, 0, 0, 0, 0x206138f8045012ULL, nullptr, nullptr, OperandInfo470, -1 ,nullptr }, // Inst #12673 = VPSRLWZ128rikz
{ 12674, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200168f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12674 = VPSRLWZ128rm
{ 12675, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202168f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12675 = VPSRLWZ128rmk
{ 12676, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206168f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12676 = VPSRLWZ128rmkz
{ 12677, 3, 1, 0, 0, 0, 0x200168f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12677 = VPSRLWZ128rr
{ 12678, 5, 1, 0, 0, 0, 0x202168f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12678 = VPSRLWZ128rrk
{ 12679, 4, 1, 0, 0, 0, 0x206168f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12679 = VPSRLWZ128rrkz
{ 12680, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400938f804501aULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #12680 = VPSRLWZ256mi
{ 12681, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402938f804501aULL, nullptr, nullptr, OperandInfo908, -1 ,nullptr }, // Inst #12681 = VPSRLWZ256mik
{ 12682, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406938f804501aULL, nullptr, nullptr, OperandInfo909, -1 ,nullptr }, // Inst #12682 = VPSRLWZ256mikz
{ 12683, 3, 1, 0, 0, 0, 0x400938f8045012ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #12683 = VPSRLWZ256ri
{ 12684, 5, 1, 0, 0, 0, 0x402938f8045012ULL, nullptr, nullptr, OperandInfo910, -1 ,nullptr }, // Inst #12684 = VPSRLWZ256rik
{ 12685, 4, 1, 0, 0, 0, 0x406938f8045012ULL, nullptr, nullptr, OperandInfo911, -1 ,nullptr }, // Inst #12685 = VPSRLWZ256rikz
{ 12686, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200968f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12686 = VPSRLWZ256rm
{ 12687, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202968f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12687 = VPSRLWZ256rmk
{ 12688, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206968f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12688 = VPSRLWZ256rmkz
{ 12689, 3, 1, 0, 0, 0, 0x200968f8005005ULL, nullptr, nullptr, OperandInfo917, -1 ,nullptr }, // Inst #12689 = VPSRLWZ256rr
{ 12690, 5, 1, 0, 0, 0, 0x202968f8005005ULL, nullptr, nullptr, OperandInfo927, -1 ,nullptr }, // Inst #12690 = VPSRLWZ256rrk
{ 12691, 4, 1, 0, 0, 0, 0x206968f8005005ULL, nullptr, nullptr, OperandInfo928, -1 ,nullptr }, // Inst #12691 = VPSRLWZ256rrkz
{ 12692, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808138f804501aULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #12692 = VPSRLWZmi
{ 12693, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a138f804501aULL, nullptr, nullptr, OperandInfo912, -1 ,nullptr }, // Inst #12693 = VPSRLWZmik
{ 12694, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e138f804501aULL, nullptr, nullptr, OperandInfo913, -1 ,nullptr }, // Inst #12694 = VPSRLWZmikz
{ 12695, 3, 1, 0, 0, 0, 0x808138f8045012ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #12695 = VPSRLWZri
{ 12696, 5, 1, 0, 0, 0, 0x80a138f8045012ULL, nullptr, nullptr, OperandInfo914, -1 ,nullptr }, // Inst #12696 = VPSRLWZrik
{ 12697, 4, 1, 0, 0, 0, 0x80e138f8045012ULL, nullptr, nullptr, OperandInfo915, -1 ,nullptr }, // Inst #12697 = VPSRLWZrikz
{ 12698, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x208168f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12698 = VPSRLWZrm
{ 12699, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20a168f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12699 = VPSRLWZrmk
{ 12700, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20e168f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12700 = VPSRLWZrmkz
{ 12701, 3, 1, 0, 0, 0, 0x208168f8005005ULL, nullptr, nullptr, OperandInfo920, -1 ,nullptr }, // Inst #12701 = VPSRLWZrr
{ 12702, 5, 1, 0, 0, 0, 0x20a168f8005005ULL, nullptr, nullptr, OperandInfo929, -1 ,nullptr }, // Inst #12702 = VPSRLWZrrk
{ 12703, 4, 1, 0, 0, 0, 0x20e168f8005005ULL, nullptr, nullptr, OperandInfo930, -1 ,nullptr }, // Inst #12703 = VPSRLWZrrkz
{ 12704, 3, 1, 0, 435, 0, 0x138b8045012ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #12704 = VPSRLWri
{ 12705, 7, 1, 0, 436, 0|(1ULL<<MCID::MayLoad), 0x168b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12705 = VPSRLWrm
{ 12706, 3, 1, 0, 835, 0, 0x168b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12706 = VPSRLWrr
{ 12707, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97c38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12707 = VPSUBBYrm
{ 12708, 3, 1, 0, 377, 0, 0x97c38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12708 = VPSUBBYrr
{ 12709, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017c78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12709 = VPSUBBZ128rm
{ 12710, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217c78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #12710 = VPSUBBZ128rmk
{ 12711, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617c78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #12711 = VPSUBBZ128rmkz
{ 12712, 3, 1, 0, 0, 0, 0x20017c78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12712 = VPSUBBZ128rr
{ 12713, 5, 1, 0, 0, 0, 0x20217c78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #12713 = VPSUBBZ128rrk
{ 12714, 4, 1, 0, 0, 0, 0x20617c78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #12714 = VPSUBBZ128rrkz
{ 12715, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097c78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12715 = VPSUBBZ256rm
{ 12716, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297c78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #12716 = VPSUBBZ256rmk
{ 12717, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697c78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #12717 = VPSUBBZ256rmkz
{ 12718, 3, 1, 0, 0, 0, 0x40097c78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12718 = VPSUBBZ256rr
{ 12719, 5, 1, 0, 0, 0, 0x40297c78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #12719 = VPSUBBZ256rrk
{ 12720, 4, 1, 0, 0, 0, 0x40697c78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #12720 = VPSUBBZ256rrkz
{ 12721, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817c78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12721 = VPSUBBZrm
{ 12722, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17c78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #12722 = VPSUBBZrmk
{ 12723, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17c78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #12723 = VPSUBBZrmkz
{ 12724, 3, 1, 0, 0, 0, 0x80817c78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12724 = VPSUBBZrr
{ 12725, 5, 1, 0, 0, 0, 0x80a17c78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #12725 = VPSUBBZrrk
{ 12726, 4, 1, 0, 0, 0, 0x80e17c78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #12726 = VPSUBBZrrkz
{ 12727, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17c38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12727 = VPSUBBrm
{ 12728, 3, 1, 0, 377, 0, 0x17c38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12728 = VPSUBBrr
{ 12729, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97d38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12729 = VPSUBDYrm
{ 12730, 3, 1, 0, 377, 0, 0x97d38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12730 = VPSUBDYrr
{ 12731, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017d78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12731 = VPSUBDZ128rm
{ 12732, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9017d78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12732 = VPSUBDZ128rmb
{ 12733, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9217d78005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12733 = VPSUBDZ128rmbk
{ 12734, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9617d78005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12734 = VPSUBDZ128rmbkz
{ 12735, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217d78005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #12735 = VPSUBDZ128rmk
{ 12736, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617d78005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #12736 = VPSUBDZ128rmkz
{ 12737, 3, 1, 0, 0, 0, 0x20017d78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12737 = VPSUBDZ128rr
{ 12738, 5, 1, 0, 0, 0, 0x20217d78005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #12738 = VPSUBDZ128rrk
{ 12739, 4, 1, 0, 0, 0, 0x20617d78005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #12739 = VPSUBDZ128rrkz
{ 12740, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097d78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12740 = VPSUBDZ256rm
{ 12741, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9097d78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12741 = VPSUBDZ256rmb
{ 12742, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9297d78005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12742 = VPSUBDZ256rmbk
{ 12743, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9697d78005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12743 = VPSUBDZ256rmbkz
{ 12744, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297d78005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #12744 = VPSUBDZ256rmk
{ 12745, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697d78005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #12745 = VPSUBDZ256rmkz
{ 12746, 3, 1, 0, 0, 0, 0x40097d78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12746 = VPSUBDZ256rr
{ 12747, 5, 1, 0, 0, 0, 0x40297d78005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #12747 = VPSUBDZ256rrk
{ 12748, 4, 1, 0, 0, 0, 0x40697d78005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #12748 = VPSUBDZ256rrkz
{ 12749, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817d78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12749 = VPSUBDZrm
{ 12750, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9817d78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12750 = VPSUBDZrmb
{ 12751, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a17d78005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12751 = VPSUBDZrmbk
{ 12752, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e17d78005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12752 = VPSUBDZrmbkz
{ 12753, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17d78005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #12753 = VPSUBDZrmk
{ 12754, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17d78005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #12754 = VPSUBDZrmkz
{ 12755, 3, 1, 0, 0, 0, 0x80817d78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12755 = VPSUBDZrr
{ 12756, 5, 1, 0, 0, 0, 0x80a17d78005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #12756 = VPSUBDZrrk
{ 12757, 4, 1, 0, 0, 0, 0x80e17d78005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #12757 = VPSUBDZrrkz
{ 12758, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17d38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12758 = VPSUBDrm
{ 12759, 3, 1, 0, 377, 0, 0x17d38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12759 = VPSUBDrr
{ 12760, 7, 1, 0, 378, 0|(1ULL<<MCID::MayLoad), 0x97db8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12760 = VPSUBQYrm
{ 12761, 3, 1, 0, 379, 0, 0x97db8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12761 = VPSUBQYrr
{ 12762, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001fdf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12762 = VPSUBQZ128rm
{ 12763, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101fdf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12763 = VPSUBQZ128rmb
{ 12764, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121fdf8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12764 = VPSUBQZ128rmbk
{ 12765, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161fdf8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12765 = VPSUBQZ128rmbkz
{ 12766, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021fdf8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #12766 = VPSUBQZ128rmk
{ 12767, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061fdf8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #12767 = VPSUBQZ128rmkz
{ 12768, 3, 1, 0, 0, 0, 0x2001fdf8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12768 = VPSUBQZ128rr
{ 12769, 5, 1, 0, 0, 0, 0x2021fdf8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #12769 = VPSUBQZ128rrk
{ 12770, 4, 1, 0, 0, 0, 0x2061fdf8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #12770 = VPSUBQZ128rrkz
{ 12771, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009fdf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12771 = VPSUBQZ256rm
{ 12772, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109fdf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12772 = VPSUBQZ256rmb
{ 12773, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129fdf8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12773 = VPSUBQZ256rmbk
{ 12774, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169fdf8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12774 = VPSUBQZ256rmbkz
{ 12775, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029fdf8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #12775 = VPSUBQZ256rmk
{ 12776, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069fdf8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #12776 = VPSUBQZ256rmkz
{ 12777, 3, 1, 0, 0, 0, 0x4009fdf8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12777 = VPSUBQZ256rr
{ 12778, 5, 1, 0, 0, 0, 0x4029fdf8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #12778 = VPSUBQZ256rrk
{ 12779, 4, 1, 0, 0, 0, 0x4069fdf8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #12779 = VPSUBQZ256rrkz
{ 12780, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081fdf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12780 = VPSUBQZrm
{ 12781, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181fdf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12781 = VPSUBQZrmb
{ 12782, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1fdf8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12782 = VPSUBQZrmbk
{ 12783, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1fdf8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12783 = VPSUBQZrmbkz
{ 12784, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1fdf8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #12784 = VPSUBQZrmk
{ 12785, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1fdf8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #12785 = VPSUBQZrmkz
{ 12786, 3, 1, 0, 0, 0, 0x8081fdf8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12786 = VPSUBQZrr
{ 12787, 5, 1, 0, 0, 0, 0x80a1fdf8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #12787 = VPSUBQZrrk
{ 12788, 4, 1, 0, 0, 0, 0x80e1fdf8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #12788 = VPSUBQZrrkz
{ 12789, 7, 1, 0, 378, 0|(1ULL<<MCID::MayLoad), 0x17db8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12789 = VPSUBQrm
{ 12790, 3, 1, 0, 379, 0, 0x17db8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12790 = VPSUBQrr
{ 12791, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97438005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12791 = VPSUBSBYrm
{ 12792, 3, 1, 0, 377, 0, 0x97438005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12792 = VPSUBSBYrr
{ 12793, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017478005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12793 = VPSUBSBZ128rm
{ 12794, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217478005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #12794 = VPSUBSBZ128rmk
{ 12795, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617478005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #12795 = VPSUBSBZ128rmkz
{ 12796, 3, 1, 0, 0, 0, 0x20017478005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12796 = VPSUBSBZ128rr
{ 12797, 5, 1, 0, 0, 0, 0x20217478005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #12797 = VPSUBSBZ128rrk
{ 12798, 4, 1, 0, 0, 0, 0x20617478005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #12798 = VPSUBSBZ128rrkz
{ 12799, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097478005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12799 = VPSUBSBZ256rm
{ 12800, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297478005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #12800 = VPSUBSBZ256rmk
{ 12801, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697478005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #12801 = VPSUBSBZ256rmkz
{ 12802, 3, 1, 0, 0, 0, 0x40097478005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12802 = VPSUBSBZ256rr
{ 12803, 5, 1, 0, 0, 0, 0x40297478005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #12803 = VPSUBSBZ256rrk
{ 12804, 4, 1, 0, 0, 0, 0x40697478005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #12804 = VPSUBSBZ256rrkz
{ 12805, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817478005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12805 = VPSUBSBZrm
{ 12806, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17478005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #12806 = VPSUBSBZrmk
{ 12807, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17478005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #12807 = VPSUBSBZrmkz
{ 12808, 3, 1, 0, 0, 0, 0x80817478005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12808 = VPSUBSBZrr
{ 12809, 5, 1, 0, 0, 0, 0x80a17478005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #12809 = VPSUBSBZrrk
{ 12810, 4, 1, 0, 0, 0, 0x80e17478005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #12810 = VPSUBSBZrrkz
{ 12811, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17438005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12811 = VPSUBSBrm
{ 12812, 3, 1, 0, 377, 0, 0x17438005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12812 = VPSUBSBrr
{ 12813, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x974b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12813 = VPSUBSWYrm
{ 12814, 3, 1, 0, 377, 0, 0x974b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12814 = VPSUBSWYrr
{ 12815, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200174f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12815 = VPSUBSWZ128rm
{ 12816, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202174f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12816 = VPSUBSWZ128rmk
{ 12817, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206174f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12817 = VPSUBSWZ128rmkz
{ 12818, 3, 1, 0, 0, 0, 0x200174f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12818 = VPSUBSWZ128rr
{ 12819, 5, 1, 0, 0, 0, 0x202174f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12819 = VPSUBSWZ128rrk
{ 12820, 4, 1, 0, 0, 0, 0x206174f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12820 = VPSUBSWZ128rrkz
{ 12821, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400974f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12821 = VPSUBSWZ256rm
{ 12822, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402974f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12822 = VPSUBSWZ256rmk
{ 12823, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406974f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12823 = VPSUBSWZ256rmkz
{ 12824, 3, 1, 0, 0, 0, 0x400974f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12824 = VPSUBSWZ256rr
{ 12825, 5, 1, 0, 0, 0, 0x402974f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #12825 = VPSUBSWZ256rrk
{ 12826, 4, 1, 0, 0, 0, 0x406974f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #12826 = VPSUBSWZ256rrkz
{ 12827, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808174f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12827 = VPSUBSWZrm
{ 12828, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a174f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12828 = VPSUBSWZrmk
{ 12829, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e174f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12829 = VPSUBSWZrmkz
{ 12830, 3, 1, 0, 0, 0, 0x808174f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12830 = VPSUBSWZrr
{ 12831, 5, 1, 0, 0, 0, 0x80a174f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #12831 = VPSUBSWZrrk
{ 12832, 4, 1, 0, 0, 0, 0x80e174f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #12832 = VPSUBSWZrrkz
{ 12833, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x174b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12833 = VPSUBSWrm
{ 12834, 3, 1, 0, 377, 0, 0x174b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12834 = VPSUBSWrr
{ 12835, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x96c38005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12835 = VPSUBUSBYrm
{ 12836, 3, 1, 0, 377, 0, 0x96c38005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12836 = VPSUBUSBYrr
{ 12837, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016c78005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12837 = VPSUBUSBZ128rm
{ 12838, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216c78005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #12838 = VPSUBUSBZ128rmk
{ 12839, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616c78005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #12839 = VPSUBUSBZ128rmkz
{ 12840, 3, 1, 0, 0, 0, 0x20016c78005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12840 = VPSUBUSBZ128rr
{ 12841, 5, 1, 0, 0, 0, 0x20216c78005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #12841 = VPSUBUSBZ128rrk
{ 12842, 4, 1, 0, 0, 0, 0x20616c78005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #12842 = VPSUBUSBZ128rrkz
{ 12843, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096c78005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12843 = VPSUBUSBZ256rm
{ 12844, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296c78005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #12844 = VPSUBUSBZ256rmk
{ 12845, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696c78005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #12845 = VPSUBUSBZ256rmkz
{ 12846, 3, 1, 0, 0, 0, 0x40096c78005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12846 = VPSUBUSBZ256rr
{ 12847, 5, 1, 0, 0, 0, 0x40296c78005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #12847 = VPSUBUSBZ256rrk
{ 12848, 4, 1, 0, 0, 0, 0x40696c78005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #12848 = VPSUBUSBZ256rrkz
{ 12849, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816c78005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12849 = VPSUBUSBZrm
{ 12850, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16c78005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #12850 = VPSUBUSBZrmk
{ 12851, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16c78005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #12851 = VPSUBUSBZrmkz
{ 12852, 3, 1, 0, 0, 0, 0x80816c78005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12852 = VPSUBUSBZrr
{ 12853, 5, 1, 0, 0, 0, 0x80a16c78005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #12853 = VPSUBUSBZrrk
{ 12854, 4, 1, 0, 0, 0, 0x80e16c78005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #12854 = VPSUBUSBZrrkz
{ 12855, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x16c38005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12855 = VPSUBUSBrm
{ 12856, 3, 1, 0, 377, 0, 0x16c38005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12856 = VPSUBUSBrr
{ 12857, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x96cb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12857 = VPSUBUSWYrm
{ 12858, 3, 1, 0, 377, 0, 0x96cb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12858 = VPSUBUSWYrr
{ 12859, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016cf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12859 = VPSUBUSWZ128rm
{ 12860, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216cf8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12860 = VPSUBUSWZ128rmk
{ 12861, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616cf8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12861 = VPSUBUSWZ128rmkz
{ 12862, 3, 1, 0, 0, 0, 0x20016cf8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12862 = VPSUBUSWZ128rr
{ 12863, 5, 1, 0, 0, 0, 0x20216cf8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12863 = VPSUBUSWZ128rrk
{ 12864, 4, 1, 0, 0, 0, 0x20616cf8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12864 = VPSUBUSWZ128rrkz
{ 12865, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096cf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12865 = VPSUBUSWZ256rm
{ 12866, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296cf8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12866 = VPSUBUSWZ256rmk
{ 12867, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696cf8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12867 = VPSUBUSWZ256rmkz
{ 12868, 3, 1, 0, 0, 0, 0x40096cf8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12868 = VPSUBUSWZ256rr
{ 12869, 5, 1, 0, 0, 0, 0x40296cf8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #12869 = VPSUBUSWZ256rrk
{ 12870, 4, 1, 0, 0, 0, 0x40696cf8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #12870 = VPSUBUSWZ256rrkz
{ 12871, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816cf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12871 = VPSUBUSWZrm
{ 12872, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16cf8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12872 = VPSUBUSWZrmk
{ 12873, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16cf8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12873 = VPSUBUSWZrmkz
{ 12874, 3, 1, 0, 0, 0, 0x80816cf8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12874 = VPSUBUSWZrr
{ 12875, 5, 1, 0, 0, 0, 0x80a16cf8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #12875 = VPSUBUSWZrrk
{ 12876, 4, 1, 0, 0, 0, 0x80e16cf8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #12876 = VPSUBUSWZrrkz
{ 12877, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x16cb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12877 = VPSUBUSWrm
{ 12878, 3, 1, 0, 377, 0, 0x16cb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12878 = VPSUBUSWrr
{ 12879, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x97cb8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #12879 = VPSUBWYrm
{ 12880, 3, 1, 0, 377, 0, 0x97cb8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #12880 = VPSUBWYrr
{ 12881, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20017cf8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #12881 = VPSUBWZ128rm
{ 12882, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20217cf8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #12882 = VPSUBWZ128rmk
{ 12883, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20617cf8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #12883 = VPSUBWZ128rmkz
{ 12884, 3, 1, 0, 0, 0, 0x20017cf8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #12884 = VPSUBWZ128rr
{ 12885, 5, 1, 0, 0, 0, 0x20217cf8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #12885 = VPSUBWZ128rrk
{ 12886, 4, 1, 0, 0, 0, 0x20617cf8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #12886 = VPSUBWZ128rrkz
{ 12887, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40097cf8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #12887 = VPSUBWZ256rm
{ 12888, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40297cf8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #12888 = VPSUBWZ256rmk
{ 12889, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40697cf8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #12889 = VPSUBWZ256rmkz
{ 12890, 3, 1, 0, 0, 0, 0x40097cf8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #12890 = VPSUBWZ256rr
{ 12891, 5, 1, 0, 0, 0, 0x40297cf8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #12891 = VPSUBWZ256rrk
{ 12892, 4, 1, 0, 0, 0, 0x40697cf8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #12892 = VPSUBWZ256rrkz
{ 12893, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80817cf8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #12893 = VPSUBWZrm
{ 12894, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a17cf8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #12894 = VPSUBWZrmk
{ 12895, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e17cf8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #12895 = VPSUBWZrmkz
{ 12896, 3, 1, 0, 0, 0, 0x80817cf8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #12896 = VPSUBWZrr
{ 12897, 5, 1, 0, 0, 0, 0x80a17cf8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #12897 = VPSUBWZrrk
{ 12898, 4, 1, 0, 0, 0, 0x80e17cf8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #12898 = VPSUBWZrrkz
{ 12899, 7, 1, 0, 376, 0|(1ULL<<MCID::MayLoad), 0x17cb8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #12899 = VPSUBWrm
{ 12900, 3, 1, 0, 377, 0, 0x17cb8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #12900 = VPSUBWrr
{ 12901, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90112f804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #12901 = VPTERNLOGDZ128rmbi
{ 12902, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92112f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #12902 = VPTERNLOGDZ128rmbik
{ 12903, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96112f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #12903 = VPTERNLOGDZ128rmbikz
{ 12904, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200112f804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #12904 = VPTERNLOGDZ128rmi
{ 12905, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202112f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #12905 = VPTERNLOGDZ128rmik
{ 12906, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206112f804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #12906 = VPTERNLOGDZ128rmikz
{ 12907, 5, 1, 0, 0, 0, 0x200112f804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #12907 = VPTERNLOGDZ128rri
{ 12908, 6, 1, 0, 0, 0, 0x202112f804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr }, // Inst #12908 = VPTERNLOGDZ128rrik
{ 12909, 6, 1, 0, 0, 0, 0x206112f804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr }, // Inst #12909 = VPTERNLOGDZ128rrikz
{ 12910, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90912f804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr }, // Inst #12910 = VPTERNLOGDZ256rmbi
{ 12911, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92912f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12911 = VPTERNLOGDZ256rmbik
{ 12912, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96912f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12912 = VPTERNLOGDZ256rmbikz
{ 12913, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400912f804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr }, // Inst #12913 = VPTERNLOGDZ256rmi
{ 12914, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402912f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12914 = VPTERNLOGDZ256rmik
{ 12915, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406912f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #12915 = VPTERNLOGDZ256rmikz
{ 12916, 5, 1, 0, 0, 0, 0x400912f804d005ULL, nullptr, nullptr, OperandInfo536, -1 ,nullptr }, // Inst #12916 = VPTERNLOGDZ256rri
{ 12917, 6, 1, 0, 0, 0, 0x402912f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #12917 = VPTERNLOGDZ256rrik
{ 12918, 6, 1, 0, 0, 0, 0x406912f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #12918 = VPTERNLOGDZ256rrikz
{ 12919, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98112f804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr }, // Inst #12919 = VPTERNLOGDZrmbi
{ 12920, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a112f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #12920 = VPTERNLOGDZrmbik
{ 12921, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e112f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #12921 = VPTERNLOGDZrmbikz
{ 12922, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808112f804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr }, // Inst #12922 = VPTERNLOGDZrmi
{ 12923, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a112f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #12923 = VPTERNLOGDZrmik
{ 12924, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e112f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #12924 = VPTERNLOGDZrmikz
{ 12925, 5, 1, 0, 0, 0, 0x808112f804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #12925 = VPTERNLOGDZrri
{ 12926, 6, 1, 0, 0, 0, 0x80a112f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #12926 = VPTERNLOGDZrrik
{ 12927, 6, 1, 0, 0, 0, 0x80e112f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #12927 = VPTERNLOGDZrrikz
{ 12928, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110192f804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #12928 = VPTERNLOGQZ128rmbi
{ 12929, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112192f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #12929 = VPTERNLOGQZ128rmbik
{ 12930, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116192f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #12930 = VPTERNLOGQZ128rmbikz
{ 12931, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200192f804d006ULL, nullptr, nullptr, OperandInfo533, -1 ,nullptr }, // Inst #12931 = VPTERNLOGQZ128rmi
{ 12932, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202192f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #12932 = VPTERNLOGQZ128rmik
{ 12933, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206192f804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #12933 = VPTERNLOGQZ128rmikz
{ 12934, 5, 1, 0, 0, 0, 0x200192f804d005ULL, nullptr, nullptr, OperandInfo534, -1 ,nullptr }, // Inst #12934 = VPTERNLOGQZ128rri
{ 12935, 6, 1, 0, 0, 0, 0x202192f804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr }, // Inst #12935 = VPTERNLOGQZ128rrik
{ 12936, 6, 1, 0, 0, 0, 0x206192f804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr }, // Inst #12936 = VPTERNLOGQZ128rrikz
{ 12937, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110992f804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr }, // Inst #12937 = VPTERNLOGQZ256rmbi
{ 12938, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112992f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #12938 = VPTERNLOGQZ256rmbik
{ 12939, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116992f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #12939 = VPTERNLOGQZ256rmbikz
{ 12940, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400992f804d006ULL, nullptr, nullptr, OperandInfo535, -1 ,nullptr }, // Inst #12940 = VPTERNLOGQZ256rmi
{ 12941, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402992f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #12941 = VPTERNLOGQZ256rmik
{ 12942, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406992f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #12942 = VPTERNLOGQZ256rmikz
{ 12943, 5, 1, 0, 0, 0, 0x400992f804d005ULL, nullptr, nullptr, OperandInfo536, -1 ,nullptr }, // Inst #12943 = VPTERNLOGQZ256rri
{ 12944, 6, 1, 0, 0, 0, 0x402992f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #12944 = VPTERNLOGQZ256rrik
{ 12945, 6, 1, 0, 0, 0, 0x406992f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #12945 = VPTERNLOGQZ256rrikz
{ 12946, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118192f804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr }, // Inst #12946 = VPTERNLOGQZrmbi
{ 12947, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a192f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #12947 = VPTERNLOGQZrmbik
{ 12948, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e192f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #12948 = VPTERNLOGQZrmbikz
{ 12949, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808192f804d006ULL, nullptr, nullptr, OperandInfo537, -1 ,nullptr }, // Inst #12949 = VPTERNLOGQZrmi
{ 12950, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a192f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #12950 = VPTERNLOGQZrmik
{ 12951, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e192f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #12951 = VPTERNLOGQZrmikz
{ 12952, 5, 1, 0, 0, 0, 0x808192f804d005ULL, nullptr, nullptr, OperandInfo538, -1 ,nullptr }, // Inst #12952 = VPTERNLOGQZrri
{ 12953, 6, 1, 0, 0, 0, 0x80a192f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #12953 = VPTERNLOGQZrrik
{ 12954, 6, 1, 0, 0, 0, 0x80e192f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #12954 = VPTERNLOGQZrrikz
{ 12955, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011360009006ULL, nullptr, nullptr, OperandInfo792, -1 ,nullptr }, // Inst #12955 = VPTESTMBZ128rm
{ 12956, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211360009006ULL, nullptr, nullptr, OperandInfo793, -1 ,nullptr }, // Inst #12956 = VPTESTMBZ128rmk
{ 12957, 3, 1, 0, 0, 0, 0x20011360009005ULL, nullptr, nullptr, OperandInfo794, -1 ,nullptr }, // Inst #12957 = VPTESTMBZ128rr
{ 12958, 4, 1, 0, 0, 0, 0x20211360009005ULL, nullptr, nullptr, OperandInfo795, -1 ,nullptr }, // Inst #12958 = VPTESTMBZ128rrk
{ 12959, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091360009006ULL, nullptr, nullptr, OperandInfo796, -1 ,nullptr }, // Inst #12959 = VPTESTMBZ256rm
{ 12960, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291360009006ULL, nullptr, nullptr, OperandInfo797, -1 ,nullptr }, // Inst #12960 = VPTESTMBZ256rmk
{ 12961, 3, 1, 0, 0, 0, 0x40091360009005ULL, nullptr, nullptr, OperandInfo798, -1 ,nullptr }, // Inst #12961 = VPTESTMBZ256rr
{ 12962, 4, 1, 0, 0, 0, 0x40291360009005ULL, nullptr, nullptr, OperandInfo799, -1 ,nullptr }, // Inst #12962 = VPTESTMBZ256rrk
{ 12963, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811360009006ULL, nullptr, nullptr, OperandInfo800, -1 ,nullptr }, // Inst #12963 = VPTESTMBZrm
{ 12964, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11360009006ULL, nullptr, nullptr, OperandInfo801, -1 ,nullptr }, // Inst #12964 = VPTESTMBZrmk
{ 12965, 3, 1, 0, 0, 0, 0x80811360009005ULL, nullptr, nullptr, OperandInfo802, -1 ,nullptr }, // Inst #12965 = VPTESTMBZrr
{ 12966, 4, 1, 0, 0, 0, 0x80a11360009005ULL, nullptr, nullptr, OperandInfo803, -1 ,nullptr }, // Inst #12966 = VPTESTMBZrrk
{ 12967, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200113e0009006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr }, // Inst #12967 = VPTESTMDZ128rm
{ 12968, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90113e0009006ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr }, // Inst #12968 = VPTESTMDZ128rmb
{ 12969, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92113e0009006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr }, // Inst #12969 = VPTESTMDZ128rmbk
{ 12970, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202113e0009006ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr }, // Inst #12970 = VPTESTMDZ128rmk
{ 12971, 3, 1, 0, 0, 0, 0x200113e0009005ULL, nullptr, nullptr, OperandInfo806, -1 ,nullptr }, // Inst #12971 = VPTESTMDZ128rr
{ 12972, 4, 1, 0, 0, 0, 0x202113e0009005ULL, nullptr, nullptr, OperandInfo807, -1 ,nullptr }, // Inst #12972 = VPTESTMDZ128rrk
{ 12973, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400913e0009006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr }, // Inst #12973 = VPTESTMDZ256rm
{ 12974, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90913e0009006ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr }, // Inst #12974 = VPTESTMDZ256rmb
{ 12975, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92913e0009006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr }, // Inst #12975 = VPTESTMDZ256rmbk
{ 12976, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402913e0009006ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr }, // Inst #12976 = VPTESTMDZ256rmk
{ 12977, 3, 1, 0, 0, 0, 0x400913e0009005ULL, nullptr, nullptr, OperandInfo810, -1 ,nullptr }, // Inst #12977 = VPTESTMDZ256rr
{ 12978, 4, 1, 0, 0, 0, 0x402913e0009005ULL, nullptr, nullptr, OperandInfo811, -1 ,nullptr }, // Inst #12978 = VPTESTMDZ256rrk
{ 12979, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808113e0009006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr }, // Inst #12979 = VPTESTMDZrm
{ 12980, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98113e0009006ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr }, // Inst #12980 = VPTESTMDZrmb
{ 12981, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a113e0009006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr }, // Inst #12981 = VPTESTMDZrmbk
{ 12982, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a113e0009006ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr }, // Inst #12982 = VPTESTMDZrmk
{ 12983, 3, 1, 0, 0, 0, 0x808113e0009005ULL, nullptr, nullptr, OperandInfo814, -1 ,nullptr }, // Inst #12983 = VPTESTMDZrr
{ 12984, 4, 1, 0, 0, 0, 0x80a113e0009005ULL, nullptr, nullptr, OperandInfo815, -1 ,nullptr }, // Inst #12984 = VPTESTMDZrrk
{ 12985, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200193e0009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr }, // Inst #12985 = VPTESTMQZ128rm
{ 12986, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110193e0009006ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr }, // Inst #12986 = VPTESTMQZ128rmb
{ 12987, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112193e0009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr }, // Inst #12987 = VPTESTMQZ128rmbk
{ 12988, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202193e0009006ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr }, // Inst #12988 = VPTESTMQZ128rmk
{ 12989, 3, 1, 0, 0, 0, 0x200193e0009005ULL, nullptr, nullptr, OperandInfo818, -1 ,nullptr }, // Inst #12989 = VPTESTMQZ128rr
{ 12990, 4, 1, 0, 0, 0, 0x202193e0009005ULL, nullptr, nullptr, OperandInfo819, -1 ,nullptr }, // Inst #12990 = VPTESTMQZ128rrk
{ 12991, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400993e0009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr }, // Inst #12991 = VPTESTMQZ256rm
{ 12992, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110993e0009006ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr }, // Inst #12992 = VPTESTMQZ256rmb
{ 12993, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112993e0009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr }, // Inst #12993 = VPTESTMQZ256rmbk
{ 12994, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402993e0009006ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr }, // Inst #12994 = VPTESTMQZ256rmk
{ 12995, 3, 1, 0, 0, 0, 0x400993e0009005ULL, nullptr, nullptr, OperandInfo822, -1 ,nullptr }, // Inst #12995 = VPTESTMQZ256rr
{ 12996, 4, 1, 0, 0, 0, 0x402993e0009005ULL, nullptr, nullptr, OperandInfo823, -1 ,nullptr }, // Inst #12996 = VPTESTMQZ256rrk
{ 12997, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808193e0009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr }, // Inst #12997 = VPTESTMQZrm
{ 12998, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118193e0009006ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr }, // Inst #12998 = VPTESTMQZrmb
{ 12999, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a193e0009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr }, // Inst #12999 = VPTESTMQZrmbk
{ 13000, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a193e0009006ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr }, // Inst #13000 = VPTESTMQZrmk
{ 13001, 3, 1, 0, 0, 0, 0x808193e0009005ULL, nullptr, nullptr, OperandInfo826, -1 ,nullptr }, // Inst #13001 = VPTESTMQZrr
{ 13002, 4, 1, 0, 0, 0, 0x80a193e0009005ULL, nullptr, nullptr, OperandInfo827, -1 ,nullptr }, // Inst #13002 = VPTESTMQZrrk
{ 13003, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20019360009006ULL, nullptr, nullptr, OperandInfo828, -1 ,nullptr }, // Inst #13003 = VPTESTMWZ128rm
{ 13004, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20219360009006ULL, nullptr, nullptr, OperandInfo829, -1 ,nullptr }, // Inst #13004 = VPTESTMWZ128rmk
{ 13005, 3, 1, 0, 0, 0, 0x20019360009005ULL, nullptr, nullptr, OperandInfo830, -1 ,nullptr }, // Inst #13005 = VPTESTMWZ128rr
{ 13006, 4, 1, 0, 0, 0, 0x20219360009005ULL, nullptr, nullptr, OperandInfo831, -1 ,nullptr }, // Inst #13006 = VPTESTMWZ128rrk
{ 13007, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099360009006ULL, nullptr, nullptr, OperandInfo832, -1 ,nullptr }, // Inst #13007 = VPTESTMWZ256rm
{ 13008, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299360009006ULL, nullptr, nullptr, OperandInfo833, -1 ,nullptr }, // Inst #13008 = VPTESTMWZ256rmk
{ 13009, 3, 1, 0, 0, 0, 0x40099360009005ULL, nullptr, nullptr, OperandInfo834, -1 ,nullptr }, // Inst #13009 = VPTESTMWZ256rr
{ 13010, 4, 1, 0, 0, 0, 0x40299360009005ULL, nullptr, nullptr, OperandInfo835, -1 ,nullptr }, // Inst #13010 = VPTESTMWZ256rrk
{ 13011, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819360009006ULL, nullptr, nullptr, OperandInfo836, -1 ,nullptr }, // Inst #13011 = VPTESTMWZrm
{ 13012, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19360009006ULL, nullptr, nullptr, OperandInfo837, -1 ,nullptr }, // Inst #13012 = VPTESTMWZrmk
{ 13013, 3, 1, 0, 0, 0, 0x80819360009005ULL, nullptr, nullptr, OperandInfo838, -1 ,nullptr }, // Inst #13013 = VPTESTMWZrr
{ 13014, 4, 1, 0, 0, 0, 0x80a19360009005ULL, nullptr, nullptr, OperandInfo839, -1 ,nullptr }, // Inst #13014 = VPTESTMWZrrk
{ 13015, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011360009806ULL, nullptr, nullptr, OperandInfo792, -1 ,nullptr }, // Inst #13015 = VPTESTNMBZ128rm
{ 13016, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211360009806ULL, nullptr, nullptr, OperandInfo793, -1 ,nullptr }, // Inst #13016 = VPTESTNMBZ128rmk
{ 13017, 3, 1, 0, 0, 0, 0x20011360009805ULL, nullptr, nullptr, OperandInfo794, -1 ,nullptr }, // Inst #13017 = VPTESTNMBZ128rr
{ 13018, 4, 1, 0, 0, 0, 0x20211360009805ULL, nullptr, nullptr, OperandInfo795, -1 ,nullptr }, // Inst #13018 = VPTESTNMBZ128rrk
{ 13019, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091360009806ULL, nullptr, nullptr, OperandInfo796, -1 ,nullptr }, // Inst #13019 = VPTESTNMBZ256rm
{ 13020, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291360009806ULL, nullptr, nullptr, OperandInfo797, -1 ,nullptr }, // Inst #13020 = VPTESTNMBZ256rmk
{ 13021, 3, 1, 0, 0, 0, 0x40091360009805ULL, nullptr, nullptr, OperandInfo798, -1 ,nullptr }, // Inst #13021 = VPTESTNMBZ256rr
{ 13022, 4, 1, 0, 0, 0, 0x40291360009805ULL, nullptr, nullptr, OperandInfo799, -1 ,nullptr }, // Inst #13022 = VPTESTNMBZ256rrk
{ 13023, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811360009806ULL, nullptr, nullptr, OperandInfo800, -1 ,nullptr }, // Inst #13023 = VPTESTNMBZrm
{ 13024, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11360009806ULL, nullptr, nullptr, OperandInfo801, -1 ,nullptr }, // Inst #13024 = VPTESTNMBZrmk
{ 13025, 3, 1, 0, 0, 0, 0x80811360009805ULL, nullptr, nullptr, OperandInfo802, -1 ,nullptr }, // Inst #13025 = VPTESTNMBZrr
{ 13026, 4, 1, 0, 0, 0, 0x80a11360009805ULL, nullptr, nullptr, OperandInfo803, -1 ,nullptr }, // Inst #13026 = VPTESTNMBZrrk
{ 13027, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200113e0009806ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr }, // Inst #13027 = VPTESTNMDZ128rm
{ 13028, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90113e0009806ULL, nullptr, nullptr, OperandInfo804, -1 ,nullptr }, // Inst #13028 = VPTESTNMDZ128rmb
{ 13029, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92113e0009806ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr }, // Inst #13029 = VPTESTNMDZ128rmbk
{ 13030, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202113e0009806ULL, nullptr, nullptr, OperandInfo805, -1 ,nullptr }, // Inst #13030 = VPTESTNMDZ128rmk
{ 13031, 3, 1, 0, 0, 0, 0x200113e0009805ULL, nullptr, nullptr, OperandInfo806, -1 ,nullptr }, // Inst #13031 = VPTESTNMDZ128rr
{ 13032, 4, 1, 0, 0, 0, 0x202113e0009805ULL, nullptr, nullptr, OperandInfo807, -1 ,nullptr }, // Inst #13032 = VPTESTNMDZ128rrk
{ 13033, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400913e0009806ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr }, // Inst #13033 = VPTESTNMDZ256rm
{ 13034, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90913e0009806ULL, nullptr, nullptr, OperandInfo808, -1 ,nullptr }, // Inst #13034 = VPTESTNMDZ256rmb
{ 13035, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92913e0009806ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr }, // Inst #13035 = VPTESTNMDZ256rmbk
{ 13036, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402913e0009806ULL, nullptr, nullptr, OperandInfo809, -1 ,nullptr }, // Inst #13036 = VPTESTNMDZ256rmk
{ 13037, 3, 1, 0, 0, 0, 0x400913e0009805ULL, nullptr, nullptr, OperandInfo810, -1 ,nullptr }, // Inst #13037 = VPTESTNMDZ256rr
{ 13038, 4, 1, 0, 0, 0, 0x402913e0009805ULL, nullptr, nullptr, OperandInfo811, -1 ,nullptr }, // Inst #13038 = VPTESTNMDZ256rrk
{ 13039, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808113e0009806ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr }, // Inst #13039 = VPTESTNMDZrm
{ 13040, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98113e0009806ULL, nullptr, nullptr, OperandInfo812, -1 ,nullptr }, // Inst #13040 = VPTESTNMDZrmb
{ 13041, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a113e0009806ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr }, // Inst #13041 = VPTESTNMDZrmbk
{ 13042, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a113e0009806ULL, nullptr, nullptr, OperandInfo813, -1 ,nullptr }, // Inst #13042 = VPTESTNMDZrmk
{ 13043, 3, 1, 0, 0, 0, 0x808113e0009805ULL, nullptr, nullptr, OperandInfo814, -1 ,nullptr }, // Inst #13043 = VPTESTNMDZrr
{ 13044, 4, 1, 0, 0, 0, 0x80a113e0009805ULL, nullptr, nullptr, OperandInfo815, -1 ,nullptr }, // Inst #13044 = VPTESTNMDZrrk
{ 13045, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200193e0009806ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr }, // Inst #13045 = VPTESTNMQZ128rm
{ 13046, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110193e0009806ULL, nullptr, nullptr, OperandInfo816, -1 ,nullptr }, // Inst #13046 = VPTESTNMQZ128rmb
{ 13047, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112193e0009806ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr }, // Inst #13047 = VPTESTNMQZ128rmbk
{ 13048, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202193e0009806ULL, nullptr, nullptr, OperandInfo817, -1 ,nullptr }, // Inst #13048 = VPTESTNMQZ128rmk
{ 13049, 3, 1, 0, 0, 0, 0x200193e0009805ULL, nullptr, nullptr, OperandInfo818, -1 ,nullptr }, // Inst #13049 = VPTESTNMQZ128rr
{ 13050, 4, 1, 0, 0, 0, 0x202193e0009805ULL, nullptr, nullptr, OperandInfo819, -1 ,nullptr }, // Inst #13050 = VPTESTNMQZ128rrk
{ 13051, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400993e0009806ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr }, // Inst #13051 = VPTESTNMQZ256rm
{ 13052, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110993e0009806ULL, nullptr, nullptr, OperandInfo820, -1 ,nullptr }, // Inst #13052 = VPTESTNMQZ256rmb
{ 13053, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112993e0009806ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr }, // Inst #13053 = VPTESTNMQZ256rmbk
{ 13054, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402993e0009806ULL, nullptr, nullptr, OperandInfo821, -1 ,nullptr }, // Inst #13054 = VPTESTNMQZ256rmk
{ 13055, 3, 1, 0, 0, 0, 0x400993e0009805ULL, nullptr, nullptr, OperandInfo822, -1 ,nullptr }, // Inst #13055 = VPTESTNMQZ256rr
{ 13056, 4, 1, 0, 0, 0, 0x402993e0009805ULL, nullptr, nullptr, OperandInfo823, -1 ,nullptr }, // Inst #13056 = VPTESTNMQZ256rrk
{ 13057, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808193e0009806ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr }, // Inst #13057 = VPTESTNMQZrm
{ 13058, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118193e0009806ULL, nullptr, nullptr, OperandInfo824, -1 ,nullptr }, // Inst #13058 = VPTESTNMQZrmb
{ 13059, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a193e0009806ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr }, // Inst #13059 = VPTESTNMQZrmbk
{ 13060, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a193e0009806ULL, nullptr, nullptr, OperandInfo825, -1 ,nullptr }, // Inst #13060 = VPTESTNMQZrmk
{ 13061, 3, 1, 0, 0, 0, 0x808193e0009805ULL, nullptr, nullptr, OperandInfo826, -1 ,nullptr }, // Inst #13061 = VPTESTNMQZrr
{ 13062, 4, 1, 0, 0, 0, 0x80a193e0009805ULL, nullptr, nullptr, OperandInfo827, -1 ,nullptr }, // Inst #13062 = VPTESTNMQZrrk
{ 13063, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20019360009806ULL, nullptr, nullptr, OperandInfo828, -1 ,nullptr }, // Inst #13063 = VPTESTNMWZ128rm
{ 13064, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20219360009806ULL, nullptr, nullptr, OperandInfo829, -1 ,nullptr }, // Inst #13064 = VPTESTNMWZ128rmk
{ 13065, 3, 1, 0, 0, 0, 0x20019360009805ULL, nullptr, nullptr, OperandInfo830, -1 ,nullptr }, // Inst #13065 = VPTESTNMWZ128rr
{ 13066, 4, 1, 0, 0, 0, 0x20219360009805ULL, nullptr, nullptr, OperandInfo831, -1 ,nullptr }, // Inst #13066 = VPTESTNMWZ128rrk
{ 13067, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099360009806ULL, nullptr, nullptr, OperandInfo832, -1 ,nullptr }, // Inst #13067 = VPTESTNMWZ256rm
{ 13068, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299360009806ULL, nullptr, nullptr, OperandInfo833, -1 ,nullptr }, // Inst #13068 = VPTESTNMWZ256rmk
{ 13069, 3, 1, 0, 0, 0, 0x40099360009805ULL, nullptr, nullptr, OperandInfo834, -1 ,nullptr }, // Inst #13069 = VPTESTNMWZ256rr
{ 13070, 4, 1, 0, 0, 0, 0x40299360009805ULL, nullptr, nullptr, OperandInfo835, -1 ,nullptr }, // Inst #13070 = VPTESTNMWZ256rrk
{ 13071, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819360009806ULL, nullptr, nullptr, OperandInfo836, -1 ,nullptr }, // Inst #13071 = VPTESTNMWZrm
{ 13072, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19360009806ULL, nullptr, nullptr, OperandInfo837, -1 ,nullptr }, // Inst #13072 = VPTESTNMWZrmk
{ 13073, 3, 1, 0, 0, 0, 0x80819360009805ULL, nullptr, nullptr, OperandInfo838, -1 ,nullptr }, // Inst #13073 = VPTESTNMWZrr
{ 13074, 4, 1, 0, 0, 0, 0x80a19360009805ULL, nullptr, nullptr, OperandInfo839, -1 ,nullptr }, // Inst #13074 = VPTESTNMWZrrk
{ 13075, 6, 0, 0, 834, 0|(1ULL<<MCID::MayLoad), 0x80bb8009006ULL, nullptr, ImplicitList6, OperandInfo356, -1 ,nullptr }, // Inst #13075 = VPTESTYrm
{ 13076, 2, 0, 0, 833, 0, 0x80bb8009005ULL, nullptr, ImplicitList6, OperandInfo446, -1 ,nullptr }, // Inst #13076 = VPTESTYrr
{ 13077, 6, 0, 0, 834, 0|(1ULL<<MCID::MayLoad), 0xbb8009006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #13077 = VPTESTrm
{ 13078, 2, 0, 0, 833, 0, 0xbb8009005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #13078 = VPTESTrr
{ 13079, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x93438005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13079 = VPUNPCKHBWYrm
{ 13080, 3, 1, 0, 276, 0, 0x93438005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13080 = VPUNPCKHBWYrr
{ 13081, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013478005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13081 = VPUNPCKHBWZ128rm
{ 13082, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213478005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #13082 = VPUNPCKHBWZ128rmk
{ 13083, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613478005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #13083 = VPUNPCKHBWZ128rmkz
{ 13084, 3, 1, 0, 0, 0, 0x20013478005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13084 = VPUNPCKHBWZ128rr
{ 13085, 5, 1, 0, 0, 0, 0x20213478005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #13085 = VPUNPCKHBWZ128rrk
{ 13086, 4, 1, 0, 0, 0, 0x20613478005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #13086 = VPUNPCKHBWZ128rrkz
{ 13087, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093478005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13087 = VPUNPCKHBWZ256rm
{ 13088, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293478005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #13088 = VPUNPCKHBWZ256rmk
{ 13089, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693478005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #13089 = VPUNPCKHBWZ256rmkz
{ 13090, 3, 1, 0, 0, 0, 0x40093478005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13090 = VPUNPCKHBWZ256rr
{ 13091, 5, 1, 0, 0, 0, 0x40293478005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #13091 = VPUNPCKHBWZ256rrk
{ 13092, 4, 1, 0, 0, 0, 0x40693478005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #13092 = VPUNPCKHBWZ256rrkz
{ 13093, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813478005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13093 = VPUNPCKHBWZrm
{ 13094, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13478005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #13094 = VPUNPCKHBWZrmk
{ 13095, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13478005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #13095 = VPUNPCKHBWZrmkz
{ 13096, 3, 1, 0, 0, 0, 0x80813478005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13096 = VPUNPCKHBWZrr
{ 13097, 5, 1, 0, 0, 0, 0x80a13478005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #13097 = VPUNPCKHBWZrrk
{ 13098, 4, 1, 0, 0, 0, 0x80e13478005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #13098 = VPUNPCKHBWZrrkz
{ 13099, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x13438005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13099 = VPUNPCKHBWrm
{ 13100, 3, 1, 0, 439, 0, 0x13438005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13100 = VPUNPCKHBWrr
{ 13101, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x93538005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13101 = VPUNPCKHDQYrm
{ 13102, 3, 1, 0, 276, 0, 0x93538005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13102 = VPUNPCKHDQYrr
{ 13103, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013578005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13103 = VPUNPCKHDQZ128rm
{ 13104, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9013578005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13104 = VPUNPCKHDQZ128rmb
{ 13105, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213578005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #13105 = VPUNPCKHDQZ128rmbk
{ 13106, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9613578005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #13106 = VPUNPCKHDQZ128rmbkz
{ 13107, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213578005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #13107 = VPUNPCKHDQZ128rmk
{ 13108, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613578005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #13108 = VPUNPCKHDQZ128rmkz
{ 13109, 3, 1, 0, 0, 0, 0x20013578005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13109 = VPUNPCKHDQZ128rr
{ 13110, 5, 1, 0, 0, 0, 0x20213578005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #13110 = VPUNPCKHDQZ128rrk
{ 13111, 4, 1, 0, 0, 0, 0x20613578005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #13111 = VPUNPCKHDQZ128rrkz
{ 13112, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093578005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13112 = VPUNPCKHDQZ256rm
{ 13113, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9093578005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13113 = VPUNPCKHDQZ256rmb
{ 13114, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293578005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #13114 = VPUNPCKHDQZ256rmbk
{ 13115, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9693578005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #13115 = VPUNPCKHDQZ256rmbkz
{ 13116, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293578005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #13116 = VPUNPCKHDQZ256rmk
{ 13117, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693578005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #13117 = VPUNPCKHDQZ256rmkz
{ 13118, 3, 1, 0, 0, 0, 0x40093578005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13118 = VPUNPCKHDQZ256rr
{ 13119, 5, 1, 0, 0, 0, 0x40293578005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #13119 = VPUNPCKHDQZ256rrk
{ 13120, 4, 1, 0, 0, 0, 0x40693578005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13120 = VPUNPCKHDQZ256rrkz
{ 13121, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813578005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13121 = VPUNPCKHDQZrm
{ 13122, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9813578005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13122 = VPUNPCKHDQZrmb
{ 13123, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13578005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13123 = VPUNPCKHDQZrmbk
{ 13124, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e13578005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #13124 = VPUNPCKHDQZrmbkz
{ 13125, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13578005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13125 = VPUNPCKHDQZrmk
{ 13126, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13578005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #13126 = VPUNPCKHDQZrmkz
{ 13127, 3, 1, 0, 0, 0, 0x80813578005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13127 = VPUNPCKHDQZrr
{ 13128, 5, 1, 0, 0, 0, 0x80a13578005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #13128 = VPUNPCKHDQZrrk
{ 13129, 4, 1, 0, 0, 0, 0x80e13578005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #13129 = VPUNPCKHDQZrrkz
{ 13130, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x13538005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13130 = VPUNPCKHDQrm
{ 13131, 3, 1, 0, 439, 0, 0x13538005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13131 = VPUNPCKHDQrr
{ 13132, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x936b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13132 = VPUNPCKHQDQYrm
{ 13133, 3, 1, 0, 276, 0, 0x936b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13133 = VPUNPCKHQDQYrr
{ 13134, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b6f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13134 = VPUNPCKHQDQZ128rm
{ 13135, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101b6f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13135 = VPUNPCKHQDQZ128rmb
{ 13136, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b6f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #13136 = VPUNPCKHQDQZ128rmbk
{ 13137, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161b6f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #13137 = VPUNPCKHQDQZ128rmbkz
{ 13138, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b6f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #13138 = VPUNPCKHQDQZ128rmk
{ 13139, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b6f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #13139 = VPUNPCKHQDQZ128rmkz
{ 13140, 3, 1, 0, 0, 0, 0x2001b6f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13140 = VPUNPCKHQDQZ128rr
{ 13141, 5, 1, 0, 0, 0, 0x2021b6f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #13141 = VPUNPCKHQDQZ128rrk
{ 13142, 4, 1, 0, 0, 0, 0x2061b6f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #13142 = VPUNPCKHQDQZ128rrkz
{ 13143, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b6f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13143 = VPUNPCKHQDQZ256rm
{ 13144, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109b6f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13144 = VPUNPCKHQDQZ256rmb
{ 13145, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b6f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #13145 = VPUNPCKHQDQZ256rmbk
{ 13146, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169b6f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #13146 = VPUNPCKHQDQZ256rmbkz
{ 13147, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b6f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #13147 = VPUNPCKHQDQZ256rmk
{ 13148, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b6f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #13148 = VPUNPCKHQDQZ256rmkz
{ 13149, 3, 1, 0, 0, 0, 0x4009b6f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13149 = VPUNPCKHQDQZ256rr
{ 13150, 5, 1, 0, 0, 0, 0x4029b6f8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #13150 = VPUNPCKHQDQZ256rrk
{ 13151, 4, 1, 0, 0, 0, 0x4069b6f8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #13151 = VPUNPCKHQDQZ256rrkz
{ 13152, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b6f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13152 = VPUNPCKHQDQZrm
{ 13153, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181b6f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13153 = VPUNPCKHQDQZrmb
{ 13154, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b6f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #13154 = VPUNPCKHQDQZrmbk
{ 13155, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1b6f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #13155 = VPUNPCKHQDQZrmbkz
{ 13156, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b6f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #13156 = VPUNPCKHQDQZrmk
{ 13157, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b6f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #13157 = VPUNPCKHQDQZrmkz
{ 13158, 3, 1, 0, 0, 0, 0x8081b6f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13158 = VPUNPCKHQDQZrr
{ 13159, 5, 1, 0, 0, 0, 0x80a1b6f8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #13159 = VPUNPCKHQDQZrrk
{ 13160, 4, 1, 0, 0, 0, 0x80e1b6f8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #13160 = VPUNPCKHQDQZrrkz
{ 13161, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x136b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13161 = VPUNPCKHQDQrm
{ 13162, 3, 1, 0, 439, 0, 0x136b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13162 = VPUNPCKHQDQrr
{ 13163, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x934b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13163 = VPUNPCKHWDYrm
{ 13164, 3, 1, 0, 276, 0, 0x934b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13164 = VPUNPCKHWDYrr
{ 13165, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200134f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13165 = VPUNPCKHWDZ128rm
{ 13166, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202134f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #13166 = VPUNPCKHWDZ128rmk
{ 13167, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206134f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #13167 = VPUNPCKHWDZ128rmkz
{ 13168, 3, 1, 0, 0, 0, 0x200134f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13168 = VPUNPCKHWDZ128rr
{ 13169, 5, 1, 0, 0, 0, 0x202134f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #13169 = VPUNPCKHWDZ128rrk
{ 13170, 4, 1, 0, 0, 0, 0x206134f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #13170 = VPUNPCKHWDZ128rrkz
{ 13171, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400934f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13171 = VPUNPCKHWDZ256rm
{ 13172, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402934f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #13172 = VPUNPCKHWDZ256rmk
{ 13173, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406934f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #13173 = VPUNPCKHWDZ256rmkz
{ 13174, 3, 1, 0, 0, 0, 0x400934f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13174 = VPUNPCKHWDZ256rr
{ 13175, 5, 1, 0, 0, 0, 0x402934f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #13175 = VPUNPCKHWDZ256rrk
{ 13176, 4, 1, 0, 0, 0, 0x406934f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #13176 = VPUNPCKHWDZ256rrkz
{ 13177, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808134f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13177 = VPUNPCKHWDZrm
{ 13178, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a134f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #13178 = VPUNPCKHWDZrmk
{ 13179, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e134f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #13179 = VPUNPCKHWDZrmkz
{ 13180, 3, 1, 0, 0, 0, 0x808134f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13180 = VPUNPCKHWDZrr
{ 13181, 5, 1, 0, 0, 0, 0x80a134f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #13181 = VPUNPCKHWDZrrk
{ 13182, 4, 1, 0, 0, 0, 0x80e134f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #13182 = VPUNPCKHWDZrrkz
{ 13183, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x134b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13183 = VPUNPCKHWDrm
{ 13184, 3, 1, 0, 439, 0, 0x134b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13184 = VPUNPCKHWDrr
{ 13185, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x93038005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13185 = VPUNPCKLBWYrm
{ 13186, 3, 1, 0, 276, 0, 0x93038005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13186 = VPUNPCKLBWYrr
{ 13187, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013078005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13187 = VPUNPCKLBWZ128rm
{ 13188, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213078005006ULL, nullptr, nullptr, OperandInfo714, -1 ,nullptr }, // Inst #13188 = VPUNPCKLBWZ128rmk
{ 13189, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613078005006ULL, nullptr, nullptr, OperandInfo715, -1 ,nullptr }, // Inst #13189 = VPUNPCKLBWZ128rmkz
{ 13190, 3, 1, 0, 0, 0, 0x20013078005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13190 = VPUNPCKLBWZ128rr
{ 13191, 5, 1, 0, 0, 0, 0x20213078005005ULL, nullptr, nullptr, OperandInfo716, -1 ,nullptr }, // Inst #13191 = VPUNPCKLBWZ128rrk
{ 13192, 4, 1, 0, 0, 0, 0x20613078005005ULL, nullptr, nullptr, OperandInfo717, -1 ,nullptr }, // Inst #13192 = VPUNPCKLBWZ128rrkz
{ 13193, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093078005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13193 = VPUNPCKLBWZ256rm
{ 13194, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293078005006ULL, nullptr, nullptr, OperandInfo718, -1 ,nullptr }, // Inst #13194 = VPUNPCKLBWZ256rmk
{ 13195, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693078005006ULL, nullptr, nullptr, OperandInfo719, -1 ,nullptr }, // Inst #13195 = VPUNPCKLBWZ256rmkz
{ 13196, 3, 1, 0, 0, 0, 0x40093078005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13196 = VPUNPCKLBWZ256rr
{ 13197, 5, 1, 0, 0, 0, 0x40293078005005ULL, nullptr, nullptr, OperandInfo720, -1 ,nullptr }, // Inst #13197 = VPUNPCKLBWZ256rrk
{ 13198, 4, 1, 0, 0, 0, 0x40693078005005ULL, nullptr, nullptr, OperandInfo721, -1 ,nullptr }, // Inst #13198 = VPUNPCKLBWZ256rrkz
{ 13199, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813078005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13199 = VPUNPCKLBWZrm
{ 13200, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13078005006ULL, nullptr, nullptr, OperandInfo722, -1 ,nullptr }, // Inst #13200 = VPUNPCKLBWZrmk
{ 13201, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13078005006ULL, nullptr, nullptr, OperandInfo723, -1 ,nullptr }, // Inst #13201 = VPUNPCKLBWZrmkz
{ 13202, 3, 1, 0, 0, 0, 0x80813078005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13202 = VPUNPCKLBWZrr
{ 13203, 5, 1, 0, 0, 0, 0x80a13078005005ULL, nullptr, nullptr, OperandInfo724, -1 ,nullptr }, // Inst #13203 = VPUNPCKLBWZrrk
{ 13204, 4, 1, 0, 0, 0, 0x80e13078005005ULL, nullptr, nullptr, OperandInfo725, -1 ,nullptr }, // Inst #13204 = VPUNPCKLBWZrrkz
{ 13205, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x13038005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13205 = VPUNPCKLBWrm
{ 13206, 3, 1, 0, 439, 0, 0x13038005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13206 = VPUNPCKLBWrr
{ 13207, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x93138005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13207 = VPUNPCKLDQYrm
{ 13208, 3, 1, 0, 276, 0, 0x93138005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13208 = VPUNPCKLDQYrr
{ 13209, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20013178005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13209 = VPUNPCKLDQZ128rm
{ 13210, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9013178005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13210 = VPUNPCKLDQZ128rmb
{ 13211, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9213178005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #13211 = VPUNPCKLDQZ128rmbk
{ 13212, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9613178005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #13212 = VPUNPCKLDQZ128rmbkz
{ 13213, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20213178005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #13213 = VPUNPCKLDQZ128rmk
{ 13214, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20613178005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #13214 = VPUNPCKLDQZ128rmkz
{ 13215, 3, 1, 0, 0, 0, 0x20013178005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13215 = VPUNPCKLDQZ128rr
{ 13216, 5, 1, 0, 0, 0, 0x20213178005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #13216 = VPUNPCKLDQZ128rrk
{ 13217, 4, 1, 0, 0, 0, 0x20613178005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #13217 = VPUNPCKLDQZ128rrkz
{ 13218, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40093178005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13218 = VPUNPCKLDQZ256rm
{ 13219, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9093178005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13219 = VPUNPCKLDQZ256rmb
{ 13220, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9293178005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #13220 = VPUNPCKLDQZ256rmbk
{ 13221, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9693178005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #13221 = VPUNPCKLDQZ256rmbkz
{ 13222, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40293178005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #13222 = VPUNPCKLDQZ256rmk
{ 13223, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40693178005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #13223 = VPUNPCKLDQZ256rmkz
{ 13224, 3, 1, 0, 0, 0, 0x40093178005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13224 = VPUNPCKLDQZ256rr
{ 13225, 5, 1, 0, 0, 0, 0x40293178005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #13225 = VPUNPCKLDQZ256rrk
{ 13226, 4, 1, 0, 0, 0, 0x40693178005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13226 = VPUNPCKLDQZ256rrkz
{ 13227, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80813178005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13227 = VPUNPCKLDQZrm
{ 13228, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9813178005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13228 = VPUNPCKLDQZrmb
{ 13229, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a13178005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13229 = VPUNPCKLDQZrmbk
{ 13230, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e13178005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #13230 = VPUNPCKLDQZrmbkz
{ 13231, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a13178005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13231 = VPUNPCKLDQZrmk
{ 13232, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e13178005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #13232 = VPUNPCKLDQZrmkz
{ 13233, 3, 1, 0, 0, 0, 0x80813178005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13233 = VPUNPCKLDQZrr
{ 13234, 5, 1, 0, 0, 0, 0x80a13178005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #13234 = VPUNPCKLDQZrrk
{ 13235, 4, 1, 0, 0, 0, 0x80e13178005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #13235 = VPUNPCKLDQZrrkz
{ 13236, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x13138005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13236 = VPUNPCKLDQrm
{ 13237, 3, 1, 0, 439, 0, 0x13138005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13237 = VPUNPCKLDQrr
{ 13238, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x93638005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13238 = VPUNPCKLQDQYrm
{ 13239, 3, 1, 0, 276, 0, 0x93638005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13239 = VPUNPCKLQDQYrr
{ 13240, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001b678005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13240 = VPUNPCKLQDQZ128rm
{ 13241, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101b678005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13241 = VPUNPCKLQDQZ128rmb
{ 13242, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121b678005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #13242 = VPUNPCKLQDQZ128rmbk
{ 13243, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161b678005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #13243 = VPUNPCKLQDQZ128rmbkz
{ 13244, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021b678005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #13244 = VPUNPCKLQDQZ128rmk
{ 13245, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061b678005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #13245 = VPUNPCKLQDQZ128rmkz
{ 13246, 3, 1, 0, 0, 0, 0x2001b678005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13246 = VPUNPCKLQDQZ128rr
{ 13247, 5, 1, 0, 0, 0, 0x2021b678005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #13247 = VPUNPCKLQDQZ128rrk
{ 13248, 4, 1, 0, 0, 0, 0x2061b678005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #13248 = VPUNPCKLQDQZ128rrkz
{ 13249, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009b678005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13249 = VPUNPCKLQDQZ256rm
{ 13250, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109b678005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13250 = VPUNPCKLQDQZ256rmb
{ 13251, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129b678005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #13251 = VPUNPCKLQDQZ256rmbk
{ 13252, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169b678005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #13252 = VPUNPCKLQDQZ256rmbkz
{ 13253, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029b678005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #13253 = VPUNPCKLQDQZ256rmk
{ 13254, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069b678005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #13254 = VPUNPCKLQDQZ256rmkz
{ 13255, 3, 1, 0, 0, 0, 0x4009b678005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13255 = VPUNPCKLQDQZ256rr
{ 13256, 5, 1, 0, 0, 0, 0x4029b678005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #13256 = VPUNPCKLQDQZ256rrk
{ 13257, 4, 1, 0, 0, 0, 0x4069b678005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #13257 = VPUNPCKLQDQZ256rrkz
{ 13258, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081b678005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13258 = VPUNPCKLQDQZrm
{ 13259, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181b678005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13259 = VPUNPCKLQDQZrmb
{ 13260, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1b678005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #13260 = VPUNPCKLQDQZrmbk
{ 13261, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1b678005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #13261 = VPUNPCKLQDQZrmbkz
{ 13262, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1b678005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #13262 = VPUNPCKLQDQZrmk
{ 13263, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1b678005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #13263 = VPUNPCKLQDQZrmkz
{ 13264, 3, 1, 0, 0, 0, 0x8081b678005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13264 = VPUNPCKLQDQZrr
{ 13265, 5, 1, 0, 0, 0, 0x80a1b678005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #13265 = VPUNPCKLQDQZrrk
{ 13266, 4, 1, 0, 0, 0, 0x80e1b678005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #13266 = VPUNPCKLQDQZrrkz
{ 13267, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x13638005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13267 = VPUNPCKLQDQrm
{ 13268, 3, 1, 0, 439, 0, 0x13638005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13268 = VPUNPCKLQDQrr
{ 13269, 7, 1, 0, 275, 0|(1ULL<<MCID::MayLoad), 0x930b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13269 = VPUNPCKLWDYrm
{ 13270, 3, 1, 0, 276, 0, 0x930b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13270 = VPUNPCKLWDYrr
{ 13271, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200130f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13271 = VPUNPCKLWDZ128rm
{ 13272, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202130f8005006ULL, nullptr, nullptr, OperandInfo702, -1 ,nullptr }, // Inst #13272 = VPUNPCKLWDZ128rmk
{ 13273, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206130f8005006ULL, nullptr, nullptr, OperandInfo703, -1 ,nullptr }, // Inst #13273 = VPUNPCKLWDZ128rmkz
{ 13274, 3, 1, 0, 0, 0, 0x200130f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13274 = VPUNPCKLWDZ128rr
{ 13275, 5, 1, 0, 0, 0, 0x202130f8005005ULL, nullptr, nullptr, OperandInfo704, -1 ,nullptr }, // Inst #13275 = VPUNPCKLWDZ128rrk
{ 13276, 4, 1, 0, 0, 0, 0x206130f8005005ULL, nullptr, nullptr, OperandInfo705, -1 ,nullptr }, // Inst #13276 = VPUNPCKLWDZ128rrkz
{ 13277, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400930f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13277 = VPUNPCKLWDZ256rm
{ 13278, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402930f8005006ULL, nullptr, nullptr, OperandInfo706, -1 ,nullptr }, // Inst #13278 = VPUNPCKLWDZ256rmk
{ 13279, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406930f8005006ULL, nullptr, nullptr, OperandInfo707, -1 ,nullptr }, // Inst #13279 = VPUNPCKLWDZ256rmkz
{ 13280, 3, 1, 0, 0, 0, 0x400930f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13280 = VPUNPCKLWDZ256rr
{ 13281, 5, 1, 0, 0, 0, 0x402930f8005005ULL, nullptr, nullptr, OperandInfo708, -1 ,nullptr }, // Inst #13281 = VPUNPCKLWDZ256rrk
{ 13282, 4, 1, 0, 0, 0, 0x406930f8005005ULL, nullptr, nullptr, OperandInfo709, -1 ,nullptr }, // Inst #13282 = VPUNPCKLWDZ256rrkz
{ 13283, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808130f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13283 = VPUNPCKLWDZrm
{ 13284, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a130f8005006ULL, nullptr, nullptr, OperandInfo710, -1 ,nullptr }, // Inst #13284 = VPUNPCKLWDZrmk
{ 13285, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e130f8005006ULL, nullptr, nullptr, OperandInfo711, -1 ,nullptr }, // Inst #13285 = VPUNPCKLWDZrmkz
{ 13286, 3, 1, 0, 0, 0, 0x808130f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13286 = VPUNPCKLWDZrr
{ 13287, 5, 1, 0, 0, 0, 0x80a130f8005005ULL, nullptr, nullptr, OperandInfo712, -1 ,nullptr }, // Inst #13287 = VPUNPCKLWDZrrk
{ 13288, 4, 1, 0, 0, 0, 0x80e130f8005005ULL, nullptr, nullptr, OperandInfo713, -1 ,nullptr }, // Inst #13288 = VPUNPCKLWDZrrkz
{ 13289, 7, 1, 0, 438, 0|(1ULL<<MCID::MayLoad), 0x130b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13289 = VPUNPCKLWDrm
{ 13290, 3, 1, 0, 439, 0, 0x130b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13290 = VPUNPCKLWDrr
{ 13291, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200177f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13291 = VPXORDZ128rm
{ 13292, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90177f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13292 = VPXORDZ128rmb
{ 13293, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92177f8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #13293 = VPXORDZ128rmbk
{ 13294, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96177f8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #13294 = VPXORDZ128rmbkz
{ 13295, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202177f8005006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #13295 = VPXORDZ128rmk
{ 13296, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206177f8005006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #13296 = VPXORDZ128rmkz
{ 13297, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x200177f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13297 = VPXORDZ128rr
{ 13298, 5, 1, 0, 0, 0, 0x202177f8005005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #13298 = VPXORDZ128rrk
{ 13299, 4, 1, 0, 0, 0, 0x206177f8005005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #13299 = VPXORDZ128rrkz
{ 13300, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400977f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13300 = VPXORDZ256rm
{ 13301, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90977f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13301 = VPXORDZ256rmb
{ 13302, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92977f8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #13302 = VPXORDZ256rmbk
{ 13303, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96977f8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #13303 = VPXORDZ256rmbkz
{ 13304, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402977f8005006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #13304 = VPXORDZ256rmk
{ 13305, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406977f8005006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #13305 = VPXORDZ256rmkz
{ 13306, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x400977f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13306 = VPXORDZ256rr
{ 13307, 5, 1, 0, 0, 0, 0x402977f8005005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #13307 = VPXORDZ256rrk
{ 13308, 4, 1, 0, 0, 0, 0x406977f8005005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13308 = VPXORDZ256rrkz
{ 13309, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808177f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13309 = VPXORDZrm
{ 13310, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98177f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13310 = VPXORDZrmb
{ 13311, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a177f8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13311 = VPXORDZrmbk
{ 13312, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e177f8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #13312 = VPXORDZrmbkz
{ 13313, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a177f8005006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13313 = VPXORDZrmk
{ 13314, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e177f8005006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #13314 = VPXORDZrmkz
{ 13315, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x808177f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13315 = VPXORDZrr
{ 13316, 5, 1, 0, 0, 0, 0x80a177f8005005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #13316 = VPXORDZrrk
{ 13317, 4, 1, 0, 0, 0, 0x80e177f8005005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #13317 = VPXORDZrrkz
{ 13318, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001f7f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13318 = VPXORQZ128rm
{ 13319, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101f7f8005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13319 = VPXORQZ128rmb
{ 13320, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121f7f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #13320 = VPXORQZ128rmbk
{ 13321, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161f7f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #13321 = VPXORQZ128rmbkz
{ 13322, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021f7f8005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #13322 = VPXORQZ128rmk
{ 13323, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061f7f8005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #13323 = VPXORQZ128rmkz
{ 13324, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x2001f7f8005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13324 = VPXORQZ128rr
{ 13325, 5, 1, 0, 0, 0, 0x2021f7f8005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #13325 = VPXORQZ128rrk
{ 13326, 4, 1, 0, 0, 0, 0x2061f7f8005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #13326 = VPXORQZ128rrkz
{ 13327, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009f7f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13327 = VPXORQZ256rm
{ 13328, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109f7f8005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13328 = VPXORQZ256rmb
{ 13329, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129f7f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #13329 = VPXORQZ256rmbk
{ 13330, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169f7f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #13330 = VPXORQZ256rmbkz
{ 13331, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029f7f8005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #13331 = VPXORQZ256rmk
{ 13332, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069f7f8005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #13332 = VPXORQZ256rmkz
{ 13333, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x4009f7f8005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13333 = VPXORQZ256rr
{ 13334, 5, 1, 0, 0, 0, 0x4029f7f8005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #13334 = VPXORQZ256rrk
{ 13335, 4, 1, 0, 0, 0, 0x4069f7f8005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #13335 = VPXORQZ256rrkz
{ 13336, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081f7f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13336 = VPXORQZrm
{ 13337, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181f7f8005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13337 = VPXORQZrmb
{ 13338, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1f7f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #13338 = VPXORQZrmbk
{ 13339, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1f7f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #13339 = VPXORQZrmbkz
{ 13340, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1f7f8005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #13340 = VPXORQZrmk
{ 13341, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1f7f8005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #13341 = VPXORQZrmkz
{ 13342, 3, 1, 0, 0, 0|(1ULL<<MCID::Commutable), 0x8081f7f8005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13342 = VPXORQZrr
{ 13343, 5, 1, 0, 0, 0, 0x80a1f7f8005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #13343 = VPXORQZrrk
{ 13344, 4, 1, 0, 0, 0, 0x80e1f7f8005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #13344 = VPXORQZrrkz
{ 13345, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x977b8005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #13345 = VPXORYrm
{ 13346, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x977b8005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #13346 = VPXORYrr
{ 13347, 7, 1, 0, 382, 0|(1ULL<<MCID::MayLoad), 0x177b8005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13347 = VPXORrm
{ 13348, 3, 1, 0, 383, 0|(1ULL<<MCID::Commutable), 0x177b8005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13348 = VPXORrr
{ 13349, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101a87804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13349 = VRANGEPDZ128rmbi
{ 13350, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121a87804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #13350 = VRANGEPDZ128rmbik
{ 13351, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161a87804d006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr }, // Inst #13351 = VRANGEPDZ128rmbikz
{ 13352, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001a87804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13352 = VRANGEPDZ128rmi
{ 13353, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021a87804d006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #13353 = VRANGEPDZ128rmik
{ 13354, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061a87804d006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr }, // Inst #13354 = VRANGEPDZ128rmikz
{ 13355, 4, 1, 0, 0, 0, 0x2001a87804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13355 = VRANGEPDZ128rri
{ 13356, 6, 1, 0, 0, 0, 0x2021a87804d005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr }, // Inst #13356 = VRANGEPDZ128rrik
{ 13357, 5, 1, 0, 0, 0, 0x2061a87804d005ULL, nullptr, nullptr, OperandInfo343, -1 ,nullptr }, // Inst #13357 = VRANGEPDZ128rrikz
{ 13358, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109a87804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13358 = VRANGEPDZ256rmbi
{ 13359, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129a87804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #13359 = VRANGEPDZ256rmbik
{ 13360, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169a87804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #13360 = VRANGEPDZ256rmbikz
{ 13361, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009a87804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13361 = VRANGEPDZ256rmi
{ 13362, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029a87804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #13362 = VRANGEPDZ256rmik
{ 13363, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069a87804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #13363 = VRANGEPDZ256rmikz
{ 13364, 4, 1, 0, 0, 0, 0x4009a87804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #13364 = VRANGEPDZ256rri
{ 13365, 6, 1, 0, 0, 0, 0x4029a87804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #13365 = VRANGEPDZ256rrik
{ 13366, 5, 1, 0, 0, 0, 0x4069a87804d005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr }, // Inst #13366 = VRANGEPDZ256rrikz
{ 13367, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181a87804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13367 = VRANGEPDZrmbi
{ 13368, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1a87804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #13368 = VRANGEPDZrmbik
{ 13369, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1a87804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #13369 = VRANGEPDZrmbikz
{ 13370, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081a87804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13370 = VRANGEPDZrmi
{ 13371, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1a87804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #13371 = VRANGEPDZrmik
{ 13372, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1a87804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #13372 = VRANGEPDZrmikz
{ 13373, 4, 1, 0, 0, 0, 0x8081a87804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13373 = VRANGEPDZrri
{ 13374, 4, 1, 0, 0, 0, 0x1181a87804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13374 = VRANGEPDZrrib
{ 13375, 6, 1, 0, 0, 0, 0x11a1a87804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #13375 = VRANGEPDZrribk
{ 13376, 5, 1, 0, 0, 0, 0x11e1a87804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #13376 = VRANGEPDZrribkz
{ 13377, 6, 1, 0, 0, 0, 0x80a1a87804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #13377 = VRANGEPDZrrik
{ 13378, 5, 1, 0, 0, 0, 0x80e1a87804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #13378 = VRANGEPDZrrikz
{ 13379, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x901287804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13379 = VRANGEPSZ128rmbi
{ 13380, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x921287804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #13380 = VRANGEPSZ128rmbik
{ 13381, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x961287804d006ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13381 = VRANGEPSZ128rmbikz
{ 13382, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001287804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13382 = VRANGEPSZ128rmi
{ 13383, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021287804d006ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #13383 = VRANGEPSZ128rmik
{ 13384, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061287804d006ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #13384 = VRANGEPSZ128rmikz
{ 13385, 4, 1, 0, 0, 0, 0x2001287804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13385 = VRANGEPSZ128rri
{ 13386, 6, 1, 0, 0, 0, 0x2021287804d005ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr }, // Inst #13386 = VRANGEPSZ128rrik
{ 13387, 5, 1, 0, 0, 0, 0x2061287804d005ULL, nullptr, nullptr, OperandInfo330, -1 ,nullptr }, // Inst #13387 = VRANGEPSZ128rrikz
{ 13388, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x909287804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13388 = VRANGEPSZ256rmbi
{ 13389, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x929287804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13389 = VRANGEPSZ256rmbik
{ 13390, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x969287804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #13390 = VRANGEPSZ256rmbikz
{ 13391, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009287804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13391 = VRANGEPSZ256rmi
{ 13392, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029287804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13392 = VRANGEPSZ256rmik
{ 13393, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069287804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #13393 = VRANGEPSZ256rmikz
{ 13394, 4, 1, 0, 0, 0, 0x4009287804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #13394 = VRANGEPSZ256rri
{ 13395, 6, 1, 0, 0, 0, 0x4029287804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #13395 = VRANGEPSZ256rrik
{ 13396, 5, 1, 0, 0, 0, 0x4069287804d005ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr }, // Inst #13396 = VRANGEPSZ256rrikz
{ 13397, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x981287804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13397 = VRANGEPSZrmbi
{ 13398, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a1287804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #13398 = VRANGEPSZrmbik
{ 13399, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e1287804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #13399 = VRANGEPSZrmbikz
{ 13400, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081287804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13400 = VRANGEPSZrmi
{ 13401, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1287804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #13401 = VRANGEPSZrmik
{ 13402, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1287804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #13402 = VRANGEPSZrmikz
{ 13403, 4, 1, 0, 0, 0, 0x8081287804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13403 = VRANGEPSZrri
{ 13404, 4, 1, 0, 0, 0, 0x981287804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13404 = VRANGEPSZrrib
{ 13405, 6, 1, 0, 0, 0, 0x9a1287804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #13405 = VRANGEPSZrribk
{ 13406, 5, 1, 0, 0, 0, 0x9e1287804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #13406 = VRANGEPSZrribkz
{ 13407, 6, 1, 0, 0, 0, 0x80a1287804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #13407 = VRANGEPSZrrik
{ 13408, 5, 1, 0, 0, 0, 0x80e1287804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #13408 = VRANGEPSZrrikz
{ 13409, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011a8f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13409 = VRANGESDZ128rmi
{ 13410, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1011a8f804d006ULL, nullptr, nullptr, OperandInfo631, -1 ,nullptr }, // Inst #13410 = VRANGESDZ128rmi_alt
{ 13411, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1031a8f804d006ULL, nullptr, nullptr, OperandInfo632, -1 ,nullptr }, // Inst #13411 = VRANGESDZ128rmi_altk
{ 13412, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1071a8f804d006ULL, nullptr, nullptr, OperandInfo633, -1 ,nullptr }, // Inst #13412 = VRANGESDZ128rmi_altkz
{ 13413, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031a8f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #13413 = VRANGESDZ128rmik
{ 13414, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071a8f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr }, // Inst #13414 = VRANGESDZ128rmikz
{ 13415, 4, 1, 0, 0, 0, 0x1011a8f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13415 = VRANGESDZ128rri
{ 13416, 4, 1, 0, 0, 0, 0x1111a8f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13416 = VRANGESDZ128rrib
{ 13417, 6, 1, 0, 0, 0, 0x1131a8f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13417 = VRANGESDZ128rribk
{ 13418, 5, 1, 0, 0, 0, 0x1171a8f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13418 = VRANGESDZ128rribkz
{ 13419, 6, 1, 0, 0, 0, 0x1031a8f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13419 = VRANGESDZ128rrik
{ 13420, 5, 1, 0, 0, 0, 0x1071a8f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13420 = VRANGESDZ128rrikz
{ 13421, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81128f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13421 = VRANGESSZ128rmi
{ 13422, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x81128f804d006ULL, nullptr, nullptr, OperandInfo635, -1 ,nullptr }, // Inst #13422 = VRANGESSZ128rmi_alt
{ 13423, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x83128f804d006ULL, nullptr, nullptr, OperandInfo636, -1 ,nullptr }, // Inst #13423 = VRANGESSZ128rmi_altk
{ 13424, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x87128f804d006ULL, nullptr, nullptr, OperandInfo637, -1 ,nullptr }, // Inst #13424 = VRANGESSZ128rmi_altkz
{ 13425, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x83128f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #13425 = VRANGESSZ128rmik
{ 13426, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x87128f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr }, // Inst #13426 = VRANGESSZ128rmikz
{ 13427, 4, 1, 0, 0, 0, 0x81128f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13427 = VRANGESSZ128rri
{ 13428, 4, 1, 0, 0, 0, 0x91128f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13428 = VRANGESSZ128rrib
{ 13429, 6, 1, 0, 0, 0, 0x93128f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13429 = VRANGESSZ128rribk
{ 13430, 5, 1, 0, 0, 0, 0x97128f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13430 = VRANGESSZ128rribkz
{ 13431, 6, 1, 0, 0, 0, 0x83128f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13431 = VRANGESSZ128rrik
{ 13432, 5, 1, 0, 0, 0, 0x87128f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13432 = VRANGESSZ128rrikz
{ 13433, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000a660009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #13433 = VRCP14PDZ128m
{ 13434, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100a660009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #13434 = VRCP14PDZ128mb
{ 13435, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120a660009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #13435 = VRCP14PDZ128mbk
{ 13436, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160a660009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #13436 = VRCP14PDZ128mbkz
{ 13437, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020a660009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #13437 = VRCP14PDZ128mk
{ 13438, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060a660009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #13438 = VRCP14PDZ128mkz
{ 13439, 2, 1, 0, 0, 0, 0x2000a660009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #13439 = VRCP14PDZ128r
{ 13440, 4, 1, 0, 0, 0, 0x2020a660009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #13440 = VRCP14PDZ128rk
{ 13441, 3, 1, 0, 0, 0, 0x2060a660009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #13441 = VRCP14PDZ128rkz
{ 13442, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008a660009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #13442 = VRCP14PDZ256m
{ 13443, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108a660009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #13443 = VRCP14PDZ256mb
{ 13444, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128a660009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #13444 = VRCP14PDZ256mbk
{ 13445, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168a660009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #13445 = VRCP14PDZ256mbkz
{ 13446, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028a660009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #13446 = VRCP14PDZ256mk
{ 13447, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068a660009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #13447 = VRCP14PDZ256mkz
{ 13448, 2, 1, 0, 0, 0, 0x4008a660009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #13448 = VRCP14PDZ256r
{ 13449, 4, 1, 0, 0, 0, 0x4028a660009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #13449 = VRCP14PDZ256rk
{ 13450, 3, 1, 0, 0, 0, 0x4068a660009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #13450 = VRCP14PDZ256rkz
{ 13451, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080a660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13451 = VRCP14PDZm
{ 13452, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180a660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13452 = VRCP14PDZmb
{ 13453, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0a660009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #13453 = VRCP14PDZmbk
{ 13454, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0a660009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #13454 = VRCP14PDZmbkz
{ 13455, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0a660009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #13455 = VRCP14PDZmk
{ 13456, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0a660009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #13456 = VRCP14PDZmkz
{ 13457, 2, 1, 0, 0, 0, 0x8080a660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13457 = VRCP14PDZr
{ 13458, 4, 1, 0, 0, 0, 0x80a0a660009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #13458 = VRCP14PDZrk
{ 13459, 3, 1, 0, 0, 0, 0x80e0a660009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #13459 = VRCP14PDZrkz
{ 13460, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20002660009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #13460 = VRCP14PSZ128m
{ 13461, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002660009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #13461 = VRCP14PSZ128mb
{ 13462, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202660009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #13462 = VRCP14PSZ128mbk
{ 13463, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602660009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #13463 = VRCP14PSZ128mbkz
{ 13464, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20202660009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #13464 = VRCP14PSZ128mk
{ 13465, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20602660009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #13465 = VRCP14PSZ128mkz
{ 13466, 2, 1, 0, 0, 0, 0x20002660009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #13466 = VRCP14PSZ128r
{ 13467, 4, 1, 0, 0, 0, 0x20202660009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #13467 = VRCP14PSZ128rk
{ 13468, 3, 1, 0, 0, 0, 0x20602660009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #13468 = VRCP14PSZ128rkz
{ 13469, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40082660009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #13469 = VRCP14PSZ256m
{ 13470, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082660009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #13470 = VRCP14PSZ256mb
{ 13471, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282660009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #13471 = VRCP14PSZ256mbk
{ 13472, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682660009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #13472 = VRCP14PSZ256mbkz
{ 13473, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40282660009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #13473 = VRCP14PSZ256mk
{ 13474, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40682660009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #13474 = VRCP14PSZ256mkz
{ 13475, 2, 1, 0, 0, 0, 0x40082660009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #13475 = VRCP14PSZ256r
{ 13476, 4, 1, 0, 0, 0, 0x40282660009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #13476 = VRCP14PSZ256rk
{ 13477, 3, 1, 0, 0, 0, 0x40682660009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #13477 = VRCP14PSZ256rkz
{ 13478, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80802660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13478 = VRCP14PSZm
{ 13479, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13479 = VRCP14PSZmb
{ 13480, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02660009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #13480 = VRCP14PSZmbk
{ 13481, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02660009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #13481 = VRCP14PSZmbkz
{ 13482, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a02660009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #13482 = VRCP14PSZmk
{ 13483, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e02660009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #13483 = VRCP14PSZmkz
{ 13484, 2, 1, 0, 0, 0, 0x80802660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13484 = VRCP14PSZr
{ 13485, 4, 1, 0, 0, 0, 0x80a02660009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #13485 = VRCP14PSZrk
{ 13486, 3, 1, 0, 0, 0, 0x80e02660009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #13486 = VRCP14PSZrkz
{ 13487, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1001a6e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13487 = VRCP14SDrm
{ 13488, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1021a6e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13488 = VRCP14SDrmk
{ 13489, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1061a6e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13489 = VRCP14SDrmkz
{ 13490, 3, 1, 0, 0, 0, 0x1001a6e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13490 = VRCP14SDrr
{ 13491, 5, 1, 0, 0, 0, 0x1021a6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13491 = VRCP14SDrrk
{ 13492, 4, 1, 0, 0, 0, 0x1061a6e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13492 = VRCP14SDrrkz
{ 13493, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80126e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13493 = VRCP14SSrm
{ 13494, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82126e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13494 = VRCP14SSrmk
{ 13495, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86126e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13495 = VRCP14SSrmkz
{ 13496, 3, 1, 0, 0, 0, 0x80126e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13496 = VRCP14SSrr
{ 13497, 5, 1, 0, 0, 0, 0x82126e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13497 = VRCP14SSrrk
{ 13498, 4, 1, 0, 0, 0, 0x86126e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13498 = VRCP14SSrrkz
{ 13499, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080e560009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13499 = VRCP28PDm
{ 13500, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180e560009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13500 = VRCP28PDmb
{ 13501, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0e560009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #13501 = VRCP28PDmbk
{ 13502, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0e560009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #13502 = VRCP28PDmbkz
{ 13503, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0e560009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #13503 = VRCP28PDmk
{ 13504, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0e560009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #13504 = VRCP28PDmkz
{ 13505, 2, 1, 0, 0, 0, 0x8080e560009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13505 = VRCP28PDr
{ 13506, 2, 1, 0, 0, 0, 0x1180e560009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13506 = VRCP28PDrb
{ 13507, 4, 1, 0, 0, 0, 0x11a0e560009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #13507 = VRCP28PDrbk
{ 13508, 3, 1, 0, 0, 0, 0x11e0e560009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #13508 = VRCP28PDrbkz
{ 13509, 4, 1, 0, 0, 0, 0x80a0e560009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #13509 = VRCP28PDrk
{ 13510, 3, 1, 0, 0, 0, 0x80e0e560009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #13510 = VRCP28PDrkz
{ 13511, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80806560009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13511 = VRCP28PSm
{ 13512, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9806560009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13512 = VRCP28PSmb
{ 13513, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a06560009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #13513 = VRCP28PSmbk
{ 13514, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e06560009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #13514 = VRCP28PSmbkz
{ 13515, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a06560009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #13515 = VRCP28PSmk
{ 13516, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e06560009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #13516 = VRCP28PSmkz
{ 13517, 2, 1, 0, 0, 0, 0x80806560009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13517 = VRCP28PSr
{ 13518, 2, 1, 0, 0, 0, 0x9806560009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13518 = VRCP28PSrb
{ 13519, 4, 1, 0, 0, 0, 0x9a06560009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #13519 = VRCP28PSrbk
{ 13520, 3, 1, 0, 0, 0, 0x9e06560009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #13520 = VRCP28PSrbkz
{ 13521, 4, 1, 0, 0, 0, 0x80a06560009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #13521 = VRCP28PSrk
{ 13522, 3, 1, 0, 0, 0, 0x80e06560009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #13522 = VRCP28PSrkz
{ 13523, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1001e5e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13523 = VRCP28SDm
{ 13524, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1021e5e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13524 = VRCP28SDmk
{ 13525, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1061e5e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13525 = VRCP28SDmkz
{ 13526, 3, 1, 0, 0, 0, 0x1001e5e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13526 = VRCP28SDr
{ 13527, 3, 1, 0, 0, 0, 0x1101e5e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13527 = VRCP28SDrb
{ 13528, 5, 1, 0, 0, 0, 0x1121e5e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13528 = VRCP28SDrbk
{ 13529, 4, 1, 0, 0, 0, 0x1161e5e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13529 = VRCP28SDrbkz
{ 13530, 5, 1, 0, 0, 0, 0x1021e5e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13530 = VRCP28SDrk
{ 13531, 4, 1, 0, 0, 0, 0x1061e5e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13531 = VRCP28SDrkz
{ 13532, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80165e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13532 = VRCP28SSm
{ 13533, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82165e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13533 = VRCP28SSmk
{ 13534, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86165e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13534 = VRCP28SSmkz
{ 13535, 3, 1, 0, 0, 0, 0x80165e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13535 = VRCP28SSr
{ 13536, 3, 1, 0, 0, 0, 0x90165e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13536 = VRCP28SSrb
{ 13537, 5, 1, 0, 0, 0, 0x92165e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13537 = VRCP28SSrbk
{ 13538, 4, 1, 0, 0, 0, 0x96165e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13538 = VRCP28SSrbkz
{ 13539, 5, 1, 0, 0, 0, 0x82165e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13539 = VRCP28SSrk
{ 13540, 4, 1, 0, 0, 0, 0x86165e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13540 = VRCP28SSrkz
{ 13541, 6, 1, 0, 915, 0|(1ULL<<MCID::MayLoad), 0x829a8004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #13541 = VRCPPSYm
{ 13542, 2, 1, 0, 914, 0, 0x829a8004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #13542 = VRCPPSYr
{ 13543, 6, 1, 0, 449, 0|(1ULL<<MCID::MayLoad), 0x29a8004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #13543 = VRCPPSm
{ 13544, 2, 1, 0, 450, 0, 0x29a8004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #13544 = VRCPPSr
{ 13545, 7, 1, 0, 451, 0|(1ULL<<MCID::MayLoad), 0x1129a8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #13545 = VRCPSSm
{ 13546, 7, 1, 0, 452, 0|(1ULL<<MCID::MayLoad), 0x1129a0005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13546 = VRCPSSm_Int
{ 13547, 3, 1, 0, 453, 0, 0x1129a8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #13547 = VRCPSSr
{ 13548, 3, 1, 0, 577, 0, 0x1129a0005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13548 = VRCPSSr_Int
{ 13549, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100ab7804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #13549 = VREDUCEPDZ128rmbi
{ 13550, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120ab7804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #13550 = VREDUCEPDZ128rmbik
{ 13551, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160ab7804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #13551 = VREDUCEPDZ128rmbikz
{ 13552, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000ab7804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #13552 = VREDUCEPDZ128rmi
{ 13553, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020ab7804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #13553 = VREDUCEPDZ128rmik
{ 13554, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060ab7804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #13554 = VREDUCEPDZ128rmikz
{ 13555, 3, 1, 0, 0, 0, 0x2000ab7804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #13555 = VREDUCEPDZ128rri
{ 13556, 5, 1, 0, 0, 0, 0x2020ab7804d005ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #13556 = VREDUCEPDZ128rrik
{ 13557, 4, 1, 0, 0, 0, 0x2060ab7804d005ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #13557 = VREDUCEPDZ128rrikz
{ 13558, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108ab7804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #13558 = VREDUCEPDZ256rmbi
{ 13559, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128ab7804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #13559 = VREDUCEPDZ256rmbik
{ 13560, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168ab7804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #13560 = VREDUCEPDZ256rmbikz
{ 13561, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008ab7804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #13561 = VREDUCEPDZ256rmi
{ 13562, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028ab7804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #13562 = VREDUCEPDZ256rmik
{ 13563, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068ab7804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #13563 = VREDUCEPDZ256rmikz
{ 13564, 3, 1, 0, 0, 0, 0x4008ab7804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #13564 = VREDUCEPDZ256rri
{ 13565, 5, 1, 0, 0, 0, 0x4028ab7804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #13565 = VREDUCEPDZ256rrik
{ 13566, 4, 1, 0, 0, 0, 0x4068ab7804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #13566 = VREDUCEPDZ256rrikz
{ 13567, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180ab7804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #13567 = VREDUCEPDZrmbi
{ 13568, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0ab7804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #13568 = VREDUCEPDZrmbik
{ 13569, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0ab7804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #13569 = VREDUCEPDZrmbikz
{ 13570, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080ab7804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #13570 = VREDUCEPDZrmi
{ 13571, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0ab7804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #13571 = VREDUCEPDZrmik
{ 13572, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0ab7804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #13572 = VREDUCEPDZrmikz
{ 13573, 3, 1, 0, 0, 0, 0x8080ab7804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #13573 = VREDUCEPDZrri
{ 13574, 3, 1, 0, 0, 0, 0x1180ab7804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #13574 = VREDUCEPDZrrib
{ 13575, 5, 1, 0, 0, 0, 0x11a0ab7804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #13575 = VREDUCEPDZrribk
{ 13576, 4, 1, 0, 0, 0, 0x11e0ab7804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #13576 = VREDUCEPDZrribkz
{ 13577, 5, 1, 0, 0, 0, 0x80a0ab7804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #13577 = VREDUCEPDZrrik
{ 13578, 4, 1, 0, 0, 0, 0x80e0ab7804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #13578 = VREDUCEPDZrrikz
{ 13579, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002b7804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #13579 = VREDUCEPSZ128rmbi
{ 13580, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202b7804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #13580 = VREDUCEPSZ128rmbik
{ 13581, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602b7804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #13581 = VREDUCEPSZ128rmbikz
{ 13582, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20002b7804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #13582 = VREDUCEPSZ128rmi
{ 13583, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20202b7804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #13583 = VREDUCEPSZ128rmik
{ 13584, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20602b7804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #13584 = VREDUCEPSZ128rmikz
{ 13585, 3, 1, 0, 0, 0, 0x20002b7804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #13585 = VREDUCEPSZ128rri
{ 13586, 5, 1, 0, 0, 0, 0x20202b7804d005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #13586 = VREDUCEPSZ128rrik
{ 13587, 4, 1, 0, 0, 0, 0x20602b7804d005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #13587 = VREDUCEPSZ128rrikz
{ 13588, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082b7804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #13588 = VREDUCEPSZ256rmbi
{ 13589, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282b7804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #13589 = VREDUCEPSZ256rmbik
{ 13590, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682b7804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #13590 = VREDUCEPSZ256rmbikz
{ 13591, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40082b7804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #13591 = VREDUCEPSZ256rmi
{ 13592, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40282b7804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #13592 = VREDUCEPSZ256rmik
{ 13593, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40682b7804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #13593 = VREDUCEPSZ256rmikz
{ 13594, 3, 1, 0, 0, 0, 0x40082b7804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #13594 = VREDUCEPSZ256rri
{ 13595, 5, 1, 0, 0, 0, 0x40282b7804d005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #13595 = VREDUCEPSZ256rrik
{ 13596, 4, 1, 0, 0, 0, 0x40682b7804d005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #13596 = VREDUCEPSZ256rrikz
{ 13597, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802b7804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #13597 = VREDUCEPSZrmbi
{ 13598, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02b7804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #13598 = VREDUCEPSZrmbik
{ 13599, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02b7804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #13599 = VREDUCEPSZrmbikz
{ 13600, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80802b7804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #13600 = VREDUCEPSZrmi
{ 13601, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a02b7804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #13601 = VREDUCEPSZrmik
{ 13602, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e02b7804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #13602 = VREDUCEPSZrmikz
{ 13603, 3, 1, 0, 0, 0, 0x80802b7804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #13603 = VREDUCEPSZrri
{ 13604, 3, 1, 0, 0, 0, 0x9802b7804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #13604 = VREDUCEPSZrrib
{ 13605, 5, 1, 0, 0, 0, 0x9a02b7804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #13605 = VREDUCEPSZrribk
{ 13606, 4, 1, 0, 0, 0, 0x9e02b7804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #13606 = VREDUCEPSZrribkz
{ 13607, 5, 1, 0, 0, 0, 0x80a02b7804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #13607 = VREDUCEPSZrrik
{ 13608, 4, 1, 0, 0, 0, 0x80e02b7804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #13608 = VREDUCEPSZrrikz
{ 13609, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011abf804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13609 = VREDUCESDZ128rmi
{ 13610, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1011abf804d006ULL, nullptr, nullptr, OperandInfo631, -1 ,nullptr }, // Inst #13610 = VREDUCESDZ128rmi_alt
{ 13611, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1031abf804d006ULL, nullptr, nullptr, OperandInfo632, -1 ,nullptr }, // Inst #13611 = VREDUCESDZ128rmi_altk
{ 13612, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1071abf804d006ULL, nullptr, nullptr, OperandInfo633, -1 ,nullptr }, // Inst #13612 = VREDUCESDZ128rmi_altkz
{ 13613, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031abf804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #13613 = VREDUCESDZ128rmik
{ 13614, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071abf804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr }, // Inst #13614 = VREDUCESDZ128rmikz
{ 13615, 4, 1, 0, 0, 0, 0x1011abf804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13615 = VREDUCESDZ128rri
{ 13616, 4, 1, 0, 0, 0, 0x1111abf804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13616 = VREDUCESDZ128rrib
{ 13617, 6, 1, 0, 0, 0, 0x1131abf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13617 = VREDUCESDZ128rribk
{ 13618, 5, 1, 0, 0, 0, 0x1171abf804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13618 = VREDUCESDZ128rribkz
{ 13619, 6, 1, 0, 0, 0, 0x1031abf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13619 = VREDUCESDZ128rrik
{ 13620, 5, 1, 0, 0, 0, 0x1071abf804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13620 = VREDUCESDZ128rrikz
{ 13621, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8112bf804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13621 = VREDUCESSZ128rmi
{ 13622, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8112bf804d006ULL, nullptr, nullptr, OperandInfo635, -1 ,nullptr }, // Inst #13622 = VREDUCESSZ128rmi_alt
{ 13623, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8312bf804d006ULL, nullptr, nullptr, OperandInfo636, -1 ,nullptr }, // Inst #13623 = VREDUCESSZ128rmi_altk
{ 13624, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x8712bf804d006ULL, nullptr, nullptr, OperandInfo637, -1 ,nullptr }, // Inst #13624 = VREDUCESSZ128rmi_altkz
{ 13625, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8312bf804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #13625 = VREDUCESSZ128rmik
{ 13626, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8712bf804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr }, // Inst #13626 = VREDUCESSZ128rmikz
{ 13627, 4, 1, 0, 0, 0, 0x8112bf804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13627 = VREDUCESSZ128rri
{ 13628, 4, 1, 0, 0, 0, 0x9112bf804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13628 = VREDUCESSZ128rrib
{ 13629, 6, 1, 0, 0, 0, 0x9312bf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13629 = VREDUCESSZ128rribk
{ 13630, 5, 1, 0, 0, 0, 0x9712bf804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13630 = VREDUCESSZ128rribkz
{ 13631, 6, 1, 0, 0, 0, 0x8312bf804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13631 = VREDUCESSZ128rrik
{ 13632, 5, 1, 0, 0, 0, 0x8712bf804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13632 = VREDUCESSZ128rrikz
{ 13633, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110084f804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #13633 = VRNDSCALEPDZ128rmbi
{ 13634, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112084f804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #13634 = VRNDSCALEPDZ128rmbik
{ 13635, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116084f804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #13635 = VRNDSCALEPDZ128rmbikz
{ 13636, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200084f804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #13636 = VRNDSCALEPDZ128rmi
{ 13637, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202084f804d006ULL, nullptr, nullptr, OperandInfo608, -1 ,nullptr }, // Inst #13637 = VRNDSCALEPDZ128rmik
{ 13638, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206084f804d006ULL, nullptr, nullptr, OperandInfo609, -1 ,nullptr }, // Inst #13638 = VRNDSCALEPDZ128rmikz
{ 13639, 3, 1, 0, 0, 0, 0x200084f804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #13639 = VRNDSCALEPDZ128rri
{ 13640, 5, 1, 0, 0, 0, 0x202084f804d005ULL, nullptr, nullptr, OperandInfo610, -1 ,nullptr }, // Inst #13640 = VRNDSCALEPDZ128rrik
{ 13641, 4, 1, 0, 0, 0, 0x206084f804d005ULL, nullptr, nullptr, OperandInfo611, -1 ,nullptr }, // Inst #13641 = VRNDSCALEPDZ128rrikz
{ 13642, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110884f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #13642 = VRNDSCALEPDZ256rmbi
{ 13643, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112884f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #13643 = VRNDSCALEPDZ256rmbik
{ 13644, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116884f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #13644 = VRNDSCALEPDZ256rmbikz
{ 13645, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400884f804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #13645 = VRNDSCALEPDZ256rmi
{ 13646, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402884f804d006ULL, nullptr, nullptr, OperandInfo613, -1 ,nullptr }, // Inst #13646 = VRNDSCALEPDZ256rmik
{ 13647, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406884f804d006ULL, nullptr, nullptr, OperandInfo614, -1 ,nullptr }, // Inst #13647 = VRNDSCALEPDZ256rmikz
{ 13648, 3, 1, 0, 0, 0, 0x400884f804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #13648 = VRNDSCALEPDZ256rri
{ 13649, 5, 1, 0, 0, 0, 0x402884f804d005ULL, nullptr, nullptr, OperandInfo616, -1 ,nullptr }, // Inst #13649 = VRNDSCALEPDZ256rrik
{ 13650, 4, 1, 0, 0, 0, 0x406884f804d005ULL, nullptr, nullptr, OperandInfo617, -1 ,nullptr }, // Inst #13650 = VRNDSCALEPDZ256rrikz
{ 13651, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118084f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #13651 = VRNDSCALEPDZrmbi
{ 13652, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a084f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #13652 = VRNDSCALEPDZrmbik
{ 13653, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e084f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #13653 = VRNDSCALEPDZrmbikz
{ 13654, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808084f804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #13654 = VRNDSCALEPDZrmi
{ 13655, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a084f804d006ULL, nullptr, nullptr, OperandInfo619, -1 ,nullptr }, // Inst #13655 = VRNDSCALEPDZrmik
{ 13656, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e084f804d006ULL, nullptr, nullptr, OperandInfo620, -1 ,nullptr }, // Inst #13656 = VRNDSCALEPDZrmikz
{ 13657, 3, 1, 0, 0, 0, 0x808084f804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #13657 = VRNDSCALEPDZrri
{ 13658, 3, 1, 0, 0, 0, 0x118084f804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #13658 = VRNDSCALEPDZrrib
{ 13659, 5, 1, 0, 0, 0, 0x11a084f804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #13659 = VRNDSCALEPDZrribk
{ 13660, 4, 1, 0, 0, 0, 0x11e084f804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #13660 = VRNDSCALEPDZrribkz
{ 13661, 5, 1, 0, 0, 0, 0x80a084f804d005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #13661 = VRNDSCALEPDZrrik
{ 13662, 4, 1, 0, 0, 0, 0x80e084f804d005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #13662 = VRNDSCALEPDZrrikz
{ 13663, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x900047804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #13663 = VRNDSCALEPSZ128rmbi
{ 13664, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x920047804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #13664 = VRNDSCALEPSZ128rmbik
{ 13665, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x960047804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #13665 = VRNDSCALEPSZ128rmbikz
{ 13666, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000047804d006ULL, nullptr, nullptr, OperandInfo607, -1 ,nullptr }, // Inst #13666 = VRNDSCALEPSZ128rmi
{ 13667, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020047804d006ULL, nullptr, nullptr, OperandInfo621, -1 ,nullptr }, // Inst #13667 = VRNDSCALEPSZ128rmik
{ 13668, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060047804d006ULL, nullptr, nullptr, OperandInfo622, -1 ,nullptr }, // Inst #13668 = VRNDSCALEPSZ128rmikz
{ 13669, 3, 1, 0, 0, 0, 0x2000047804d005ULL, nullptr, nullptr, OperandInfo468, -1 ,nullptr }, // Inst #13669 = VRNDSCALEPSZ128rri
{ 13670, 5, 1, 0, 0, 0, 0x2020047804d005ULL, nullptr, nullptr, OperandInfo623, -1 ,nullptr }, // Inst #13670 = VRNDSCALEPSZ128rrik
{ 13671, 4, 1, 0, 0, 0, 0x2060047804d005ULL, nullptr, nullptr, OperandInfo624, -1 ,nullptr }, // Inst #13671 = VRNDSCALEPSZ128rrikz
{ 13672, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x908047804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #13672 = VRNDSCALEPSZ256rmbi
{ 13673, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x928047804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #13673 = VRNDSCALEPSZ256rmbik
{ 13674, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x968047804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #13674 = VRNDSCALEPSZ256rmbikz
{ 13675, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008047804d006ULL, nullptr, nullptr, OperandInfo612, -1 ,nullptr }, // Inst #13675 = VRNDSCALEPSZ256rmi
{ 13676, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028047804d006ULL, nullptr, nullptr, OperandInfo625, -1 ,nullptr }, // Inst #13676 = VRNDSCALEPSZ256rmik
{ 13677, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068047804d006ULL, nullptr, nullptr, OperandInfo626, -1 ,nullptr }, // Inst #13677 = VRNDSCALEPSZ256rmikz
{ 13678, 3, 1, 0, 0, 0, 0x4008047804d005ULL, nullptr, nullptr, OperandInfo615, -1 ,nullptr }, // Inst #13678 = VRNDSCALEPSZ256rri
{ 13679, 5, 1, 0, 0, 0, 0x4028047804d005ULL, nullptr, nullptr, OperandInfo627, -1 ,nullptr }, // Inst #13679 = VRNDSCALEPSZ256rrik
{ 13680, 4, 1, 0, 0, 0, 0x4068047804d005ULL, nullptr, nullptr, OperandInfo628, -1 ,nullptr }, // Inst #13680 = VRNDSCALEPSZ256rrikz
{ 13681, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x980047804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #13681 = VRNDSCALEPSZrmbi
{ 13682, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a0047804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #13682 = VRNDSCALEPSZrmbik
{ 13683, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e0047804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #13683 = VRNDSCALEPSZrmbikz
{ 13684, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080047804d006ULL, nullptr, nullptr, OperandInfo618, -1 ,nullptr }, // Inst #13684 = VRNDSCALEPSZrmi
{ 13685, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0047804d006ULL, nullptr, nullptr, OperandInfo629, -1 ,nullptr }, // Inst #13685 = VRNDSCALEPSZrmik
{ 13686, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0047804d006ULL, nullptr, nullptr, OperandInfo630, -1 ,nullptr }, // Inst #13686 = VRNDSCALEPSZrmikz
{ 13687, 3, 1, 0, 0, 0, 0x8080047804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #13687 = VRNDSCALEPSZrri
{ 13688, 3, 1, 0, 0, 0, 0x980047804d005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #13688 = VRNDSCALEPSZrrib
{ 13689, 5, 1, 0, 0, 0, 0x9a0047804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #13689 = VRNDSCALEPSZrribk
{ 13690, 4, 1, 0, 0, 0, 0x9e0047804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #13690 = VRNDSCALEPSZrribkz
{ 13691, 5, 1, 0, 0, 0, 0x80a0047804d005ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #13691 = VRNDSCALEPSZrrik
{ 13692, 4, 1, 0, 0, 0, 0x80e0047804d005ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #13692 = VRNDSCALEPSZrrikz
{ 13693, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100185f804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13693 = VRNDSCALESDm
{ 13694, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x102185f804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #13694 = VRNDSCALESDmk
{ 13695, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x106185f804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr }, // Inst #13695 = VRNDSCALESDmkz
{ 13696, 4, 1, 0, 0, 0, 0x100185f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13696 = VRNDSCALESDr
{ 13697, 4, 1, 0, 0, 0, 0x110185f804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13697 = VRNDSCALESDrb
{ 13698, 6, 1, 0, 0, 0, 0x112185f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13698 = VRNDSCALESDrbk
{ 13699, 5, 1, 0, 0, 0, 0x116185f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13699 = VRNDSCALESDrbkz
{ 13700, 6, 1, 0, 0, 0, 0x102185f804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13700 = VRNDSCALESDrk
{ 13701, 5, 1, 0, 0, 0, 0x106185f804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13701 = VRNDSCALESDrkz
{ 13702, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x801057804d006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #13702 = VRNDSCALESSm
{ 13703, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x821057804d006ULL, nullptr, nullptr, OperandInfo539, -1 ,nullptr }, // Inst #13703 = VRNDSCALESSmk
{ 13704, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x861057804d006ULL, nullptr, nullptr, OperandInfo634, -1 ,nullptr }, // Inst #13704 = VRNDSCALESSmkz
{ 13705, 4, 1, 0, 0, 0, 0x801057804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13705 = VRNDSCALESSr
{ 13706, 4, 1, 0, 0, 0, 0x901057804d005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13706 = VRNDSCALESSrb
{ 13707, 6, 1, 0, 0, 0, 0x921057804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13707 = VRNDSCALESSrbk
{ 13708, 5, 1, 0, 0, 0, 0x961057804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13708 = VRNDSCALESSrbkz
{ 13709, 6, 1, 0, 0, 0, 0x821057804d005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13709 = VRNDSCALESSrk
{ 13710, 5, 1, 0, 0, 0, 0x861057804d005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13710 = VRNDSCALESSrkz
{ 13711, 7, 1, 0, 918, 0|(1ULL<<MCID::MayLoad), 0x4b004d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #13711 = VROUNDPDm
{ 13712, 3, 1, 0, 916, 0, 0x4b004d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #13712 = VROUNDPDr
{ 13713, 7, 1, 0, 919, 0|(1ULL<<MCID::MayLoad), 0x42804d006ULL, nullptr, nullptr, OperandInfo55, -1 ,nullptr }, // Inst #13713 = VROUNDPSm
{ 13714, 3, 1, 0, 916, 0, 0x42804d005ULL, nullptr, nullptr, OperandInfo56, -1 ,nullptr }, // Inst #13714 = VROUNDPSr
{ 13715, 8, 1, 0, 920, 0|(1ULL<<MCID::MayLoad), 0x1105a004d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #13715 = VROUNDSDm
{ 13716, 4, 1, 0, 917, 0, 0x1105a004d005ULL, nullptr, nullptr, OperandInfo92, -1 ,nullptr }, // Inst #13716 = VROUNDSDr
{ 13717, 4, 1, 0, 917, 0, 0x1105a004d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #13717 = VROUNDSDr_Int
{ 13718, 8, 1, 0, 920, 0|(1ULL<<MCID::MayLoad), 0x11052004d006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #13718 = VROUNDSSm
{ 13719, 4, 1, 0, 917, 0, 0x11052004d005ULL, nullptr, nullptr, OperandInfo91, -1 ,nullptr }, // Inst #13719 = VROUNDSSr
{ 13720, 4, 1, 0, 917, 0, 0x11052004d005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #13720 = VROUNDSSr_Int
{ 13721, 7, 1, 0, 918, 0|(1ULL<<MCID::MayLoad), 0x804b004d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #13721 = VROUNDYPDm
{ 13722, 3, 1, 0, 916, 0, 0x804b004d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #13722 = VROUNDYPDr
{ 13723, 7, 1, 0, 919, 0|(1ULL<<MCID::MayLoad), 0x8042804d006ULL, nullptr, nullptr, OperandInfo858, -1 ,nullptr }, // Inst #13723 = VROUNDYPSm
{ 13724, 3, 1, 0, 916, 0, 0x8042804d005ULL, nullptr, nullptr, OperandInfo859, -1 ,nullptr }, // Inst #13724 = VROUNDYPSr
{ 13725, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000a760009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #13725 = VRSQRT14PDZ128m
{ 13726, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100a760009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #13726 = VRSQRT14PDZ128mb
{ 13727, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120a760009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #13727 = VRSQRT14PDZ128mbk
{ 13728, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160a760009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #13728 = VRSQRT14PDZ128mbkz
{ 13729, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020a760009006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #13729 = VRSQRT14PDZ128mk
{ 13730, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060a760009006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #13730 = VRSQRT14PDZ128mkz
{ 13731, 2, 1, 0, 0, 0, 0x2000a760009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #13731 = VRSQRT14PDZ128r
{ 13732, 4, 1, 0, 0, 0, 0x2020a760009005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #13732 = VRSQRT14PDZ128rk
{ 13733, 3, 1, 0, 0, 0, 0x2060a760009005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #13733 = VRSQRT14PDZ128rkz
{ 13734, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008a760009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #13734 = VRSQRT14PDZ256m
{ 13735, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108a760009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #13735 = VRSQRT14PDZ256mb
{ 13736, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128a760009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #13736 = VRSQRT14PDZ256mbk
{ 13737, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168a760009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #13737 = VRSQRT14PDZ256mbkz
{ 13738, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028a760009006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #13738 = VRSQRT14PDZ256mk
{ 13739, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068a760009006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #13739 = VRSQRT14PDZ256mkz
{ 13740, 2, 1, 0, 0, 0, 0x4008a760009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #13740 = VRSQRT14PDZ256r
{ 13741, 4, 1, 0, 0, 0, 0x4028a760009005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #13741 = VRSQRT14PDZ256rk
{ 13742, 3, 1, 0, 0, 0, 0x4068a760009005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #13742 = VRSQRT14PDZ256rkz
{ 13743, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080a760009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13743 = VRSQRT14PDZm
{ 13744, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180a760009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13744 = VRSQRT14PDZmb
{ 13745, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0a760009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #13745 = VRSQRT14PDZmbk
{ 13746, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0a760009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #13746 = VRSQRT14PDZmbkz
{ 13747, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0a760009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #13747 = VRSQRT14PDZmk
{ 13748, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0a760009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #13748 = VRSQRT14PDZmkz
{ 13749, 2, 1, 0, 0, 0, 0x8080a760009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13749 = VRSQRT14PDZr
{ 13750, 4, 1, 0, 0, 0, 0x80a0a760009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #13750 = VRSQRT14PDZrk
{ 13751, 3, 1, 0, 0, 0, 0x80e0a760009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #13751 = VRSQRT14PDZrkz
{ 13752, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20002760009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #13752 = VRSQRT14PSZ128m
{ 13753, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9002760009006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #13753 = VRSQRT14PSZ128mb
{ 13754, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9202760009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #13754 = VRSQRT14PSZ128mbk
{ 13755, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9602760009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #13755 = VRSQRT14PSZ128mbkz
{ 13756, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20202760009006ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #13756 = VRSQRT14PSZ128mk
{ 13757, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20602760009006ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #13757 = VRSQRT14PSZ128mkz
{ 13758, 2, 1, 0, 0, 0, 0x20002760009005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #13758 = VRSQRT14PSZ128r
{ 13759, 4, 1, 0, 0, 0, 0x20202760009005ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #13759 = VRSQRT14PSZ128rk
{ 13760, 3, 1, 0, 0, 0, 0x20602760009005ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #13760 = VRSQRT14PSZ128rkz
{ 13761, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40082760009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #13761 = VRSQRT14PSZ256m
{ 13762, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9082760009006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #13762 = VRSQRT14PSZ256mb
{ 13763, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9282760009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #13763 = VRSQRT14PSZ256mbk
{ 13764, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9682760009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #13764 = VRSQRT14PSZ256mbkz
{ 13765, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40282760009006ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #13765 = VRSQRT14PSZ256mk
{ 13766, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40682760009006ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #13766 = VRSQRT14PSZ256mkz
{ 13767, 2, 1, 0, 0, 0, 0x40082760009005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #13767 = VRSQRT14PSZ256r
{ 13768, 4, 1, 0, 0, 0, 0x40282760009005ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #13768 = VRSQRT14PSZ256rk
{ 13769, 3, 1, 0, 0, 0, 0x40682760009005ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #13769 = VRSQRT14PSZ256rkz
{ 13770, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80802760009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13770 = VRSQRT14PSZm
{ 13771, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9802760009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13771 = VRSQRT14PSZmb
{ 13772, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a02760009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #13772 = VRSQRT14PSZmbk
{ 13773, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e02760009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #13773 = VRSQRT14PSZmbkz
{ 13774, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a02760009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #13774 = VRSQRT14PSZmk
{ 13775, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e02760009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #13775 = VRSQRT14PSZmkz
{ 13776, 2, 1, 0, 0, 0, 0x80802760009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13776 = VRSQRT14PSZr
{ 13777, 4, 1, 0, 0, 0, 0x80a02760009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #13777 = VRSQRT14PSZrk
{ 13778, 3, 1, 0, 0, 0, 0x80e02760009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #13778 = VRSQRT14PSZrkz
{ 13779, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1001a7e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13779 = VRSQRT14SDrm
{ 13780, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1021a7e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13780 = VRSQRT14SDrmk
{ 13781, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1061a7e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13781 = VRSQRT14SDrmkz
{ 13782, 3, 1, 0, 0, 0, 0x1001a7e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13782 = VRSQRT14SDrr
{ 13783, 5, 1, 0, 0, 0, 0x1021a7e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13783 = VRSQRT14SDrrk
{ 13784, 4, 1, 0, 0, 0, 0x1061a7e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13784 = VRSQRT14SDrrkz
{ 13785, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80127e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13785 = VRSQRT14SSrm
{ 13786, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82127e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13786 = VRSQRT14SSrmk
{ 13787, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86127e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13787 = VRSQRT14SSrmkz
{ 13788, 3, 1, 0, 0, 0, 0x80127e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13788 = VRSQRT14SSrr
{ 13789, 5, 1, 0, 0, 0, 0x82127e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13789 = VRSQRT14SSrrk
{ 13790, 4, 1, 0, 0, 0, 0x86127e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13790 = VRSQRT14SSrrkz
{ 13791, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080e660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13791 = VRSQRT28PDm
{ 13792, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180e660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13792 = VRSQRT28PDmb
{ 13793, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0e660009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #13793 = VRSQRT28PDmbk
{ 13794, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0e660009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #13794 = VRSQRT28PDmbkz
{ 13795, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0e660009006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #13795 = VRSQRT28PDmk
{ 13796, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0e660009006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #13796 = VRSQRT28PDmkz
{ 13797, 2, 1, 0, 0, 0, 0x8080e660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13797 = VRSQRT28PDr
{ 13798, 2, 1, 0, 0, 0, 0x1180e660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13798 = VRSQRT28PDrb
{ 13799, 4, 1, 0, 0, 0, 0x11a0e660009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #13799 = VRSQRT28PDrbk
{ 13800, 3, 1, 0, 0, 0, 0x11e0e660009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #13800 = VRSQRT28PDrbkz
{ 13801, 4, 1, 0, 0, 0, 0x80a0e660009005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #13801 = VRSQRT28PDrk
{ 13802, 3, 1, 0, 0, 0, 0x80e0e660009005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #13802 = VRSQRT28PDrkz
{ 13803, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80806660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13803 = VRSQRT28PSm
{ 13804, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9806660009006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #13804 = VRSQRT28PSmb
{ 13805, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a06660009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #13805 = VRSQRT28PSmbk
{ 13806, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e06660009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #13806 = VRSQRT28PSmbkz
{ 13807, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a06660009006ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #13807 = VRSQRT28PSmk
{ 13808, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e06660009006ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #13808 = VRSQRT28PSmkz
{ 13809, 2, 1, 0, 0, 0, 0x80806660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13809 = VRSQRT28PSr
{ 13810, 2, 1, 0, 0, 0, 0x9806660009005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #13810 = VRSQRT28PSrb
{ 13811, 4, 1, 0, 0, 0, 0x9a06660009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #13811 = VRSQRT28PSrbk
{ 13812, 3, 1, 0, 0, 0, 0x9e06660009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #13812 = VRSQRT28PSrbkz
{ 13813, 4, 1, 0, 0, 0, 0x80a06660009005ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #13813 = VRSQRT28PSrk
{ 13814, 3, 1, 0, 0, 0, 0x80e06660009005ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #13814 = VRSQRT28PSrkz
{ 13815, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1001e6e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13815 = VRSQRT28SDm
{ 13816, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1021e6e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13816 = VRSQRT28SDmk
{ 13817, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1061e6e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13817 = VRSQRT28SDmkz
{ 13818, 3, 1, 0, 0, 0, 0x1001e6e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13818 = VRSQRT28SDr
{ 13819, 3, 1, 0, 0, 0, 0x1101e6e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13819 = VRSQRT28SDrb
{ 13820, 5, 1, 0, 0, 0, 0x1121e6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13820 = VRSQRT28SDrbk
{ 13821, 4, 1, 0, 0, 0, 0x1161e6e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13821 = VRSQRT28SDrbkz
{ 13822, 5, 1, 0, 0, 0, 0x1021e6e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13822 = VRSQRT28SDrk
{ 13823, 4, 1, 0, 0, 0, 0x1061e6e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13823 = VRSQRT28SDrkz
{ 13824, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80166e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13824 = VRSQRT28SSm
{ 13825, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82166e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13825 = VRSQRT28SSmk
{ 13826, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86166e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13826 = VRSQRT28SSmkz
{ 13827, 3, 1, 0, 0, 0, 0x80166e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13827 = VRSQRT28SSr
{ 13828, 3, 1, 0, 0, 0, 0x90166e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13828 = VRSQRT28SSrb
{ 13829, 5, 1, 0, 0, 0, 0x92166e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13829 = VRSQRT28SSrbk
{ 13830, 4, 1, 0, 0, 0, 0x96166e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13830 = VRSQRT28SSrbkz
{ 13831, 5, 1, 0, 0, 0, 0x82166e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13831 = VRSQRT28SSrk
{ 13832, 4, 1, 0, 0, 0, 0x86166e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13832 = VRSQRT28SSrkz
{ 13833, 6, 1, 0, 940, 0|(1ULL<<MCID::MayLoad), 0x82928004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #13833 = VRSQRTPSYm
{ 13834, 2, 1, 0, 939, 0, 0x82928004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #13834 = VRSQRTPSYr
{ 13835, 6, 1, 0, 936, 0|(1ULL<<MCID::MayLoad), 0x2928004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #13835 = VRSQRTPSm
{ 13836, 2, 1, 0, 932, 0, 0x2928004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #13836 = VRSQRTPSr
{ 13837, 7, 1, 0, 937, 0|(1ULL<<MCID::MayLoad), 0x112928005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #13837 = VRSQRTSSm
{ 13838, 7, 1, 0, 938, 0|(1ULL<<MCID::MayLoad), 0x112920005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #13838 = VRSQRTSSm_Int
{ 13839, 3, 1, 0, 933, 0, 0x112928005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #13839 = VRSQRTSSr
{ 13840, 3, 1, 0, 935, 0, 0x112920005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #13840 = VRSQRTSSr_Int
{ 13841, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20019660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13841 = VSCALEFPDZ128rm
{ 13842, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11019660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13842 = VSCALEFPDZ128rmb
{ 13843, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11219660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #13843 = VSCALEFPDZ128rmbk
{ 13844, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11619660009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #13844 = VSCALEFPDZ128rmbkz
{ 13845, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20219660009006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #13845 = VSCALEFPDZ128rmk
{ 13846, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20619660009006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #13846 = VSCALEFPDZ128rmkz
{ 13847, 3, 1, 0, 0, 0, 0x20019660009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13847 = VSCALEFPDZ128rr
{ 13848, 5, 1, 0, 0, 0, 0x20219660009005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #13848 = VSCALEFPDZ128rrk
{ 13849, 4, 1, 0, 0, 0, 0x20619660009005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #13849 = VSCALEFPDZ128rrkz
{ 13850, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40099660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13850 = VSCALEFPDZ256rm
{ 13851, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11099660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13851 = VSCALEFPDZ256rmb
{ 13852, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11299660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #13852 = VSCALEFPDZ256rmbk
{ 13853, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11699660009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #13853 = VSCALEFPDZ256rmbkz
{ 13854, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40299660009006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #13854 = VSCALEFPDZ256rmk
{ 13855, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40699660009006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #13855 = VSCALEFPDZ256rmkz
{ 13856, 3, 1, 0, 0, 0, 0x40099660009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13856 = VSCALEFPDZ256rr
{ 13857, 5, 1, 0, 0, 0, 0x40299660009005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #13857 = VSCALEFPDZ256rrk
{ 13858, 4, 1, 0, 0, 0, 0x40699660009005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #13858 = VSCALEFPDZ256rrkz
{ 13859, 4, 1, 0, 0, 0, 0x411819660009005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13859 = VSCALEFPDZrb
{ 13860, 6, 1, 0, 0, 0, 0x411a19660009005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #13860 = VSCALEFPDZrbk
{ 13861, 5, 1, 0, 0, 0, 0x411e19660009005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #13861 = VSCALEFPDZrbkz
{ 13862, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80819660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13862 = VSCALEFPDZrm
{ 13863, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11819660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13863 = VSCALEFPDZrmb
{ 13864, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a19660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #13864 = VSCALEFPDZrmbk
{ 13865, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e19660009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #13865 = VSCALEFPDZrmbkz
{ 13866, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a19660009006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #13866 = VSCALEFPDZrmk
{ 13867, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e19660009006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #13867 = VSCALEFPDZrmkz
{ 13868, 3, 1, 0, 0, 0, 0x80819660009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13868 = VSCALEFPDZrr
{ 13869, 5, 1, 0, 0, 0, 0x80a19660009005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #13869 = VSCALEFPDZrrk
{ 13870, 4, 1, 0, 0, 0, 0x80e19660009005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #13870 = VSCALEFPDZrrkz
{ 13871, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20011660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13871 = VSCALEFPSZ128rm
{ 13872, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9011660009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13872 = VSCALEFPSZ128rmb
{ 13873, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9211660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #13873 = VSCALEFPSZ128rmbk
{ 13874, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9611660009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #13874 = VSCALEFPSZ128rmbkz
{ 13875, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20211660009006ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #13875 = VSCALEFPSZ128rmk
{ 13876, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20611660009006ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #13876 = VSCALEFPSZ128rmkz
{ 13877, 3, 1, 0, 0, 0, 0x20011660009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13877 = VSCALEFPSZ128rr
{ 13878, 5, 1, 0, 0, 0, 0x20211660009005ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #13878 = VSCALEFPSZ128rrk
{ 13879, 4, 1, 0, 0, 0, 0x20611660009005ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #13879 = VSCALEFPSZ128rrkz
{ 13880, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40091660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13880 = VSCALEFPSZ256rm
{ 13881, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9091660009006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #13881 = VSCALEFPSZ256rmb
{ 13882, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9291660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #13882 = VSCALEFPSZ256rmbk
{ 13883, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9691660009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #13883 = VSCALEFPSZ256rmbkz
{ 13884, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40291660009006ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #13884 = VSCALEFPSZ256rmk
{ 13885, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40691660009006ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #13885 = VSCALEFPSZ256rmkz
{ 13886, 3, 1, 0, 0, 0, 0x40091660009005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #13886 = VSCALEFPSZ256rr
{ 13887, 5, 1, 0, 0, 0, 0x40291660009005ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #13887 = VSCALEFPSZ256rrk
{ 13888, 4, 1, 0, 0, 0, 0x40691660009005ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #13888 = VSCALEFPSZ256rrkz
{ 13889, 4, 1, 0, 0, 0, 0x409811660009005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13889 = VSCALEFPSZrb
{ 13890, 6, 1, 0, 0, 0, 0x409a11660009005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #13890 = VSCALEFPSZrbk
{ 13891, 5, 1, 0, 0, 0, 0x409e11660009005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #13891 = VSCALEFPSZrbkz
{ 13892, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80811660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13892 = VSCALEFPSZrm
{ 13893, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9811660009006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #13893 = VSCALEFPSZrmb
{ 13894, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a11660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13894 = VSCALEFPSZrmbk
{ 13895, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e11660009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #13895 = VSCALEFPSZrmbkz
{ 13896, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a11660009006ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #13896 = VSCALEFPSZrmk
{ 13897, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e11660009006ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #13897 = VSCALEFPSZrmkz
{ 13898, 3, 1, 0, 0, 0, 0x80811660009005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #13898 = VSCALEFPSZrr
{ 13899, 5, 1, 0, 0, 0, 0x80a11660009005ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #13899 = VSCALEFPSZrrk
{ 13900, 4, 1, 0, 0, 0, 0x80e11660009005ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #13900 = VSCALEFPSZrrkz
{ 13901, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x100196e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13901 = VSCALEFSDZ128rm
{ 13902, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x102196e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13902 = VSCALEFSDZ128rmk
{ 13903, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x106196e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13903 = VSCALEFSDZ128rmkz
{ 13904, 3, 1, 0, 0, 0, 0x100196e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13904 = VSCALEFSDZ128rr
{ 13905, 4, 1, 0, 0, 0, 0x4110196e0009005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13905 = VSCALEFSDZ128rrb
{ 13906, 6, 1, 0, 0, 0, 0x4112196e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13906 = VSCALEFSDZ128rrbk
{ 13907, 5, 1, 0, 0, 0, 0x4116196e0009005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13907 = VSCALEFSDZ128rrbkz
{ 13908, 5, 1, 0, 0, 0, 0x102196e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13908 = VSCALEFSDZ128rrk
{ 13909, 4, 1, 0, 0, 0, 0x106196e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13909 = VSCALEFSDZ128rrkz
{ 13910, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80116e0009006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #13910 = VSCALEFSSZ128rm
{ 13911, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x82116e0009006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #13911 = VSCALEFSSZ128rmk
{ 13912, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x86116e0009006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #13912 = VSCALEFSSZ128rmkz
{ 13913, 3, 1, 0, 0, 0, 0x80116e0009005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #13913 = VSCALEFSSZ128rr
{ 13914, 4, 1, 0, 0, 0, 0x4090116e0009005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #13914 = VSCALEFSSZ128rrb
{ 13915, 6, 1, 0, 0, 0, 0x4092116e0009005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #13915 = VSCALEFSSZ128rrbk
{ 13916, 5, 1, 0, 0, 0, 0x4096116e0009005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #13916 = VSCALEFSSZ128rrbkz
{ 13917, 5, 1, 0, 0, 0, 0x82116e0009005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #13917 = VSCALEFSSZ128rrk
{ 13918, 4, 1, 0, 0, 0, 0x86116e0009005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #13918 = VSCALEFSSZ128rrkz
{ 13919, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1020d170009004ULL, nullptr, nullptr, OperandInfo899, -1 ,nullptr }, // Inst #13919 = VSCATTERDPDZ128mr
{ 13920, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1028d170009004ULL, nullptr, nullptr, OperandInfo900, -1 ,nullptr }, // Inst #13920 = VSCATTERDPDZ256mr
{ 13921, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10a0d170009004ULL, nullptr, nullptr, OperandInfo901, -1 ,nullptr }, // Inst #13921 = VSCATTERDPDZmr
{ 13922, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8205168009004ULL, nullptr, nullptr, OperandInfo896, -1 ,nullptr }, // Inst #13922 = VSCATTERDPSZ128mr
{ 13923, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8285168009004ULL, nullptr, nullptr, OperandInfo897, -1 ,nullptr }, // Inst #13923 = VSCATTERDPSZ256mr
{ 13924, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8a05168009004ULL, nullptr, nullptr, OperandInfo898, -1 ,nullptr }, // Inst #13924 = VSCATTERDPSZmr
{ 13925, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0e37800901dULL, nullptr, nullptr, OperandInfo599, -1 ,nullptr }, // Inst #13925 = VSCATTERPF0DPDm
{ 13926, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0637800901dULL, nullptr, nullptr, OperandInfo600, -1 ,nullptr }, // Inst #13926 = VSCATTERPF0DPSm
{ 13927, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a0e3f800901dULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr }, // Inst #13927 = VSCATTERPF0QPDm
{ 13928, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a063f800901dULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr }, // Inst #13928 = VSCATTERPF0QPSm
{ 13929, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0e37800901eULL, nullptr, nullptr, OperandInfo599, -1 ,nullptr }, // Inst #13929 = VSCATTERPF1DPDm
{ 13930, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8a0637800901eULL, nullptr, nullptr, OperandInfo600, -1 ,nullptr }, // Inst #13930 = VSCATTERPF1DPSm
{ 13931, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a0e3f800901eULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr }, // Inst #13931 = VSCATTERPF1QPDm
{ 13932, 6, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x10a063f800901eULL, nullptr, nullptr, OperandInfo601, -1 ,nullptr }, // Inst #13932 = VSCATTERPF1QPSm
{ 13933, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1020d1f0009004ULL, nullptr, nullptr, OperandInfo899, -1 ,nullptr }, // Inst #13933 = VSCATTERQPDZ128mr
{ 13934, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x1028d1f0009004ULL, nullptr, nullptr, OperandInfo904, -1 ,nullptr }, // Inst #13934 = VSCATTERQPDZ256mr
{ 13935, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x10a0d1f0009004ULL, nullptr, nullptr, OperandInfo905, -1 ,nullptr }, // Inst #13935 = VSCATTERQPDZmr
{ 13936, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x82051e8009004ULL, nullptr, nullptr, OperandInfo896, -1 ,nullptr }, // Inst #13936 = VSCATTERQPSZ128mr
{ 13937, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x82851e8009004ULL, nullptr, nullptr, OperandInfo902, -1 ,nullptr }, // Inst #13937 = VSCATTERQPSZ256mr
{ 13938, 8, 1, 0, 0, 0|(1ULL<<MCID::MayStore), 0x8a051e8009004ULL, nullptr, nullptr, OperandInfo903, -1 ,nullptr }, // Inst #13938 = VSCATTERQPSZmr
{ 13939, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90911f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13939 = VSHUFF32X4Z256rmbi
{ 13940, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92911f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13940 = VSHUFF32X4Z256rmbik
{ 13941, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96911f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #13941 = VSHUFF32X4Z256rmbikz
{ 13942, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400911f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13942 = VSHUFF32X4Z256rmi
{ 13943, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402911f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13943 = VSHUFF32X4Z256rmik
{ 13944, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406911f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #13944 = VSHUFF32X4Z256rmikz
{ 13945, 4, 1, 0, 0, 0, 0x400911f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #13945 = VSHUFF32X4Z256rri
{ 13946, 6, 1, 0, 0, 0, 0x402911f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #13946 = VSHUFF32X4Z256rrik
{ 13947, 5, 1, 0, 0, 0, 0x406911f804d005ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr }, // Inst #13947 = VSHUFF32X4Z256rrikz
{ 13948, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98111f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13948 = VSHUFF32X4Zrmbi
{ 13949, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a111f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #13949 = VSHUFF32X4Zrmbik
{ 13950, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e111f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #13950 = VSHUFF32X4Zrmbikz
{ 13951, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808111f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13951 = VSHUFF32X4Zrmi
{ 13952, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a111f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #13952 = VSHUFF32X4Zrmik
{ 13953, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e111f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #13953 = VSHUFF32X4Zrmikz
{ 13954, 4, 1, 0, 0, 0, 0x808111f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13954 = VSHUFF32X4Zrri
{ 13955, 6, 1, 0, 0, 0, 0x80a111f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #13955 = VSHUFF32X4Zrrik
{ 13956, 5, 1, 0, 0, 0, 0x80e111f804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #13956 = VSHUFF32X4Zrrikz
{ 13957, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x110991f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13957 = VSHUFF64X2Z256rmbi
{ 13958, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x112991f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #13958 = VSHUFF64X2Z256rmbik
{ 13959, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x116991f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #13959 = VSHUFF64X2Z256rmbikz
{ 13960, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400991f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13960 = VSHUFF64X2Z256rmi
{ 13961, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402991f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #13961 = VSHUFF64X2Z256rmik
{ 13962, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406991f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #13962 = VSHUFF64X2Z256rmikz
{ 13963, 4, 1, 0, 0, 0, 0x400991f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #13963 = VSHUFF64X2Z256rri
{ 13964, 6, 1, 0, 0, 0, 0x402991f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #13964 = VSHUFF64X2Z256rrik
{ 13965, 5, 1, 0, 0, 0, 0x406991f804d005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr }, // Inst #13965 = VSHUFF64X2Z256rrikz
{ 13966, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x118191f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13966 = VSHUFF64X2Zrmbi
{ 13967, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a191f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #13967 = VSHUFF64X2Zrmbik
{ 13968, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e191f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #13968 = VSHUFF64X2Zrmbikz
{ 13969, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808191f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13969 = VSHUFF64X2Zrmi
{ 13970, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a191f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #13970 = VSHUFF64X2Zrmik
{ 13971, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e191f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #13971 = VSHUFF64X2Zrmikz
{ 13972, 4, 1, 0, 0, 0, 0x808191f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13972 = VSHUFF64X2Zrri
{ 13973, 6, 1, 0, 0, 0, 0x80a191f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #13973 = VSHUFF64X2Zrrik
{ 13974, 5, 1, 0, 0, 0, 0x80e191f804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #13974 = VSHUFF64X2Zrrikz
{ 13975, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90921f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13975 = VSHUFI32X4Z256rmbi
{ 13976, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92921f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13976 = VSHUFI32X4Z256rmbik
{ 13977, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96921f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #13977 = VSHUFI32X4Z256rmbikz
{ 13978, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400921f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13978 = VSHUFI32X4Z256rmi
{ 13979, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402921f804d006ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #13979 = VSHUFI32X4Z256rmik
{ 13980, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406921f804d006ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #13980 = VSHUFI32X4Z256rmikz
{ 13981, 4, 1, 0, 0, 0, 0x400921f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #13981 = VSHUFI32X4Z256rri
{ 13982, 6, 1, 0, 0, 0, 0x402921f804d005ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #13982 = VSHUFI32X4Z256rrik
{ 13983, 5, 1, 0, 0, 0, 0x406921f804d005ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr }, // Inst #13983 = VSHUFI32X4Z256rrikz
{ 13984, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98121f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13984 = VSHUFI32X4Zrmbi
{ 13985, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a121f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #13985 = VSHUFI32X4Zrmbik
{ 13986, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e121f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #13986 = VSHUFI32X4Zrmbikz
{ 13987, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808121f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #13987 = VSHUFI32X4Zrmi
{ 13988, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a121f804d006ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #13988 = VSHUFI32X4Zrmik
{ 13989, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e121f804d006ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #13989 = VSHUFI32X4Zrmikz
{ 13990, 4, 1, 0, 0, 0, 0x808121f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #13990 = VSHUFI32X4Zrri
{ 13991, 6, 1, 0, 0, 0, 0x80a121f804d005ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #13991 = VSHUFI32X4Zrrik
{ 13992, 5, 1, 0, 0, 0, 0x80e121f804d005ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #13992 = VSHUFI32X4Zrrikz
{ 13993, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109a1f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13993 = VSHUFI64X2Z256rmbi
{ 13994, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129a1f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #13994 = VSHUFI64X2Z256rmbik
{ 13995, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169a1f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #13995 = VSHUFI64X2Z256rmbikz
{ 13996, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009a1f804d006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #13996 = VSHUFI64X2Z256rmi
{ 13997, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029a1f804d006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #13997 = VSHUFI64X2Z256rmik
{ 13998, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069a1f804d006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #13998 = VSHUFI64X2Z256rmikz
{ 13999, 4, 1, 0, 0, 0, 0x4009a1f804d005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #13999 = VSHUFI64X2Z256rri
{ 14000, 6, 1, 0, 0, 0, 0x4029a1f804d005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #14000 = VSHUFI64X2Z256rrik
{ 14001, 5, 1, 0, 0, 0, 0x4069a1f804d005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr }, // Inst #14001 = VSHUFI64X2Z256rrikz
{ 14002, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181a1f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #14002 = VSHUFI64X2Zrmbi
{ 14003, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1a1f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #14003 = VSHUFI64X2Zrmbik
{ 14004, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1a1f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #14004 = VSHUFI64X2Zrmbikz
{ 14005, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081a1f804d006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #14005 = VSHUFI64X2Zrmi
{ 14006, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1a1f804d006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #14006 = VSHUFI64X2Zrmik
{ 14007, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1a1f804d006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #14007 = VSHUFI64X2Zrmikz
{ 14008, 4, 1, 0, 0, 0, 0x8081a1f804d005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #14008 = VSHUFI64X2Zrri
{ 14009, 6, 1, 0, 0, 0, 0x80a1a1f804d005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #14009 = VSHUFI64X2Zrrik
{ 14010, 5, 1, 0, 0, 0, 0x80e1a1f804d005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #14010 = VSHUFI64X2Zrrikz
{ 14011, 8, 1, 0, 491, 0|(1ULL<<MCID::MayLoad), 0x96330045006ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14011 = VSHUFPDYrmi
{ 14012, 4, 1, 0, 492, 0, 0x96330045005ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #14012 = VSHUFPDYrri
{ 14013, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101e378045006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #14013 = VSHUFPDZ128rmbi
{ 14014, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121e378045006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #14014 = VSHUFPDZ128rmbik
{ 14015, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161e378045006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr }, // Inst #14015 = VSHUFPDZ128rmbikz
{ 14016, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001e378045006ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #14016 = VSHUFPDZ128rmi
{ 14017, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021e378045006ULL, nullptr, nullptr, OperandInfo340, -1 ,nullptr }, // Inst #14017 = VSHUFPDZ128rmik
{ 14018, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061e378045006ULL, nullptr, nullptr, OperandInfo341, -1 ,nullptr }, // Inst #14018 = VSHUFPDZ128rmikz
{ 14019, 4, 1, 0, 0, 0, 0x2001e378045005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #14019 = VSHUFPDZ128rri
{ 14020, 6, 1, 0, 0, 0, 0x2021e378045005ULL, nullptr, nullptr, OperandInfo342, -1 ,nullptr }, // Inst #14020 = VSHUFPDZ128rrik
{ 14021, 5, 1, 0, 0, 0, 0x2061e378045005ULL, nullptr, nullptr, OperandInfo343, -1 ,nullptr }, // Inst #14021 = VSHUFPDZ128rrikz
{ 14022, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109e378045006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #14022 = VSHUFPDZ256rmbi
{ 14023, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129e378045006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #14023 = VSHUFPDZ256rmbik
{ 14024, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169e378045006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #14024 = VSHUFPDZ256rmbikz
{ 14025, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009e378045006ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #14025 = VSHUFPDZ256rmi
{ 14026, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029e378045006ULL, nullptr, nullptr, OperandInfo344, -1 ,nullptr }, // Inst #14026 = VSHUFPDZ256rmik
{ 14027, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069e378045006ULL, nullptr, nullptr, OperandInfo345, -1 ,nullptr }, // Inst #14027 = VSHUFPDZ256rmikz
{ 14028, 4, 1, 0, 0, 0, 0x4009e378045005ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #14028 = VSHUFPDZ256rri
{ 14029, 6, 1, 0, 0, 0, 0x4029e378045005ULL, nullptr, nullptr, OperandInfo346, -1 ,nullptr }, // Inst #14029 = VSHUFPDZ256rrik
{ 14030, 5, 1, 0, 0, 0, 0x4069e378045005ULL, nullptr, nullptr, OperandInfo347, -1 ,nullptr }, // Inst #14030 = VSHUFPDZ256rrikz
{ 14031, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181e378045006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #14031 = VSHUFPDZrmbi
{ 14032, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1e378045006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #14032 = VSHUFPDZrmbik
{ 14033, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1e378045006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #14033 = VSHUFPDZrmbikz
{ 14034, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081e378045006ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #14034 = VSHUFPDZrmi
{ 14035, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1e378045006ULL, nullptr, nullptr, OperandInfo348, -1 ,nullptr }, // Inst #14035 = VSHUFPDZrmik
{ 14036, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1e378045006ULL, nullptr, nullptr, OperandInfo349, -1 ,nullptr }, // Inst #14036 = VSHUFPDZrmikz
{ 14037, 4, 1, 0, 0, 0, 0x8081e378045005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #14037 = VSHUFPDZrri
{ 14038, 6, 1, 0, 0, 0, 0x80a1e378045005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #14038 = VSHUFPDZrrik
{ 14039, 5, 1, 0, 0, 0, 0x80e1e378045005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #14039 = VSHUFPDZrrikz
{ 14040, 8, 1, 0, 491, 0|(1ULL<<MCID::MayLoad), 0x16330045006ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #14040 = VSHUFPDrmi
{ 14041, 4, 1, 0, 492, 0, 0x16330045005ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #14041 = VSHUFPDrri
{ 14042, 8, 1, 0, 491, 0|(1ULL<<MCID::MayLoad), 0x96328044806ULL, nullptr, nullptr, OperandInfo351, -1 ,nullptr }, // Inst #14042 = VSHUFPSYrmi
{ 14043, 4, 1, 0, 492, 0, 0x96328044805ULL, nullptr, nullptr, OperandInfo103, -1 ,nullptr }, // Inst #14043 = VSHUFPSYrri
{ 14044, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9016378044806ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #14044 = VSHUFPSZ128rmbi
{ 14045, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9216378044806ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #14045 = VSHUFPSZ128rmbik
{ 14046, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9616378044806ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #14046 = VSHUFPSZ128rmbikz
{ 14047, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20016378044806ULL, nullptr, nullptr, OperandInfo326, -1 ,nullptr }, // Inst #14047 = VSHUFPSZ128rmi
{ 14048, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20216378044806ULL, nullptr, nullptr, OperandInfo327, -1 ,nullptr }, // Inst #14048 = VSHUFPSZ128rmik
{ 14049, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20616378044806ULL, nullptr, nullptr, OperandInfo328, -1 ,nullptr }, // Inst #14049 = VSHUFPSZ128rmikz
{ 14050, 4, 1, 0, 0, 0, 0x20016378044805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #14050 = VSHUFPSZ128rri
{ 14051, 6, 1, 0, 0, 0, 0x20216378044805ULL, nullptr, nullptr, OperandInfo329, -1 ,nullptr }, // Inst #14051 = VSHUFPSZ128rrik
{ 14052, 5, 1, 0, 0, 0, 0x20616378044805ULL, nullptr, nullptr, OperandInfo330, -1 ,nullptr }, // Inst #14052 = VSHUFPSZ128rrikz
{ 14053, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9096378044806ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #14053 = VSHUFPSZ256rmbi
{ 14054, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9296378044806ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14054 = VSHUFPSZ256rmbik
{ 14055, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9696378044806ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #14055 = VSHUFPSZ256rmbikz
{ 14056, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40096378044806ULL, nullptr, nullptr, OperandInfo331, -1 ,nullptr }, // Inst #14056 = VSHUFPSZ256rmi
{ 14057, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40296378044806ULL, nullptr, nullptr, OperandInfo332, -1 ,nullptr }, // Inst #14057 = VSHUFPSZ256rmik
{ 14058, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40696378044806ULL, nullptr, nullptr, OperandInfo333, -1 ,nullptr }, // Inst #14058 = VSHUFPSZ256rmikz
{ 14059, 4, 1, 0, 0, 0, 0x40096378044805ULL, nullptr, nullptr, OperandInfo334, -1 ,nullptr }, // Inst #14059 = VSHUFPSZ256rri
{ 14060, 6, 1, 0, 0, 0, 0x40296378044805ULL, nullptr, nullptr, OperandInfo335, -1 ,nullptr }, // Inst #14060 = VSHUFPSZ256rrik
{ 14061, 5, 1, 0, 0, 0, 0x40696378044805ULL, nullptr, nullptr, OperandInfo336, -1 ,nullptr }, // Inst #14061 = VSHUFPSZ256rrikz
{ 14062, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9816378044806ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #14062 = VSHUFPSZrmbi
{ 14063, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a16378044806ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #14063 = VSHUFPSZrmbik
{ 14064, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e16378044806ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #14064 = VSHUFPSZrmbikz
{ 14065, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80816378044806ULL, nullptr, nullptr, OperandInfo337, -1 ,nullptr }, // Inst #14065 = VSHUFPSZrmi
{ 14066, 10, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a16378044806ULL, nullptr, nullptr, OperandInfo338, -1 ,nullptr }, // Inst #14066 = VSHUFPSZrmik
{ 14067, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e16378044806ULL, nullptr, nullptr, OperandInfo339, -1 ,nullptr }, // Inst #14067 = VSHUFPSZrmikz
{ 14068, 4, 1, 0, 0, 0, 0x80816378044805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #14068 = VSHUFPSZrri
{ 14069, 6, 1, 0, 0, 0, 0x80a16378044805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #14069 = VSHUFPSZrrik
{ 14070, 5, 1, 0, 0, 0, 0x80e16378044805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #14070 = VSHUFPSZrrikz
{ 14071, 8, 1, 0, 491, 0|(1ULL<<MCID::MayLoad), 0x16328044806ULL, nullptr, nullptr, OperandInfo152, -1 ,nullptr }, // Inst #14071 = VSHUFPSrmi
{ 14072, 4, 1, 0, 492, 0, 0x16328044805ULL, nullptr, nullptr, OperandInfo101, -1 ,nullptr }, // Inst #14072 = VSHUFPSrri
{ 14073, 6, 1, 0, 931, 0|(1ULL<<MCID::MayLoad), 0x828b0005006ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #14073 = VSQRTPDYm
{ 14074, 2, 1, 0, 930, 0, 0x828b0005005ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #14074 = VSQRTPDYr
{ 14075, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2000a8e0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #14075 = VSQRTPDZ128m
{ 14076, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1100a8e0005006ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #14076 = VSQRTPDZ128mb
{ 14077, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1120a8e0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #14077 = VSQRTPDZ128mbk
{ 14078, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1160a8e0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #14078 = VSQRTPDZ128mbkz
{ 14079, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2020a8e0005006ULL, nullptr, nullptr, OperandInfo441, -1 ,nullptr }, // Inst #14079 = VSQRTPDZ128mk
{ 14080, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2060a8e0005006ULL, nullptr, nullptr, OperandInfo442, -1 ,nullptr }, // Inst #14080 = VSQRTPDZ128mkz
{ 14081, 2, 1, 0, 0, 0, 0x2000a8e0005005ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #14081 = VSQRTPDZ128r
{ 14082, 4, 1, 0, 0, 0, 0x2020a8e0005005ULL, nullptr, nullptr, OperandInfo422, -1 ,nullptr }, // Inst #14082 = VSQRTPDZ128rk
{ 14083, 3, 1, 0, 0, 0, 0x2060a8e0005005ULL, nullptr, nullptr, OperandInfo423, -1 ,nullptr }, // Inst #14083 = VSQRTPDZ128rkz
{ 14084, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4008a8e0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #14084 = VSQRTPDZ256m
{ 14085, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1108a8e0005006ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #14085 = VSQRTPDZ256mb
{ 14086, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1128a8e0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #14086 = VSQRTPDZ256mbk
{ 14087, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1168a8e0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #14087 = VSQRTPDZ256mbkz
{ 14088, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4028a8e0005006ULL, nullptr, nullptr, OperandInfo363, -1 ,nullptr }, // Inst #14088 = VSQRTPDZ256mk
{ 14089, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4068a8e0005006ULL, nullptr, nullptr, OperandInfo364, -1 ,nullptr }, // Inst #14089 = VSQRTPDZ256mkz
{ 14090, 2, 1, 0, 0, 0, 0x4008a8e0005005ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #14090 = VSQRTPDZ256r
{ 14091, 4, 1, 0, 0, 0, 0x4028a8e0005005ULL, nullptr, nullptr, OperandInfo427, -1 ,nullptr }, // Inst #14091 = VSQRTPDZ256rk
{ 14092, 3, 1, 0, 0, 0, 0x4068a8e0005005ULL, nullptr, nullptr, OperandInfo428, -1 ,nullptr }, // Inst #14092 = VSQRTPDZ256rkz
{ 14093, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8080a8e0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #14093 = VSQRTPDZm
{ 14094, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1180a8e0005006ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #14094 = VSQRTPDZmb
{ 14095, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a0a8e0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #14095 = VSQRTPDZmbk
{ 14096, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e0a8e0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #14096 = VSQRTPDZmbkz
{ 14097, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a0a8e0005006ULL, nullptr, nullptr, OperandInfo365, -1 ,nullptr }, // Inst #14097 = VSQRTPDZmk
{ 14098, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e0a8e0005006ULL, nullptr, nullptr, OperandInfo366, -1 ,nullptr }, // Inst #14098 = VSQRTPDZmkz
{ 14099, 2, 1, 0, 0, 0, 0x8080a8e0005005ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #14099 = VSQRTPDZr
{ 14100, 3, 1, 0, 0, 0, 0x41180a8e0005005ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #14100 = VSQRTPDZrb
{ 14101, 5, 1, 0, 0, 0, 0x411a0a8e0005005ULL, nullptr, nullptr, OperandInfo460, -1 ,nullptr }, // Inst #14101 = VSQRTPDZrbk
{ 14102, 4, 1, 0, 0, 0, 0x411e0a8e0005005ULL, nullptr, nullptr, OperandInfo461, -1 ,nullptr }, // Inst #14102 = VSQRTPDZrbkz
{ 14103, 4, 1, 0, 0, 0, 0x80a0a8e0005005ULL, nullptr, nullptr, OperandInfo432, -1 ,nullptr }, // Inst #14103 = VSQRTPDZrk
{ 14104, 3, 1, 0, 0, 0, 0x80e0a8e0005005ULL, nullptr, nullptr, OperandInfo433, -1 ,nullptr }, // Inst #14104 = VSQRTPDZrkz
{ 14105, 6, 1, 0, 496, 0|(1ULL<<MCID::MayLoad), 0x28b0005006ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #14105 = VSQRTPDm
{ 14106, 2, 1, 0, 497, 0, 0x28b0005005ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #14106 = VSQRTPDr
{ 14107, 6, 1, 0, 929, 0|(1ULL<<MCID::MayLoad), 0x828a8004806ULL, nullptr, nullptr, OperandInfo356, -1 ,nullptr }, // Inst #14107 = VSQRTPSYm
{ 14108, 2, 1, 0, 928, 0, 0x828a8004805ULL, nullptr, nullptr, OperandInfo446, -1 ,nullptr }, // Inst #14108 = VSQRTPSYr
{ 14109, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x200028e0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #14109 = VSQRTPSZ128m
{ 14110, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90028e0004806ULL, nullptr, nullptr, OperandInfo153, -1 ,nullptr }, // Inst #14110 = VSQRTPSZ128mb
{ 14111, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92028e0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #14111 = VSQRTPSZ128mbk
{ 14112, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96028e0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #14112 = VSQRTPSZ128mbkz
{ 14113, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x202028e0004806ULL, nullptr, nullptr, OperandInfo374, -1 ,nullptr }, // Inst #14113 = VSQRTPSZ128mk
{ 14114, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x206028e0004806ULL, nullptr, nullptr, OperandInfo375, -1 ,nullptr }, // Inst #14114 = VSQRTPSZ128mkz
{ 14115, 2, 1, 0, 0, 0, 0x200028e0004805ULL, nullptr, nullptr, OperandInfo154, -1 ,nullptr }, // Inst #14115 = VSQRTPSZ128r
{ 14116, 4, 1, 0, 0, 0, 0x202028e0004805ULL, nullptr, nullptr, OperandInfo376, -1 ,nullptr }, // Inst #14116 = VSQRTPSZ128rk
{ 14117, 3, 1, 0, 0, 0, 0x206028e0004805ULL, nullptr, nullptr, OperandInfo377, -1 ,nullptr }, // Inst #14117 = VSQRTPSZ128rkz
{ 14118, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x400828e0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #14118 = VSQRTPSZ256m
{ 14119, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x90828e0004806ULL, nullptr, nullptr, OperandInfo357, -1 ,nullptr }, // Inst #14119 = VSQRTPSZ256mb
{ 14120, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x92828e0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #14120 = VSQRTPSZ256mbk
{ 14121, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x96828e0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #14121 = VSQRTPSZ256mbkz
{ 14122, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x402828e0004806ULL, nullptr, nullptr, OperandInfo358, -1 ,nullptr }, // Inst #14122 = VSQRTPSZ256mk
{ 14123, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x406828e0004806ULL, nullptr, nullptr, OperandInfo359, -1 ,nullptr }, // Inst #14123 = VSQRTPSZ256mkz
{ 14124, 2, 1, 0, 0, 0, 0x400828e0004805ULL, nullptr, nullptr, OperandInfo426, -1 ,nullptr }, // Inst #14124 = VSQRTPSZ256r
{ 14125, 4, 1, 0, 0, 0, 0x402828e0004805ULL, nullptr, nullptr, OperandInfo436, -1 ,nullptr }, // Inst #14125 = VSQRTPSZ256rk
{ 14126, 3, 1, 0, 0, 0, 0x406828e0004805ULL, nullptr, nullptr, OperandInfo437, -1 ,nullptr }, // Inst #14126 = VSQRTPSZ256rkz
{ 14127, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x808028e0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #14127 = VSQRTPSZm
{ 14128, 6, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x98028e0004806ULL, nullptr, nullptr, OperandInfo360, -1 ,nullptr }, // Inst #14128 = VSQRTPSZmb
{ 14129, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a028e0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #14129 = VSQRTPSZmbk
{ 14130, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e028e0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #14130 = VSQRTPSZmbkz
{ 14131, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a028e0004806ULL, nullptr, nullptr, OperandInfo361, -1 ,nullptr }, // Inst #14131 = VSQRTPSZmk
{ 14132, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e028e0004806ULL, nullptr, nullptr, OperandInfo362, -1 ,nullptr }, // Inst #14132 = VSQRTPSZmkz
{ 14133, 2, 1, 0, 0, 0, 0x808028e0004805ULL, nullptr, nullptr, OperandInfo431, -1 ,nullptr }, // Inst #14133 = VSQRTPSZr
{ 14134, 3, 1, 0, 0, 0, 0x4098028e0004805ULL, nullptr, nullptr, OperandInfo447, -1 ,nullptr }, // Inst #14134 = VSQRTPSZrb
{ 14135, 5, 1, 0, 0, 0, 0x409a028e0004805ULL, nullptr, nullptr, OperandInfo448, -1 ,nullptr }, // Inst #14135 = VSQRTPSZrbk
{ 14136, 4, 1, 0, 0, 0, 0x409e028e0004805ULL, nullptr, nullptr, OperandInfo449, -1 ,nullptr }, // Inst #14136 = VSQRTPSZrbkz
{ 14137, 4, 1, 0, 0, 0, 0x80a028e0004805ULL, nullptr, nullptr, OperandInfo439, -1 ,nullptr }, // Inst #14137 = VSQRTPSZrk
{ 14138, 3, 1, 0, 0, 0, 0x80e028e0004805ULL, nullptr, nullptr, OperandInfo440, -1 ,nullptr }, // Inst #14138 = VSQRTPSZrkz
{ 14139, 6, 1, 0, 498, 0|(1ULL<<MCID::MayLoad), 0x28a8004806ULL, nullptr, nullptr, OperandInfo53, -1 ,nullptr }, // Inst #14139 = VSQRTPSm
{ 14140, 2, 1, 0, 499, 0, 0x28a8004805ULL, nullptr, nullptr, OperandInfo54, -1 ,nullptr }, // Inst #14140 = VSQRTPSr
{ 14141, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x1011a8e0006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #14141 = VSQRTSDZm
{ 14142, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011a8e0006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14142 = VSQRTSDZm_Int
{ 14143, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031a8e0006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #14143 = VSQRTSDZm_Intk
{ 14144, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071a8e0006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #14144 = VSQRTSDZm_Intkz
{ 14145, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1011a8e0006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr }, // Inst #14145 = VSQRTSDZr
{ 14146, 3, 1, 0, 0, 0, 0x1011a8e0006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14146 = VSQRTSDZr_Int
{ 14147, 5, 1, 0, 0, 0, 0x1031a8e0006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #14147 = VSQRTSDZr_Intk
{ 14148, 4, 1, 0, 0, 0, 0x1071a8e0006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #14148 = VSQRTSDZr_Intkz
{ 14149, 4, 1, 0, 0, 0, 0x41111a8e0006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #14149 = VSQRTSDZrb_Int
{ 14150, 6, 1, 0, 0, 0, 0x41131a8e0006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #14150 = VSQRTSDZrb_Intk
{ 14151, 5, 1, 0, 0, 0, 0x41171a8e0006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #14151 = VSQRTSDZrb_Intkz
{ 14152, 7, 1, 0, 500, 0|(1ULL<<MCID::MayLoad), 0x1128b0006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #14152 = VSQRTSDm
{ 14153, 7, 1, 0, 501, 0|(1ULL<<MCID::MayLoad), 0x1128a0006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14153 = VSQRTSDm_Int
{ 14154, 3, 1, 0, 502, 0, 0x1128b0006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #14154 = VSQRTSDr
{ 14155, 3, 1, 0, 579, 0, 0x1128a0006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14155 = VSQRTSDr_Int
{ 14156, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::UnmodeledSideEffects), 0x81128e0005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #14156 = VSQRTSSZm
{ 14157, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x81128e0005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14157 = VSQRTSSZm_Int
{ 14158, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x83128e0005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #14158 = VSQRTSSZm_Intk
{ 14159, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x87128e0005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #14159 = VSQRTSSZm_Intkz
{ 14160, 3, 1, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x81128e0005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr }, // Inst #14160 = VSQRTSSZr
{ 14161, 3, 1, 0, 0, 0, 0x81128e0005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14161 = VSQRTSSZr_Int
{ 14162, 5, 1, 0, 0, 0, 0x83128e0005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #14162 = VSQRTSSZr_Intk
{ 14163, 4, 1, 0, 0, 0, 0x87128e0005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #14163 = VSQRTSSZr_Intkz
{ 14164, 4, 1, 0, 0, 0, 0x4091128e0005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #14164 = VSQRTSSZrb_Int
{ 14165, 6, 1, 0, 0, 0, 0x4093128e0005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #14165 = VSQRTSSZrb_Intk
{ 14166, 5, 1, 0, 0, 0, 0x4097128e0005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #14166 = VSQRTSSZrb_Intkz
{ 14167, 7, 1, 0, 503, 0|(1ULL<<MCID::MayLoad), 0x1128a8005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #14167 = VSQRTSSm
{ 14168, 7, 1, 0, 501, 0|(1ULL<<MCID::MayLoad), 0x1128a0005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14168 = VSQRTSSm_Int
{ 14169, 3, 1, 0, 504, 0, 0x1128a8005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #14169 = VSQRTSSr
{ 14170, 3, 1, 0, 579, 0, 0x1128a0005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14170 = VSQRTSSr_Int
{ 14171, 5, 0, 0, 946, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x572800481bULL, nullptr, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14171 = VSTMXCSR
{ 14172, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x92e30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #14172 = VSUBPDYrm
{ 14173, 3, 1, 0, 14, 0, 0x92e30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #14173 = VSUBPDYrr
{ 14174, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001ae60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14174 = VSUBPDZ128rm
{ 14175, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101ae60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14175 = VSUBPDZ128rmb
{ 14176, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121ae60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #14176 = VSUBPDZ128rmbk
{ 14177, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161ae60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #14177 = VSUBPDZ128rmbkz
{ 14178, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021ae60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #14178 = VSUBPDZ128rmk
{ 14179, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061ae60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #14179 = VSUBPDZ128rmkz
{ 14180, 3, 1, 0, 0, 0, 0x2001ae60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14180 = VSUBPDZ128rr
{ 14181, 5, 1, 0, 0, 0, 0x2021ae60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #14181 = VSUBPDZ128rrk
{ 14182, 4, 1, 0, 0, 0, 0x2061ae60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #14182 = VSUBPDZ128rrkz
{ 14183, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009ae60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14183 = VSUBPDZ256rm
{ 14184, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109ae60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14184 = VSUBPDZ256rmb
{ 14185, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129ae60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14185 = VSUBPDZ256rmbk
{ 14186, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169ae60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #14186 = VSUBPDZ256rmbkz
{ 14187, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029ae60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14187 = VSUBPDZ256rmk
{ 14188, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069ae60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #14188 = VSUBPDZ256rmkz
{ 14189, 3, 1, 0, 0, 0, 0x4009ae60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #14189 = VSUBPDZ256rr
{ 14190, 5, 1, 0, 0, 0, 0x4029ae60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14190 = VSUBPDZ256rrk
{ 14191, 4, 1, 0, 0, 0, 0x4069ae60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14191 = VSUBPDZ256rrkz
{ 14192, 4, 1, 0, 0, 0, 0x41181ae60005005ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #14192 = VSUBPDZrb
{ 14193, 6, 1, 0, 0, 0, 0x411a1ae60005005ULL, nullptr, nullptr, OperandInfo289, -1 ,nullptr }, // Inst #14193 = VSUBPDZrbk
{ 14194, 5, 1, 0, 0, 0, 0x411e1ae60005005ULL, nullptr, nullptr, OperandInfo290, -1 ,nullptr }, // Inst #14194 = VSUBPDZrbkz
{ 14195, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081ae60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14195 = VSUBPDZrm
{ 14196, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181ae60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14196 = VSUBPDZrmb
{ 14197, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1ae60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #14197 = VSUBPDZrmbk
{ 14198, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1ae60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14198 = VSUBPDZrmbkz
{ 14199, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1ae60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #14199 = VSUBPDZrmk
{ 14200, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1ae60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14200 = VSUBPDZrmkz
{ 14201, 3, 1, 0, 0, 0, 0x8081ae60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #14201 = VSUBPDZrr
{ 14202, 5, 1, 0, 0, 0, 0x80a1ae60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #14202 = VSUBPDZrrk
{ 14203, 4, 1, 0, 0, 0, 0x80e1ae60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #14203 = VSUBPDZrrkz
{ 14204, 7, 1, 0, 13, 0|(1ULL<<MCID::MayLoad), 0x12e30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14204 = VSUBPDrm
{ 14205, 3, 1, 0, 14, 0, 0x12e30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14205 = VSUBPDrr
{ 14206, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x92e28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #14206 = VSUBPSYrm
{ 14207, 3, 1, 0, 16, 0, 0x92e28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #14207 = VSUBPSYrr
{ 14208, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012e60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14208 = VSUBPSZ128rm
{ 14209, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012e60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14209 = VSUBPSZ128rmb
{ 14210, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212e60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #14210 = VSUBPSZ128rmbk
{ 14211, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612e60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #14211 = VSUBPSZ128rmbkz
{ 14212, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212e60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #14212 = VSUBPSZ128rmk
{ 14213, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612e60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #14213 = VSUBPSZ128rmkz
{ 14214, 3, 1, 0, 0, 0, 0x20012e60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14214 = VSUBPSZ128rr
{ 14215, 5, 1, 0, 0, 0, 0x20212e60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #14215 = VSUBPSZ128rrk
{ 14216, 4, 1, 0, 0, 0, 0x20612e60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #14216 = VSUBPSZ128rrkz
{ 14217, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092e60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14217 = VSUBPSZ256rm
{ 14218, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092e60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14218 = VSUBPSZ256rmb
{ 14219, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292e60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #14219 = VSUBPSZ256rmbk
{ 14220, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692e60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #14220 = VSUBPSZ256rmbkz
{ 14221, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292e60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #14221 = VSUBPSZ256rmk
{ 14222, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692e60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #14222 = VSUBPSZ256rmkz
{ 14223, 3, 1, 0, 0, 0, 0x40092e60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #14223 = VSUBPSZ256rr
{ 14224, 5, 1, 0, 0, 0, 0x40292e60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #14224 = VSUBPSZ256rrk
{ 14225, 4, 1, 0, 0, 0, 0x40692e60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14225 = VSUBPSZ256rrkz
{ 14226, 4, 1, 0, 0, 0, 0x409812e60004805ULL, nullptr, nullptr, OperandInfo99, -1 ,nullptr }, // Inst #14226 = VSUBPSZrb
{ 14227, 6, 1, 0, 0, 0, 0x409a12e60004805ULL, nullptr, nullptr, OperandInfo305, -1 ,nullptr }, // Inst #14227 = VSUBPSZrbk
{ 14228, 5, 1, 0, 0, 0, 0x409e12e60004805ULL, nullptr, nullptr, OperandInfo306, -1 ,nullptr }, // Inst #14228 = VSUBPSZrbkz
{ 14229, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812e60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14229 = VSUBPSZrm
{ 14230, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812e60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14230 = VSUBPSZrmb
{ 14231, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12e60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14231 = VSUBPSZrmbk
{ 14232, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12e60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #14232 = VSUBPSZrmbkz
{ 14233, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12e60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14233 = VSUBPSZrmk
{ 14234, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12e60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #14234 = VSUBPSZrmkz
{ 14235, 3, 1, 0, 0, 0, 0x80812e60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #14235 = VSUBPSZrr
{ 14236, 5, 1, 0, 0, 0, 0x80a12e60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #14236 = VSUBPSZrrk
{ 14237, 4, 1, 0, 0, 0, 0x80e12e60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #14237 = VSUBPSZrrkz
{ 14238, 7, 1, 0, 15, 0|(1ULL<<MCID::MayLoad), 0x12e28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14238 = VSUBPSrm
{ 14239, 3, 1, 0, 16, 0, 0x12e28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14239 = VSUBPSrr
{ 14240, 7, 1, 0, 525, 0|(1ULL<<MCID::MayLoad), 0x1011ae60006006ULL, nullptr, nullptr, OperandInfo311, -1 ,nullptr }, // Inst #14240 = VSUBSDZrm
{ 14241, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1011ae60006006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14241 = VSUBSDZrm_Int
{ 14242, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1031ae60006006ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #14242 = VSUBSDZrm_Intk
{ 14243, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1071ae60006006ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #14243 = VSUBSDZrm_Intkz
{ 14244, 3, 1, 0, 525, 0, 0x1011ae60006005ULL, nullptr, nullptr, OperandInfo314, -1 ,nullptr }, // Inst #14244 = VSUBSDZrr
{ 14245, 3, 1, 0, 0, 0, 0x1011ae60006005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14245 = VSUBSDZrr_Int
{ 14246, 5, 1, 0, 0, 0, 0x1031ae60006005ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #14246 = VSUBSDZrr_Intk
{ 14247, 4, 1, 0, 0, 0, 0x1071ae60006005ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #14247 = VSUBSDZrr_Intkz
{ 14248, 4, 1, 0, 0, 0, 0x41111ae60006005ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #14248 = VSUBSDZrrb
{ 14249, 6, 1, 0, 0, 0, 0x41131ae60006005ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #14249 = VSUBSDZrrbk
{ 14250, 5, 1, 0, 0, 0, 0x41171ae60006005ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #14250 = VSUBSDZrrbkz
{ 14251, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112e30006006ULL, nullptr, nullptr, OperandInfo320, -1 ,nullptr }, // Inst #14251 = VSUBSDrm
{ 14252, 7, 1, 0, 17, 0|(1ULL<<MCID::MayLoad), 0x112e30006006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14252 = VSUBSDrm_Int
{ 14253, 3, 1, 0, 18, 0, 0x112e30006005ULL, nullptr, nullptr, OperandInfo321, -1 ,nullptr }, // Inst #14253 = VSUBSDrr
{ 14254, 3, 1, 0, 18, 0, 0x112e30006005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14254 = VSUBSDrr_Int
{ 14255, 7, 1, 0, 526, 0|(1ULL<<MCID::MayLoad), 0x8112e60005806ULL, nullptr, nullptr, OperandInfo322, -1 ,nullptr }, // Inst #14255 = VSUBSSZrm
{ 14256, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8112e60005806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14256 = VSUBSSZrm_Int
{ 14257, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8312e60005806ULL, nullptr, nullptr, OperandInfo312, -1 ,nullptr }, // Inst #14257 = VSUBSSZrm_Intk
{ 14258, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8712e60005806ULL, nullptr, nullptr, OperandInfo313, -1 ,nullptr }, // Inst #14258 = VSUBSSZrm_Intkz
{ 14259, 3, 1, 0, 526, 0, 0x8112e60005805ULL, nullptr, nullptr, OperandInfo323, -1 ,nullptr }, // Inst #14259 = VSUBSSZrr
{ 14260, 3, 1, 0, 0, 0, 0x8112e60005805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14260 = VSUBSSZrr_Int
{ 14261, 5, 1, 0, 0, 0, 0x8312e60005805ULL, nullptr, nullptr, OperandInfo315, -1 ,nullptr }, // Inst #14261 = VSUBSSZrr_Intk
{ 14262, 4, 1, 0, 0, 0, 0x8712e60005805ULL, nullptr, nullptr, OperandInfo316, -1 ,nullptr }, // Inst #14262 = VSUBSSZrr_Intkz
{ 14263, 4, 1, 0, 0, 0, 0x409112e60005805ULL, nullptr, nullptr, OperandInfo317, -1 ,nullptr }, // Inst #14263 = VSUBSSZrrb
{ 14264, 6, 1, 0, 0, 0, 0x409312e60005805ULL, nullptr, nullptr, OperandInfo318, -1 ,nullptr }, // Inst #14264 = VSUBSSZrrbk
{ 14265, 5, 1, 0, 0, 0, 0x409712e60005805ULL, nullptr, nullptr, OperandInfo319, -1 ,nullptr }, // Inst #14265 = VSUBSSZrrbkz
{ 14266, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112e28005806ULL, nullptr, nullptr, OperandInfo324, -1 ,nullptr }, // Inst #14266 = VSUBSSrm
{ 14267, 7, 1, 0, 19, 0|(1ULL<<MCID::MayLoad), 0x112e28005806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14267 = VSUBSSrm_Int
{ 14268, 3, 1, 0, 20, 0, 0x112e28005805ULL, nullptr, nullptr, OperandInfo325, -1 ,nullptr }, // Inst #14268 = VSUBSSrr
{ 14269, 3, 1, 0, 20, 0, 0x112e28005805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14269 = VSUBSSrr_Int
{ 14270, 6, 0, 0, 32, 0|(1ULL<<MCID::MayLoad), 0x807b0009006ULL, nullptr, ImplicitList6, OperandInfo356, -1 ,nullptr }, // Inst #14270 = VTESTPDYrm
{ 14271, 2, 0, 0, 33, 0, 0x807b0009005ULL, nullptr, ImplicitList6, OperandInfo446, -1 ,nullptr }, // Inst #14271 = VTESTPDYrr
{ 14272, 6, 0, 0, 32, 0|(1ULL<<MCID::MayLoad), 0x7b0009006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #14272 = VTESTPDrm
{ 14273, 2, 0, 0, 33, 0, 0x7b0009005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #14273 = VTESTPDrr
{ 14274, 6, 0, 0, 32, 0|(1ULL<<MCID::MayLoad), 0x80728009006ULL, nullptr, ImplicitList6, OperandInfo356, -1 ,nullptr }, // Inst #14274 = VTESTPSYrm
{ 14275, 2, 0, 0, 33, 0, 0x80728009005ULL, nullptr, ImplicitList6, OperandInfo446, -1 ,nullptr }, // Inst #14275 = VTESTPSYrr
{ 14276, 6, 0, 0, 32, 0|(1ULL<<MCID::MayLoad), 0x728009006ULL, nullptr, ImplicitList6, OperandInfo53, -1 ,nullptr }, // Inst #14276 = VTESTPSrm
{ 14277, 2, 0, 0, 33, 0, 0x728009005ULL, nullptr, ImplicitList6, OperandInfo54, -1 ,nullptr }, // Inst #14277 = VTESTPSrr
{ 14278, 2, 0, 0, 76, 0, 0x11109770045005ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr }, // Inst #14278 = VUCOMISDZrb
{ 14279, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x10109760005006ULL, nullptr, ImplicitList6, OperandInfo416, -1 ,nullptr }, // Inst #14279 = VUCOMISDZrm
{ 14280, 2, 0, 0, 76, 0, 0x10109760005005ULL, nullptr, ImplicitList6, OperandInfo417, -1 ,nullptr }, // Inst #14280 = VUCOMISDZrr
{ 14281, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x101720005006ULL, nullptr, ImplicitList6, OperandInfo113, -1 ,nullptr }, // Inst #14281 = VUCOMISDrm
{ 14282, 2, 0, 0, 76, 0, 0x101720005005ULL, nullptr, ImplicitList6, OperandInfo114, -1 ,nullptr }, // Inst #14282 = VUCOMISDrr
{ 14283, 2, 0, 0, 76, 0, 0x9101768044805ULL, nullptr, ImplicitList6, OperandInfo154, -1 ,nullptr }, // Inst #14283 = VUCOMISSZrb
{ 14284, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x8101760004806ULL, nullptr, ImplicitList6, OperandInfo418, -1 ,nullptr }, // Inst #14284 = VUCOMISSZrm
{ 14285, 2, 0, 0, 76, 0, 0x8101760004805ULL, nullptr, ImplicitList6, OperandInfo419, -1 ,nullptr }, // Inst #14285 = VUCOMISSZrr
{ 14286, 6, 0, 0, 75, 0|(1ULL<<MCID::MayLoad), 0x101720004806ULL, nullptr, ImplicitList6, OperandInfo115, -1 ,nullptr }, // Inst #14286 = VUCOMISSrm
{ 14287, 2, 0, 0, 76, 0, 0x101720004805ULL, nullptr, ImplicitList6, OperandInfo116, -1 ,nullptr }, // Inst #14287 = VUCOMISSrr
{ 14288, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0x90ab0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #14288 = VUNPCKHPDYrm
{ 14289, 3, 1, 0, 524, 0, 0x90ab0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #14289 = VUNPCKHPDYrr
{ 14290, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20018ae0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14290 = VUNPCKHPDZ128rm
{ 14291, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11018ae0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14291 = VUNPCKHPDZ128rmb
{ 14292, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11218ae0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #14292 = VUNPCKHPDZ128rmbk
{ 14293, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11618ae0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #14293 = VUNPCKHPDZ128rmbkz
{ 14294, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20218ae0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #14294 = VUNPCKHPDZ128rmk
{ 14295, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20618ae0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #14295 = VUNPCKHPDZ128rmkz
{ 14296, 3, 1, 0, 0, 0, 0x20018ae0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14296 = VUNPCKHPDZ128rr
{ 14297, 5, 1, 0, 0, 0, 0x20218ae0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #14297 = VUNPCKHPDZ128rrk
{ 14298, 4, 1, 0, 0, 0, 0x20618ae0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #14298 = VUNPCKHPDZ128rrkz
{ 14299, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40098ae0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14299 = VUNPCKHPDZ256rm
{ 14300, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11098ae0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14300 = VUNPCKHPDZ256rmb
{ 14301, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11298ae0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14301 = VUNPCKHPDZ256rmbk
{ 14302, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11698ae0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #14302 = VUNPCKHPDZ256rmbkz
{ 14303, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40298ae0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14303 = VUNPCKHPDZ256rmk
{ 14304, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40698ae0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #14304 = VUNPCKHPDZ256rmkz
{ 14305, 3, 1, 0, 0, 0, 0x40098ae0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #14305 = VUNPCKHPDZ256rr
{ 14306, 5, 1, 0, 0, 0, 0x40298ae0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14306 = VUNPCKHPDZ256rrk
{ 14307, 4, 1, 0, 0, 0, 0x40698ae0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14307 = VUNPCKHPDZ256rrkz
{ 14308, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80818ae0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14308 = VUNPCKHPDZrm
{ 14309, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11818ae0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14309 = VUNPCKHPDZrmb
{ 14310, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a18ae0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #14310 = VUNPCKHPDZrmbk
{ 14311, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e18ae0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14311 = VUNPCKHPDZrmbkz
{ 14312, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a18ae0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #14312 = VUNPCKHPDZrmk
{ 14313, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e18ae0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14313 = VUNPCKHPDZrmkz
{ 14314, 3, 1, 0, 0, 0, 0x80818ae0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #14314 = VUNPCKHPDZrr
{ 14315, 5, 1, 0, 0, 0, 0x80a18ae0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #14315 = VUNPCKHPDZrrk
{ 14316, 4, 1, 0, 0, 0, 0x80e18ae0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #14316 = VUNPCKHPDZrrkz
{ 14317, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0x10ab0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14317 = VUNPCKHPDrm
{ 14318, 3, 1, 0, 524, 0, 0x10ab0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14318 = VUNPCKHPDrr
{ 14319, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0x90aa8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #14319 = VUNPCKHPSYrm
{ 14320, 3, 1, 0, 524, 0, 0x90aa8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #14320 = VUNPCKHPSYrr
{ 14321, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20010ae0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14321 = VUNPCKHPSZ128rm
{ 14322, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9010ae0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14322 = VUNPCKHPSZ128rmb
{ 14323, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9210ae0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #14323 = VUNPCKHPSZ128rmbk
{ 14324, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9610ae0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #14324 = VUNPCKHPSZ128rmbkz
{ 14325, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20210ae0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #14325 = VUNPCKHPSZ128rmk
{ 14326, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20610ae0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #14326 = VUNPCKHPSZ128rmkz
{ 14327, 3, 1, 0, 0, 0, 0x20010ae0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14327 = VUNPCKHPSZ128rr
{ 14328, 5, 1, 0, 0, 0, 0x20210ae0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #14328 = VUNPCKHPSZ128rrk
{ 14329, 4, 1, 0, 0, 0, 0x20610ae0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #14329 = VUNPCKHPSZ128rrkz
{ 14330, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40090ae0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14330 = VUNPCKHPSZ256rm
{ 14331, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9090ae0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14331 = VUNPCKHPSZ256rmb
{ 14332, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9290ae0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #14332 = VUNPCKHPSZ256rmbk
{ 14333, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9690ae0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #14333 = VUNPCKHPSZ256rmbkz
{ 14334, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40290ae0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #14334 = VUNPCKHPSZ256rmk
{ 14335, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40690ae0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #14335 = VUNPCKHPSZ256rmkz
{ 14336, 3, 1, 0, 0, 0, 0x40090ae0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #14336 = VUNPCKHPSZ256rr
{ 14337, 5, 1, 0, 0, 0, 0x40290ae0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #14337 = VUNPCKHPSZ256rrk
{ 14338, 4, 1, 0, 0, 0, 0x40690ae0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14338 = VUNPCKHPSZ256rrkz
{ 14339, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80810ae0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14339 = VUNPCKHPSZrm
{ 14340, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9810ae0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14340 = VUNPCKHPSZrmb
{ 14341, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a10ae0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14341 = VUNPCKHPSZrmbk
{ 14342, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e10ae0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #14342 = VUNPCKHPSZrmbkz
{ 14343, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a10ae0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14343 = VUNPCKHPSZrmk
{ 14344, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e10ae0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #14344 = VUNPCKHPSZrmkz
{ 14345, 3, 1, 0, 0, 0, 0x80810ae0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #14345 = VUNPCKHPSZrr
{ 14346, 5, 1, 0, 0, 0, 0x80a10ae0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #14346 = VUNPCKHPSZrrk
{ 14347, 4, 1, 0, 0, 0, 0x80e10ae0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #14347 = VUNPCKHPSZrrkz
{ 14348, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0x10aa8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14348 = VUNPCKHPSrm
{ 14349, 3, 1, 0, 524, 0, 0x10aa8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14349 = VUNPCKHPSrr
{ 14350, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0x90a30005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #14350 = VUNPCKLPDYrm
{ 14351, 3, 1, 0, 524, 0, 0x90a30005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #14351 = VUNPCKLPDYrr
{ 14352, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20018a60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14352 = VUNPCKLPDZ128rm
{ 14353, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11018a60005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14353 = VUNPCKLPDZ128rmb
{ 14354, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11218a60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #14354 = VUNPCKLPDZ128rmbk
{ 14355, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11618a60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #14355 = VUNPCKLPDZ128rmbkz
{ 14356, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20218a60005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #14356 = VUNPCKLPDZ128rmk
{ 14357, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20618a60005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #14357 = VUNPCKLPDZ128rmkz
{ 14358, 3, 1, 0, 0, 0, 0x20018a60005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14358 = VUNPCKLPDZ128rr
{ 14359, 5, 1, 0, 0, 0, 0x20218a60005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #14359 = VUNPCKLPDZ128rrk
{ 14360, 4, 1, 0, 0, 0, 0x20618a60005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #14360 = VUNPCKLPDZ128rrkz
{ 14361, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40098a60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14361 = VUNPCKLPDZ256rm
{ 14362, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11098a60005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14362 = VUNPCKLPDZ256rmb
{ 14363, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11298a60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14363 = VUNPCKLPDZ256rmbk
{ 14364, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11698a60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #14364 = VUNPCKLPDZ256rmbkz
{ 14365, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40298a60005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14365 = VUNPCKLPDZ256rmk
{ 14366, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40698a60005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #14366 = VUNPCKLPDZ256rmkz
{ 14367, 3, 1, 0, 0, 0, 0x40098a60005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #14367 = VUNPCKLPDZ256rr
{ 14368, 5, 1, 0, 0, 0, 0x40298a60005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14368 = VUNPCKLPDZ256rrk
{ 14369, 4, 1, 0, 0, 0, 0x40698a60005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14369 = VUNPCKLPDZ256rrkz
{ 14370, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80818a60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14370 = VUNPCKLPDZrm
{ 14371, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11818a60005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14371 = VUNPCKLPDZrmb
{ 14372, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a18a60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #14372 = VUNPCKLPDZrmbk
{ 14373, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e18a60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14373 = VUNPCKLPDZrmbkz
{ 14374, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a18a60005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #14374 = VUNPCKLPDZrmk
{ 14375, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e18a60005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14375 = VUNPCKLPDZrmkz
{ 14376, 3, 1, 0, 0, 0, 0x80818a60005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #14376 = VUNPCKLPDZrr
{ 14377, 5, 1, 0, 0, 0, 0x80a18a60005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #14377 = VUNPCKLPDZrrk
{ 14378, 4, 1, 0, 0, 0, 0x80e18a60005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #14378 = VUNPCKLPDZrrkz
{ 14379, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0x10a30005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14379 = VUNPCKLPDrm
{ 14380, 3, 1, 0, 524, 0, 0x10a30005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14380 = VUNPCKLPDrr
{ 14381, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0x90a28004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #14381 = VUNPCKLPSYrm
{ 14382, 3, 1, 0, 524, 0, 0x90a28004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #14382 = VUNPCKLPSYrr
{ 14383, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20010a60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14383 = VUNPCKLPSZ128rm
{ 14384, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9010a60004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14384 = VUNPCKLPSZ128rmb
{ 14385, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9210a60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #14385 = VUNPCKLPSZ128rmbk
{ 14386, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9610a60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #14386 = VUNPCKLPSZ128rmbkz
{ 14387, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20210a60004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #14387 = VUNPCKLPSZ128rmk
{ 14388, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20610a60004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #14388 = VUNPCKLPSZ128rmkz
{ 14389, 3, 1, 0, 0, 0, 0x20010a60004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14389 = VUNPCKLPSZ128rr
{ 14390, 5, 1, 0, 0, 0, 0x20210a60004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #14390 = VUNPCKLPSZ128rrk
{ 14391, 4, 1, 0, 0, 0, 0x20610a60004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #14391 = VUNPCKLPSZ128rrkz
{ 14392, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40090a60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14392 = VUNPCKLPSZ256rm
{ 14393, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9090a60004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14393 = VUNPCKLPSZ256rmb
{ 14394, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9290a60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #14394 = VUNPCKLPSZ256rmbk
{ 14395, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9690a60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #14395 = VUNPCKLPSZ256rmbkz
{ 14396, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40290a60004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #14396 = VUNPCKLPSZ256rmk
{ 14397, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40690a60004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #14397 = VUNPCKLPSZ256rmkz
{ 14398, 3, 1, 0, 0, 0, 0x40090a60004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #14398 = VUNPCKLPSZ256rr
{ 14399, 5, 1, 0, 0, 0, 0x40290a60004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #14399 = VUNPCKLPSZ256rrk
{ 14400, 4, 1, 0, 0, 0, 0x40690a60004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14400 = VUNPCKLPSZ256rrkz
{ 14401, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80810a60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14401 = VUNPCKLPSZrm
{ 14402, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9810a60004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14402 = VUNPCKLPSZrmb
{ 14403, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a10a60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14403 = VUNPCKLPSZrmbk
{ 14404, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e10a60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #14404 = VUNPCKLPSZrmbkz
{ 14405, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a10a60004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14405 = VUNPCKLPSZrmk
{ 14406, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e10a60004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #14406 = VUNPCKLPSZrmkz
{ 14407, 3, 1, 0, 0, 0, 0x80810a60004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #14407 = VUNPCKLPSZrr
{ 14408, 5, 1, 0, 0, 0, 0x80a10a60004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #14408 = VUNPCKLPSZrrk
{ 14409, 4, 1, 0, 0, 0, 0x80e10a60004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #14409 = VUNPCKLPSZrrkz
{ 14410, 7, 1, 0, 523, 0|(1ULL<<MCID::MayLoad), 0x10a28004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14410 = VUNPCKLPSrm
{ 14411, 3, 1, 0, 524, 0, 0x10a28004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14411 = VUNPCKLPSrr
{ 14412, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x92bb0005006ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #14412 = VXORPDYrm
{ 14413, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x92bb0005005ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #14413 = VXORPDYrr
{ 14414, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2001abe0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14414 = VXORPDZ128rm
{ 14415, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1101abe0005006ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14415 = VXORPDZ128rmb
{ 14416, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1121abe0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #14416 = VXORPDZ128rmbk
{ 14417, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1161abe0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #14417 = VXORPDZ128rmbkz
{ 14418, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2021abe0005006ULL, nullptr, nullptr, OperandInfo278, -1 ,nullptr }, // Inst #14418 = VXORPDZ128rmk
{ 14419, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x2061abe0005006ULL, nullptr, nullptr, OperandInfo279, -1 ,nullptr }, // Inst #14419 = VXORPDZ128rmkz
{ 14420, 3, 1, 0, 0, 0, 0x2001abe0005005ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14420 = VXORPDZ128rr
{ 14421, 5, 1, 0, 0, 0, 0x2021abe0005005ULL, nullptr, nullptr, OperandInfo281, -1 ,nullptr }, // Inst #14421 = VXORPDZ128rrk
{ 14422, 4, 1, 0, 0, 0, 0x2061abe0005005ULL, nullptr, nullptr, OperandInfo282, -1 ,nullptr }, // Inst #14422 = VXORPDZ128rrkz
{ 14423, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4009abe0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14423 = VXORPDZ256rm
{ 14424, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1109abe0005006ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14424 = VXORPDZ256rmb
{ 14425, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1129abe0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14425 = VXORPDZ256rmbk
{ 14426, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1169abe0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #14426 = VXORPDZ256rmbkz
{ 14427, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4029abe0005006ULL, nullptr, nullptr, OperandInfo284, -1 ,nullptr }, // Inst #14427 = VXORPDZ256rmk
{ 14428, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x4069abe0005006ULL, nullptr, nullptr, OperandInfo285, -1 ,nullptr }, // Inst #14428 = VXORPDZ256rmkz
{ 14429, 3, 1, 0, 0, 0, 0x4009abe0005005ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #14429 = VXORPDZ256rr
{ 14430, 5, 1, 0, 0, 0, 0x4029abe0005005ULL, nullptr, nullptr, OperandInfo287, -1 ,nullptr }, // Inst #14430 = VXORPDZ256rrk
{ 14431, 4, 1, 0, 0, 0, 0x4069abe0005005ULL, nullptr, nullptr, OperandInfo288, -1 ,nullptr }, // Inst #14431 = VXORPDZ256rrkz
{ 14432, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x8081abe0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14432 = VXORPDZrm
{ 14433, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x1181abe0005006ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14433 = VXORPDZrmb
{ 14434, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11a1abe0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #14434 = VXORPDZrmbk
{ 14435, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x11e1abe0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14435 = VXORPDZrmbkz
{ 14436, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a1abe0005006ULL, nullptr, nullptr, OperandInfo292, -1 ,nullptr }, // Inst #14436 = VXORPDZrmk
{ 14437, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e1abe0005006ULL, nullptr, nullptr, OperandInfo293, -1 ,nullptr }, // Inst #14437 = VXORPDZrmkz
{ 14438, 3, 1, 0, 0, 0, 0x8081abe0005005ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #14438 = VXORPDZrr
{ 14439, 5, 1, 0, 0, 0, 0x80a1abe0005005ULL, nullptr, nullptr, OperandInfo295, -1 ,nullptr }, // Inst #14439 = VXORPDZrrk
{ 14440, 4, 1, 0, 0, 0, 0x80e1abe0005005ULL, nullptr, nullptr, OperandInfo296, -1 ,nullptr }, // Inst #14440 = VXORPDZrrkz
{ 14441, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x12bb0005006ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14441 = VXORPDrm
{ 14442, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x12bb0005005ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14442 = VXORPDrr
{ 14443, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x92ba8004806ULL, nullptr, nullptr, OperandInfo276, -1 ,nullptr }, // Inst #14443 = VXORPSYrm
{ 14444, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x92ba8004805ULL, nullptr, nullptr, OperandInfo277, -1 ,nullptr }, // Inst #14444 = VXORPSYrr
{ 14445, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20012be0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14445 = VXORPSZ128rm
{ 14446, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9012be0004806ULL, nullptr, nullptr, OperandInfo157, -1 ,nullptr }, // Inst #14446 = VXORPSZ128rmb
{ 14447, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9212be0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #14447 = VXORPSZ128rmbk
{ 14448, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9612be0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #14448 = VXORPSZ128rmbkz
{ 14449, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20212be0004806ULL, nullptr, nullptr, OperandInfo297, -1 ,nullptr }, // Inst #14449 = VXORPSZ128rmk
{ 14450, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x20612be0004806ULL, nullptr, nullptr, OperandInfo298, -1 ,nullptr }, // Inst #14450 = VXORPSZ128rmkz
{ 14451, 3, 1, 0, 0, 0, 0x20012be0004805ULL, nullptr, nullptr, OperandInfo280, -1 ,nullptr }, // Inst #14451 = VXORPSZ128rr
{ 14452, 5, 1, 0, 0, 0, 0x20212be0004805ULL, nullptr, nullptr, OperandInfo299, -1 ,nullptr }, // Inst #14452 = VXORPSZ128rrk
{ 14453, 4, 1, 0, 0, 0, 0x20612be0004805ULL, nullptr, nullptr, OperandInfo300, -1 ,nullptr }, // Inst #14453 = VXORPSZ128rrkz
{ 14454, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40092be0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14454 = VXORPSZ256rm
{ 14455, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9092be0004806ULL, nullptr, nullptr, OperandInfo283, -1 ,nullptr }, // Inst #14455 = VXORPSZ256rmb
{ 14456, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9292be0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #14456 = VXORPSZ256rmbk
{ 14457, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9692be0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #14457 = VXORPSZ256rmbkz
{ 14458, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40292be0004806ULL, nullptr, nullptr, OperandInfo301, -1 ,nullptr }, // Inst #14458 = VXORPSZ256rmk
{ 14459, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x40692be0004806ULL, nullptr, nullptr, OperandInfo302, -1 ,nullptr }, // Inst #14459 = VXORPSZ256rmkz
{ 14460, 3, 1, 0, 0, 0, 0x40092be0004805ULL, nullptr, nullptr, OperandInfo286, -1 ,nullptr }, // Inst #14460 = VXORPSZ256rr
{ 14461, 5, 1, 0, 0, 0, 0x40292be0004805ULL, nullptr, nullptr, OperandInfo303, -1 ,nullptr }, // Inst #14461 = VXORPSZ256rrk
{ 14462, 4, 1, 0, 0, 0, 0x40692be0004805ULL, nullptr, nullptr, OperandInfo304, -1 ,nullptr }, // Inst #14462 = VXORPSZ256rrkz
{ 14463, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80812be0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14463 = VXORPSZrm
{ 14464, 7, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9812be0004806ULL, nullptr, nullptr, OperandInfo291, -1 ,nullptr }, // Inst #14464 = VXORPSZrmb
{ 14465, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9a12be0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14465 = VXORPSZrmbk
{ 14466, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x9e12be0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #14466 = VXORPSZrmbkz
{ 14467, 9, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80a12be0004806ULL, nullptr, nullptr, OperandInfo307, -1 ,nullptr }, // Inst #14467 = VXORPSZrmk
{ 14468, 8, 1, 0, 0, 0|(1ULL<<MCID::MayLoad), 0x80e12be0004806ULL, nullptr, nullptr, OperandInfo308, -1 ,nullptr }, // Inst #14468 = VXORPSZrmkz
{ 14469, 3, 1, 0, 0, 0, 0x80812be0004805ULL, nullptr, nullptr, OperandInfo294, -1 ,nullptr }, // Inst #14469 = VXORPSZrr
{ 14470, 5, 1, 0, 0, 0, 0x80a12be0004805ULL, nullptr, nullptr, OperandInfo309, -1 ,nullptr }, // Inst #14470 = VXORPSZrrk
{ 14471, 4, 1, 0, 0, 0, 0x80e12be0004805ULL, nullptr, nullptr, OperandInfo310, -1 ,nullptr }, // Inst #14471 = VXORPSZrrkz
{ 14472, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x12ba8004806ULL, nullptr, nullptr, OperandInfo155, -1 ,nullptr }, // Inst #14472 = VXORPSrm
{ 14473, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x12ba8004805ULL, nullptr, nullptr, OperandInfo156, -1 ,nullptr }, // Inst #14473 = VXORPSrr
{ 14474, 0, 0, 0, 944, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x83ba0004801ULL, nullptr, ImplicitList87, nullptr, -1 ,nullptr }, // Inst #14474 = VZEROALL
{ 14475, 0, 0, 0, 943, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x3ba0004801ULL, nullptr, ImplicitList87, nullptr, -1 ,nullptr }, // Inst #14475 = VZEROUPPER
{ 14476, 1, 1, 0, 36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo931, -1 ,nullptr }, // Inst #14476 = V_SET0
{ 14477, 1, 1, 0, 36, 0|(1ULL<<MCID::Pseudo)|(1ULL<<MCID::FoldableAsLoad)|(1ULL<<MCID::Rematerializable)|(1ULL<<MCID::CheapAsAMove), 0x0ULL, nullptr, nullptr, OperandInfo931, -1 ,nullptr }, // Inst #14477 = V_SETALLONES
{ 14478, 0, 0, 0, 776, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4d80000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #14478 = WAIT
{ 14479, 0, 0, 0, 198, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x480004001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #14479 = WBINVD
{ 14480, 0, 0, 0, 0, 0|(1ULL<<MCID::UsesCustomInserter), 0x0ULL, ImplicitList11, ImplicitList79, nullptr, -1 ,nullptr }, // Inst #14480 = WIN_ALLOCA
{ 14481, 1, 0, 0, 454, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList11, ImplicitList12, OperandInfo83, -1 ,nullptr }, // Inst #14481 = WRFLAGS32
{ 14482, 1, 0, 0, 454, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, ImplicitList13, ImplicitList14, OperandInfo85, -1 ,nullptr }, // Inst #14482 = WRFLAGS64
{ 14483, 1, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005812ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #14483 = WRFSBASE
{ 14484, 1, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700025812ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #14484 = WRFSBASE64
{ 14485, 1, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700005813ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #14485 = WRGSBASE
{ 14486, 1, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x5700025813ULL, nullptr, nullptr, OperandInfo85, -1 ,nullptr }, // Inst #14486 = WRGSBASE64
{ 14487, 0, 0, 0, 581, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x1800004001ULL, ImplicitList46, nullptr, nullptr, -1 ,nullptr }, // Inst #14487 = WRMSR
{ 14488, 1, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #14488 = WRPKRU
{ 14489, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x8000404fULL, ImplicitList46, nullptr, nullptr, -1 ,nullptr }, // Inst #14489 = WRPKRUr
{ 14490, 1, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6300040058ULL, nullptr, nullptr, OperandInfo2, -1 ,nullptr }, // Inst #14490 = XABORT
{ 14491, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7900000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #14491 = XACQUIRE_PREFIX
{ 14492, 6, 0, 0, 725, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6080004084ULL, nullptr, nullptr, OperandInfo21, -1 ,nullptr }, // Inst #14492 = XADD16rm
{ 14493, 2, 1, 0, 583, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6080004083ULL, nullptr, nullptr, OperandInfo61, -1 ,nullptr }, // Inst #14493 = XADD16rr
{ 14494, 6, 0, 0, 725, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6080004104ULL, nullptr, nullptr, OperandInfo25, -1 ,nullptr }, // Inst #14494 = XADD32rm
{ 14495, 2, 1, 0, 583, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6080004103ULL, nullptr, nullptr, OperandInfo51, -1 ,nullptr }, // Inst #14495 = XADD32rr
{ 14496, 6, 0, 0, 725, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6080024004ULL, nullptr, nullptr, OperandInfo29, -1 ,nullptr }, // Inst #14496 = XADD64rm
{ 14497, 2, 1, 0, 583, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6080024003ULL, nullptr, nullptr, OperandInfo52, -1 ,nullptr }, // Inst #14497 = XADD64rr
{ 14498, 6, 0, 0, 725, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x6000004004ULL, nullptr, nullptr, OperandInfo33, -1 ,nullptr }, // Inst #14498 = XADD8rm
{ 14499, 2, 1, 0, 583, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6000004003ULL, nullptr, nullptr, OperandInfo107, -1 ,nullptr }, // Inst #14499 = XADD8rr
{ 14500, 1, 1, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UsesCustomInserter)|(1ULL<<MCID::UnmodeledSideEffects), 0x0ULL, nullptr, nullptr, OperandInfo83, -1 ,nullptr }, // Inst #14500 = XBEGIN
{ 14501, 1, 0, 0, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x63801000d8ULL, nullptr, ImplicitList9, OperandInfo84, -1 ,nullptr }, // Inst #14501 = XBEGIN_2
{ 14502, 1, 0, 0, 0, 0|(1ULL<<MCID::Branch)|(1ULL<<MCID::Terminator)|(1ULL<<MCID::UnmodeledSideEffects), 0x6380180158ULL, nullptr, ImplicitList9, OperandInfo84, -1 ,nullptr }, // Inst #14502 = XBEGIN_4
{ 14503, 1, 0, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4800000082ULL, ImplicitList3, ImplicitList3, OperandInfo82, -1 ,nullptr }, // Inst #14503 = XCHG16ar
{ 14504, 7, 1, 0, 596, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380000086ULL, nullptr, nullptr, OperandInfo23, -1 ,nullptr }, // Inst #14504 = XCHG16rm
{ 14505, 3, 1, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4380000085ULL, nullptr, nullptr, OperandInfo24, -1 ,nullptr }, // Inst #14505 = XCHG16rr
{ 14506, 1, 0, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4800000102ULL, ImplicitList9, ImplicitList9, OperandInfo83, -1 ,nullptr }, // Inst #14506 = XCHG32ar
{ 14507, 1, 0, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4800000102ULL, ImplicitList9, ImplicitList9, OperandInfo932, -1 ,nullptr }, // Inst #14507 = XCHG32ar64
{ 14508, 7, 1, 0, 596, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380000106ULL, nullptr, nullptr, OperandInfo27, -1 ,nullptr }, // Inst #14508 = XCHG32rm
{ 14509, 3, 1, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4380000105ULL, nullptr, nullptr, OperandInfo28, -1 ,nullptr }, // Inst #14509 = XCHG32rr
{ 14510, 1, 0, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4800020002ULL, ImplicitList10, ImplicitList10, OperandInfo85, -1 ,nullptr }, // Inst #14510 = XCHG64ar
{ 14511, 7, 1, 0, 596, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4380020006ULL, nullptr, nullptr, OperandInfo31, -1 ,nullptr }, // Inst #14511 = XCHG64rm
{ 14512, 3, 1, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4380020005ULL, nullptr, nullptr, OperandInfo32, -1 ,nullptr }, // Inst #14512 = XCHG64rr
{ 14513, 7, 1, 0, 596, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x4300000006ULL, nullptr, nullptr, OperandInfo35, -1 ,nullptr }, // Inst #14513 = XCHG8rm
{ 14514, 3, 1, 0, 595, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x4300000005ULL, nullptr, nullptr, OperandInfo36, -1 ,nullptr }, // Inst #14514 = XCHG8rr
{ 14515, 1, 0, 0, 743, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6c80000011ULL, nullptr, ImplicitList5, OperandInfo44, -1 ,nullptr }, // Inst #14515 = XCH_F
{ 14516, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004030ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr }, // Inst #14516 = XCRYPTCBC
{ 14517, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004040ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr }, // Inst #14517 = XCRYPTCFB
{ 14518, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004038ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr }, // Inst #14518 = XCRYPTCTR
{ 14519, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004028ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr }, // Inst #14519 = XCRYPTECB
{ 14520, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004048ULL, ImplicitList88, ImplicitList89, nullptr, -1 ,nullptr }, // Inst #14520 = XCRYPTOFB
{ 14521, 0, 0, 0, 0, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x80004035ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #14521 = XEND
{ 14522, 0, 0, 0, 732, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004030ULL, ImplicitList35, ImplicitList90, nullptr, -1 ,nullptr }, // Inst #14522 = XGETBV
{ 14523, 0, 0, 0, 597, 0|(1ULL<<MCID::MayLoad), 0x6b80000001ULL, ImplicitList91, ImplicitList4, nullptr, -1 ,nullptr }, // Inst #14523 = XLAT
{ 14524, 1, 0, 0, 9, 0, 0x1a800c0081ULL, ImplicitList3, ImplicitList2, OperandInfo2, -1 ,nullptr }, // Inst #14524 = XOR16i16
{ 14525, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40800c009eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #14525 = XOR16mi
{ 14526, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004009eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #14526 = XOR16mi8
{ 14527, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880000084ULL, nullptr, ImplicitList6, OperandInfo21, -1 ,nullptr }, // Inst #14527 = XOR16mr
{ 14528, 3, 1, 0, 9, 0, 0x40800c0096ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #14528 = XOR16ri
{ 14529, 3, 1, 0, 9, 0, 0x4180040096ULL, nullptr, ImplicitList6, OperandInfo22, -1 ,nullptr }, // Inst #14529 = XOR16ri8
{ 14530, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x1980000086ULL, nullptr, ImplicitList6, OperandInfo23, -1 ,nullptr }, // Inst #14530 = XOR16rm
{ 14531, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x1880000083ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #14531 = XOR16rr
{ 14532, 3, 1, 0, 9, 0, 0x1980000085ULL, nullptr, ImplicitList6, OperandInfo24, -1 ,nullptr }, // Inst #14532 = XOR16rr_REV
{ 14533, 1, 0, 0, 9, 0, 0x1a80140101ULL, ImplicitList9, ImplicitList7, OperandInfo2, -1 ,nullptr }, // Inst #14533 = XOR32i32
{ 14534, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x408014011eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #14534 = XOR32mi
{ 14535, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418004011eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #14535 = XOR32mi8
{ 14536, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880000104ULL, nullptr, ImplicitList6, OperandInfo25, -1 ,nullptr }, // Inst #14536 = XOR32mr
{ 14537, 3, 1, 0, 9, 0, 0x4080140116ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #14537 = XOR32ri
{ 14538, 3, 1, 0, 9, 0, 0x4180040116ULL, nullptr, ImplicitList6, OperandInfo26, -1 ,nullptr }, // Inst #14538 = XOR32ri8
{ 14539, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x1980000106ULL, nullptr, ImplicitList6, OperandInfo27, -1 ,nullptr }, // Inst #14539 = XOR32rm
{ 14540, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x1880000103ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #14540 = XOR32rr
{ 14541, 3, 1, 0, 9, 0, 0x1980000105ULL, nullptr, ImplicitList6, OperandInfo28, -1 ,nullptr }, // Inst #14541 = XOR32rr_REV
{ 14542, 1, 0, 0, 9, 0, 0x1a801e0001ULL, ImplicitList10, ImplicitList8, OperandInfo2, -1 ,nullptr }, // Inst #14542 = XOR64i32
{ 14543, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x40801e001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #14543 = XOR64mi32
{ 14544, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x418006001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #14544 = XOR64mi8
{ 14545, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1880020004ULL, nullptr, ImplicitList6, OperandInfo29, -1 ,nullptr }, // Inst #14545 = XOR64mr
{ 14546, 3, 1, 0, 9, 0, 0x40801e0016ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #14546 = XOR64ri32
{ 14547, 3, 1, 0, 9, 0, 0x4180060016ULL, nullptr, ImplicitList6, OperandInfo30, -1 ,nullptr }, // Inst #14547 = XOR64ri8
{ 14548, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x1980020006ULL, nullptr, ImplicitList6, OperandInfo31, -1 ,nullptr }, // Inst #14548 = XOR64rm
{ 14549, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x1880020003ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #14549 = XOR64rr
{ 14550, 3, 1, 0, 9, 0, 0x1980020005ULL, nullptr, ImplicitList6, OperandInfo32, -1 ,nullptr }, // Inst #14550 = XOR64rr_REV
{ 14551, 1, 0, 0, 9, 0, 0x1a00040001ULL, ImplicitList4, ImplicitList1, OperandInfo2, -1 ,nullptr }, // Inst #14551 = XOR8i8
{ 14552, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x400004001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #14552 = XOR8mi
{ 14553, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x410004001eULL, nullptr, ImplicitList6, OperandInfo20, -1 ,nullptr }, // Inst #14553 = XOR8mi8
{ 14554, 6, 0, 0, 651, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore), 0x1800000004ULL, nullptr, ImplicitList6, OperandInfo33, -1 ,nullptr }, // Inst #14554 = XOR8mr
{ 14555, 3, 1, 0, 9, 0, 0x4000040016ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #14555 = XOR8ri
{ 14556, 3, 1, 0, 9, 0, 0x4100040016ULL, nullptr, ImplicitList6, OperandInfo34, -1 ,nullptr }, // Inst #14556 = XOR8ri8
{ 14557, 7, 1, 0, 12, 0|(1ULL<<MCID::MayLoad), 0x1900000006ULL, nullptr, ImplicitList6, OperandInfo35, -1 ,nullptr }, // Inst #14557 = XOR8rm
{ 14558, 3, 1, 0, 9, 0|(1ULL<<MCID::Commutable), 0x1800000003ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #14558 = XOR8rr
{ 14559, 3, 1, 0, 9, 0, 0x1900000005ULL, nullptr, ImplicitList6, OperandInfo36, -1 ,nullptr }, // Inst #14559 = XOR8rr_REV
{ 14560, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x2b90005006ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #14560 = XORPDrm
{ 14561, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x2b90005005ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #14561 = XORPDrr
{ 14562, 7, 1, 0, 942, 0|(1ULL<<MCID::MayLoad), 0x2b88004806ULL, nullptr, nullptr, OperandInfo37, -1 ,nullptr }, // Inst #14562 = XORPSrm
{ 14563, 3, 1, 0, 941, 0|(1ULL<<MCID::Commutable), 0x2b88004805ULL, nullptr, nullptr, OperandInfo38, -1 ,nullptr }, // Inst #14563 = XORPSrr
{ 14564, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x7980000001ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #14564 = XRELEASE_PREFIX
{ 14565, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000401dULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14565 = XRSTOR
{ 14566, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570002401dULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14566 = XRSTOR64
{ 14567, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638000401bULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14567 = XRSTORS
{ 14568, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638002401bULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14568 = XRSTORS64
{ 14569, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000401cULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14569 = XSAVE
{ 14570, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570002401cULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14570 = XSAVE64
{ 14571, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638000401cULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14571 = XSAVEC
{ 14572, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638002401cULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14572 = XSAVEC64
{ 14573, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570000481eULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14573 = XSAVEOPT
{ 14574, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x570002481eULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14574 = XSAVEOPT64
{ 14575, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638000401dULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14575 = XSAVES
{ 14576, 5, 0, 0, 56, 0|(1ULL<<MCID::MayLoad)|(1ULL<<MCID::MayStore)|(1ULL<<MCID::UnmodeledSideEffects), 0x638002401dULL, ImplicitList90, nullptr, OperandInfo43, -1 ,nullptr }, // Inst #14576 = XSAVES64
{ 14577, 0, 0, 0, 56, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004031ULL, ImplicitList92, nullptr, nullptr, -1 ,nullptr }, // Inst #14577 = XSETBV
{ 14578, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5300004028ULL, ImplicitList93, ImplicitList93, nullptr, -1 ,nullptr }, // Inst #14578 = XSHA1
{ 14579, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5300004030ULL, ImplicitList93, ImplicitList93, nullptr, -1 ,nullptr }, // Inst #14579 = XSHA256
{ 14580, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x5380004020ULL, ImplicitList94, ImplicitList95, nullptr, -1 ,nullptr }, // Inst #14580 = XSTORE
{ 14581, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x80004036ULL, nullptr, ImplicitList6, nullptr, -1 ,nullptr }, // Inst #14581 = XTEST
{ 14582, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000041ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #14582 = fdisi8087_nop
{ 14583, 0, 0, 0, 0, 0|(1ULL<<MCID::UnmodeledSideEffects), 0x6d80000040ULL, nullptr, nullptr, nullptr, -1 ,nullptr }, // Inst #14583 = feni8087_nop
};
static inline void InitX86MCInstrInfo(MCInstrInfo *II) {
II->InitMCInstrInfo(X86Insts, NULL, NULL, 14584);
}
} // end llvm namespace
#endif // GET_INSTRINFO_MC_DESC
#ifdef GET_INSTRINFO_HEADER
#undef GET_INSTRINFO_HEADER
namespace llvm_ks {
struct X86GenInstrInfo : public TargetInstrInfo {
explicit X86GenInstrInfo(int CFSetupOpcode = -1, int CFDestroyOpcode = -1, int CatchRetOpcode = -1);
~X86GenInstrInfo() override {}
};
} // end llvm namespace
#endif // GET_INSTRINFO_HEADER
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