/// @file xed-iform-map-init.c

// This file was automatically generated.
// Do not edit this file.

/*BEGIN_LEGAL

Copyright (c) 2021 Intel Corporation

  Licensed under the Apache License, Version 2.0 (the "License");
  you may not use this file except in compliance with the License.
  You may obtain a copy of the License at

      http://www.apache.org/licenses/LICENSE-2.0

  Unless required by applicable law or agreed to in writing, software
  distributed under the License is distributed on an "AS IS" BASIS,
  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  See the License for the specific language governing permissions and
  limitations under the License.
  
END_LEGAL */
#include "xed-internal-header.h"
#include "xed-iform-map.h"

const xed_iform_info_t xed_iform_db[XED_IFORM_LAST] = {
/*                       INVALID */ {  (xed_uint16_t)        XED_ICLASS_INVALID, (xed_uint8_t)   XED_CATEGORY_INVALID, (xed_uint8_t)XED_EXTENSION_INVALID, (xed_uint16_t)      XED_ISA_SET_INVALID, (xed_uint16_t)   0 },
/*                           AAA */ {  (xed_uint16_t)            XED_ICLASS_AAA, (xed_uint8_t)   XED_CATEGORY_DECIMAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      AAD_IMMb */ {  (xed_uint16_t)            XED_ICLASS_AAD, (xed_uint8_t)   XED_CATEGORY_DECIMAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      AAM_IMMb */ {  (xed_uint16_t)            XED_ICLASS_AAM, (xed_uint8_t)   XED_CATEGORY_DECIMAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                           AAS */ {  (xed_uint16_t)            XED_ICLASS_AAS, (xed_uint8_t)   XED_CATEGORY_DECIMAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   ADC_AL_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              ADC_GPR8_GPR8_10 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              ADC_GPR8_GPR8_12 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADC_GPR8_IMMb_80r2 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADC_GPR8_IMMb_82r2 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_GPR8_MEMb */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              ADC_GPRv_GPRv_11 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              ADC_GPRv_GPRv_13 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_GPRv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_MEMb_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADC_MEMb_IMMb_80r2 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADC_MEMb_IMMb_82r2 */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_MEMv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADC_OrAX_IMMz */ {  (xed_uint16_t)            XED_ICLASS_ADC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADCX_GPR32d_GPR32d */ {  (xed_uint16_t)           XED_ICLASS_ADCX, (xed_uint8_t) XED_CATEGORY_ADOX_ADCX, (xed_uint8_t)XED_EXTENSION_ADOX_ADCX, (xed_uint16_t)    XED_ISA_SET_ADOX_ADCX, (xed_uint16_t)   0 },
/*              ADCX_GPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_ADCX, (xed_uint8_t) XED_CATEGORY_ADOX_ADCX, (xed_uint8_t)XED_EXTENSION_ADOX_ADCX, (xed_uint16_t)    XED_ISA_SET_ADOX_ADCX, (xed_uint16_t)   0 },
/*            ADCX_GPR64q_GPR64q */ {  (xed_uint16_t)           XED_ICLASS_ADCX, (xed_uint8_t) XED_CATEGORY_ADOX_ADCX, (xed_uint8_t)XED_EXTENSION_ADOX_ADCX, (xed_uint16_t)    XED_ISA_SET_ADOX_ADCX, (xed_uint16_t)   0 },
/*              ADCX_GPR64q_MEMq */ {  (xed_uint16_t)           XED_ICLASS_ADCX, (xed_uint8_t) XED_CATEGORY_ADOX_ADCX, (xed_uint8_t)XED_EXTENSION_ADOX_ADCX, (xed_uint16_t)    XED_ISA_SET_ADOX_ADCX, (xed_uint16_t)   0 },
/*            ADC_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)       XED_ICLASS_ADC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   6 },
/*       ADC_LOCK_MEMb_IMMb_80r2 */ {  (xed_uint16_t)       XED_ICLASS_ADC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   6 },
/*       ADC_LOCK_MEMb_IMMb_82r2 */ {  (xed_uint16_t)       XED_ICLASS_ADC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   6 },
/*            ADC_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_ADC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   6 },
/*            ADC_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_ADC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   6 },
/*            ADC_LOCK_MEMv_IMMz */ {  (xed_uint16_t)       XED_ICLASS_ADC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   6 },
/*                   ADD_AL_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              ADD_GPR8_GPR8_00 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              ADD_GPR8_GPR8_02 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADD_GPR8_IMMb_80r0 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADD_GPR8_IMMb_82r0 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_GPR8_MEMb */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              ADD_GPRv_GPRv_01 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              ADD_GPRv_GPRv_03 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_GPRv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_MEMb_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADD_MEMb_IMMb_80r0 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ADD_MEMb_IMMb_82r0 */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_MEMv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ADD_OrAX_IMMz */ {  (xed_uint16_t)            XED_ICLASS_ADD, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             ADDPD_XMMpd_MEMpd */ {  (xed_uint16_t)          XED_ICLASS_ADDPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             ADDPD_XMMpd_XMMpd */ {  (xed_uint16_t)          XED_ICLASS_ADDPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             ADDPS_XMMps_MEMps */ {  (xed_uint16_t)          XED_ICLASS_ADDPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             ADDPS_XMMps_XMMps */ {  (xed_uint16_t)          XED_ICLASS_ADDPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             ADDSD_XMMsd_MEMsd */ {  (xed_uint16_t)          XED_ICLASS_ADDSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             ADDSD_XMMsd_XMMsd */ {  (xed_uint16_t)          XED_ICLASS_ADDSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             ADDSS_XMMss_MEMss */ {  (xed_uint16_t)          XED_ICLASS_ADDSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             ADDSS_XMMss_XMMss */ {  (xed_uint16_t)          XED_ICLASS_ADDSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*          ADDSUBPD_XMMpd_MEMpd */ {  (xed_uint16_t)       XED_ICLASS_ADDSUBPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*          ADDSUBPD_XMMpd_XMMpd */ {  (xed_uint16_t)       XED_ICLASS_ADDSUBPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*          ADDSUBPS_XMMps_MEMps */ {  (xed_uint16_t)       XED_ICLASS_ADDSUBPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*          ADDSUBPS_XMMps_XMMps */ {  (xed_uint16_t)       XED_ICLASS_ADDSUBPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            ADD_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)       XED_ICLASS_ADD_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   2 },
/*       ADD_LOCK_MEMb_IMMb_80r0 */ {  (xed_uint16_t)       XED_ICLASS_ADD_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   2 },
/*       ADD_LOCK_MEMb_IMMb_82r0 */ {  (xed_uint16_t)       XED_ICLASS_ADD_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   2 },
/*            ADD_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_ADD_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   2 },
/*            ADD_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_ADD_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   2 },
/*            ADD_LOCK_MEMv_IMMz */ {  (xed_uint16_t)       XED_ICLASS_ADD_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   2 },
/*            ADOX_GPR32d_GPR32d */ {  (xed_uint16_t)           XED_ICLASS_ADOX, (xed_uint8_t) XED_CATEGORY_ADOX_ADCX, (xed_uint8_t)XED_EXTENSION_ADOX_ADCX, (xed_uint16_t)    XED_ISA_SET_ADOX_ADCX, (xed_uint16_t)   0 },
/*              ADOX_GPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_ADOX, (xed_uint8_t) XED_CATEGORY_ADOX_ADCX, (xed_uint8_t)XED_EXTENSION_ADOX_ADCX, (xed_uint16_t)    XED_ISA_SET_ADOX_ADCX, (xed_uint16_t)   0 },
/*            ADOX_GPR64q_GPR64q */ {  (xed_uint16_t)           XED_ICLASS_ADOX, (xed_uint8_t) XED_CATEGORY_ADOX_ADCX, (xed_uint8_t)XED_EXTENSION_ADOX_ADCX, (xed_uint16_t)    XED_ISA_SET_ADOX_ADCX, (xed_uint16_t)   0 },
/*              ADOX_GPR64q_MEMq */ {  (xed_uint16_t)           XED_ICLASS_ADOX, (xed_uint8_t) XED_CATEGORY_ADOX_ADCX, (xed_uint8_t)XED_EXTENSION_ADOX_ADCX, (xed_uint16_t)    XED_ISA_SET_ADOX_ADCX, (xed_uint16_t)   0 },
/*            AESDEC_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_AESDEC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*            AESDEC_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_AESDEC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*       AESDEC128KL_XMMu8_MEMu8 */ {  (xed_uint16_t)    XED_ICLASS_AESDEC128KL, (xed_uint8_t) XED_CATEGORY_KEYLOCKER, (xed_uint8_t)XED_EXTENSION_KEYLOCKER, (xed_uint16_t)    XED_ISA_SET_KEYLOCKER, (xed_uint16_t)   0 },
/*       AESDEC256KL_XMMu8_MEMu8 */ {  (xed_uint16_t)    XED_ICLASS_AESDEC256KL, (xed_uint8_t) XED_CATEGORY_KEYLOCKER, (xed_uint8_t)XED_EXTENSION_KEYLOCKER, (xed_uint16_t)    XED_ISA_SET_KEYLOCKER, (xed_uint16_t)   0 },
/*        AESDECLAST_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_AESDECLAST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*        AESDECLAST_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_AESDECLAST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*         AESDECWIDE128KL_MEMu8 */ {  (xed_uint16_t) XED_ICLASS_AESDECWIDE128KL, (xed_uint8_t) XED_CATEGORY_KEYLOCKER_WIDE, (xed_uint8_t)XED_EXTENSION_KEYLOCKER_WIDE, (xed_uint16_t)XED_ISA_SET_KEYLOCKER_WIDE, (xed_uint16_t)   0 },
/*         AESDECWIDE256KL_MEMu8 */ {  (xed_uint16_t) XED_ICLASS_AESDECWIDE256KL, (xed_uint8_t) XED_CATEGORY_KEYLOCKER_WIDE, (xed_uint8_t)XED_EXTENSION_KEYLOCKER_WIDE, (xed_uint16_t)XED_ISA_SET_KEYLOCKER_WIDE, (xed_uint16_t)   0 },
/*            AESENC_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_AESENC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*            AESENC_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_AESENC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*       AESENC128KL_XMMu8_MEMu8 */ {  (xed_uint16_t)    XED_ICLASS_AESENC128KL, (xed_uint8_t) XED_CATEGORY_KEYLOCKER, (xed_uint8_t)XED_EXTENSION_KEYLOCKER, (xed_uint16_t)    XED_ISA_SET_KEYLOCKER, (xed_uint16_t)   0 },
/*       AESENC256KL_XMMu8_MEMu8 */ {  (xed_uint16_t)    XED_ICLASS_AESENC256KL, (xed_uint8_t) XED_CATEGORY_KEYLOCKER, (xed_uint8_t)XED_EXTENSION_KEYLOCKER, (xed_uint16_t)    XED_ISA_SET_KEYLOCKER, (xed_uint16_t)   0 },
/*        AESENCLAST_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_AESENCLAST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*        AESENCLAST_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_AESENCLAST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*         AESENCWIDE128KL_MEMu8 */ {  (xed_uint16_t) XED_ICLASS_AESENCWIDE128KL, (xed_uint8_t) XED_CATEGORY_KEYLOCKER_WIDE, (xed_uint8_t)XED_EXTENSION_KEYLOCKER_WIDE, (xed_uint16_t)XED_ISA_SET_KEYLOCKER_WIDE, (xed_uint16_t)   0 },
/*         AESENCWIDE256KL_MEMu8 */ {  (xed_uint16_t) XED_ICLASS_AESENCWIDE256KL, (xed_uint8_t) XED_CATEGORY_KEYLOCKER_WIDE, (xed_uint8_t)XED_EXTENSION_KEYLOCKER_WIDE, (xed_uint16_t)XED_ISA_SET_KEYLOCKER_WIDE, (xed_uint16_t)   0 },
/*            AESIMC_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_AESIMC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*            AESIMC_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_AESIMC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/* AESKEYGENASSIST_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t) XED_ICLASS_AESKEYGENASSIST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/* AESKEYGENASSIST_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t) XED_ICLASS_AESKEYGENASSIST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)   XED_EXTENSION_AES, (xed_uint16_t)          XED_ISA_SET_AES, (xed_uint16_t)   0 },
/*                   AND_AL_IMMb */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              AND_GPR8_GPR8_20 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              AND_GPR8_GPR8_22 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            AND_GPR8_IMMb_80r4 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            AND_GPR8_IMMb_82r4 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_GPR8_MEMb */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              AND_GPRv_GPRv_21 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              AND_GPRv_GPRv_23 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_GPRv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_MEMb_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            AND_MEMb_IMMb_80r4 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            AND_MEMb_IMMb_82r4 */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_MEMv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 AND_OrAX_IMMz */ {  (xed_uint16_t)            XED_ICLASS_AND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*     ANDN_VGPR32d_VGPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_ANDN, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*  ANDN_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_ANDN, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*     ANDN_VGPR64q_VGPR64q_MEMq */ {  (xed_uint16_t)           XED_ICLASS_ANDN, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*  ANDN_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_ANDN, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*          ANDNPD_XMMxuq_MEMxuq */ {  (xed_uint16_t)         XED_ICLASS_ANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          ANDNPD_XMMxuq_XMMxuq */ {  (xed_uint16_t)         XED_ICLASS_ANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          ANDNPS_XMMxud_MEMxud */ {  (xed_uint16_t)         XED_ICLASS_ANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*          ANDNPS_XMMxud_XMMxud */ {  (xed_uint16_t)         XED_ICLASS_ANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           ANDPD_XMMxuq_MEMxuq */ {  (xed_uint16_t)          XED_ICLASS_ANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           ANDPD_XMMxuq_XMMxuq */ {  (xed_uint16_t)          XED_ICLASS_ANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           ANDPS_XMMxud_MEMxud */ {  (xed_uint16_t)          XED_ICLASS_ANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           ANDPS_XMMxud_XMMxud */ {  (xed_uint16_t)          XED_ICLASS_ANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            AND_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)       XED_ICLASS_AND_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  10 },
/*       AND_LOCK_MEMb_IMMb_80r4 */ {  (xed_uint16_t)       XED_ICLASS_AND_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  10 },
/*       AND_LOCK_MEMb_IMMb_82r4 */ {  (xed_uint16_t)       XED_ICLASS_AND_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  10 },
/*            AND_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_AND_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  10 },
/*            AND_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_AND_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  10 },
/*            AND_LOCK_MEMv_IMMz */ {  (xed_uint16_t)       XED_ICLASS_AND_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  10 },
/*              ARPL_GPR16_GPR16 */ {  (xed_uint16_t)           XED_ICLASS_ARPL, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*               ARPL_MEMw_GPR16 */ {  (xed_uint16_t)           XED_ICLASS_ARPL, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*    BEXTR_VGPR32d_MEMd_VGPR32d */ {  (xed_uint16_t)          XED_ICLASS_BEXTR, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/* BEXTR_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)          XED_ICLASS_BEXTR, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*    BEXTR_VGPR64q_MEMq_VGPR64q */ {  (xed_uint16_t)          XED_ICLASS_BEXTR, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/* BEXTR_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)          XED_ICLASS_BEXTR, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*   BEXTR_XOP_VGPR32d_MEMd_IMMd */ {  (xed_uint16_t)      XED_ICLASS_BEXTR_XOP, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t) 132 },
/* BEXTR_XOP_VGPR32d_VGPR32d_IMMd */ {  (xed_uint16_t)      XED_ICLASS_BEXTR_XOP, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t) 132 },
/*    BEXTR_XOP_VGPRyy_MEMy_IMMd */ {  (xed_uint16_t)      XED_ICLASS_BEXTR_XOP, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t) 132 },
/*  BEXTR_XOP_VGPRyy_VGPRyy_IMMd */ {  (xed_uint16_t)      XED_ICLASS_BEXTR_XOP, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t) 132 },
/*          BLCFILL_VGPR32d_MEMd */ {  (xed_uint16_t)        XED_ICLASS_BLCFILL, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*       BLCFILL_VGPR32d_VGPR32d */ {  (xed_uint16_t)        XED_ICLASS_BLCFILL, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*           BLCFILL_VGPRyy_MEMy */ {  (xed_uint16_t)        XED_ICLASS_BLCFILL, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*         BLCFILL_VGPRyy_VGPRyy */ {  (xed_uint16_t)        XED_ICLASS_BLCFILL, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*             BLCI_VGPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_BLCI, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*          BLCI_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_BLCI, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*              BLCI_VGPRyy_MEMy */ {  (xed_uint16_t)           XED_ICLASS_BLCI, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*            BLCI_VGPRyy_VGPRyy */ {  (xed_uint16_t)           XED_ICLASS_BLCI, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*            BLCIC_VGPR32d_MEMd */ {  (xed_uint16_t)          XED_ICLASS_BLCIC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*         BLCIC_VGPR32d_VGPR32d */ {  (xed_uint16_t)          XED_ICLASS_BLCIC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*             BLCIC_VGPRyy_MEMy */ {  (xed_uint16_t)          XED_ICLASS_BLCIC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*           BLCIC_VGPRyy_VGPRyy */ {  (xed_uint16_t)          XED_ICLASS_BLCIC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*           BLCMSK_VGPR32d_MEMd */ {  (xed_uint16_t)         XED_ICLASS_BLCMSK, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*        BLCMSK_VGPR32d_VGPR32d */ {  (xed_uint16_t)         XED_ICLASS_BLCMSK, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*            BLCMSK_VGPRyy_MEMy */ {  (xed_uint16_t)         XED_ICLASS_BLCMSK, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*          BLCMSK_VGPRyy_VGPRyy */ {  (xed_uint16_t)         XED_ICLASS_BLCMSK, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*             BLCS_VGPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_BLCS, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*          BLCS_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_BLCS, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*              BLCS_VGPRyy_MEMy */ {  (xed_uint16_t)           XED_ICLASS_BLCS, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*            BLCS_VGPRyy_VGPRyy */ {  (xed_uint16_t)           XED_ICLASS_BLCS, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*      BLENDPD_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_BLENDPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      BLENDPD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_BLENDPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      BLENDPS_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_BLENDPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      BLENDPS_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_BLENDPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*          BLENDVPD_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_BLENDVPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*          BLENDVPD_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_BLENDVPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*          BLENDVPS_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_BLENDVPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*          BLENDVPS_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_BLENDVPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*          BLSFILL_VGPR32d_MEMd */ {  (xed_uint16_t)        XED_ICLASS_BLSFILL, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*       BLSFILL_VGPR32d_VGPR32d */ {  (xed_uint16_t)        XED_ICLASS_BLSFILL, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*           BLSFILL_VGPRyy_MEMy */ {  (xed_uint16_t)        XED_ICLASS_BLSFILL, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*         BLSFILL_VGPRyy_VGPRyy */ {  (xed_uint16_t)        XED_ICLASS_BLSFILL, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*             BLSI_VGPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_BLSI, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*          BLSI_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_BLSI, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*             BLSI_VGPR64q_MEMq */ {  (xed_uint16_t)           XED_ICLASS_BLSI, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*          BLSI_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_BLSI, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*            BLSIC_VGPR32d_MEMd */ {  (xed_uint16_t)          XED_ICLASS_BLSIC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*         BLSIC_VGPR32d_VGPR32d */ {  (xed_uint16_t)          XED_ICLASS_BLSIC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*             BLSIC_VGPRyy_MEMy */ {  (xed_uint16_t)          XED_ICLASS_BLSIC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*           BLSIC_VGPRyy_VGPRyy */ {  (xed_uint16_t)          XED_ICLASS_BLSIC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*           BLSMSK_VGPR32d_MEMd */ {  (xed_uint16_t)         XED_ICLASS_BLSMSK, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*        BLSMSK_VGPR32d_VGPR32d */ {  (xed_uint16_t)         XED_ICLASS_BLSMSK, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*           BLSMSK_VGPR64q_MEMq */ {  (xed_uint16_t)         XED_ICLASS_BLSMSK, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*        BLSMSK_VGPR64q_VGPR64q */ {  (xed_uint16_t)         XED_ICLASS_BLSMSK, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*             BLSR_VGPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_BLSR, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*          BLSR_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_BLSR, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*             BLSR_VGPR64q_MEMq */ {  (xed_uint16_t)           XED_ICLASS_BLSR, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*          BLSR_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_BLSR, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*                BNDCL_BND_AGEN */ {  (xed_uint16_t)          XED_ICLASS_BNDCL, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*               BNDCL_BND_GPR32 */ {  (xed_uint16_t)          XED_ICLASS_BNDCL, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*               BNDCL_BND_GPR64 */ {  (xed_uint16_t)          XED_ICLASS_BNDCL, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*                BNDCN_BND_AGEN */ {  (xed_uint16_t)          XED_ICLASS_BNDCN, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*               BNDCN_BND_GPR32 */ {  (xed_uint16_t)          XED_ICLASS_BNDCN, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*               BNDCN_BND_GPR64 */ {  (xed_uint16_t)          XED_ICLASS_BNDCN, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*                BNDCU_BND_AGEN */ {  (xed_uint16_t)          XED_ICLASS_BNDCU, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*               BNDCU_BND_GPR32 */ {  (xed_uint16_t)          XED_ICLASS_BNDCU, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*               BNDCU_BND_GPR64 */ {  (xed_uint16_t)          XED_ICLASS_BNDCU, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*           BNDLDX_BND_MEMbnd32 */ {  (xed_uint16_t)         XED_ICLASS_BNDLDX, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*           BNDLDX_BND_MEMbnd64 */ {  (xed_uint16_t)         XED_ICLASS_BNDLDX, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*                BNDMK_BND_AGEN */ {  (xed_uint16_t)          XED_ICLASS_BNDMK, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*                BNDMOV_BND_BND */ {  (xed_uint16_t)         XED_ICLASS_BNDMOV, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*              BNDMOV_BND_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_BNDMOV, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*               BNDMOV_BND_MEMq */ {  (xed_uint16_t)         XED_ICLASS_BNDMOV, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*              BNDMOV_MEMdq_BND */ {  (xed_uint16_t)         XED_ICLASS_BNDMOV, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*               BNDMOV_MEMq_BND */ {  (xed_uint16_t)         XED_ICLASS_BNDMOV, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*           BNDSTX_MEMbnd32_BND */ {  (xed_uint16_t)         XED_ICLASS_BNDSTX, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*           BNDSTX_MEMbnd64_BND */ {  (xed_uint16_t)         XED_ICLASS_BNDSTX, (xed_uint8_t)       XED_CATEGORY_MPX, (xed_uint8_t)   XED_EXTENSION_MPX, (xed_uint16_t)          XED_ISA_SET_MPX, (xed_uint16_t)   0 },
/*             BOUND_GPRv_MEMa16 */ {  (xed_uint16_t)          XED_ICLASS_BOUND, (xed_uint8_t) XED_CATEGORY_INTERRUPT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*             BOUND_GPRv_MEMa32 */ {  (xed_uint16_t)          XED_ICLASS_BOUND, (xed_uint8_t) XED_CATEGORY_INTERRUPT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                 BSF_GPRv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_BSF, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BSF_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_BSF, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BSR_GPRv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_BSR, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BSR_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_BSR, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    BSWAP_GPRv */ {  (xed_uint16_t)          XED_ICLASS_BSWAP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*                  BT_GPRv_GPRv */ {  (xed_uint16_t)             XED_ICLASS_BT, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                  BT_GPRv_IMMb */ {  (xed_uint16_t)             XED_ICLASS_BT, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                  BT_MEMv_GPRv */ {  (xed_uint16_t)             XED_ICLASS_BT, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                  BT_MEMv_IMMb */ {  (xed_uint16_t)             XED_ICLASS_BT, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTC_GPRv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_BTC, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTC_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_BTC, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTC_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_BTC, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTC_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_BTC, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*            BTC_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_BTC_LOCK, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  32 },
/*            BTC_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_BTC_LOCK, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  32 },
/*                 BTR_GPRv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_BTR, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTR_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_BTR, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTR_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_BTR, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTR_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_BTR, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*            BTR_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_BTR_LOCK, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  30 },
/*            BTR_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_BTR_LOCK, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  30 },
/*                 BTS_GPRv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_BTS, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTS_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_BTS, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTS_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_BTS, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                 BTS_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_BTS, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*            BTS_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_BTS_LOCK, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  28 },
/*            BTS_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_BTS_LOCK, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  28 },
/*     BZHI_VGPR32d_MEMd_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_BZHI, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  BZHI_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_BZHI, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     BZHI_VGPR64q_MEMq_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_BZHI, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  BZHI_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_BZHI, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*                CALL_FAR_MEMp2 */ {  (xed_uint16_t)       XED_ICLASS_CALL_FAR, (xed_uint8_t)      XED_CATEGORY_CALL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  50 },
/*            CALL_FAR_PTRp_IMMw */ {  (xed_uint16_t)       XED_ICLASS_CALL_FAR, (xed_uint8_t)      XED_CATEGORY_CALL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  50 },
/*                CALL_NEAR_GPRv */ {  (xed_uint16_t)      XED_ICLASS_CALL_NEAR, (xed_uint8_t)      XED_CATEGORY_CALL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  24 },
/*                CALL_NEAR_MEMv */ {  (xed_uint16_t)      XED_ICLASS_CALL_NEAR, (xed_uint8_t)      XED_CATEGORY_CALL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  24 },
/*              CALL_NEAR_RELBRd */ {  (xed_uint16_t)      XED_ICLASS_CALL_NEAR, (xed_uint8_t)      XED_CATEGORY_CALL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  24 },
/*              CALL_NEAR_RELBRz */ {  (xed_uint16_t)      XED_ICLASS_CALL_NEAR, (xed_uint8_t)      XED_CATEGORY_CALL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  24 },
/*                           CBW */ {  (xed_uint16_t)            XED_ICLASS_CBW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                           CDQ */ {  (xed_uint16_t)            XED_ICLASS_CDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                          CDQE */ {  (xed_uint16_t)           XED_ICLASS_CDQE, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                          CLAC */ {  (xed_uint16_t)           XED_ICLASS_CLAC, (xed_uint8_t)      XED_CATEGORY_SMAP, (xed_uint8_t)  XED_EXTENSION_SMAP, (xed_uint16_t)         XED_ISA_SET_SMAP, (xed_uint16_t)   0 },
/*                           CLC */ {  (xed_uint16_t)            XED_ICLASS_CLC, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                           CLD */ {  (xed_uint16_t)            XED_ICLASS_CLD, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                CLDEMOTE_MEMu8 */ {  (xed_uint16_t)       XED_ICLASS_CLDEMOTE, (xed_uint8_t)  XED_CATEGORY_CLDEMOTE, (xed_uint8_t)XED_EXTENSION_CLDEMOTE, (xed_uint16_t)     XED_ISA_SET_CLDEMOTE, (xed_uint16_t)   0 },
/*          CLFLUSH_MEMmprefetch */ {  (xed_uint16_t)        XED_ICLASS_CLFLUSH, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t) XED_EXTENSION_CLFSH, (xed_uint16_t)        XED_ISA_SET_CLFSH, (xed_uint16_t)   0 },
/*       CLFLUSHOPT_MEMmprefetch */ {  (xed_uint16_t)     XED_ICLASS_CLFLUSHOPT, (xed_uint8_t) XED_CATEGORY_CLFLUSHOPT, (xed_uint8_t)XED_EXTENSION_CLFLUSHOPT, (xed_uint16_t)   XED_ISA_SET_CLFLUSHOPT, (xed_uint16_t)   0 },
/*                          CLGI */ {  (xed_uint16_t)           XED_ICLASS_CLGI, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SVM, (xed_uint16_t)          XED_ISA_SET_SVM, (xed_uint16_t)   0 },
/*                           CLI */ {  (xed_uint16_t)            XED_ICLASS_CLI, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*               CLRSSBSY_MEMu64 */ {  (xed_uint16_t)       XED_ICLASS_CLRSSBSY, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*                          CLTS */ {  (xed_uint16_t)           XED_ICLASS_CLTS, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                          CLUI */ {  (xed_uint16_t)           XED_ICLASS_CLUI, (xed_uint8_t)     XED_CATEGORY_UINTR, (xed_uint8_t) XED_EXTENSION_UINTR, (xed_uint16_t)        XED_ISA_SET_UINTR, (xed_uint16_t)   0 },
/*             CLWB_MEMmprefetch */ {  (xed_uint16_t)           XED_ICLASS_CLWB, (xed_uint8_t)      XED_CATEGORY_CLWB, (xed_uint8_t)  XED_EXTENSION_CLWB, (xed_uint16_t)         XED_ISA_SET_CLWB, (xed_uint16_t)   0 },
/*                        CLZERO */ {  (xed_uint16_t)         XED_ICLASS_CLZERO, (xed_uint8_t)    XED_CATEGORY_CLZERO, (xed_uint8_t)XED_EXTENSION_CLZERO, (xed_uint16_t)       XED_ISA_SET_CLZERO, (xed_uint16_t)   0 },
/*                           CMC */ {  (xed_uint16_t)            XED_ICLASS_CMC, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*               CMOVB_GPRv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_CMOVB, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVB_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_CMOVB, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVBE_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_CMOVBE, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVBE_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_CMOVBE, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVL_GPRv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_CMOVL, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVL_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_CMOVL, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVLE_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_CMOVLE, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVLE_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_CMOVLE, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNB_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNB, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNB_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNB, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*             CMOVNBE_GPRv_GPRv */ {  (xed_uint16_t)        XED_ICLASS_CMOVNBE, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*             CMOVNBE_GPRv_MEMv */ {  (xed_uint16_t)        XED_ICLASS_CMOVNBE, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNL_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNL, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNL_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNL, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*             CMOVNLE_GPRv_GPRv */ {  (xed_uint16_t)        XED_ICLASS_CMOVNLE, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*             CMOVNLE_GPRv_MEMv */ {  (xed_uint16_t)        XED_ICLASS_CMOVNLE, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNO_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNO, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNO_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNO, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNP_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNP, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNP_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNP, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNS_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNS, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNS_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNS, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNZ_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNZ, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*              CMOVNZ_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_CMOVNZ, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVO_GPRv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_CMOVO, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVO_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_CMOVO, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVP_GPRv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_CMOVP, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVP_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_CMOVP, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVS_GPRv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_CMOVS, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVS_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_CMOVS, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVZ_GPRv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_CMOVZ, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*               CMOVZ_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_CMOVZ, (xed_uint8_t)      XED_CATEGORY_CMOV, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_CMOV, (xed_uint16_t)   0 },
/*                   CMP_AL_IMMb */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              CMP_GPR8_GPR8_38 */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              CMP_GPR8_GPR8_3A */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            CMP_GPR8_IMMb_80r7 */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            CMP_GPR8_IMMb_82r7 */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_GPR8_MEMb */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              CMP_GPRv_GPRv_39 */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              CMP_GPRv_GPRv_3B */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_GPRv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_MEMb_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            CMP_MEMb_IMMb_80r7 */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            CMP_MEMb_IMMb_82r7 */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_MEMv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 CMP_OrAX_IMMz */ {  (xed_uint16_t)            XED_ICLASS_CMP, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*        CMPPD_XMMpd_MEMpd_IMMb */ {  (xed_uint16_t)          XED_ICLASS_CMPPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        CMPPD_XMMpd_XMMpd_IMMb */ {  (xed_uint16_t)          XED_ICLASS_CMPPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        CMPPS_XMMps_MEMps_IMMb */ {  (xed_uint16_t)          XED_ICLASS_CMPPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*        CMPPS_XMMps_XMMps_IMMb */ {  (xed_uint16_t)          XED_ICLASS_CMPPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                         CMPSB */ {  (xed_uint16_t)          XED_ICLASS_CMPSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         CMPSD */ {  (xed_uint16_t)          XED_ICLASS_CMPSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*    CMPSD_XMM_XMMsd_MEMsd_IMMb */ {  (xed_uint16_t)      XED_ICLASS_CMPSD_XMM, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)  64 },
/*    CMPSD_XMM_XMMsd_XMMsd_IMMb */ {  (xed_uint16_t)      XED_ICLASS_CMPSD_XMM, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)  64 },
/*                         CMPSQ */ {  (xed_uint16_t)          XED_ICLASS_CMPSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*        CMPSS_XMMss_MEMss_IMMb */ {  (xed_uint16_t)          XED_ICLASS_CMPSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*        CMPSS_XMMss_XMMss_IMMb */ {  (xed_uint16_t)          XED_ICLASS_CMPSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                         CMPSW */ {  (xed_uint16_t)          XED_ICLASS_CMPSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             CMPXCHG_GPR8_GPR8 */ {  (xed_uint16_t)        XED_ICLASS_CMPXCHG, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*             CMPXCHG_GPRv_GPRv */ {  (xed_uint16_t)        XED_ICLASS_CMPXCHG, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*             CMPXCHG_MEMb_GPR8 */ {  (xed_uint16_t)        XED_ICLASS_CMPXCHG, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*             CMPXCHG_MEMv_GPRv */ {  (xed_uint16_t)        XED_ICLASS_CMPXCHG, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*              CMPXCHG16B_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_CMPXCHG16B, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)   XED_ISA_SET_CMPXCHG16B, (xed_uint16_t)   0 },
/*         CMPXCHG16B_LOCK_MEMdq */ {  (xed_uint16_t) XED_ICLASS_CMPXCHG16B_LOCK, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)   XED_ISA_SET_CMPXCHG16B, (xed_uint16_t)  36 },
/*                CMPXCHG8B_MEMq */ {  (xed_uint16_t)      XED_ICLASS_CMPXCHG8B, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)  XED_ISA_SET_PENTIUMREAL, (xed_uint16_t)   0 },
/*           CMPXCHG8B_LOCK_MEMq */ {  (xed_uint16_t) XED_ICLASS_CMPXCHG8B_LOCK, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)  XED_ISA_SET_PENTIUMREAL, (xed_uint16_t)  34 },
/*        CMPXCHG_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)   XED_ICLASS_CMPXCHG_LOCK, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t) 100 },
/*        CMPXCHG_LOCK_MEMv_GPRv */ {  (xed_uint16_t)   XED_ICLASS_CMPXCHG_LOCK, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t) 100 },
/*            COMISD_XMMsd_MEMsd */ {  (xed_uint16_t)         XED_ICLASS_COMISD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            COMISD_XMMsd_XMMsd */ {  (xed_uint16_t)         XED_ICLASS_COMISD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            COMISS_XMMss_MEMss */ {  (xed_uint16_t)         XED_ICLASS_COMISS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            COMISS_XMMss_XMMss */ {  (xed_uint16_t)         XED_ICLASS_COMISS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                         CPUID */ {  (xed_uint16_t)          XED_ICLASS_CPUID, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*                           CQO */ {  (xed_uint16_t)            XED_ICLASS_CQO, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*             CRC32_GPRyy_GPR8b */ {  (xed_uint16_t)          XED_ICLASS_CRC32, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*              CRC32_GPRyy_GPRv */ {  (xed_uint16_t)          XED_ICLASS_CRC32, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*              CRC32_GPRyy_MEMb */ {  (xed_uint16_t)          XED_ICLASS_CRC32, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*              CRC32_GPRyy_MEMv */ {  (xed_uint16_t)          XED_ICLASS_CRC32, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*           CVTDQ2PD_XMMpd_MEMq */ {  (xed_uint16_t)       XED_ICLASS_CVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTDQ2PD_XMMpd_XMMq */ {  (xed_uint16_t)       XED_ICLASS_CVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTDQ2PS_XMMps_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_CVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTDQ2PS_XMMps_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_CVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTPD2DQ_XMMdq_MEMpd */ {  (xed_uint16_t)       XED_ICLASS_CVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTPD2DQ_XMMdq_XMMpd */ {  (xed_uint16_t)       XED_ICLASS_CVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTPD2PI_MMXq_MEMpd */ {  (xed_uint16_t)       XED_ICLASS_CVTPD2PI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTPD2PI_MMXq_XMMpd */ {  (xed_uint16_t)       XED_ICLASS_CVTPD2PI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTPD2PS_XMMps_MEMpd */ {  (xed_uint16_t)       XED_ICLASS_CVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTPD2PS_XMMps_XMMpd */ {  (xed_uint16_t)       XED_ICLASS_CVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTPI2PD_XMMpd_MEMq */ {  (xed_uint16_t)       XED_ICLASS_CVTPI2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTPI2PD_XMMpd_MMXq */ {  (xed_uint16_t)       XED_ICLASS_CVTPI2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            CVTPI2PS_XMMq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_CVTPI2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            CVTPI2PS_XMMq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_CVTPI2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*          CVTPS2DQ_XMMdq_MEMps */ {  (xed_uint16_t)       XED_ICLASS_CVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTPS2DQ_XMMdq_XMMps */ {  (xed_uint16_t)       XED_ICLASS_CVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTPS2PD_XMMpd_MEMq */ {  (xed_uint16_t)       XED_ICLASS_CVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTPS2PD_XMMpd_XMMq */ {  (xed_uint16_t)       XED_ICLASS_CVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            CVTPS2PI_MMXq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_CVTPS2PI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            CVTPS2PI_MMXq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_CVTPS2PI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*         CVTSD2SI_GPR32d_MEMsd */ {  (xed_uint16_t)       XED_ICLASS_CVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTSD2SI_GPR32d_XMMsd */ {  (xed_uint16_t)       XED_ICLASS_CVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTSD2SI_GPR64q_MEMsd */ {  (xed_uint16_t)       XED_ICLASS_CVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTSD2SI_GPR64q_XMMsd */ {  (xed_uint16_t)       XED_ICLASS_CVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTSD2SS_XMMss_MEMsd */ {  (xed_uint16_t)       XED_ICLASS_CVTSD2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTSD2SS_XMMss_XMMsd */ {  (xed_uint16_t)       XED_ICLASS_CVTSD2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTSI2SD_XMMsd_GPR32d */ {  (xed_uint16_t)       XED_ICLASS_CVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTSI2SD_XMMsd_GPR64q */ {  (xed_uint16_t)       XED_ICLASS_CVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTSI2SD_XMMsd_MEMd */ {  (xed_uint16_t)       XED_ICLASS_CVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTSI2SD_XMMsd_MEMq */ {  (xed_uint16_t)       XED_ICLASS_CVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTSI2SS_XMMss_GPR32d */ {  (xed_uint16_t)       XED_ICLASS_CVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*         CVTSI2SS_XMMss_GPR64q */ {  (xed_uint16_t)       XED_ICLASS_CVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           CVTSI2SS_XMMss_MEMd */ {  (xed_uint16_t)       XED_ICLASS_CVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           CVTSI2SS_XMMss_MEMq */ {  (xed_uint16_t)       XED_ICLASS_CVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*          CVTSS2SD_XMMsd_MEMss */ {  (xed_uint16_t)       XED_ICLASS_CVTSS2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTSS2SD_XMMsd_XMMss */ {  (xed_uint16_t)       XED_ICLASS_CVTSS2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTSS2SI_GPR32d_MEMss */ {  (xed_uint16_t)       XED_ICLASS_CVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*         CVTSS2SI_GPR32d_XMMss */ {  (xed_uint16_t)       XED_ICLASS_CVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*         CVTSS2SI_GPR64q_MEMss */ {  (xed_uint16_t)       XED_ICLASS_CVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*         CVTSS2SI_GPR64q_XMMss */ {  (xed_uint16_t)       XED_ICLASS_CVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*         CVTTPD2DQ_XMMdq_MEMpd */ {  (xed_uint16_t)      XED_ICLASS_CVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTTPD2DQ_XMMdq_XMMpd */ {  (xed_uint16_t)      XED_ICLASS_CVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTTPD2PI_MMXq_MEMpd */ {  (xed_uint16_t)      XED_ICLASS_CVTTPD2PI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          CVTTPD2PI_MMXq_XMMpd */ {  (xed_uint16_t)      XED_ICLASS_CVTTPD2PI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTTPS2DQ_XMMdq_MEMps */ {  (xed_uint16_t)      XED_ICLASS_CVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         CVTTPS2DQ_XMMdq_XMMps */ {  (xed_uint16_t)      XED_ICLASS_CVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           CVTTPS2PI_MMXq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_CVTTPS2PI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           CVTTPS2PI_MMXq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_CVTTPS2PI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*        CVTTSD2SI_GPR32d_MEMsd */ {  (xed_uint16_t)      XED_ICLASS_CVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        CVTTSD2SI_GPR32d_XMMsd */ {  (xed_uint16_t)      XED_ICLASS_CVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        CVTTSD2SI_GPR64q_MEMsd */ {  (xed_uint16_t)      XED_ICLASS_CVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        CVTTSD2SI_GPR64q_XMMsd */ {  (xed_uint16_t)      XED_ICLASS_CVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        CVTTSS2SI_GPR32d_MEMss */ {  (xed_uint16_t)      XED_ICLASS_CVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*        CVTTSS2SI_GPR32d_XMMss */ {  (xed_uint16_t)      XED_ICLASS_CVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*        CVTTSS2SI_GPR64q_MEMss */ {  (xed_uint16_t)      XED_ICLASS_CVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*        CVTTSS2SI_GPR64q_XMMss */ {  (xed_uint16_t)      XED_ICLASS_CVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                           CWD */ {  (xed_uint16_t)            XED_ICLASS_CWD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                          CWDE */ {  (xed_uint16_t)           XED_ICLASS_CWDE, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                           DAA */ {  (xed_uint16_t)            XED_ICLASS_DAA, (xed_uint8_t)   XED_CATEGORY_DECIMAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                           DAS */ {  (xed_uint16_t)            XED_ICLASS_DAS, (xed_uint8_t)   XED_CATEGORY_DECIMAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      DEC_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_DEC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   DEC_GPRv_48 */ {  (xed_uint16_t)            XED_ICLASS_DEC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 DEC_GPRv_FFr1 */ {  (xed_uint16_t)            XED_ICLASS_DEC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      DEC_MEMb */ {  (xed_uint16_t)            XED_ICLASS_DEC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      DEC_MEMv */ {  (xed_uint16_t)            XED_ICLASS_DEC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 DEC_LOCK_MEMb */ {  (xed_uint16_t)       XED_ICLASS_DEC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  22 },
/*                 DEC_LOCK_MEMv */ {  (xed_uint16_t)       XED_ICLASS_DEC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  22 },
/*                      DIV_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_DIV, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      DIV_GPRv */ {  (xed_uint16_t)            XED_ICLASS_DIV, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      DIV_MEMb */ {  (xed_uint16_t)            XED_ICLASS_DIV, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      DIV_MEMv */ {  (xed_uint16_t)            XED_ICLASS_DIV, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             DIVPD_XMMpd_MEMpd */ {  (xed_uint16_t)          XED_ICLASS_DIVPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             DIVPD_XMMpd_XMMpd */ {  (xed_uint16_t)          XED_ICLASS_DIVPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             DIVPS_XMMps_MEMps */ {  (xed_uint16_t)          XED_ICLASS_DIVPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             DIVPS_XMMps_XMMps */ {  (xed_uint16_t)          XED_ICLASS_DIVPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             DIVSD_XMMsd_MEMsd */ {  (xed_uint16_t)          XED_ICLASS_DIVSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             DIVSD_XMMsd_XMMsd */ {  (xed_uint16_t)          XED_ICLASS_DIVSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             DIVSS_XMMss_MEMss */ {  (xed_uint16_t)          XED_ICLASS_DIVSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             DIVSS_XMMss_XMMss */ {  (xed_uint16_t)          XED_ICLASS_DIVSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*         DPPD_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)           XED_ICLASS_DPPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*         DPPD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)           XED_ICLASS_DPPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*         DPPS_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)           XED_ICLASS_DPPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*         DPPS_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)           XED_ICLASS_DPPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*                          EMMS */ {  (xed_uint16_t)           XED_ICLASS_EMMS, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*                         ENCLS */ {  (xed_uint16_t)          XED_ICLASS_ENCLS, (xed_uint8_t)       XED_CATEGORY_SGX, (xed_uint8_t)   XED_EXTENSION_SGX, (xed_uint16_t)          XED_ISA_SET_SGX, (xed_uint16_t)   0 },
/*                         ENCLU */ {  (xed_uint16_t)          XED_ICLASS_ENCLU, (xed_uint8_t)       XED_CATEGORY_SGX, (xed_uint8_t)   XED_EXTENSION_SGX, (xed_uint16_t)          XED_ISA_SET_SGX, (xed_uint16_t)   0 },
/*                         ENCLV */ {  (xed_uint16_t)          XED_ICLASS_ENCLV, (xed_uint8_t)       XED_CATEGORY_SGX, (xed_uint8_t)XED_EXTENSION_SGX_ENCLV, (xed_uint16_t)    XED_ISA_SET_SGX_ENCLV, (xed_uint16_t)   0 },
/*  ENCODEKEY128_GPR32u8_GPR32u8 */ {  (xed_uint16_t)   XED_ICLASS_ENCODEKEY128, (xed_uint8_t) XED_CATEGORY_KEYLOCKER, (xed_uint8_t)XED_EXTENSION_KEYLOCKER, (xed_uint16_t)    XED_ISA_SET_KEYLOCKER, (xed_uint16_t)   0 },
/*  ENCODEKEY256_GPR32u8_GPR32u8 */ {  (xed_uint16_t)   XED_ICLASS_ENCODEKEY256, (xed_uint8_t) XED_CATEGORY_KEYLOCKER, (xed_uint8_t)XED_EXTENSION_KEYLOCKER, (xed_uint16_t)    XED_ISA_SET_KEYLOCKER, (xed_uint16_t)   0 },
/*                       ENDBR32 */ {  (xed_uint16_t)        XED_ICLASS_ENDBR32, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*                       ENDBR64 */ {  (xed_uint16_t)        XED_ICLASS_ENDBR64, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*            ENQCMD_GPRa_MEMu32 */ {  (xed_uint16_t)         XED_ICLASS_ENQCMD, (xed_uint8_t)    XED_CATEGORY_ENQCMD, (xed_uint8_t)XED_EXTENSION_ENQCMD, (xed_uint16_t)       XED_ISA_SET_ENQCMD, (xed_uint16_t)   0 },
/*           ENQCMDS_GPRa_MEMu32 */ {  (xed_uint16_t)        XED_ICLASS_ENQCMDS, (xed_uint8_t)    XED_CATEGORY_ENQCMD, (xed_uint8_t)XED_EXTENSION_ENQCMD, (xed_uint16_t)       XED_ISA_SET_ENQCMD, (xed_uint16_t)   0 },
/*               ENTER_IMMw_IMMb */ {  (xed_uint16_t)          XED_ICLASS_ENTER, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*   EXTRACTPS_GPR32d_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_EXTRACTPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*     EXTRACTPS_MEMd_XMMps_IMMb */ {  (xed_uint16_t)      XED_ICLASS_EXTRACTPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*          EXTRQ_XMMq_IMMb_IMMb */ {  (xed_uint16_t)          XED_ICLASS_EXTRQ, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t) XED_EXTENSION_SSE4A, (xed_uint16_t)        XED_ISA_SET_SSE4A, (xed_uint16_t)   0 },
/*              EXTRQ_XMMq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_EXTRQ, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t) XED_EXTENSION_SSE4A, (xed_uint16_t)        XED_ISA_SET_SSE4A, (xed_uint16_t)   0 },
/*                         F2XM1 */ {  (xed_uint16_t)          XED_ICLASS_F2XM1, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FABS */ {  (xed_uint16_t)           XED_ICLASS_FABS, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*           FADD_ST0_MEMm64real */ {  (xed_uint16_t)           XED_ICLASS_FADD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FADD_ST0_MEMmem32real */ {  (xed_uint16_t)           XED_ICLASS_FADD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FADD_ST0_X87 */ {  (xed_uint16_t)           XED_ICLASS_FADD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FADD_X87_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FADD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FADDP_X87_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FADDP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FBLD_ST0_MEMmem80dec */ {  (xed_uint16_t)           XED_ICLASS_FBLD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FBSTP_MEMmem80dec_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FBSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FCHS */ {  (xed_uint16_t)           XED_ICLASS_FCHS, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                FCMOVB_ST0_X87 */ {  (xed_uint16_t)         XED_ICLASS_FCMOVB, (xed_uint8_t)     XED_CATEGORY_FCMOV, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)        XED_ISA_SET_FCMOV, (xed_uint16_t)   0 },
/*               FCMOVBE_ST0_X87 */ {  (xed_uint16_t)        XED_ICLASS_FCMOVBE, (xed_uint8_t)     XED_CATEGORY_FCMOV, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)        XED_ISA_SET_FCMOV, (xed_uint16_t)   0 },
/*                FCMOVE_ST0_X87 */ {  (xed_uint16_t)         XED_ICLASS_FCMOVE, (xed_uint8_t)     XED_CATEGORY_FCMOV, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)        XED_ISA_SET_FCMOV, (xed_uint16_t)   0 },
/*               FCMOVNB_ST0_X87 */ {  (xed_uint16_t)        XED_ICLASS_FCMOVNB, (xed_uint8_t)     XED_CATEGORY_FCMOV, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)        XED_ISA_SET_FCMOV, (xed_uint16_t)   0 },
/*              FCMOVNBE_ST0_X87 */ {  (xed_uint16_t)       XED_ICLASS_FCMOVNBE, (xed_uint8_t)     XED_CATEGORY_FCMOV, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)        XED_ISA_SET_FCMOV, (xed_uint16_t)   0 },
/*               FCMOVNE_ST0_X87 */ {  (xed_uint16_t)        XED_ICLASS_FCMOVNE, (xed_uint8_t)     XED_CATEGORY_FCMOV, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)        XED_ISA_SET_FCMOV, (xed_uint16_t)   0 },
/*               FCMOVNU_ST0_X87 */ {  (xed_uint16_t)        XED_ICLASS_FCMOVNU, (xed_uint8_t)     XED_CATEGORY_FCMOV, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)        XED_ISA_SET_FCMOV, (xed_uint16_t)   0 },
/*                FCMOVU_ST0_X87 */ {  (xed_uint16_t)         XED_ICLASS_FCMOVU, (xed_uint8_t)     XED_CATEGORY_FCMOV, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)        XED_ISA_SET_FCMOV, (xed_uint16_t)   0 },
/*           FCOM_ST0_MEMm64real */ {  (xed_uint16_t)           XED_ICLASS_FCOM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FCOM_ST0_MEMmem32real */ {  (xed_uint16_t)           XED_ICLASS_FCOM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FCOM_ST0_X87 */ {  (xed_uint16_t)           XED_ICLASS_FCOM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*             FCOM_ST0_X87_DCD0 */ {  (xed_uint16_t)           XED_ICLASS_FCOM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FCOMI_ST0_X87 */ {  (xed_uint16_t)          XED_ICLASS_FCOMI, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*                FCOMIP_ST0_X87 */ {  (xed_uint16_t)         XED_ICLASS_FCOMIP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*          FCOMP_ST0_MEMm64real */ {  (xed_uint16_t)          XED_ICLASS_FCOMP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FCOMP_ST0_MEMmem32real */ {  (xed_uint16_t)          XED_ICLASS_FCOMP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FCOMP_ST0_X87 */ {  (xed_uint16_t)          XED_ICLASS_FCOMP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*            FCOMP_ST0_X87_DCD1 */ {  (xed_uint16_t)          XED_ICLASS_FCOMP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*            FCOMP_ST0_X87_DED0 */ {  (xed_uint16_t)          XED_ICLASS_FCOMP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FCOMPP */ {  (xed_uint16_t)         XED_ICLASS_FCOMPP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FCOS */ {  (xed_uint16_t)           XED_ICLASS_FCOS, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                       FDECSTP */ {  (xed_uint16_t)        XED_ICLASS_FDECSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FDISI8087_NOP */ {  (xed_uint16_t)  XED_ICLASS_FDISI8087_NOP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*           FDIV_ST0_MEMm64real */ {  (xed_uint16_t)           XED_ICLASS_FDIV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FDIV_ST0_MEMmem32real */ {  (xed_uint16_t)           XED_ICLASS_FDIV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FDIV_ST0_X87 */ {  (xed_uint16_t)           XED_ICLASS_FDIV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FDIV_X87_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FDIV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FDIVP_X87_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FDIVP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FDIVR_ST0_MEMm64real */ {  (xed_uint16_t)          XED_ICLASS_FDIVR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FDIVR_ST0_MEMmem32real */ {  (xed_uint16_t)          XED_ICLASS_FDIVR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FDIVR_ST0_X87 */ {  (xed_uint16_t)          XED_ICLASS_FDIVR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FDIVR_X87_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FDIVR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                FDIVRP_X87_ST0 */ {  (xed_uint16_t)         XED_ICLASS_FDIVRP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                         FEMMS */ {  (xed_uint16_t)          XED_ICLASS_FEMMS, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*                  FENI8087_NOP */ {  (xed_uint16_t)   XED_ICLASS_FENI8087_NOP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                     FFREE_X87 */ {  (xed_uint16_t)          XED_ICLASS_FFREE, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                    FFREEP_X87 */ {  (xed_uint16_t)         XED_ICLASS_FFREEP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FIADD_ST0_MEMmem16int */ {  (xed_uint16_t)          XED_ICLASS_FIADD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FIADD_ST0_MEMmem32int */ {  (xed_uint16_t)          XED_ICLASS_FIADD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FICOM_ST0_MEMmem16int */ {  (xed_uint16_t)          XED_ICLASS_FICOM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FICOM_ST0_MEMmem32int */ {  (xed_uint16_t)          XED_ICLASS_FICOM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FICOMP_ST0_MEMmem16int */ {  (xed_uint16_t)         XED_ICLASS_FICOMP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FICOMP_ST0_MEMmem32int */ {  (xed_uint16_t)         XED_ICLASS_FICOMP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FIDIV_ST0_MEMmem16int */ {  (xed_uint16_t)          XED_ICLASS_FIDIV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FIDIV_ST0_MEMmem32int */ {  (xed_uint16_t)          XED_ICLASS_FIDIV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FIDIVR_ST0_MEMmem16int */ {  (xed_uint16_t)         XED_ICLASS_FIDIVR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FIDIVR_ST0_MEMmem32int */ {  (xed_uint16_t)         XED_ICLASS_FIDIVR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*            FILD_ST0_MEMm64int */ {  (xed_uint16_t)           XED_ICLASS_FILD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FILD_ST0_MEMmem16int */ {  (xed_uint16_t)           XED_ICLASS_FILD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FILD_ST0_MEMmem32int */ {  (xed_uint16_t)           XED_ICLASS_FILD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FIMUL_ST0_MEMmem16int */ {  (xed_uint16_t)          XED_ICLASS_FIMUL, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FIMUL_ST0_MEMmem32int */ {  (xed_uint16_t)          XED_ICLASS_FIMUL, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                       FINCSTP */ {  (xed_uint16_t)        XED_ICLASS_FINCSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FIST_MEMmem16int_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FIST, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FIST_MEMmem32int_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FIST, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*           FISTP_MEMm64int_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FISTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FISTP_MEMmem16int_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FISTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FISTP_MEMmem32int_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FISTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FISTTP_MEMm64int_ST0 */ {  (xed_uint16_t)         XED_ICLASS_FISTTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)      XED_ISA_SET_SSE3X87, (xed_uint16_t)   0 },
/*        FISTTP_MEMmem16int_ST0 */ {  (xed_uint16_t)         XED_ICLASS_FISTTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)      XED_ISA_SET_SSE3X87, (xed_uint16_t)   0 },
/*        FISTTP_MEMmem32int_ST0 */ {  (xed_uint16_t)         XED_ICLASS_FISTTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*         FISUB_ST0_MEMmem16int */ {  (xed_uint16_t)          XED_ICLASS_FISUB, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FISUB_ST0_MEMmem32int */ {  (xed_uint16_t)          XED_ICLASS_FISUB, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FISUBR_ST0_MEMmem16int */ {  (xed_uint16_t)         XED_ICLASS_FISUBR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FISUBR_ST0_MEMmem32int */ {  (xed_uint16_t)         XED_ICLASS_FISUBR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*            FLD_ST0_MEMm64real */ {  (xed_uint16_t)            XED_ICLASS_FLD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FLD_ST0_MEMmem32real */ {  (xed_uint16_t)            XED_ICLASS_FLD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FLD_ST0_MEMmem80real */ {  (xed_uint16_t)            XED_ICLASS_FLD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                   FLD_ST0_X87 */ {  (xed_uint16_t)            XED_ICLASS_FLD, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FLD1 */ {  (xed_uint16_t)           XED_ICLASS_FLD1, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                FLDCW_MEMmem16 */ {  (xed_uint16_t)          XED_ICLASS_FLDCW, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*               FLDENV_MEMmem14 */ {  (xed_uint16_t)         XED_ICLASS_FLDENV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*               FLDENV_MEMmem28 */ {  (xed_uint16_t)         XED_ICLASS_FLDENV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FLDL2E */ {  (xed_uint16_t)         XED_ICLASS_FLDL2E, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FLDL2T */ {  (xed_uint16_t)         XED_ICLASS_FLDL2T, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FLDLG2 */ {  (xed_uint16_t)         XED_ICLASS_FLDLG2, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FLDLN2 */ {  (xed_uint16_t)         XED_ICLASS_FLDLN2, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                         FLDPI */ {  (xed_uint16_t)          XED_ICLASS_FLDPI, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FLDZ */ {  (xed_uint16_t)           XED_ICLASS_FLDZ, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*           FMUL_ST0_MEMm64real */ {  (xed_uint16_t)           XED_ICLASS_FMUL, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FMUL_ST0_MEMmem32real */ {  (xed_uint16_t)           XED_ICLASS_FMUL, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FMUL_ST0_X87 */ {  (xed_uint16_t)           XED_ICLASS_FMUL, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FMUL_X87_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FMUL, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FMULP_X87_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FMULP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FNCLEX */ {  (xed_uint16_t)         XED_ICLASS_FNCLEX, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FNINIT */ {  (xed_uint16_t)         XED_ICLASS_FNINIT, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FNOP */ {  (xed_uint16_t)           XED_ICLASS_FNOP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*              FNSAVE_MEMmem108 */ {  (xed_uint16_t)         XED_ICLASS_FNSAVE, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*               FNSAVE_MEMmem94 */ {  (xed_uint16_t)         XED_ICLASS_FNSAVE, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*               FNSTCW_MEMmem16 */ {  (xed_uint16_t)         XED_ICLASS_FNSTCW, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*              FNSTENV_MEMmem14 */ {  (xed_uint16_t)        XED_ICLASS_FNSTENV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*              FNSTENV_MEMmem28 */ {  (xed_uint16_t)        XED_ICLASS_FNSTENV, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                     FNSTSW_AX */ {  (xed_uint16_t)         XED_ICLASS_FNSTSW, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*               FNSTSW_MEMmem16 */ {  (xed_uint16_t)         XED_ICLASS_FNSTSW, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FPATAN */ {  (xed_uint16_t)         XED_ICLASS_FPATAN, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                         FPREM */ {  (xed_uint16_t)          XED_ICLASS_FPREM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FPREM1 */ {  (xed_uint16_t)         XED_ICLASS_FPREM1, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                         FPTAN */ {  (xed_uint16_t)          XED_ICLASS_FPTAN, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                       FRNDINT */ {  (xed_uint16_t)        XED_ICLASS_FRNDINT, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*              FRSTOR_MEMmem108 */ {  (xed_uint16_t)         XED_ICLASS_FRSTOR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*               FRSTOR_MEMmem94 */ {  (xed_uint16_t)         XED_ICLASS_FRSTOR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        FSCALE */ {  (xed_uint16_t)         XED_ICLASS_FSCALE, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FSETPM287_NOP */ {  (xed_uint16_t)  XED_ICLASS_FSETPM287_NOP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FSIN */ {  (xed_uint16_t)           XED_ICLASS_FSIN, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                       FSINCOS */ {  (xed_uint16_t)        XED_ICLASS_FSINCOS, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                         FSQRT */ {  (xed_uint16_t)          XED_ICLASS_FSQRT, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*            FST_MEMm64real_ST0 */ {  (xed_uint16_t)            XED_ICLASS_FST, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FST_MEMmem32real_ST0 */ {  (xed_uint16_t)            XED_ICLASS_FST, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                   FST_X87_ST0 */ {  (xed_uint16_t)            XED_ICLASS_FST, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*           FSTP_MEMm64real_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FSTP_MEMmem32real_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FSTP_MEMmem80real_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FSTP_X87_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*             FSTP_X87_ST0_DFD0 */ {  (xed_uint16_t)           XED_ICLASS_FSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*             FSTP_X87_ST0_DFD1 */ {  (xed_uint16_t)           XED_ICLASS_FSTP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*               FSTPNCE_X87_ST0 */ {  (xed_uint16_t)        XED_ICLASS_FSTPNCE, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*           FSUB_ST0_MEMm64real */ {  (xed_uint16_t)           XED_ICLASS_FSUB, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*         FSUB_ST0_MEMmem32real */ {  (xed_uint16_t)           XED_ICLASS_FSUB, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FSUB_ST0_X87 */ {  (xed_uint16_t)           XED_ICLASS_FSUB, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FSUB_X87_ST0 */ {  (xed_uint16_t)           XED_ICLASS_FSUB, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FSUBP_X87_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FSUBP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*          FSUBR_ST0_MEMm64real */ {  (xed_uint16_t)          XED_ICLASS_FSUBR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*        FSUBR_ST0_MEMmem32real */ {  (xed_uint16_t)          XED_ICLASS_FSUBR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FSUBR_ST0_X87 */ {  (xed_uint16_t)          XED_ICLASS_FSUBR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FSUBR_X87_ST0 */ {  (xed_uint16_t)          XED_ICLASS_FSUBR, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                FSUBRP_X87_ST0 */ {  (xed_uint16_t)         XED_ICLASS_FSUBRP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FTST */ {  (xed_uint16_t)           XED_ICLASS_FTST, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                 FUCOM_ST0_X87 */ {  (xed_uint16_t)          XED_ICLASS_FUCOM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                FUCOMI_ST0_X87 */ {  (xed_uint16_t)         XED_ICLASS_FUCOMI, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*               FUCOMIP_ST0_X87 */ {  (xed_uint16_t)        XED_ICLASS_FUCOMIP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*                FUCOMP_ST0_X87 */ {  (xed_uint16_t)         XED_ICLASS_FUCOMP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                       FUCOMPP */ {  (xed_uint16_t)        XED_ICLASS_FUCOMPP, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                         FWAIT */ {  (xed_uint16_t)          XED_ICLASS_FWAIT, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                          FXAM */ {  (xed_uint16_t)           XED_ICLASS_FXAM, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                  FXCH_ST0_X87 */ {  (xed_uint16_t)           XED_ICLASS_FXCH, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*             FXCH_ST0_X87_DDC1 */ {  (xed_uint16_t)           XED_ICLASS_FXCH, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*             FXCH_ST0_X87_DFC1 */ {  (xed_uint16_t)           XED_ICLASS_FXCH, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*            FXRSTOR_MEMmfpxenv */ {  (xed_uint16_t)        XED_ICLASS_FXRSTOR, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)       XED_ISA_SET_FXSAVE, (xed_uint16_t)   0 },
/*          FXRSTOR64_MEMmfpxenv */ {  (xed_uint16_t)      XED_ICLASS_FXRSTOR64, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)     XED_ISA_SET_FXSAVE64, (xed_uint16_t)   0 },
/*             FXSAVE_MEMmfpxenv */ {  (xed_uint16_t)         XED_ICLASS_FXSAVE, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)       XED_ISA_SET_FXSAVE, (xed_uint16_t)   0 },
/*           FXSAVE64_MEMmfpxenv */ {  (xed_uint16_t)       XED_ICLASS_FXSAVE64, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)     XED_ISA_SET_FXSAVE64, (xed_uint16_t)   0 },
/*                       FXTRACT */ {  (xed_uint16_t)        XED_ICLASS_FXTRACT, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                         FYL2X */ {  (xed_uint16_t)          XED_ICLASS_FYL2X, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                       FYL2XP1 */ {  (xed_uint16_t)        XED_ICLASS_FYL2XP1, (xed_uint8_t)   XED_CATEGORY_X87_ALU, (xed_uint8_t)   XED_EXTENSION_X87, (xed_uint16_t)          XED_ISA_SET_X87, (xed_uint16_t)   0 },
/*                        GETSEC */ {  (xed_uint16_t)         XED_ICLASS_GETSEC, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SMX, (xed_uint16_t)          XED_ISA_SET_SMX, (xed_uint16_t)   0 },
/* GF2P8AFFINEINVQB_XMMu8_MEMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_GF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)         XED_ISA_SET_GFNI, (xed_uint16_t)   0 },
/* GF2P8AFFINEINVQB_XMMu8_XMMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_GF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)         XED_ISA_SET_GFNI, (xed_uint16_t)   0 },
/* GF2P8AFFINEQB_XMMu8_MEMu64_IMM8 */ {  (xed_uint16_t)  XED_ICLASS_GF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)         XED_ISA_SET_GFNI, (xed_uint16_t)   0 },
/* GF2P8AFFINEQB_XMMu8_XMMu64_IMM8 */ {  (xed_uint16_t)  XED_ICLASS_GF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)         XED_ISA_SET_GFNI, (xed_uint16_t)   0 },
/*         GF2P8MULB_XMMu8_MEMu8 */ {  (xed_uint16_t)      XED_ICLASS_GF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)         XED_ISA_SET_GFNI, (xed_uint16_t)   0 },
/*         GF2P8MULB_XMMu8_XMMu8 */ {  (xed_uint16_t)      XED_ICLASS_GF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)         XED_ISA_SET_GFNI, (xed_uint16_t)   0 },
/*            HADDPD_XMMpd_MEMpd */ {  (xed_uint16_t)         XED_ICLASS_HADDPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            HADDPD_XMMpd_XMMpd */ {  (xed_uint16_t)         XED_ICLASS_HADDPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            HADDPS_XMMps_MEMps */ {  (xed_uint16_t)         XED_ICLASS_HADDPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            HADDPS_XMMps_XMMps */ {  (xed_uint16_t)         XED_ICLASS_HADDPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*                           HLT */ {  (xed_uint16_t)            XED_ICLASS_HLT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   HRESET_IMM8 */ {  (xed_uint16_t)         XED_ICLASS_HRESET, (xed_uint8_t)    XED_CATEGORY_HRESET, (xed_uint8_t)XED_EXTENSION_HRESET, (xed_uint16_t)       XED_ISA_SET_HRESET, (xed_uint16_t)   0 },
/*            HSUBPD_XMMpd_MEMpd */ {  (xed_uint16_t)         XED_ICLASS_HSUBPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            HSUBPD_XMMpd_XMMpd */ {  (xed_uint16_t)         XED_ICLASS_HSUBPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            HSUBPS_XMMps_MEMps */ {  (xed_uint16_t)         XED_ICLASS_HSUBPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            HSUBPS_XMMps_XMMps */ {  (xed_uint16_t)         XED_ICLASS_HSUBPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*                     IDIV_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_IDIV, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     IDIV_GPRv */ {  (xed_uint16_t)           XED_ICLASS_IDIV, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     IDIV_MEMb */ {  (xed_uint16_t)           XED_ICLASS_IDIV, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     IDIV_MEMv */ {  (xed_uint16_t)           XED_ICLASS_IDIV, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     IMUL_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     IMUL_GPRv */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                IMUL_GPRv_GPRv */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           IMUL_GPRv_GPRv_IMMb */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*           IMUL_GPRv_GPRv_IMMz */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                IMUL_GPRv_MEMv */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           IMUL_GPRv_MEMv_IMMb */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*           IMUL_GPRv_MEMv_IMMz */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                     IMUL_MEMb */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     IMUL_MEMv */ {  (xed_uint16_t)           XED_ICLASS_IMUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      IN_AL_DX */ {  (xed_uint16_t)             XED_ICLASS_IN, (xed_uint8_t)        XED_CATEGORY_IO, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    IN_AL_IMMb */ {  (xed_uint16_t)             XED_ICLASS_IN, (xed_uint8_t)        XED_CATEGORY_IO, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    IN_OeAX_DX */ {  (xed_uint16_t)             XED_ICLASS_IN, (xed_uint8_t)        XED_CATEGORY_IO, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  IN_OeAX_IMMb */ {  (xed_uint16_t)             XED_ICLASS_IN, (xed_uint8_t)        XED_CATEGORY_IO, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      INC_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_INC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   INC_GPRv_40 */ {  (xed_uint16_t)            XED_ICLASS_INC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 INC_GPRv_FFr0 */ {  (xed_uint16_t)            XED_ICLASS_INC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      INC_MEMb */ {  (xed_uint16_t)            XED_ICLASS_INC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      INC_MEMv */ {  (xed_uint16_t)            XED_ICLASS_INC, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*               INCSSPD_GPR32u8 */ {  (xed_uint16_t)        XED_ICLASS_INCSSPD, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*               INCSSPQ_GPR64u8 */ {  (xed_uint16_t)        XED_ICLASS_INCSSPQ, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*                 INC_LOCK_MEMb */ {  (xed_uint16_t)       XED_ICLASS_INC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  20 },
/*                 INC_LOCK_MEMv */ {  (xed_uint16_t)       XED_ICLASS_INC_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  20 },
/*                          INSB */ {  (xed_uint16_t)           XED_ICLASS_INSB, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                          INSD */ {  (xed_uint16_t)           XED_ICLASS_INSD, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*      INSERTPS_XMMps_MEMd_IMMb */ {  (xed_uint16_t)       XED_ICLASS_INSERTPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*     INSERTPS_XMMps_XMMps_IMMb */ {  (xed_uint16_t)       XED_ICLASS_INSERTPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            INSERTQ_XMMq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_INSERTQ, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t) XED_EXTENSION_SSE4A, (xed_uint16_t)        XED_ISA_SET_SSE4A, (xed_uint16_t)   0 },
/*   INSERTQ_XMMq_XMMq_IMMb_IMMb */ {  (xed_uint16_t)        XED_ICLASS_INSERTQ, (xed_uint8_t)   XED_CATEGORY_BITBYTE, (xed_uint8_t) XED_EXTENSION_SSE4A, (xed_uint16_t)        XED_ISA_SET_SSE4A, (xed_uint16_t)   0 },
/*                          INSW */ {  (xed_uint16_t)           XED_ICLASS_INSW, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)  40 },
/*                      INT_IMMb */ {  (xed_uint16_t)            XED_ICLASS_INT, (xed_uint8_t) XED_CATEGORY_INTERRUPT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                          INT1 */ {  (xed_uint16_t)           XED_ICLASS_INT1, (xed_uint8_t) XED_CATEGORY_INTERRUPT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                          INT3 */ {  (xed_uint16_t)           XED_ICLASS_INT3, (xed_uint8_t) XED_CATEGORY_INTERRUPT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                          INTO */ {  (xed_uint16_t)           XED_ICLASS_INTO, (xed_uint8_t) XED_CATEGORY_INTERRUPT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                          INVD */ {  (xed_uint16_t)           XED_ICLASS_INVD, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*            INVEPT_GPR32_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_INVEPT, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*            INVEPT_GPR64_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_INVEPT, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                   INVLPG_MEMb */ {  (xed_uint16_t)         XED_ICLASS_INVLPG, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*              INVLPGA_ArAX_ECX */ {  (xed_uint16_t)        XED_ICLASS_INVLPGA, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SVM, (xed_uint16_t)          XED_ISA_SET_SVM, (xed_uint16_t)   0 },
/*           INVLPGB_EAX_EDX_ECX */ {  (xed_uint16_t)        XED_ICLASS_INVLPGB, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)XED_EXTENSION_AMD_INVLPGB, (xed_uint16_t)  XED_ISA_SET_AMD_INVLPGB, (xed_uint16_t)   0 },
/*           INVLPGB_RAX_EDX_ECX */ {  (xed_uint16_t)        XED_ICLASS_INVLPGB, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)XED_EXTENSION_AMD_INVLPGB, (xed_uint16_t)  XED_ISA_SET_AMD_INVLPGB, (xed_uint16_t)   0 },
/*           INVPCID_GPR32_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_INVPCID, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)XED_EXTENSION_INVPCID, (xed_uint16_t)      XED_ISA_SET_INVPCID, (xed_uint16_t)   0 },
/*           INVPCID_GPR64_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_INVPCID, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)XED_EXTENSION_INVPCID, (xed_uint16_t)      XED_ISA_SET_INVPCID, (xed_uint16_t)   0 },
/*           INVVPID_GPR32_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_INVVPID, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*           INVVPID_GPR64_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_INVVPID, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                          IRET */ {  (xed_uint16_t)           XED_ICLASS_IRET, (xed_uint8_t)       XED_CATEGORY_RET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         IRETD */ {  (xed_uint16_t)          XED_ICLASS_IRETD, (xed_uint8_t)       XED_CATEGORY_RET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                         IRETQ */ {  (xed_uint16_t)          XED_ICLASS_IRETQ, (xed_uint8_t)       XED_CATEGORY_RET, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                     JB_RELBRb */ {  (xed_uint16_t)             XED_ICLASS_JB, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JB_RELBRd */ {  (xed_uint16_t)             XED_ICLASS_JB, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JB_RELBRz */ {  (xed_uint16_t)             XED_ICLASS_JB, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JBE_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JBE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JBE_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JBE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JBE_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JBE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   JCXZ_RELBRb */ {  (xed_uint16_t)           XED_ICLASS_JCXZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                  JECXZ_RELBRb */ {  (xed_uint16_t)          XED_ICLASS_JECXZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     JL_RELBRb */ {  (xed_uint16_t)             XED_ICLASS_JL, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JL_RELBRd */ {  (xed_uint16_t)             XED_ICLASS_JL, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JL_RELBRz */ {  (xed_uint16_t)             XED_ICLASS_JL, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JLE_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JLE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JLE_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JLE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JLE_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JLE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      JMP_GPRv */ {  (xed_uint16_t)            XED_ICLASS_JMP, (xed_uint8_t) XED_CATEGORY_UNCOND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      JMP_MEMv */ {  (xed_uint16_t)            XED_ICLASS_JMP, (xed_uint8_t) XED_CATEGORY_UNCOND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JMP_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JMP, (xed_uint8_t) XED_CATEGORY_UNCOND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JMP_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JMP, (xed_uint8_t) XED_CATEGORY_UNCOND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JMP_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JMP, (xed_uint8_t) XED_CATEGORY_UNCOND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 JMP_FAR_MEMp2 */ {  (xed_uint16_t)        XED_ICLASS_JMP_FAR, (xed_uint8_t) XED_CATEGORY_UNCOND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  26 },
/*             JMP_FAR_PTRp_IMMw */ {  (xed_uint16_t)        XED_ICLASS_JMP_FAR, (xed_uint8_t) XED_CATEGORY_UNCOND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  26 },
/*                    JNB_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JNB, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNB_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JNB, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNB_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JNB, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   JNBE_RELBRb */ {  (xed_uint16_t)           XED_ICLASS_JNBE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   JNBE_RELBRd */ {  (xed_uint16_t)           XED_ICLASS_JNBE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   JNBE_RELBRz */ {  (xed_uint16_t)           XED_ICLASS_JNBE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNL_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JNL, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNL_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JNL, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNL_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JNL, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   JNLE_RELBRb */ {  (xed_uint16_t)           XED_ICLASS_JNLE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   JNLE_RELBRd */ {  (xed_uint16_t)           XED_ICLASS_JNLE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   JNLE_RELBRz */ {  (xed_uint16_t)           XED_ICLASS_JNLE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNO_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JNO, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNO_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JNO, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNO_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JNO, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNP_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JNP, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNP_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JNP, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNP_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JNP, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNS_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JNS, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNS_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JNS, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNS_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JNS, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNZ_RELBRb */ {  (xed_uint16_t)            XED_ICLASS_JNZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNZ_RELBRd */ {  (xed_uint16_t)            XED_ICLASS_JNZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                    JNZ_RELBRz */ {  (xed_uint16_t)            XED_ICLASS_JNZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JO_RELBRb */ {  (xed_uint16_t)             XED_ICLASS_JO, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JO_RELBRd */ {  (xed_uint16_t)             XED_ICLASS_JO, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JO_RELBRz */ {  (xed_uint16_t)             XED_ICLASS_JO, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JP_RELBRb */ {  (xed_uint16_t)             XED_ICLASS_JP, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JP_RELBRd */ {  (xed_uint16_t)             XED_ICLASS_JP, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JP_RELBRz */ {  (xed_uint16_t)             XED_ICLASS_JP, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  JRCXZ_RELBRb */ {  (xed_uint16_t)          XED_ICLASS_JRCXZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                     JS_RELBRb */ {  (xed_uint16_t)             XED_ICLASS_JS, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JS_RELBRd */ {  (xed_uint16_t)             XED_ICLASS_JS, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JS_RELBRz */ {  (xed_uint16_t)             XED_ICLASS_JS, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JZ_RELBRb */ {  (xed_uint16_t)             XED_ICLASS_JZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JZ_RELBRd */ {  (xed_uint16_t)             XED_ICLASS_JZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     JZ_RELBRz */ {  (xed_uint16_t)             XED_ICLASS_JZ, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/* KADDB_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KADDB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KADDD_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KADDD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KADDQ_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KADDQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KADDW_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KADDW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KANDB_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KANDB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KANDD_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KANDD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KANDNB_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KANDNB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KANDND_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KANDND, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KANDNQ_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KANDNQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KANDNW_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KANDNW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KANDQ_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KANDQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KANDW_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KANDW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KMOVB_GPR32u32_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KMOVB_MASKmskw_GPR32u32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/*  KMOVB_MASKmskw_MASKu8_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/*   KMOVB_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/*   KMOVB_MEMu8_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KMOVD_GPR32u32_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KMOVD_MASKmskw_GPR32u32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KMOVD_MASKmskw_MASKu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/*  KMOVD_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/*  KMOVD_MEMu32_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KMOVQ_GPR64u64_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KMOVQ_MASKmskw_GPR64u64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KMOVQ_MASKmskw_MASKu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/*  KMOVQ_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/*  KMOVQ_MEMu64_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KMOVW_GPR32u32_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KMOVW_MASKmskw_GPR32u32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KMOVW_MASKmskw_MASKu16_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/*  KMOVW_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/*  KMOVW_MEMu16_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KMOVW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KNOTB_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KNOTB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KNOTD_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KNOTD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KNOTQ_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KNOTQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KNOTW_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KNOTW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KORB_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)           XED_ICLASS_KORB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KORD_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)           XED_ICLASS_KORD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KORQ_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)           XED_ICLASS_KORQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KORTESTB_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KORTESTB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KORTESTD_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KORTESTD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KORTESTQ_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KORTESTQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KORTESTW_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KORTESTW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KORW_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)           XED_ICLASS_KORW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KSHIFTLB_MASKmskw_MASKmskw_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KSHIFTLB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KSHIFTLD_MASKmskw_MASKmskw_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KSHIFTLD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KSHIFTLQ_MASKmskw_MASKmskw_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KSHIFTLQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KSHIFTLW_MASKmskw_MASKmskw_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KSHIFTLW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KSHIFTRB_MASKmskw_MASKmskw_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KSHIFTRB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KSHIFTRD_MASKmskw_MASKmskw_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KSHIFTRD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KSHIFTRQ_MASKmskw_MASKmskw_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KSHIFTRQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KSHIFTRW_MASKmskw_MASKmskw_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KSHIFTRW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KTESTB_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KTESTB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KTESTD_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KTESTD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KTESTQ_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KTESTQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KTESTW_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KTESTW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KUNPCKBW_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KUNPCKBW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KUNPCKDQ_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KUNPCKDQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KUNPCKWD_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_KUNPCKWD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KXNORB_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KXNORB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KXNORD_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KXNORD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KXNORQ_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KXNORQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KXNORW_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_KXNORW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/* KXORB_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KXORB, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_KOP, (xed_uint16_t)   0 },
/* KXORD_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KXORD, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KXORQ_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KXORQ, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_KOP, (xed_uint16_t)   0 },
/* KXORW_MASKmskw_MASKmskw_MASKmskw_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_KXORW, (xed_uint8_t)     XED_CATEGORY_KMASK, (xed_uint8_t)XED_EXTENSION_AVX512VEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_KOP, (xed_uint16_t)   0 },
/*                          LAHF */ {  (xed_uint16_t)           XED_ICLASS_LAHF, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_LAHF, (xed_uint16_t)   0 },
/*                 LAR_GPRv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_LAR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                 LAR_GPRv_MEMw */ {  (xed_uint16_t)            XED_ICLASS_LAR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*             LDDQU_XMMpd_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_LDDQU, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*                  LDMXCSR_MEMd */ {  (xed_uint16_t)        XED_ICLASS_LDMXCSR, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)     XED_ISA_SET_SSEMXCSR, (xed_uint16_t)   0 },
/*                 LDS_GPRz_MEMp */ {  (xed_uint16_t)            XED_ICLASS_LDS, (xed_uint8_t)     XED_CATEGORY_SEGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 LDTILECFG_MEM */ {  (xed_uint16_t)      XED_ICLASS_LDTILECFG, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_TILE, (xed_uint16_t)     XED_ISA_SET_AMX_TILE, (xed_uint16_t)   0 },
/*                 LEA_GPRv_AGEN */ {  (xed_uint16_t)            XED_ICLASS_LEA, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         LEAVE */ {  (xed_uint16_t)          XED_ICLASS_LEAVE, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                 LES_GPRz_MEMp */ {  (xed_uint16_t)            XED_ICLASS_LES, (xed_uint8_t)     XED_CATEGORY_SEGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                        LFENCE */ {  (xed_uint16_t)         XED_ICLASS_LFENCE, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*                LFS_GPRv_MEMp2 */ {  (xed_uint16_t)            XED_ICLASS_LFS, (xed_uint8_t)     XED_CATEGORY_SEGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     LGDT_MEMs */ {  (xed_uint16_t)           XED_ICLASS_LGDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                   LGDT_MEMs64 */ {  (xed_uint16_t)           XED_ICLASS_LGDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                LGS_GPRv_MEMp2 */ {  (xed_uint16_t)            XED_ICLASS_LGS, (xed_uint8_t)     XED_CATEGORY_SEGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     LIDT_MEMs */ {  (xed_uint16_t)           XED_ICLASS_LIDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                   LIDT_MEMs64 */ {  (xed_uint16_t)           XED_ICLASS_LIDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                    LLDT_GPR16 */ {  (xed_uint16_t)           XED_ICLASS_LLDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                     LLDT_MEMw */ {  (xed_uint16_t)           XED_ICLASS_LLDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                 LLWPCB_VGPRyy */ {  (xed_uint16_t)         XED_ICLASS_LLWPCB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_LWP, (xed_uint16_t)   0 },
/*                    LMSW_GPR16 */ {  (xed_uint16_t)           XED_ICLASS_LMSW, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                     LMSW_MEMw */ {  (xed_uint16_t)           XED_ICLASS_LMSW, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*         LOADIWKEY_XMMu8_XMMu8 */ {  (xed_uint16_t)      XED_ICLASS_LOADIWKEY, (xed_uint8_t) XED_CATEGORY_KEYLOCKER, (xed_uint8_t)XED_EXTENSION_KEYLOCKER, (xed_uint16_t)    XED_ISA_SET_KEYLOCKER, (xed_uint16_t)   0 },
/*                         LODSB */ {  (xed_uint16_t)          XED_ICLASS_LODSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         LODSD */ {  (xed_uint16_t)          XED_ICLASS_LODSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                         LODSQ */ {  (xed_uint16_t)          XED_ICLASS_LODSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                         LODSW */ {  (xed_uint16_t)          XED_ICLASS_LODSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   LOOP_RELBRb */ {  (xed_uint16_t)           XED_ICLASS_LOOP, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  LOOPE_RELBRb */ {  (xed_uint16_t)          XED_ICLASS_LOOPE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 LOOPNE_RELBRb */ {  (xed_uint16_t)         XED_ICLASS_LOOPNE, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 LSL_GPRv_GPRz */ {  (xed_uint16_t)            XED_ICLASS_LSL, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                 LSL_GPRv_MEMw */ {  (xed_uint16_t)            XED_ICLASS_LSL, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                LSS_GPRv_MEMp2 */ {  (xed_uint16_t)            XED_ICLASS_LSS, (xed_uint8_t)     XED_CATEGORY_SEGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     LTR_GPR16 */ {  (xed_uint16_t)            XED_ICLASS_LTR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                      LTR_MEMw */ {  (xed_uint16_t)            XED_ICLASS_LTR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*       LWPINS_VGPRyy_MEMd_IMMd */ {  (xed_uint16_t)         XED_ICLASS_LWPINS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_LWP, (xed_uint16_t)   0 },
/*    LWPINS_VGPRyy_VGPR32y_IMMd */ {  (xed_uint16_t)         XED_ICLASS_LWPINS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_LWP, (xed_uint16_t)   0 },
/*       LWPVAL_VGPRyy_MEMd_IMMd */ {  (xed_uint16_t)         XED_ICLASS_LWPVAL, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_LWP, (xed_uint16_t)   0 },
/*    LWPVAL_VGPRyy_VGPR32y_IMMd */ {  (xed_uint16_t)         XED_ICLASS_LWPVAL, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_LWP, (xed_uint16_t)   0 },
/*               LZCNT_GPRv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_LZCNT, (xed_uint8_t)     XED_CATEGORY_LZCNT, (xed_uint8_t) XED_EXTENSION_LZCNT, (xed_uint16_t)        XED_ISA_SET_LZCNT, (xed_uint16_t)   0 },
/*               LZCNT_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_LZCNT, (xed_uint8_t)     XED_CATEGORY_LZCNT, (xed_uint8_t) XED_EXTENSION_LZCNT, (xed_uint16_t)        XED_ISA_SET_LZCNT, (xed_uint16_t)   0 },
/*        MASKMOVDQU_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_MASKMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MASKMOVQ_MMXq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_MASKMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             MAXPD_XMMpd_MEMpd */ {  (xed_uint16_t)          XED_ICLASS_MAXPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MAXPD_XMMpd_XMMpd */ {  (xed_uint16_t)          XED_ICLASS_MAXPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MAXPS_XMMps_MEMps */ {  (xed_uint16_t)          XED_ICLASS_MAXPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MAXPS_XMMps_XMMps */ {  (xed_uint16_t)          XED_ICLASS_MAXPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MAXSD_XMMsd_MEMsd */ {  (xed_uint16_t)          XED_ICLASS_MAXSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MAXSD_XMMsd_XMMsd */ {  (xed_uint16_t)          XED_ICLASS_MAXSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MAXSS_XMMss_MEMss */ {  (xed_uint16_t)          XED_ICLASS_MAXSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MAXSS_XMMss_XMMss */ {  (xed_uint16_t)          XED_ICLASS_MAXSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                       MCOMMIT */ {  (xed_uint16_t)        XED_ICLASS_MCOMMIT, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)XED_EXTENSION_MCOMMIT, (xed_uint16_t)      XED_ISA_SET_MCOMMIT, (xed_uint16_t)   0 },
/*                        MFENCE */ {  (xed_uint16_t)         XED_ICLASS_MFENCE, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MINPD_XMMpd_MEMpd */ {  (xed_uint16_t)          XED_ICLASS_MINPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MINPD_XMMpd_XMMpd */ {  (xed_uint16_t)          XED_ICLASS_MINPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MINPS_XMMps_MEMps */ {  (xed_uint16_t)          XED_ICLASS_MINPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MINPS_XMMps_XMMps */ {  (xed_uint16_t)          XED_ICLASS_MINPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MINSD_XMMsd_MEMsd */ {  (xed_uint16_t)          XED_ICLASS_MINSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MINSD_XMMsd_XMMsd */ {  (xed_uint16_t)          XED_ICLASS_MINSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MINSS_XMMss_MEMss */ {  (xed_uint16_t)          XED_ICLASS_MINSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MINSS_XMMss_XMMss */ {  (xed_uint16_t)          XED_ICLASS_MINSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                       MONITOR */ {  (xed_uint16_t)        XED_ICLASS_MONITOR, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)XED_EXTENSION_MONITOR, (xed_uint16_t)      XED_ISA_SET_MONITOR, (xed_uint16_t)   0 },
/*                      MONITORX */ {  (xed_uint16_t)       XED_ICLASS_MONITORX, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)XED_EXTENSION_MONITORX, (xed_uint16_t)     XED_ISA_SET_MONITORX, (xed_uint16_t)   0 },
/*                   MOV_AL_MEMb */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              MOV_GPR8_GPR8_88 */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              MOV_GPR8_GPR8_8A */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              MOV_GPR8_IMMb_B0 */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            MOV_GPR8_IMMb_C6r0 */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_GPR8_MEMb */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              MOV_GPRv_GPRv_89 */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              MOV_GPRv_GPRv_8B */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_GPRv_IMMv */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_GPRv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  MOV_GPRv_SEG */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   MOV_MEMb_AL */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_MEMb_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_MEMb_IMMb */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_MEMv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_MEMv_OrAX */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  MOV_MEMw_SEG */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_OrAX_MEMv */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 MOV_SEG_GPR16 */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  MOV_SEG_MEMw */ {  (xed_uint16_t)            XED_ICLASS_MOV, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            MOVAPD_MEMpd_XMMpd */ {  (xed_uint16_t)         XED_ICLASS_MOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVAPD_XMMpd_MEMpd */ {  (xed_uint16_t)         XED_ICLASS_MOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       MOVAPD_XMMpd_XMMpd_0F28 */ {  (xed_uint16_t)         XED_ICLASS_MOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       MOVAPD_XMMpd_XMMpd_0F29 */ {  (xed_uint16_t)         XED_ICLASS_MOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVAPS_MEMps_XMMps */ {  (xed_uint16_t)         XED_ICLASS_MOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            MOVAPS_XMMps_MEMps */ {  (xed_uint16_t)         XED_ICLASS_MOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*       MOVAPS_XMMps_XMMps_0F28 */ {  (xed_uint16_t)         XED_ICLASS_MOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*       MOVAPS_XMMps_XMMps_0F29 */ {  (xed_uint16_t)         XED_ICLASS_MOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*               MOVBE_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_MOVBE, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t) XED_EXTENSION_MOVBE, (xed_uint16_t)        XED_ISA_SET_MOVBE, (xed_uint16_t)   0 },
/*               MOVBE_MEMv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_MOVBE, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t) XED_EXTENSION_MOVBE, (xed_uint16_t)        XED_ISA_SET_MOVBE, (xed_uint16_t)   0 },
/*               MOVD_GPR32_MMXd */ {  (xed_uint16_t)           XED_ICLASS_MOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               MOVD_GPR32_XMMd */ {  (xed_uint16_t)           XED_ICLASS_MOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*                MOVD_MEMd_MMXd */ {  (xed_uint16_t)           XED_ICLASS_MOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*                MOVD_MEMd_XMMd */ {  (xed_uint16_t)           XED_ICLASS_MOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               MOVD_MMXq_GPR32 */ {  (xed_uint16_t)           XED_ICLASS_MOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*                MOVD_MMXq_MEMd */ {  (xed_uint16_t)           XED_ICLASS_MOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              MOVD_XMMdq_GPR32 */ {  (xed_uint16_t)           XED_ICLASS_MOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               MOVD_XMMdq_MEMd */ {  (xed_uint16_t)           XED_ICLASS_MOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVDDUP_XMMdq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_MOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            MOVDDUP_XMMdq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_MOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*            MOVDIR64B_GPRa_MEM */ {  (xed_uint16_t)      XED_ICLASS_MOVDIR64B, (xed_uint8_t)    XED_CATEGORY_MOVDIR, (xed_uint8_t)XED_EXTENSION_MOVDIR, (xed_uint16_t)       XED_ISA_SET_MOVDIR, (xed_uint16_t)   0 },
/*       MOVDIRI_MEMu32_GPR32u32 */ {  (xed_uint16_t)        XED_ICLASS_MOVDIRI, (xed_uint8_t)    XED_CATEGORY_MOVDIR, (xed_uint8_t)XED_EXTENSION_MOVDIR, (xed_uint16_t)       XED_ISA_SET_MOVDIR, (xed_uint16_t)   0 },
/*       MOVDIRI_MEMu64_GPR64u64 */ {  (xed_uint16_t)        XED_ICLASS_MOVDIRI, (xed_uint8_t)    XED_CATEGORY_MOVDIR, (xed_uint8_t)XED_EXTENSION_MOVDIR, (xed_uint16_t)       XED_ISA_SET_MOVDIR, (xed_uint16_t)   0 },
/*             MOVDQ2Q_MMXq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_MOVDQ2Q, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVDQA_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_MOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVDQA_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_MOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       MOVDQA_XMMdq_XMMdq_0F6F */ {  (xed_uint16_t)         XED_ICLASS_MOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       MOVDQA_XMMdq_XMMdq_0F7F */ {  (xed_uint16_t)         XED_ICLASS_MOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVDQU_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_MOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVDQU_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_MOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       MOVDQU_XMMdq_XMMdq_0F6F */ {  (xed_uint16_t)         XED_ICLASS_MOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       MOVDQU_XMMdq_XMMdq_0F7F */ {  (xed_uint16_t)         XED_ICLASS_MOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MOVHLPS_XMMq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_MOVHLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MOVHPD_MEMq_XMMsd */ {  (xed_uint16_t)         XED_ICLASS_MOVHPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MOVHPD_XMMsd_MEMq */ {  (xed_uint16_t)         XED_ICLASS_MOVHPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MOVHPS_MEMq_XMMps */ {  (xed_uint16_t)         XED_ICLASS_MOVHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*              MOVHPS_XMMq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_MOVHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MOVLHPS_XMMq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_MOVLHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MOVLPD_MEMq_XMMsd */ {  (xed_uint16_t)         XED_ICLASS_MOVLPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MOVLPD_XMMsd_MEMq */ {  (xed_uint16_t)         XED_ICLASS_MOVLPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              MOVLPS_MEMq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_MOVLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*              MOVLPS_XMMq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_MOVLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*          MOVMSKPD_GPR32_XMMpd */ {  (xed_uint16_t)       XED_ICLASS_MOVMSKPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          MOVMSKPS_GPR32_XMMps */ {  (xed_uint16_t)       XED_ICLASS_MOVMSKPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           MOVNTDQ_MEMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_MOVNTDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          MOVNTDQA_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_MOVNTDQA, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*             MOVNTI_MEMd_GPR32 */ {  (xed_uint16_t)         XED_ICLASS_MOVNTI, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MOVNTI_MEMq_GPR64 */ {  (xed_uint16_t)         XED_ICLASS_MOVNTI, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           MOVNTPD_MEMdq_XMMpd */ {  (xed_uint16_t)        XED_ICLASS_MOVNTPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           MOVNTPS_MEMdq_XMMps */ {  (xed_uint16_t)        XED_ICLASS_MOVNTPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*              MOVNTQ_MEMq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_MOVNTQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             MOVNTSD_MEMq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_MOVNTSD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t) XED_EXTENSION_SSE4A, (xed_uint16_t)        XED_ISA_SET_SSE4A, (xed_uint16_t)   0 },
/*             MOVNTSS_MEMd_XMMd */ {  (xed_uint16_t)        XED_ICLASS_MOVNTSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t) XED_EXTENSION_SSE4A, (xed_uint16_t)        XED_ISA_SET_SSE4A, (xed_uint16_t)   0 },
/*               MOVQ_GPR64_MMXq */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               MOVQ_GPR64_XMMq */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           MOVQ_MEMq_MMXq_0F7E */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           MOVQ_MEMq_MMXq_0F7F */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           MOVQ_MEMq_XMMq_0F7E */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           MOVQ_MEMq_XMMq_0FD6 */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               MOVQ_MMXq_GPR64 */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           MOVQ_MMXq_MEMq_0F6E */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           MOVQ_MMXq_MEMq_0F6F */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           MOVQ_MMXq_MMXq_0F6F */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           MOVQ_MMXq_MMXq_0F7F */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              MOVQ_XMMdq_GPR64 */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          MOVQ_XMMdq_MEMq_0F6E */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          MOVQ_XMMdq_MEMq_0F7E */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          MOVQ_XMMdq_XMMq_0F7E */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          MOVQ_XMMdq_XMMq_0FD6 */ {  (xed_uint16_t)           XED_ICLASS_MOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVQ2DQ_XMMdq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_MOVQ2DQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*                         MOVSB */ {  (xed_uint16_t)          XED_ICLASS_MOVSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         MOVSD */ {  (xed_uint16_t)          XED_ICLASS_MOVSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*         MOVSD_XMM_MEMsd_XMMsd */ {  (xed_uint16_t)      XED_ICLASS_MOVSD_XMM, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)  56 },
/*         MOVSD_XMM_XMMdq_MEMsd */ {  (xed_uint16_t)      XED_ICLASS_MOVSD_XMM, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)  56 },
/*    MOVSD_XMM_XMMsd_XMMsd_0F10 */ {  (xed_uint16_t)      XED_ICLASS_MOVSD_XMM, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)  56 },
/*    MOVSD_XMM_XMMsd_XMMsd_0F11 */ {  (xed_uint16_t)      XED_ICLASS_MOVSD_XMM, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)  56 },
/*          MOVSHDUP_XMMps_MEMps */ {  (xed_uint16_t)       XED_ICLASS_MOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*          MOVSHDUP_XMMps_XMMps */ {  (xed_uint16_t)       XED_ICLASS_MOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*          MOVSLDUP_XMMps_MEMps */ {  (xed_uint16_t)       XED_ICLASS_MOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*          MOVSLDUP_XMMps_XMMps */ {  (xed_uint16_t)       XED_ICLASS_MOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE3, (xed_uint16_t)         XED_ISA_SET_SSE3, (xed_uint16_t)   0 },
/*                         MOVSQ */ {  (xed_uint16_t)          XED_ICLASS_MOVSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*             MOVSS_MEMss_XMMss */ {  (xed_uint16_t)          XED_ICLASS_MOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MOVSS_XMMdq_MEMss */ {  (xed_uint16_t)          XED_ICLASS_MOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*        MOVSS_XMMss_XMMss_0F10 */ {  (xed_uint16_t)          XED_ICLASS_MOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*        MOVSS_XMMss_XMMss_0F11 */ {  (xed_uint16_t)          XED_ICLASS_MOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                         MOVSW */ {  (xed_uint16_t)          XED_ICLASS_MOVSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              MOVSX_GPRv_GPR16 */ {  (xed_uint16_t)          XED_ICLASS_MOVSX, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*               MOVSX_GPRv_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_MOVSX, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*               MOVSX_GPRv_MEMb */ {  (xed_uint16_t)          XED_ICLASS_MOVSX, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*               MOVSX_GPRv_MEMw */ {  (xed_uint16_t)          XED_ICLASS_MOVSX, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*              MOVSXD_GPRv_GPRz */ {  (xed_uint16_t)         XED_ICLASS_MOVSXD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*              MOVSXD_GPRv_MEMz */ {  (xed_uint16_t)         XED_ICLASS_MOVSXD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*            MOVUPD_MEMpd_XMMpd */ {  (xed_uint16_t)         XED_ICLASS_MOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVUPD_XMMpd_MEMpd */ {  (xed_uint16_t)         XED_ICLASS_MOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       MOVUPD_XMMpd_XMMpd_0F10 */ {  (xed_uint16_t)         XED_ICLASS_MOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       MOVUPD_XMMpd_XMMpd_0F11 */ {  (xed_uint16_t)         XED_ICLASS_MOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            MOVUPS_MEMps_XMMps */ {  (xed_uint16_t)         XED_ICLASS_MOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            MOVUPS_XMMps_MEMps */ {  (xed_uint16_t)         XED_ICLASS_MOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*       MOVUPS_XMMps_XMMps_0F10 */ {  (xed_uint16_t)         XED_ICLASS_MOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*       MOVUPS_XMMps_XMMps_0F11 */ {  (xed_uint16_t)         XED_ICLASS_MOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*              MOVZX_GPRv_GPR16 */ {  (xed_uint16_t)          XED_ICLASS_MOVZX, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*               MOVZX_GPRv_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_MOVZX, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*               MOVZX_GPRv_MEMb */ {  (xed_uint16_t)          XED_ICLASS_MOVZX, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*               MOVZX_GPRv_MEMw */ {  (xed_uint16_t)          XED_ICLASS_MOVZX, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*               MOV_CR_CR_GPR32 */ {  (xed_uint16_t)         XED_ICLASS_MOV_CR, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  98 },
/*               MOV_CR_CR_GPR64 */ {  (xed_uint16_t)         XED_ICLASS_MOV_CR, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  98 },
/*               MOV_CR_GPR32_CR */ {  (xed_uint16_t)         XED_ICLASS_MOV_CR, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  98 },
/*               MOV_CR_GPR64_CR */ {  (xed_uint16_t)         XED_ICLASS_MOV_CR, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  98 },
/*               MOV_DR_DR_GPR32 */ {  (xed_uint16_t)         XED_ICLASS_MOV_DR, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  98 },
/*               MOV_DR_DR_GPR64 */ {  (xed_uint16_t)         XED_ICLASS_MOV_DR, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  98 },
/*               MOV_DR_GPR32_DR */ {  (xed_uint16_t)         XED_ICLASS_MOV_DR, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  98 },
/*               MOV_DR_GPR64_DR */ {  (xed_uint16_t)         XED_ICLASS_MOV_DR, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  98 },
/*      MPSADBW_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_MPSADBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      MPSADBW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_MPSADBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*                      MUL_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_MUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      MUL_GPRv */ {  (xed_uint16_t)            XED_ICLASS_MUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      MUL_MEMb */ {  (xed_uint16_t)            XED_ICLASS_MUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      MUL_MEMv */ {  (xed_uint16_t)            XED_ICLASS_MUL, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             MULPD_XMMpd_MEMpd */ {  (xed_uint16_t)          XED_ICLASS_MULPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MULPD_XMMpd_XMMpd */ {  (xed_uint16_t)          XED_ICLASS_MULPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MULPS_XMMps_MEMps */ {  (xed_uint16_t)          XED_ICLASS_MULPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MULPS_XMMps_XMMps */ {  (xed_uint16_t)          XED_ICLASS_MULPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MULSD_XMMsd_MEMsd */ {  (xed_uint16_t)          XED_ICLASS_MULSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MULSD_XMMsd_XMMsd */ {  (xed_uint16_t)          XED_ICLASS_MULSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             MULSS_XMMss_MEMss */ {  (xed_uint16_t)          XED_ICLASS_MULSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             MULSS_XMMss_XMMss */ {  (xed_uint16_t)          XED_ICLASS_MULSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*     MULX_VGPR32d_VGPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_MULX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  MULX_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_MULX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     MULX_VGPR64q_VGPR64q_MEMq */ {  (xed_uint16_t)           XED_ICLASS_MULX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  MULX_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_MULX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*                         MWAIT */ {  (xed_uint16_t)          XED_ICLASS_MWAIT, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)XED_EXTENSION_MONITOR, (xed_uint16_t)      XED_ISA_SET_MONITOR, (xed_uint16_t)   0 },
/*                        MWAITX */ {  (xed_uint16_t)         XED_ICLASS_MWAITX, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)XED_EXTENSION_MONITORX, (xed_uint16_t)     XED_ISA_SET_MONITORX, (xed_uint16_t)   0 },
/*                      NEG_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_NEG, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      NEG_GPRv */ {  (xed_uint16_t)            XED_ICLASS_NEG, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      NEG_MEMb */ {  (xed_uint16_t)            XED_ICLASS_NEG, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      NEG_MEMv */ {  (xed_uint16_t)            XED_ICLASS_NEG, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 NEG_LOCK_MEMb */ {  (xed_uint16_t)       XED_ICLASS_NEG_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  18 },
/*                 NEG_LOCK_MEMv */ {  (xed_uint16_t)       XED_ICLASS_NEG_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  18 },
/*                        NOP_90 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)       XED_CATEGORY_NOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*               NOP_GPRv_0F18r0 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_GPRv_0F18r1 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_GPRv_0F18r2 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_GPRv_0F18r3 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_GPRv_0F18r4 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_GPRv_0F18r5 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_GPRv_0F18r6 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_GPRv_0F18r7 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*            NOP_GPRv_GPRv_0F0D */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t) XED_ISA_SET_PREFETCH_NOP, (xed_uint16_t)   0 },
/*            NOP_GPRv_GPRv_0F19 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*            NOP_GPRv_GPRv_0F1A */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*            NOP_GPRv_GPRv_0F1B */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*            NOP_GPRv_GPRv_0F1C */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*            NOP_GPRv_GPRv_0F1D */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*            NOP_GPRv_GPRv_0F1E */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*            NOP_GPRv_GPRv_0F1F */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*             NOP_GPRv_MEM_0F1B */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*            NOP_GPRv_MEMv_0F1A */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*               NOP_MEMv_0F18r4 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_MEMv_0F18r5 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_MEMv_0F18r6 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*               NOP_MEMv_0F18r7 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*            NOP_MEMv_GPRv_0F19 */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*            NOP_MEMv_GPRv_0F1C */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*            NOP_MEMv_GPRv_0F1D */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*            NOP_MEMv_GPRv_0F1E */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*            NOP_MEMv_GPRv_0F1F */ {  (xed_uint16_t)            XED_ICLASS_NOP, (xed_uint8_t)   XED_CATEGORY_WIDENOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)      XED_ISA_SET_FAT_NOP, (xed_uint16_t)   0 },
/*                      NOT_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_NOT, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      NOT_GPRv */ {  (xed_uint16_t)            XED_ICLASS_NOT, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      NOT_MEMb */ {  (xed_uint16_t)            XED_ICLASS_NOT, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      NOT_MEMv */ {  (xed_uint16_t)            XED_ICLASS_NOT, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 NOT_LOCK_MEMb */ {  (xed_uint16_t)       XED_ICLASS_NOT_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  16 },
/*                 NOT_LOCK_MEMv */ {  (xed_uint16_t)       XED_ICLASS_NOT_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  16 },
/*                    OR_AL_IMMb */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*               OR_GPR8_GPR8_08 */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*               OR_GPR8_GPR8_0A */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             OR_GPR8_IMMb_80r1 */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             OR_GPR8_IMMb_82r1 */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_GPR8_MEMb */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*               OR_GPRv_GPRv_09 */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*               OR_GPRv_GPRv_0B */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_GPRv_IMMb */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_GPRv_IMMz */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_GPRv_MEMv */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_MEMb_GPR8 */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             OR_MEMb_IMMb_80r1 */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             OR_MEMb_IMMb_82r1 */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_MEMv_GPRv */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_MEMv_IMMb */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_MEMv_IMMz */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  OR_OrAX_IMMz */ {  (xed_uint16_t)             XED_ICLASS_OR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            ORPD_XMMxuq_MEMxuq */ {  (xed_uint16_t)           XED_ICLASS_ORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            ORPD_XMMxuq_XMMxuq */ {  (xed_uint16_t)           XED_ICLASS_ORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            ORPS_XMMxud_MEMxud */ {  (xed_uint16_t)           XED_ICLASS_ORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            ORPS_XMMxud_XMMxud */ {  (xed_uint16_t)           XED_ICLASS_ORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             OR_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)        XED_ICLASS_OR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   4 },
/*        OR_LOCK_MEMb_IMMb_80r1 */ {  (xed_uint16_t)        XED_ICLASS_OR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   4 },
/*        OR_LOCK_MEMb_IMMb_82r1 */ {  (xed_uint16_t)        XED_ICLASS_OR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   4 },
/*             OR_LOCK_MEMv_GPRv */ {  (xed_uint16_t)        XED_ICLASS_OR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   4 },
/*             OR_LOCK_MEMv_IMMb */ {  (xed_uint16_t)        XED_ICLASS_OR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   4 },
/*             OR_LOCK_MEMv_IMMz */ {  (xed_uint16_t)        XED_ICLASS_OR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   4 },
/*                     OUT_DX_AL */ {  (xed_uint16_t)            XED_ICLASS_OUT, (xed_uint8_t)        XED_CATEGORY_IO, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   OUT_DX_OeAX */ {  (xed_uint16_t)            XED_ICLASS_OUT, (xed_uint8_t)        XED_CATEGORY_IO, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   OUT_IMMb_AL */ {  (xed_uint16_t)            XED_ICLASS_OUT, (xed_uint8_t)        XED_CATEGORY_IO, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 OUT_IMMb_OeAX */ {  (xed_uint16_t)            XED_ICLASS_OUT, (xed_uint8_t)        XED_CATEGORY_IO, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         OUTSB */ {  (xed_uint16_t)          XED_ICLASS_OUTSB, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                         OUTSD */ {  (xed_uint16_t)          XED_ICLASS_OUTSD, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                         OUTSW */ {  (xed_uint16_t)          XED_ICLASS_OUTSW, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*               PABSB_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PABSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*               PABSB_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PABSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*             PABSB_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PABSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*             PABSB_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PABSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*               PABSD_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PABSD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*               PABSD_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PABSD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*             PABSD_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PABSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*             PABSD_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PABSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*               PABSW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PABSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*               PABSW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PABSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*             PABSW_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PABSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*             PABSW_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PABSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PACKSSDW_MMXq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PACKSSDW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PACKSSDW_MMXq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_PACKSSDW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*          PACKSSDW_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_PACKSSDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PACKSSDW_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_PACKSSDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PACKSSWB_MMXq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PACKSSWB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PACKSSWB_MMXq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_PACKSSWB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*          PACKSSWB_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_PACKSSWB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PACKSSWB_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_PACKSSWB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PACKUSDW_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_PACKUSDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*          PACKUSDW_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_PACKUSDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PACKUSWB_MMXq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PACKUSWB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PACKUSWB_MMXq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_PACKUSWB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*          PACKUSWB_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_PACKUSWB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PACKUSWB_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_PACKUSWB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PADDB_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PADDB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PADDB_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PADDB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PADDB_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PADDB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PADDB_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PADDB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PADDD_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PADDD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PADDD_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PADDD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PADDD_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PADDD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PADDD_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PADDD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PADDQ_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PADDQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)      XED_ISA_SET_SSE2MMX, (xed_uint16_t)   0 },
/*               PADDQ_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PADDQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)      XED_ISA_SET_SSE2MMX, (xed_uint16_t)   0 },
/*             PADDQ_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PADDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PADDQ_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PADDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PADDSB_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PADDSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PADDSB_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PADDSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PADDSB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PADDSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PADDSB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PADDSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PADDSW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PADDSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PADDSW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PADDSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PADDSW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PADDSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PADDSW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PADDSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PADDUSB_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PADDUSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PADDUSB_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PADDUSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PADDUSB_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PADDUSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PADDUSB_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PADDUSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PADDUSW_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PADDUSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PADDUSW_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PADDUSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PADDUSW_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PADDUSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PADDUSW_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PADDUSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PADDW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PADDW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PADDW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PADDW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PADDW_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PADDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PADDW_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PADDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        PALIGNR_MMXq_MEMq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PALIGNR, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*        PALIGNR_MMXq_MMXq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PALIGNR, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*      PALIGNR_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PALIGNR, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*      PALIGNR_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PALIGNR, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*                PAND_MMXq_MEMq */ {  (xed_uint16_t)           XED_ICLASS_PAND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*                PAND_MMXq_MMXq */ {  (xed_uint16_t)           XED_ICLASS_PAND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PAND_XMMdq_MEMdq */ {  (xed_uint16_t)           XED_ICLASS_PAND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PAND_XMMdq_XMMdq */ {  (xed_uint16_t)           XED_ICLASS_PAND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PANDN_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PANDN, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PANDN_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PANDN, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PANDN_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PANDN, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PANDN_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PANDN, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*                         PAUSE */ {  (xed_uint16_t)          XED_ICLASS_PAUSE, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t) XED_EXTENSION_PAUSE, (xed_uint16_t)        XED_ISA_SET_PAUSE, (xed_uint16_t)   0 },
/*               PAVGB_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PAVGB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PAVGB_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PAVGB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PAVGB_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PAVGB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PAVGB_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PAVGB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PAVGUSB_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PAVGUSB, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PAVGUSB_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PAVGUSB, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PAVGW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PAVGW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PAVGW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PAVGW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PAVGW_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PAVGW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PAVGW_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PAVGW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PBLENDVB_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_PBLENDVB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*          PBLENDVB_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_PBLENDVB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      PBLENDW_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PBLENDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      PBLENDW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PBLENDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*    PCLMULQDQ_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCLMULQDQ, (xed_uint8_t) XED_CATEGORY_PCLMULQDQ, (xed_uint8_t)XED_EXTENSION_PCLMULQDQ, (xed_uint16_t)    XED_ISA_SET_PCLMULQDQ, (xed_uint16_t)   0 },
/*    PCLMULQDQ_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCLMULQDQ, (xed_uint8_t) XED_CATEGORY_PCLMULQDQ, (xed_uint8_t)XED_EXTENSION_PCLMULQDQ, (xed_uint16_t)    XED_ISA_SET_PCLMULQDQ, (xed_uint16_t)   0 },
/*             PCMPEQB_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PCMPEQB_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PCMPEQB_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PCMPEQB_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PCMPEQD_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PCMPEQD_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PCMPEQD_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PCMPEQD_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PCMPEQQ_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PCMPEQQ_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*             PCMPEQW_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PCMPEQW_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PCMPEQW_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PCMPEQW_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPEQW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*    PCMPESTRI_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCMPESTRI, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*    PCMPESTRI_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCMPESTRI, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*  PCMPESTRI64_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_PCMPESTRI64, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t) 106 },
/*  PCMPESTRI64_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_PCMPESTRI64, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t) 106 },
/*    PCMPESTRM_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCMPESTRM, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*    PCMPESTRM_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCMPESTRM, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*  PCMPESTRM64_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_PCMPESTRM64, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t) 110 },
/*  PCMPESTRM64_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_PCMPESTRM64, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t) 110 },
/*             PCMPGTB_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PCMPGTB_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PCMPGTB_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PCMPGTB_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PCMPGTD_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PCMPGTD_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PCMPGTD_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PCMPGTD_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PCMPGTQ_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*           PCMPGTQ_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*             PCMPGTW_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PCMPGTW_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PCMPGTW_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PCMPGTW_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PCMPGTW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*    PCMPISTRI_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCMPISTRI, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*    PCMPISTRI_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCMPISTRI, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*  PCMPISTRI64_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_PCMPISTRI64, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t) 108 },
/*  PCMPISTRI64_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_PCMPISTRI64, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t) 108 },
/*    PCMPISTRM_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCMPISTRM, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*    PCMPISTRM_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_PCMPISTRM, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)        XED_ISA_SET_SSE42, (xed_uint16_t)   0 },
/*                       PCONFIG */ {  (xed_uint16_t)        XED_ICLASS_PCONFIG, (xed_uint8_t)   XED_CATEGORY_PCONFIG, (xed_uint8_t)XED_EXTENSION_PCONFIG, (xed_uint16_t)      XED_ISA_SET_PCONFIG, (xed_uint16_t)   0 },
/*                     PCONFIG64 */ {  (xed_uint16_t)        XED_ICLASS_PCONFIG, (xed_uint8_t)   XED_CATEGORY_PCONFIG, (xed_uint8_t)XED_EXTENSION_PCONFIG, (xed_uint16_t)      XED_ISA_SET_PCONFIG, (xed_uint16_t)   0 },
/*     PDEP_VGPR32d_VGPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_PDEP, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  PDEP_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_PDEP, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     PDEP_VGPR64q_VGPR64q_MEMq */ {  (xed_uint16_t)           XED_ICLASS_PDEP, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  PDEP_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_PDEP, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     PEXT_VGPR32d_VGPR32d_MEMd */ {  (xed_uint16_t)           XED_ICLASS_PEXT, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  PEXT_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_PEXT, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     PEXT_VGPR64q_VGPR64q_MEMq */ {  (xed_uint16_t)           XED_ICLASS_PEXT, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  PEXT_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_PEXT, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*      PEXTRB_GPR32d_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PEXTRB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PEXTRB_MEMb_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PEXTRB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      PEXTRD_GPR32d_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PEXTRD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PEXTRD_MEMd_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PEXTRD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      PEXTRQ_GPR64q_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PEXTRQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PEXTRQ_MEMq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PEXTRQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PEXTRW_GPR32_MMXq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PEXTRW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*       PEXTRW_GPR32_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PEXTRW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*  PEXTRW_SSE4_GPR32_XMMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_PEXTRW_SSE4, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t) 104 },
/*   PEXTRW_SSE4_MEMw_XMMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_PEXTRW_SSE4, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t) 104 },
/*               PF2ID_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PF2ID, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PF2ID_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PF2ID, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PF2IW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PF2IW, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PF2IW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PF2IW, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFACC_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PFACC, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFACC_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PFACC, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFADD_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PFADD, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFADD_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PFADD, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFCMPEQ_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PFCMPEQ, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFCMPEQ_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PFCMPEQ, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFCMPGE_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PFCMPGE, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFCMPGE_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PFCMPGE, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFCMPGT_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PFCMPGT, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFCMPGT_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PFCMPGT, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFMAX_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PFMAX, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFMAX_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PFMAX, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFMIN_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PFMIN, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFMIN_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PFMIN, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFMUL_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PFMUL, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFMUL_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PFMUL, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*              PFNACC_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PFNACC, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*              PFNACC_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PFNACC, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFPNACC_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PFPNACC, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFPNACC_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PFPNACC, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFRCP_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PFRCP, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFRCP_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PFRCP, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*            PFRCPIT1_MMXq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PFRCPIT1, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*            PFRCPIT1_MMXq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_PFRCPIT1, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*            PFRCPIT2_MMXq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PFRCPIT2, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*            PFRCPIT2_MMXq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_PFRCPIT2, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*            PFRSQIT1_MMXq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PFRSQIT1, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*            PFRSQIT1_MMXq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_PFRSQIT1, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFRSQRT_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PFRSQRT, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PFRSQRT_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PFRSQRT, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFSUB_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PFSUB, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PFSUB_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PFSUB, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*              PFSUBR_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PFSUBR, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*              PFSUBR_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PFSUBR, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*              PHADDD_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PHADDD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*              PHADDD_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PHADDD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PHADDD_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PHADDD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PHADDD_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PHADDD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*             PHADDSW_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PHADDSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*             PHADDSW_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PHADDSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*           PHADDSW_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PHADDSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*           PHADDSW_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PHADDSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*              PHADDW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PHADDW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*              PHADDW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PHADDW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PHADDW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PHADDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PHADDW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PHADDW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*        PHMINPOSUW_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_PHMINPOSUW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PHMINPOSUW_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_PHMINPOSUW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*              PHSUBD_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PHSUBD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*              PHSUBD_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PHSUBD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PHSUBD_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PHSUBD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PHSUBD_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PHSUBD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*             PHSUBSW_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PHSUBSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*             PHSUBSW_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PHSUBSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*           PHSUBSW_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PHSUBSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*           PHSUBSW_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PHSUBSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*              PHSUBW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PHSUBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*              PHSUBW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PHSUBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PHSUBW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PHSUBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PHSUBW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PHSUBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*               PI2FD_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PI2FD, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PI2FD_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PI2FD, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PI2FW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PI2FW, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*               PI2FW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PI2FW, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*      PINSRB_XMMdq_GPR32d_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PINSRB_XMMdq_MEMb_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      PINSRD_XMMdq_GPR32d_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PINSRD_XMMdq_MEMd_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      PINSRQ_XMMdq_GPR64q_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PINSRQ_XMMdq_MEMq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        PINSRW_MMXq_GPR32_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*         PINSRW_MMXq_MEMw_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*       PINSRW_XMMdq_GPR32_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        PINSRW_XMMdq_MEMw_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PINSRW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PMADDUBSW_MMXq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_PMADDUBSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*           PMADDUBSW_MMXq_MMXq */ {  (xed_uint16_t)      XED_ICLASS_PMADDUBSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*         PMADDUBSW_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_PMADDUBSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*         PMADDUBSW_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_PMADDUBSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*             PMADDWD_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PMADDWD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PMADDWD_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PMADDWD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PMADDWD_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PMADDWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PMADDWD_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PMADDWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMAXSB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMAXSB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMAXSD_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMAXSD_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*              PMAXSW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PMAXSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PMAXSW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PMAXSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PMAXSW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMAXSW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PMAXUB_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PMAXUB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PMAXUB_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PMAXUB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PMAXUB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXUB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMAXUB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXUB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMAXUD_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXUD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMAXUD_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXUD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMAXUW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXUW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMAXUW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMAXUW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMINSB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMINSB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMINSD_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMINSD_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*              PMINSW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PMINSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PMINSW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PMINSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PMINSW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMINSW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PMINUB_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PMINUB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PMINUB_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PMINUB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PMINUB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINUB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMINUB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINUB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMINUD_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINUD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMINUD_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINUD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMINUW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINUW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMINUW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMINUW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVMSKB_GPR32_MMXq */ {  (xed_uint16_t)       XED_ICLASS_PMOVMSKB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*          PMOVMSKB_GPR32_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_PMOVMSKB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PMOVSXBD_XMMdq_MEMd */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXBD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXBD_XMMdq_XMMd */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXBD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXBQ_XMMdq_MEMw */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXBQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXBQ_XMMdq_XMMw */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXBQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXBW_XMMdq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXBW_XMMdq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXDQ_XMMdq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXDQ_XMMdq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXWD_XMMdq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXWD_XMMdq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXWQ_XMMdq_MEMd */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXWQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVSXWQ_XMMdq_XMMd */ {  (xed_uint16_t)       XED_ICLASS_PMOVSXWQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXBD_XMMdq_MEMd */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXBD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXBD_XMMdq_XMMd */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXBD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXBQ_XMMdq_MEMw */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXBQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXBQ_XMMdq_XMMw */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXBQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXBW_XMMdq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXBW_XMMdq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXDQ_XMMdq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXDQ_XMMdq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXWD_XMMdq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXWD_XMMdq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXWQ_XMMdq_MEMd */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXWQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*           PMOVZXWQ_XMMdq_XMMd */ {  (xed_uint16_t)       XED_ICLASS_PMOVZXWQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMULDQ_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMULDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMULDQ_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMULDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMULHRSW_MMXq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_PMULHRSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PMULHRSW_MMXq_MMXq */ {  (xed_uint16_t)       XED_ICLASS_PMULHRSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*          PMULHRSW_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_PMULHRSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*          PMULHRSW_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_PMULHRSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*             PMULHRW_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PMULHRW, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PMULHRW_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PMULHRW, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PMULHUW_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PMULHUW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PMULHUW_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PMULHUW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PMULHUW_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PMULHUW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PMULHUW_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PMULHUW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PMULHW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PMULHW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PMULHW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PMULHW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PMULHW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMULHW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMULHW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMULHW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMULLD_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMULLD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*            PMULLD_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMULLD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*              PMULLW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PMULLW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PMULLW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PMULLW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PMULLW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PMULLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PMULLW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PMULLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PMULUDQ_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PMULUDQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)      XED_ISA_SET_SSE2MMX, (xed_uint16_t)   0 },
/*             PMULUDQ_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PMULUDQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)      XED_ISA_SET_SSE2MMX, (xed_uint16_t)   0 },
/*           PMULUDQ_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PMULUDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PMULUDQ_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PMULUDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*                        POP_DS */ {  (xed_uint16_t)            XED_ICLASS_POP, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                        POP_ES */ {  (xed_uint16_t)            XED_ICLASS_POP, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                        POP_FS */ {  (xed_uint16_t)            XED_ICLASS_POP, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   POP_GPRv_58 */ {  (xed_uint16_t)            XED_ICLASS_POP, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   POP_GPRv_8F */ {  (xed_uint16_t)            XED_ICLASS_POP, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                        POP_GS */ {  (xed_uint16_t)            XED_ICLASS_POP, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      POP_MEMv */ {  (xed_uint16_t)            XED_ICLASS_POP, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                        POP_SS */ {  (xed_uint16_t)            XED_ICLASS_POP, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                          POPA */ {  (xed_uint16_t)           XED_ICLASS_POPA, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                         POPAD */ {  (xed_uint16_t)          XED_ICLASS_POPAD, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*              POPCNT_GPRv_GPRv */ {  (xed_uint16_t)         XED_ICLASS_POPCNT, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)       XED_ISA_SET_POPCNT, (xed_uint16_t)   0 },
/*              POPCNT_GPRv_MEMv */ {  (xed_uint16_t)         XED_ICLASS_POPCNT, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)       XED_ISA_SET_POPCNT, (xed_uint16_t)   0 },
/*                          POPF */ {  (xed_uint16_t)           XED_ICLASS_POPF, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         POPFD */ {  (xed_uint16_t)          XED_ICLASS_POPFD, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                         POPFQ */ {  (xed_uint16_t)          XED_ICLASS_POPFQ, (xed_uint8_t)       XED_CATEGORY_POP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                 POR_MMXq_MEMq */ {  (xed_uint16_t)            XED_ICLASS_POR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*                 POR_MMXq_MMXq */ {  (xed_uint16_t)            XED_ICLASS_POR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               POR_XMMdq_MEMdq */ {  (xed_uint16_t)            XED_ICLASS_POR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               POR_XMMdq_XMMdq */ {  (xed_uint16_t)            XED_ICLASS_POR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*      PREFETCHNTA_MEMmprefetch */ {  (xed_uint16_t)    XED_ICLASS_PREFETCHNTA, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t) XED_ISA_SET_SSE_PREFETCH, (xed_uint16_t)   0 },
/*       PREFETCHT0_MEMmprefetch */ {  (xed_uint16_t)     XED_ICLASS_PREFETCHT0, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t) XED_ISA_SET_SSE_PREFETCH, (xed_uint16_t)   0 },
/*       PREFETCHT1_MEMmprefetch */ {  (xed_uint16_t)     XED_ICLASS_PREFETCHT1, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t) XED_ISA_SET_SSE_PREFETCH, (xed_uint16_t)   0 },
/*       PREFETCHT2_MEMmprefetch */ {  (xed_uint16_t)     XED_ICLASS_PREFETCHT2, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t) XED_ISA_SET_SSE_PREFETCH, (xed_uint16_t)   0 },
/*              PREFETCHW_0F0Dr1 */ {  (xed_uint16_t)      XED_ICLASS_PREFETCHW, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)XED_EXTENSION_3DNOW_PREFETCH, (xed_uint16_t) XED_ISA_SET_PREFETCH_NOP, (xed_uint16_t)   0 },
/*              PREFETCHW_0F0Dr3 */ {  (xed_uint16_t)      XED_ICLASS_PREFETCHW, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)XED_EXTENSION_3DNOW_PREFETCH, (xed_uint16_t) XED_ISA_SET_PREFETCH_NOP, (xed_uint16_t)   0 },
/*             PREFETCHWT1_MEMu8 */ {  (xed_uint16_t)    XED_ICLASS_PREFETCHWT1, (xed_uint8_t) XED_CATEGORY_PREFETCHWT1, (xed_uint8_t)XED_EXTENSION_PREFETCHWT1, (xed_uint16_t)  XED_ISA_SET_PREFETCHWT1, (xed_uint16_t)   0 },
/* PREFETCH_EXCLUSIVE_MEMmprefetch */ {  (xed_uint16_t) XED_ICLASS_PREFETCH_EXCLUSIVE, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)XED_EXTENSION_3DNOW_PREFETCH, (xed_uint16_t) XED_ISA_SET_PREFETCH_NOP, (xed_uint16_t)   0 },
/*      PREFETCH_RESERVED_0F0Dr4 */ {  (xed_uint16_t) XED_ICLASS_PREFETCH_RESERVED, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)XED_EXTENSION_3DNOW_PREFETCH, (xed_uint16_t) XED_ISA_SET_PREFETCH_NOP, (xed_uint16_t)   0 },
/*      PREFETCH_RESERVED_0F0Dr5 */ {  (xed_uint16_t) XED_ICLASS_PREFETCH_RESERVED, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)XED_EXTENSION_3DNOW_PREFETCH, (xed_uint16_t) XED_ISA_SET_PREFETCH_NOP, (xed_uint16_t)   0 },
/*      PREFETCH_RESERVED_0F0Dr6 */ {  (xed_uint16_t) XED_ICLASS_PREFETCH_RESERVED, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)XED_EXTENSION_3DNOW_PREFETCH, (xed_uint16_t) XED_ISA_SET_PREFETCH_NOP, (xed_uint16_t)   0 },
/*      PREFETCH_RESERVED_0F0Dr7 */ {  (xed_uint16_t) XED_ICLASS_PREFETCH_RESERVED, (xed_uint8_t)  XED_CATEGORY_PREFETCH, (xed_uint8_t)XED_EXTENSION_3DNOW_PREFETCH, (xed_uint16_t) XED_ISA_SET_PREFETCH_NOP, (xed_uint16_t)   0 },
/*              PSADBW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PSADBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSADBW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PSADBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PSADBW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PSADBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PSADBW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PSADBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PSHUFB_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PSHUFB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*              PSHUFB_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PSHUFB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PSHUFB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PSHUFB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PSHUFB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PSHUFB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*       PSHUFD_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PSHUFD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       PSHUFD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PSHUFD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*      PSHUFHW_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PSHUFHW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*      PSHUFHW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PSHUFHW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*      PSHUFLW_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PSHUFLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*      PSHUFLW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_PSHUFLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         PSHUFW_MMXq_MEMq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PSHUFW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*         PSHUFW_MMXq_MMXq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PSHUFW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSIGNB_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PSIGNB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*              PSIGNB_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PSIGNB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PSIGNB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PSIGNB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PSIGNB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PSIGNB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*              PSIGND_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PSIGND, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*              PSIGND_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PSIGND, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PSIGND_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PSIGND, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PSIGND_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PSIGND, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*              PSIGNW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PSIGNW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*              PSIGNW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PSIGNW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)     XED_ISA_SET_SSSE3MMX, (xed_uint16_t)   0 },
/*            PSIGNW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PSIGNW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*            PSIGNW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PSIGNW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t) XED_EXTENSION_SSSE3, (xed_uint16_t)        XED_ISA_SET_SSSE3, (xed_uint16_t)   0 },
/*               PSLLD_MMXq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSLLD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSLLD_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSLLD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSLLD_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSLLD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSLLD_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSLLD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSLLD_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSLLD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSLLD_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSLLD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSLLDQ_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PSLLDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSLLQ_MMXq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSLLQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSLLQ_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSLLQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSLLQ_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSLLQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSLLQ_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSLLQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSLLQ_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSLLQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSLLQ_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSLLQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSLLW_MMXq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSLLW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSLLW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSLLW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSLLW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSLLW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSLLW_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSLLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSLLW_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSLLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSLLW_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSLLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*                    PSMASH_RAX */ {  (xed_uint16_t)         XED_ICLASS_PSMASH, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SNP, (xed_uint16_t)          XED_ISA_SET_SNP, (xed_uint16_t)   0 },
/*               PSRAD_MMXq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRAD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRAD_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSRAD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRAD_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSRAD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSRAD_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRAD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRAD_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRAD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRAD_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRAD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSRAW_MMXq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRAW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRAW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSRAW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRAW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSRAW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSRAW_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRAW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRAW_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRAW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRAW_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRAW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSRLD_MMXq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRLD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRLD_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSRLD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRLD_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSRLD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSRLD_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRLD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRLD_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRLD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRLD_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRLD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRLDQ_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_PSRLDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSRLQ_MMXq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRLQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRLQ_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSRLQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRLQ_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSRLQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSRLQ_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRLQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRLQ_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRLQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRLQ_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRLQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSRLW_MMXq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRLW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRLW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSRLW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSRLW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSRLW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSRLW_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_PSRLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRLW_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSRLW_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSRLW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSUBB_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSUBB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSUBB_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSUBB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PSUBB_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSUBB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSUBB_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSUBB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSUBD_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSUBD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSUBD_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSUBD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PSUBD_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSUBD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSUBD_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSUBD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSUBQ_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSUBQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)      XED_ISA_SET_SSE2MMX, (xed_uint16_t)   0 },
/*               PSUBQ_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSUBQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)      XED_ISA_SET_SSE2MMX, (xed_uint16_t)   0 },
/*             PSUBQ_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSUBQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSUBQ_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSUBQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PSUBSB_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PSUBSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSUBSB_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PSUBSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PSUBSB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PSUBSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PSUBSB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PSUBSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PSUBSW_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PSUBSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PSUBSW_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PSUBSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*            PSUBSW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_PSUBSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            PSUBSW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_PSUBSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSUBUSB_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PSUBUSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PSUBUSB_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PSUBUSB, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PSUBUSB_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PSUBUSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PSUBUSB_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PSUBUSB, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSUBUSW_MMXq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_PSUBUSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PSUBUSW_MMXq_MMXq */ {  (xed_uint16_t)        XED_ICLASS_PSUBUSW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PSUBUSW_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_PSUBUSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PSUBUSW_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_PSUBUSW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*               PSUBW_MMXq_MEMq */ {  (xed_uint16_t)          XED_ICLASS_PSUBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*               PSUBW_MMXq_MMXq */ {  (xed_uint16_t)          XED_ICLASS_PSUBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*             PSUBW_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PSUBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             PSUBW_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PSUBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PSWAPD_MMXq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_PSWAPD, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*              PSWAPD_MMXq_MMXq */ {  (xed_uint16_t)         XED_ICLASS_PSWAPD, (xed_uint8_t)     XED_CATEGORY_3DNOW, (xed_uint8_t) XED_EXTENSION_3DNOW, (xed_uint16_t)        XED_ISA_SET_3DNOW, (xed_uint16_t)   0 },
/*             PTEST_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_PTEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*             PTEST_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_PTEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*                  PTWRITE_GPRy */ {  (xed_uint16_t)        XED_ICLASS_PTWRITE, (xed_uint8_t)   XED_CATEGORY_PTWRITE, (xed_uint8_t)XED_EXTENSION_PTWRITE, (xed_uint16_t)      XED_ISA_SET_PTWRITE, (xed_uint16_t)   0 },
/*                  PTWRITE_MEMy */ {  (xed_uint16_t)        XED_ICLASS_PTWRITE, (xed_uint8_t)   XED_CATEGORY_PTWRITE, (xed_uint8_t)XED_EXTENSION_PTWRITE, (xed_uint16_t)      XED_ISA_SET_PTWRITE, (xed_uint16_t)   0 },
/*           PUNPCKHBW_MMXq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PUNPCKHBW_MMXq_MMXd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*         PUNPCKHBW_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PUNPCKHBW_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PUNPCKHDQ_MMXq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHDQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PUNPCKHDQ_MMXq_MMXd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHDQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*         PUNPCKHDQ_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PUNPCKHDQ_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        PUNPCKHQDQ_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_PUNPCKHQDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         PUNPCKHQDQ_XMMdq_XMMq */ {  (xed_uint16_t)     XED_ICLASS_PUNPCKHQDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PUNPCKHWD_MMXq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHWD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PUNPCKHWD_MMXq_MMXd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHWD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*         PUNPCKHWD_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PUNPCKHWD_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKHWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PUNPCKLBW_MMXq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PUNPCKLBW_MMXq_MMXd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLBW, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*         PUNPCKLBW_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PUNPCKLBW_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLBW, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PUNPCKLDQ_MMXq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLDQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PUNPCKLDQ_MMXq_MMXd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLDQ, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*         PUNPCKLDQ_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PUNPCKLDQ_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*        PUNPCKLQDQ_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_PUNPCKLQDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*         PUNPCKLQDQ_XMMdq_XMMq */ {  (xed_uint16_t)     XED_ICLASS_PUNPCKLQDQ, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           PUNPCKLWD_MMXq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLWD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*           PUNPCKLWD_MMXq_MMXd */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLWD, (xed_uint8_t)       XED_CATEGORY_MMX, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*         PUNPCKLWD_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          PUNPCKLWD_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_PUNPCKLWD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*                       PUSH_CS */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                       PUSH_DS */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                       PUSH_ES */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                       PUSH_FS */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  PUSH_GPRv_50 */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                PUSH_GPRv_FFr6 */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                       PUSH_GS */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                     PUSH_IMMb */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                     PUSH_IMMz */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                     PUSH_MEMv */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                       PUSH_SS */ {  (xed_uint16_t)           XED_ICLASS_PUSH, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         PUSHA */ {  (xed_uint16_t)          XED_ICLASS_PUSHA, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                        PUSHAD */ {  (xed_uint16_t)         XED_ICLASS_PUSHAD, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                         PUSHF */ {  (xed_uint16_t)          XED_ICLASS_PUSHF, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                        PUSHFD */ {  (xed_uint16_t)         XED_ICLASS_PUSHFD, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                        PUSHFQ */ {  (xed_uint16_t)         XED_ICLASS_PUSHFQ, (xed_uint8_t)      XED_CATEGORY_PUSH, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*         PVALIDATE_RAX_ECX_EDX */ {  (xed_uint16_t)      XED_ICLASS_PVALIDATE, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SNP, (xed_uint16_t)          XED_ISA_SET_SNP, (xed_uint16_t)   0 },
/*                PXOR_MMXq_MEMq */ {  (xed_uint16_t)           XED_ICLASS_PXOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*                PXOR_MMXq_MMXq */ {  (xed_uint16_t)           XED_ICLASS_PXOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_MMX, (xed_uint16_t)   XED_ISA_SET_PENTIUMMMX, (xed_uint16_t)   0 },
/*              PXOR_XMMdq_MEMdq */ {  (xed_uint16_t)           XED_ICLASS_PXOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*              PXOR_XMMdq_XMMdq */ {  (xed_uint16_t)           XED_ICLASS_PXOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*                   RCL_GPR8_CL */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RCL_GPR8_IMMb */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  RCL_GPR8_ONE */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   RCL_GPRv_CL */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RCL_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  RCL_GPRv_ONE */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   RCL_MEMb_CL */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RCL_MEMb_IMMb */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  RCL_MEMb_ONE */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   RCL_MEMv_CL */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RCL_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  RCL_MEMv_ONE */ {  (xed_uint16_t)            XED_ICLASS_RCL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             RCPPS_XMMps_MEMps */ {  (xed_uint16_t)          XED_ICLASS_RCPPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             RCPPS_XMMps_XMMps */ {  (xed_uint16_t)          XED_ICLASS_RCPPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             RCPSS_XMMss_MEMss */ {  (xed_uint16_t)          XED_ICLASS_RCPSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             RCPSS_XMMss_XMMss */ {  (xed_uint16_t)          XED_ICLASS_RCPSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                   RCR_GPR8_CL */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RCR_GPR8_IMMb */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  RCR_GPR8_ONE */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   RCR_GPRv_CL */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RCR_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  RCR_GPRv_ONE */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   RCR_MEMb_CL */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RCR_MEMb_IMMb */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  RCR_MEMb_ONE */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   RCR_MEMv_CL */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RCR_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  RCR_MEMv_ONE */ {  (xed_uint16_t)            XED_ICLASS_RCR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 RDFSBASE_GPRy */ {  (xed_uint16_t)       XED_ICLASS_RDFSBASE, (xed_uint8_t)  XED_CATEGORY_RDWRFSGS, (xed_uint8_t)XED_EXTENSION_RDWRFSGS, (xed_uint16_t)     XED_ISA_SET_RDWRFSGS, (xed_uint16_t)   0 },
/*                 RDGSBASE_GPRy */ {  (xed_uint16_t)       XED_ICLASS_RDGSBASE, (xed_uint8_t)  XED_CATEGORY_RDWRFSGS, (xed_uint8_t)XED_EXTENSION_RDWRFSGS, (xed_uint16_t)     XED_ISA_SET_RDWRFSGS, (xed_uint16_t)   0 },
/*                         RDMSR */ {  (xed_uint16_t)          XED_ICLASS_RDMSR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)  XED_ISA_SET_PENTIUMREAL, (xed_uint16_t)   0 },
/*                RDPID_GPR32u32 */ {  (xed_uint16_t)          XED_ICLASS_RDPID, (xed_uint8_t)     XED_CATEGORY_RDPID, (xed_uint8_t) XED_EXTENSION_RDPID, (xed_uint16_t)        XED_ISA_SET_RDPID, (xed_uint16_t)   0 },
/*                RDPID_GPR64u64 */ {  (xed_uint16_t)          XED_ICLASS_RDPID, (xed_uint8_t)     XED_CATEGORY_RDPID, (xed_uint8_t) XED_EXTENSION_RDPID, (xed_uint16_t)        XED_ISA_SET_RDPID, (xed_uint16_t)   0 },
/*                        RDPKRU */ {  (xed_uint16_t)         XED_ICLASS_RDPKRU, (xed_uint8_t)       XED_CATEGORY_PKU, (xed_uint8_t)   XED_EXTENSION_PKU, (xed_uint16_t)          XED_ISA_SET_PKU, (xed_uint16_t)   0 },
/*                         RDPMC */ {  (xed_uint16_t)          XED_ICLASS_RDPMC, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)        XED_ISA_SET_RDPMC, (xed_uint16_t)   0 },
/*                         RDPRU */ {  (xed_uint16_t)          XED_ICLASS_RDPRU, (xed_uint8_t)     XED_CATEGORY_RDPRU, (xed_uint8_t) XED_EXTENSION_RDPRU, (xed_uint16_t)        XED_ISA_SET_RDPRU, (xed_uint16_t)   0 },
/*                   RDRAND_GPRv */ {  (xed_uint16_t)         XED_ICLASS_RDRAND, (xed_uint8_t)    XED_CATEGORY_RDRAND, (xed_uint8_t)XED_EXTENSION_RDRAND, (xed_uint16_t)       XED_ISA_SET_RDRAND, (xed_uint16_t)   0 },
/*                   RDSEED_GPRv */ {  (xed_uint16_t)         XED_ICLASS_RDSEED, (xed_uint8_t)    XED_CATEGORY_RDSEED, (xed_uint8_t)XED_EXTENSION_RDSEED, (xed_uint16_t)       XED_ISA_SET_RDSEED, (xed_uint16_t)   0 },
/*               RDSSPD_GPR32u32 */ {  (xed_uint16_t)         XED_ICLASS_RDSSPD, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*               RDSSPQ_GPR64u64 */ {  (xed_uint16_t)         XED_ICLASS_RDSSPQ, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*                         RDTSC */ {  (xed_uint16_t)          XED_ICLASS_RDTSC, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)  XED_ISA_SET_PENTIUMREAL, (xed_uint16_t)   0 },
/*                        RDTSCP */ {  (xed_uint16_t)         XED_ICLASS_RDTSCP, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)XED_EXTENSION_RDTSCP, (xed_uint16_t)       XED_ISA_SET_RDTSCP, (xed_uint16_t)   0 },
/*                    REPE_CMPSB */ {  (xed_uint16_t)     XED_ICLASS_REPE_CMPSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  60 },
/*                    REPE_CMPSD */ {  (xed_uint16_t)     XED_ICLASS_REPE_CMPSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  64 },
/*                    REPE_CMPSQ */ {  (xed_uint16_t)     XED_ICLASS_REPE_CMPSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)  66 },
/*                    REPE_CMPSW */ {  (xed_uint16_t)     XED_ICLASS_REPE_CMPSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  62 },
/*                    REPE_SCASB */ {  (xed_uint16_t)     XED_ICLASS_REPE_SCASB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  84 },
/*                    REPE_SCASD */ {  (xed_uint16_t)     XED_ICLASS_REPE_SCASD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  88 },
/*                    REPE_SCASQ */ {  (xed_uint16_t)     XED_ICLASS_REPE_SCASQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)  90 },
/*                    REPE_SCASW */ {  (xed_uint16_t)     XED_ICLASS_REPE_SCASW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  86 },
/*                   REPNE_CMPSB */ {  (xed_uint16_t)    XED_ICLASS_REPNE_CMPSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  60 },
/*                   REPNE_CMPSD */ {  (xed_uint16_t)    XED_ICLASS_REPNE_CMPSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  64 },
/*                   REPNE_CMPSQ */ {  (xed_uint16_t)    XED_ICLASS_REPNE_CMPSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)  66 },
/*                   REPNE_CMPSW */ {  (xed_uint16_t)    XED_ICLASS_REPNE_CMPSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  62 },
/*                   REPNE_SCASB */ {  (xed_uint16_t)    XED_ICLASS_REPNE_SCASB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  84 },
/*                   REPNE_SCASD */ {  (xed_uint16_t)    XED_ICLASS_REPNE_SCASD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  88 },
/*                   REPNE_SCASQ */ {  (xed_uint16_t)    XED_ICLASS_REPNE_SCASQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)  90 },
/*                   REPNE_SCASW */ {  (xed_uint16_t)    XED_ICLASS_REPNE_SCASW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  86 },
/*                      REP_INSB */ {  (xed_uint16_t)       XED_ICLASS_REP_INSB, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)  38 },
/*                      REP_INSD */ {  (xed_uint16_t)       XED_ICLASS_REP_INSD, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  42 },
/*                      REP_INSW */ {  (xed_uint16_t)       XED_ICLASS_REP_INSW, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)  40 },
/*                     REP_LODSB */ {  (xed_uint16_t)      XED_ICLASS_REP_LODSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  76 },
/*                     REP_LODSD */ {  (xed_uint16_t)      XED_ICLASS_REP_LODSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  80 },
/*                     REP_LODSQ */ {  (xed_uint16_t)      XED_ICLASS_REP_LODSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)  82 },
/*                     REP_LODSW */ {  (xed_uint16_t)      XED_ICLASS_REP_LODSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  78 },
/*                   REP_MONTMUL */ {  (xed_uint16_t)    XED_ICLASS_REP_MONTMUL, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_MONTMUL, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_MONTMUL, (xed_uint16_t) 128 },
/*                     REP_MOVSB */ {  (xed_uint16_t)      XED_ICLASS_REP_MOVSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  52 },
/*                     REP_MOVSD */ {  (xed_uint16_t)      XED_ICLASS_REP_MOVSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  56 },
/*                     REP_MOVSQ */ {  (xed_uint16_t)      XED_ICLASS_REP_MOVSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)  58 },
/*                     REP_MOVSW */ {  (xed_uint16_t)      XED_ICLASS_REP_MOVSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  54 },
/*                     REP_OUTSB */ {  (xed_uint16_t)      XED_ICLASS_REP_OUTSB, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)  44 },
/*                     REP_OUTSD */ {  (xed_uint16_t)      XED_ICLASS_REP_OUTSD, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  48 },
/*                     REP_OUTSW */ {  (xed_uint16_t)      XED_ICLASS_REP_OUTSW, (xed_uint8_t) XED_CATEGORY_IOSTRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)  46 },
/*                     REP_STOSB */ {  (xed_uint16_t)      XED_ICLASS_REP_STOSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  68 },
/*                     REP_STOSD */ {  (xed_uint16_t)      XED_ICLASS_REP_STOSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)  72 },
/*                     REP_STOSQ */ {  (xed_uint16_t)      XED_ICLASS_REP_STOSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)  74 },
/*                     REP_STOSW */ {  (xed_uint16_t)      XED_ICLASS_REP_STOSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  70 },
/*                 REP_XCRYPTCBC */ {  (xed_uint16_t)  XED_ICLASS_REP_XCRYPTCBC, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_AES, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_AES, (xed_uint16_t) 116 },
/*                 REP_XCRYPTCFB */ {  (xed_uint16_t)  XED_ICLASS_REP_XCRYPTCFB, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_AES, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_AES, (xed_uint16_t) 120 },
/*                 REP_XCRYPTCTR */ {  (xed_uint16_t)  XED_ICLASS_REP_XCRYPTCTR, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_AES, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_AES, (xed_uint16_t) 118 },
/*                 REP_XCRYPTECB */ {  (xed_uint16_t)  XED_ICLASS_REP_XCRYPTECB, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_AES, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_AES, (xed_uint16_t) 114 },
/*                 REP_XCRYPTOFB */ {  (xed_uint16_t)  XED_ICLASS_REP_XCRYPTOFB, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_AES, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_AES, (xed_uint16_t) 122 },
/*                     REP_XSHA1 */ {  (xed_uint16_t)      XED_ICLASS_REP_XSHA1, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_SHA, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_SHA, (xed_uint16_t) 124 },
/*                   REP_XSHA256 */ {  (xed_uint16_t)    XED_ICLASS_REP_XSHA256, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_SHA, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_SHA, (xed_uint16_t) 126 },
/*                    REP_XSTORE */ {  (xed_uint16_t)     XED_ICLASS_REP_XSTORE, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_RNG, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_RNG, (xed_uint16_t) 112 },
/*                       RET_FAR */ {  (xed_uint16_t)        XED_ICLASS_RET_FAR, (xed_uint8_t)       XED_CATEGORY_RET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  94 },
/*                  RET_FAR_IMMw */ {  (xed_uint16_t)        XED_ICLASS_RET_FAR, (xed_uint8_t)       XED_CATEGORY_RET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  94 },
/*                      RET_NEAR */ {  (xed_uint16_t)       XED_ICLASS_RET_NEAR, (xed_uint8_t)       XED_CATEGORY_RET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  92 },
/*                 RET_NEAR_IMMw */ {  (xed_uint16_t)       XED_ICLASS_RET_NEAR, (xed_uint8_t)       XED_CATEGORY_RET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  92 },
/*         RMPADJUST_RAX_RCX_RDX */ {  (xed_uint16_t)      XED_ICLASS_RMPADJUST, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SNP, (xed_uint16_t)          XED_ISA_SET_SNP, (xed_uint16_t)   0 },
/*             RMPUPDATE_RAX_RCX */ {  (xed_uint16_t)      XED_ICLASS_RMPUPDATE, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SNP, (xed_uint16_t)          XED_ISA_SET_SNP, (xed_uint16_t)   0 },
/*                   ROL_GPR8_CL */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ROL_GPR8_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  ROL_GPR8_ONE */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   ROL_GPRv_CL */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ROL_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  ROL_GPRv_ONE */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   ROL_MEMb_CL */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ROL_MEMb_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  ROL_MEMb_ONE */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   ROL_MEMv_CL */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ROL_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  ROL_MEMv_ONE */ {  (xed_uint16_t)            XED_ICLASS_ROL, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   ROR_GPR8_CL */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ROR_GPR8_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  ROR_GPR8_ONE */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   ROR_GPRv_CL */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ROR_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  ROR_GPRv_ONE */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   ROR_MEMb_CL */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ROR_MEMb_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  ROR_MEMb_ONE */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   ROR_MEMv_CL */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 ROR_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  ROR_MEMv_ONE */ {  (xed_uint16_t)            XED_ICLASS_ROR, (xed_uint8_t)    XED_CATEGORY_ROTATE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*        RORX_VGPR32d_MEMd_IMMb */ {  (xed_uint16_t)           XED_ICLASS_RORX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     RORX_VGPR32d_VGPR32d_IMMb */ {  (xed_uint16_t)           XED_ICLASS_RORX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*        RORX_VGPR64q_MEMq_IMMb */ {  (xed_uint16_t)           XED_ICLASS_RORX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     RORX_VGPR64q_VGPR64q_IMMb */ {  (xed_uint16_t)           XED_ICLASS_RORX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*      ROUNDPD_XMMpd_MEMpd_IMMb */ {  (xed_uint16_t)        XED_ICLASS_ROUNDPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      ROUNDPD_XMMpd_XMMpd_IMMb */ {  (xed_uint16_t)        XED_ICLASS_ROUNDPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      ROUNDPS_XMMps_MEMps_IMMb */ {  (xed_uint16_t)        XED_ICLASS_ROUNDPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*      ROUNDPS_XMMps_XMMps_IMMb */ {  (xed_uint16_t)        XED_ICLASS_ROUNDPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        ROUNDSD_XMMq_MEMq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_ROUNDSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        ROUNDSD_XMMq_XMMq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_ROUNDSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        ROUNDSS_XMMd_MEMd_IMMb */ {  (xed_uint16_t)        XED_ICLASS_ROUNDSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*        ROUNDSS_XMMd_XMMd_IMMb */ {  (xed_uint16_t)        XED_ICLASS_ROUNDSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE4, (xed_uint16_t)         XED_ISA_SET_SSE4, (xed_uint16_t)   0 },
/*                           RSM */ {  (xed_uint16_t)            XED_ICLASS_RSM, (xed_uint8_t)    XED_CATEGORY_SYSRET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I486, (xed_uint16_t)   0 },
/*           RSQRTPS_XMMps_MEMps */ {  (xed_uint16_t)        XED_ICLASS_RSQRTPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           RSQRTPS_XMMps_XMMps */ {  (xed_uint16_t)        XED_ICLASS_RSQRTPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           RSQRTSS_XMMss_MEMss */ {  (xed_uint16_t)        XED_ICLASS_RSQRTSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           RSQRTSS_XMMss_XMMss */ {  (xed_uint16_t)        XED_ICLASS_RSQRTSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*               RSTORSSP_MEMu64 */ {  (xed_uint16_t)       XED_ICLASS_RSTORSSP, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*                          SAHF */ {  (xed_uint16_t)           XED_ICLASS_SAHF, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_LAHF, (xed_uint16_t)   0 },
/*                          SALC */ {  (xed_uint16_t)           XED_ICLASS_SALC, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   SAR_GPR8_CL */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SAR_GPR8_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  SAR_GPR8_ONE */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   SAR_GPRv_CL */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SAR_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  SAR_GPRv_ONE */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   SAR_MEMb_CL */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SAR_MEMb_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  SAR_MEMb_ONE */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   SAR_MEMv_CL */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SAR_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  SAR_MEMv_ONE */ {  (xed_uint16_t)            XED_ICLASS_SAR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*     SARX_VGPR32d_MEMd_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_SARX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  SARX_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_SARX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     SARX_VGPR64q_MEMq_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_SARX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  SARX_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_SARX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*                   SAVEPREVSSP */ {  (xed_uint16_t)    XED_ICLASS_SAVEPREVSSP, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*                   SBB_AL_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SBB_GPR8_GPR8_18 */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SBB_GPR8_GPR8_1A */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SBB_GPR8_IMMb_80r3 */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SBB_GPR8_IMMb_82r3 */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_GPR8_MEMb */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SBB_GPRv_GPRv_19 */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SBB_GPRv_GPRv_1B */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_GPRv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_MEMb_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SBB_MEMb_IMMb_80r3 */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SBB_MEMb_IMMb_82r3 */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_MEMv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SBB_OrAX_IMMz */ {  (xed_uint16_t)            XED_ICLASS_SBB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SBB_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)       XED_ICLASS_SBB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   8 },
/*       SBB_LOCK_MEMb_IMMb_80r3 */ {  (xed_uint16_t)       XED_ICLASS_SBB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   8 },
/*       SBB_LOCK_MEMb_IMMb_82r3 */ {  (xed_uint16_t)       XED_ICLASS_SBB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   8 },
/*            SBB_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_SBB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   8 },
/*            SBB_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_SBB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   8 },
/*            SBB_LOCK_MEMv_IMMz */ {  (xed_uint16_t)       XED_ICLASS_SBB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   8 },
/*                         SCASB */ {  (xed_uint16_t)          XED_ICLASS_SCASB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         SCASD */ {  (xed_uint16_t)          XED_ICLASS_SCASD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                         SCASQ */ {  (xed_uint16_t)          XED_ICLASS_SCASQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                         SCASW */ {  (xed_uint16_t)          XED_ICLASS_SCASW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      SEAMCALL */ {  (xed_uint16_t)       XED_ICLASS_SEAMCALL, (xed_uint8_t)    XED_CATEGORY_LEGACY, (xed_uint8_t)   XED_EXTENSION_TDX, (xed_uint16_t)          XED_ISA_SET_TDX, (xed_uint16_t)   0 },
/*                       SEAMOPS */ {  (xed_uint16_t)        XED_ICLASS_SEAMOPS, (xed_uint8_t)    XED_CATEGORY_LEGACY, (xed_uint8_t)   XED_EXTENSION_TDX, (xed_uint16_t)          XED_ISA_SET_TDX, (xed_uint16_t)   0 },
/*                       SEAMRET */ {  (xed_uint16_t)        XED_ICLASS_SEAMRET, (xed_uint8_t)    XED_CATEGORY_LEGACY, (xed_uint8_t)   XED_EXTENSION_TDX, (xed_uint16_t)          XED_ISA_SET_TDX, (xed_uint16_t)   0 },
/*             SENDUIPI_GPR32u32 */ {  (xed_uint16_t)       XED_ICLASS_SENDUIPI, (xed_uint8_t)     XED_CATEGORY_UINTR, (xed_uint8_t) XED_EXTENSION_UINTR, (xed_uint16_t)        XED_ISA_SET_UINTR, (xed_uint16_t)   0 },
/*                     SERIALIZE */ {  (xed_uint16_t)      XED_ICLASS_SERIALIZE, (xed_uint8_t) XED_CATEGORY_SERIALIZE, (xed_uint8_t)XED_EXTENSION_SERIALIZE, (xed_uint16_t)    XED_ISA_SET_SERIALIZE, (xed_uint16_t)   0 },
/*                     SETB_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_SETB, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETB_MEMb */ {  (xed_uint16_t)           XED_ICLASS_SETB, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETBE_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_SETBE, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETBE_MEMb */ {  (xed_uint16_t)          XED_ICLASS_SETBE, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETL_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_SETL, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETL_MEMb */ {  (xed_uint16_t)           XED_ICLASS_SETL, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETLE_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_SETLE, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETLE_MEMb */ {  (xed_uint16_t)          XED_ICLASS_SETLE, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNB_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_SETNB, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNB_MEMb */ {  (xed_uint16_t)          XED_ICLASS_SETNB, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                   SETNBE_GPR8 */ {  (xed_uint16_t)         XED_ICLASS_SETNBE, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                   SETNBE_MEMb */ {  (xed_uint16_t)         XED_ICLASS_SETNBE, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNL_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_SETNL, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNL_MEMb */ {  (xed_uint16_t)          XED_ICLASS_SETNL, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                   SETNLE_GPR8 */ {  (xed_uint16_t)         XED_ICLASS_SETNLE, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                   SETNLE_MEMb */ {  (xed_uint16_t)         XED_ICLASS_SETNLE, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNO_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_SETNO, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNO_MEMb */ {  (xed_uint16_t)          XED_ICLASS_SETNO, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNP_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_SETNP, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNP_MEMb */ {  (xed_uint16_t)          XED_ICLASS_SETNP, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNS_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_SETNS, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNS_MEMb */ {  (xed_uint16_t)          XED_ICLASS_SETNS, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNZ_GPR8 */ {  (xed_uint16_t)          XED_ICLASS_SETNZ, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                    SETNZ_MEMb */ {  (xed_uint16_t)          XED_ICLASS_SETNZ, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETO_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_SETO, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETO_MEMb */ {  (xed_uint16_t)           XED_ICLASS_SETO, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETP_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_SETP, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETP_MEMb */ {  (xed_uint16_t)           XED_ICLASS_SETP, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETS_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_SETS, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETS_MEMb */ {  (xed_uint16_t)           XED_ICLASS_SETS, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                      SETSSBSY */ {  (xed_uint16_t)       XED_ICLASS_SETSSBSY, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*                     SETZ_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_SETZ, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                     SETZ_MEMb */ {  (xed_uint16_t)           XED_ICLASS_SETZ, (xed_uint8_t)     XED_CATEGORY_SETCC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                        SFENCE */ {  (xed_uint16_t)         XED_ICLASS_SFENCE, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                     SGDT_MEMs */ {  (xed_uint16_t)           XED_ICLASS_SGDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                   SGDT_MEMs64 */ {  (xed_uint16_t)           XED_ICLASS_SGDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*    SHA1MSG1_XMMi32_MEMi32_SHA */ {  (xed_uint16_t)       XED_ICLASS_SHA1MSG1, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*    SHA1MSG1_XMMi32_XMMi32_SHA */ {  (xed_uint16_t)       XED_ICLASS_SHA1MSG1, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*    SHA1MSG2_XMMi32_MEMi32_SHA */ {  (xed_uint16_t)       XED_ICLASS_SHA1MSG2, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*    SHA1MSG2_XMMi32_XMMi32_SHA */ {  (xed_uint16_t)       XED_ICLASS_SHA1MSG2, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*   SHA1NEXTE_XMMi32_MEMi32_SHA */ {  (xed_uint16_t)      XED_ICLASS_SHA1NEXTE, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*   SHA1NEXTE_XMMi32_XMMi32_SHA */ {  (xed_uint16_t)      XED_ICLASS_SHA1NEXTE, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/* SHA1RNDS4_XMMi32_MEMi32_IMM8_SHA */ {  (xed_uint16_t)      XED_ICLASS_SHA1RNDS4, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/* SHA1RNDS4_XMMi32_XMMi32_IMM8_SHA */ {  (xed_uint16_t)      XED_ICLASS_SHA1RNDS4, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*  SHA256MSG1_XMMi32_MEMi32_SHA */ {  (xed_uint16_t)     XED_ICLASS_SHA256MSG1, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*  SHA256MSG1_XMMi32_XMMi32_SHA */ {  (xed_uint16_t)     XED_ICLASS_SHA256MSG1, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*  SHA256MSG2_XMMi32_MEMi32_SHA */ {  (xed_uint16_t)     XED_ICLASS_SHA256MSG2, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*  SHA256MSG2_XMMi32_XMMi32_SHA */ {  (xed_uint16_t)     XED_ICLASS_SHA256MSG2, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/* SHA256RNDS2_XMMi32_MEMi32_SHA */ {  (xed_uint16_t)    XED_ICLASS_SHA256RNDS2, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/* SHA256RNDS2_XMMi32_XMMi32_SHA */ {  (xed_uint16_t)    XED_ICLASS_SHA256RNDS2, (xed_uint8_t)       XED_CATEGORY_SHA, (xed_uint8_t)   XED_EXTENSION_SHA, (xed_uint16_t)          XED_ISA_SET_SHA, (xed_uint16_t)   0 },
/*              SHL_GPR8_CL_D2r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SHL_GPR8_CL_D2r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SHL_GPR8_IMMb_C0r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*            SHL_GPR8_IMMb_C0r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*             SHL_GPR8_ONE_D0r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             SHL_GPR8_ONE_D0r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SHL_GPRv_CL_D3r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SHL_GPRv_CL_D3r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SHL_GPRv_IMMb_C1r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*            SHL_GPRv_IMMb_C1r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*             SHL_GPRv_ONE_D1r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             SHL_GPRv_ONE_D1r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SHL_MEMb_CL_D2r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SHL_MEMb_CL_D2r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SHL_MEMb_IMMb_C0r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*            SHL_MEMb_IMMb_C0r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*             SHL_MEMb_ONE_D0r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             SHL_MEMb_ONE_D0r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SHL_MEMv_CL_D3r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SHL_MEMv_CL_D3r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SHL_MEMv_IMMb_C1r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*            SHL_MEMv_IMMb_C1r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*             SHL_MEMv_ONE_D1r4 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             SHL_MEMv_ONE_D1r6 */ {  (xed_uint16_t)            XED_ICLASS_SHL, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             SHLD_GPRv_GPRv_CL */ {  (xed_uint16_t)           XED_ICLASS_SHLD, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*           SHLD_GPRv_GPRv_IMMb */ {  (xed_uint16_t)           XED_ICLASS_SHLD, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*             SHLD_MEMv_GPRv_CL */ {  (xed_uint16_t)           XED_ICLASS_SHLD, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*           SHLD_MEMv_GPRv_IMMb */ {  (xed_uint16_t)           XED_ICLASS_SHLD, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*     SHLX_VGPR32d_MEMd_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_SHLX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  SHLX_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_SHLX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     SHLX_VGPR64q_MEMq_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_SHLX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  SHLX_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_SHLX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*                   SHR_GPR8_CL */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SHR_GPR8_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  SHR_GPR8_ONE */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   SHR_GPRv_CL */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SHR_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  SHR_GPRv_ONE */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   SHR_MEMb_CL */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SHR_MEMb_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  SHR_MEMb_ONE */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   SHR_MEMv_CL */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SHR_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I186, (xed_uint16_t)   0 },
/*                  SHR_MEMv_ONE */ {  (xed_uint16_t)            XED_ICLASS_SHR, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             SHRD_GPRv_GPRv_CL */ {  (xed_uint16_t)           XED_ICLASS_SHRD, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*           SHRD_GPRv_GPRv_IMMb */ {  (xed_uint16_t)           XED_ICLASS_SHRD, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*             SHRD_MEMv_GPRv_CL */ {  (xed_uint16_t)           XED_ICLASS_SHRD, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*           SHRD_MEMv_GPRv_IMMb */ {  (xed_uint16_t)           XED_ICLASS_SHRD, (xed_uint8_t)     XED_CATEGORY_SHIFT, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*     SHRX_VGPR32d_MEMd_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_SHRX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  SHRX_VGPR32d_VGPR32d_VGPR32d */ {  (xed_uint16_t)           XED_ICLASS_SHRX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*     SHRX_VGPR64q_MEMq_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_SHRX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*  SHRX_VGPR64q_VGPR64q_VGPR64q */ {  (xed_uint16_t)           XED_ICLASS_SHRX, (xed_uint8_t)      XED_CATEGORY_BMI2, (xed_uint8_t)  XED_EXTENSION_BMI2, (xed_uint16_t)         XED_ISA_SET_BMI2, (xed_uint16_t)   0 },
/*       SHUFPD_XMMpd_MEMpd_IMMb */ {  (xed_uint16_t)         XED_ICLASS_SHUFPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       SHUFPD_XMMpd_XMMpd_IMMb */ {  (xed_uint16_t)         XED_ICLASS_SHUFPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*       SHUFPS_XMMps_MEMps_IMMb */ {  (xed_uint16_t)         XED_ICLASS_SHUFPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*       SHUFPS_XMMps_XMMps_IMMb */ {  (xed_uint16_t)         XED_ICLASS_SHUFPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                     SIDT_MEMs */ {  (xed_uint16_t)           XED_ICLASS_SIDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                   SIDT_MEMs64 */ {  (xed_uint16_t)           XED_ICLASS_SIDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                    SKINIT_EAX */ {  (xed_uint16_t)         XED_ICLASS_SKINIT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SVM, (xed_uint16_t)          XED_ISA_SET_SVM, (xed_uint16_t)   0 },
/*                     SLDT_GPRv */ {  (xed_uint16_t)           XED_ICLASS_SLDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                     SLDT_MEMw */ {  (xed_uint16_t)           XED_ICLASS_SLDT, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                 SLWPCB_VGPRyy */ {  (xed_uint16_t)         XED_ICLASS_SLWPCB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_LWP, (xed_uint16_t)   0 },
/*                     SMSW_GPRv */ {  (xed_uint16_t)           XED_ICLASS_SMSW, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*                     SMSW_MEMw */ {  (xed_uint16_t)           XED_ICLASS_SMSW, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I286REAL, (xed_uint16_t)   0 },
/*            SQRTPD_XMMpd_MEMpd */ {  (xed_uint16_t)         XED_ICLASS_SQRTPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            SQRTPD_XMMpd_XMMpd */ {  (xed_uint16_t)         XED_ICLASS_SQRTPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            SQRTPS_XMMps_MEMps */ {  (xed_uint16_t)         XED_ICLASS_SQRTPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            SQRTPS_XMMps_XMMps */ {  (xed_uint16_t)         XED_ICLASS_SQRTPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            SQRTSD_XMMsd_MEMsd */ {  (xed_uint16_t)         XED_ICLASS_SQRTSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            SQRTSD_XMMsd_XMMsd */ {  (xed_uint16_t)         XED_ICLASS_SQRTSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*            SQRTSS_XMMss_MEMss */ {  (xed_uint16_t)         XED_ICLASS_SQRTSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            SQRTSS_XMMss_XMMss */ {  (xed_uint16_t)         XED_ICLASS_SQRTSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                          STAC */ {  (xed_uint16_t)           XED_ICLASS_STAC, (xed_uint8_t)      XED_CATEGORY_SMAP, (xed_uint8_t)  XED_EXTENSION_SMAP, (xed_uint16_t)         XED_ISA_SET_SMAP, (xed_uint16_t)   0 },
/*                           STC */ {  (xed_uint16_t)            XED_ICLASS_STC, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                           STD */ {  (xed_uint16_t)            XED_ICLASS_STD, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                          STGI */ {  (xed_uint16_t)           XED_ICLASS_STGI, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SVM, (xed_uint16_t)          XED_ISA_SET_SVM, (xed_uint16_t)   0 },
/*                           STI */ {  (xed_uint16_t)            XED_ICLASS_STI, (xed_uint8_t)    XED_CATEGORY_FLAGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                  STMXCSR_MEMd */ {  (xed_uint16_t)        XED_ICLASS_STMXCSR, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)     XED_ISA_SET_SSEMXCSR, (xed_uint16_t)   0 },
/*                         STOSB */ {  (xed_uint16_t)          XED_ICLASS_STOSB, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                         STOSD */ {  (xed_uint16_t)          XED_ICLASS_STOSD, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_I386, (xed_uint16_t)   0 },
/*                         STOSQ */ {  (xed_uint16_t)          XED_ICLASS_STOSQ, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                         STOSW */ {  (xed_uint16_t)          XED_ICLASS_STOSW, (xed_uint8_t)  XED_CATEGORY_STRINGOP, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                      STR_GPRv */ {  (xed_uint16_t)            XED_ICLASS_STR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                      STR_MEMw */ {  (xed_uint16_t)            XED_ICLASS_STR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                 STTILECFG_MEM */ {  (xed_uint16_t)      XED_ICLASS_STTILECFG, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_TILE, (xed_uint16_t)     XED_ISA_SET_AMX_TILE, (xed_uint16_t)   0 },
/*                          STUI */ {  (xed_uint16_t)           XED_ICLASS_STUI, (xed_uint8_t)     XED_CATEGORY_UINTR, (xed_uint8_t) XED_EXTENSION_UINTR, (xed_uint16_t)        XED_ISA_SET_UINTR, (xed_uint16_t)   0 },
/*                   SUB_AL_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SUB_GPR8_GPR8_28 */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SUB_GPR8_GPR8_2A */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SUB_GPR8_IMMb_80r5 */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SUB_GPR8_IMMb_82r5 */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_GPR8_MEMb */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SUB_GPRv_GPRv_29 */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              SUB_GPRv_GPRv_2B */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_GPRv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_MEMb_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SUB_MEMb_IMMb_80r5 */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            SUB_MEMb_IMMb_82r5 */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_MEMv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 SUB_OrAX_IMMz */ {  (xed_uint16_t)            XED_ICLASS_SUB, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*             SUBPD_XMMpd_MEMpd */ {  (xed_uint16_t)          XED_ICLASS_SUBPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             SUBPD_XMMpd_XMMpd */ {  (xed_uint16_t)          XED_ICLASS_SUBPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             SUBPS_XMMps_MEMps */ {  (xed_uint16_t)          XED_ICLASS_SUBPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             SUBPS_XMMps_XMMps */ {  (xed_uint16_t)          XED_ICLASS_SUBPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             SUBSD_XMMsd_MEMsd */ {  (xed_uint16_t)          XED_ICLASS_SUBSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             SUBSD_XMMsd_XMMsd */ {  (xed_uint16_t)          XED_ICLASS_SUBSD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*             SUBSS_XMMss_MEMss */ {  (xed_uint16_t)          XED_ICLASS_SUBSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*             SUBSS_XMMss_XMMss */ {  (xed_uint16_t)          XED_ICLASS_SUBSS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            SUB_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)       XED_ICLASS_SUB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  12 },
/*       SUB_LOCK_MEMb_IMMb_80r5 */ {  (xed_uint16_t)       XED_ICLASS_SUB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  12 },
/*       SUB_LOCK_MEMb_IMMb_82r5 */ {  (xed_uint16_t)       XED_ICLASS_SUB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  12 },
/*            SUB_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_SUB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  12 },
/*            SUB_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_SUB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  12 },
/*            SUB_LOCK_MEMv_IMMz */ {  (xed_uint16_t)       XED_ICLASS_SUB_LOCK, (xed_uint8_t)    XED_CATEGORY_BINARY, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  12 },
/*                        SWAPGS */ {  (xed_uint16_t)         XED_ICLASS_SWAPGS, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                       SYSCALL */ {  (xed_uint16_t)        XED_ICLASS_SYSCALL, (xed_uint8_t)   XED_CATEGORY_SYSCALL, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                   SYSCALL_AMD */ {  (xed_uint16_t)    XED_ICLASS_SYSCALL_AMD, (xed_uint8_t)   XED_CATEGORY_SYSCALL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_AMD, (xed_uint16_t) 130 },
/*                      SYSENTER */ {  (xed_uint16_t)       XED_ICLASS_SYSENTER, (xed_uint8_t)   XED_CATEGORY_SYSCALL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*                       SYSEXIT */ {  (xed_uint16_t)        XED_ICLASS_SYSEXIT, (xed_uint8_t)    XED_CATEGORY_SYSRET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*                        SYSRET */ {  (xed_uint16_t)         XED_ICLASS_SYSRET, (xed_uint8_t)    XED_CATEGORY_SYSRET, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)   0 },
/*                      SYSRET64 */ {  (xed_uint16_t)       XED_ICLASS_SYSRET64, (xed_uint8_t)    XED_CATEGORY_SYSRET, (xed_uint8_t)XED_EXTENSION_LONGMODE, (xed_uint16_t)     XED_ISA_SET_LONGMODE, (xed_uint16_t)  96 },
/*                    SYSRET_AMD */ {  (xed_uint16_t)     XED_ICLASS_SYSRET_AMD, (xed_uint8_t)    XED_CATEGORY_SYSRET, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_AMD, (xed_uint16_t)  96 },
/*           T1MSKC_VGPR32d_MEMd */ {  (xed_uint16_t)         XED_ICLASS_T1MSKC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*        T1MSKC_VGPR32d_VGPR32d */ {  (xed_uint16_t)         XED_ICLASS_T1MSKC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*            T1MSKC_VGPRyy_MEMy */ {  (xed_uint16_t)         XED_ICLASS_T1MSKC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*          T1MSKC_VGPRyy_VGPRyy */ {  (xed_uint16_t)         XED_ICLASS_T1MSKC, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*                        TDCALL */ {  (xed_uint16_t)         XED_ICLASS_TDCALL, (xed_uint8_t)    XED_CATEGORY_LEGACY, (xed_uint8_t)   XED_EXTENSION_TDX, (xed_uint16_t)          XED_ISA_SET_TDX, (xed_uint16_t)   0 },
/* TDPBF16PS_TMMf32_TMMu32_TMMu32 */ {  (xed_uint16_t)      XED_ICLASS_TDPBF16PS, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_BF16, (xed_uint16_t)     XED_ISA_SET_AMX_BF16, (xed_uint16_t)   0 },
/*  TDPBSSD_TMMi32_TMMu32_TMMu32 */ {  (xed_uint16_t)        XED_ICLASS_TDPBSSD, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_INT8, (xed_uint16_t)     XED_ISA_SET_AMX_INT8, (xed_uint16_t)   0 },
/*  TDPBSUD_TMMi32_TMMu32_TMMu32 */ {  (xed_uint16_t)        XED_ICLASS_TDPBSUD, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_INT8, (xed_uint16_t)     XED_ISA_SET_AMX_INT8, (xed_uint16_t)   0 },
/*  TDPBUSD_TMMi32_TMMu32_TMMu32 */ {  (xed_uint16_t)        XED_ICLASS_TDPBUSD, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_INT8, (xed_uint16_t)     XED_ISA_SET_AMX_INT8, (xed_uint16_t)   0 },
/*  TDPBUUD_TMMu32_TMMu32_TMMu32 */ {  (xed_uint16_t)        XED_ICLASS_TDPBUUD, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_INT8, (xed_uint16_t)     XED_ISA_SET_AMX_INT8, (xed_uint16_t)   0 },
/*                  TEST_AL_IMMb */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                TEST_GPR8_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           TEST_GPR8_IMMb_F6r0 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           TEST_GPR8_IMMb_F6r1 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                TEST_GPRv_GPRv */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           TEST_GPRv_IMMz_F7r0 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           TEST_GPRv_IMMz_F7r1 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                TEST_MEMb_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           TEST_MEMb_IMMb_F6r0 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           TEST_MEMb_IMMb_F6r1 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                TEST_MEMv_GPRv */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           TEST_MEMv_IMMz_F7r0 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           TEST_MEMv_IMMz_F7r1 */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                TEST_OrAX_IMMz */ {  (xed_uint16_t)           XED_ICLASS_TEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                        TESTUI */ {  (xed_uint16_t)         XED_ICLASS_TESTUI, (xed_uint8_t)     XED_CATEGORY_UINTR, (xed_uint8_t) XED_EXTENSION_UINTR, (xed_uint16_t)        XED_ISA_SET_UINTR, (xed_uint16_t)   0 },
/*       TILELOADD_TMMu32_MEMu32 */ {  (xed_uint16_t)      XED_ICLASS_TILELOADD, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_TILE, (xed_uint16_t)     XED_ISA_SET_AMX_TILE, (xed_uint16_t)   0 },
/*     TILELOADDT1_TMMu32_MEMu32 */ {  (xed_uint16_t)    XED_ICLASS_TILELOADDT1, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_TILE, (xed_uint16_t)     XED_ISA_SET_AMX_TILE, (xed_uint16_t)   0 },
/*                   TILERELEASE */ {  (xed_uint16_t)    XED_ICLASS_TILERELEASE, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_TILE, (xed_uint16_t)     XED_ISA_SET_AMX_TILE, (xed_uint16_t)   0 },
/*      TILESTORED_MEMu32_TMMu32 */ {  (xed_uint16_t)     XED_ICLASS_TILESTORED, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_TILE, (xed_uint16_t)     XED_ISA_SET_AMX_TILE, (xed_uint16_t)   0 },
/*               TILEZERO_TMMu32 */ {  (xed_uint16_t)       XED_ICLASS_TILEZERO, (xed_uint8_t)  XED_CATEGORY_AMX_TILE, (xed_uint8_t)XED_EXTENSION_AMX_TILE, (xed_uint16_t)     XED_ISA_SET_AMX_TILE, (xed_uint16_t)   0 },
/*                       TLBSYNC */ {  (xed_uint16_t)        XED_ICLASS_TLBSYNC, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)XED_EXTENSION_AMD_INVLPGB, (xed_uint16_t)  XED_ISA_SET_AMD_INVLPGB, (xed_uint16_t)   0 },
/*               TPAUSE_GPR32u32 */ {  (xed_uint16_t)         XED_ICLASS_TPAUSE, (xed_uint8_t)   XED_CATEGORY_WAITPKG, (xed_uint8_t)XED_EXTENSION_WAITPKG, (xed_uint16_t)      XED_ISA_SET_WAITPKG, (xed_uint16_t)   0 },
/*               TZCNT_GPRv_GPRv */ {  (xed_uint16_t)          XED_ICLASS_TZCNT, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*               TZCNT_GPRv_MEMv */ {  (xed_uint16_t)          XED_ICLASS_TZCNT, (xed_uint8_t)      XED_CATEGORY_BMI1, (xed_uint8_t)  XED_EXTENSION_BMI1, (xed_uint16_t)         XED_ISA_SET_BMI1, (xed_uint16_t)   0 },
/*            TZMSK_VGPR32d_MEMd */ {  (xed_uint16_t)          XED_ICLASS_TZMSK, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*         TZMSK_VGPR32d_VGPR32d */ {  (xed_uint16_t)          XED_ICLASS_TZMSK, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*             TZMSK_VGPRyy_MEMy */ {  (xed_uint16_t)          XED_ICLASS_TZMSK, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*           TZMSK_VGPRyy_VGPRyy */ {  (xed_uint16_t)          XED_ICLASS_TZMSK, (xed_uint8_t)       XED_CATEGORY_TBM, (xed_uint8_t)   XED_EXTENSION_TBM, (xed_uint16_t)          XED_ISA_SET_TBM, (xed_uint16_t)   0 },
/*           UCOMISD_XMMsd_MEMsd */ {  (xed_uint16_t)        XED_ICLASS_UCOMISD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           UCOMISD_XMMsd_XMMsd */ {  (xed_uint16_t)        XED_ICLASS_UCOMISD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           UCOMISS_XMMss_MEMss */ {  (xed_uint16_t)        XED_ICLASS_UCOMISS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           UCOMISS_XMMss_XMMss */ {  (xed_uint16_t)        XED_ICLASS_UCOMISS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*                           UD0 */ {  (xed_uint16_t)            XED_ICLASS_UD0, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_PPRO_UD0_SHORT, (xed_uint16_t)   0 },
/*               UD0_GPR32_GPR32 */ {  (xed_uint16_t)            XED_ICLASS_UD0, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_PPRO_UD0_LONG, (xed_uint16_t)   0 },
/*                UD0_GPR32_MEMd */ {  (xed_uint16_t)            XED_ICLASS_UD0, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_PPRO_UD0_LONG, (xed_uint16_t)   0 },
/*               UD1_GPR32_GPR32 */ {  (xed_uint16_t)            XED_ICLASS_UD1, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*                UD1_GPR32_MEMd */ {  (xed_uint16_t)            XED_ICLASS_UD1, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*                           UD2 */ {  (xed_uint16_t)            XED_ICLASS_UD2, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)         XED_ISA_SET_PPRO, (xed_uint16_t)   0 },
/*                         UIRET */ {  (xed_uint16_t)          XED_ICLASS_UIRET, (xed_uint8_t)     XED_CATEGORY_UINTR, (xed_uint8_t) XED_EXTENSION_UINTR, (xed_uint16_t)        XED_ISA_SET_UINTR, (xed_uint16_t)   0 },
/*                 UMONITOR_GPRa */ {  (xed_uint16_t)       XED_ICLASS_UMONITOR, (xed_uint8_t)   XED_CATEGORY_WAITPKG, (xed_uint8_t)XED_EXTENSION_WAITPKG, (xed_uint16_t)      XED_ISA_SET_WAITPKG, (xed_uint16_t)   0 },
/*                  UMWAIT_GPR32 */ {  (xed_uint16_t)         XED_ICLASS_UMWAIT, (xed_uint8_t)   XED_CATEGORY_WAITPKG, (xed_uint8_t)XED_EXTENSION_WAITPKG, (xed_uint16_t)      XED_ISA_SET_WAITPKG, (xed_uint16_t)   0 },
/*          UNPCKHPD_XMMpd_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_UNPCKHPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           UNPCKHPD_XMMpd_XMMq */ {  (xed_uint16_t)       XED_ICLASS_UNPCKHPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          UNPCKHPS_XMMps_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_UNPCKHPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*          UNPCKHPS_XMMps_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_UNPCKHPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*          UNPCKLPD_XMMpd_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_UNPCKLPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           UNPCKLPD_XMMpd_XMMq */ {  (xed_uint16_t)       XED_ICLASS_UNPCKLPD, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*          UNPCKLPS_XMMps_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_UNPCKLPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           UNPCKLPS_XMMps_XMMq */ {  (xed_uint16_t)       XED_ICLASS_UNPCKLPS, (xed_uint8_t)       XED_CATEGORY_SSE, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/* V4FMADDPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_V4FMADDPS, (xed_uint8_t) XED_CATEGORY_AVX512_4FMAPS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_4FMAPS_512, (xed_uint16_t)   0 },
/* V4FMADDSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_V4FMADDSS, (xed_uint8_t) XED_CATEGORY_AVX512_4FMAPS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_4FMAPS_SCALAR, (xed_uint16_t)   0 },
/* V4FNMADDPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_V4FNMADDPS, (xed_uint8_t) XED_CATEGORY_AVX512_4FMAPS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_4FMAPS_512, (xed_uint16_t)   0 },
/* V4FNMADDSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_V4FNMADDSS, (xed_uint8_t) XED_CATEGORY_AVX512_4FMAPS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_4FMAPS_SCALAR, (xed_uint16_t)   0 },
/*      VADDPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VADDPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VADDPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VADDPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VADDPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VADDPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VADDPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VADDPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VADDPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VADDPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VADDPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VADDPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VADDPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VADDPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VADDPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VADDPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*      VADDPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VADDPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VADDPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VADDPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VADDPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VADDPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VADDPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VADDPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VADDPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VADDPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VADDSD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_VADDSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VADDSD_XMMdq_XMMdq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VADDSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VADDSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VADDSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VADDSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VADDSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*       VADDSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)         XED_ICLASS_VADDSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VADDSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)         XED_ICLASS_VADDSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VADDSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VADDSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VADDSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*   VADDSUBPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VADDSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VADDSUBPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VADDSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VADDSUBPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VADDSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VADDSUBPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VADDSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VADDSUBPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VADDSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VADDSUBPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VADDSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VADDSUBPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VADDSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VADDSUBPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VADDSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VAESDEC_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/*     VAESDEC_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VAESDEC_XMMu128_XMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_128, (xed_uint16_t)   0 },
/* VAESDEC_XMMu128_XMMu128_XMMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_128, (xed_uint16_t)   0 },
/* VAESDEC_YMMu128_YMMu128_MEMu128 */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)  XED_EXTENSION_VAES, (xed_uint16_t)         XED_ISA_SET_VAES, (xed_uint16_t)   0 },
/* VAESDEC_YMMu128_YMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_256, (xed_uint16_t)   0 },
/* VAESDEC_YMMu128_YMMu128_YMMu128 */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)  XED_EXTENSION_VAES, (xed_uint16_t)         XED_ISA_SET_VAES, (xed_uint16_t)   0 },
/* VAESDEC_YMMu128_YMMu128_YMMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_256, (xed_uint16_t)   0 },
/* VAESDEC_ZMMu128_ZMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_512, (xed_uint16_t)   0 },
/* VAESDEC_ZMMu128_ZMMu128_ZMMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESDEC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_512, (xed_uint16_t)   0 },
/* VAESDECLAST_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VAESDECLAST_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VAESDECLAST_XMMu128_XMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_128, (xed_uint16_t)   0 },
/* VAESDECLAST_XMMu128_XMMu128_XMMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_128, (xed_uint16_t)   0 },
/* VAESDECLAST_YMMu128_YMMu128_MEMu128 */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)  XED_EXTENSION_VAES, (xed_uint16_t)         XED_ISA_SET_VAES, (xed_uint16_t)   0 },
/* VAESDECLAST_YMMu128_YMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_256, (xed_uint16_t)   0 },
/* VAESDECLAST_YMMu128_YMMu128_YMMu128 */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)  XED_EXTENSION_VAES, (xed_uint16_t)         XED_ISA_SET_VAES, (xed_uint16_t)   0 },
/* VAESDECLAST_YMMu128_YMMu128_YMMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_256, (xed_uint16_t)   0 },
/* VAESDECLAST_ZMMu128_ZMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_512, (xed_uint16_t)   0 },
/* VAESDECLAST_ZMMu128_ZMMu128_ZMMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESDECLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_512, (xed_uint16_t)   0 },
/*     VAESENC_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/*     VAESENC_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VAESENC_XMMu128_XMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_128, (xed_uint16_t)   0 },
/* VAESENC_XMMu128_XMMu128_XMMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_128, (xed_uint16_t)   0 },
/* VAESENC_YMMu128_YMMu128_MEMu128 */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)  XED_EXTENSION_VAES, (xed_uint16_t)         XED_ISA_SET_VAES, (xed_uint16_t)   0 },
/* VAESENC_YMMu128_YMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_256, (xed_uint16_t)   0 },
/* VAESENC_YMMu128_YMMu128_YMMu128 */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)  XED_EXTENSION_VAES, (xed_uint16_t)         XED_ISA_SET_VAES, (xed_uint16_t)   0 },
/* VAESENC_YMMu128_YMMu128_YMMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_256, (xed_uint16_t)   0 },
/* VAESENC_ZMMu128_ZMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_512, (xed_uint16_t)   0 },
/* VAESENC_ZMMu128_ZMMu128_ZMMu128_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VAESENC, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_512, (xed_uint16_t)   0 },
/* VAESENCLAST_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VAESENCLAST_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VAESENCLAST_XMMu128_XMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_128, (xed_uint16_t)   0 },
/* VAESENCLAST_XMMu128_XMMu128_XMMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_128, (xed_uint16_t)   0 },
/* VAESENCLAST_YMMu128_YMMu128_MEMu128 */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)  XED_EXTENSION_VAES, (xed_uint16_t)         XED_ISA_SET_VAES, (xed_uint16_t)   0 },
/* VAESENCLAST_YMMu128_YMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_256, (xed_uint16_t)   0 },
/* VAESENCLAST_YMMu128_YMMu128_YMMu128 */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)  XED_EXTENSION_VAES, (xed_uint16_t)         XED_ISA_SET_VAES, (xed_uint16_t)   0 },
/* VAESENCLAST_YMMu128_YMMu128_YMMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_256, (xed_uint16_t)   0 },
/* VAESENCLAST_ZMMu128_ZMMu128_MEMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_512, (xed_uint16_t)   0 },
/* VAESENCLAST_ZMMu128_ZMMu128_ZMMu128_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VAESENCLAST, (xed_uint8_t)      XED_CATEGORY_VAES, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VAES_512, (xed_uint16_t)   0 },
/*           VAESIMC_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VAESIMC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/*           VAESIMC_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VAESIMC, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VAESKEYGENASSIST_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t) XED_ICLASS_VAESKEYGENASSIST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VAESKEYGENASSIST_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t) XED_ICLASS_VAESKEYGENASSIST, (xed_uint8_t)       XED_CATEGORY_AES, (xed_uint8_t)XED_EXTENSION_AVXAES, (xed_uint16_t)       XED_ISA_SET_AVXAES, (xed_uint16_t)   0 },
/* VALIGND_XMMu32_MASKmskw_XMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGND, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VALIGND_XMMu32_MASKmskw_XMMu32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGND, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VALIGND_YMMu32_MASKmskw_YMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGND, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VALIGND_YMMu32_MASKmskw_YMMu32_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGND, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VALIGND_ZMMu32_MASKmskw_ZMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGND, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VALIGND_ZMMu32_MASKmskw_ZMMu32_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGND, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VALIGNQ_XMMu64_MASKmskw_XMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGNQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VALIGNQ_XMMu64_MASKmskw_XMMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGNQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VALIGNQ_YMMu64_MASKmskw_YMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGNQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VALIGNQ_YMMu64_MASKmskw_YMMu64_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGNQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VALIGNQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGNQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VALIGNQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VALIGNQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VANDNPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VANDNPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VANDNPD_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VANDNPD_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/*     VANDNPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VANDNPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VANDNPD_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VANDNPD_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VANDNPD_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VANDNPD_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/*     VANDNPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VANDNPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VANDNPS_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VANDNPS_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/*     VANDNPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VANDNPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VANDNPS_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VANDNPS_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VANDNPS_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VANDNPS_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VANDNPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/*      VANDPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VANDPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VANDPD_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VANDPD_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/*      VANDPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VANDPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VANDPD_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VANDPD_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VANDPD_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VANDPD_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/*      VANDPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VANDPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VANDPS_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VANDPS_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/*      VANDPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VANDPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VANDPS_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VANDPS_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VANDPS_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VANDPS_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VANDPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBLENDMPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VBLENDMPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VBLENDMPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VBLENDMPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VBLENDMPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBLENDMPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBLENDMPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPS, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VBLENDMPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPS, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VBLENDMPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPS, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VBLENDMPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPS, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VBLENDMPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPS, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBLENDMPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VBLENDMPS, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBLENDPD_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VBLENDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDPD_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VBLENDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDPD_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VBLENDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDPD_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VBLENDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDPS_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VBLENDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDPS_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VBLENDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDPS_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VBLENDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDPS_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VBLENDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDVPD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VBLENDVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDVPD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VBLENDVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDVPD_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VBLENDVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDVPD_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VBLENDVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDVPS_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VBLENDVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDVPS_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VBLENDVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDVPS_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VBLENDVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBLENDVPS_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VBLENDVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VBROADCASTF128_YMMqq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF128, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VBROADCASTF32X2_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VBROADCASTF32X2_YMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VBROADCASTF32X2_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBROADCASTF32X2_ZMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBROADCASTF32X4_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF32X4, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VBROADCASTF32X4_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF32X4, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBROADCASTF32X8_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF32X8, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBROADCASTF64X2_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF64X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VBROADCASTF64X2_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF64X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBROADCASTF64X4_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTF64X4, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*    VBROADCASTI128_YMMqq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI128, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VBROADCASTI32X2_XMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VBROADCASTI32X2_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VBROADCASTI32X2_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VBROADCASTI32X2_YMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VBROADCASTI32X2_ZMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBROADCASTI32X2_ZMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBROADCASTI32X4_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X4, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VBROADCASTI32X4_ZMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X4, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBROADCASTI32X8_ZMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI32X8, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBROADCASTI64X2_YMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI64X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VBROADCASTI64X2_ZMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI64X2, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VBROADCASTI64X4_ZMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VBROADCASTI64X4, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBROADCASTSD_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VBROADCASTSD_YMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*       VBROADCASTSD_YMMqq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VBROADCASTSD_YMMqq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VBROADCASTSD_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBROADCASTSD_ZMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VBROADCASTSS_XMMdq_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VBROADCASTSS_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VBROADCASTSS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VBROADCASTSS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VBROADCASTSS_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VBROADCASTSS_YMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*       VBROADCASTSS_YMMqq_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VBROADCASTSS_YMMqq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VBROADCASTSS_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VBROADCASTSS_ZMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VBROADCASTSS, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCMPPD_MASKmskw_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCMPPD_MASKmskw_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCMPPD_MASKmskw_MASKmskw_YMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCMPPD_MASKmskw_MASKmskw_YMMf64_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCMPPD_MASKmskw_MASKmskw_ZMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCMPPD_MASKmskw_MASKmskw_ZMMf64_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCMPPD_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPPD_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPPD_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPPD_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPPH_MASKmskw_MASKmskw_XMMf16_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCMPPH_MASKmskw_MASKmskw_XMMf16_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCMPPH_MASKmskw_MASKmskw_YMMf16_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCMPPH_MASKmskw_MASKmskw_YMMf16_YMMf16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCMPPH_MASKmskw_MASKmskw_ZMMf16_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCMPPH_MASKmskw_MASKmskw_ZMMf16_ZMMf16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCMPPS_MASKmskw_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCMPPS_MASKmskw_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCMPPS_MASKmskw_MASKmskw_YMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCMPPS_MASKmskw_MASKmskw_YMMf32_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCMPPS_MASKmskw_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCMPPS_MASKmskw_MASKmskw_ZMMf32_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCMPPS_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPPS_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPPS_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPPS_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPSD_MASKmskw_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCMPSD_MASKmskw_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*  VCMPSD_XMMdq_XMMdq_MEMq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VCMPSD_XMMdq_XMMdq_XMMq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCMPSH_MASKmskw_MASKmskw_XMMf16_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCMPSH_MASKmskw_MASKmskw_XMMf16_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCMPSS_MASKmskw_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCMPSS_MASKmskw_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VCMPSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*  VCMPSS_XMMdq_XMMdq_MEMd_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VCMPSS_XMMdq_XMMdq_XMMd_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VCMPSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VCOMISD_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VCOMISD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*  VCOMISD_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VCOMISD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*             VCOMISD_XMMq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VCOMISD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*             VCOMISD_XMMq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_VCOMISD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VCOMISH_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VCOMISH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VCOMISH_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VCOMISH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*             VCOMISS_XMMd_MEMd */ {  (xed_uint16_t)        XED_ICLASS_VCOMISS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*             VCOMISS_XMMd_XMMd */ {  (xed_uint16_t)        XED_ICLASS_VCOMISS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VCOMISS_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VCOMISS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*  VCOMISS_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VCOMISS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCOMPRESSPD_MEMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCOMPRESSPD_MEMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCOMPRESSPD_MEMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCOMPRESSPD_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCOMPRESSPD_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCOMPRESSPD_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCOMPRESSPS_MEMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPS, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCOMPRESSPS_MEMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPS, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCOMPRESSPS_MEMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPS, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCOMPRESSPS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPS, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCOMPRESSPS_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPS, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCOMPRESSPS_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCOMPRESSPS, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VCVTDQ2PD_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VCVTDQ2PD_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTDQ2PD_XMMf64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTDQ2PD_XMMf64_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTDQ2PD_YMMf64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTDQ2PD_YMMf64_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VCVTDQ2PD_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTDQ2PD_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTDQ2PD_ZMMf64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTDQ2PD_ZMMf64_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTDQ2PH_XMMf16_MASKmskw_MEMi32_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTDQ2PH_XMMf16_MASKmskw_MEMi32_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTDQ2PH_XMMf16_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTDQ2PH_XMMf16_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTDQ2PH_YMMf16_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTDQ2PH_YMMf16_MASKmskw_ZMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*         VCVTDQ2PS_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTDQ2PS_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTDQ2PS_XMMf32_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTDQ2PS_XMMf32_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTDQ2PS_YMMf32_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTDQ2PS_YMMf32_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VCVTDQ2PS_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTDQ2PS_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTDQ2PS_ZMMf32_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTDQ2PS_ZMMf32_MASKmskw_ZMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTNE2PS2BF16_XMMbf16_MASKmskw_XMMf32_MEMf32_AVX512_VL128 */ {  (xed_uint16_t) XED_ICLASS_VCVTNE2PS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_128, (xed_uint16_t)   0 },
/* VCVTNE2PS2BF16_XMMbf16_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VCVTNE2PS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_128, (xed_uint16_t)   0 },
/* VCVTNE2PS2BF16_YMMbf16_MASKmskw_YMMf32_MEMf32_AVX512_VL256 */ {  (xed_uint16_t) XED_ICLASS_VCVTNE2PS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_256, (xed_uint16_t)   0 },
/* VCVTNE2PS2BF16_YMMbf16_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VCVTNE2PS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_256, (xed_uint16_t)   0 },
/* VCVTNE2PS2BF16_ZMMbf16_MASKmskw_ZMMf32_MEMf32_AVX512_VL512 */ {  (xed_uint16_t) XED_ICLASS_VCVTNE2PS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_512, (xed_uint16_t)   0 },
/* VCVTNE2PS2BF16_ZMMbf16_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VCVTNE2PS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_512, (xed_uint16_t)   0 },
/* VCVTNEPS2BF16_XMMbf16_MASKmskw_MEMf32_AVX512_VL128 */ {  (xed_uint16_t)  XED_ICLASS_VCVTNEPS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_128, (xed_uint16_t)   0 },
/* VCVTNEPS2BF16_XMMbf16_MASKmskw_MEMf32_AVX512_VL256 */ {  (xed_uint16_t)  XED_ICLASS_VCVTNEPS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_256, (xed_uint16_t)   0 },
/* VCVTNEPS2BF16_XMMbf16_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VCVTNEPS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_128, (xed_uint16_t)   0 },
/* VCVTNEPS2BF16_XMMbf16_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VCVTNEPS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_256, (xed_uint16_t)   0 },
/* VCVTNEPS2BF16_YMMbf16_MASKmskw_MEMf32_AVX512_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VCVTNEPS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_512, (xed_uint16_t)   0 },
/* VCVTNEPS2BF16_YMMbf16_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VCVTNEPS2BF16, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_512, (xed_uint16_t)   0 },
/*         VCVTPD2DQ_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPD2DQ_XMMdq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPD2DQ_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPD2DQ_XMMdq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTPD2DQ_XMMi32_MASKmskw_MEMf64_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPD2DQ_XMMi32_MASKmskw_MEMf64_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPD2DQ_XMMi32_MASKmskw_XMMf64_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPD2DQ_XMMi32_MASKmskw_YMMf64_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPD2DQ_YMMi32_MASKmskw_MEMf64_AVX512_VL512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPD2DQ_YMMi32_MASKmskw_ZMMf64_AVX512_VL512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPD2PH_XMMf16_MASKmskw_MEMf64_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPD2PH_XMMf16_MASKmskw_MEMf64_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPD2PH_XMMf16_MASKmskw_MEMf64_AVX512_VL512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPD2PH_XMMf16_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPD2PH_XMMf16_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPD2PH_XMMf16_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*         VCVTPD2PS_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPD2PS_XMMdq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPD2PS_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPD2PS_XMMdq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTPD2PS_XMMf32_MASKmskw_MEMf64_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPD2PS_XMMf32_MASKmskw_MEMf64_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPD2PS_XMMf32_MASKmskw_XMMf64_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPD2PS_XMMf32_MASKmskw_YMMf64_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPD2PS_YMMf32_MASKmskw_MEMf64_AVX512_VL512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPD2PS_YMMf32_MASKmskw_ZMMf64_AVX512_VL512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPD2QQ_XMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTPD2QQ_XMMi64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTPD2QQ_YMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTPD2QQ_YMMi64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTPD2QQ_ZMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTPD2QQ_ZMMi64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTPD2UDQ_XMMu32_MASKmskw_MEMf64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPD2UDQ_XMMu32_MASKmskw_MEMf64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPD2UDQ_XMMu32_MASKmskw_XMMf64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPD2UDQ_XMMu32_MASKmskw_YMMf64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPD2UDQ_YMMu32_MASKmskw_MEMf64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPD2UDQ_YMMu32_MASKmskw_ZMMf64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPD2UQQ_XMMu64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTPD2UQQ_XMMu64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTPD2UQQ_YMMu64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTPD2UQQ_YMMu64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTPD2UQQ_ZMMu64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTPD2UQQ_ZMMu64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTPH2DQ_XMMi32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2DQ_XMMi32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2DQ_YMMi32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2DQ_YMMi32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2DQ_ZMMi32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2DQ_ZMMi32_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2PD_XMMf64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2PD_XMMf64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2PD_YMMf64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2PD_YMMf64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2PD_ZMMf64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2PD_ZMMf64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*          VCVTPH2PS_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_F16C, (xed_uint16_t)         XED_ISA_SET_F16C, (xed_uint16_t)   0 },
/*          VCVTPH2PS_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_F16C, (xed_uint16_t)         XED_ISA_SET_F16C, (xed_uint16_t)   0 },
/* VCVTPH2PS_XMMf32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPH2PS_XMMf32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPH2PS_YMMf32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPH2PS_YMMf32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VCVTPH2PS_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_F16C, (xed_uint16_t)         XED_ISA_SET_F16C, (xed_uint16_t)   0 },
/*         VCVTPH2PS_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_F16C, (xed_uint16_t)         XED_ISA_SET_F16C, (xed_uint16_t)   0 },
/* VCVTPH2PS_ZMMf32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPH2PS_ZMMf32_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPH2PSX_XMMf32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2PSX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2PSX_XMMf32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2PSX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2PSX_YMMf32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2PSX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2PSX_YMMf32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2PSX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2PSX_ZMMf32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2PSX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2PSX_ZMMf32_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2PSX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2QQ_XMMi64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2QQ_XMMi64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2QQ_YMMi64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2QQ_YMMi64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2QQ_ZMMi64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2QQ_ZMMi64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2UDQ_XMMu32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2UDQ_XMMu32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2UDQ_YMMu32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2UDQ_YMMu32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2UDQ_ZMMu32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2UDQ_ZMMu32_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2UQQ_XMMu64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2UQQ_XMMu64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2UQQ_YMMu64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2UQQ_YMMu64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2UQQ_ZMMu64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2UQQ_ZMMu64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2UW_XMMu16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2UW_XMMu16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2UW_YMMu16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2UW_YMMu16_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2UW_ZMMu16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2UW_ZMMu16_MASKmskw_ZMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2W_XMMi16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2W_XMMi16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPH2W_YMMi16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2W_YMMi16_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPH2W_ZMMi16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPH2W_ZMMi16_MASKmskw_ZMMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*         VCVTPS2DQ_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPS2DQ_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTPS2DQ_XMMi32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPS2DQ_XMMi32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPS2DQ_YMMi32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPS2DQ_YMMi32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VCVTPS2DQ_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPS2DQ_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTPS2DQ_ZMMi32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPS2DQ_ZMMi32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VCVTPS2PD_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VCVTPS2PD_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTPS2PD_XMMf64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPS2PD_XMMf64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPS2PD_YMMf64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPS2PD_YMMf64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VCVTPS2PD_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTPS2PD_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTPS2PD_ZMMf64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPS2PD_ZMMf64_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*    VCVTPS2PH_MEMdq_YMMqq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_F16C, (xed_uint16_t)         XED_ISA_SET_F16C, (xed_uint16_t)   0 },
/* VCVTPS2PH_MEMf16_MASKmskw_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPS2PH_MEMf16_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPS2PH_MEMf16_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VCVTPS2PH_MEMq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_F16C, (xed_uint16_t)         XED_ISA_SET_F16C, (xed_uint16_t)   0 },
/*    VCVTPS2PH_XMMdq_YMMqq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_F16C, (xed_uint16_t)         XED_ISA_SET_F16C, (xed_uint16_t)   0 },
/* VCVTPS2PH_XMMf16_MASKmskw_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPS2PH_XMMf16_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*     VCVTPS2PH_XMMq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)  XED_EXTENSION_F16C, (xed_uint16_t)         XED_ISA_SET_F16C, (xed_uint16_t)   0 },
/* VCVTPS2PH_YMMf16_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPS2PHX_XMMf16_MASKmskw_MEMf32_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2PHX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPS2PHX_XMMf16_MASKmskw_MEMf32_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2PHX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPS2PHX_XMMf16_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2PHX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTPS2PHX_XMMf16_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2PHX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTPS2PHX_YMMf16_MASKmskw_MEMf32_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2PHX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPS2PHX_YMMf16_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2PHX, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTPS2QQ_XMMi64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTPS2QQ_XMMi64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTPS2QQ_YMMi64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTPS2QQ_YMMi64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTPS2QQ_ZMMi64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTPS2QQ_ZMMi64_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTPS2UDQ_XMMu32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPS2UDQ_XMMu32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTPS2UDQ_YMMu32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPS2UDQ_YMMu32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTPS2UDQ_ZMMu32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPS2UDQ_ZMMu32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTPS2UQQ_XMMu64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTPS2UQQ_XMMu64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTPS2UQQ_YMMu64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTPS2UQQ_YMMu64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTPS2UQQ_ZMMu64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTPS2UQQ_ZMMu64_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTQQ2PD_XMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTQQ2PD_XMMi64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTQQ2PD_YMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTQQ2PD_YMMi64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTQQ2PD_ZMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTQQ2PD_ZMMi64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTQQ2PH_XMMf16_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTQQ2PH_XMMf16_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTQQ2PH_XMMf16_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTQQ2PS_XMMf32_MASKmskw_XMMu64_AVX512_VL128 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTQQ2PS_XMMf32_MASKmskw_YMMu64_AVX512_VL256 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTQQ2PS_YMMf32_MASKmskw_MEMu64_AVX512_VL512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTQQ2PS_YMMf32_MASKmskw_ZMMu64_AVX512_VL512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTSD2SH_XMMf16_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2SH_XMMf16_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*         VCVTSD2SI_GPR32d_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTSD2SI_GPR32d_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTSD2SI_GPR32i32_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2SI_GPR32i32_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2SI_GPR64i64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2SI_GPR64i64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*         VCVTSD2SI_GPR64q_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTSD2SI_GPR64q_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VCVTSD2SS_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VCVTSD2SS_XMMdq_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTSD2SS_XMMf32_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2SS_XMMf32_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSD2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2USI_GPR32u32_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSD2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2USI_GPR32u32_XMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSD2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2USI_GPR64u64_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSD2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSD2USI_GPR64u64_XMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSD2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2SD_XMMf64_MASKmskw_XMMf64_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSH2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2SD_XMMf64_MASKmskw_XMMf64_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSH2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2SI_GPR32i32_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSH2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2SI_GPR32i32_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSH2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2SI_GPR64i64_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSH2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2SI_GPR64i64_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSH2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2SS_XMMf32_MASKmskw_XMMf32_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSH2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2SS_XMMf32_MASKmskw_XMMf32_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSH2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2USI_GPR32u32_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSH2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2USI_GPR32u32_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSH2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2USI_GPR64u64_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSH2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSH2USI_GPR64u64_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSH2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VCVTSI2SD_XMMdq_XMMdq_GPR32d */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VCVTSI2SD_XMMdq_XMMdq_GPR64q */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VCVTSI2SD_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VCVTSI2SD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTSI2SD_XMMf64_XMMf64_GPR32i32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SD_XMMf64_XMMf64_GPR64i64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SD_XMMf64_XMMf64_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SD_XMMf64_XMMf64_MEMi64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SH_XMMf16_XMMf16_GPR32i32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SH_XMMf16_XMMf16_GPR64i64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SH_XMMf16_XMMf16_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SH_XMMf16_XMMf16_MEMi64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VCVTSI2SS_XMMdq_XMMdq_GPR32d */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VCVTSI2SS_XMMdq_XMMdq_GPR64q */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VCVTSI2SS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VCVTSI2SS_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTSI2SS_XMMf32_XMMf32_GPR32i32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SS_XMMf32_XMMf32_GPR64i64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SS_XMMf32_XMMf32_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSI2SS_XMMf32_XMMf32_MEMi64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*    VCVTSS2SD_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VCVTSS2SD_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTSS2SD_XMMf64_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2SD_XMMf64_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2SH_XMMf16_MASKmskw_XMMf16_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2SH_XMMf16_MASKmskw_XMMf16_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*         VCVTSS2SI_GPR32d_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTSS2SI_GPR32d_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTSS2SI_GPR32i32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2SI_GPR32i32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2SI_GPR64i64_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2SI_GPR64i64_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*         VCVTSS2SI_GPR64q_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VCVTSS2SI_GPR64q_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VCVTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTSS2USI_GPR32u32_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSS2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2USI_GPR32u32_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSS2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2USI_GPR64u64_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSS2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTSS2USI_GPR64u64_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTSS2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*        VCVTTPD2DQ_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTPD2DQ_XMMdq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTPD2DQ_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTPD2DQ_XMMdq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTTPD2DQ_XMMi32_MASKmskw_MEMf64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTTPD2DQ_XMMi32_MASKmskw_MEMf64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTTPD2DQ_XMMi32_MASKmskw_XMMf64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTTPD2DQ_XMMi32_MASKmskw_YMMf64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTTPD2DQ_YMMi32_MASKmskw_MEMf64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTTPD2DQ_YMMi32_MASKmskw_ZMMf64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTTPD2QQ_XMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTTPD2QQ_XMMi64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTTPD2QQ_YMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTTPD2QQ_YMMi64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTTPD2QQ_ZMMi64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTTPD2QQ_ZMMi64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPD2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTTPD2UDQ_XMMu32_MASKmskw_MEMf64_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTTPD2UDQ_XMMu32_MASKmskw_MEMf64_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTTPD2UDQ_XMMu32_MASKmskw_XMMf64_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTTPD2UDQ_XMMu32_MASKmskw_YMMf64_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTTPD2UDQ_YMMu32_MASKmskw_MEMf64_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTTPD2UDQ_YMMu32_MASKmskw_ZMMf64_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTTPD2UQQ_XMMu64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTTPD2UQQ_XMMu64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTTPD2UQQ_YMMu64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTTPD2UQQ_YMMu64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTTPD2UQQ_ZMMu64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTTPD2UQQ_ZMMu64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPD2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTTPH2DQ_XMMi32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2DQ_XMMi32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2DQ_YMMi32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2DQ_YMMi32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2DQ_ZMMi32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2DQ_ZMMi32_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2QQ_XMMi64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2QQ_XMMi64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2QQ_YMMi64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2QQ_YMMi64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2QQ_ZMMi64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2QQ_ZMMi64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2UDQ_XMMu32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2UDQ_XMMu32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2UDQ_YMMu32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2UDQ_YMMu32_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2UDQ_ZMMu32_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2UDQ_ZMMu32_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2UQQ_XMMu64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2UQQ_XMMu64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2UQQ_YMMu64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2UQQ_YMMu64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2UQQ_ZMMu64_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2UQQ_ZMMu64_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPH2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2UW_XMMu16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2UW_XMMu16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2UW_YMMu16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2UW_YMMu16_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2UW_ZMMu16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2UW_ZMMu16_MASKmskw_ZMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPH2UW, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2W_XMMi16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2W_XMMi16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTTPH2W_YMMi16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2W_YMMi16_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTTPH2W_ZMMi16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTTPH2W_ZMMi16_MASKmskw_ZMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTTPH2W, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*        VCVTTPS2DQ_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTPS2DQ_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTTPS2DQ_XMMi32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTTPS2DQ_XMMi32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTTPS2DQ_YMMi32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTTPS2DQ_YMMi32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*        VCVTTPS2DQ_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTPS2DQ_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTTPS2DQ_ZMMi32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTTPS2DQ_ZMMi32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2DQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTTPS2QQ_XMMi64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTTPS2QQ_XMMi64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTTPS2QQ_YMMi64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTTPS2QQ_YMMi64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTTPS2QQ_ZMMi64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTTPS2QQ_ZMMi64_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTPS2QQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTTPS2UDQ_XMMu32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTTPS2UDQ_XMMu32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTTPS2UDQ_YMMu32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTTPS2UDQ_YMMu32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTTPS2UDQ_ZMMu32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTTPS2UDQ_ZMMu32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UDQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTTPS2UQQ_XMMu64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTTPS2UQQ_XMMu64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTTPS2UQQ_YMMu64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTTPS2UQQ_YMMu64_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTTPS2UQQ_ZMMu64_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTTPS2UQQ_ZMMu64_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTPS2UQQ, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/*        VCVTTSD2SI_GPR32d_MEMq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTSD2SI_GPR32d_XMMq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTTSD2SI_GPR32i32_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSD2SI_GPR32i32_XMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSD2SI_GPR64i64_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSD2SI_GPR64i64_XMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*        VCVTTSD2SI_GPR64q_MEMq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTSD2SI_GPR64q_XMMq */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSD2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTTSD2USI_GPR32u32_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSD2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSD2USI_GPR32u32_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSD2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSD2USI_GPR64u64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSD2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSD2USI_GPR64u64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSD2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSH2SI_GPR32i32_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSH2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSH2SI_GPR32i32_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSH2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSH2SI_GPR64i64_MEMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSH2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSH2SI_GPR64i64_XMMf16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSH2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSH2USI_GPR32u32_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSH2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSH2USI_GPR32u32_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSH2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSH2USI_GPR64u64_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSH2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSH2USI_GPR64u64_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSH2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*        VCVTTSS2SI_GPR32d_MEMd */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTSS2SI_GPR32d_XMMd */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTTSS2SI_GPR32i32_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSS2SI_GPR32i32_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSS2SI_GPR64i64_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSS2SI_GPR64i64_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*        VCVTTSS2SI_GPR64q_MEMd */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VCVTTSS2SI_GPR64q_XMMd */ {  (xed_uint16_t)     XED_ICLASS_VCVTTSS2SI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VCVTTSS2USI_GPR32u32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSS2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSS2USI_GPR32u32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSS2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSS2USI_GPR64u64_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSS2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTTSS2USI_GPR64u64_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VCVTTSS2USI, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUDQ2PD_XMMf64_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTUDQ2PD_XMMf64_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTUDQ2PD_YMMf64_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTUDQ2PD_YMMf64_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTUDQ2PD_ZMMf64_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTUDQ2PD_ZMMf64_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTUDQ2PH_XMMf16_MASKmskw_MEMu32_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTUDQ2PH_XMMf16_MASKmskw_MEMu32_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTUDQ2PH_XMMf16_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTUDQ2PH_XMMf16_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTUDQ2PH_YMMf16_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTUDQ2PH_YMMf16_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTUDQ2PS_XMMf32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTUDQ2PS_XMMf32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VCVTUDQ2PS_YMMf32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTUDQ2PS_YMMf32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VCVTUDQ2PS_ZMMf32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTUDQ2PS_ZMMf32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUDQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VCVTUQQ2PD_XMMf64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTUQQ2PD_XMMf64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTUQQ2PD_YMMf64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTUQQ2PD_YMMf64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTUQQ2PD_ZMMf64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTUQQ2PD_ZMMf64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTUQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTUQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTUQQ2PH_XMMf16_MASKmskw_MEMu64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTUQQ2PH_XMMf16_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTUQQ2PH_XMMf16_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTUQQ2PH_XMMf16_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTUQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTUQQ2PS_XMMf32_MASKmskw_MEMu64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTUQQ2PS_XMMf32_MASKmskw_XMMu64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VCVTUQQ2PS_XMMf32_MASKmskw_YMMu64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VCVTUQQ2PS_YMMf32_MASKmskw_MEMu64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTUQQ2PS_YMMf32_MASKmskw_ZMMu64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUQQ2PS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VCVTUSI2SD_XMMf64_XMMf64_GPR32u32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SD_XMMf64_XMMf64_GPR64u64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SD_XMMf64_XMMf64_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SD_XMMf64_XMMf64_MEMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SD, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SH_XMMf16_XMMf16_GPR32u32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SH_XMMf16_XMMf16_GPR64u64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SH_XMMf16_XMMf16_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SH_XMMf16_XMMf16_MEMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SS_XMMf32_XMMf32_GPR32u32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SS_XMMf32_XMMf32_GPR64u64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SS_XMMf32_XMMf32_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUSI2SS_XMMf32_XMMf32_MEMu64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VCVTUSI2SS, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VCVTUW2PH_XMMf16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTUW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTUW2PH_XMMf16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTUW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTUW2PH_YMMf16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTUW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTUW2PH_YMMf16_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTUW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTUW2PH_ZMMf16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTUW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTUW2PH_ZMMf16_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VCVTUW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTW2PH_XMMf16_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTW2PH_XMMf16_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VCVTW2PH_YMMf16_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTW2PH_YMMf16_MASKmskw_YMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VCVTW2PH_ZMMf16_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VCVTW2PH_ZMMf16_MASKmskw_ZMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VCVTW2PH, (xed_uint8_t)   XED_CATEGORY_CONVERT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VDBPSADBW_XMMu16_MASKmskw_XMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDBPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VDBPSADBW_XMMu16_MASKmskw_XMMu8_XMMu8_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDBPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VDBPSADBW_YMMu16_MASKmskw_YMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDBPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VDBPSADBW_YMMu16_MASKmskw_YMMu8_YMMu8_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDBPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VDBPSADBW_ZMMu16_MASKmskw_ZMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDBPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VDBPSADBW_ZMMu16_MASKmskw_ZMMu8_ZMMu8_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDBPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*      VDIVPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VDIVPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VDIVPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VDIVPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VDIVPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VDIVPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VDIVPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VDIVPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VDIVPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VDIVPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VDIVPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VDIVPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VDIVPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VDIVPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VDIVPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VDIVPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*      VDIVPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VDIVPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VDIVPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VDIVPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VDIVPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VDIVPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VDIVPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VDIVPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VDIVPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VDIVPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VDIVSD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_VDIVSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VDIVSD_XMMdq_XMMdq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VDIVSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VDIVSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VDIVSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VDIVSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VDIVSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*       VDIVSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)         XED_ICLASS_VDIVSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VDIVSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)         XED_ICLASS_VDIVSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VDIVSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VDIVSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VDIVSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VDPBF16PS_XMMf32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDPBF16PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_128, (xed_uint16_t)   0 },
/* VDPBF16PS_XMMf32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDPBF16PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_128, (xed_uint16_t)   0 },
/* VDPBF16PS_YMMf32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDPBF16PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_256, (xed_uint16_t)   0 },
/* VDPBF16PS_YMMf32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDPBF16PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_256, (xed_uint16_t)   0 },
/* VDPBF16PS_ZMMf32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDPBF16PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_512, (xed_uint16_t)   0 },
/* VDPBF16PS_ZMMf32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VDPBF16PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BF16_512, (xed_uint16_t)   0 },
/*  VDPPD_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_VDPPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VDPPD_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_VDPPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VDPPS_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_VDPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VDPPS_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_VDPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VDPPS_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_VDPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VDPPS_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)          XED_ICLASS_VDPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*                    VERR_GPR16 */ {  (xed_uint16_t)           XED_ICLASS_VERR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                     VERR_MEMw */ {  (xed_uint16_t)           XED_ICLASS_VERR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                    VERW_GPR16 */ {  (xed_uint16_t)           XED_ICLASS_VERW, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/*                     VERW_MEMw */ {  (xed_uint16_t)           XED_ICLASS_VERW, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)XED_ISA_SET_I286PROTECTED, (xed_uint16_t)   0 },
/* VEXP2PD_ZMMf64_MASKmskw_MEMf64_AVX512ER */ {  (xed_uint16_t)        XED_ICLASS_VEXP2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VEXP2PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER */ {  (xed_uint16_t)        XED_ICLASS_VEXP2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VEXP2PS_ZMMf32_MASKmskw_MEMf32_AVX512ER */ {  (xed_uint16_t)        XED_ICLASS_VEXP2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VEXP2PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER */ {  (xed_uint16_t)        XED_ICLASS_VEXP2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VEXPANDPD_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VEXPANDPD_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VEXPANDPD_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VEXPANDPD_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VEXPANDPD_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXPANDPD_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXPANDPS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPS, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VEXPANDPS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPS, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VEXPANDPS_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPS, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VEXPANDPS_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPS, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VEXPANDPS_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPS, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXPANDPS_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VEXPANDPS, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXTRACTF128_MEMdq_YMMdq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VEXTRACTF128, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VEXTRACTF128_XMMdq_YMMdq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VEXTRACTF128, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VEXTRACTF32X4_MEMf32_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VEXTRACTF32X4_MEMf32_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXTRACTF32X4_XMMf32_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VEXTRACTF32X4_XMMf32_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXTRACTF32X8_MEMf32_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF32X8, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VEXTRACTF32X8_YMMf32_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF32X8, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VEXTRACTF64X2_MEMf64_MASKmskw_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VEXTRACTF64X2_MEMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VEXTRACTF64X2_XMMf64_MASKmskw_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VEXTRACTF64X2_XMMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VEXTRACTF64X4_MEMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF64X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXTRACTF64X4_YMMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTF64X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXTRACTI128_MEMdq_YMMqq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VEXTRACTI128, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VEXTRACTI128_XMMdq_YMMqq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VEXTRACTI128, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VEXTRACTI32X4_MEMu32_MASKmskw_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VEXTRACTI32X4_MEMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXTRACTI32X4_XMMu32_MASKmskw_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VEXTRACTI32X4_XMMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXTRACTI32X8_MEMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI32X8, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VEXTRACTI32X8_YMMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI32X8, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VEXTRACTI64X2_MEMu64_MASKmskw_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VEXTRACTI64X2_MEMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VEXTRACTI64X2_XMMu64_MASKmskw_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VEXTRACTI64X2_XMMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VEXTRACTI64X4_MEMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI64X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VEXTRACTI64X4_YMMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VEXTRACTI64X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VEXTRACTPS_GPR32_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VEXTRACTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VEXTRACTPS_GPR32f32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VEXTRACTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*    VEXTRACTPS_MEMd_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VEXTRACTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VEXTRACTPS_MEMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VEXTRACTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/* VFCMADDCPH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFCMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFCMADDCPH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFCMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFCMADDCPH_YMM2f16_MASKmskw_YMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFCMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFCMADDCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFCMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFCMADDCPH_ZMM2f16_MASKmskw_ZMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFCMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFCMADDCPH_ZMM2f16_MASKmskw_ZMM2f16_ZMM2f16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFCMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFCMADDCSH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFCMADDCSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFCMADDCSH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFCMADDCSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFCMULCPH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFCMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFCMULCPH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFCMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFCMULCPH_YMM2f16_MASKmskw_YMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFCMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFCMULCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFCMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFCMULCPH_ZMM2f16_MASKmskw_ZMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFCMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFCMULCPH_ZMM2f16_MASKmskw_ZMM2f16_ZMM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFCMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFCMULCSH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFCMULCSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFCMULCSH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFCMULCSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFIXUPIMMPD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFIXUPIMMPD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFIXUPIMMPD_YMMf64_MASKmskw_YMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFIXUPIMMPD_YMMf64_MASKmskw_YMMf64_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFIXUPIMMPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFIXUPIMMPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFIXUPIMMPS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFIXUPIMMPS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFIXUPIMMPS_YMMf32_MASKmskw_YMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFIXUPIMMPS_YMMf32_MASKmskw_YMMf32_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFIXUPIMMPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFIXUPIMMPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFIXUPIMMSD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFIXUPIMMSD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFIXUPIMMSS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFIXUPIMMSS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFIXUPIMMSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD132PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD132PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD132PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD132PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD132PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADD132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADD132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADD132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADD132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADD132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADD132PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD132PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD132PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD132PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD132PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD132PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VFMADD132SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMADD132SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD132SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD132SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMADD132SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*   VFMADD132SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMADD132SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD132SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD132SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD213PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD213PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD213PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD213PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD213PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADD213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADD213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADD213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADD213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADD213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADD213PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD213PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD213PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD213PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD213PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD213PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VFMADD213SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMADD213SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD213SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD213SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMADD213SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*   VFMADD213SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMADD213SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD213SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD213SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD231PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD231PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD231PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD231PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD231PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADD231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADD231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADD231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADD231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADD231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADD231PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD231PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADD231PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD231PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADD231PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADD231PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VFMADD231SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMADD231SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD231SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD231SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMADD231SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*   VFMADD231SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMADD231SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADD231SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADD231SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMADD231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMADDCPH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADDCPH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADDCPH_YMM2f16_MASKmskw_YMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADDCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADDCPH_ZMM2f16_MASKmskw_ZMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADDCPH_ZMM2f16_MASKmskw_ZMM2f16_ZMM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFMADDCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADDCSH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFMADDCSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMADDCSH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VFMADDCSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMADDPD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPD_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPD_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPD_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPD_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPS_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPS_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPS_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPS_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPS_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDPS_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSD_XMMdq_XMMq_MEMq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSD_XMMdq_XMMq_XMMq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSD_XMMdq_XMMq_XMMq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_VFMADDSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSS_XMMdq_XMMd_MEMd_XMMd */ {  (xed_uint16_t)       XED_ICLASS_VFMADDSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSS_XMMdq_XMMd_XMMd_MEMd */ {  (xed_uint16_t)       XED_ICLASS_VFMADDSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSS_XMMdq_XMMd_XMMd_XMMd */ {  (xed_uint16_t)       XED_ICLASS_VFMADDSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADDSUB132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADDSUB132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADDSUB132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADDSUB132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADDSUB132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB132PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADDSUB213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADDSUB213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADDSUB213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADDSUB213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADDSUB213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB213PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADDSUB231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMADDSUB231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADDSUB231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMADDSUB231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADDSUB231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUB231PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMADDSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMADDSUBPD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPD_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPD_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPD_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPD_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPS_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPS_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPS_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPS_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPS_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMADDSUBPS_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMADDSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUB132PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB132PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB132PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB132PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB132PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUB132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUB132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUB132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUB132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUB132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUB132PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB132PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB132PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB132PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB132PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB132PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VFMSUB132SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMSUB132SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB132SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB132SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB132SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*   VFMSUB132SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMSUB132SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB132SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB132SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB213PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB213PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB213PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB213PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB213PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUB213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUB213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUB213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUB213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUB213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUB213PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB213PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB213PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB213PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB213PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB213PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VFMSUB213SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMSUB213SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB213SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB213SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB213SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*   VFMSUB213SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMSUB213SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB213SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB213SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB231PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB231PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB231PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB231PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB231PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUB231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUB231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUB231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUB231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUB231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUB231PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB231PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUB231PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB231PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUB231PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUB231PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VFMSUB231SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMSUB231SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB231SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB231SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB231SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*   VFMSUB231SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*   VFMSUB231SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUB231SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUB231SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VFMSUB231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUBADD132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUBADD132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUBADD132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUBADD132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUBADD132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD132PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUBADD213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUBADD213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUBADD213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUBADD213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUBADD213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD213PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUBADD231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMSUBADD231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUBADD231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMSUBADD231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUBADD231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADD231PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VFMSUBADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFMSUBADDPD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPD_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPD_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPD_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPD_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPS_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPS_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPS_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPS_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPS_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBADDPS_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VFMSUBADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPD_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPD_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPD_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPD_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPS_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPS_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPS_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPS_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPS_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBPS_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBSD_XMMdq_XMMq_MEMq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBSD_XMMdq_XMMq_XMMq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBSD_XMMdq_XMMq_XMMq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBSS_XMMdq_XMMd_MEMd_XMMd */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBSS_XMMdq_XMMd_XMMd_MEMd */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMSUBSS_XMMdq_XMMd_XMMd_XMMd */ {  (xed_uint16_t)       XED_ICLASS_VFMSUBSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFMULCPH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VFMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMULCPH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VFMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFMULCPH_YMM2f16_MASKmskw_YMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VFMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMULCPH_YMM2f16_MASKmskw_YMM2f16_YMM2f16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VFMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFMULCPH_ZMM2f16_MASKmskw_ZMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VFMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMULCPH_ZMM2f16_MASKmskw_ZMM2f16_ZMM2f16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VFMULCPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFMULCSH_XMM2f16_MASKmskw_XMM2f16_MEM2f16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VFMULCSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFMULCSH_XMM2f16_MASKmskw_XMM2f16_XMM2f16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VFMULCSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD132PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD132PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD132PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD132PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD132PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMADD132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMADD132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMADD132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMADD132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMADD132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMADD132PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD132PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD132PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD132PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD132PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD132PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VFNMADD132SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMADD132SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD132SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD132SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD132SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VFNMADD132SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMADD132SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD132SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD132SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD213PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD213PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD213PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD213PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD213PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMADD213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMADD213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMADD213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMADD213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMADD213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMADD213PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD213PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD213PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD213PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD213PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD213PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VFNMADD213SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMADD213SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD213SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD213SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD213SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VFNMADD213SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMADD213SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD213SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD213SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD231PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD231PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD231PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD231PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD231PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMADD231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMADD231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMADD231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMADD231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMADD231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMADD231PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD231PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMADD231PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD231PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMADD231PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMADD231PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VFNMADD231SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMADD231SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD231SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD231SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD231SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VFNMADD231SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMADD231SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMADD231SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADD231SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMADD231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMADDPD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPD_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPD_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPD_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPD_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPS_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPS_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPS_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPS_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPS_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDPS_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDSD_XMMdq_XMMq_MEMq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDSD_XMMdq_XMMq_XMMq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDSD_XMMdq_XMMq_XMMq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDSS_XMMdq_XMMd_MEMd_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDSS_XMMdq_XMMd_XMMd_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMADDSS_XMMdq_XMMd_XMMd_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VFNMADDSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUB132PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB132PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB132PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB132PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB132PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB132PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB132PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMSUB132PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMSUB132PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMSUB132PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMSUB132PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMSUB132PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMSUB132PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB132PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB132PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB132PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB132PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB132PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VFNMSUB132SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMSUB132SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB132SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB132SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB132SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VFNMSUB132SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMSUB132SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB132SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB132SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB132SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB213PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB213PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB213PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB213PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB213PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB213PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB213PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMSUB213PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMSUB213PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMSUB213PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMSUB213PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMSUB213PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMSUB213PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB213PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB213PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB213PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB213PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB213PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VFNMSUB213SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMSUB213SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB213SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB213SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB213SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VFNMSUB213SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMSUB213SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB213SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB213SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB213SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB231PD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231PD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB231PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB231PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB231PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB231PD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231PD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB231PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB231PH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMSUB231PH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFNMSUB231PH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMSUB231PH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFNMSUB231PH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMSUB231PH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFNMSUB231PS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231PS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB231PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VFNMSUB231PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB231PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VFNMSUB231PS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231PS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VFNMSUB231PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231PS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VFNMSUB231SD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMSUB231SD_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB231SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SD, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB231SH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB231SH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*  VFNMSUB231SS_XMMdq_XMMd_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/*  VFNMSUB231SS_XMMdq_XMMd_XMMd */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)   XED_EXTENSION_FMA, (xed_uint16_t)          XED_ISA_SET_FMA, (xed_uint16_t)   0 },
/* VFNMSUB231SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUB231SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VFNMSUB231SS, (xed_uint8_t)      XED_CATEGORY_VFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VFNMSUBPD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPD_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPD_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPD_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPD_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPS_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPS_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPS_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPS_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPS_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBPS_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBPS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBSD_XMMdq_XMMq_MEMq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBSD_XMMdq_XMMq_XMMq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBSD_XMMdq_XMMq_XMMq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBSD, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBSS_XMMdq_XMMd_MEMd_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBSS_XMMdq_XMMd_XMMd_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFNMSUBSS_XMMdq_XMMd_XMMd_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VFNMSUBSS, (xed_uint8_t)      XED_CATEGORY_FMA4, (xed_uint8_t)  XED_EXTENSION_FMA4, (xed_uint16_t)         XED_ISA_SET_FMA4, (xed_uint16_t)   0 },
/* VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VFPCLASSPD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VFPCLASSPD_MASKmskw_MASKmskw_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VFPCLASSPD_MASKmskw_MASKmskw_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VFPCLASSPD_MASKmskw_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VFPCLASSPH_MASKmskw_MASKmskw_MEMf16_IMM8_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFPCLASSPH_MASKmskw_MASKmskw_MEMf16_IMM8_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFPCLASSPH_MASKmskw_MASKmskw_MEMf16_IMM8_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFPCLASSPH_MASKmskw_MASKmskw_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VFPCLASSPH_MASKmskw_MASKmskw_YMMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VFPCLASSPH_MASKmskw_MASKmskw_ZMMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VFPCLASSPS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VFPCLASSPS_MASKmskw_MASKmskw_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VFPCLASSPS_MASKmskw_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VFPCLASSPS_MASKmskw_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VFPCLASSSD_MASKmskw_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VFPCLASSSD_MASKmskw_MASKmskw_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VFPCLASSSH_MASKmskw_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFPCLASSSH_MASKmskw_MASKmskw_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VFPCLASSSS_MASKmskw_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VFPCLASSSS_MASKmskw_MASKmskw_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VFPCLASSSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/*           VFRCZPD_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZPD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*           VFRCZPD_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZPD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*           VFRCZPD_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZPD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*           VFRCZPD_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZPD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*           VFRCZPS_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZPS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*           VFRCZPS_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZPS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*           VFRCZPS_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZPS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*           VFRCZPS_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZPS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*            VFRCZSD_XMMdq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZSD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*            VFRCZSD_XMMdq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_VFRCZSD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*            VFRCZSS_XMMdq_MEMd */ {  (xed_uint16_t)        XED_ICLASS_VFRCZSS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*            VFRCZSS_XMMdq_XMMd */ {  (xed_uint16_t)        XED_ICLASS_VFRCZSS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VGATHERDPD_XMMf64_MASKmskw_MEMf64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGATHERDPD_XMMf64_MEMf64_XMMi64_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPD, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VGATHERDPD_YMMf64_MASKmskw_MEMf64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGATHERDPD_YMMf64_MEMf64_YMMi64_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPD, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VGATHERDPD_ZMMf64_MASKmskw_MEMf64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGATHERDPS_XMMf32_MASKmskw_MEMf32_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGATHERDPS_XMMf32_MEMf32_XMMi32_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPS, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VGATHERDPS_YMMf32_MASKmskw_MEMf32_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGATHERDPS_YMMf32_MEMf32_YMMi32_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPS, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VGATHERDPS_ZMMf32_MASKmskw_MEMf32_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERDPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGATHERPF0DPD_MEMf64_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VGATHERPF0DPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VGATHERPF0DPS_MEMf32_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VGATHERPF0DPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VGATHERPF0QPD_MEMf64_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VGATHERPF0QPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VGATHERPF0QPS_MEMf32_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VGATHERPF0QPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VGATHERPF1DPD_MEMf64_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VGATHERPF1DPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VGATHERPF1DPS_MEMf32_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VGATHERPF1DPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VGATHERPF1QPD_MEMf64_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VGATHERPF1QPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VGATHERPF1QPS_MEMf32_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t)  XED_ICLASS_VGATHERPF1QPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VGATHERQPD_XMMf64_MASKmskw_MEMf64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGATHERQPD_XMMf64_MEMf64_XMMi64_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPD, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VGATHERQPD_YMMf64_MASKmskw_MEMf64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGATHERQPD_YMMf64_MEMf64_YMMi64_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPD, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VGATHERQPD_ZMMf64_MASKmskw_MEMf64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGATHERQPS_XMMf32_MASKmskw_MEMf32_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGATHERQPS_XMMf32_MASKmskw_MEMf32_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGATHERQPS_XMMf32_MEMf32_XMMi32_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPS, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VGATHERQPS_XMMf32_MEMf32_XMMi32_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPS, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VGATHERQPS_YMMf32_MASKmskw_MEMf32_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VGATHERQPS, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETEXPPD_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGETEXPPD_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGETEXPPD_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGETEXPPD_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGETEXPPD_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETEXPPD_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETEXPPH_XMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VGETEXPPH_XMMf16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VGETEXPPH_YMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VGETEXPPH_YMMf16_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VGETEXPPH_ZMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VGETEXPPH_ZMMf16_MASKmskw_ZMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VGETEXPPS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGETEXPPS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGETEXPPS_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGETEXPPS_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGETEXPPS_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETEXPPS_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETEXPSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VGETEXPSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VGETEXPSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VGETEXPSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VGETEXPSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VGETEXPSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VGETEXPSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VGETMANTPD_XMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGETMANTPD_XMMf64_MASKmskw_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGETMANTPD_YMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGETMANTPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGETMANTPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETMANTPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETMANTPH_XMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VGETMANTPH_XMMf16_MASKmskw_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VGETMANTPH_YMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VGETMANTPH_YMMf16_MASKmskw_YMMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VGETMANTPH_ZMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VGETMANTPH_ZMMf16_MASKmskw_ZMMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VGETMANTPS_XMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGETMANTPS_XMMf32_MASKmskw_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VGETMANTPS_YMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGETMANTPS_YMMf32_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VGETMANTPS_ZMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETMANTPS_ZMMf32_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VGETMANTSD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VGETMANTSD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VGETMANTSH_XMMf16_MASKmskw_XMMf16_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VGETMANTSH_XMMf16_MASKmskw_XMMf16_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VGETMANTSS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VGETMANTSS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGETMANTSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_XMMu8_MASKmskw_XMMu8_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_128, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_XMMu8_MASKmskw_XMMu8_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_128, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_XMMu8_XMMu8_MEMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_XMMu8_XMMu8_XMMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_YMMu8_MASKmskw_YMMu8_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_256, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_YMMu8_MASKmskw_YMMu8_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_256, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_YMMu8_YMMu8_MEMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_YMMu8_YMMu8_YMMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_ZMMu8_MASKmskw_ZMMu8_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_512, (xed_uint16_t)   0 },
/* VGF2P8AFFINEINVQB_ZMMu8_MASKmskw_ZMMu8_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEINVQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_512, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_XMMu8_MASKmskw_XMMu8_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_128, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_XMMu8_MASKmskw_XMMu8_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_128, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_XMMu8_XMMu8_MEMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_XMMu8_XMMu8_XMMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_YMMu8_MASKmskw_YMMu8_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_256, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_YMMu8_MASKmskw_YMMu8_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_256, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_YMMu8_YMMu8_MEMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_YMMu8_YMMu8_YMMu64_IMM8 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_ZMMu8_MASKmskw_ZMMu8_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_512, (xed_uint16_t)   0 },
/* VGF2P8AFFINEQB_ZMMu8_MASKmskw_ZMMu8_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VGF2P8AFFINEQB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_512, (xed_uint16_t)   0 },
/* VGF2P8MULB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_128, (xed_uint16_t)   0 },
/* VGF2P8MULB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_128, (xed_uint16_t)   0 },
/*  VGF2P8MULB_XMMu8_XMMu8_MEMu8 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/*  VGF2P8MULB_XMMu8_XMMu8_XMMu8 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8MULB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_256, (xed_uint16_t)   0 },
/* VGF2P8MULB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_256, (xed_uint16_t)   0 },
/*  VGF2P8MULB_YMMu8_YMMu8_MEMu8 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/*  VGF2P8MULB_YMMu8_YMMu8_YMMu8 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)  XED_EXTENSION_GFNI, (xed_uint16_t)     XED_ISA_SET_AVX_GFNI, (xed_uint16_t)   0 },
/* VGF2P8MULB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_512, (xed_uint16_t)   0 },
/* VGF2P8MULB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VGF2P8MULB, (xed_uint8_t)      XED_CATEGORY_GFNI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_GFNI_512, (xed_uint16_t)   0 },
/*     VHADDPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VHADDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHADDPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VHADDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHADDPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VHADDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHADDPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VHADDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHADDPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VHADDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHADDPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VHADDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHADDPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VHADDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHADDPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VHADDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHSUBPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VHSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHSUBPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VHSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHSUBPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VHSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHSUBPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VHSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHSUBPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VHSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHSUBPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VHSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHSUBPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VHSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VHSUBPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VHSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VINSERTF128_YMMqq_YMMqq_MEMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_VINSERTF128, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VINSERTF128_YMMqq_YMMqq_XMMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_VINSERTF128, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VINSERTF32X4_YMMf32_MASKmskw_YMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VINSERTF32X4_YMMf32_MASKmskw_YMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VINSERTF32X4_ZMMf32_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VINSERTF32X4_ZMMf32_MASKmskw_ZMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VINSERTF32X8_ZMMf32_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF32X8, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VINSERTF32X8_ZMMf32_MASKmskw_ZMMf32_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF32X8, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VINSERTF64X2_YMMf64_MASKmskw_YMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VINSERTF64X2_YMMf64_MASKmskw_YMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VINSERTF64X2_ZMMf64_MASKmskw_ZMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VINSERTF64X2_ZMMf64_MASKmskw_ZMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VINSERTF64X4_ZMMf64_MASKmskw_ZMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF64X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VINSERTF64X4_ZMMf64_MASKmskw_ZMMf64_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTF64X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VINSERTI128_YMMqq_YMMqq_MEMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_VINSERTI128, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VINSERTI128_YMMqq_YMMqq_XMMdq_IMMb */ {  (xed_uint16_t)    XED_ICLASS_VINSERTI128, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VINSERTI32X4_YMMu32_MASKmskw_YMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VINSERTI32X4_YMMu32_MASKmskw_YMMu32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VINSERTI32X4_ZMMu32_MASKmskw_ZMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VINSERTI32X4_ZMMu32_MASKmskw_ZMMu32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VINSERTI32X8_ZMMu32_MASKmskw_ZMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI32X8, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VINSERTI32X8_ZMMu32_MASKmskw_ZMMu32_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI32X8, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VINSERTI64X2_YMMu64_MASKmskw_YMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VINSERTI64X2_YMMu64_MASKmskw_YMMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VINSERTI64X2_ZMMu64_MASKmskw_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VINSERTI64X2_ZMMu64_MASKmskw_ZMMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VINSERTI64X4_ZMMu64_MASKmskw_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI64X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VINSERTI64X4_ZMMu64_MASKmskw_ZMMu64_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VINSERTI64X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VINSERTPS_XMMdq_XMMdq_MEMd_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VINSERTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VINSERTPS_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VINSERTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VINSERTPS_XMMf32_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VINSERTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/* VINSERTPS_XMMf32_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VINSERTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*            VLDDQU_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VLDDQU, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VLDDQU_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VLDDQU, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*                 VLDMXCSR_MEMd */ {  (xed_uint16_t)       XED_ICLASS_VLDMXCSR, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMASKMOVDQU_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VMASKMOVDQU, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMASKMOVPD_MEMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VMASKMOVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMASKMOVPD_MEMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VMASKMOVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMASKMOVPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VMASKMOVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMASKMOVPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VMASKMOVPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMASKMOVPS_MEMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VMASKMOVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMASKMOVPS_MEMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VMASKMOVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMASKMOVPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VMASKMOVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMASKMOVPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VMASKMOVPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMAXPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMAXPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMAXPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMAXPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMAXPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMAXPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VMAXPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMAXPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMAXPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMAXPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMAXPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VMAXPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VMAXPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VMAXPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VMAXPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VMAXPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*      VMAXPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMAXPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMAXPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMAXPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMAXPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMAXPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VMAXPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMAXPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMAXPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMAXPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VMAXSD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_VMAXSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMAXSD_XMMdq_XMMdq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VMAXSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMAXSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMAXSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMAXSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VMAXSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*       VMAXSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)         XED_ICLASS_VMAXSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMAXSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)         XED_ICLASS_VMAXSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMAXSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMAXSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMAXSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*                        VMCALL */ {  (xed_uint16_t)         XED_ICLASS_VMCALL, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                  VMCLEAR_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VMCLEAR, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                        VMFUNC */ {  (xed_uint16_t)         XED_ICLASS_VMFUNC, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)XED_EXTENSION_VMFUNC, (xed_uint16_t)       XED_ISA_SET_VMFUNC, (xed_uint16_t)   0 },
/*      VMINPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMINPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMINPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMINPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMINPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMINPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VMINPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMINPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMINPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMINPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMINPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VMINPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VMINPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VMINPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VMINPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VMINPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*      VMINPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMINPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMINPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMINPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMINPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMINPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VMINPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMINPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMINPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMINPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VMINSD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_VMINSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMINSD_XMMdq_XMMdq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VMINSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMINSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMINSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMINSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VMINSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*       VMINSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)         XED_ICLASS_VMINSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMINSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)         XED_ICLASS_VMINSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMINSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMINSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMINSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*                      VMLAUNCH */ {  (xed_uint16_t)       XED_ICLASS_VMLAUNCH, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                   VMLOAD_ArAX */ {  (xed_uint16_t)         XED_ICLASS_VMLOAD, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SVM, (xed_uint16_t)          XED_ISA_SET_SVM, (xed_uint16_t)   0 },
/*                       VMMCALL */ {  (xed_uint16_t)        XED_ICLASS_VMMCALL, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SVM, (xed_uint16_t)          XED_ISA_SET_SVM, (xed_uint16_t)   0 },
/*           VMOVAPD_MEMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVAPD_MEMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVAPD_MEMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVAPD_MEMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VMOVAPD_MEMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVAPD_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVAPD_XMMdq_XMMdq_28 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVAPD_XMMdq_XMMdq_29 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVAPD_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVAPD_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVAPD_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVAPD_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*           VMOVAPD_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVAPD_YMMqq_YMMqq_28 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVAPD_YMMqq_YMMqq_29 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVAPD_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVAPD_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VMOVAPS_MEMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVAPS_MEMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVAPS_MEMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVAPS_MEMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VMOVAPS_MEMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVAPS_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVAPS_XMMdq_XMMdq_28 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVAPS_XMMdq_XMMdq_29 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVAPS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVAPS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVAPS_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVAPS_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*           VMOVAPS_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVAPS_YMMqq_YMMqq_28 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVAPS_YMMqq_YMMqq_29 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVAPS_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVAPS_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVAPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*             VMOVD_GPR32d_XMMd */ {  (xed_uint16_t)          XED_ICLASS_VMOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMOVD_GPR32u32_XMMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*               VMOVD_MEMd_XMMd */ {  (xed_uint16_t)          XED_ICLASS_VMOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VMOVD_MEMu32_XMMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*            VMOVD_XMMdq_GPR32d */ {  (xed_uint16_t)          XED_ICLASS_VMOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*              VMOVD_XMMdq_MEMd */ {  (xed_uint16_t)          XED_ICLASS_VMOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMOVD_XMMu32_GPR32u32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*    VMOVD_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*           VMOVDDUP_XMMdq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVDDUP_XMMdq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVDDUP_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDDUP_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDDUP_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDDUP_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*          VMOVDDUP_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VMOVDDUP_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVDDUP_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDDUP_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VMOVDQA_MEMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVDQA_MEMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVDQA_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVDQA_XMMdq_XMMdq_6F */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVDQA_XMMdq_XMMdq_7F */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVDQA_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVDQA_YMMqq_YMMqq_6F */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVDQA_YMMqq_YMMqq_7F */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVDQA32_MEMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQA32_MEMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQA32_MEMu32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQA32_XMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQA32_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQA32_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQA32_YMMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQA32_ZMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQA32_ZMMu32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQA64_MEMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQA64_MEMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQA64_MEMu64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQA64_XMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQA64_XMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQA64_YMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQA64_YMMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQA64_ZMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQA64_ZMMu64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQA64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VMOVDQU_MEMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVDQU_MEMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVDQU_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVDQU_XMMdq_XMMdq_6F */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVDQU_XMMdq_XMMdq_7F */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVDQU_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVDQU_YMMqq_YMMqq_6F */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVDQU_YMMqq_YMMqq_7F */ {  (xed_uint16_t)        XED_ICLASS_VMOVDQU, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVDQU16_MEMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VMOVDQU16_MEMu16_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VMOVDQU16_MEMu16_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VMOVDQU16_XMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VMOVDQU16_XMMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VMOVDQU16_YMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VMOVDQU16_YMMu16_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VMOVDQU16_ZMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VMOVDQU16_ZMMu16_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU16, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VMOVDQU32_MEMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQU32_MEMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQU32_MEMu32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQU32_XMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQU32_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQU32_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQU32_YMMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQU32_ZMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQU32_ZMMu32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU32, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQU64_MEMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQU64_MEMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQU64_MEMu64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQU64_XMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQU64_XMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVDQU64_YMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQU64_YMMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVDQU64_ZMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQU64_ZMMu64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVDQU64, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVDQU8_MEMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VMOVDQU8_MEMu8_MASKmskw_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VMOVDQU8_MEMu8_MASKmskw_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VMOVDQU8_XMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VMOVDQU8_XMMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VMOVDQU8_YMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VMOVDQU8_YMMu8_MASKmskw_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VMOVDQU8_ZMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VMOVDQU8_ZMMu8_MASKmskw_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVDQU8, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VMOVHLPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VMOVHLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVHLPS_XMMf32_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVHLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*  VMOVHPD_MEMf64_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVHPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*            VMOVHPD_MEMq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVHPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMOVHPD_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VMOVHPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVHPD_XMMf64_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVHPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*  VMOVHPS_MEMf32_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*            VMOVHPS_MEMq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMOVHPS_XMMdq_XMMq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VMOVHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVHPS_XMMf32_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*      VMOVLHPS_XMMdq_XMMq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_VMOVLHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVLHPS_XMMf32_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVLHPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*  VMOVLPD_MEMf64_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVLPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*             VMOVLPD_MEMq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_VMOVLPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMOVLPD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VMOVLPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVLPD_XMMf64_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVLPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*  VMOVLPS_MEMf32_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*             VMOVLPS_MEMq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_VMOVLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMOVLPS_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VMOVLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVLPS_XMMf32_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVLPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*        VMOVMSKPD_GPR32d_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VMOVMSKPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVMSKPD_GPR32d_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VMOVMSKPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVMSKPS_GPR32d_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VMOVMSKPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVMSKPS_GPR32d_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VMOVMSKPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VMOVNTDQ_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VMOVNTDQ_MEMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVNTDQ_MEMu32_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVNTDQ_MEMu32_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVNTDQ_MEMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*         VMOVNTDQA_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VMOVNTDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVNTDQA_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVNTDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*         VMOVNTDQA_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VMOVNTDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VMOVNTDQA_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVNTDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVNTDQA_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVNTDQA, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VMOVNTPD_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVNTPD_MEMf64_XMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVNTPD_MEMf64_YMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVNTPD_MEMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VMOVNTPD_MEMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VMOVNTPS_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVNTPS_MEMf32_XMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVNTPS_MEMf32_YMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVNTPS_MEMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VMOVNTPS_MEMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VMOVNTPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*             VMOVQ_GPR64q_XMMq */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMOVQ_GPR64u64_XMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*            VMOVQ_MEMq_XMMq_7E */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VMOVQ_MEMq_XMMq_D6 */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VMOVQ_MEMu64_XMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*            VMOVQ_XMMdq_GPR64q */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVQ_XMMdq_MEMq_6E */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVQ_XMMdq_MEMq_7E */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVQ_XMMdq_XMMq_7E */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVQ_XMMdq_XMMq_D6 */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VMOVQ_XMMu64_GPR64u64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*    VMOVQ_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/*    VMOVQ_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512F_128N, (xed_uint16_t)   0 },
/* VMOVSD_MEMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*              VMOVSD_MEMq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VMOVSD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*             VMOVSD_XMMdq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_VMOVSD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VMOVSD_XMMdq_XMMdq_XMMq_10 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VMOVSD_XMMdq_XMMdq_XMMq_11 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVSD_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMOVSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMOVSH_MEMf16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSH, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VMOVSH_XMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSH, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VMOVSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSH, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*         VMOVSHDUP_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VMOVSHDUP_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVSHDUP_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVSHDUP_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVSHDUP_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVSHDUP_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VMOVSHDUP_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VMOVSHDUP_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVSHDUP_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVSHDUP_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSHDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*         VMOVSLDUP_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VMOVSLDUP_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVSLDUP_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVSLDUP_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVSLDUP_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVSLDUP_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VMOVSLDUP_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*         VMOVSLDUP_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVSLDUP_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVSLDUP_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VMOVSLDUP, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*              VMOVSS_MEMd_XMMd */ {  (xed_uint16_t)         XED_ICLASS_VMOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVSS_MEMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*             VMOVSS_XMMdq_MEMd */ {  (xed_uint16_t)         XED_ICLASS_VMOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VMOVSS_XMMdq_XMMdq_XMMd_10 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VMOVSS_XMMdq_XMMdq_XMMd_11 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVSS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMOVSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMOVSS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*           VMOVUPD_MEMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVUPD_MEMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVUPD_MEMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVUPD_MEMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VMOVUPD_MEMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVUPD_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVUPD_XMMdq_XMMdq_10 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVUPD_XMMdq_XMMdq_11 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVUPD_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVUPD_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVUPD_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVUPD_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*           VMOVUPD_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVUPD_YMMqq_YMMqq_10 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVUPD_YMMqq_YMMqq_11 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVUPD_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVUPD_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VMOVUPS_MEMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVUPS_MEMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVUPS_MEMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVUPS_MEMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VMOVUPS_MEMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VMOVUPS_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVUPS_XMMdq_XMMdq_10 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVUPS_XMMdq_XMMdq_11 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVUPS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVUPS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMOVUPS_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMOVUPS_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*           VMOVUPS_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVUPS_YMMqq_YMMqq_10 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VMOVUPS_YMMqq_YMMqq_11 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMOVUPS_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMOVUPS_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VMOVUPS, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VMOVW_GPR32f16_XMMf16_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128N, (xed_uint16_t)   0 },
/*    VMOVW_MEMf16_XMMf16_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128N, (xed_uint16_t)   0 },
/*  VMOVW_XMMf16_GPR32f16_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128N, (xed_uint16_t)   0 },
/*    VMOVW_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VMOVW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128N, (xed_uint16_t)   0 },
/* VMPSADBW_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VMPSADBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMPSADBW_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VMPSADBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMPSADBW_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VMPSADBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VMPSADBW_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VMPSADBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*                  VMPTRLD_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VMPTRLD, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                  VMPTRST_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VMPTRST, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*            VMREAD_GPR32_GPR32 */ {  (xed_uint16_t)         XED_ICLASS_VMREAD, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*            VMREAD_GPR64_GPR64 */ {  (xed_uint16_t)         XED_ICLASS_VMREAD, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*             VMREAD_MEMd_GPR32 */ {  (xed_uint16_t)         XED_ICLASS_VMREAD, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*             VMREAD_MEMq_GPR64 */ {  (xed_uint16_t)         XED_ICLASS_VMREAD, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                      VMRESUME */ {  (xed_uint16_t)       XED_ICLASS_VMRESUME, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                    VMRUN_ArAX */ {  (xed_uint16_t)          XED_ICLASS_VMRUN, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SVM, (xed_uint16_t)          XED_ISA_SET_SVM, (xed_uint16_t)   0 },
/*                        VMSAVE */ {  (xed_uint16_t)         XED_ICLASS_VMSAVE, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)   XED_EXTENSION_SVM, (xed_uint16_t)          XED_ISA_SET_SVM, (xed_uint16_t)   0 },
/*      VMULPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMULPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMULPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMULPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMULPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMULPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VMULPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMULPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMULPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMULPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMULPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VMULPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VMULPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VMULPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VMULPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VMULPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*      VMULPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMULPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMULPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMULPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VMULPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VMULPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VMULPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VMULPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMULPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VMULPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VMULSD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_VMULSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMULSD_XMMdq_XMMdq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VMULSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMULSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMULSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMULSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VMULSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*       VMULSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)         XED_ICLASS_VMULSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VMULSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)         XED_ICLASS_VMULSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VMULSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VMULSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VMULSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*           VMWRITE_GPR32_GPR32 */ {  (xed_uint16_t)        XED_ICLASS_VMWRITE, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*            VMWRITE_GPR32_MEMd */ {  (xed_uint16_t)        XED_ICLASS_VMWRITE, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*           VMWRITE_GPR64_GPR64 */ {  (xed_uint16_t)        XED_ICLASS_VMWRITE, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*            VMWRITE_GPR64_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VMWRITE, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                        VMXOFF */ {  (xed_uint16_t)         XED_ICLASS_VMXOFF, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*                    VMXON_MEMq */ {  (xed_uint16_t)          XED_ICLASS_VMXON, (xed_uint8_t)       XED_CATEGORY_VTX, (xed_uint8_t)   XED_EXTENSION_VTX, (xed_uint16_t)          XED_ISA_SET_VTX, (xed_uint16_t)   0 },
/*       VORPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VORPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VORPD_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VORPD_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/*       VORPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VORPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VORPD_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VORPD_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VORPD_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VORPD_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/*       VORPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VORPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VORPS_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VORPS_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/*       VORPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VORPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VORPS_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VORPS_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VORPS_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VORPS_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VP2INTERSECTD_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTD, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_128, (xed_uint16_t)   0 },
/* VP2INTERSECTD_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTD, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_128, (xed_uint16_t)   0 },
/* VP2INTERSECTD_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTD, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_256, (xed_uint16_t)   0 },
/* VP2INTERSECTD_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTD, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_256, (xed_uint16_t)   0 },
/* VP2INTERSECTD_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTD, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_512, (xed_uint16_t)   0 },
/* VP2INTERSECTD_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTD, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_512, (xed_uint16_t)   0 },
/* VP2INTERSECTQ_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTQ, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_128, (xed_uint16_t)   0 },
/* VP2INTERSECTQ_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTQ, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_128, (xed_uint16_t)   0 },
/* VP2INTERSECTQ_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTQ, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_256, (xed_uint16_t)   0 },
/* VP2INTERSECTQ_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTQ, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_256, (xed_uint16_t)   0 },
/* VP2INTERSECTQ_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTQ, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_512, (xed_uint16_t)   0 },
/* VP2INTERSECTQ_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)  XED_ICLASS_VP2INTERSECTQ, (xed_uint8_t) XED_CATEGORY_AVX512_VP2INTERSECT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VP2INTERSECT_512, (xed_uint16_t)   0 },
/* VP4DPWSSD_ZMMi32_MASKmskw_ZMMi16_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VP4DPWSSD, (xed_uint8_t) XED_CATEGORY_AVX512_4VNNIW, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_4VNNIW_512, (xed_uint16_t)   0 },
/* VP4DPWSSDS_ZMMi32_MASKmskw_ZMMi16_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VP4DPWSSDS, (xed_uint8_t) XED_CATEGORY_AVX512_4VNNIW, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_4VNNIW_512, (xed_uint16_t)   0 },
/*            VPABSB_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VPABSB_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPABSB_XMMi8_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPABSB_XMMi8_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPABSB_YMMi8_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPABSB_YMMi8_MASKmskw_YMMi8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*            VPABSB_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*            VPABSB_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPABSB_ZMMi8_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPABSB_ZMMi8_MASKmskw_ZMMi8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*            VPABSD_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VPABSD_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPABSD_XMMi32_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPABSD_XMMi32_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPABSD_YMMi32_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPABSD_YMMi32_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*            VPABSD_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*            VPABSD_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPABSD_ZMMi32_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPABSD_ZMMi32_MASKmskw_ZMMi32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPABSQ_XMMi64_MASKmskw_MEMi64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPABSQ_XMMi64_MASKmskw_XMMi64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPABSQ_YMMi64_MASKmskw_MEMi64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPABSQ_YMMi64_MASKmskw_YMMi64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPABSQ_ZMMi64_MASKmskw_MEMi64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPABSQ_ZMMi64_MASKmskw_ZMMi64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*            VPABSW_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VPABSW_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPABSW_XMMi16_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPABSW_XMMi16_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPABSW_YMMi16_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPABSW_YMMi16_MASKmskw_YMMi16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*            VPABSW_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*            VPABSW_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPABSW_ZMMi16_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPABSW_ZMMi16_MASKmskw_ZMMi16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPABSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*   VPACKSSDW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPACKSSDW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPACKSSDW_XMMi16_MASKmskw_XMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPACKSSDW_XMMi16_MASKmskw_XMMi32_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPACKSSDW_YMMi16_MASKmskw_YMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPACKSSDW_YMMi16_MASKmskw_YMMi32_YMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*   VPACKSSDW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*   VPACKSSDW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPACKSSDW_ZMMi16_MASKmskw_ZMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPACKSSDW_ZMMi16_MASKmskw_ZMMi32_ZMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*   VPACKSSWB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPACKSSWB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPACKSSWB_XMMi8_MASKmskw_XMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPACKSSWB_XMMi8_MASKmskw_XMMi16_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPACKSSWB_YMMi8_MASKmskw_YMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPACKSSWB_YMMi8_MASKmskw_YMMi16_YMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*   VPACKSSWB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*   VPACKSSWB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPACKSSWB_ZMMi8_MASKmskw_ZMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPACKSSWB_ZMMi8_MASKmskw_ZMMi16_ZMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKSSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*   VPACKUSDW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPACKUSDW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPACKUSDW_XMMu16_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPACKUSDW_XMMu16_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*   VPACKUSDW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*   VPACKUSDW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPACKUSDW_YMMu16_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPACKUSDW_YMMu16_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPACKUSDW_ZMMu16_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPACKUSDW_ZMMu16_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*   VPACKUSWB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPACKUSWB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPACKUSWB_XMMu8_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPACKUSWB_XMMu8_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*   VPACKUSWB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*   VPACKUSWB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPACKUSWB_YMMu8_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPACKUSWB_YMMu8_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPACKUSWB_ZMMu8_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPACKUSWB_ZMMu8_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPACKUSWB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*      VPADDB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPADDB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPADDB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPADDB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*      VPADDB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPADDB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPADDB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPADDB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*      VPADDD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPADDD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPADDD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPADDD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*      VPADDD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPADDD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPADDD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPADDD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPADDD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPADDD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VPADDQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPADDQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPADDQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPADDQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*      VPADDQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPADDQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPADDQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPADDQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPADDQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPADDQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPADDSB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPADDSB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPADDSB_XMMi8_MASKmskw_XMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPADDSB_XMMi8_MASKmskw_XMMi8_XMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPADDSB_YMMi8_MASKmskw_YMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDSB_YMMi8_MASKmskw_YMMi8_YMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*     VPADDSB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPADDSB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPADDSB_ZMMi8_MASKmskw_ZMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPADDSB_ZMMi8_MASKmskw_ZMMi8_ZMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPADDSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPADDSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPADDSW_XMMi16_MASKmskw_XMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPADDSW_XMMi16_MASKmskw_XMMi16_XMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPADDSW_YMMi16_MASKmskw_YMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDSW_YMMi16_MASKmskw_YMMi16_YMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*     VPADDSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPADDSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPADDSW_ZMMi16_MASKmskw_ZMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPADDSW_ZMMi16_MASKmskw_ZMMi16_ZMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPADDSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPADDUSB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPADDUSB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPADDUSB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPADDUSB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*    VPADDUSB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPADDUSB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPADDUSB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDUSB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDUSB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPADDUSB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPADDUSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPADDUSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPADDUSW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPADDUSW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*    VPADDUSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPADDUSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPADDUSW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDUSW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDUSW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPADDUSW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPADDUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*      VPADDW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPADDW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPADDW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPADDW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*      VPADDW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPADDW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPADDW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPADDW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPADDW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPADDW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPALIGNR_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPALIGNR_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPALIGNR_XMMu8_MASKmskw_XMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPALIGNR_XMMu8_MASKmskw_XMMu8_XMMu8_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPALIGNR_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPALIGNR_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPALIGNR_YMMu8_MASKmskw_YMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPALIGNR_YMMu8_MASKmskw_YMMu8_YMMu8_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPALIGNR_ZMMu8_MASKmskw_ZMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPALIGNR_ZMMu8_MASKmskw_ZMMu8_ZMMu8_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPALIGNR, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPAND_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_VPAND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VPAND_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_VPAND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VPAND_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)          XED_ICLASS_VPAND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPAND_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)          XED_ICLASS_VPAND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPANDD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPANDD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPANDD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPANDD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPANDD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPANDD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VPANDN_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPANDN, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPANDN_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPANDN, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPANDN_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPANDN, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPANDN_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPANDN, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPANDND_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPANDND_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPANDND_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPANDND_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPANDND_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPANDND_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDND, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPANDNQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDNQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPANDNQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDNQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPANDNQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDNQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPANDNQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDNQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPANDNQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDNQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPANDNQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPANDNQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPANDQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPANDQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPANDQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPANDQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPANDQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPANDQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPANDQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VPAVGB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPAVGB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPAVGB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPAVGB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*      VPAVGB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPAVGB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPAVGB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPAVGB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPAVGB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPAVGB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*      VPAVGW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPAVGW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPAVGW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPAVGW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*      VPAVGW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPAVGW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPAVGW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPAVGW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPAVGW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPAVGW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPAVGW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBLENDD_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPBLENDD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBLENDD_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPBLENDD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBLENDD_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPBLENDD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBLENDD_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPBLENDD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBLENDMB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMB, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPBLENDMB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMB, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPBLENDMB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMB, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBLENDMB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMB, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBLENDMB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMB, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBLENDMB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMB, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBLENDMD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPBLENDMD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPBLENDMD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBLENDMD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBLENDMD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBLENDMD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMD, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBLENDMQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMQ, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPBLENDMQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMQ, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPBLENDMQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMQ, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBLENDMQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMQ, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBLENDMQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMQ, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBLENDMQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMQ, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBLENDMW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMW, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPBLENDMW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMW, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPBLENDMW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMW, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBLENDMW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMW, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBLENDMW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMW, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBLENDMW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDMW, (xed_uint8_t)     XED_CATEGORY_BLEND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBLENDVB_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDVB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPBLENDVB_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDVB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPBLENDVB_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDVB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBLENDVB_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPBLENDVB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBLENDW_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPBLENDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPBLENDW_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPBLENDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPBLENDW_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPBLENDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBLENDW_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPBLENDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTB_XMMdq_MEMb */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTB_XMMdq_XMMb */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBROADCASTB_XMMu8_MASKmskw_GPR32u8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPBROADCASTB_XMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPBROADCASTB_XMMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*       VPBROADCASTB_YMMqq_MEMb */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTB_YMMqq_XMMb */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBROADCASTB_YMMu8_MASKmskw_GPR32u8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBROADCASTB_YMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBROADCASTB_YMMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBROADCASTB_ZMMu8_MASKmskw_GPR32u8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBROADCASTB_ZMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBROADCASTB_ZMMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTB, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPBROADCASTD_XMMdq_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTD_XMMdq_XMMd */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBROADCASTD_XMMu32_MASKmskw_GPR32u32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPBROADCASTD_XMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPBROADCASTD_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*       VPBROADCASTD_YMMqq_MEMd */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTD_YMMqq_XMMd */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBROADCASTD_YMMu32_MASKmskw_GPR32u32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBROADCASTD_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBROADCASTD_YMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBROADCASTD_ZMMu32_MASKmskw_GPR32u32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBROADCASTD_ZMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBROADCASTD_ZMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTD, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBROADCASTMB2Q_XMMu64_MASKu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPBROADCASTMB2Q, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPBROADCASTMB2Q_YMMu64_MASKu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPBROADCASTMB2Q, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPBROADCASTMB2Q_ZMMu64_MASKu64_AVX512CD */ {  (xed_uint16_t) XED_ICLASS_VPBROADCASTMB2Q, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPBROADCASTMW2D_XMMu32_MASKu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPBROADCASTMW2D, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPBROADCASTMW2D_YMMu32_MASKu32_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPBROADCASTMW2D, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPBROADCASTMW2D_ZMMu32_MASKu32_AVX512CD */ {  (xed_uint16_t) XED_ICLASS_VPBROADCASTMW2D, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/*       VPBROADCASTQ_XMMdq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTQ_XMMdq_XMMq */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBROADCASTQ_XMMu64_MASKmskw_GPR64u64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPBROADCASTQ_XMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPBROADCASTQ_XMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*       VPBROADCASTQ_YMMqq_MEMq */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTQ_YMMqq_XMMq */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBROADCASTQ_YMMu64_MASKmskw_GPR64u64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBROADCASTQ_YMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBROADCASTQ_YMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPBROADCASTQ_ZMMu64_MASKmskw_GPR64u64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBROADCASTQ_ZMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPBROADCASTQ_ZMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTQ, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VPBROADCASTW_XMMdq_MEMw */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTW_XMMdq_XMMw */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBROADCASTW_XMMu16_MASKmskw_GPR32u16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPBROADCASTW_XMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPBROADCASTW_XMMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*       VPBROADCASTW_YMMqq_MEMw */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPBROADCASTW_YMMqq_XMMw */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPBROADCASTW_YMMu16_MASKmskw_GPR32u16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBROADCASTW_YMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBROADCASTW_YMMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPBROADCASTW_ZMMu16_MASKmskw_GPR32u16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBROADCASTW_ZMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPBROADCASTW_ZMMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPBROADCASTW, (xed_uint8_t) XED_CATEGORY_BROADCAST, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCLMULQDQ_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPCLMULQDQ_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPCLMULQDQ_XMMu128_XMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t) XED_CATEGORY_VPCLMULQDQ, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPCLMULQDQ_128, (xed_uint16_t)   0 },
/* VPCLMULQDQ_XMMu128_XMMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t) XED_CATEGORY_VPCLMULQDQ, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPCLMULQDQ_128, (xed_uint16_t)   0 },
/* VPCLMULQDQ_YMMu128_YMMu64_MEMu64_IMM8 */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t) XED_CATEGORY_VPCLMULQDQ, (xed_uint8_t)XED_EXTENSION_VPCLMULQDQ, (xed_uint16_t)   XED_ISA_SET_VPCLMULQDQ, (xed_uint16_t)   0 },
/* VPCLMULQDQ_YMMu128_YMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t) XED_CATEGORY_VPCLMULQDQ, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPCLMULQDQ_256, (xed_uint16_t)   0 },
/* VPCLMULQDQ_YMMu128_YMMu64_YMMu64_IMM8 */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t) XED_CATEGORY_VPCLMULQDQ, (xed_uint8_t)XED_EXTENSION_VPCLMULQDQ, (xed_uint16_t)   XED_ISA_SET_VPCLMULQDQ, (xed_uint16_t)   0 },
/* VPCLMULQDQ_YMMu128_YMMu64_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t) XED_CATEGORY_VPCLMULQDQ, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPCLMULQDQ_256, (xed_uint16_t)   0 },
/* VPCLMULQDQ_ZMMu128_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t) XED_CATEGORY_VPCLMULQDQ, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPCLMULQDQ_512, (xed_uint16_t)   0 },
/* VPCLMULQDQ_ZMMu128_ZMMu64_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPCLMULQDQ, (xed_uint8_t) XED_CATEGORY_VPCLMULQDQ, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPCLMULQDQ_512, (xed_uint16_t)   0 },
/* VPCMOV_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPCMOV, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCMOV_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPCMOV, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCMOV_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPCMOV, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCMOV_YMMqq_YMMqq_MEMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPCMOV, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCMOV_YMMqq_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPCMOV, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCMOV_YMMqq_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPCMOV, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCMPB_MASKmskw_MASKmskw_XMMi8_MEMi8_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPB_MASKmskw_MASKmskw_XMMi8_XMMi8_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPB_MASKmskw_MASKmskw_YMMi8_MEMi8_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPB_MASKmskw_MASKmskw_YMMi8_YMMi8_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPB_MASKmskw_MASKmskw_ZMMi8_MEMi8_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPB_MASKmskw_MASKmskw_ZMMi8_ZMMi8_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPD_MASKmskw_MASKmskw_XMMi32_MEMi32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPD_MASKmskw_MASKmskw_XMMi32_XMMi32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPD_MASKmskw_MASKmskw_YMMi32_MEMi32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPD_MASKmskw_MASKmskw_YMMi32_YMMi32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPD_MASKmskw_MASKmskw_ZMMi32_MEMi32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPD_MASKmskw_MASKmskw_ZMMi32_ZMMi32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPEQB_MASKmskw_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPEQB_MASKmskw_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPEQB_MASKmskw_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPEQB_MASKmskw_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPEQB_MASKmskw_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPEQB_MASKmskw_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPCMPEQB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPEQB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPEQB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPCMPEQB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPCMPEQD_MASKmskw_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPEQD_MASKmskw_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPEQD_MASKmskw_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPEQD_MASKmskw_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPEQD_MASKmskw_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPEQD_MASKmskw_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*    VPCMPEQD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPEQD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPEQD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPCMPEQD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPCMPEQQ_MASKmskw_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPEQQ_MASKmskw_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPEQQ_MASKmskw_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPEQQ_MASKmskw_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPEQQ_MASKmskw_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPEQQ_MASKmskw_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*    VPCMPEQQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPEQQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPEQQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPCMPEQQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPCMPEQW_MASKmskw_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPEQW_MASKmskw_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPEQW_MASKmskw_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPEQW_MASKmskw_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPEQW_MASKmskw_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPEQW_MASKmskw_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPCMPEQW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPEQW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPEQW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPCMPEQW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPEQW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*   VPCMPESTRI_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCMPESTRI, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPCMPESTRI_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCMPESTRI, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPCMPESTRI64_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VPCMPESTRI64, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t) 134 },
/* VPCMPESTRI64_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VPCMPESTRI64, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t) 134 },
/*   VPCMPESTRM_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCMPESTRM, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPCMPESTRM_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCMPESTRM, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPCMPESTRM64_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VPCMPESTRM64, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t) 138 },
/* VPCMPESTRM64_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VPCMPESTRM64, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t) 138 },
/* VPCMPGTB_MASKmskw_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPGTB_MASKmskw_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPGTB_MASKmskw_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPGTB_MASKmskw_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPGTB_MASKmskw_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPGTB_MASKmskw_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPCMPGTB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPGTB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPGTB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPCMPGTB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPCMPGTD_MASKmskw_MASKmskw_XMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPGTD_MASKmskw_MASKmskw_XMMi32_XMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPGTD_MASKmskw_MASKmskw_YMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPGTD_MASKmskw_MASKmskw_YMMi32_YMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPGTD_MASKmskw_MASKmskw_ZMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPGTD_MASKmskw_MASKmskw_ZMMi32_ZMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*    VPCMPGTD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPGTD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPGTD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPCMPGTD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPCMPGTQ_MASKmskw_MASKmskw_XMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPGTQ_MASKmskw_MASKmskw_XMMi64_XMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPGTQ_MASKmskw_MASKmskw_YMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPGTQ_MASKmskw_MASKmskw_YMMi64_YMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPGTQ_MASKmskw_MASKmskw_ZMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPGTQ_MASKmskw_MASKmskw_ZMMi64_ZMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*    VPCMPGTQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPGTQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPGTQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPCMPGTQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPCMPGTW_MASKmskw_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPGTW_MASKmskw_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPGTW_MASKmskw_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPGTW_MASKmskw_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPGTW_MASKmskw_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPGTW_MASKmskw_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPCMPGTW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPGTW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPCMPGTW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPCMPGTW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPCMPGTW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*   VPCMPISTRI_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCMPISTRI, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPCMPISTRI_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCMPISTRI, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPCMPISTRI64_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VPCMPISTRI64, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t) 136 },
/* VPCMPISTRI64_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)   XED_ICLASS_VPCMPISTRI64, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t) 136 },
/*   VPCMPISTRM_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCMPISTRM, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPCMPISTRM_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPCMPISTRM, (xed_uint8_t)     XED_CATEGORY_STTNI, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPCMPQ_MASKmskw_MASKmskw_XMMi64_MEMi64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPQ_MASKmskw_MASKmskw_XMMi64_XMMi64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPQ_MASKmskw_MASKmskw_YMMi64_MEMi64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPQ_MASKmskw_MASKmskw_YMMi64_YMMi64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPQ_MASKmskw_MASKmskw_ZMMi64_MEMi64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPQ_MASKmskw_MASKmskw_ZMMi64_ZMMi64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPUB_MASKmskw_MASKmskw_XMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPUB_MASKmskw_MASKmskw_XMMu8_XMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPUB_MASKmskw_MASKmskw_YMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPUB_MASKmskw_MASKmskw_YMMu8_YMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPUB_MASKmskw_MASKmskw_ZMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPUB_MASKmskw_MASKmskw_ZMMu8_ZMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPUD_MASKmskw_MASKmskw_XMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPUD_MASKmskw_MASKmskw_XMMu32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPUD_MASKmskw_MASKmskw_YMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPUD_MASKmskw_MASKmskw_YMMu32_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPUD_MASKmskw_MASKmskw_ZMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPUD_MASKmskw_MASKmskw_ZMMu32_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPUQ_MASKmskw_MASKmskw_XMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPUQ_MASKmskw_MASKmskw_XMMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCMPUQ_MASKmskw_MASKmskw_YMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPUQ_MASKmskw_MASKmskw_YMMu64_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCMPUQ_MASKmskw_MASKmskw_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPUQ_MASKmskw_MASKmskw_ZMMu64_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCMPUW_MASKmskw_MASKmskw_XMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPUW_MASKmskw_MASKmskw_XMMu16_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPUW_MASKmskw_MASKmskw_YMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPUW_MASKmskw_MASKmskw_YMMu16_YMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPUW_MASKmskw_MASKmskw_ZMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPUW_MASKmskw_MASKmskw_ZMMu16_ZMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPCMPUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPW_MASKmskw_MASKmskw_XMMi16_MEMi16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPW_MASKmskw_MASKmskw_XMMi16_XMMi16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPCMPW_MASKmskw_MASKmskw_YMMi16_MEMi16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPW_MASKmskw_MASKmskw_YMMi16_YMMi16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPCMPW_MASKmskw_MASKmskw_ZMMi16_MEMi16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCMPW_MASKmskw_MASKmskw_ZMMi16_ZMMi16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPCMPW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPCOMB_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPCOMB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMB_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPCOMB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMD_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPCOMD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMD_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPCOMD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMPRESSB_MEMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSB, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPCOMPRESSB_MEMu8_MASKmskw_YMMu8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSB, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPCOMPRESSB_MEMu8_MASKmskw_ZMMu8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSB, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPCOMPRESSB_XMMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSB, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPCOMPRESSB_YMMu8_MASKmskw_YMMu8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSB, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPCOMPRESSB_ZMMu8_MASKmskw_ZMMu8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSB, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPCOMPRESSD_MEMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCOMPRESSD_MEMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCOMPRESSD_MEMu32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCOMPRESSD_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCOMPRESSD_YMMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCOMPRESSD_ZMMu32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSD, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCOMPRESSQ_MEMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSQ, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCOMPRESSQ_MEMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSQ, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCOMPRESSQ_MEMu64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSQ, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCOMPRESSQ_XMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSQ, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPCOMPRESSQ_YMMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSQ, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPCOMPRESSQ_ZMMu64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSQ, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPCOMPRESSW_MEMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSW, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPCOMPRESSW_MEMu16_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSW, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPCOMPRESSW_MEMu16_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSW, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPCOMPRESSW_XMMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSW, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPCOMPRESSW_YMMu16_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSW, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPCOMPRESSW_ZMMu16_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCOMPRESSW, (xed_uint8_t)  XED_CATEGORY_COMPRESS, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPCOMQ_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPCOMQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMQ_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPCOMQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMUB_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPCOMUB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMUB_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPCOMUB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMUD_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPCOMUD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMUD_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPCOMUD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMUQ_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPCOMUQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMUQ_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPCOMUQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMUW_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPCOMUW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMUW_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPCOMUW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMW_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPCOMW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCOMW_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPCOMW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPCONFLICTD_XMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPCONFLICTD_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPCONFLICTD_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPCONFLICTD_YMMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPCONFLICTD_ZMMu32_MASKmskw_MEMu32_AVX512CD */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPCONFLICTD_ZMMu32_MASKmskw_ZMMu32_AVX512CD */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPCONFLICTQ_XMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPCONFLICTQ_XMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPCONFLICTQ_YMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPCONFLICTQ_YMMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPCONFLICTQ_ZMMu64_MASKmskw_MEMu64_AVX512CD */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPCONFLICTQ_ZMMu64_MASKmskw_ZMMu64_AVX512CD */ {  (xed_uint16_t)    XED_ICLASS_VPCONFLICTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPDPBUSD_XMMi32_MASKmskw_XMMu8_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_128, (xed_uint16_t)   0 },
/* VPDPBUSD_XMMi32_MASKmskw_XMMu8_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_128, (xed_uint16_t)   0 },
/* VPDPBUSD_XMMi32_XMMu32_MEMu32 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPBUSD_XMMi32_XMMu32_XMMu32 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPBUSD_YMMi32_MASKmskw_YMMu8_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_256, (xed_uint16_t)   0 },
/* VPDPBUSD_YMMi32_MASKmskw_YMMu8_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_256, (xed_uint16_t)   0 },
/* VPDPBUSD_YMMi32_YMMu32_MEMu32 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPBUSD_YMMi32_YMMu32_YMMu32 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPBUSD_ZMMi32_MASKmskw_ZMMu8_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_512, (xed_uint16_t)   0 },
/* VPDPBUSD_ZMMi32_MASKmskw_ZMMu8_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPBUSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_512, (xed_uint16_t)   0 },
/* VPDPBUSDS_XMMi32_MASKmskw_XMMu8_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_128, (xed_uint16_t)   0 },
/* VPDPBUSDS_XMMi32_MASKmskw_XMMu8_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_128, (xed_uint16_t)   0 },
/* VPDPBUSDS_XMMi32_XMMu32_MEMu32 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPBUSDS_XMMi32_XMMu32_XMMu32 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPBUSDS_YMMi32_MASKmskw_YMMu8_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_256, (xed_uint16_t)   0 },
/* VPDPBUSDS_YMMi32_MASKmskw_YMMu8_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_256, (xed_uint16_t)   0 },
/* VPDPBUSDS_YMMi32_YMMu32_MEMu32 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPBUSDS_YMMi32_YMMu32_YMMu32 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPBUSDS_ZMMi32_MASKmskw_ZMMu8_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_512, (xed_uint16_t)   0 },
/* VPDPBUSDS_ZMMi32_MASKmskw_ZMMu8_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPBUSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_512, (xed_uint16_t)   0 },
/* VPDPWSSD_XMMi32_MASKmskw_XMMi16_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_128, (xed_uint16_t)   0 },
/* VPDPWSSD_XMMi32_MASKmskw_XMMi16_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_128, (xed_uint16_t)   0 },
/* VPDPWSSD_XMMi32_XMMu32_MEMu32 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPWSSD_XMMi32_XMMu32_XMMu32 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPWSSD_YMMi32_MASKmskw_YMMi16_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_256, (xed_uint16_t)   0 },
/* VPDPWSSD_YMMi32_MASKmskw_YMMi16_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_256, (xed_uint16_t)   0 },
/* VPDPWSSD_YMMi32_YMMu32_MEMu32 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPWSSD_YMMi32_YMMu32_YMMu32 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPWSSD_ZMMi32_MASKmskw_ZMMi16_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_512, (xed_uint16_t)   0 },
/* VPDPWSSD_ZMMi32_MASKmskw_ZMMi16_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPDPWSSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_512, (xed_uint16_t)   0 },
/* VPDPWSSDS_XMMi32_MASKmskw_XMMi16_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_128, (xed_uint16_t)   0 },
/* VPDPWSSDS_XMMi32_MASKmskw_XMMi16_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_128, (xed_uint16_t)   0 },
/* VPDPWSSDS_XMMi32_XMMu32_MEMu32 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPWSSDS_XMMi32_XMMu32_XMMu32 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPWSSDS_YMMi32_MASKmskw_YMMi16_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_256, (xed_uint16_t)   0 },
/* VPDPWSSDS_YMMi32_MASKmskw_YMMi16_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_256, (xed_uint16_t)   0 },
/* VPDPWSSDS_YMMi32_YMMu32_MEMu32 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPWSSDS_YMMi32_YMMu32_YMMu32 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)       XED_CATEGORY_VEX, (xed_uint8_t)XED_EXTENSION_AVX_VNNI, (xed_uint16_t)     XED_ISA_SET_AVX_VNNI, (xed_uint16_t)   0 },
/* VPDPWSSDS_ZMMi32_MASKmskw_ZMMi16_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_512, (xed_uint16_t)   0 },
/* VPDPWSSDS_ZMMi32_MASKmskw_ZMMi16_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPDPWSSDS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VNNI_512, (xed_uint16_t)   0 },
/* VPERM2F128_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERM2F128, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPERM2F128_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERM2F128, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPERM2I128_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERM2I128, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPERM2I128_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERM2I128, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPERMB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_128, (xed_uint16_t)   0 },
/* VPERMB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_128, (xed_uint16_t)   0 },
/* VPERMB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_256, (xed_uint16_t)   0 },
/* VPERMB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_256, (xed_uint16_t)   0 },
/* VPERMB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_512, (xed_uint16_t)   0 },
/* VPERMB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_512, (xed_uint16_t)   0 },
/*      VPERMD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPERMD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPERMD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPERMD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPERMD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2B_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_128, (xed_uint16_t)   0 },
/* VPERMI2B_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_128, (xed_uint16_t)   0 },
/* VPERMI2B_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_256, (xed_uint16_t)   0 },
/* VPERMI2B_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_256, (xed_uint16_t)   0 },
/* VPERMI2B_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_512, (xed_uint16_t)   0 },
/* VPERMI2B_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_512, (xed_uint16_t)   0 },
/* VPERMI2D_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMI2D_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMI2D_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMI2D_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMI2D_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2D_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMI2PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMI2PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMI2PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMI2PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMI2PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMI2PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMI2PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMI2PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMI2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2Q_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMI2Q_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMI2Q_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMI2Q_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMI2Q_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2Q_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMI2W_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPERMI2W_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPERMI2W_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPERMI2W_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPERMI2W_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPERMI2W_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMI2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPERMIL2PD_XMMdq_XMMdq_MEMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PD_XMMdq_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PD_XMMdq_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PD_YMMqq_YMMqq_MEMqq_YMMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PD_YMMqq_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PD_YMMqq_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PS_XMMdq_XMMdq_MEMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PS_XMMdq_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PS_XMMdq_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PS_YMMqq_YMMqq_MEMqq_YMMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PS_YMMqq_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPERMIL2PS_YMMqq_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)     XED_ICLASS_VPERMIL2PS, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*    VPERMILPD_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPERMILPD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPERMILPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPERMILPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPERMILPD_XMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMILPD_XMMf64_MASKmskw_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMILPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMILPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMILPD_YMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMILPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMILPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMILPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*    VPERMILPD_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPERMILPD_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPERMILPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPERMILPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPERMILPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMILPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMILPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMILPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*    VPERMILPS_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPERMILPS_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPERMILPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPERMILPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPERMILPS_XMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMILPS_XMMf32_MASKmskw_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMILPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMILPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMILPS_YMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMILPS_YMMf32_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMILPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMILPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*    VPERMILPS_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPERMILPS_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPERMILPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPERMILPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPERMILPS_ZMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMILPS_ZMMf32_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMILPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMILPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMILPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMPD_YMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VPERMPD_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPERMPD_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPERMPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*     VPERMPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPERMPS, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPERMPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPERMPS, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPERMPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPERMPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VPERMQ_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPERMQ_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPERMQ_YMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMQ_YMMu64_MASKmskw_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMQ_ZMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMQ_ZMMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2B_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_128, (xed_uint16_t)   0 },
/* VPERMT2B_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_128, (xed_uint16_t)   0 },
/* VPERMT2B_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_256, (xed_uint16_t)   0 },
/* VPERMT2B_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_256, (xed_uint16_t)   0 },
/* VPERMT2B_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_512, (xed_uint16_t)   0 },
/* VPERMT2B_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2B, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_512, (xed_uint16_t)   0 },
/* VPERMT2D_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMT2D_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMT2D_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMT2D_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMT2D_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2D_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2D, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2PD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMT2PD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMT2PD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMT2PD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMT2PD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2PD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2PS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMT2PS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMT2PS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMT2PS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMT2PS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2PS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPERMT2PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2Q_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMT2Q_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPERMT2Q_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMT2Q_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPERMT2Q_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2Q_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2Q, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPERMT2W_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPERMT2W_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPERMT2W_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPERMT2W_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPERMT2W_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPERMT2W_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPERMT2W, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPERMW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPERMW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPERMW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPERMW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPERMW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPERMW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPERMW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPEXPANDB_XMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDB, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPEXPANDB_XMMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDB, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPEXPANDB_YMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDB, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPEXPANDB_YMMu8_MASKmskw_YMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDB, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPEXPANDB_ZMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDB, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPEXPANDB_ZMMu8_MASKmskw_ZMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDB, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPEXPANDD_XMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPEXPANDD_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPEXPANDD_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPEXPANDD_YMMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPEXPANDD_ZMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPEXPANDD_ZMMu32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDD, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPEXPANDQ_XMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDQ, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPEXPANDQ_XMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDQ, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPEXPANDQ_YMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDQ, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPEXPANDQ_YMMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDQ, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPEXPANDQ_ZMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDQ, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPEXPANDQ_ZMMu64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDQ, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPEXPANDW_XMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDW, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPEXPANDW_XMMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDW, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPEXPANDW_YMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDW, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPEXPANDW_YMMu16_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDW, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPEXPANDW_ZMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDW, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPEXPANDW_ZMMu16_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPEXPANDW, (xed_uint8_t)    XED_CATEGORY_EXPAND, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/*     VPEXTRB_GPR32d_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPEXTRB_GPR32u8_XMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t)   0 },
/*       VPEXTRB_MEMb_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPEXTRB_MEMu8_XMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t)   0 },
/*     VPEXTRD_GPR32d_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPEXTRD_GPR32u32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_128N, (xed_uint16_t)   0 },
/*       VPEXTRD_MEMd_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPEXTRD_MEMu32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_128N, (xed_uint16_t)   0 },
/*     VPEXTRQ_GPR64q_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPEXTRQ_GPR64u64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_128N, (xed_uint16_t)   0 },
/*       VPEXTRQ_MEMq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPEXTRQ_MEMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_128N, (xed_uint16_t)   0 },
/*  VPEXTRW_GPR32d_XMMdq_IMMb_15 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VPEXTRW_GPR32d_XMMdq_IMMb_C5 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPEXTRW_GPR32u16_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t)   0 },
/* VPEXTRW_MEMu16_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t)   0 },
/*       VPEXTRW_MEMw_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPEXTRW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPEXTRW_GPR32u16_XMMu16_IMM8_AVX512_C5 */ {  (xed_uint16_t)     XED_ICLASS_VPEXTRW_C5, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t) 140 },
/* VPGATHERDD_XMMu32_MASKmskw_MEMu32_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPGATHERDD_XMMu32_MEMd_XMMi32_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDD, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VPGATHERDD_YMMu32_MASKmskw_MEMu32_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPGATHERDD_YMMu32_MEMd_YMMi32_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDD, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VPGATHERDD_ZMMu32_MASKmskw_MEMu32_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPGATHERDQ_XMMu64_MASKmskw_MEMu64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDQ, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPGATHERDQ_XMMu64_MEMq_XMMi64_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDQ, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VPGATHERDQ_YMMu64_MASKmskw_MEMu64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDQ, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPGATHERDQ_YMMu64_MEMq_YMMi64_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDQ, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VPGATHERDQ_ZMMu64_MASKmskw_MEMu64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERDQ, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPGATHERQD_XMMu32_MASKmskw_MEMu32_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPGATHERQD_XMMu32_MASKmskw_MEMu32_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPGATHERQD_XMMu32_MEMd_XMMi32_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQD, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VPGATHERQD_XMMu32_MEMd_XMMi32_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQD, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VPGATHERQD_YMMu32_MASKmskw_MEMu32_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQD, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPGATHERQQ_XMMu64_MASKmskw_MEMu64_AVX512_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQQ, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPGATHERQQ_XMMu64_MEMq_XMMi64_VL128 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQQ, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VPGATHERQQ_YMMu64_MASKmskw_MEMu64_AVX512_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQQ, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPGATHERQQ_YMMu64_MEMq_YMMi64_VL256 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQQ, (xed_uint8_t) XED_CATEGORY_AVX2GATHER, (xed_uint8_t)XED_EXTENSION_AVX2GATHER, (xed_uint16_t)   XED_ISA_SET_AVX2GATHER, (xed_uint16_t)   0 },
/* VPGATHERQQ_ZMMu64_MASKmskw_MEMu64_AVX512_VL512 */ {  (xed_uint16_t)     XED_ICLASS_VPGATHERQQ, (xed_uint8_t)    XED_CATEGORY_GATHER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPHADDBD_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDBD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDBD_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDBD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDBQ_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDBQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDBQ_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDBQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDBW_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDBW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDBW_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDBW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*     VPHADDD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPHADDD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPHADDD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPHADDD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPHADDD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPHADDD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPHADDD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPHADDD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPHADDDQ_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDDQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDDQ_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDDQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*    VPHADDSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPHADDSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPHADDSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPHADDSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*         VPHADDUBD_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUBD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUBD_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUBD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUBQ_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUBQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUBQ_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUBQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUBW_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUBW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUBW_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUBW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUDQ_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUDQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUDQ_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUDQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUWD_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUWD_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUWQ_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUWQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*         VPHADDUWQ_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPHADDUWQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*     VPHADDW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPHADDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPHADDW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPHADDW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPHADDW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPHADDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPHADDW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPHADDW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPHADDWD_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDWD_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDWQ_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDWQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHADDWQ_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHADDWQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*       VPHMINPOSUW_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VPHMINPOSUW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VPHMINPOSUW_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VPHMINPOSUW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPHSUBBW_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBBW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHSUBBW_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBBW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*     VPHSUBD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPHSUBD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPHSUBD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPHSUBD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPHSUBD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPHSUBD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPHSUBD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPHSUBD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPHSUBDQ_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBDQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHSUBDQ_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBDQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*    VPHSUBSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPHSUBSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPHSUBSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPHSUBSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPHSUBW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPHSUBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPHSUBW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPHSUBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPHSUBW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPHSUBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPHSUBW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPHSUBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPHSUBWD_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*          VPHSUBWD_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPHSUBWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPINSRB_XMMdq_XMMdq_GPR32d_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPINSRB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPINSRB_XMMdq_XMMdq_MEMb_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPINSRB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPINSRB_XMMu8_XMMu8_GPR32u8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPINSRB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t)   0 },
/* VPINSRB_XMMu8_XMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPINSRB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t)   0 },
/* VPINSRD_XMMdq_XMMdq_GPR32d_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPINSRD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPINSRD_XMMdq_XMMdq_MEMd_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPINSRD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPINSRD_XMMu32_XMMu32_GPR32u32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPINSRD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_128N, (xed_uint16_t)   0 },
/* VPINSRD_XMMu32_XMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPINSRD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_128N, (xed_uint16_t)   0 },
/* VPINSRQ_XMMdq_XMMdq_GPR64q_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPINSRQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPINSRQ_XMMdq_XMMdq_MEMq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPINSRQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPINSRQ_XMMu64_XMMu64_GPR64u64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPINSRQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_128N, (xed_uint16_t)   0 },
/* VPINSRQ_XMMu64_XMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPINSRQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_128N, (xed_uint16_t)   0 },
/* VPINSRW_XMMdq_XMMdq_GPR32d_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPINSRW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPINSRW_XMMdq_XMMdq_MEMw_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPINSRW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPINSRW_XMMu16_XMMu16_GPR32u16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPINSRW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t)   0 },
/* VPINSRW_XMMu16_XMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPINSRW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512BW_128N, (xed_uint16_t)   0 },
/* VPLZCNTD_XMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPLZCNTD_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPLZCNTD_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPLZCNTD_YMMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPLZCNTD_ZMMu32_MASKmskw_MEMu32_AVX512CD */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPLZCNTD_ZMMu32_MASKmskw_ZMMu32_AVX512CD */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTD, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPLZCNTQ_XMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPLZCNTQ_XMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_128, (xed_uint16_t)   0 },
/* VPLZCNTQ_YMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPLZCNTQ_YMMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_256, (xed_uint16_t)   0 },
/* VPLZCNTQ_ZMMu64_MASKmskw_MEMu64_AVX512CD */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPLZCNTQ_ZMMu64_MASKmskw_ZMMu64_AVX512CD */ {  (xed_uint16_t)       XED_ICLASS_VPLZCNTQ, (xed_uint8_t)  XED_CATEGORY_CONFLICT, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512CD_512, (xed_uint16_t)   0 },
/* VPMACSDD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMACSDD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSDD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMACSDD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSDQH_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSDQH, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSDQH_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSDQH, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSDQL_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSDQL, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSDQL_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSDQL, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSDD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSSDD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSDD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSSDD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSDQH_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMACSSDQH, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSDQH_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMACSSDQH, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSDQL_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMACSSDQL, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSDQL_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMACSSDQL, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSWD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSSWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSWD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSSWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSWW_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSSWW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSSWW_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMACSSWW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSWD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMACSWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSWD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMACSWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSWW_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMACSWW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMACSWW_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMACSWW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMADCSSWD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMADCSSWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMADCSSWD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMADCSSWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMADCSWD_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMADCSWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMADCSWD_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMADCSWD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPMADD52HUQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52HUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_128, (xed_uint16_t)   0 },
/* VPMADD52HUQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52HUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_128, (xed_uint16_t)   0 },
/* VPMADD52HUQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52HUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_256, (xed_uint16_t)   0 },
/* VPMADD52HUQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52HUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_256, (xed_uint16_t)   0 },
/* VPMADD52HUQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52HUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_512, (xed_uint16_t)   0 },
/* VPMADD52HUQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52HUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_512, (xed_uint16_t)   0 },
/* VPMADD52LUQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52LUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_128, (xed_uint16_t)   0 },
/* VPMADD52LUQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52LUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_128, (xed_uint16_t)   0 },
/* VPMADD52LUQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52LUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_256, (xed_uint16_t)   0 },
/* VPMADD52LUQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52LUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_256, (xed_uint16_t)   0 },
/* VPMADD52LUQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52LUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_512, (xed_uint16_t)   0 },
/* VPMADD52LUQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPMADD52LUQ, (xed_uint8_t)      XED_CATEGORY_IFMA, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_IFMA_512, (xed_uint16_t)   0 },
/*  VPMADDUBSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VPMADDUBSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMADDUBSW_XMMi16_MASKmskw_XMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMADDUBSW_XMMi16_MASKmskw_XMMi16_XMMi16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMADDUBSW_YMMi16_MASKmskw_YMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMADDUBSW_YMMi16_MASKmskw_YMMi16_YMMi16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*  VPMADDUBSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPMADDUBSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMADDUBSW_ZMMi16_MASKmskw_ZMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMADDUBSW_ZMMi16_MASKmskw_ZMMi16_ZMMi16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPMADDUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPMADDWD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPMADDWD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMADDWD_XMMi32_MASKmskw_XMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMADDWD_XMMi32_MASKmskw_XMMi16_XMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMADDWD_YMMi32_MASKmskw_YMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMADDWD_YMMi32_MASKmskw_YMMi16_YMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*    VPMADDWD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPMADDWD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMADDWD_ZMMi32_MASKmskw_ZMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMADDWD_ZMMi32_MASKmskw_ZMMi16_ZMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMADDWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*  VPMASKMOVD_MEMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMASKMOVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPMASKMOVD_MEMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPMASKMOVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPMASKMOVD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMASKMOVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPMASKMOVD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPMASKMOVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPMASKMOVQ_MEMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMASKMOVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPMASKMOVQ_MEMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPMASKMOVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPMASKMOVQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPMASKMOVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPMASKMOVQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPMASKMOVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMAXSB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMAXSB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMAXSB_XMMi8_MASKmskw_XMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMAXSB_XMMi8_MASKmskw_XMMi8_XMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMAXSB_YMMi8_MASKmskw_YMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMAXSB_YMMi8_MASKmskw_YMMi8_YMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*     VPMAXSB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMAXSB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMAXSB_ZMMi8_MASKmskw_ZMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMAXSB_ZMMi8_MASKmskw_ZMMi8_ZMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMAXSD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMAXSD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMAXSD_XMMi32_MASKmskw_XMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMAXSD_XMMi32_MASKmskw_XMMi32_XMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMAXSD_YMMi32_MASKmskw_YMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMAXSD_YMMi32_MASKmskw_YMMi32_YMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*     VPMAXSD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMAXSD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMAXSD_ZMMi32_MASKmskw_ZMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMAXSD_ZMMi32_MASKmskw_ZMMi32_ZMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMAXSQ_XMMi64_MASKmskw_XMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMAXSQ_XMMi64_MASKmskw_XMMi64_XMMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMAXSQ_YMMi64_MASKmskw_YMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMAXSQ_YMMi64_MASKmskw_YMMi64_YMMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMAXSQ_ZMMi64_MASKmskw_ZMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMAXSQ_ZMMi64_MASKmskw_ZMMi64_ZMMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPMAXSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMAXSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMAXSW_XMMi16_MASKmskw_XMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMAXSW_XMMi16_MASKmskw_XMMi16_XMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMAXSW_YMMi16_MASKmskw_YMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMAXSW_YMMi16_MASKmskw_YMMi16_YMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*     VPMAXSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMAXSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMAXSW_ZMMi16_MASKmskw_ZMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMAXSW_ZMMi16_MASKmskw_ZMMi16_ZMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMAXUB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMAXUB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMAXUB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMAXUB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPMAXUB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMAXUB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMAXUB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMAXUB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMAXUB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMAXUB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMAXUD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMAXUD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMAXUD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMAXUD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*     VPMAXUD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMAXUD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMAXUD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMAXUD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMAXUD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMAXUD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMAXUQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMAXUQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMAXUQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMAXUQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMAXUQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMAXUQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPMAXUW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMAXUW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMAXUW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMAXUW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPMAXUW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMAXUW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMAXUW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMAXUW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMAXUW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMAXUW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMAXUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMINSB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMINSB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMINSB_XMMi8_MASKmskw_XMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMINSB_XMMi8_MASKmskw_XMMi8_XMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMINSB_YMMi8_MASKmskw_YMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMINSB_YMMi8_MASKmskw_YMMi8_YMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*     VPMINSB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMINSB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMINSB_ZMMi8_MASKmskw_ZMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMINSB_ZMMi8_MASKmskw_ZMMi8_ZMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMINSD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMINSD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMINSD_XMMi32_MASKmskw_XMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMINSD_XMMi32_MASKmskw_XMMi32_XMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMINSD_YMMi32_MASKmskw_YMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMINSD_YMMi32_MASKmskw_YMMi32_YMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*     VPMINSD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMINSD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMINSD_ZMMi32_MASKmskw_ZMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMINSD_ZMMi32_MASKmskw_ZMMi32_ZMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMINSQ_XMMi64_MASKmskw_XMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMINSQ_XMMi64_MASKmskw_XMMi64_XMMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMINSQ_YMMi64_MASKmskw_YMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMINSQ_YMMi64_MASKmskw_YMMi64_YMMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMINSQ_ZMMi64_MASKmskw_ZMMi64_MEMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMINSQ_ZMMi64_MASKmskw_ZMMi64_ZMMi64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPMINSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMINSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMINSW_XMMi16_MASKmskw_XMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMINSW_XMMi16_MASKmskw_XMMi16_XMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMINSW_YMMi16_MASKmskw_YMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMINSW_YMMi16_MASKmskw_YMMi16_YMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*     VPMINSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMINSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMINSW_ZMMi16_MASKmskw_ZMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMINSW_ZMMi16_MASKmskw_ZMMi16_ZMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMINUB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMINUB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMINUB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMINUB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPMINUB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMINUB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMINUB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMINUB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMINUB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMINUB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMINUD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMINUD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMINUD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMINUD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*     VPMINUD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMINUD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMINUD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMINUD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMINUD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMINUD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMINUQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMINUQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMINUQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMINUQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMINUQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMINUQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPMINUW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMINUW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMINUW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMINUW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPMINUW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMINUW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMINUW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMINUW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMINUW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMINUW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMINUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVB2M_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVB2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVB2M_MASKmskw_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVB2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVB2M_MASKmskw_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVB2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVD2M_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVD2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VPMOVD2M_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVD2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VPMOVD2M_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVD2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VPMOVDB_MEMu8_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVDB_MEMu8_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVDB_MEMu8_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVDB_XMMu8_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVDB_XMMu8_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVDB_XMMu8_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVDW_MEMu16_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVDW_MEMu16_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVDW_MEMu16_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVDW_XMMu16_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVDW_XMMu16_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVDW_YMMu16_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVM2B_XMMu8_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2B, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVM2B_YMMu8_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2B, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVM2B_ZMMu8_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2B, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVM2D_XMMu32_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2D, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VPMOVM2D_YMMu32_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2D, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VPMOVM2D_ZMMu32_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2D, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VPMOVM2Q_XMMu64_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2Q, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VPMOVM2Q_YMMu64_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2Q, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VPMOVM2Q_ZMMu64_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2Q, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VPMOVM2W_XMMu16_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2W, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVM2W_YMMu16_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2W, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVM2W_ZMMu16_MASKmskw_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVM2W, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*        VPMOVMSKB_GPR32d_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVMSKB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VPMOVMSKB_GPR32d_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVMSKB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVQ2M_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVQ2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VPMOVQ2M_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVQ2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VPMOVQ2M_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVQ2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VPMOVQB_MEMu8_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVQB_MEMu8_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVQB_MEMu8_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVQB_XMMu8_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVQB_XMMu8_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVQB_XMMu8_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVQD_MEMu32_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVQD_MEMu32_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVQD_MEMu32_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVQD_XMMu32_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVQD_XMMu32_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVQD_YMMu32_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVQW_MEMu16_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVQW_MEMu16_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVQW_MEMu16_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVQW_XMMu16_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVQW_XMMu16_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVQW_XMMu16_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSDB_MEMi8_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSDB_MEMi8_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSDB_MEMi8_MASKmskw_ZMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSDB_XMMi8_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSDB_XMMi8_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSDB_XMMi8_MASKmskw_ZMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSDW_MEMi16_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSDW_MEMi16_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSDW_MEMi16_MASKmskw_ZMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSDW_XMMi16_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSDW_XMMi16_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSDW_YMMi16_MASKmskw_ZMMi32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSQB_MEMi8_MASKmskw_XMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSQB_MEMi8_MASKmskw_YMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSQB_MEMi8_MASKmskw_ZMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSQB_XMMi8_MASKmskw_XMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSQB_XMMi8_MASKmskw_YMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSQB_XMMi8_MASKmskw_ZMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSQD_MEMi32_MASKmskw_XMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSQD_MEMi32_MASKmskw_YMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSQD_MEMi32_MASKmskw_ZMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSQD_XMMi32_MASKmskw_XMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSQD_XMMi32_MASKmskw_YMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSQD_YMMi32_MASKmskw_ZMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSQW_MEMi16_MASKmskw_XMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSQW_MEMi16_MASKmskw_YMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSQW_MEMi16_MASKmskw_ZMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSQW_XMMi16_MASKmskw_XMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSQW_XMMi16_MASKmskw_YMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSQW_XMMi16_MASKmskw_ZMMi64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSWB_MEMi8_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVSWB_MEMi8_MASKmskw_YMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVSWB_MEMi8_MASKmskw_ZMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVSWB_XMMi8_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVSWB_XMMi8_MASKmskw_YMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVSWB_YMMi8_MASKmskw_ZMMi16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*          VPMOVSXBD_XMMdq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVSXBD_XMMdq_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVSXBD_XMMi32_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXBD_XMMi32_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXBD_YMMi32_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSXBD_YMMi32_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*          VPMOVSXBD_YMMqq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPMOVSXBD_YMMqq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVSXBD_ZMMi32_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSXBD_ZMMi32_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPMOVSXBQ_XMMdq_MEMw */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVSXBQ_XMMdq_XMMw */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVSXBQ_XMMi64_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXBQ_XMMi64_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXBQ_YMMi64_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSXBQ_YMMi64_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*          VPMOVSXBQ_YMMqq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPMOVSXBQ_YMMqq_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVSXBQ_ZMMi64_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSXBQ_ZMMi64_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPMOVSXBW_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVSXBW_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVSXBW_XMMi16_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVSXBW_XMMi16_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVSXBW_YMMi16_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVSXBW_YMMi16_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*         VPMOVSXBW_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*         VPMOVSXBW_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVSXBW_ZMMi16_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVSXBW_ZMMi16_MASKmskw_YMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*          VPMOVSXDQ_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVSXDQ_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVSXDQ_XMMi64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXDQ_XMMi64_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXDQ_YMMi64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSXDQ_YMMi64_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VPMOVSXDQ_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*         VPMOVSXDQ_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVSXDQ_ZMMi64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSXDQ_ZMMi64_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPMOVSXWD_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVSXWD_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVSXWD_XMMi32_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXWD_XMMi32_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXWD_YMMi32_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSXWD_YMMi32_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VPMOVSXWD_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*         VPMOVSXWD_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVSXWD_ZMMi32_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSXWD_ZMMi32_MASKmskw_YMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPMOVSXWQ_XMMdq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVSXWQ_XMMdq_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVSXWQ_XMMi64_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXWQ_XMMi64_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVSXWQ_YMMi64_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVSXWQ_YMMi64_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*          VPMOVSXWQ_YMMqq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPMOVSXWQ_YMMqq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVSXWQ_ZMMi64_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVSXWQ_ZMMi64_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVSXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSDB_MEMu8_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSDB_MEMu8_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSDB_MEMu8_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSDB_XMMu8_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSDB_XMMu8_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSDB_XMMu8_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSDW_MEMu16_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSDW_MEMu16_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSDW_MEMu16_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSDW_XMMu16_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSDW_XMMu16_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSDW_YMMu16_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSDW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSQB_MEMu8_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSQB_MEMu8_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSQB_MEMu8_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSQB_XMMu8_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSQB_XMMu8_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSQB_XMMu8_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSQD_MEMu32_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSQD_MEMu32_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSQD_MEMu32_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSQD_XMMu32_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSQD_XMMu32_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSQD_YMMu32_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSQW_MEMu16_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSQW_MEMu16_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSQW_MEMu16_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSQW_XMMu16_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVUSQW_XMMu16_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVUSQW_XMMu16_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSQW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVUSWB_MEMu8_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVUSWB_MEMu8_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVUSWB_MEMu8_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVUSWB_XMMu8_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVUSWB_XMMu8_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVUSWB_YMMu8_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVUSWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVW2M_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVW2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVW2M_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVW2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVW2M_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMOVW2M, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVWB_MEMu8_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVWB_MEMu8_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVWB_MEMu8_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVWB_XMMu8_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVWB_XMMu8_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVWB_YMMu8_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMOVWB, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*          VPMOVZXBD_XMMdq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVZXBD_XMMdq_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVZXBD_XMMi32_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXBD_XMMi32_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXBD_YMMi32_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVZXBD_YMMi32_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*          VPMOVZXBD_YMMqq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPMOVZXBD_YMMqq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVZXBD_ZMMi32_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVZXBD_ZMMi32_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPMOVZXBQ_XMMdq_MEMw */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVZXBQ_XMMdq_XMMw */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVZXBQ_XMMi64_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXBQ_XMMi64_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXBQ_YMMi64_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVZXBQ_YMMi64_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*          VPMOVZXBQ_YMMqq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPMOVZXBQ_YMMqq_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVZXBQ_ZMMi64_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVZXBQ_ZMMi64_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPMOVZXBW_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVZXBW_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVZXBW_XMMi16_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVZXBW_XMMi16_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMOVZXBW_YMMi16_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMOVZXBW_YMMi16_MASKmskw_XMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*         VPMOVZXBW_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*         VPMOVZXBW_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVZXBW_ZMMi16_MASKmskw_MEMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMOVZXBW_ZMMi16_MASKmskw_YMMi8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXBW, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*          VPMOVZXDQ_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVZXDQ_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVZXDQ_XMMi64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXDQ_XMMi64_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXDQ_YMMi64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVZXDQ_YMMi64_MASKmskw_XMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VPMOVZXDQ_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*         VPMOVZXDQ_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVZXDQ_ZMMi64_MASKmskw_MEMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVZXDQ_ZMMi64_MASKmskw_YMMi32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXDQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPMOVZXWD_XMMdq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVZXWD_XMMdq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVZXWD_XMMi32_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXWD_XMMi32_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXWD_YMMi32_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVZXWD_YMMi32_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*         VPMOVZXWD_YMMqq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*         VPMOVZXWD_YMMqq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVZXWD_ZMMi32_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVZXWD_ZMMi32_MASKmskw_YMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWD, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*          VPMOVZXWQ_XMMdq_MEMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VPMOVZXWQ_XMMdq_XMMd */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMOVZXWQ_XMMi64_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXWQ_XMMi64_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMOVZXWQ_YMMi64_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMOVZXWQ_YMMi64_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*          VPMOVZXWQ_YMMqq_MEMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*          VPMOVZXWQ_YMMqq_XMMq */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMOVZXWQ_ZMMi64_MASKmskw_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMOVZXWQ_ZMMi64_MASKmskw_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMOVZXWQ, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPMULDQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMULDQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMULDQ_XMMi64_MASKmskw_XMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMULDQ_XMMi64_MASKmskw_XMMi32_XMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMULDQ_YMMi64_MASKmskw_YMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMULDQ_YMMi64_MASKmskw_YMMi32_YMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*     VPMULDQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMULDQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMULDQ_ZMMi64_MASKmskw_ZMMi32_MEMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMULDQ_ZMMi64_MASKmskw_ZMMi32_ZMMi32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VPMULHRSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VPMULHRSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMULHRSW_XMMi16_MASKmskw_XMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMULHRSW_XMMi16_MASKmskw_XMMi16_XMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMULHRSW_YMMi16_MASKmskw_YMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMULHRSW_YMMi16_MASKmskw_YMMi16_YMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*   VPMULHRSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*   VPMULHRSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMULHRSW_ZMMi16_MASKmskw_ZMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMULHRSW_ZMMi16_MASKmskw_ZMMi16_ZMMi16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPMULHRSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPMULHUW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPMULHUW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMULHUW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMULHUW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*    VPMULHUW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPMULHUW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMULHUW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMULHUW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMULHUW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMULHUW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULHUW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMULHW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMULHW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMULHW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMULHW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPMULHW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMULHW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMULHW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMULHW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMULHW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMULHW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPMULLD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMULLD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMULLD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMULLD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*     VPMULLD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMULLD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMULLD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMULLD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMULLD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMULLD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMULLQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VPMULLQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VPMULLQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VPMULLQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VPMULLQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VPMULLQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/*     VPMULLW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPMULLW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMULLW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPMULLW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPMULLW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPMULLW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMULLW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMULLW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPMULLW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMULLW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPMULLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPMULTISHIFTQB_XMMu8_MASKmskw_XMMu8_MEMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPMULTISHIFTQB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_128, (xed_uint16_t)   0 },
/* VPMULTISHIFTQB_XMMu8_MASKmskw_XMMu8_XMMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPMULTISHIFTQB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_128, (xed_uint16_t)   0 },
/* VPMULTISHIFTQB_YMMu8_MASKmskw_YMMu8_MEMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPMULTISHIFTQB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_256, (xed_uint16_t)   0 },
/* VPMULTISHIFTQB_YMMu8_MASKmskw_YMMu8_YMMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPMULTISHIFTQB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_256, (xed_uint16_t)   0 },
/* VPMULTISHIFTQB_ZMMu8_MASKmskw_ZMMu8_MEMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPMULTISHIFTQB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_512, (xed_uint16_t)   0 },
/* VPMULTISHIFTQB_ZMMu8_MASKmskw_ZMMu8_ZMMu64_AVX512 */ {  (xed_uint16_t) XED_ICLASS_VPMULTISHIFTQB, (xed_uint8_t) XED_CATEGORY_AVX512_VBMI, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI_512, (xed_uint16_t)   0 },
/*    VPMULUDQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPMULUDQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPMULUDQ_XMMu64_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPMULUDQ_XMMu64_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*    VPMULUDQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPMULUDQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPMULUDQ_YMMu64_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMULUDQ_YMMu64_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPMULUDQ_ZMMu64_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPMULUDQ_ZMMu64_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPMULUDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPOPCNTB_XMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_128, (xed_uint16_t)   0 },
/* VPOPCNTB_XMMu8_MASKmskw_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_128, (xed_uint16_t)   0 },
/* VPOPCNTB_YMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_256, (xed_uint16_t)   0 },
/* VPOPCNTB_YMMu8_MASKmskw_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_256, (xed_uint16_t)   0 },
/* VPOPCNTB_ZMMu8_MASKmskw_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTB, (xed_uint8_t) XED_CATEGORY_AVX512_BITALG, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_512, (xed_uint16_t)   0 },
/* VPOPCNTB_ZMMu8_MASKmskw_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTB, (xed_uint8_t) XED_CATEGORY_AVX512_BITALG, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_512, (xed_uint16_t)   0 },
/* VPOPCNTD_XMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_128, (xed_uint16_t)   0 },
/* VPOPCNTD_XMMu32_MASKmskw_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_128, (xed_uint16_t)   0 },
/* VPOPCNTD_YMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_256, (xed_uint16_t)   0 },
/* VPOPCNTD_YMMu32_MASKmskw_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_256, (xed_uint16_t)   0 },
/* VPOPCNTD_ZMMu32_MASKmskw_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_512, (xed_uint16_t)   0 },
/* VPOPCNTD_ZMMu32_MASKmskw_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_512, (xed_uint16_t)   0 },
/* VPOPCNTQ_XMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_128, (xed_uint16_t)   0 },
/* VPOPCNTQ_XMMu64_MASKmskw_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_128, (xed_uint16_t)   0 },
/* VPOPCNTQ_YMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_256, (xed_uint16_t)   0 },
/* VPOPCNTQ_YMMu64_MASKmskw_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_256, (xed_uint16_t)   0 },
/* VPOPCNTQ_ZMMu64_MASKmskw_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_512, (xed_uint16_t)   0 },
/* VPOPCNTQ_ZMMu64_MASKmskw_ZMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VPOPCNTDQ_512, (xed_uint16_t)   0 },
/* VPOPCNTW_XMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_128, (xed_uint16_t)   0 },
/* VPOPCNTW_XMMu16_MASKmskw_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_128, (xed_uint16_t)   0 },
/* VPOPCNTW_YMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_256, (xed_uint16_t)   0 },
/* VPOPCNTW_YMMu16_MASKmskw_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_256, (xed_uint16_t)   0 },
/* VPOPCNTW_ZMMu16_MASKmskw_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTW, (xed_uint8_t) XED_CATEGORY_AVX512_BITALG, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_512, (xed_uint16_t)   0 },
/* VPOPCNTW_ZMMu16_MASKmskw_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPOPCNTW, (xed_uint8_t) XED_CATEGORY_AVX512_BITALG, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_512, (xed_uint16_t)   0 },
/*        VPOR_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)           XED_ICLASS_VPOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VPOR_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)           XED_ICLASS_VPOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*        VPOR_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)           XED_ICLASS_VPOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*        VPOR_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)           XED_ICLASS_VPOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPORD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPORD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPORD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPORD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPORD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPORD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPORQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPORQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPORQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPORQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPORQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPORQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)          XED_ICLASS_VPORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPPERM_XMMdq_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPPERM, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPPERM_XMMdq_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPPERM, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPPERM_XMMdq_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPPERM, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPROLD_XMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPROLD_XMMu32_MASKmskw_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPROLD_YMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPROLD_YMMu32_MASKmskw_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPROLD_ZMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPROLD_ZMMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPROLQ_XMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPROLQ_XMMu64_MASKmskw_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPROLQ_YMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPROLQ_YMMu64_MASKmskw_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPROLQ_ZMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPROLQ_ZMMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPROLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPROLVD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPROLVD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPROLVD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPROLVD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPROLVD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPROLVD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPROLVQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPROLVQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPROLVQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPROLVQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPROLVQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPROLVQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPROLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPRORD_XMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPRORD_XMMu32_MASKmskw_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPRORD_YMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPRORD_YMMu32_MASKmskw_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPRORD_ZMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPRORD_ZMMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPRORQ_XMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPRORQ_XMMu64_MASKmskw_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPRORQ_YMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPRORQ_YMMu64_MASKmskw_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPRORQ_ZMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPRORQ_ZMMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPRORQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPRORVD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPRORVD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPRORVD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPRORVD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPRORVD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPRORVD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPRORVQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPRORVQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPRORVQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPRORVQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPRORVQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPRORVQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPRORVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VPROTB_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPROTB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTB_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*       VPROTB_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPROTB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*       VPROTD_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPROTD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTD_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*       VPROTD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPROTD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*       VPROTQ_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPROTQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTQ_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*       VPROTQ_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPROTQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*       VPROTW_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPROTW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTW_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*       VPROTW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPROTW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPROTW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPROTW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*     VPSADBW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSADBW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSADBW_XMMu16_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSADBW_XMMu16_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPSADBW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSADBW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSADBW_YMMu16_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSADBW_YMMu16_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSADBW_ZMMu16_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSADBW_ZMMu16_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSADBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSCATTERDD_MEMu32_MASKmskw_XMMu32_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERDD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSCATTERDD_MEMu32_MASKmskw_YMMu32_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERDD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSCATTERDD_MEMu32_MASKmskw_ZMMu32_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERDD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSCATTERDQ_MEMu64_MASKmskw_XMMu64_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERDQ, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSCATTERDQ_MEMu64_MASKmskw_YMMu64_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERDQ, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSCATTERDQ_MEMu64_MASKmskw_ZMMu64_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERDQ, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSCATTERQD_MEMu32_MASKmskw_XMMu32_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERQD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSCATTERQD_MEMu32_MASKmskw_XMMu32_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERQD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSCATTERQD_MEMu32_MASKmskw_YMMu32_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERQD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSCATTERQQ_MEMu64_MASKmskw_XMMu64_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERQQ, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSCATTERQQ_MEMu64_MASKmskw_YMMu64_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERQQ, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSCATTERQQ_MEMu64_MASKmskw_ZMMu64_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VPSCATTERQQ, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VPSHAB_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAD_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAQ_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAW_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHAW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHAW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLB_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLB, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLD_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLD, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPSHLDD_XMMu32_MASKmskw_XMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDD_XMMu32_MASKmskw_XMMu32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDD_YMMu32_MASKmskw_YMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDD_YMMu32_MASKmskw_YMMu32_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDD_ZMMu32_MASKmskw_ZMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDQ_XMMu64_MASKmskw_XMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDQ_XMMu64_MASKmskw_XMMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDQ_YMMu64_MASKmskw_YMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDQ_YMMu64_MASKmskw_YMMu64_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDVD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDVD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDVD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDVD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDVD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDVD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDVQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDVQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDVQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDVQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDVQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDVQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDVW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDVW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDVW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDVW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDVW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDVW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHLDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDW_XMMu16_MASKmskw_XMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDW_XMMu16_MASKmskw_XMMu16_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHLDW_YMMu16_MASKmskw_YMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDW_YMMu16_MASKmskw_YMMu16_YMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHLDW_ZMMu16_MASKmskw_ZMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHLDW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHLDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/*      VPSHLQ_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLQ, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLW_XMMdq_MEMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/*      VPSHLW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSHLW, (xed_uint8_t)       XED_CATEGORY_XOP, (xed_uint8_t)   XED_EXTENSION_XOP, (xed_uint16_t)          XED_ISA_SET_XOP, (xed_uint16_t)   0 },
/* VPSHRDD_XMMu32_MASKmskw_XMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDD_XMMu32_MASKmskw_XMMu32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDD_YMMu32_MASKmskw_YMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDD_YMMu32_MASKmskw_YMMu32_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDD_ZMMu32_MASKmskw_ZMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDQ_XMMu64_MASKmskw_XMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDQ_XMMu64_MASKmskw_XMMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDQ_YMMu64_MASKmskw_YMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDQ_YMMu64_MASKmskw_YMMu64_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDVD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDVD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDVD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDVD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDVD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDVD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVD, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDVQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDVQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDVQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDVQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDVQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDVQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVQ, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDVW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDVW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDVW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDVW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDVW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDVW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHRDVW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDW_XMMu16_MASKmskw_XMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDW_XMMu16_MASKmskw_XMMu16_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_128, (xed_uint16_t)   0 },
/* VPSHRDW_YMMu16_MASKmskw_YMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDW_YMMu16_MASKmskw_YMMu16_YMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_256, (xed_uint16_t)   0 },
/* VPSHRDW_ZMMu16_MASKmskw_ZMMu16_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/* VPSHRDW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHRDW, (xed_uint8_t)     XED_CATEGORY_VBMI2, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_VBMI2_512, (xed_uint16_t)   0 },
/*     VPSHUFB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSHUFB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSHUFB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSHUFB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPSHUFB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSHUFB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSHUFB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSHUFB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSHUFB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSHUFB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSHUFBITQMB_MASKmskw_MASKmskw_XMMu64_MEMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPSHUFBITQMB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_128, (xed_uint16_t)   0 },
/* VPSHUFBITQMB_MASKmskw_MASKmskw_XMMu64_XMMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPSHUFBITQMB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_128, (xed_uint16_t)   0 },
/* VPSHUFBITQMB_MASKmskw_MASKmskw_YMMu64_MEMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPSHUFBITQMB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_256, (xed_uint16_t)   0 },
/* VPSHUFBITQMB_MASKmskw_MASKmskw_YMMu64_YMMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPSHUFBITQMB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_256, (xed_uint16_t)   0 },
/* VPSHUFBITQMB_MASKmskw_MASKmskw_ZMMu64_MEMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPSHUFBITQMB, (xed_uint8_t) XED_CATEGORY_AVX512_BITALG, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_512, (xed_uint16_t)   0 },
/* VPSHUFBITQMB_MASKmskw_MASKmskw_ZMMu64_ZMMu8_AVX512 */ {  (xed_uint16_t)   XED_ICLASS_VPSHUFBITQMB, (xed_uint8_t) XED_CATEGORY_AVX512_BITALG, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_BITALG_512, (xed_uint16_t)   0 },
/*      VPSHUFD_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSHUFD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSHUFD_XMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSHUFD_XMMu32_MASKmskw_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*      VPSHUFD_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSHUFD_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSHUFD_YMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSHUFD_YMMu32_MASKmskw_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSHUFD_ZMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSHUFD_ZMMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSHUFD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPSHUFHW_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSHUFHW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSHUFHW_XMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSHUFHW_XMMu16_MASKmskw_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPSHUFHW_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSHUFHW_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSHUFHW_YMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSHUFHW_YMMu16_MASKmskw_YMMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSHUFHW_ZMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSHUFHW_ZMMu16_MASKmskw_ZMMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFHW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPSHUFLW_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSHUFLW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSHUFLW_XMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSHUFLW_XMMu16_MASKmskw_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*     VPSHUFLW_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSHUFLW_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSHUFLW_YMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSHUFLW_YMMu16_MASKmskw_YMMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSHUFLW_ZMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSHUFLW_ZMMu16_MASKmskw_ZMMu16_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSHUFLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPSIGNB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGNB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSIGNB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGNB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSIGNB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGNB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSIGNB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGNB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSIGND_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGND, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSIGND_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGND, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSIGND_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGND, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSIGND_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGND, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSIGNW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGNW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSIGNW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGNW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSIGNW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGNW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSIGNW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSIGNW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSLLD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSLLD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSLLD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSLLD_XMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSLLD_XMMu32_MASKmskw_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSLLD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSLLD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*       VPSLLD_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSLLD_YMMqq_YMMqq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSLLD_YMMqq_YMMqq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSLLD_YMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLD_YMMu32_MASKmskw_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLD_YMMu32_MASKmskw_YMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLD_ZMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLD_ZMMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLD_ZMMu32_MASKmskw_ZMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VPSLLDQ_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPSLLDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSLLDQ_XMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSLLDQ_XMMu8_XMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*      VPSLLDQ_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPSLLDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSLLDQ_YMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSLLDQ_YMMu8_YMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSLLDQ_ZMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSLLDQ_ZMMu8_ZMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPSLLQ_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSLLQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSLLQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSLLQ_XMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSLLQ_XMMu64_MASKmskw_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSLLQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSLLQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*       VPSLLQ_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSLLQ_YMMqq_YMMqq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSLLQ_YMMqq_YMMqq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSLLQ_YMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLQ_YMMu64_MASKmskw_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLQ_YMMu64_MASKmskw_YMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLQ_ZMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLQ_ZMMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLQ_ZMMu64_MASKmskw_ZMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPSLLVD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSLLVD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSLLVD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSLLVD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*     VPSLLVD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSLLVD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSLLVD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLVD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLVD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLVD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPSLLVQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSLLVQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSLLVQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSLLVQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*     VPSLLVQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSLLVQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSLLVQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLVQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSLLVQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLVQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSLLVW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSLLVW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSLLVW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSLLVW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSLLVW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSLLVW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSLLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPSLLW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSLLW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSLLW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSLLW_XMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSLLW_XMMu16_MASKmskw_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSLLW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSLLW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*       VPSLLW_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSLLW_YMMqq_YMMqq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSLLW_YMMqq_YMMqq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSLLW_YMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSLLW_YMMu16_MASKmskw_YMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSLLW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSLLW_YMMu16_MASKmskw_YMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSLLW_ZMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSLLW_ZMMu16_MASKmskw_ZMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSLLW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSLLW_ZMMu16_MASKmskw_ZMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSLLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPSRAD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRAD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRAD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSRAD_XMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAD_XMMu32_MASKmskw_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*       VPSRAD_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSRAD_YMMqq_YMMqq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSRAD_YMMqq_YMMqq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRAD_YMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAD_YMMu32_MASKmskw_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAD_YMMu32_MASKmskw_YMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAD_ZMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAD_ZMMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAD_ZMMu32_MASKmskw_ZMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAQ_XMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAQ_XMMu64_MASKmskw_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAQ_YMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAQ_YMMu64_MASKmskw_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAQ_YMMu64_MASKmskw_YMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAQ_ZMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAQ_ZMMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAQ_ZMMu64_MASKmskw_ZMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPSRAVD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSRAVD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRAVD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAVD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*     VPSRAVD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSRAVD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRAVD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAVD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAVD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAVD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAVQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAVQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRAVQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAVQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRAVQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAVQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRAVW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRAVW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRAVW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRAVW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRAVW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRAVW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRAVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPSRAW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRAW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRAW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSRAW_XMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRAW_XMMu16_MASKmskw_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRAW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRAW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*       VPSRAW_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSRAW_YMMqq_YMMqq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSRAW_YMMqq_YMMqq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRAW_YMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRAW_YMMu16_MASKmskw_YMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRAW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRAW_YMMu16_MASKmskw_YMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRAW_ZMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRAW_ZMMu16_MASKmskw_ZMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRAW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRAW_ZMMu16_MASKmskw_ZMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRAW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPSRLD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRLD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRLD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSRLD_XMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRLD_XMMu32_MASKmskw_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRLD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRLD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*       VPSRLD_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSRLD_YMMqq_YMMqq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSRLD_YMMqq_YMMqq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRLD_YMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLD_YMMu32_MASKmskw_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLD_YMMu32_MASKmskw_YMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLD_ZMMu32_MASKmskw_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLD_ZMMu32_MASKmskw_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLD_ZMMu32_MASKmskw_ZMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VPSRLDQ_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPSRLDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSRLDQ_XMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRLDQ_XMMu8_XMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*      VPSRLDQ_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VPSRLDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRLDQ_YMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRLDQ_YMMu8_YMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRLDQ_ZMMu8_MEMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRLDQ_ZMMu8_ZMMu8_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPSRLQ_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRLQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRLQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSRLQ_XMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRLQ_XMMu64_MASKmskw_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRLQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRLQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*       VPSRLQ_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSRLQ_YMMqq_YMMqq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSRLQ_YMMqq_YMMqq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRLQ_YMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLQ_YMMu64_MASKmskw_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLQ_YMMu64_MASKmskw_YMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLQ_ZMMu64_MASKmskw_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLQ_ZMMu64_MASKmskw_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLQ_ZMMu64_MASKmskw_ZMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPSRLVD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSRLVD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRLVD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRLVD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*     VPSRLVD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSRLVD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRLVD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLVD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLVD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLVD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPSRLVQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSRLVQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRLVQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSRLVQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*     VPSRLVQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSRLVQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRLVQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLVQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSRLVQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLVQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSRLVW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRLVW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRLVW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRLVW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRLVW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRLVW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSRLVW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPSRLW_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRLW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSRLW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSRLW_XMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRLW_XMMu16_MASKmskw_XMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRLW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSRLW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*       VPSRLW_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSRLW_YMMqq_YMMqq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPSRLW_YMMqq_YMMqq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSRLW_YMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRLW_YMMu16_MASKmskw_YMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRLW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRLW_YMMu16_MASKmskw_YMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSRLW_ZMMu16_MASKmskw_MEMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRLW_ZMMu16_MASKmskw_ZMMu16_IMM8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRLW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSRLW_ZMMu16_MASKmskw_ZMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSRLW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*      VPSUBB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSUBB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSUBB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSUBB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*      VPSUBB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSUBB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSUBB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSUBB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*      VPSUBD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSUBD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSUBD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSUBD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*      VPSUBD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSUBD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSUBD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSUBD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSUBD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSUBD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VPSUBQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSUBQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSUBQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPSUBQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*      VPSUBQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSUBQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSUBQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSUBQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPSUBQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPSUBQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*     VPSUBSB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSUBSB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSUBSB_XMMi8_MASKmskw_XMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSUBSB_XMMi8_MASKmskw_XMMi8_XMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSUBSB_YMMi8_MASKmskw_YMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBSB_YMMi8_MASKmskw_YMMi8_YMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*     VPSUBSB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSUBSB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSUBSB_ZMMi8_MASKmskw_ZMMi8_MEMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSUBSB_ZMMi8_MASKmskw_ZMMi8_ZMMi8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*     VPSUBSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VPSUBSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSUBSW_XMMi16_MASKmskw_XMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSUBSW_XMMi16_MASKmskw_XMMi16_XMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSUBSW_YMMi16_MASKmskw_YMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBSW_YMMi16_MASKmskw_YMMi16_YMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/*     VPSUBSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*     VPSUBSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSUBSW_ZMMi16_MASKmskw_ZMMi16_MEMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSUBSW_ZMMi16_MASKmskw_ZMMi16_ZMMi16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VPSUBSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPSUBUSB_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPSUBUSB_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSUBUSB_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSUBUSB_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*    VPSUBUSB_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPSUBUSB_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSUBUSB_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBUSB_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBUSB_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSUBUSB_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSB, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*    VPSUBUSW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*    VPSUBUSW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSUBUSW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSUBUSW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*    VPSUBUSW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*    VPSUBUSW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSUBUSW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBUSW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBUSW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSUBUSW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPSUBUSW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*      VPSUBW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VPSUBW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPSUBW_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPSUBW_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*      VPSUBW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*      VPSUBW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPSUBW_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBW_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPSUBW_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPSUBW_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPSUBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPTERNLOGD_XMMu32_MASKmskw_XMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTERNLOGD_XMMu32_MASKmskw_XMMu32_XMMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTERNLOGD_YMMu32_MASKmskw_YMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTERNLOGD_YMMu32_MASKmskw_YMMu32_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTERNLOGD_ZMMu32_MASKmskw_ZMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTERNLOGD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTERNLOGQ_XMMu64_MASKmskw_XMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTERNLOGQ_XMMu64_MASKmskw_XMMu64_XMMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTERNLOGQ_YMMu64_MASKmskw_YMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTERNLOGQ_YMMu64_MASKmskw_YMMu64_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTERNLOGQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTERNLOGQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPTERNLOGQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*            VPTEST_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VPTEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VPTEST_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VPTEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VPTEST_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VPTEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VPTEST_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VPTEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPTESTMB_MASKmskw_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPTESTMB_MASKmskw_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPTESTMB_MASKmskw_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPTESTMB_MASKmskw_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPTESTMB_MASKmskw_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPTESTMB_MASKmskw_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPTESTMD_MASKmskw_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTESTMD_MASKmskw_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTESTMD_MASKmskw_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTESTMD_MASKmskw_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTESTMD_MASKmskw_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTESTMD_MASKmskw_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTESTMQ_MASKmskw_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTESTMQ_MASKmskw_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTESTMQ_MASKmskw_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTESTMQ_MASKmskw_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTESTMQ_MASKmskw_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTESTMQ_MASKmskw_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTESTMW_MASKmskw_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPTESTMW_MASKmskw_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPTESTMW_MASKmskw_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPTESTMW_MASKmskw_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPTESTMW_MASKmskw_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPTESTMW_MASKmskw_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VPTESTMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPTESTNMB_MASKmskw_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPTESTNMB_MASKmskw_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPTESTNMB_MASKmskw_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPTESTNMB_MASKmskw_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPTESTNMB_MASKmskw_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPTESTNMB_MASKmskw_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMB, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPTESTNMD_MASKmskw_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTESTNMD_MASKmskw_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTESTNMD_MASKmskw_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTESTNMD_MASKmskw_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTESTNMD_MASKmskw_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTESTNMD_MASKmskw_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTESTNMQ_MASKmskw_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTESTNMQ_MASKmskw_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPTESTNMQ_MASKmskw_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTESTNMQ_MASKmskw_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPTESTNMQ_MASKmskw_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTESTNMQ_MASKmskw_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPTESTNMW_MASKmskw_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPTESTNMW_MASKmskw_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPTESTNMW_MASKmskw_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPTESTNMW_MASKmskw_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPTESTNMW_MASKmskw_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPTESTNMW_MASKmskw_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VPTESTNMW, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*  VPUNPCKHBW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VPUNPCKHBW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKHBW_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPUNPCKHBW_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*  VPUNPCKHBW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPUNPCKHBW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKHBW_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPUNPCKHBW_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPUNPCKHBW_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPUNPCKHBW_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*  VPUNPCKHDQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VPUNPCKHDQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKHDQ_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPUNPCKHDQ_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*  VPUNPCKHDQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPUNPCKHDQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKHDQ_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPUNPCKHDQ_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPUNPCKHDQ_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPUNPCKHDQ_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPUNPCKHQDQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKHQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VPUNPCKHWD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VPUNPCKHWD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKHWD_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPUNPCKHWD_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*  VPUNPCKHWD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPUNPCKHWD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKHWD_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPUNPCKHWD_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPUNPCKHWD_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPUNPCKHWD_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKHWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*  VPUNPCKLBW_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VPUNPCKLBW_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKLBW_XMMu8_MASKmskw_XMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPUNPCKLBW_XMMu8_MASKmskw_XMMu8_XMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*  VPUNPCKLBW_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPUNPCKLBW_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKLBW_YMMu8_MASKmskw_YMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPUNPCKLBW_YMMu8_MASKmskw_YMMu8_YMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPUNPCKLBW_ZMMu8_MASKmskw_ZMMu8_MEMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPUNPCKLBW_ZMMu8_MASKmskw_ZMMu8_ZMMu8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLBW, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*  VPUNPCKLDQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VPUNPCKLDQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKLDQ_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPUNPCKLDQ_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/*  VPUNPCKLDQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPUNPCKLDQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKLDQ_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPUNPCKLDQ_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPUNPCKLDQ_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPUNPCKLDQ_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPUNPCKLQDQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VPUNPCKLQDQ, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*  VPUNPCKLWD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*  VPUNPCKLWD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VPUNPCKLWD_XMMu16_MASKmskw_XMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/* VPUNPCKLWD_XMMu16_MASKmskw_XMMu16_XMMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_128, (xed_uint16_t)   0 },
/*  VPUNPCKLWD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*  VPUNPCKLWD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)      XED_CATEGORY_AVX2, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPUNPCKLWD_YMMu16_MASKmskw_YMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPUNPCKLWD_YMMu16_MASKmskw_YMMu16_YMMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_256, (xed_uint16_t)   0 },
/* VPUNPCKLWD_ZMMu16_MASKmskw_ZMMu16_MEMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/* VPUNPCKLWD_ZMMu16_MASKmskw_ZMMu16_ZMMu16_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VPUNPCKLWD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512BW_512, (xed_uint16_t)   0 },
/*       VPXOR_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)          XED_ICLASS_VPXOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VPXOR_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)          XED_ICLASS_VPXOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VPXOR_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)          XED_ICLASS_VPXOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/*       VPXOR_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)          XED_ICLASS_VPXOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_AVX2, (xed_uint16_t)         XED_ISA_SET_AVX2, (xed_uint16_t)   0 },
/* VPXORD_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPXORD_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPXORD_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPXORD_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPXORD_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPXORD_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORD, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPXORQ_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPXORQ_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VPXORQ_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPXORQ_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VPXORQ_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VPXORQ_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VPXORQ, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRANGEPD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VRANGEPD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VRANGEPD_YMMf64_MASKmskw_YMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VRANGEPD_YMMf64_MASKmskw_YMMf64_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VRANGEPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VRANGEPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VRANGEPS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VRANGEPS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VRANGEPS_YMMf32_MASKmskw_YMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VRANGEPS_YMMf32_MASKmskw_YMMf32_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VRANGEPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VRANGEPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VRANGESD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGESD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VRANGESD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGESD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VRANGESS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGESS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VRANGESS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRANGESS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VRCP14PD_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRCP14PD_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRCP14PD_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRCP14PD_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRCP14PD_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRCP14PD_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRCP14PS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRCP14PS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRCP14PS_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRCP14PS_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRCP14PS_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRCP14PS_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRCP14SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14SD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRCP14SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14SD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRCP14SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14SS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRCP14SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRCP14SS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRCP28PD_ZMMf64_MASKmskw_MEMf64_AVX512ER */ {  (xed_uint16_t)       XED_ICLASS_VRCP28PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VRCP28PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER */ {  (xed_uint16_t)       XED_ICLASS_VRCP28PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VRCP28PS_ZMMf32_MASKmskw_MEMf32_AVX512ER */ {  (xed_uint16_t)       XED_ICLASS_VRCP28PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VRCP28PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER */ {  (xed_uint16_t)       XED_ICLASS_VRCP28PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VRCP28SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512ER */ {  (xed_uint16_t)       XED_ICLASS_VRCP28SD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512ER_SCALAR, (xed_uint16_t)   0 },
/* VRCP28SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512ER */ {  (xed_uint16_t)       XED_ICLASS_VRCP28SD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512ER_SCALAR, (xed_uint16_t)   0 },
/* VRCP28SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512ER */ {  (xed_uint16_t)       XED_ICLASS_VRCP28SS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512ER_SCALAR, (xed_uint16_t)   0 },
/* VRCP28SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512ER */ {  (xed_uint16_t)       XED_ICLASS_VRCP28SS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512ER_SCALAR, (xed_uint16_t)   0 },
/* VRCPPH_XMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VRCPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VRCPPH_XMMf16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VRCPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VRCPPH_YMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VRCPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VRCPPH_YMMf16_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VRCPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VRCPPH_ZMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VRCPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VRCPPH_ZMMf16_MASKmskw_ZMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VRCPPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*            VRCPPS_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VRCPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VRCPPS_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VRCPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VRCPPS_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VRCPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*            VRCPPS_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VRCPPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VRCPSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VRCPSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VRCPSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VRCPSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*       VRCPSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)         XED_ICLASS_VRCPSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VRCPSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)         XED_ICLASS_VRCPSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VREDUCEPD_XMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VREDUCEPD_XMMf64_MASKmskw_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VREDUCEPD_YMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VREDUCEPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VREDUCEPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VREDUCEPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VREDUCEPH_XMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VREDUCEPH_XMMf16_MASKmskw_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VREDUCEPH_YMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VREDUCEPH_YMMf16_MASKmskw_YMMf16_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VREDUCEPH_ZMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VREDUCEPH_ZMMf16_MASKmskw_ZMMf16_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VREDUCEPS_XMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VREDUCEPS_XMMf32_MASKmskw_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VREDUCEPS_YMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VREDUCEPS_YMMf32_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VREDUCEPS_ZMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VREDUCEPS_ZMMf32_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VREDUCESD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCESD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VREDUCESD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCESD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VREDUCESH_XMMf16_MASKmskw_XMMf16_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCESH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VREDUCESH_XMMf16_MASKmskw_XMMf16_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCESH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VREDUCESS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCESS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VREDUCESS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VREDUCESS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512DQ_SCALAR, (xed_uint16_t)   0 },
/* VRNDSCALEPD_XMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRNDSCALEPD_XMMf64_MASKmskw_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRNDSCALEPD_YMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRNDSCALEPD_YMMf64_MASKmskw_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRNDSCALEPD_ZMMf64_MASKmskw_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRNDSCALEPD_ZMMf64_MASKmskw_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRNDSCALEPH_XMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VRNDSCALEPH_XMMf16_MASKmskw_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VRNDSCALEPH_YMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VRNDSCALEPH_YMMf16_MASKmskw_YMMf16_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VRNDSCALEPH_ZMMf16_MASKmskw_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VRNDSCALEPH_ZMMf16_MASKmskw_ZMMf16_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VRNDSCALEPS_XMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRNDSCALEPS_XMMf32_MASKmskw_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRNDSCALEPS_YMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRNDSCALEPS_YMMf32_MASKmskw_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRNDSCALEPS_ZMMf32_MASKmskw_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRNDSCALEPS_ZMMf32_MASKmskw_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALEPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRNDSCALESD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALESD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRNDSCALESD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALESD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRNDSCALESH_XMMf16_MASKmskw_XMMf16_MEMf16_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALESH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VRNDSCALESH_XMMf16_MASKmskw_XMMf16_XMMf16_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALESH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VRNDSCALESS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALESS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRNDSCALESS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)    XED_ICLASS_VRNDSCALESS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*     VROUNDPD_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VROUNDPD_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VROUNDPD_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VROUNDPD_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VROUNDPS_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VROUNDPS_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VROUNDPS_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VROUNDPS_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VROUNDSD_XMMdq_XMMdq_MEMq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VROUNDSD_XMMdq_XMMdq_XMMq_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VROUNDSS_XMMdq_XMMdq_MEMd_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VROUNDSS_XMMdq_XMMdq_XMMd_IMMb */ {  (xed_uint16_t)       XED_ICLASS_VROUNDSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VRSQRT14PD_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRSQRT14PD_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRSQRT14PD_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRSQRT14PD_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRSQRT14PD_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRSQRT14PD_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRSQRT14PS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRSQRT14PS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VRSQRT14PS_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRSQRT14PS_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VRSQRT14PS_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRSQRT14PS_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VRSQRT14SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14SD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRSQRT14SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14SD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRSQRT14SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14SS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRSQRT14SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT14SS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VRSQRT28PD_ZMMf64_MASKmskw_MEMf64_AVX512ER */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT28PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VRSQRT28PD_ZMMf64_MASKmskw_ZMMf64_AVX512ER */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT28PD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VRSQRT28PS_ZMMf32_MASKmskw_MEMf32_AVX512ER */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT28PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VRSQRT28PS_ZMMf32_MASKmskw_ZMMf32_AVX512ER */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT28PS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512ER_512, (xed_uint16_t)   0 },
/* VRSQRT28SD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512ER */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT28SD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512ER_SCALAR, (xed_uint16_t)   0 },
/* VRSQRT28SD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512ER */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT28SD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512ER_SCALAR, (xed_uint16_t)   0 },
/* VRSQRT28SS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512ER */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT28SS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512ER_SCALAR, (xed_uint16_t)   0 },
/* VRSQRT28SS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512ER */ {  (xed_uint16_t)     XED_ICLASS_VRSQRT28SS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512ER_SCALAR, (xed_uint16_t)   0 },
/* VRSQRTPH_XMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VRSQRTPH_XMMf16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VRSQRTPH_YMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VRSQRTPH_YMMf16_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VRSQRTPH_ZMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VRSQRTPH_ZMMf16_MASKmskw_ZMMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*          VRSQRTPS_XMMdq_MEMdq */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VRSQRTPS_XMMdq_XMMdq */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VRSQRTPS_YMMqq_MEMqq */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*          VRSQRTPS_YMMqq_YMMqq */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VRSQRTSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VRSQRTSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*     VRSQRTSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*     VRSQRTSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)       XED_ICLASS_VRSQRTSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSCALEFPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSCALEFPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSCALEFPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSCALEFPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSCALEFPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSCALEFPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSCALEFPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VSCALEFPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VSCALEFPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VSCALEFPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VSCALEFPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VSCALEFPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VSCALEFPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSCALEFPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSCALEFPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSCALEFPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSCALEFPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSCALEFPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSCALEFSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSCALEFSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSCALEFSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VSCALEFSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VSCALEFSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSCALEFSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VSCALEFSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSCATTERDPD_MEMf64_MASKmskw_XMMf64_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERDPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSCATTERDPD_MEMf64_MASKmskw_YMMf64_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERDPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSCATTERDPD_MEMf64_MASKmskw_ZMMf64_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERDPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSCATTERDPS_MEMf32_MASKmskw_XMMf32_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERDPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSCATTERDPS_MEMf32_MASKmskw_YMMf32_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERDPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSCATTERDPS_MEMf32_MASKmskw_ZMMf32_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERDPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSCATTERPF0DPD_MEMf64_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t) XED_ICLASS_VSCATTERPF0DPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VSCATTERPF0DPS_MEMf32_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t) XED_ICLASS_VSCATTERPF0DPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VSCATTERPF0QPD_MEMf64_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t) XED_ICLASS_VSCATTERPF0QPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VSCATTERPF0QPS_MEMf32_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t) XED_ICLASS_VSCATTERPF0QPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VSCATTERPF1DPD_MEMf64_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t) XED_ICLASS_VSCATTERPF1DPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VSCATTERPF1DPS_MEMf32_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t) XED_ICLASS_VSCATTERPF1DPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VSCATTERPF1QPD_MEMf64_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t) XED_ICLASS_VSCATTERPF1QPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VSCATTERPF1QPS_MEMf32_MASKmskw_AVX512PF_VL512 */ {  (xed_uint16_t) XED_ICLASS_VSCATTERPF1QPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512PF_512, (xed_uint16_t)   0 },
/* VSCATTERQPD_MEMf64_MASKmskw_XMMf64_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERQPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSCATTERQPD_MEMf64_MASKmskw_YMMf64_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERQPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSCATTERQPD_MEMf64_MASKmskw_ZMMf64_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERQPD, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSCATTERQPS_MEMf32_MASKmskw_XMMf32_AVX512_VL128 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERQPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSCATTERQPS_MEMf32_MASKmskw_XMMf32_AVX512_VL256 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERQPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSCATTERQPS_MEMf32_MASKmskw_YMMf32_AVX512_VL512 */ {  (xed_uint16_t)    XED_ICLASS_VSCATTERQPS, (xed_uint8_t)   XED_CATEGORY_SCATTER, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFF32X4_YMMf32_MASKmskw_YMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFF32X4_YMMf32_MASKmskw_YMMf32_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFF32X4_ZMMf32_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFF32X4_ZMMf32_MASKmskw_ZMMf32_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFF32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFF64X2_YMMf64_MASKmskw_YMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFF64X2_YMMf64_MASKmskw_YMMf64_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFF64X2_ZMMf64_MASKmskw_ZMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFF64X2_ZMMf64_MASKmskw_ZMMf64_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFF64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFI32X4_YMMu32_MASKmskw_YMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFI32X4_YMMu32_MASKmskw_YMMu32_YMMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFI32X4_ZMMu32_MASKmskw_ZMMu32_MEMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFI32X4_ZMMu32_MASKmskw_ZMMu32_ZMMu32_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFI32X4, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFI64X2_YMMu64_MASKmskw_YMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFI64X2_YMMu64_MASKmskw_YMMu64_YMMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFI64X2_ZMMu64_MASKmskw_ZMMu64_MEMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFI64X2_ZMMu64_MASKmskw_ZMMu64_ZMMu64_IMM8_AVX512 */ {  (xed_uint16_t)     XED_ICLASS_VSHUFI64X2, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFPD_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSHUFPD_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSHUFPD_XMMf64_MASKmskw_XMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSHUFPD_XMMf64_MASKmskw_XMMf64_XMMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSHUFPD_YMMf64_MASKmskw_YMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFPD_YMMf64_MASKmskw_YMMf64_YMMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFPD_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSHUFPD_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSHUFPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFPS_XMMdq_XMMdq_MEMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSHUFPS_XMMdq_XMMdq_XMMdq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSHUFPS_XMMf32_MASKmskw_XMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSHUFPS_XMMf32_MASKmskw_XMMf32_XMMf32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSHUFPS_YMMf32_MASKmskw_YMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFPS_YMMf32_MASKmskw_YMMf32_YMMf32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSHUFPS_YMMqq_YMMqq_MEMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSHUFPS_YMMqq_YMMqq_YMMqq_IMMb */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSHUFPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSHUFPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_IMM8_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSHUFPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*           VSQRTPD_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VSQRTPD_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSQRTPD_XMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSQRTPD_XMMf64_MASKmskw_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSQRTPD_YMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSQRTPD_YMMf64_MASKmskw_YMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*           VSQRTPD_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VSQRTPD_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSQRTPD_ZMMf64_MASKmskw_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSQRTPD_ZMMf64_MASKmskw_ZMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSQRTPH_XMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VSQRTPH_XMMf16_MASKmskw_XMMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VSQRTPH_YMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VSQRTPH_YMMf16_MASKmskw_YMMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VSQRTPH_ZMMf16_MASKmskw_MEMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VSQRTPH_ZMMf16_MASKmskw_ZMMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*           VSQRTPS_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VSQRTPS_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSQRTPS_XMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSQRTPS_XMMf32_MASKmskw_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSQRTPS_YMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSQRTPS_YMMf32_MASKmskw_YMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*           VSQRTPS_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VSQRTPS_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSQRTPS_ZMMf32_MASKmskw_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSQRTPS_ZMMf32_MASKmskw_ZMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VSQRTSD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VSQRTSD_XMMdq_XMMdq_XMMq */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSQRTSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSQRTSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSQRTSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VSQRTSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*      VSQRTSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VSQRTSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSQRTSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSQRTSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)        XED_ICLASS_VSQRTSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*                 VSTMXCSR_MEMd */ {  (xed_uint16_t)       XED_ICLASS_VSTMXCSR, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VSUBPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VSUBPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSUBPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSUBPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSUBPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSUBPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VSUBPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VSUBPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSUBPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSUBPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSUBPH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VSUBPH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_128, (xed_uint16_t)   0 },
/* VSUBPH_YMMf16_MASKmskw_YMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VSUBPH_YMMf16_MASKmskw_YMMf16_YMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_256, (xed_uint16_t)   0 },
/* VSUBPH_ZMMf16_MASKmskw_ZMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/* VSUBPH_ZMMf16_MASKmskw_ZMMf16_ZMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_512, (xed_uint16_t)   0 },
/*      VSUBPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VSUBPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSUBPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSUBPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VSUBPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VSUBPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*      VSUBPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VSUBPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSUBPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VSUBPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*       VSUBSD_XMMdq_XMMdq_MEMq */ {  (xed_uint16_t)         XED_ICLASS_VSUBSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VSUBSD_XMMdq_XMMdq_XMMq */ {  (xed_uint16_t)         XED_ICLASS_VSUBSD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSUBSD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSUBSD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBSD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSUBSH_XMMf16_MASKmskw_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VSUBSH_XMMf16_MASKmskw_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBSH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*       VSUBSS_XMMdq_XMMdq_MEMd */ {  (xed_uint16_t)         XED_ICLASS_VSUBSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*       VSUBSS_XMMdq_XMMdq_XMMd */ {  (xed_uint16_t)         XED_ICLASS_VSUBSS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VSUBSS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VSUBSS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VSUBSS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*           VTESTPD_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VTESTPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VTESTPD_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VTESTPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VTESTPD_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VTESTPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VTESTPD_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VTESTPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VTESTPS_XMMdq_MEMdq */ {  (xed_uint16_t)        XED_ICLASS_VTESTPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VTESTPS_XMMdq_XMMdq */ {  (xed_uint16_t)        XED_ICLASS_VTESTPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VTESTPS_YMMqq_MEMqq */ {  (xed_uint16_t)        XED_ICLASS_VTESTPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VTESTPS_YMMqq_YMMqq */ {  (xed_uint16_t)        XED_ICLASS_VTESTPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VUCOMISD_XMMdq_MEMq */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VUCOMISD_XMMdq_XMMq */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUCOMISD_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VUCOMISD_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VUCOMISH_XMMf16_MEMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/* VUCOMISH_XMMf16_XMMf16_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISH, (xed_uint8_t)      XED_CATEGORY_FP16, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512_FP16_SCALAR, (xed_uint16_t)   0 },
/*           VUCOMISS_XMMdq_MEMd */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*           VUCOMISS_XMMdq_XMMd */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUCOMISS_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/* VUCOMISS_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)       XED_ICLASS_VUCOMISS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)XED_ISA_SET_AVX512F_SCALAR, (xed_uint16_t)   0 },
/*   VUNPCKHPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VUNPCKHPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUNPCKHPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VUNPCKHPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VUNPCKHPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VUNPCKHPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*   VUNPCKHPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VUNPCKHPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUNPCKHPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VUNPCKHPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VUNPCKHPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VUNPCKHPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUNPCKHPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VUNPCKHPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VUNPCKHPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VUNPCKHPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*   VUNPCKHPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VUNPCKHPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUNPCKHPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VUNPCKHPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKHPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VUNPCKLPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VUNPCKLPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUNPCKLPD_XMMf64_MASKmskw_XMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VUNPCKLPD_XMMf64_MASKmskw_XMMf64_XMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VUNPCKLPD_YMMf64_MASKmskw_YMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VUNPCKLPD_YMMf64_MASKmskw_YMMf64_YMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*   VUNPCKLPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VUNPCKLPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUNPCKLPD_ZMMf64_MASKmskw_ZMMf64_MEMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VUNPCKLPD_ZMMf64_MASKmskw_ZMMf64_ZMMf64_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPD, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*   VUNPCKLPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VUNPCKLPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUNPCKLPS_XMMf32_MASKmskw_XMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VUNPCKLPS_XMMf32_MASKmskw_XMMf32_XMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_128, (xed_uint16_t)   0 },
/* VUNPCKLPS_YMMf32_MASKmskw_YMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/* VUNPCKLPS_YMMf32_MASKmskw_YMMf32_YMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_256, (xed_uint16_t)   0 },
/*   VUNPCKLPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*   VUNPCKLPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VUNPCKLPS_ZMMf32_MASKmskw_ZMMf32_MEMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/* VUNPCKLPS_ZMMf32_MASKmskw_ZMMf32_ZMMf32_AVX512 */ {  (xed_uint16_t)      XED_ICLASS_VUNPCKLPS, (xed_uint8_t)    XED_CATEGORY_AVX512, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t)  XED_ISA_SET_AVX512F_512, (xed_uint16_t)   0 },
/*      VXORPD_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VXORPD_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VXORPD_XMMu64_MASKmskw_XMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VXORPD_XMMu64_MASKmskw_XMMu64_XMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/*      VXORPD_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VXORPD_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VXORPD_YMMu64_MASKmskw_YMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VXORPD_YMMu64_MASKmskw_YMMu64_YMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VXORPD_ZMMu64_MASKmskw_ZMMu64_MEMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VXORPD_ZMMu64_MASKmskw_ZMMu64_ZMMu64_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/*      VXORPS_XMMdq_XMMdq_MEMdq */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VXORPS_XMMdq_XMMdq_XMMdq */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VXORPS_XMMu32_MASKmskw_XMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/* VXORPS_XMMu32_MASKmskw_XMMu32_XMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_128, (xed_uint16_t)   0 },
/*      VXORPS_YMMqq_YMMqq_MEMqq */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*      VXORPS_YMMqq_YMMqq_YMMqq */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/* VXORPS_YMMu32_MASKmskw_YMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VXORPS_YMMu32_MASKmskw_YMMu32_YMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_256, (xed_uint16_t)   0 },
/* VXORPS_ZMMu32_MASKmskw_ZMMu32_MEMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/* VXORPS_ZMMu32_MASKmskw_ZMMu32_ZMMu32_AVX512 */ {  (xed_uint16_t)         XED_ICLASS_VXORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)XED_EXTENSION_AVX512EVEX, (xed_uint16_t) XED_ISA_SET_AVX512DQ_512, (xed_uint16_t)   0 },
/*                      VZEROALL */ {  (xed_uint16_t)       XED_ICLASS_VZEROALL, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*                    VZEROUPPER */ {  (xed_uint16_t)     XED_ICLASS_VZEROUPPER, (xed_uint8_t)       XED_CATEGORY_AVX, (xed_uint8_t)   XED_EXTENSION_AVX, (xed_uint16_t)          XED_ISA_SET_AVX, (xed_uint16_t)   0 },
/*                        WBINVD */ {  (xed_uint16_t)         XED_ICLASS_WBINVD, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*                      WBNOINVD */ {  (xed_uint16_t)       XED_ICLASS_WBNOINVD, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)XED_EXTENSION_WBNOINVD, (xed_uint16_t)     XED_ISA_SET_WBNOINVD, (xed_uint16_t)   0 },
/*                 WRFSBASE_GPRy */ {  (xed_uint16_t)       XED_ICLASS_WRFSBASE, (xed_uint8_t)  XED_CATEGORY_RDWRFSGS, (xed_uint8_t)XED_EXTENSION_RDWRFSGS, (xed_uint16_t)     XED_ISA_SET_RDWRFSGS, (xed_uint16_t)   0 },
/*                 WRGSBASE_GPRy */ {  (xed_uint16_t)       XED_ICLASS_WRGSBASE, (xed_uint8_t)  XED_CATEGORY_RDWRFSGS, (xed_uint8_t)XED_EXTENSION_RDWRFSGS, (xed_uint16_t)     XED_ISA_SET_RDWRFSGS, (xed_uint16_t)   0 },
/*                         WRMSR */ {  (xed_uint16_t)          XED_ICLASS_WRMSR, (xed_uint8_t)    XED_CATEGORY_SYSTEM, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)  XED_ISA_SET_PENTIUMREAL, (xed_uint16_t)   0 },
/*                        WRPKRU */ {  (xed_uint16_t)         XED_ICLASS_WRPKRU, (xed_uint8_t)       XED_CATEGORY_PKU, (xed_uint8_t)   XED_EXTENSION_PKU, (xed_uint16_t)          XED_ISA_SET_PKU, (xed_uint16_t)   0 },
/*         WRSSD_MEMu32_GPR32u32 */ {  (xed_uint16_t)          XED_ICLASS_WRSSD, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*         WRSSQ_MEMu64_GPR64u64 */ {  (xed_uint16_t)          XED_ICLASS_WRSSQ, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*        WRUSSD_MEMu32_GPR32u32 */ {  (xed_uint16_t)         XED_ICLASS_WRUSSD, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*        WRUSSQ_MEMu64_GPR64u64 */ {  (xed_uint16_t)         XED_ICLASS_WRUSSQ, (xed_uint8_t)       XED_CATEGORY_CET, (xed_uint8_t)   XED_EXTENSION_CET, (xed_uint16_t)          XED_ISA_SET_CET, (xed_uint16_t)   0 },
/*                   XABORT_IMMb */ {  (xed_uint16_t)         XED_ICLASS_XABORT, (xed_uint8_t) XED_CATEGORY_UNCOND_BR, (xed_uint8_t)   XED_EXTENSION_RTM, (xed_uint16_t)          XED_ISA_SET_RTM, (xed_uint16_t)   0 },
/*                XADD_GPR8_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_XADD, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*                XADD_GPRv_GPRv */ {  (xed_uint16_t)           XED_ICLASS_XADD, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*                XADD_MEMb_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_XADD, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*                XADD_MEMv_GPRv */ {  (xed_uint16_t)           XED_ICLASS_XADD, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t)   0 },
/*           XADD_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)      XED_ICLASS_XADD_LOCK, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t) 102 },
/*           XADD_LOCK_MEMv_GPRv */ {  (xed_uint16_t)      XED_ICLASS_XADD_LOCK, (xed_uint8_t) XED_CATEGORY_SEMAPHORE, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)     XED_ISA_SET_I486REAL, (xed_uint16_t) 102 },
/*                 XBEGIN_RELBRz */ {  (xed_uint16_t)         XED_ICLASS_XBEGIN, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)   XED_EXTENSION_RTM, (xed_uint16_t)          XED_ISA_SET_RTM, (xed_uint16_t)   0 },
/*                XCHG_GPR8_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_XCHG, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                XCHG_GPRv_GPRv */ {  (xed_uint16_t)           XED_ICLASS_XCHG, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                XCHG_GPRv_OrAX */ {  (xed_uint16_t)           XED_ICLASS_XCHG, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                XCHG_MEMb_GPR8 */ {  (xed_uint16_t)           XED_ICLASS_XCHG, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                XCHG_MEMv_GPRv */ {  (xed_uint16_t)           XED_ICLASS_XCHG, (xed_uint8_t)  XED_CATEGORY_DATAXFER, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                          XEND */ {  (xed_uint16_t)           XED_ICLASS_XEND, (xed_uint8_t)   XED_CATEGORY_COND_BR, (xed_uint8_t)   XED_EXTENSION_RTM, (xed_uint16_t)          XED_ISA_SET_RTM, (xed_uint16_t)   0 },
/*                        XGETBV */ {  (xed_uint16_t)         XED_ICLASS_XGETBV, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t) XED_EXTENSION_XSAVE, (xed_uint16_t)        XED_ISA_SET_XSAVE, (xed_uint16_t)   0 },
/*                          XLAT */ {  (xed_uint16_t)           XED_ICLASS_XLAT, (xed_uint8_t)      XED_CATEGORY_MISC, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                   XOR_AL_IMMb */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              XOR_GPR8_GPR8_30 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              XOR_GPR8_GPR8_32 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            XOR_GPR8_IMMb_80r6 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            XOR_GPR8_IMMb_82r6 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_GPR8_MEMb */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              XOR_GPRv_GPRv_31 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*              XOR_GPRv_GPRv_33 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_GPRv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_GPRv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_GPRv_MEMv */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_MEMb_GPR8 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            XOR_MEMb_IMMb_80r6 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*            XOR_MEMb_IMMb_82r6 */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_MEMv_GPRv */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_MEMv_IMMb */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_MEMv_IMMz */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*                 XOR_OrAX_IMMz */ {  (xed_uint16_t)            XED_ICLASS_XOR, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)   0 },
/*           XORPD_XMMxuq_MEMxuq */ {  (xed_uint16_t)          XED_ICLASS_XORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           XORPD_XMMxuq_XMMxuq */ {  (xed_uint16_t)          XED_ICLASS_XORPD, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)  XED_EXTENSION_SSE2, (xed_uint16_t)         XED_ISA_SET_SSE2, (xed_uint16_t)   0 },
/*           XORPS_XMMxud_MEMxud */ {  (xed_uint16_t)          XED_ICLASS_XORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*           XORPS_XMMxud_XMMxud */ {  (xed_uint16_t)          XED_ICLASS_XORPS, (xed_uint8_t) XED_CATEGORY_LOGICAL_FP, (xed_uint8_t)   XED_EXTENSION_SSE, (xed_uint16_t)          XED_ISA_SET_SSE, (xed_uint16_t)   0 },
/*            XOR_LOCK_MEMb_GPR8 */ {  (xed_uint16_t)       XED_ICLASS_XOR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  14 },
/*       XOR_LOCK_MEMb_IMMb_80r6 */ {  (xed_uint16_t)       XED_ICLASS_XOR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  14 },
/*       XOR_LOCK_MEMb_IMMb_82r6 */ {  (xed_uint16_t)       XED_ICLASS_XOR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  14 },
/*            XOR_LOCK_MEMv_GPRv */ {  (xed_uint16_t)       XED_ICLASS_XOR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  14 },
/*            XOR_LOCK_MEMv_IMMb */ {  (xed_uint16_t)       XED_ICLASS_XOR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  14 },
/*            XOR_LOCK_MEMv_IMMz */ {  (xed_uint16_t)       XED_ICLASS_XOR_LOCK, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)  XED_EXTENSION_BASE, (xed_uint16_t)          XED_ISA_SET_I86, (xed_uint16_t)  14 },
/*                     XRESLDTRK */ {  (xed_uint16_t)      XED_ICLASS_XRESLDTRK, (xed_uint8_t) XED_CATEGORY_TSX_LDTRK, (xed_uint8_t)XED_EXTENSION_TSX_LDTRK, (xed_uint16_t)    XED_ISA_SET_TSX_LDTRK, (xed_uint16_t)   0 },
/*              XRSTOR_MEMmxsave */ {  (xed_uint16_t)         XED_ICLASS_XRSTOR, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t) XED_EXTENSION_XSAVE, (xed_uint16_t)        XED_ISA_SET_XSAVE, (xed_uint16_t)   0 },
/*            XRSTOR64_MEMmxsave */ {  (xed_uint16_t)       XED_ICLASS_XRSTOR64, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t) XED_EXTENSION_XSAVE, (xed_uint16_t)        XED_ISA_SET_XSAVE, (xed_uint16_t)   0 },
/*             XRSTORS_MEMmxsave */ {  (xed_uint16_t)        XED_ICLASS_XRSTORS, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t)XED_EXTENSION_XSAVES, (xed_uint16_t)       XED_ISA_SET_XSAVES, (xed_uint16_t)   0 },
/*           XRSTORS64_MEMmxsave */ {  (xed_uint16_t)      XED_ICLASS_XRSTORS64, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t)XED_EXTENSION_XSAVES, (xed_uint16_t)       XED_ISA_SET_XSAVES, (xed_uint16_t)   0 },
/*               XSAVE_MEMmxsave */ {  (xed_uint16_t)          XED_ICLASS_XSAVE, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t) XED_EXTENSION_XSAVE, (xed_uint16_t)        XED_ISA_SET_XSAVE, (xed_uint16_t)   0 },
/*             XSAVE64_MEMmxsave */ {  (xed_uint16_t)        XED_ICLASS_XSAVE64, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t) XED_EXTENSION_XSAVE, (xed_uint16_t)        XED_ISA_SET_XSAVE, (xed_uint16_t)   0 },
/*              XSAVEC_MEMmxsave */ {  (xed_uint16_t)         XED_ICLASS_XSAVEC, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t)XED_EXTENSION_XSAVEC, (xed_uint16_t)       XED_ISA_SET_XSAVEC, (xed_uint16_t)   0 },
/*            XSAVEC64_MEMmxsave */ {  (xed_uint16_t)       XED_ICLASS_XSAVEC64, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t)XED_EXTENSION_XSAVEC, (xed_uint16_t)       XED_ISA_SET_XSAVEC, (xed_uint16_t)   0 },
/*            XSAVEOPT_MEMmxsave */ {  (xed_uint16_t)       XED_ICLASS_XSAVEOPT, (xed_uint8_t)  XED_CATEGORY_XSAVEOPT, (xed_uint8_t)XED_EXTENSION_XSAVEOPT, (xed_uint16_t)     XED_ISA_SET_XSAVEOPT, (xed_uint16_t)   0 },
/*          XSAVEOPT64_MEMmxsave */ {  (xed_uint16_t)     XED_ICLASS_XSAVEOPT64, (xed_uint8_t)  XED_CATEGORY_XSAVEOPT, (xed_uint8_t)XED_EXTENSION_XSAVEOPT, (xed_uint16_t)     XED_ISA_SET_XSAVEOPT, (xed_uint16_t)   0 },
/*              XSAVES_MEMmxsave */ {  (xed_uint16_t)         XED_ICLASS_XSAVES, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t)XED_EXTENSION_XSAVES, (xed_uint16_t)       XED_ISA_SET_XSAVES, (xed_uint16_t)   0 },
/*            XSAVES64_MEMmxsave */ {  (xed_uint16_t)       XED_ICLASS_XSAVES64, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t)XED_EXTENSION_XSAVES, (xed_uint16_t)       XED_ISA_SET_XSAVES, (xed_uint16_t)   0 },
/*                        XSETBV */ {  (xed_uint16_t)         XED_ICLASS_XSETBV, (xed_uint8_t)     XED_CATEGORY_XSAVE, (xed_uint8_t) XED_EXTENSION_XSAVE, (xed_uint16_t)        XED_ISA_SET_XSAVE, (xed_uint16_t)   0 },
/*                        XSTORE */ {  (xed_uint16_t)         XED_ICLASS_XSTORE, (xed_uint8_t) XED_CATEGORY_VIA_PADLOCK, (xed_uint8_t)XED_EXTENSION_VIA_PADLOCK_RNG, (xed_uint16_t)XED_ISA_SET_VIA_PADLOCK_RNG, (xed_uint16_t)   0 },
/*                     XSUSLDTRK */ {  (xed_uint16_t)      XED_ICLASS_XSUSLDTRK, (xed_uint8_t) XED_CATEGORY_TSX_LDTRK, (xed_uint8_t)XED_EXTENSION_TSX_LDTRK, (xed_uint16_t)    XED_ISA_SET_TSX_LDTRK, (xed_uint16_t)   0 },
/*                         XTEST */ {  (xed_uint16_t)          XED_ICLASS_XTEST, (xed_uint8_t)   XED_CATEGORY_LOGICAL, (xed_uint8_t)   XED_EXTENSION_RTM, (xed_uint16_t)          XED_ISA_SET_RTM, (xed_uint16_t)   0 }
};
