You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
265 lines
8.0 KiB
265 lines
8.0 KiB
3 years ago
|
/// @file xed-cpuid-bit-enum.c
|
||
|
|
||
|
// This file was automatically generated.
|
||
|
// Do not edit this file.
|
||
|
|
||
|
#include <string.h>
|
||
|
#include <assert.h>
|
||
|
#include "xed-cpuid-bit-enum.h"
|
||
|
|
||
|
typedef struct {
|
||
|
const char* name;
|
||
|
xed_cpuid_bit_enum_t value;
|
||
|
} name_table_xed_cpuid_bit_enum_t;
|
||
|
static const name_table_xed_cpuid_bit_enum_t name_array_xed_cpuid_bit_enum_t[] = {
|
||
|
{"INVALID", XED_CPUID_BIT_INVALID},
|
||
|
{"ADOXADCX", XED_CPUID_BIT_ADOXADCX},
|
||
|
{"AES", XED_CPUID_BIT_AES},
|
||
|
{"AMX_BF16", XED_CPUID_BIT_AMX_BF16},
|
||
|
{"AMX_INT8", XED_CPUID_BIT_AMX_INT8},
|
||
|
{"AMX_TILES", XED_CPUID_BIT_AMX_TILES},
|
||
|
{"AVX", XED_CPUID_BIT_AVX},
|
||
|
{"AVX2", XED_CPUID_BIT_AVX2},
|
||
|
{"AVX512BW", XED_CPUID_BIT_AVX512BW},
|
||
|
{"AVX512CD", XED_CPUID_BIT_AVX512CD},
|
||
|
{"AVX512DQ", XED_CPUID_BIT_AVX512DQ},
|
||
|
{"AVX512ER", XED_CPUID_BIT_AVX512ER},
|
||
|
{"AVX512F", XED_CPUID_BIT_AVX512F},
|
||
|
{"AVX512IFMA", XED_CPUID_BIT_AVX512IFMA},
|
||
|
{"AVX512PF", XED_CPUID_BIT_AVX512PF},
|
||
|
{"AVX512VBMI", XED_CPUID_BIT_AVX512VBMI},
|
||
|
{"AVX512VL", XED_CPUID_BIT_AVX512VL},
|
||
|
{"AVX512_4FMAPS", XED_CPUID_BIT_AVX512_4FMAPS},
|
||
|
{"AVX512_4VNNIW", XED_CPUID_BIT_AVX512_4VNNIW},
|
||
|
{"AVX512_BITALG", XED_CPUID_BIT_AVX512_BITALG},
|
||
|
{"AVX512_FP16", XED_CPUID_BIT_AVX512_FP16},
|
||
|
{"AVX512_VBMI2", XED_CPUID_BIT_AVX512_VBMI2},
|
||
|
{"AVX512_VNNI", XED_CPUID_BIT_AVX512_VNNI},
|
||
|
{"AVX512_VP2INTERSECT", XED_CPUID_BIT_AVX512_VP2INTERSECT},
|
||
|
{"AVX512_VPOPCNTDQ", XED_CPUID_BIT_AVX512_VPOPCNTDQ},
|
||
|
{"AVX_VNNI", XED_CPUID_BIT_AVX_VNNI},
|
||
|
{"BF16", XED_CPUID_BIT_BF16},
|
||
|
{"BMI1", XED_CPUID_BIT_BMI1},
|
||
|
{"BMI2", XED_CPUID_BIT_BMI2},
|
||
|
{"CET", XED_CPUID_BIT_CET},
|
||
|
{"CLDEMOTE", XED_CPUID_BIT_CLDEMOTE},
|
||
|
{"CLFLUSH", XED_CPUID_BIT_CLFLUSH},
|
||
|
{"CLFLUSHOPT", XED_CPUID_BIT_CLFLUSHOPT},
|
||
|
{"CLWB", XED_CPUID_BIT_CLWB},
|
||
|
{"CMPXCHG16B", XED_CPUID_BIT_CMPXCHG16B},
|
||
|
{"ENQCMD", XED_CPUID_BIT_ENQCMD},
|
||
|
{"F16C", XED_CPUID_BIT_F16C},
|
||
|
{"FMA", XED_CPUID_BIT_FMA},
|
||
|
{"FXSAVE", XED_CPUID_BIT_FXSAVE},
|
||
|
{"GFNI", XED_CPUID_BIT_GFNI},
|
||
|
{"HRESET", XED_CPUID_BIT_HRESET},
|
||
|
{"INTEL64", XED_CPUID_BIT_INTEL64},
|
||
|
{"INTELPT", XED_CPUID_BIT_INTELPT},
|
||
|
{"INVPCID", XED_CPUID_BIT_INVPCID},
|
||
|
{"KLENABLED", XED_CPUID_BIT_KLENABLED},
|
||
|
{"KLSUPPORTED", XED_CPUID_BIT_KLSUPPORTED},
|
||
|
{"KLWIDE", XED_CPUID_BIT_KLWIDE},
|
||
|
{"LAHF", XED_CPUID_BIT_LAHF},
|
||
|
{"LZCNT", XED_CPUID_BIT_LZCNT},
|
||
|
{"MCOMMIT", XED_CPUID_BIT_MCOMMIT},
|
||
|
{"MONITOR", XED_CPUID_BIT_MONITOR},
|
||
|
{"MONITORX", XED_CPUID_BIT_MONITORX},
|
||
|
{"MOVDIR64B", XED_CPUID_BIT_MOVDIR64B},
|
||
|
{"MOVDIRI", XED_CPUID_BIT_MOVDIRI},
|
||
|
{"MOVEBE", XED_CPUID_BIT_MOVEBE},
|
||
|
{"MPX", XED_CPUID_BIT_MPX},
|
||
|
{"OSPKU", XED_CPUID_BIT_OSPKU},
|
||
|
{"OSXSAVE", XED_CPUID_BIT_OSXSAVE},
|
||
|
{"PCLMULQDQ", XED_CPUID_BIT_PCLMULQDQ},
|
||
|
{"PCONFIG", XED_CPUID_BIT_PCONFIG},
|
||
|
{"PKU", XED_CPUID_BIT_PKU},
|
||
|
{"POPCNT", XED_CPUID_BIT_POPCNT},
|
||
|
{"PREFETCHW", XED_CPUID_BIT_PREFETCHW},
|
||
|
{"PREFETCHWT1", XED_CPUID_BIT_PREFETCHWT1},
|
||
|
{"PTWRITE", XED_CPUID_BIT_PTWRITE},
|
||
|
{"RDP", XED_CPUID_BIT_RDP},
|
||
|
{"RDPRU", XED_CPUID_BIT_RDPRU},
|
||
|
{"RDRAND", XED_CPUID_BIT_RDRAND},
|
||
|
{"RDSEED", XED_CPUID_BIT_RDSEED},
|
||
|
{"RDTSCP", XED_CPUID_BIT_RDTSCP},
|
||
|
{"RDWRFSGS", XED_CPUID_BIT_RDWRFSGS},
|
||
|
{"RTM", XED_CPUID_BIT_RTM},
|
||
|
{"SERIALIZE", XED_CPUID_BIT_SERIALIZE},
|
||
|
{"SGX", XED_CPUID_BIT_SGX},
|
||
|
{"SHA", XED_CPUID_BIT_SHA},
|
||
|
{"SMAP", XED_CPUID_BIT_SMAP},
|
||
|
{"SMX", XED_CPUID_BIT_SMX},
|
||
|
{"SNP", XED_CPUID_BIT_SNP},
|
||
|
{"SSE", XED_CPUID_BIT_SSE},
|
||
|
{"SSE2", XED_CPUID_BIT_SSE2},
|
||
|
{"SSE3", XED_CPUID_BIT_SSE3},
|
||
|
{"SSE4", XED_CPUID_BIT_SSE4},
|
||
|
{"SSE42", XED_CPUID_BIT_SSE42},
|
||
|
{"SSE4A", XED_CPUID_BIT_SSE4A},
|
||
|
{"SSSE3", XED_CPUID_BIT_SSSE3},
|
||
|
{"TSX_LDTRK", XED_CPUID_BIT_TSX_LDTRK},
|
||
|
{"UINTR", XED_CPUID_BIT_UINTR},
|
||
|
{"VAES", XED_CPUID_BIT_VAES},
|
||
|
{"VIA_PADLOCK_AES", XED_CPUID_BIT_VIA_PADLOCK_AES},
|
||
|
{"VIA_PADLOCK_AES_EN", XED_CPUID_BIT_VIA_PADLOCK_AES_EN},
|
||
|
{"VIA_PADLOCK_PMM", XED_CPUID_BIT_VIA_PADLOCK_PMM},
|
||
|
{"VIA_PADLOCK_PMM_EN", XED_CPUID_BIT_VIA_PADLOCK_PMM_EN},
|
||
|
{"VIA_PADLOCK_RNG", XED_CPUID_BIT_VIA_PADLOCK_RNG},
|
||
|
{"VIA_PADLOCK_RNG_EN", XED_CPUID_BIT_VIA_PADLOCK_RNG_EN},
|
||
|
{"VIA_PADLOCK_SHA", XED_CPUID_BIT_VIA_PADLOCK_SHA},
|
||
|
{"VIA_PADLOCK_SHA_EN", XED_CPUID_BIT_VIA_PADLOCK_SHA_EN},
|
||
|
{"VMX", XED_CPUID_BIT_VMX},
|
||
|
{"VPCLMULQDQ", XED_CPUID_BIT_VPCLMULQDQ},
|
||
|
{"WAITPKG", XED_CPUID_BIT_WAITPKG},
|
||
|
{"WBNOINVD", XED_CPUID_BIT_WBNOINVD},
|
||
|
{"XSAVE", XED_CPUID_BIT_XSAVE},
|
||
|
{"XSAVEC", XED_CPUID_BIT_XSAVEC},
|
||
|
{"XSAVEOPT", XED_CPUID_BIT_XSAVEOPT},
|
||
|
{"XSAVES", XED_CPUID_BIT_XSAVES},
|
||
|
{"LAST", XED_CPUID_BIT_LAST},
|
||
|
{0, XED_CPUID_BIT_LAST},
|
||
|
};
|
||
|
|
||
|
|
||
|
xed_cpuid_bit_enum_t str2xed_cpuid_bit_enum_t(const char* s)
|
||
|
{
|
||
|
const name_table_xed_cpuid_bit_enum_t* p = name_array_xed_cpuid_bit_enum_t;
|
||
|
while( p->name ) {
|
||
|
if (strcmp(p->name,s) == 0) {
|
||
|
return p->value;
|
||
|
}
|
||
|
p++;
|
||
|
}
|
||
|
|
||
|
|
||
|
return XED_CPUID_BIT_INVALID;
|
||
|
}
|
||
|
|
||
|
|
||
|
const char* xed_cpuid_bit_enum_t2str(const xed_cpuid_bit_enum_t p)
|
||
|
{
|
||
|
xed_cpuid_bit_enum_t type_idx = p;
|
||
|
if ( p > XED_CPUID_BIT_LAST) type_idx = XED_CPUID_BIT_LAST;
|
||
|
return name_array_xed_cpuid_bit_enum_t[type_idx].name;
|
||
|
}
|
||
|
|
||
|
xed_cpuid_bit_enum_t xed_cpuid_bit_enum_t_last(void) {
|
||
|
return XED_CPUID_BIT_LAST;
|
||
|
}
|
||
|
|
||
|
/*
|
||
|
|
||
|
Here is a skeleton switch statement embedded in a comment
|
||
|
|
||
|
|
||
|
switch(p) {
|
||
|
case XED_CPUID_BIT_INVALID:
|
||
|
case XED_CPUID_BIT_ADOXADCX:
|
||
|
case XED_CPUID_BIT_AES:
|
||
|
case XED_CPUID_BIT_AMX_BF16:
|
||
|
case XED_CPUID_BIT_AMX_INT8:
|
||
|
case XED_CPUID_BIT_AMX_TILES:
|
||
|
case XED_CPUID_BIT_AVX:
|
||
|
case XED_CPUID_BIT_AVX2:
|
||
|
case XED_CPUID_BIT_AVX512BW:
|
||
|
case XED_CPUID_BIT_AVX512CD:
|
||
|
case XED_CPUID_BIT_AVX512DQ:
|
||
|
case XED_CPUID_BIT_AVX512ER:
|
||
|
case XED_CPUID_BIT_AVX512F:
|
||
|
case XED_CPUID_BIT_AVX512IFMA:
|
||
|
case XED_CPUID_BIT_AVX512PF:
|
||
|
case XED_CPUID_BIT_AVX512VBMI:
|
||
|
case XED_CPUID_BIT_AVX512VL:
|
||
|
case XED_CPUID_BIT_AVX512_4FMAPS:
|
||
|
case XED_CPUID_BIT_AVX512_4VNNIW:
|
||
|
case XED_CPUID_BIT_AVX512_BITALG:
|
||
|
case XED_CPUID_BIT_AVX512_FP16:
|
||
|
case XED_CPUID_BIT_AVX512_VBMI2:
|
||
|
case XED_CPUID_BIT_AVX512_VNNI:
|
||
|
case XED_CPUID_BIT_AVX512_VP2INTERSECT:
|
||
|
case XED_CPUID_BIT_AVX512_VPOPCNTDQ:
|
||
|
case XED_CPUID_BIT_AVX_VNNI:
|
||
|
case XED_CPUID_BIT_BF16:
|
||
|
case XED_CPUID_BIT_BMI1:
|
||
|
case XED_CPUID_BIT_BMI2:
|
||
|
case XED_CPUID_BIT_CET:
|
||
|
case XED_CPUID_BIT_CLDEMOTE:
|
||
|
case XED_CPUID_BIT_CLFLUSH:
|
||
|
case XED_CPUID_BIT_CLFLUSHOPT:
|
||
|
case XED_CPUID_BIT_CLWB:
|
||
|
case XED_CPUID_BIT_CMPXCHG16B:
|
||
|
case XED_CPUID_BIT_ENQCMD:
|
||
|
case XED_CPUID_BIT_F16C:
|
||
|
case XED_CPUID_BIT_FMA:
|
||
|
case XED_CPUID_BIT_FXSAVE:
|
||
|
case XED_CPUID_BIT_GFNI:
|
||
|
case XED_CPUID_BIT_HRESET:
|
||
|
case XED_CPUID_BIT_INTEL64:
|
||
|
case XED_CPUID_BIT_INTELPT:
|
||
|
case XED_CPUID_BIT_INVPCID:
|
||
|
case XED_CPUID_BIT_KLENABLED:
|
||
|
case XED_CPUID_BIT_KLSUPPORTED:
|
||
|
case XED_CPUID_BIT_KLWIDE:
|
||
|
case XED_CPUID_BIT_LAHF:
|
||
|
case XED_CPUID_BIT_LZCNT:
|
||
|
case XED_CPUID_BIT_MCOMMIT:
|
||
|
case XED_CPUID_BIT_MONITOR:
|
||
|
case XED_CPUID_BIT_MONITORX:
|
||
|
case XED_CPUID_BIT_MOVDIR64B:
|
||
|
case XED_CPUID_BIT_MOVDIRI:
|
||
|
case XED_CPUID_BIT_MOVEBE:
|
||
|
case XED_CPUID_BIT_MPX:
|
||
|
case XED_CPUID_BIT_OSPKU:
|
||
|
case XED_CPUID_BIT_OSXSAVE:
|
||
|
case XED_CPUID_BIT_PCLMULQDQ:
|
||
|
case XED_CPUID_BIT_PCONFIG:
|
||
|
case XED_CPUID_BIT_PKU:
|
||
|
case XED_CPUID_BIT_POPCNT:
|
||
|
case XED_CPUID_BIT_PREFETCHW:
|
||
|
case XED_CPUID_BIT_PREFETCHWT1:
|
||
|
case XED_CPUID_BIT_PTWRITE:
|
||
|
case XED_CPUID_BIT_RDP:
|
||
|
case XED_CPUID_BIT_RDPRU:
|
||
|
case XED_CPUID_BIT_RDRAND:
|
||
|
case XED_CPUID_BIT_RDSEED:
|
||
|
case XED_CPUID_BIT_RDTSCP:
|
||
|
case XED_CPUID_BIT_RDWRFSGS:
|
||
|
case XED_CPUID_BIT_RTM:
|
||
|
case XED_CPUID_BIT_SERIALIZE:
|
||
|
case XED_CPUID_BIT_SGX:
|
||
|
case XED_CPUID_BIT_SHA:
|
||
|
case XED_CPUID_BIT_SMAP:
|
||
|
case XED_CPUID_BIT_SMX:
|
||
|
case XED_CPUID_BIT_SNP:
|
||
|
case XED_CPUID_BIT_SSE:
|
||
|
case XED_CPUID_BIT_SSE2:
|
||
|
case XED_CPUID_BIT_SSE3:
|
||
|
case XED_CPUID_BIT_SSE4:
|
||
|
case XED_CPUID_BIT_SSE42:
|
||
|
case XED_CPUID_BIT_SSE4A:
|
||
|
case XED_CPUID_BIT_SSSE3:
|
||
|
case XED_CPUID_BIT_TSX_LDTRK:
|
||
|
case XED_CPUID_BIT_UINTR:
|
||
|
case XED_CPUID_BIT_VAES:
|
||
|
case XED_CPUID_BIT_VIA_PADLOCK_AES:
|
||
|
case XED_CPUID_BIT_VIA_PADLOCK_AES_EN:
|
||
|
case XED_CPUID_BIT_VIA_PADLOCK_PMM:
|
||
|
case XED_CPUID_BIT_VIA_PADLOCK_PMM_EN:
|
||
|
case XED_CPUID_BIT_VIA_PADLOCK_RNG:
|
||
|
case XED_CPUID_BIT_VIA_PADLOCK_RNG_EN:
|
||
|
case XED_CPUID_BIT_VIA_PADLOCK_SHA:
|
||
|
case XED_CPUID_BIT_VIA_PADLOCK_SHA_EN:
|
||
|
case XED_CPUID_BIT_VMX:
|
||
|
case XED_CPUID_BIT_VPCLMULQDQ:
|
||
|
case XED_CPUID_BIT_WAITPKG:
|
||
|
case XED_CPUID_BIT_WBNOINVD:
|
||
|
case XED_CPUID_BIT_XSAVE:
|
||
|
case XED_CPUID_BIT_XSAVEC:
|
||
|
case XED_CPUID_BIT_XSAVEOPT:
|
||
|
case XED_CPUID_BIT_XSAVES:
|
||
|
case XED_CPUID_BIT_LAST:
|
||
|
default:
|
||
|
xed_assert(0);
|
||
|
}
|
||
|
*/
|