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314 lines
27 KiB
314 lines
27 KiB
3 years ago
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/// @file xed-cpuid-tables.c
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// This file was automatically generated.
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// Do not edit this file.
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/*BEGIN_LEGAL
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Copyright (c) 2021 Intel Corporation
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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END_LEGAL */
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#include "xed-internal-header.h"
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const xed_cpuid_rec_t xed_cpuid_info[] = {
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/* INVALID */ { 0x0, 0, 0, XED_REG_INVALID },
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/* ADOXADCX */ { 0x7, 0, 19, XED_REG_EBX },
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/* AES */ { 0x1, 0, 25, XED_REG_ECX },
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/* AMX_BF16 */ { 0x7, 0, 22, XED_REG_EDX },
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/* AMX_INT8 */ { 0x7, 0, 25, XED_REG_EDX },
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/* AMX_TILES */ { 0x7, 0, 24, XED_REG_EDX },
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/* AVX */ { 0x1, 0, 28, XED_REG_ECX },
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/* AVX2 */ { 0x7, 0, 5, XED_REG_EBX },
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/* AVX512BW */ { 0x7, 0, 30, XED_REG_EBX },
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/* AVX512CD */ { 0x7, 0, 28, XED_REG_EBX },
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/* AVX512DQ */ { 0x7, 0, 17, XED_REG_EBX },
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/* AVX512ER */ { 0x7, 0, 27, XED_REG_EBX },
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/* AVX512F */ { 0x7, 0, 16, XED_REG_EBX },
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/* AVX512IFMA */ { 0x7, 0, 21, XED_REG_EBX },
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/* AVX512PF */ { 0x7, 0, 26, XED_REG_EBX },
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/* AVX512VBMI */ { 0x7, 0, 1, XED_REG_ECX },
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/* AVX512VL */ { 0x7, 0, 31, XED_REG_EBX },
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/* AVX512_4FMAPS */ { 0x7, 0, 3, XED_REG_EDX },
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/* AVX512_4VNNIW */ { 0x7, 0, 2, XED_REG_EDX },
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/* AVX512_BITALG */ { 0x7, 0, 12, XED_REG_ECX },
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/* AVX512_FP16 */ { 0x7, 0, 23, XED_REG_EDX },
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/* AVX512_VBMI2 */ { 0x7, 0, 6, XED_REG_ECX },
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/* AVX512_VNNI */ { 0x7, 0, 11, XED_REG_ECX },
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/* AVX512_VP2INTERSECT */ { 0x7, 0, 8, XED_REG_EDX },
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/* AVX512_VPOPCNTDQ */ { 0x7, 0, 14, XED_REG_ECX },
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/* AVX_VNNI */ { 0x7, 1, 4, XED_REG_EAX },
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/* BF16 */ { 0x7, 1, 5, XED_REG_EAX },
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/* BMI1 */ { 0x7, 0, 3, XED_REG_EBX },
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/* BMI2 */ { 0x7, 0, 8, XED_REG_EBX },
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/* CET */ { 0x7, 0, 7, XED_REG_ECX },
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/* CLDEMOTE */ { 0x7, 0, 25, XED_REG_ECX },
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/* CLFLUSH */ { 0x1, 0, 19, XED_REG_EDX },
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/* CLFLUSHOPT */ { 0x7, 0, 23, XED_REG_EBX },
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/* CLWB */ { 0x7, 0, 24, XED_REG_EBX },
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/* CMPXCHG16B */ { 0x1, 0, 13, XED_REG_ECX },
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/* ENQCMD */ { 0x7, 0, 29, XED_REG_ECX },
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/* F16C */ { 0x1, 0, 29, XED_REG_ECX },
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/* FMA */ { 0x1, 0, 12, XED_REG_ECX },
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/* FXSAVE */ { 0x1, 0, 24, XED_REG_EDX },
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/* GFNI */ { 0x7, 0, 8, XED_REG_ECX },
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/* HRESET */ { 0x7, 1, 22, XED_REG_EAX },
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/* INTEL64 */ { 0x80000001, 0, 29, XED_REG_EDX },
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/* INTELPT */ { 0x7, 0, 25, XED_REG_EBX },
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/* INVPCID */ { 0x7, 0, 10, XED_REG_EBX },
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/* KLENABLED */ { 0x19, 0, 0, XED_REG_EBX },
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/* KLSUPPORTED */ { 0x7, 0, 23, XED_REG_ECX },
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/* KLWIDE */ { 0x19, 0, 2, XED_REG_EBX },
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/* LAHF */ { 0x80000001, 0, 0, XED_REG_ECX },
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/* LZCNT */ { 0x80000001, 0, 5, XED_REG_ECX },
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/* MCOMMIT */ { 0x80000008, 0, 8, XED_REG_EBX },
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/* MONITOR */ { 0x1, 0, 3, XED_REG_ECX },
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/* MONITORX */ { 0x80000001, 0, 29, XED_REG_ECX },
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/* MOVDIR64B */ { 0x7, 0, 28, XED_REG_ECX },
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/* MOVDIRI */ { 0x7, 0, 27, XED_REG_ECX },
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/* MOVEBE */ { 0x1, 0, 22, XED_REG_ECX },
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/* MPX */ { 0x7, 0, 14, XED_REG_EBX },
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/* OSPKU */ { 0x7, 0, 4, XED_REG_ECX },
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/* OSXSAVE */ { 0x1, 0, 27, XED_REG_ECX },
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/* PCLMULQDQ */ { 0x1, 0, 1, XED_REG_ECX },
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/* PCONFIG */ { 0x7, 0, 18, XED_REG_EDX },
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/* PKU */ { 0x7, 0, 3, XED_REG_ECX },
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/* POPCNT */ { 0x1, 0, 23, XED_REG_ECX },
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/* PREFETCHW */ { 0x80000001, 0, 8, XED_REG_ECX },
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/* PREFETCHWT1 */ { 0x7, 0, 0, XED_REG_ECX },
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/* PTWRITE */ { 0x14, 0, 4, XED_REG_EBX },
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/* RDP */ { 0x7, 0, 22, XED_REG_ECX },
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/* RDPRU */ { 0x80000008, 0, 4, XED_REG_EBX },
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/* RDRAND */ { 0x1, 0, 30, XED_REG_ECX },
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/* RDSEED */ { 0x7, 0, 18, XED_REG_EBX },
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/* RDTSCP */ { 0x80000001, 0, 27, XED_REG_EDX },
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/* RDWRFSGS */ { 0x7, 0, 0, XED_REG_EBX },
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/* RTM */ { 0x7, 0, 11, XED_REG_EBX },
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/* SERIALIZE */ { 0x7, 0, 14, XED_REG_EDX },
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/* SGX */ { 0x7, 0, 2, XED_REG_EBX },
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/* SHA */ { 0x7, 0, 29, XED_REG_EBX },
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/* SMAP */ { 0x7, 0, 20, XED_REG_EBX },
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/* SMX */ { 0x1, 0, 6, XED_REG_ECX },
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/* SNP */ { 0x8000001F, 0, 4, XED_REG_EAX },
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/* SSE */ { 0x1, 0, 25, XED_REG_EDX },
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/* SSE2 */ { 0x1, 0, 26, XED_REG_EDX },
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/* SSE3 */ { 0x1, 0, 0, XED_REG_ECX },
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/* SSE4 */ { 0x1, 0, 19, XED_REG_ECX },
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/* SSE42 */ { 0x1, 0, 20, XED_REG_ECX },
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/* SSE4A */ { 0x80000001, 0, 6, XED_REG_ECX },
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/* SSSE3 */ { 0x1, 0, 9, XED_REG_ECX },
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/* TSX_LDTRK */ { 0x7, 0, 16, XED_REG_EDX },
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/* UINTR */ { 0x7, 0, 5, XED_REG_EDX },
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/* VAES */ { 0x7, 0, 9, XED_REG_ECX },
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/* VIA_PADLOCK_AES */ { 0xC0000001, 0, 6, XED_REG_EDX },
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/* VIA_PADLOCK_AES_EN */ { 0xC0000001, 0, 7, XED_REG_EDX },
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/* VIA_PADLOCK_PMM */ { 0xC0000001, 0, 12, XED_REG_EDX },
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/* VIA_PADLOCK_PMM_EN */ { 0xC0000001, 0, 13, XED_REG_EDX },
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/* VIA_PADLOCK_RNG */ { 0xC0000001, 0, 2, XED_REG_EDX },
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/* VIA_PADLOCK_RNG_EN */ { 0xC0000001, 0, 3, XED_REG_EDX },
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/* VIA_PADLOCK_SHA */ { 0xC0000001, 0, 10, XED_REG_EDX },
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/* VIA_PADLOCK_SHA_EN */ { 0xC0000001, 0, 11, XED_REG_EDX },
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/* VMX */ { 0x1, 0, 5, XED_REG_ECX },
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/* VPCLMULQDQ */ { 0x7, 0, 10, XED_REG_ECX },
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/* WAITPKG */ { 0x7, 0, 5, XED_REG_ECX },
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/* WBNOINVD */ { 0x80000008, 0, 9, XED_REG_EBX },
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/* XSAVE */ { 0x1, 0, 26, XED_REG_ECX },
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/* XSAVEC */ { 0xD, 1, 1, XED_REG_EAX },
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/* XSAVEOPT */ { 0xD, 1, 0, XED_REG_EAX },
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/* XSAVES */ { 0xD, 1, 3, XED_REG_EAX },
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};
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const xed_cpuid_bit_enum_t xed_isa_set_to_cpuid_mapping[][XED_MAX_CPUID_BITS_PER_ISA_SET] = {
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/* INVALID */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* 3DNOW */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* 3DNOW_PREFETCH */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* ADOX_ADCX */ { XED_CPUID_BIT_ADOXADCX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AES */ { XED_CPUID_BIT_AES, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AMD */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AMD_INVLPGB */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AMX_BF16 */ { XED_CPUID_BIT_AMX_TILES, XED_CPUID_BIT_AMX_BF16, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AMX_INT8 */ { XED_CPUID_BIT_AMX_TILES, XED_CPUID_BIT_AMX_INT8, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AMX_TILE */ { XED_CPUID_BIT_AMX_TILES, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX */ { XED_CPUID_BIT_AVX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX2 */ { XED_CPUID_BIT_AVX2, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX2GATHER */ { XED_CPUID_BIT_AVX2, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512BW_128 */ { XED_CPUID_BIT_AVX512BW, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512BW_128N */ { XED_CPUID_BIT_AVX512BW, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512BW_256 */ { XED_CPUID_BIT_AVX512BW, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512BW_512 */ { XED_CPUID_BIT_AVX512BW, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512BW_KOP */ { XED_CPUID_BIT_AVX512BW, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512CD_128 */ { XED_CPUID_BIT_AVX512CD, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512CD_256 */ { XED_CPUID_BIT_AVX512CD, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512CD_512 */ { XED_CPUID_BIT_AVX512CD, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512DQ_128 */ { XED_CPUID_BIT_AVX512DQ, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512DQ_128N */ { XED_CPUID_BIT_AVX512DQ, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512DQ_256 */ { XED_CPUID_BIT_AVX512DQ, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512DQ_512 */ { XED_CPUID_BIT_AVX512DQ, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512DQ_KOP */ { XED_CPUID_BIT_AVX512DQ, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512DQ_SCALAR */ { XED_CPUID_BIT_AVX512DQ, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512ER_512 */ { XED_CPUID_BIT_AVX512ER, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512ER_SCALAR */ { XED_CPUID_BIT_AVX512ER, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512F_128 */ { XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512F_128N */ { XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512F_256 */ { XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512F_512 */ { XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512F_KOP */ { XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512F_SCALAR */ { XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512PF_512 */ { XED_CPUID_BIT_AVX512PF, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_4FMAPS_512 */ { XED_CPUID_BIT_AVX512_4FMAPS, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_4FMAPS_SCALAR */ { XED_CPUID_BIT_AVX512_4FMAPS, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_4VNNIW_512 */ { XED_CPUID_BIT_AVX512_4VNNIW, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_BF16_128 */ { XED_CPUID_BIT_BF16, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_BF16_256 */ { XED_CPUID_BIT_BF16, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_BF16_512 */ { XED_CPUID_BIT_BF16, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_BITALG_128 */ { XED_CPUID_BIT_AVX512_BITALG, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_BITALG_256 */ { XED_CPUID_BIT_AVX512_BITALG, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_BITALG_512 */ { XED_CPUID_BIT_AVX512_BITALG, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_FP16_128 */ { XED_CPUID_BIT_AVX512_FP16, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_FP16_128N */ { XED_CPUID_BIT_AVX512_FP16, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_FP16_256 */ { XED_CPUID_BIT_AVX512_FP16, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_FP16_512 */ { XED_CPUID_BIT_AVX512_FP16, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_FP16_SCALAR */ { XED_CPUID_BIT_AVX512_FP16, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_GFNI_128 */ { XED_CPUID_BIT_GFNI, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID } ,
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/* AVX512_GFNI_256 */ { XED_CPUID_BIT_GFNI, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID } ,
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/* AVX512_GFNI_512 */ { XED_CPUID_BIT_GFNI, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_IFMA_128 */ { XED_CPUID_BIT_AVX512IFMA, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_IFMA_256 */ { XED_CPUID_BIT_AVX512IFMA, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_IFMA_512 */ { XED_CPUID_BIT_AVX512IFMA, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_VAES_128 */ { XED_CPUID_BIT_VAES, XED_CPUID_BIT_AES, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_AVX512VL } ,
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/* AVX512_VAES_256 */ { XED_CPUID_BIT_VAES, XED_CPUID_BIT_AES, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_AVX512VL } ,
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/* AVX512_VAES_512 */ { XED_CPUID_BIT_VAES, XED_CPUID_BIT_AES, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_INVALID } ,
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/* AVX512_VBMI2_128 */ { XED_CPUID_BIT_AVX512_VBMI2, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_VBMI2_256 */ { XED_CPUID_BIT_AVX512_VBMI2, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
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/* AVX512_VBMI2_512 */ { XED_CPUID_BIT_AVX512_VBMI2, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VBMI_128 */ { XED_CPUID_BIT_AVX512VBMI, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VBMI_256 */ { XED_CPUID_BIT_AVX512VBMI, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VBMI_512 */ { XED_CPUID_BIT_AVX512VBMI, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VNNI_128 */ { XED_CPUID_BIT_AVX512_VNNI, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VNNI_256 */ { XED_CPUID_BIT_AVX512_VNNI, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VNNI_512 */ { XED_CPUID_BIT_AVX512_VNNI, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VP2INTERSECT_128 */ { XED_CPUID_BIT_AVX512_VP2INTERSECT, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VP2INTERSECT_256 */ { XED_CPUID_BIT_AVX512_VP2INTERSECT, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VP2INTERSECT_512 */ { XED_CPUID_BIT_AVX512_VP2INTERSECT, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VPCLMULQDQ_128 */ { XED_CPUID_BIT_VPCLMULQDQ, XED_CPUID_BIT_PCLMULQDQ, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_AVX512VL } ,
|
||
|
/* AVX512_VPCLMULQDQ_256 */ { XED_CPUID_BIT_VPCLMULQDQ, XED_CPUID_BIT_PCLMULQDQ, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_AVX512VL } ,
|
||
|
/* AVX512_VPCLMULQDQ_512 */ { XED_CPUID_BIT_VPCLMULQDQ, XED_CPUID_BIT_PCLMULQDQ, XED_CPUID_BIT_AVX512F, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VPOPCNTDQ_128 */ { XED_CPUID_BIT_AVX512_VPOPCNTDQ, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VPOPCNTDQ_256 */ { XED_CPUID_BIT_AVX512_VPOPCNTDQ, XED_CPUID_BIT_AVX512VL, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX512_VPOPCNTDQ_512 */ { XED_CPUID_BIT_AVX512_VPOPCNTDQ, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVXAES */ { XED_CPUID_BIT_AES, XED_CPUID_BIT_AVX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX_GFNI */ { XED_CPUID_BIT_GFNI, XED_CPUID_BIT_AVX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* AVX_VNNI */ { XED_CPUID_BIT_AVX_VNNI, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* BMI1 */ { XED_CPUID_BIT_BMI1, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* BMI2 */ { XED_CPUID_BIT_BMI2, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* CET */ { XED_CPUID_BIT_CET, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* CLDEMOTE */ { XED_CPUID_BIT_CLDEMOTE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* CLFLUSHOPT */ { XED_CPUID_BIT_CLFLUSHOPT, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* CLFSH */ { XED_CPUID_BIT_CLFLUSH, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* CLWB */ { XED_CPUID_BIT_CLWB, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* CLZERO */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* CMOV */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* CMPXCHG16B */ { XED_CPUID_BIT_CMPXCHG16B, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* ENQCMD */ { XED_CPUID_BIT_ENQCMD, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* F16C */ { XED_CPUID_BIT_F16C, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* FAT_NOP */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* FCMOV */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* FMA */ { XED_CPUID_BIT_FMA, XED_CPUID_BIT_AVX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* FMA4 */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* FXSAVE */ { XED_CPUID_BIT_FXSAVE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* FXSAVE64 */ { XED_CPUID_BIT_FXSAVE, XED_CPUID_BIT_INTEL64, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* GFNI */ { XED_CPUID_BIT_GFNI, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* HRESET */ { XED_CPUID_BIT_HRESET, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* I186 */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* I286PROTECTED */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* I286REAL */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* I386 */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* I486 */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* I486REAL */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* I86 */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* INVPCID */ { XED_CPUID_BIT_INVPCID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* KEYLOCKER */ { XED_CPUID_BIT_KLSUPPORTED, XED_CPUID_BIT_KLENABLED, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* KEYLOCKER_WIDE */ { XED_CPUID_BIT_KLSUPPORTED, XED_CPUID_BIT_KLWIDE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* LAHF */ { XED_CPUID_BIT_LAHF, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* LONGMODE */ { XED_CPUID_BIT_INTEL64, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* LWP */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* LZCNT */ { XED_CPUID_BIT_LZCNT, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* MCOMMIT */ { XED_CPUID_BIT_MCOMMIT, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* MONITOR */ { XED_CPUID_BIT_MONITOR, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* MONITORX */ { XED_CPUID_BIT_MONITORX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* MOVBE */ { XED_CPUID_BIT_MOVEBE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* MOVDIR */ { XED_CPUID_BIT_MOVDIRI, XED_CPUID_BIT_MOVDIR64B, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* MPX */ { XED_CPUID_BIT_MPX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PAUSE */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PCLMULQDQ */ { XED_CPUID_BIT_PCLMULQDQ, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PCONFIG */ { XED_CPUID_BIT_PCONFIG, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PENTIUMMMX */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PENTIUMREAL */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PKU */ { XED_CPUID_BIT_PKU, XED_CPUID_BIT_OSPKU, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* POPCNT */ { XED_CPUID_BIT_POPCNT, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PPRO */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PPRO_UD0_LONG */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PPRO_UD0_SHORT */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PREFETCHW */ { XED_CPUID_BIT_PREFETCHW, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PREFETCHWT1 */ { XED_CPUID_BIT_PREFETCHWT1, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PREFETCH_NOP */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* PTWRITE */ { XED_CPUID_BIT_INTELPT, XED_CPUID_BIT_PTWRITE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* RDPID */ { XED_CPUID_BIT_RDP, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* RDPMC */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* RDPRU */ { XED_CPUID_BIT_RDPRU, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* RDRAND */ { XED_CPUID_BIT_RDRAND, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* RDSEED */ { XED_CPUID_BIT_RDSEED, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* RDTSCP */ { XED_CPUID_BIT_RDTSCP, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* RDWRFSGS */ { XED_CPUID_BIT_RDWRFSGS, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* RTM */ { XED_CPUID_BIT_RTM, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SERIALIZE */ { XED_CPUID_BIT_SERIALIZE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SGX */ { XED_CPUID_BIT_SGX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SGX_ENCLV */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SHA */ { XED_CPUID_BIT_SHA, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SMAP */ { XED_CPUID_BIT_SMAP, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SMX */ { XED_CPUID_BIT_SMX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SNP */ { XED_CPUID_BIT_SNP, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE */ { XED_CPUID_BIT_SSE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE2 */ { XED_CPUID_BIT_SSE2, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE2MMX */ { XED_CPUID_BIT_SSE2, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE3 */ { XED_CPUID_BIT_SSE3, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE3X87 */ { XED_CPUID_BIT_SSE3, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE4 */ { XED_CPUID_BIT_SSE4, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE42 */ { XED_CPUID_BIT_SSE42, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE4A */ { XED_CPUID_BIT_SSE4A, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSEMXCSR */ { XED_CPUID_BIT_SSE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSE_PREFETCH */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSSE3 */ { XED_CPUID_BIT_SSSE3, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SSSE3MMX */ { XED_CPUID_BIT_SSSE3, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* SVM */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* TBM */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* TDX */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* TSX_LDTRK */ { XED_CPUID_BIT_TSX_LDTRK, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* UINTR */ { XED_CPUID_BIT_UINTR, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* VAES */ { XED_CPUID_BIT_VAES, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* VIA_PADLOCK_AES */ { XED_CPUID_BIT_VIA_PADLOCK_AES, XED_CPUID_BIT_VIA_PADLOCK_AES_EN, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* VIA_PADLOCK_MONTMUL */ { XED_CPUID_BIT_VIA_PADLOCK_PMM, XED_CPUID_BIT_VIA_PADLOCK_PMM_EN, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* VIA_PADLOCK_RNG */ { XED_CPUID_BIT_VIA_PADLOCK_RNG, XED_CPUID_BIT_VIA_PADLOCK_RNG_EN, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* VIA_PADLOCK_SHA */ { XED_CPUID_BIT_VIA_PADLOCK_SHA, XED_CPUID_BIT_VIA_PADLOCK_SHA_EN, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* VMFUNC */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* VPCLMULQDQ */ { XED_CPUID_BIT_VPCLMULQDQ, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* VTX */ { XED_CPUID_BIT_VMX, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* WAITPKG */ { XED_CPUID_BIT_WAITPKG, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* WBNOINVD */ { XED_CPUID_BIT_WBNOINVD, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* X87 */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* XOP */ { XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* XSAVE */ { XED_CPUID_BIT_XSAVE, XED_CPUID_BIT_OSXSAVE, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* XSAVEC */ { XED_CPUID_BIT_XSAVEC, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* XSAVEOPT */ { XED_CPUID_BIT_XSAVEOPT, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
/* XSAVES */ { XED_CPUID_BIT_XSAVES, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID, XED_CPUID_BIT_INVALID } ,
|
||
|
};
|