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3062 lines
138 KiB
3062 lines
138 KiB
3 years ago
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/// @file xed-encoder-2.c
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// This file was automatically generated.
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// Do not edit this file.
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/*BEGIN_LEGAL
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Copyright (c) 2021 Intel Corporation
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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END_LEGAL */
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#include "xed-internal-header.h"
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#include "xed-encoder.h"
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#include "xed-encode-private.h"
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#include "xed-enc-operand-lu.h"
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#include "xed-operand-accessors.h"
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xed_uint32_t xed_encode_ntluf_XMM_B_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
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{
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typedef struct { xed_int8_t rexb ;xed_int8_t rm;} lu_entry_t;
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static const lu_entry_t lu_table[16] = {
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/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,0},
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/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,1},
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/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,2},
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/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,3},
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/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,4},
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/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,5},
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/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,6},
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/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,7},
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/*h(196)=8 OUTREG=XED_REG_XMM8 -> FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,0},
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/*h(197)=9 OUTREG=XED_REG_XMM9 -> FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,1},
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/*h(198)=10 OUTREG=XED_REG_XMM10 -> FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,2},
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/*h(199)=11 OUTREG=XED_REG_XMM11 -> FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,3},
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/*h(200)=12 OUTREG=XED_REG_XMM12 -> FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,4},
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/*h(201)=13 OUTREG=XED_REG_XMM13 -> FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,5},
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/*h(202)=14 OUTREG=XED_REG_XMM14 -> FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,6},
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/*h(203)=15 OUTREG=XED_REG_XMM15 -> FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,7}
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};
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xed_uint64_t key = 0;
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xed_uint64_t hidx = 0;
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xed3_operand_set_outreg(xes,arg_reg);
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key = xed_enc_lu_OUTREG(xes);
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hidx = key - 188;
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if(hidx <= 15) {
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xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
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xed3_operand_set_rm(xes,lu_table[hidx].rm);
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return 1;
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}
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else{
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return 0;
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}
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}
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xed_uint32_t xed_encode_ntluf_BND_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
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{
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typedef struct {xed_uint32_t key; xed_int8_t reg ;xed_int8_t rexr;} lu_entry_t;
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static const lu_entry_t lu_table[5] = {
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/*h(5)=0 OUTREG=XED_REG_BND2 -> FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {5, 2,0},
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/*h(102)=1 OUTREG=XED_REG_ERROR -> FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {102, 4,0},
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/*h(4)=2 OUTREG=XED_REG_BND1 -> FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {4, 1,0},
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/*h(6)=3 OUTREG=XED_REG_BND3 -> FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {6, 3,0},
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/*h(3)=4 OUTREG=XED_REG_BND0 -> FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {3, 0,0}
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};
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xed_uint64_t key = 0;
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xed_uint64_t hidx = 0;
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xed3_operand_set_outreg(xes,arg_reg);
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key = xed_enc_lu_OUTREG(xes);
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hidx = (3*key % 5);
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if(lu_table[hidx].key == key) {
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xed3_operand_set_reg(xes,lu_table[hidx].reg);
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xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
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return 1;
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}
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else{
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return 0;
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}
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}
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xed_uint32_t xed_encode_ntluf_BND_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
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{
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typedef struct {xed_uint32_t key; xed_int8_t rexb ;xed_int8_t rm;} lu_entry_t;
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static const lu_entry_t lu_table[5] = {
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/*h(5)=0 OUTREG=XED_REG_BND2 -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {5, 0,2},
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/*h(102)=1 OUTREG=XED_REG_ERROR -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {102, 0,4},
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/*h(4)=2 OUTREG=XED_REG_BND1 -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {4, 0,1},
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/*h(6)=3 OUTREG=XED_REG_BND3 -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {6, 0,3},
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/*h(3)=4 OUTREG=XED_REG_BND0 -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {3, 0,0}
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};
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xed_uint64_t key = 0;
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xed_uint64_t hidx = 0;
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xed3_operand_set_outreg(xes,arg_reg);
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key = xed_enc_lu_OUTREG(xes);
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hidx = (3*key % 5);
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if(lu_table[hidx].key == key) {
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xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
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xed3_operand_set_rm(xes,lu_table[hidx].rm);
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return 1;
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}
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else{
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return 0;
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}
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}
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xed_uint32_t xed_encode_ntluf_A_GPR_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
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{
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typedef struct {xed_uint32_t key; xed_int8_t reg ;xed_int8_t rexr;} lu_entry_t;
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static const lu_entry_t lu_table[96] = {
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/*h(206)=0 OUTREG=XED_REG_ECX EASZ=2 -> FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {206, 1,0},
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/*empty slot1 */ {0,0,0},
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/*h(149)=2 OUTREG=XED_REG_BX EASZ=1 -> FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {149, 3,0},
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/*h(275)=3 OUTREG=XED_REG_RDX EASZ=3 -> FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {275, 2,0},
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/*h(137)=4 OUTREG=XED_REG_AX EASZ=1 -> FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {137, 0,0},
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/*h(218)=5 OUTREG=XED_REG_ESP EASZ=2 -> FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {218, 4,0},
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/*empty slot1 */ {0,0,0},
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/*h(161)=7 OUTREG=XED_REG_SI EASZ=1 -> FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {161, 6,0},
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/*h(287)=8 OUTREG=XED_REG_RBP EASZ=3 -> FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {287, 5,0},
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/*empty slot1 */ {0,0,0},
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/*h(230)=10 OUTREG=XED_REG_EDI EASZ=2 -> FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {230, 7,0},
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/*empty slot1 */ {0,0,0},
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/*h(173)=12 OUTREG=XED_REG_R9W EASZ=1 -> FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {173, 1,1},
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/*h(299)=13 OUTREG=XED_REG_R8 EASZ=3 -> FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {299, 0,1},
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/*empty slot1 */ {0,0,0},
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/*h(242)=15 OUTREG=XED_REG_R10D EASZ=2 -> FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {242, 2,1},
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/*empty slot1 */ {0,0,0},
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/*h(185)=17 OUTREG=XED_REG_R12W EASZ=1 -> FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {185, 4,1},
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/*h(311)=18 OUTREG=XED_REG_R11 EASZ=3 -> FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {311, 3,1},
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/*empty slot1 */ {0,0,0},
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/*h(254)=20 OUTREG=XED_REG_R13D EASZ=2 -> FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {254, 5,1},
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/*empty slot1 */ {0,0,0},
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/*h(197)=22 OUTREG=XED_REG_R15W EASZ=1 -> FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {197, 7,1},
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/*h(323)=23 OUTREG=XED_REG_R14 EASZ=3 -> FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {323, 6,1},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*h(141)=33 OUTREG=XED_REG_CX EASZ=1 -> FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {141, 1,0},
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/*h(267)=34 OUTREG=XED_REG_RAX EASZ=3 -> FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {267, 0,0},
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/*empty slot1 */ {0,0,0},
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/*h(210)=36 OUTREG=XED_REG_EDX EASZ=2 -> FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {210, 2,0},
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/*empty slot1 */ {0,0,0},
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/*h(153)=38 OUTREG=XED_REG_SP EASZ=1 -> FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {153, 4,0},
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/*h(279)=39 OUTREG=XED_REG_RBX EASZ=3 -> FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {279, 3,0},
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/*empty slot1 */ {0,0,0},
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/*h(222)=41 OUTREG=XED_REG_EBP EASZ=2 -> FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {222, 5,0},
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/*empty slot1 */ {0,0,0},
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/*h(165)=43 OUTREG=XED_REG_DI EASZ=1 -> FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {165, 7,0},
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/*h(291)=44 OUTREG=XED_REG_RSI EASZ=3 -> FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {291, 6,0},
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/*empty slot1 */ {0,0,0},
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/*h(234)=46 OUTREG=XED_REG_R8D EASZ=2 -> FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {234, 0,1},
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/*empty slot1 */ {0,0,0},
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/*h(177)=48 OUTREG=XED_REG_R10W EASZ=1 -> FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {177, 2,1},
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/*h(303)=49 OUTREG=XED_REG_R9 EASZ=3 -> FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {303, 1,1},
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/*empty slot1 */ {0,0,0},
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/*h(246)=51 OUTREG=XED_REG_R11D EASZ=2 -> FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {246, 3,1},
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/*empty slot1 */ {0,0,0},
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/*h(189)=53 OUTREG=XED_REG_R13W EASZ=1 -> FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {189, 5,1},
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/*h(315)=54 OUTREG=XED_REG_R12 EASZ=3 -> FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {315, 4,1},
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/*empty slot1 */ {0,0,0},
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/*h(258)=56 OUTREG=XED_REG_R14D EASZ=2 -> FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {258, 6,1},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*h(327)=59 OUTREG=XED_REG_R15 EASZ=3 -> FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {327, 7,1},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*h(202)=67 OUTREG=XED_REG_EAX EASZ=2 -> FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {202, 0,0},
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/*empty slot1 */ {0,0,0},
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/*h(145)=69 OUTREG=XED_REG_DX EASZ=1 -> FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {145, 2,0},
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/*h(271)=70 OUTREG=XED_REG_RCX EASZ=3 -> FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {271, 1,0},
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/*empty slot1 */ {0,0,0},
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/*h(214)=72 OUTREG=XED_REG_EBX EASZ=2 -> FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {214, 3,0},
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/*empty slot1 */ {0,0,0},
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/*h(157)=74 OUTREG=XED_REG_BP EASZ=1 -> FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {157, 5,0},
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/*h(283)=75 OUTREG=XED_REG_RSP EASZ=3 -> FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {283, 4,0},
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/*empty slot1 */ {0,0,0},
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/*h(226)=77 OUTREG=XED_REG_ESI EASZ=2 -> FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {226, 6,0},
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/*empty slot1 */ {0,0,0},
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/*h(169)=79 OUTREG=XED_REG_R8W EASZ=1 -> FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {169, 0,1},
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/*h(295)=80 OUTREG=XED_REG_RDI EASZ=3 -> FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {295, 7,0},
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/*empty slot1 */ {0,0,0},
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/*h(238)=82 OUTREG=XED_REG_R9D EASZ=2 -> FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {238, 1,1},
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/*empty slot1 */ {0,0,0},
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/*h(181)=84 OUTREG=XED_REG_R11W EASZ=1 -> FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {181, 3,1},
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/*h(307)=85 OUTREG=XED_REG_R10 EASZ=3 -> FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {307, 2,1},
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/*empty slot1 */ {0,0,0},
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/*h(250)=87 OUTREG=XED_REG_R12D EASZ=2 -> FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {250, 4,1},
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/*empty slot1 */ {0,0,0},
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/*h(193)=89 OUTREG=XED_REG_R14W EASZ=1 -> FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {193, 6,1},
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/*h(319)=90 OUTREG=XED_REG_R13 EASZ=3 -> FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {319, 5,1},
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/*empty slot1 */ {0,0,0},
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/*h(262)=92 OUTREG=XED_REG_R15D EASZ=2 -> FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {262, 7,1},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0},
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/*empty slot1 */ {0,0,0}
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};
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xed_uint64_t key = 0;
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xed_uint64_t hidx = 0;
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xed3_operand_set_outreg(xes,arg_reg);
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key = xed_enc_lu_EASZ_OUTREG(xes);
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hidx = ((9*key % 103) % 96);
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if(lu_table[hidx].key == key) {
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xed3_operand_set_reg(xes,lu_table[hidx].reg);
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xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
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return 1;
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}
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else{
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return 0;
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}
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}
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xed_uint32_t xed_encode_ntluf_A_GPR_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
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||
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{
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typedef struct {xed_uint32_t key; xed_int8_t rexb ;xed_int8_t rm;} lu_entry_t;
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||
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static const lu_entry_t lu_table[96] = {
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/*h(206)=0 OUTREG=XED_REG_ECX EASZ=2 -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {206, 0,1},
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/*empty slot1 */ {0,0,0},
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/*h(149)=2 OUTREG=XED_REG_BX EASZ=1 -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {149, 0,3},
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||
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/*h(275)=3 OUTREG=XED_REG_RDX EASZ=3 -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {275, 0,2},
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||
|
/*h(137)=4 OUTREG=XED_REG_AX EASZ=1 -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {137, 0,0},
|
||
|
/*h(218)=5 OUTREG=XED_REG_ESP EASZ=2 -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {218, 0,4},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(161)=7 OUTREG=XED_REG_SI EASZ=1 -> FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {161, 0,6},
|
||
|
/*h(287)=8 OUTREG=XED_REG_RBP EASZ=3 -> FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {287, 0,5},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(230)=10 OUTREG=XED_REG_EDI EASZ=2 -> FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {230, 0,7},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(173)=12 OUTREG=XED_REG_R9W EASZ=1 -> FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {173, 1,1},
|
||
|
/*h(299)=13 OUTREG=XED_REG_R8 EASZ=3 -> FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {299, 1,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(242)=15 OUTREG=XED_REG_R10D EASZ=2 -> FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {242, 1,2},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(185)=17 OUTREG=XED_REG_R12W EASZ=1 -> FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {185, 1,4},
|
||
|
/*h(311)=18 OUTREG=XED_REG_R11 EASZ=3 -> FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {311, 1,3},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(254)=20 OUTREG=XED_REG_R13D EASZ=2 -> FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {254, 1,5},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(197)=22 OUTREG=XED_REG_R15W EASZ=1 -> FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {197, 1,7},
|
||
|
/*h(323)=23 OUTREG=XED_REG_R14 EASZ=3 -> FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {323, 1,6},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(141)=33 OUTREG=XED_REG_CX EASZ=1 -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {141, 0,1},
|
||
|
/*h(267)=34 OUTREG=XED_REG_RAX EASZ=3 -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {267, 0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(210)=36 OUTREG=XED_REG_EDX EASZ=2 -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {210, 0,2},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(153)=38 OUTREG=XED_REG_SP EASZ=1 -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {153, 0,4},
|
||
|
/*h(279)=39 OUTREG=XED_REG_RBX EASZ=3 -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {279, 0,3},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(222)=41 OUTREG=XED_REG_EBP EASZ=2 -> FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {222, 0,5},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(165)=43 OUTREG=XED_REG_DI EASZ=1 -> FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {165, 0,7},
|
||
|
/*h(291)=44 OUTREG=XED_REG_RSI EASZ=3 -> FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {291, 0,6},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(234)=46 OUTREG=XED_REG_R8D EASZ=2 -> FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {234, 1,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(177)=48 OUTREG=XED_REG_R10W EASZ=1 -> FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {177, 1,2},
|
||
|
/*h(303)=49 OUTREG=XED_REG_R9 EASZ=3 -> FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {303, 1,1},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(246)=51 OUTREG=XED_REG_R11D EASZ=2 -> FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {246, 1,3},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(189)=53 OUTREG=XED_REG_R13W EASZ=1 -> FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {189, 1,5},
|
||
|
/*h(315)=54 OUTREG=XED_REG_R12 EASZ=3 -> FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {315, 1,4},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(258)=56 OUTREG=XED_REG_R14D EASZ=2 -> FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {258, 1,6},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(327)=59 OUTREG=XED_REG_R15 EASZ=3 -> FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {327, 1,7},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(202)=67 OUTREG=XED_REG_EAX EASZ=2 -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {202, 0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(145)=69 OUTREG=XED_REG_DX EASZ=1 -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {145, 0,2},
|
||
|
/*h(271)=70 OUTREG=XED_REG_RCX EASZ=3 -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {271, 0,1},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(214)=72 OUTREG=XED_REG_EBX EASZ=2 -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {214, 0,3},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(157)=74 OUTREG=XED_REG_BP EASZ=1 -> FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {157, 0,5},
|
||
|
/*h(283)=75 OUTREG=XED_REG_RSP EASZ=3 -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {283, 0,4},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(226)=77 OUTREG=XED_REG_ESI EASZ=2 -> FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {226, 0,6},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(169)=79 OUTREG=XED_REG_R8W EASZ=1 -> FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {169, 1,0},
|
||
|
/*h(295)=80 OUTREG=XED_REG_RDI EASZ=3 -> FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {295, 0,7},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(238)=82 OUTREG=XED_REG_R9D EASZ=2 -> FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {238, 1,1},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(181)=84 OUTREG=XED_REG_R11W EASZ=1 -> FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {181, 1,3},
|
||
|
/*h(307)=85 OUTREG=XED_REG_R10 EASZ=3 -> FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {307, 1,2},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(250)=87 OUTREG=XED_REG_R12D EASZ=2 -> FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {250, 1,4},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(193)=89 OUTREG=XED_REG_R14W EASZ=1 -> FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {193, 1,6},
|
||
|
/*h(319)=90 OUTREG=XED_REG_R13 EASZ=3 -> FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {319, 1,5},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*h(262)=92 OUTREG=XED_REG_R15D EASZ=2 -> FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {262, 1,7},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0},
|
||
|
/*empty slot1 */ {0,0,0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_EASZ_OUTREG(xes);
|
||
|
hidx = ((9*key % 103) % 96);
|
||
|
if(lu_table[hidx].key == key) {
|
||
|
xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_SE(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_XMM_SE32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_XMM_SE32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_XMM_SE64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_SE64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t esrc;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB ESRC=0 value=0x0*/ {0},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB ESRC=1 value=0x1*/ {1},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB ESRC=2 value=0x2*/ {2},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB ESRC=3 value=0x3*/ {3},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB ESRC=4 value=0x4*/ {4},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB ESRC=5 value=0x5*/ {5},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB ESRC=6 value=0x6*/ {6},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB ESRC=7 value=0x7*/ {7},
|
||
|
/*h(196)=8 OUTREG=XED_REG_XMM8 -> FB ESRC=8 value=0x8*/ {8},
|
||
|
/*h(197)=9 OUTREG=XED_REG_XMM9 -> FB ESRC=9 value=0x9*/ {9},
|
||
|
/*h(198)=10 OUTREG=XED_REG_XMM10 -> FB ESRC=10 value=0xa*/ {10},
|
||
|
/*h(199)=11 OUTREG=XED_REG_XMM11 -> FB ESRC=11 value=0xb*/ {11},
|
||
|
/*h(200)=12 OUTREG=XED_REG_XMM12 -> FB ESRC=12 value=0xc*/ {12},
|
||
|
/*h(201)=13 OUTREG=XED_REG_XMM13 -> FB ESRC=13 value=0xd*/ {13},
|
||
|
/*h(202)=14 OUTREG=XED_REG_XMM14 -> FB ESRC=14 value=0xe*/ {14},
|
||
|
/*h(203)=15 OUTREG=XED_REG_XMM15 -> FB ESRC=15 value=0xf*/ {15}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_esrc(xes,lu_table[hidx].esrc);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_SE32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t esrc;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB ESRC=0 value=0x0*/ {0},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB ESRC=1 value=0x1*/ {1},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB ESRC=2 value=0x2*/ {2},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB ESRC=3 value=0x3*/ {3},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB ESRC=4 value=0x4*/ {4},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB ESRC=5 value=0x5*/ {5},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB ESRC=6 value=0x6*/ {6},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB ESRC=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_esrc(xes,lu_table[hidx].esrc);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_SE(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_YMM_SE32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_YMM_SE32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_YMM_SE64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_SE64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t esrc;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB ESRC=0 value=0x0*/ {0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB ESRC=1 value=0x1*/ {1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB ESRC=2 value=0x2*/ {2},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB ESRC=3 value=0x3*/ {3},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB ESRC=4 value=0x4*/ {4},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB ESRC=5 value=0x5*/ {5},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB ESRC=6 value=0x6*/ {6},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB ESRC=7 value=0x7*/ {7},
|
||
|
/*h(228)=8 OUTREG=XED_REG_YMM8 -> FB ESRC=8 value=0x8*/ {8},
|
||
|
/*h(229)=9 OUTREG=XED_REG_YMM9 -> FB ESRC=9 value=0x9*/ {9},
|
||
|
/*h(230)=10 OUTREG=XED_REG_YMM10 -> FB ESRC=10 value=0xa*/ {10},
|
||
|
/*h(231)=11 OUTREG=XED_REG_YMM11 -> FB ESRC=11 value=0xb*/ {11},
|
||
|
/*h(232)=12 OUTREG=XED_REG_YMM12 -> FB ESRC=12 value=0xc*/ {12},
|
||
|
/*h(233)=13 OUTREG=XED_REG_YMM13 -> FB ESRC=13 value=0xd*/ {13},
|
||
|
/*h(234)=14 OUTREG=XED_REG_YMM14 -> FB ESRC=14 value=0xe*/ {14},
|
||
|
/*h(235)=15 OUTREG=XED_REG_YMM15 -> FB ESRC=15 value=0xf*/ {15}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_esrc(xes,lu_table[hidx].esrc);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_SE32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t esrc;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB ESRC=0 value=0x0*/ {0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB ESRC=1 value=0x1*/ {1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB ESRC=2 value=0x2*/ {2},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB ESRC=3 value=0x3*/ {3},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB ESRC=4 value=0x4*/ {4},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB ESRC=5 value=0x5*/ {5},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB ESRC=6 value=0x6*/ {6},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB ESRC=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_esrc(xes,lu_table[hidx].esrc);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_XMM_N_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_XMM_N_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_XMM_N_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_N_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB VEXDEST210=7 value=0x7*/ {7},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB VEXDEST210=6 value=0x6*/ {6},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB VEXDEST210=5 value=0x5*/ {5},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB VEXDEST210=4 value=0x4*/ {4},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB VEXDEST210=3 value=0x3*/ {3},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB VEXDEST210=2 value=0x2*/ {2},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB VEXDEST210=1 value=0x1*/ {1},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB VEXDEST210=0 value=0x0*/ {0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_N_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1},
|
||
|
/*h(196)=8 OUTREG=XED_REG_XMM8 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0},
|
||
|
/*h(197)=9 OUTREG=XED_REG_XMM9 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0},
|
||
|
/*h(198)=10 OUTREG=XED_REG_XMM10 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0},
|
||
|
/*h(199)=11 OUTREG=XED_REG_XMM11 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0},
|
||
|
/*h(200)=12 OUTREG=XED_REG_XMM12 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0},
|
||
|
/*h(201)=13 OUTREG=XED_REG_XMM13 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0},
|
||
|
/*h(202)=14 OUTREG=XED_REG_XMM14 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0},
|
||
|
/*h(203)=15 OUTREG=XED_REG_XMM15 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_YMM_N_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_YMM_N_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_YMM_N_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_N_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB VEXDEST210=7 value=0x7*/ {7},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB VEXDEST210=6 value=0x6*/ {6},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB VEXDEST210=5 value=0x5*/ {5},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB VEXDEST210=4 value=0x4*/ {4},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB VEXDEST210=3 value=0x3*/ {3},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB VEXDEST210=2 value=0x2*/ {2},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB VEXDEST210=1 value=0x1*/ {1},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB VEXDEST210=0 value=0x0*/ {0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_N_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1},
|
||
|
/*h(228)=8 OUTREG=XED_REG_YMM8 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0},
|
||
|
/*h(229)=9 OUTREG=XED_REG_YMM9 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0},
|
||
|
/*h(230)=10 OUTREG=XED_REG_YMM10 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0},
|
||
|
/*h(231)=11 OUTREG=XED_REG_YMM11 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0},
|
||
|
/*h(232)=12 OUTREG=XED_REG_YMM12 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0},
|
||
|
/*h(233)=13 OUTREG=XED_REG_YMM13 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0},
|
||
|
/*h(234)=14 OUTREG=XED_REG_YMM14 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0},
|
||
|
/*h(235)=15 OUTREG=XED_REG_YMM15 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_YMM_R_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_YMM_R_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_YMM_R_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_R_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB REG=0 value=0x0*/ {0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB REG=1 value=0x1*/ {1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB REG=2 value=0x2*/ {2},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB REG=3 value=0x3*/ {3},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB REG=4 value=0x4*/ {4},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB REG=5 value=0x5*/ {5},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB REG=6 value=0x6*/ {6},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB REG=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_R_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg ;xed_int8_t rexr;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0},
|
||
|
/*h(228)=8 OUTREG=XED_REG_YMM8 -> FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1},
|
||
|
/*h(229)=9 OUTREG=XED_REG_YMM9 -> FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1},
|
||
|
/*h(230)=10 OUTREG=XED_REG_YMM10 -> FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1},
|
||
|
/*h(231)=11 OUTREG=XED_REG_YMM11 -> FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1},
|
||
|
/*h(232)=12 OUTREG=XED_REG_YMM12 -> FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1},
|
||
|
/*h(233)=13 OUTREG=XED_REG_YMM13 -> FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1},
|
||
|
/*h(234)=14 OUTREG=XED_REG_YMM14 -> FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1},
|
||
|
/*h(235)=15 OUTREG=XED_REG_YMM15 -> FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_YMM_B_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_YMM_B_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_YMM_B_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_B_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB RM=0 value=0x0*/ {0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB RM=1 value=0x1*/ {1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB RM=2 value=0x2*/ {2},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB RM=3 value=0x3*/ {3},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB RM=4 value=0x4*/ {4},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB RM=5 value=0x5*/ {5},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB RM=6 value=0x6*/ {6},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB RM=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_B_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rexb ;xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,2},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,3},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,4},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,5},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,6},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,7},
|
||
|
/*h(228)=8 OUTREG=XED_REG_YMM8 -> FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,0},
|
||
|
/*h(229)=9 OUTREG=XED_REG_YMM9 -> FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,1},
|
||
|
/*h(230)=10 OUTREG=XED_REG_YMM10 -> FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,2},
|
||
|
/*h(231)=11 OUTREG=XED_REG_YMM11 -> FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,3},
|
||
|
/*h(232)=12 OUTREG=XED_REG_YMM12 -> FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,4},
|
||
|
/*h(233)=13 OUTREG=XED_REG_YMM13 -> FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,5},
|
||
|
/*h(234)=14 OUTREG=XED_REG_YMM14 -> FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,6},
|
||
|
/*h(235)=15 OUTREG=XED_REG_YMM15 -> FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPRy_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(1)=0 EOSZ=1 -> ntluf*/ {xed_encode_ntluf_VGPR32_R},
|
||
|
/*h(2)=1 EOSZ=2 -> ntluf*/ {xed_encode_ntluf_VGPR32_R},
|
||
|
/*h(3)=2 EOSZ=3 -> ntluf*/ {xed_encode_ntluf_VGPR64_R}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_EOSZ(xes);
|
||
|
hidx = key - 1;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPRy_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(1)=0 EOSZ=1 -> ntluf*/ {xed_encode_ntluf_VGPR32_B},
|
||
|
/*h(2)=1 EOSZ=2 -> ntluf*/ {xed_encode_ntluf_VGPR32_B},
|
||
|
/*h(3)=2 EOSZ=3 -> ntluf*/ {xed_encode_ntluf_VGPR64_B}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_EOSZ(xes);
|
||
|
hidx = key - 1;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPRy_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(1)=0 EOSZ=1 -> ntluf*/ {xed_encode_ntluf_VGPR32_N},
|
||
|
/*h(2)=1 EOSZ=2 -> ntluf*/ {xed_encode_ntluf_VGPR32_N},
|
||
|
/*h(3)=2 EOSZ=3 -> ntluf*/ {xed_encode_ntluf_VGPR64_N}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_EOSZ(xes);
|
||
|
hidx = key - 1;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_VGPR32_N_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_VGPR32_N_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_VGPR32_N_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_VGPR32_B_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_VGPR32_B_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_VGPR32_B_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_VGPR32_R_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_VGPR32_R_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_VGPR32_R_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_N_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(50)=0 OUTREG=XED_REG_EAX -> FB VEXDEST210=7 value=0x7*/ {7},
|
||
|
/*h(51)=1 OUTREG=XED_REG_ECX -> FB VEXDEST210=6 value=0x6*/ {6},
|
||
|
/*h(52)=2 OUTREG=XED_REG_EDX -> FB VEXDEST210=5 value=0x5*/ {5},
|
||
|
/*h(53)=3 OUTREG=XED_REG_EBX -> FB VEXDEST210=4 value=0x4*/ {4},
|
||
|
/*h(54)=4 OUTREG=XED_REG_ESP -> FB VEXDEST210=3 value=0x3*/ {3},
|
||
|
/*h(55)=5 OUTREG=XED_REG_EBP -> FB VEXDEST210=2 value=0x2*/ {2},
|
||
|
/*h(56)=6 OUTREG=XED_REG_ESI -> FB VEXDEST210=1 value=0x1*/ {1},
|
||
|
/*h(57)=7 OUTREG=XED_REG_EDI -> FB VEXDEST210=0 value=0x0*/ {0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 50;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_N_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(50)=0 OUTREG=XED_REG_EAX -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1},
|
||
|
/*h(51)=1 OUTREG=XED_REG_ECX -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1},
|
||
|
/*h(52)=2 OUTREG=XED_REG_EDX -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1},
|
||
|
/*h(53)=3 OUTREG=XED_REG_EBX -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1},
|
||
|
/*h(54)=4 OUTREG=XED_REG_ESP -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1},
|
||
|
/*h(55)=5 OUTREG=XED_REG_EBP -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1},
|
||
|
/*h(56)=6 OUTREG=XED_REG_ESI -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1},
|
||
|
/*h(57)=7 OUTREG=XED_REG_EDI -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1},
|
||
|
/*h(58)=8 OUTREG=XED_REG_R8D -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0},
|
||
|
/*h(59)=9 OUTREG=XED_REG_R9D -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0},
|
||
|
/*h(60)=10 OUTREG=XED_REG_R10D -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0},
|
||
|
/*h(61)=11 OUTREG=XED_REG_R11D -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0},
|
||
|
/*h(62)=12 OUTREG=XED_REG_R12D -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0},
|
||
|
/*h(63)=13 OUTREG=XED_REG_R13D -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0},
|
||
|
/*h(64)=14 OUTREG=XED_REG_R14D -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0},
|
||
|
/*h(65)=15 OUTREG=XED_REG_R15D -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 50;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR64_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(66)=0 OUTREG=XED_REG_RAX -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1},
|
||
|
/*h(67)=1 OUTREG=XED_REG_RCX -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1},
|
||
|
/*h(68)=2 OUTREG=XED_REG_RDX -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1},
|
||
|
/*h(69)=3 OUTREG=XED_REG_RBX -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1},
|
||
|
/*h(70)=4 OUTREG=XED_REG_RSP -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1},
|
||
|
/*h(71)=5 OUTREG=XED_REG_RBP -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1},
|
||
|
/*h(72)=6 OUTREG=XED_REG_RSI -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1},
|
||
|
/*h(73)=7 OUTREG=XED_REG_RDI -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1},
|
||
|
/*h(74)=8 OUTREG=XED_REG_R8 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0},
|
||
|
/*h(75)=9 OUTREG=XED_REG_R9 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0},
|
||
|
/*h(76)=10 OUTREG=XED_REG_R10 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0},
|
||
|
/*h(77)=11 OUTREG=XED_REG_R11 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0},
|
||
|
/*h(78)=12 OUTREG=XED_REG_R12 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0},
|
||
|
/*h(79)=13 OUTREG=XED_REG_R13 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0},
|
||
|
/*h(80)=14 OUTREG=XED_REG_R14 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0},
|
||
|
/*h(81)=15 OUTREG=XED_REG_R15 -> FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 66;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_R_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(50)=0 OUTREG=XED_REG_EAX -> FB REG=0 value=0x0*/ {0},
|
||
|
/*h(51)=1 OUTREG=XED_REG_ECX -> FB REG=1 value=0x1*/ {1},
|
||
|
/*h(52)=2 OUTREG=XED_REG_EDX -> FB REG=2 value=0x2*/ {2},
|
||
|
/*h(53)=3 OUTREG=XED_REG_EBX -> FB REG=3 value=0x3*/ {3},
|
||
|
/*h(54)=4 OUTREG=XED_REG_ESP -> FB REG=4 value=0x4*/ {4},
|
||
|
/*h(55)=5 OUTREG=XED_REG_EBP -> FB REG=5 value=0x5*/ {5},
|
||
|
/*h(56)=6 OUTREG=XED_REG_ESI -> FB REG=6 value=0x6*/ {6},
|
||
|
/*h(57)=7 OUTREG=XED_REG_EDI -> FB REG=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 50;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_R_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg ;xed_int8_t rexr;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(50)=0 OUTREG=XED_REG_EAX -> FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0},
|
||
|
/*h(51)=1 OUTREG=XED_REG_ECX -> FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0},
|
||
|
/*h(52)=2 OUTREG=XED_REG_EDX -> FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0},
|
||
|
/*h(53)=3 OUTREG=XED_REG_EBX -> FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0},
|
||
|
/*h(54)=4 OUTREG=XED_REG_ESP -> FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0},
|
||
|
/*h(55)=5 OUTREG=XED_REG_EBP -> FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0},
|
||
|
/*h(56)=6 OUTREG=XED_REG_ESI -> FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0},
|
||
|
/*h(57)=7 OUTREG=XED_REG_EDI -> FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0},
|
||
|
/*h(58)=8 OUTREG=XED_REG_R8D -> FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1},
|
||
|
/*h(59)=9 OUTREG=XED_REG_R9D -> FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1},
|
||
|
/*h(60)=10 OUTREG=XED_REG_R10D -> FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1},
|
||
|
/*h(61)=11 OUTREG=XED_REG_R11D -> FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1},
|
||
|
/*h(62)=12 OUTREG=XED_REG_R12D -> FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1},
|
||
|
/*h(63)=13 OUTREG=XED_REG_R13D -> FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1},
|
||
|
/*h(64)=14 OUTREG=XED_REG_R14D -> FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1},
|
||
|
/*h(65)=15 OUTREG=XED_REG_R15D -> FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 50;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR64_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg ;xed_int8_t rexr;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(66)=0 OUTREG=XED_REG_RAX -> FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0},
|
||
|
/*h(67)=1 OUTREG=XED_REG_RCX -> FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0},
|
||
|
/*h(68)=2 OUTREG=XED_REG_RDX -> FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0},
|
||
|
/*h(69)=3 OUTREG=XED_REG_RBX -> FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0},
|
||
|
/*h(70)=4 OUTREG=XED_REG_RSP -> FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0},
|
||
|
/*h(71)=5 OUTREG=XED_REG_RBP -> FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0},
|
||
|
/*h(72)=6 OUTREG=XED_REG_RSI -> FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0},
|
||
|
/*h(73)=7 OUTREG=XED_REG_RDI -> FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0},
|
||
|
/*h(74)=8 OUTREG=XED_REG_R8 -> FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1},
|
||
|
/*h(75)=9 OUTREG=XED_REG_R9 -> FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1},
|
||
|
/*h(76)=10 OUTREG=XED_REG_R10 -> FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1},
|
||
|
/*h(77)=11 OUTREG=XED_REG_R11 -> FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1},
|
||
|
/*h(78)=12 OUTREG=XED_REG_R12 -> FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1},
|
||
|
/*h(79)=13 OUTREG=XED_REG_R13 -> FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1},
|
||
|
/*h(80)=14 OUTREG=XED_REG_R14 -> FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1},
|
||
|
/*h(81)=15 OUTREG=XED_REG_R15 -> FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 66;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_B_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(50)=0 OUTREG=XED_REG_EAX -> FB RM=0 value=0x0*/ {0},
|
||
|
/*h(51)=1 OUTREG=XED_REG_ECX -> FB RM=1 value=0x1*/ {1},
|
||
|
/*h(52)=2 OUTREG=XED_REG_EDX -> FB RM=2 value=0x2*/ {2},
|
||
|
/*h(53)=3 OUTREG=XED_REG_EBX -> FB RM=3 value=0x3*/ {3},
|
||
|
/*h(54)=4 OUTREG=XED_REG_ESP -> FB RM=4 value=0x4*/ {4},
|
||
|
/*h(55)=5 OUTREG=XED_REG_EBP -> FB RM=5 value=0x5*/ {5},
|
||
|
/*h(56)=6 OUTREG=XED_REG_ESI -> FB RM=6 value=0x6*/ {6},
|
||
|
/*h(57)=7 OUTREG=XED_REG_EDI -> FB RM=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 50;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR32_B_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rexb ;xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(50)=0 OUTREG=XED_REG_EAX -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,0},
|
||
|
/*h(51)=1 OUTREG=XED_REG_ECX -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,1},
|
||
|
/*h(52)=2 OUTREG=XED_REG_EDX -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,2},
|
||
|
/*h(53)=3 OUTREG=XED_REG_EBX -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,3},
|
||
|
/*h(54)=4 OUTREG=XED_REG_ESP -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,4},
|
||
|
/*h(55)=5 OUTREG=XED_REG_EBP -> FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,5},
|
||
|
/*h(56)=6 OUTREG=XED_REG_ESI -> FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,6},
|
||
|
/*h(57)=7 OUTREG=XED_REG_EDI -> FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,7},
|
||
|
/*h(58)=8 OUTREG=XED_REG_R8D -> FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,0},
|
||
|
/*h(59)=9 OUTREG=XED_REG_R9D -> FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,1},
|
||
|
/*h(60)=10 OUTREG=XED_REG_R10D -> FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,2},
|
||
|
/*h(61)=11 OUTREG=XED_REG_R11D -> FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,3},
|
||
|
/*h(62)=12 OUTREG=XED_REG_R12D -> FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,4},
|
||
|
/*h(63)=13 OUTREG=XED_REG_R13D -> FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,5},
|
||
|
/*h(64)=14 OUTREG=XED_REG_R14D -> FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,6},
|
||
|
/*h(65)=15 OUTREG=XED_REG_R15D -> FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 50;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_VGPR64_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rexb ;xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[16] = {
|
||
|
/*h(66)=0 OUTREG=XED_REG_RAX -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,0},
|
||
|
/*h(67)=1 OUTREG=XED_REG_RCX -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,1},
|
||
|
/*h(68)=2 OUTREG=XED_REG_RDX -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,2},
|
||
|
/*h(69)=3 OUTREG=XED_REG_RBX -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,3},
|
||
|
/*h(70)=4 OUTREG=XED_REG_RSP -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,4},
|
||
|
/*h(71)=5 OUTREG=XED_REG_RBP -> FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,5},
|
||
|
/*h(72)=6 OUTREG=XED_REG_RSI -> FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,6},
|
||
|
/*h(73)=7 OUTREG=XED_REG_RDI -> FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,7},
|
||
|
/*h(74)=8 OUTREG=XED_REG_R8 -> FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,0},
|
||
|
/*h(75)=9 OUTREG=XED_REG_R9 -> FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,1},
|
||
|
/*h(76)=10 OUTREG=XED_REG_R10 -> FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,2},
|
||
|
/*h(77)=11 OUTREG=XED_REG_R11 -> FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,3},
|
||
|
/*h(78)=12 OUTREG=XED_REG_R12 -> FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,4},
|
||
|
/*h(79)=13 OUTREG=XED_REG_R13 -> FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,5},
|
||
|
/*h(80)=14 OUTREG=XED_REG_R14 -> FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,6},
|
||
|
/*h(81)=15 OUTREG=XED_REG_R15 -> FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 66;
|
||
|
if(hidx <= 15) {
|
||
|
xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_MASK1(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t mask;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(106)=0 OUTREG=XED_REG_K0 -> FB MASK=0 value=0x0*/ {0},
|
||
|
/*h(107)=1 OUTREG=XED_REG_K1 -> FB MASK=1 value=0x1*/ {1},
|
||
|
/*h(108)=2 OUTREG=XED_REG_K2 -> FB MASK=2 value=0x2*/ {2},
|
||
|
/*h(109)=3 OUTREG=XED_REG_K3 -> FB MASK=3 value=0x3*/ {3},
|
||
|
/*h(110)=4 OUTREG=XED_REG_K4 -> FB MASK=4 value=0x4*/ {4},
|
||
|
/*h(111)=5 OUTREG=XED_REG_K5 -> FB MASK=5 value=0x5*/ {5},
|
||
|
/*h(112)=6 OUTREG=XED_REG_K6 -> FB MASK=6 value=0x6*/ {6},
|
||
|
/*h(113)=7 OUTREG=XED_REG_K7 -> FB MASK=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 106;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_mask(xes,lu_table[hidx].mask);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_MASKNOT0(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct {xed_uint32_t key; xed_int8_t mask;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[10] = {
|
||
|
/*h(102)=0 OUTREG=XED_REG_ERROR -> FB MASK=0 value=0x0*/ {102, 0},
|
||
|
/*h(107)=1 OUTREG=XED_REG_K1 -> FB MASK=1 value=0x1*/ {107, 1},
|
||
|
/*h(112)=2 OUTREG=XED_REG_K6 -> FB MASK=6 value=0x6*/ {112, 6},
|
||
|
/*h(109)=3 OUTREG=XED_REG_K3 -> FB MASK=3 value=0x3*/ {109, 3},
|
||
|
/*empty slot1 */ {0,0},
|
||
|
/*empty slot1 */ {0,0},
|
||
|
/*h(111)=6 OUTREG=XED_REG_K5 -> FB MASK=5 value=0x5*/ {111, 5},
|
||
|
/*h(108)=7 OUTREG=XED_REG_K2 -> FB MASK=2 value=0x2*/ {108, 2},
|
||
|
/*h(113)=8 OUTREG=XED_REG_K7 -> FB MASK=7 value=0x7*/ {113, 7},
|
||
|
/*h(110)=9 OUTREG=XED_REG_K4 -> FB MASK=4 value=0x4*/ {110, 4}
|
||
|
};
|
||
|
xed_union64_t t, u;
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = (t.u64 = 2654435769 * key, u.u64 = t.s.lo32 * 10ULL, u.s.hi32);
|
||
|
if(lu_table[hidx].key == key) {
|
||
|
xed3_operand_set_mask(xes,lu_table[hidx].mask);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_MASK_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg ;xed_int8_t rexr ;xed_int8_t rexrr;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(106)=0 OUTREG=XED_REG_K0 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0,0},
|
||
|
/*h(107)=1 OUTREG=XED_REG_K1 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0,0},
|
||
|
/*h(108)=2 OUTREG=XED_REG_K2 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0,0},
|
||
|
/*h(109)=3 OUTREG=XED_REG_K3 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0,0},
|
||
|
/*h(110)=4 OUTREG=XED_REG_K4 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0,0},
|
||
|
/*h(111)=5 OUTREG=XED_REG_K5 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0,0},
|
||
|
/*h(112)=6 OUTREG=XED_REG_K6 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0,0},
|
||
|
/*h(113)=7 OUTREG=XED_REG_K7 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0,0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 106;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
|
||
|
xed3_operand_set_rexrr(xes,lu_table[hidx].rexrr);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_MASK_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(106)=0 OUTREG=XED_REG_K0 -> FB RM=0 value=0x0*/ {0},
|
||
|
/*h(107)=1 OUTREG=XED_REG_K1 -> FB RM=1 value=0x1*/ {1},
|
||
|
/*h(108)=2 OUTREG=XED_REG_K2 -> FB RM=2 value=0x2*/ {2},
|
||
|
/*h(109)=3 OUTREG=XED_REG_K3 -> FB RM=3 value=0x3*/ {3},
|
||
|
/*h(110)=4 OUTREG=XED_REG_K4 -> FB RM=4 value=0x4*/ {4},
|
||
|
/*h(111)=5 OUTREG=XED_REG_K5 -> FB RM=5 value=0x5*/ {5},
|
||
|
/*h(112)=6 OUTREG=XED_REG_K6 -> FB RM=6 value=0x6*/ {6},
|
||
|
/*h(113)=7 OUTREG=XED_REG_K7 -> FB RM=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 106;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_MASK_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_MASK_N32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_MASK_N32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_MASK_N64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_MASK_N64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(106)=0 OUTREG=XED_REG_K0 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1},
|
||
|
/*h(107)=1 OUTREG=XED_REG_K1 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1},
|
||
|
/*h(108)=2 OUTREG=XED_REG_K2 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1},
|
||
|
/*h(109)=3 OUTREG=XED_REG_K3 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1},
|
||
|
/*h(110)=4 OUTREG=XED_REG_K4 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1},
|
||
|
/*h(111)=5 OUTREG=XED_REG_K5 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1},
|
||
|
/*h(112)=6 OUTREG=XED_REG_K6 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1},
|
||
|
/*h(113)=7 OUTREG=XED_REG_K7 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 106;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_MASK_N32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(106)=0 OUTREG=XED_REG_K0 -> FB VEXDEST210=7 value=0x7*/ {7},
|
||
|
/*h(107)=1 OUTREG=XED_REG_K1 -> FB VEXDEST210=6 value=0x6*/ {6},
|
||
|
/*h(108)=2 OUTREG=XED_REG_K2 -> FB VEXDEST210=5 value=0x5*/ {5},
|
||
|
/*h(109)=3 OUTREG=XED_REG_K3 -> FB VEXDEST210=4 value=0x4*/ {4},
|
||
|
/*h(110)=4 OUTREG=XED_REG_K4 -> FB VEXDEST210=3 value=0x3*/ {3},
|
||
|
/*h(111)=5 OUTREG=XED_REG_K5 -> FB VEXDEST210=2 value=0x2*/ {2},
|
||
|
/*h(112)=6 OUTREG=XED_REG_K6 -> FB VEXDEST210=1 value=0x1*/ {1},
|
||
|
/*h(113)=7 OUTREG=XED_REG_K7 -> FB VEXDEST210=0 value=0x0*/ {0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 106;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_R3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_XMM_R3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_XMM_R3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_XMM_R3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_R3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB REG=0 value=0x0*/ {0},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB REG=1 value=0x1*/ {1},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB REG=2 value=0x2*/ {2},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB REG=3 value=0x3*/ {3},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB REG=4 value=0x4*/ {4},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB REG=5 value=0x5*/ {5},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB REG=6 value=0x6*/ {6},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB REG=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_R3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg ;xed_int8_t rexr ;xed_int8_t rexrr;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0,0},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0,0},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0,0},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0,0},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0,0},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0,0},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0,0},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0,0},
|
||
|
/*h(196)=8 OUTREG=XED_REG_XMM8 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1,0},
|
||
|
/*h(197)=9 OUTREG=XED_REG_XMM9 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1,0},
|
||
|
/*h(198)=10 OUTREG=XED_REG_XMM10 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1,0},
|
||
|
/*h(199)=11 OUTREG=XED_REG_XMM11 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1,0},
|
||
|
/*h(200)=12 OUTREG=XED_REG_XMM12 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1,0},
|
||
|
/*h(201)=13 OUTREG=XED_REG_XMM13 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1,0},
|
||
|
/*h(202)=14 OUTREG=XED_REG_XMM14 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1,0},
|
||
|
/*h(203)=15 OUTREG=XED_REG_XMM15 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1,0},
|
||
|
/*h(204)=16 OUTREG=XED_REG_XMM16 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0,1},
|
||
|
/*h(205)=17 OUTREG=XED_REG_XMM17 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0,1},
|
||
|
/*h(206)=18 OUTREG=XED_REG_XMM18 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0,1},
|
||
|
/*h(207)=19 OUTREG=XED_REG_XMM19 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0,1},
|
||
|
/*h(208)=20 OUTREG=XED_REG_XMM20 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0,1},
|
||
|
/*h(209)=21 OUTREG=XED_REG_XMM21 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0,1},
|
||
|
/*h(210)=22 OUTREG=XED_REG_XMM22 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0,1},
|
||
|
/*h(211)=23 OUTREG=XED_REG_XMM23 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0,1},
|
||
|
/*h(212)=24 OUTREG=XED_REG_XMM24 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1,1},
|
||
|
/*h(213)=25 OUTREG=XED_REG_XMM25 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1,1},
|
||
|
/*h(214)=26 OUTREG=XED_REG_XMM26 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1,1},
|
||
|
/*h(215)=27 OUTREG=XED_REG_XMM27 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1,1},
|
||
|
/*h(216)=28 OUTREG=XED_REG_XMM28 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1,1},
|
||
|
/*h(217)=29 OUTREG=XED_REG_XMM29 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1,1},
|
||
|
/*h(218)=30 OUTREG=XED_REG_XMM30 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1,1},
|
||
|
/*h(219)=31 OUTREG=XED_REG_XMM31 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
|
||
|
xed3_operand_set_rexrr(xes,lu_table[hidx].rexrr);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_R3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_YMM_R3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_YMM_R3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_YMM_R3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_R3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB REG=0 value=0x0*/ {0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB REG=1 value=0x1*/ {1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB REG=2 value=0x2*/ {2},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB REG=3 value=0x3*/ {3},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB REG=4 value=0x4*/ {4},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB REG=5 value=0x5*/ {5},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB REG=6 value=0x6*/ {6},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB REG=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_R3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg ;xed_int8_t rexr ;xed_int8_t rexrr;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0,0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0,0},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0,0},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0,0},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0,0},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0,0},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0,0},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0,0},
|
||
|
/*h(228)=8 OUTREG=XED_REG_YMM8 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1,0},
|
||
|
/*h(229)=9 OUTREG=XED_REG_YMM9 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1,0},
|
||
|
/*h(230)=10 OUTREG=XED_REG_YMM10 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1,0},
|
||
|
/*h(231)=11 OUTREG=XED_REG_YMM11 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1,0},
|
||
|
/*h(232)=12 OUTREG=XED_REG_YMM12 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1,0},
|
||
|
/*h(233)=13 OUTREG=XED_REG_YMM13 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1,0},
|
||
|
/*h(234)=14 OUTREG=XED_REG_YMM14 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1,0},
|
||
|
/*h(235)=15 OUTREG=XED_REG_YMM15 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1,0},
|
||
|
/*h(236)=16 OUTREG=XED_REG_YMM16 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0,1},
|
||
|
/*h(237)=17 OUTREG=XED_REG_YMM17 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0,1},
|
||
|
/*h(238)=18 OUTREG=XED_REG_YMM18 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0,1},
|
||
|
/*h(239)=19 OUTREG=XED_REG_YMM19 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0,1},
|
||
|
/*h(240)=20 OUTREG=XED_REG_YMM20 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0,1},
|
||
|
/*h(241)=21 OUTREG=XED_REG_YMM21 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0,1},
|
||
|
/*h(242)=22 OUTREG=XED_REG_YMM22 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0,1},
|
||
|
/*h(243)=23 OUTREG=XED_REG_YMM23 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0,1},
|
||
|
/*h(244)=24 OUTREG=XED_REG_YMM24 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1,1},
|
||
|
/*h(245)=25 OUTREG=XED_REG_YMM25 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1,1},
|
||
|
/*h(246)=26 OUTREG=XED_REG_YMM26 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1,1},
|
||
|
/*h(247)=27 OUTREG=XED_REG_YMM27 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1,1},
|
||
|
/*h(248)=28 OUTREG=XED_REG_YMM28 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1,1},
|
||
|
/*h(249)=29 OUTREG=XED_REG_YMM29 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1,1},
|
||
|
/*h(250)=30 OUTREG=XED_REG_YMM30 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1,1},
|
||
|
/*h(251)=31 OUTREG=XED_REG_YMM31 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
|
||
|
xed3_operand_set_rexrr(xes,lu_table[hidx].rexrr);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_R3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_ZMM_R3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_ZMM_R3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_ZMM_R3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_R3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(252)=0 OUTREG=XED_REG_ZMM0 -> FB REG=0 value=0x0*/ {0},
|
||
|
/*h(253)=1 OUTREG=XED_REG_ZMM1 -> FB REG=1 value=0x1*/ {1},
|
||
|
/*h(254)=2 OUTREG=XED_REG_ZMM2 -> FB REG=2 value=0x2*/ {2},
|
||
|
/*h(255)=3 OUTREG=XED_REG_ZMM3 -> FB REG=3 value=0x3*/ {3},
|
||
|
/*h(256)=4 OUTREG=XED_REG_ZMM4 -> FB REG=4 value=0x4*/ {4},
|
||
|
/*h(257)=5 OUTREG=XED_REG_ZMM5 -> FB REG=5 value=0x5*/ {5},
|
||
|
/*h(258)=6 OUTREG=XED_REG_ZMM6 -> FB REG=6 value=0x6*/ {6},
|
||
|
/*h(259)=7 OUTREG=XED_REG_ZMM7 -> FB REG=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 252;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_R3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg ;xed_int8_t rexr ;xed_int8_t rexrr;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(252)=0 OUTREG=XED_REG_ZMM0 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0,0},
|
||
|
/*h(253)=1 OUTREG=XED_REG_ZMM1 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0,0},
|
||
|
/*h(254)=2 OUTREG=XED_REG_ZMM2 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0,0},
|
||
|
/*h(255)=3 OUTREG=XED_REG_ZMM3 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0,0},
|
||
|
/*h(256)=4 OUTREG=XED_REG_ZMM4 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0,0},
|
||
|
/*h(257)=5 OUTREG=XED_REG_ZMM5 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0,0},
|
||
|
/*h(258)=6 OUTREG=XED_REG_ZMM6 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0,0},
|
||
|
/*h(259)=7 OUTREG=XED_REG_ZMM7 -> FB REXRR=0 value=0x0 FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0,0},
|
||
|
/*h(260)=8 OUTREG=XED_REG_ZMM8 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1,0},
|
||
|
/*h(261)=9 OUTREG=XED_REG_ZMM9 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1,0},
|
||
|
/*h(262)=10 OUTREG=XED_REG_ZMM10 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1,0},
|
||
|
/*h(263)=11 OUTREG=XED_REG_ZMM11 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1,0},
|
||
|
/*h(264)=12 OUTREG=XED_REG_ZMM12 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1,0},
|
||
|
/*h(265)=13 OUTREG=XED_REG_ZMM13 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1,0},
|
||
|
/*h(266)=14 OUTREG=XED_REG_ZMM14 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1,0},
|
||
|
/*h(267)=15 OUTREG=XED_REG_ZMM15 -> FB REXRR=0 value=0x0 FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1,0},
|
||
|
/*h(268)=16 OUTREG=XED_REG_ZMM16 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0,1},
|
||
|
/*h(269)=17 OUTREG=XED_REG_ZMM17 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0,1},
|
||
|
/*h(270)=18 OUTREG=XED_REG_ZMM18 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0,1},
|
||
|
/*h(271)=19 OUTREG=XED_REG_ZMM19 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0,1},
|
||
|
/*h(272)=20 OUTREG=XED_REG_ZMM20 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0,1},
|
||
|
/*h(273)=21 OUTREG=XED_REG_ZMM21 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0,1},
|
||
|
/*h(274)=22 OUTREG=XED_REG_ZMM22 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0,1},
|
||
|
/*h(275)=23 OUTREG=XED_REG_ZMM23 -> FB REXRR=1 value=0x1 FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0,1},
|
||
|
/*h(276)=24 OUTREG=XED_REG_ZMM24 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=0 value=0x0*/ {0,1,1},
|
||
|
/*h(277)=25 OUTREG=XED_REG_ZMM25 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=1 value=0x1*/ {1,1,1},
|
||
|
/*h(278)=26 OUTREG=XED_REG_ZMM26 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=2 value=0x2*/ {2,1,1},
|
||
|
/*h(279)=27 OUTREG=XED_REG_ZMM27 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=3 value=0x3*/ {3,1,1},
|
||
|
/*h(280)=28 OUTREG=XED_REG_ZMM28 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=4 value=0x4*/ {4,1,1},
|
||
|
/*h(281)=29 OUTREG=XED_REG_ZMM29 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=5 value=0x5*/ {5,1,1},
|
||
|
/*h(282)=30 OUTREG=XED_REG_ZMM30 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=6 value=0x6*/ {6,1,1},
|
||
|
/*h(283)=31 OUTREG=XED_REG_ZMM31 -> FB REXRR=1 value=0x1 FB REXR=1 value=0x1 FB REG=7 value=0x7*/ {7,1,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 252;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
|
||
|
xed3_operand_set_rexrr(xes,lu_table[hidx].rexrr);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_B3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_XMM_B3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_XMM_B3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_XMM_B3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_B3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB RM=0 value=0x0*/ {0},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB RM=1 value=0x1*/ {1},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB RM=2 value=0x2*/ {2},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB RM=3 value=0x3*/ {3},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB RM=4 value=0x4*/ {4},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB RM=5 value=0x5*/ {5},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB RM=6 value=0x6*/ {6},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB RM=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_B3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rexb ;xed_int8_t rexx ;xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,0,0},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,0,1},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,0,2},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,0,3},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,0,4},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,0,5},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,0,6},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,0,7},
|
||
|
/*h(196)=8 OUTREG=XED_REG_XMM8 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,0,0},
|
||
|
/*h(197)=9 OUTREG=XED_REG_XMM9 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,0,1},
|
||
|
/*h(198)=10 OUTREG=XED_REG_XMM10 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,0,2},
|
||
|
/*h(199)=11 OUTREG=XED_REG_XMM11 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,0,3},
|
||
|
/*h(200)=12 OUTREG=XED_REG_XMM12 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,0,4},
|
||
|
/*h(201)=13 OUTREG=XED_REG_XMM13 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,0,5},
|
||
|
/*h(202)=14 OUTREG=XED_REG_XMM14 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,0,6},
|
||
|
/*h(203)=15 OUTREG=XED_REG_XMM15 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,0,7},
|
||
|
/*h(204)=16 OUTREG=XED_REG_XMM16 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,1,0},
|
||
|
/*h(205)=17 OUTREG=XED_REG_XMM17 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,1,1},
|
||
|
/*h(206)=18 OUTREG=XED_REG_XMM18 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,1,2},
|
||
|
/*h(207)=19 OUTREG=XED_REG_XMM19 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,1,3},
|
||
|
/*h(208)=20 OUTREG=XED_REG_XMM20 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,1,4},
|
||
|
/*h(209)=21 OUTREG=XED_REG_XMM21 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,1,5},
|
||
|
/*h(210)=22 OUTREG=XED_REG_XMM22 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,1,6},
|
||
|
/*h(211)=23 OUTREG=XED_REG_XMM23 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,1,7},
|
||
|
/*h(212)=24 OUTREG=XED_REG_XMM24 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,1,0},
|
||
|
/*h(213)=25 OUTREG=XED_REG_XMM25 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,1,1},
|
||
|
/*h(214)=26 OUTREG=XED_REG_XMM26 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,1,2},
|
||
|
/*h(215)=27 OUTREG=XED_REG_XMM27 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,1,3},
|
||
|
/*h(216)=28 OUTREG=XED_REG_XMM28 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,1,4},
|
||
|
/*h(217)=29 OUTREG=XED_REG_XMM29 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,1,5},
|
||
|
/*h(218)=30 OUTREG=XED_REG_XMM30 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,1,6},
|
||
|
/*h(219)=31 OUTREG=XED_REG_XMM31 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,1,7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
|
||
|
xed3_operand_set_rexx(xes,lu_table[hidx].rexx);
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_B3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_YMM_B3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_YMM_B3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_YMM_B3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_B3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB RM=0 value=0x0*/ {0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB RM=1 value=0x1*/ {1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB RM=2 value=0x2*/ {2},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB RM=3 value=0x3*/ {3},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB RM=4 value=0x4*/ {4},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB RM=5 value=0x5*/ {5},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB RM=6 value=0x6*/ {6},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB RM=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_B3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rexb ;xed_int8_t rexx ;xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,0,0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,0,1},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,0,2},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,0,3},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,0,4},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,0,5},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,0,6},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,0,7},
|
||
|
/*h(228)=8 OUTREG=XED_REG_YMM8 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,0,0},
|
||
|
/*h(229)=9 OUTREG=XED_REG_YMM9 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,0,1},
|
||
|
/*h(230)=10 OUTREG=XED_REG_YMM10 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,0,2},
|
||
|
/*h(231)=11 OUTREG=XED_REG_YMM11 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,0,3},
|
||
|
/*h(232)=12 OUTREG=XED_REG_YMM12 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,0,4},
|
||
|
/*h(233)=13 OUTREG=XED_REG_YMM13 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,0,5},
|
||
|
/*h(234)=14 OUTREG=XED_REG_YMM14 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,0,6},
|
||
|
/*h(235)=15 OUTREG=XED_REG_YMM15 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,0,7},
|
||
|
/*h(236)=16 OUTREG=XED_REG_YMM16 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,1,0},
|
||
|
/*h(237)=17 OUTREG=XED_REG_YMM17 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,1,1},
|
||
|
/*h(238)=18 OUTREG=XED_REG_YMM18 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,1,2},
|
||
|
/*h(239)=19 OUTREG=XED_REG_YMM19 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,1,3},
|
||
|
/*h(240)=20 OUTREG=XED_REG_YMM20 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,1,4},
|
||
|
/*h(241)=21 OUTREG=XED_REG_YMM21 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,1,5},
|
||
|
/*h(242)=22 OUTREG=XED_REG_YMM22 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,1,6},
|
||
|
/*h(243)=23 OUTREG=XED_REG_YMM23 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,1,7},
|
||
|
/*h(244)=24 OUTREG=XED_REG_YMM24 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,1,0},
|
||
|
/*h(245)=25 OUTREG=XED_REG_YMM25 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,1,1},
|
||
|
/*h(246)=26 OUTREG=XED_REG_YMM26 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,1,2},
|
||
|
/*h(247)=27 OUTREG=XED_REG_YMM27 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,1,3},
|
||
|
/*h(248)=28 OUTREG=XED_REG_YMM28 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,1,4},
|
||
|
/*h(249)=29 OUTREG=XED_REG_YMM29 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,1,5},
|
||
|
/*h(250)=30 OUTREG=XED_REG_YMM30 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,1,6},
|
||
|
/*h(251)=31 OUTREG=XED_REG_YMM31 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,1,7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
|
||
|
xed3_operand_set_rexx(xes,lu_table[hidx].rexx);
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_B3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_ZMM_B3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_ZMM_B3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_ZMM_B3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_B3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(252)=0 OUTREG=XED_REG_ZMM0 -> FB RM=0 value=0x0*/ {0},
|
||
|
/*h(253)=1 OUTREG=XED_REG_ZMM1 -> FB RM=1 value=0x1*/ {1},
|
||
|
/*h(254)=2 OUTREG=XED_REG_ZMM2 -> FB RM=2 value=0x2*/ {2},
|
||
|
/*h(255)=3 OUTREG=XED_REG_ZMM3 -> FB RM=3 value=0x3*/ {3},
|
||
|
/*h(256)=4 OUTREG=XED_REG_ZMM4 -> FB RM=4 value=0x4*/ {4},
|
||
|
/*h(257)=5 OUTREG=XED_REG_ZMM5 -> FB RM=5 value=0x5*/ {5},
|
||
|
/*h(258)=6 OUTREG=XED_REG_ZMM6 -> FB RM=6 value=0x6*/ {6},
|
||
|
/*h(259)=7 OUTREG=XED_REG_ZMM7 -> FB RM=7 value=0x7*/ {7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 252;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_B3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rexb ;xed_int8_t rexx ;xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(252)=0 OUTREG=XED_REG_ZMM0 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,0,0},
|
||
|
/*h(253)=1 OUTREG=XED_REG_ZMM1 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,0,1},
|
||
|
/*h(254)=2 OUTREG=XED_REG_ZMM2 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,0,2},
|
||
|
/*h(255)=3 OUTREG=XED_REG_ZMM3 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,0,3},
|
||
|
/*h(256)=4 OUTREG=XED_REG_ZMM4 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,0,4},
|
||
|
/*h(257)=5 OUTREG=XED_REG_ZMM5 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,0,5},
|
||
|
/*h(258)=6 OUTREG=XED_REG_ZMM6 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,0,6},
|
||
|
/*h(259)=7 OUTREG=XED_REG_ZMM7 -> FB REXX=0 value=0x0 FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,0,7},
|
||
|
/*h(260)=8 OUTREG=XED_REG_ZMM8 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,0,0},
|
||
|
/*h(261)=9 OUTREG=XED_REG_ZMM9 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,0,1},
|
||
|
/*h(262)=10 OUTREG=XED_REG_ZMM10 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,0,2},
|
||
|
/*h(263)=11 OUTREG=XED_REG_ZMM11 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,0,3},
|
||
|
/*h(264)=12 OUTREG=XED_REG_ZMM12 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,0,4},
|
||
|
/*h(265)=13 OUTREG=XED_REG_ZMM13 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,0,5},
|
||
|
/*h(266)=14 OUTREG=XED_REG_ZMM14 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,0,6},
|
||
|
/*h(267)=15 OUTREG=XED_REG_ZMM15 -> FB REXX=0 value=0x0 FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,0,7},
|
||
|
/*h(268)=16 OUTREG=XED_REG_ZMM16 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,1,0},
|
||
|
/*h(269)=17 OUTREG=XED_REG_ZMM17 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,1,1},
|
||
|
/*h(270)=18 OUTREG=XED_REG_ZMM18 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,1,2},
|
||
|
/*h(271)=19 OUTREG=XED_REG_ZMM19 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,1,3},
|
||
|
/*h(272)=20 OUTREG=XED_REG_ZMM20 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,1,4},
|
||
|
/*h(273)=21 OUTREG=XED_REG_ZMM21 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,1,5},
|
||
|
/*h(274)=22 OUTREG=XED_REG_ZMM22 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,1,6},
|
||
|
/*h(275)=23 OUTREG=XED_REG_ZMM23 -> FB REXX=1 value=0x1 FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,1,7},
|
||
|
/*h(276)=24 OUTREG=XED_REG_ZMM24 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=0 value=0x0*/ {1,1,0},
|
||
|
/*h(277)=25 OUTREG=XED_REG_ZMM25 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=1 value=0x1*/ {1,1,1},
|
||
|
/*h(278)=26 OUTREG=XED_REG_ZMM26 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=2 value=0x2*/ {1,1,2},
|
||
|
/*h(279)=27 OUTREG=XED_REG_ZMM27 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=3 value=0x3*/ {1,1,3},
|
||
|
/*h(280)=28 OUTREG=XED_REG_ZMM28 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=4 value=0x4*/ {1,1,4},
|
||
|
/*h(281)=29 OUTREG=XED_REG_ZMM29 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=5 value=0x5*/ {1,1,5},
|
||
|
/*h(282)=30 OUTREG=XED_REG_ZMM30 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=6 value=0x6*/ {1,1,6},
|
||
|
/*h(283)=31 OUTREG=XED_REG_ZMM31 -> FB REXX=1 value=0x1 FB REXB=1 value=0x1 FB RM=7 value=0x7*/ {1,1,7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 252;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
|
||
|
xed3_operand_set_rexx(xes,lu_table[hidx].rexx);
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_N3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_XMM_N3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_XMM_N3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_XMM_N3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_N3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB VEXDEST210=7 value=0x7*/ {7},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB VEXDEST210=6 value=0x6*/ {6},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB VEXDEST210=5 value=0x5*/ {5},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB VEXDEST210=4 value=0x4*/ {4},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB VEXDEST210=3 value=0x3*/ {3},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB VEXDEST210=2 value=0x2*/ {2},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB VEXDEST210=1 value=0x1*/ {1},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB VEXDEST210=0 value=0x0*/ {0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_XMM_N3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3 ;xed_int8_t vexdest4;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(188)=0 OUTREG=XED_REG_XMM0 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1,0},
|
||
|
/*h(189)=1 OUTREG=XED_REG_XMM1 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1,0},
|
||
|
/*h(190)=2 OUTREG=XED_REG_XMM2 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1,0},
|
||
|
/*h(191)=3 OUTREG=XED_REG_XMM3 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1,0},
|
||
|
/*h(192)=4 OUTREG=XED_REG_XMM4 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1,0},
|
||
|
/*h(193)=5 OUTREG=XED_REG_XMM5 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1,0},
|
||
|
/*h(194)=6 OUTREG=XED_REG_XMM6 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1,0},
|
||
|
/*h(195)=7 OUTREG=XED_REG_XMM7 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1,0},
|
||
|
/*h(196)=8 OUTREG=XED_REG_XMM8 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0,0},
|
||
|
/*h(197)=9 OUTREG=XED_REG_XMM9 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0,0},
|
||
|
/*h(198)=10 OUTREG=XED_REG_XMM10 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0,0},
|
||
|
/*h(199)=11 OUTREG=XED_REG_XMM11 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0,0},
|
||
|
/*h(200)=12 OUTREG=XED_REG_XMM12 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0,0},
|
||
|
/*h(201)=13 OUTREG=XED_REG_XMM13 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0,0},
|
||
|
/*h(202)=14 OUTREG=XED_REG_XMM14 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0,0},
|
||
|
/*h(203)=15 OUTREG=XED_REG_XMM15 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0,0},
|
||
|
/*h(204)=16 OUTREG=XED_REG_XMM16 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1,1},
|
||
|
/*h(205)=17 OUTREG=XED_REG_XMM17 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1,1},
|
||
|
/*h(206)=18 OUTREG=XED_REG_XMM18 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1,1},
|
||
|
/*h(207)=19 OUTREG=XED_REG_XMM19 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1,1},
|
||
|
/*h(208)=20 OUTREG=XED_REG_XMM20 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1,1},
|
||
|
/*h(209)=21 OUTREG=XED_REG_XMM21 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1,1},
|
||
|
/*h(210)=22 OUTREG=XED_REG_XMM22 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1,1},
|
||
|
/*h(211)=23 OUTREG=XED_REG_XMM23 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1,1},
|
||
|
/*h(212)=24 OUTREG=XED_REG_XMM24 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0,1},
|
||
|
/*h(213)=25 OUTREG=XED_REG_XMM25 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0,1},
|
||
|
/*h(214)=26 OUTREG=XED_REG_XMM26 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0,1},
|
||
|
/*h(215)=27 OUTREG=XED_REG_XMM27 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0,1},
|
||
|
/*h(216)=28 OUTREG=XED_REG_XMM28 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0,1},
|
||
|
/*h(217)=29 OUTREG=XED_REG_XMM29 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0,1},
|
||
|
/*h(218)=30 OUTREG=XED_REG_XMM30 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0,1},
|
||
|
/*h(219)=31 OUTREG=XED_REG_XMM31 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 188;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
xed3_operand_set_vexdest4(xes,lu_table[hidx].vexdest4);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_N3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_YMM_N3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_YMM_N3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_YMM_N3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_N3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB VEXDEST210=7 value=0x7*/ {7},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB VEXDEST210=6 value=0x6*/ {6},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB VEXDEST210=5 value=0x5*/ {5},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB VEXDEST210=4 value=0x4*/ {4},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB VEXDEST210=3 value=0x3*/ {3},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB VEXDEST210=2 value=0x2*/ {2},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB VEXDEST210=1 value=0x1*/ {1},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB VEXDEST210=0 value=0x0*/ {0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_YMM_N3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3 ;xed_int8_t vexdest4;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(220)=0 OUTREG=XED_REG_YMM0 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1,0},
|
||
|
/*h(221)=1 OUTREG=XED_REG_YMM1 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1,0},
|
||
|
/*h(222)=2 OUTREG=XED_REG_YMM2 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1,0},
|
||
|
/*h(223)=3 OUTREG=XED_REG_YMM3 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1,0},
|
||
|
/*h(224)=4 OUTREG=XED_REG_YMM4 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1,0},
|
||
|
/*h(225)=5 OUTREG=XED_REG_YMM5 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1,0},
|
||
|
/*h(226)=6 OUTREG=XED_REG_YMM6 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1,0},
|
||
|
/*h(227)=7 OUTREG=XED_REG_YMM7 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1,0},
|
||
|
/*h(228)=8 OUTREG=XED_REG_YMM8 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0,0},
|
||
|
/*h(229)=9 OUTREG=XED_REG_YMM9 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0,0},
|
||
|
/*h(230)=10 OUTREG=XED_REG_YMM10 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0,0},
|
||
|
/*h(231)=11 OUTREG=XED_REG_YMM11 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0,0},
|
||
|
/*h(232)=12 OUTREG=XED_REG_YMM12 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0,0},
|
||
|
/*h(233)=13 OUTREG=XED_REG_YMM13 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0,0},
|
||
|
/*h(234)=14 OUTREG=XED_REG_YMM14 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0,0},
|
||
|
/*h(235)=15 OUTREG=XED_REG_YMM15 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0,0},
|
||
|
/*h(236)=16 OUTREG=XED_REG_YMM16 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1,1},
|
||
|
/*h(237)=17 OUTREG=XED_REG_YMM17 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1,1},
|
||
|
/*h(238)=18 OUTREG=XED_REG_YMM18 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1,1},
|
||
|
/*h(239)=19 OUTREG=XED_REG_YMM19 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1,1},
|
||
|
/*h(240)=20 OUTREG=XED_REG_YMM20 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1,1},
|
||
|
/*h(241)=21 OUTREG=XED_REG_YMM21 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1,1},
|
||
|
/*h(242)=22 OUTREG=XED_REG_YMM22 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1,1},
|
||
|
/*h(243)=23 OUTREG=XED_REG_YMM23 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1,1},
|
||
|
/*h(244)=24 OUTREG=XED_REG_YMM24 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0,1},
|
||
|
/*h(245)=25 OUTREG=XED_REG_YMM25 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0,1},
|
||
|
/*h(246)=26 OUTREG=XED_REG_YMM26 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0,1},
|
||
|
/*h(247)=27 OUTREG=XED_REG_YMM27 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0,1},
|
||
|
/*h(248)=28 OUTREG=XED_REG_YMM28 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0,1},
|
||
|
/*h(249)=29 OUTREG=XED_REG_YMM29 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0,1},
|
||
|
/*h(250)=30 OUTREG=XED_REG_YMM30 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0,1},
|
||
|
/*h(251)=31 OUTREG=XED_REG_YMM31 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 220;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
xed3_operand_set_vexdest4(xes,lu_table[hidx].vexdest4);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_N3(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_ntluf_func_ptr_t ntlufptr0;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[3] = {
|
||
|
/*h(0)=0 MODE=0 -> ntluf*/ {xed_encode_ntluf_ZMM_N3_32},
|
||
|
/*h(1)=1 MODE=1 -> ntluf*/ {xed_encode_ntluf_ZMM_N3_32},
|
||
|
/*h(2)=2 MODE=2 -> ntluf*/ {xed_encode_ntluf_ZMM_N3_64}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed_uint64_t res = 1;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_MODE(xes);
|
||
|
hidx = key - 0;
|
||
|
if(hidx <= 2) {
|
||
|
if(lu_table[hidx].ntlufptr0 != 0) res=(*lu_table[hidx].ntlufptr0)(xes,arg_reg);
|
||
|
return res;
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_N3_32(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(252)=0 OUTREG=XED_REG_ZMM0 -> FB VEXDEST210=7 value=0x7*/ {7},
|
||
|
/*h(253)=1 OUTREG=XED_REG_ZMM1 -> FB VEXDEST210=6 value=0x6*/ {6},
|
||
|
/*h(254)=2 OUTREG=XED_REG_ZMM2 -> FB VEXDEST210=5 value=0x5*/ {5},
|
||
|
/*h(255)=3 OUTREG=XED_REG_ZMM3 -> FB VEXDEST210=4 value=0x4*/ {4},
|
||
|
/*h(256)=4 OUTREG=XED_REG_ZMM4 -> FB VEXDEST210=3 value=0x3*/ {3},
|
||
|
/*h(257)=5 OUTREG=XED_REG_ZMM5 -> FB VEXDEST210=2 value=0x2*/ {2},
|
||
|
/*h(258)=6 OUTREG=XED_REG_ZMM6 -> FB VEXDEST210=1 value=0x1*/ {1},
|
||
|
/*h(259)=7 OUTREG=XED_REG_ZMM7 -> FB VEXDEST210=0 value=0x0*/ {0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 252;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_ZMM_N3_64(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3 ;xed_int8_t vexdest4;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[32] = {
|
||
|
/*h(252)=0 OUTREG=XED_REG_ZMM0 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1,0},
|
||
|
/*h(253)=1 OUTREG=XED_REG_ZMM1 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1,0},
|
||
|
/*h(254)=2 OUTREG=XED_REG_ZMM2 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1,0},
|
||
|
/*h(255)=3 OUTREG=XED_REG_ZMM3 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1,0},
|
||
|
/*h(256)=4 OUTREG=XED_REG_ZMM4 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1,0},
|
||
|
/*h(257)=5 OUTREG=XED_REG_ZMM5 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1,0},
|
||
|
/*h(258)=6 OUTREG=XED_REG_ZMM6 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1,0},
|
||
|
/*h(259)=7 OUTREG=XED_REG_ZMM7 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1,0},
|
||
|
/*h(260)=8 OUTREG=XED_REG_ZMM8 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0,0},
|
||
|
/*h(261)=9 OUTREG=XED_REG_ZMM9 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0,0},
|
||
|
/*h(262)=10 OUTREG=XED_REG_ZMM10 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0,0},
|
||
|
/*h(263)=11 OUTREG=XED_REG_ZMM11 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0,0},
|
||
|
/*h(264)=12 OUTREG=XED_REG_ZMM12 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0,0},
|
||
|
/*h(265)=13 OUTREG=XED_REG_ZMM13 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0,0},
|
||
|
/*h(266)=14 OUTREG=XED_REG_ZMM14 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0,0},
|
||
|
/*h(267)=15 OUTREG=XED_REG_ZMM15 -> FB VEXDEST4=0 value=0x0 FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0,0},
|
||
|
/*h(268)=16 OUTREG=XED_REG_ZMM16 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1,1},
|
||
|
/*h(269)=17 OUTREG=XED_REG_ZMM17 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1,1},
|
||
|
/*h(270)=18 OUTREG=XED_REG_ZMM18 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1,1},
|
||
|
/*h(271)=19 OUTREG=XED_REG_ZMM19 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1,1},
|
||
|
/*h(272)=20 OUTREG=XED_REG_ZMM20 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1,1},
|
||
|
/*h(273)=21 OUTREG=XED_REG_ZMM21 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1,1},
|
||
|
/*h(274)=22 OUTREG=XED_REG_ZMM22 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1,1},
|
||
|
/*h(275)=23 OUTREG=XED_REG_ZMM23 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1,1},
|
||
|
/*h(276)=24 OUTREG=XED_REG_ZMM24 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=7 value=0x7*/ {7,0,1},
|
||
|
/*h(277)=25 OUTREG=XED_REG_ZMM25 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=6 value=0x6*/ {6,0,1},
|
||
|
/*h(278)=26 OUTREG=XED_REG_ZMM26 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=5 value=0x5*/ {5,0,1},
|
||
|
/*h(279)=27 OUTREG=XED_REG_ZMM27 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=4 value=0x4*/ {4,0,1},
|
||
|
/*h(280)=28 OUTREG=XED_REG_ZMM28 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=3 value=0x3*/ {3,0,1},
|
||
|
/*h(281)=29 OUTREG=XED_REG_ZMM29 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=2 value=0x2*/ {2,0,1},
|
||
|
/*h(282)=30 OUTREG=XED_REG_ZMM30 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=1 value=0x1*/ {1,0,1},
|
||
|
/*h(283)=31 OUTREG=XED_REG_ZMM31 -> FB VEXDEST4=1 value=0x1 FB VEXDEST3=0 value=0x0 FB VEXDEST210=0 value=0x0*/ {0,0,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 252;
|
||
|
if(hidx <= 31) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
xed3_operand_set_vexdest4(xes,lu_table[hidx].vexdest4);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_TMM_R(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t reg ;xed_int8_t rexr;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(170)=0 OUTREG=XED_REG_TMM0 -> FB REXR=0 value=0x0 FB REG=0 value=0x0*/ {0,0},
|
||
|
/*h(171)=1 OUTREG=XED_REG_TMM1 -> FB REXR=0 value=0x0 FB REG=1 value=0x1*/ {1,0},
|
||
|
/*h(172)=2 OUTREG=XED_REG_TMM2 -> FB REXR=0 value=0x0 FB REG=2 value=0x2*/ {2,0},
|
||
|
/*h(173)=3 OUTREG=XED_REG_TMM3 -> FB REXR=0 value=0x0 FB REG=3 value=0x3*/ {3,0},
|
||
|
/*h(174)=4 OUTREG=XED_REG_TMM4 -> FB REXR=0 value=0x0 FB REG=4 value=0x4*/ {4,0},
|
||
|
/*h(175)=5 OUTREG=XED_REG_TMM5 -> FB REXR=0 value=0x0 FB REG=5 value=0x5*/ {5,0},
|
||
|
/*h(176)=6 OUTREG=XED_REG_TMM6 -> FB REXR=0 value=0x0 FB REG=6 value=0x6*/ {6,0},
|
||
|
/*h(177)=7 OUTREG=XED_REG_TMM7 -> FB REXR=0 value=0x0 FB REG=7 value=0x7*/ {7,0}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 170;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_reg(xes,lu_table[hidx].reg);
|
||
|
xed3_operand_set_rexr(xes,lu_table[hidx].rexr);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_TMM_B(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t rexb ;xed_int8_t rm;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(170)=0 OUTREG=XED_REG_TMM0 -> FB REXB=0 value=0x0 FB RM=0 value=0x0*/ {0,0},
|
||
|
/*h(171)=1 OUTREG=XED_REG_TMM1 -> FB REXB=0 value=0x0 FB RM=1 value=0x1*/ {0,1},
|
||
|
/*h(172)=2 OUTREG=XED_REG_TMM2 -> FB REXB=0 value=0x0 FB RM=2 value=0x2*/ {0,2},
|
||
|
/*h(173)=3 OUTREG=XED_REG_TMM3 -> FB REXB=0 value=0x0 FB RM=3 value=0x3*/ {0,3},
|
||
|
/*h(174)=4 OUTREG=XED_REG_TMM4 -> FB REXB=0 value=0x0 FB RM=4 value=0x4*/ {0,4},
|
||
|
/*h(175)=5 OUTREG=XED_REG_TMM5 -> FB REXB=0 value=0x0 FB RM=5 value=0x5*/ {0,5},
|
||
|
/*h(176)=6 OUTREG=XED_REG_TMM6 -> FB REXB=0 value=0x0 FB RM=6 value=0x6*/ {0,6},
|
||
|
/*h(177)=7 OUTREG=XED_REG_TMM7 -> FB REXB=0 value=0x0 FB RM=7 value=0x7*/ {0,7}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 170;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_rexb(xes,lu_table[hidx].rexb);
|
||
|
xed3_operand_set_rm(xes,lu_table[hidx].rm);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint32_t xed_encode_ntluf_TMM_N(xed_encoder_request_t* xes, xed_reg_enum_t arg_reg)
|
||
|
{
|
||
|
typedef struct { xed_int8_t vexdest210 ;xed_int8_t vexdest3;} lu_entry_t;
|
||
|
static const lu_entry_t lu_table[8] = {
|
||
|
/*h(170)=0 OUTREG=XED_REG_TMM0 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=7 value=0x7*/ {7,1},
|
||
|
/*h(171)=1 OUTREG=XED_REG_TMM1 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=6 value=0x6*/ {6,1},
|
||
|
/*h(172)=2 OUTREG=XED_REG_TMM2 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=5 value=0x5*/ {5,1},
|
||
|
/*h(173)=3 OUTREG=XED_REG_TMM3 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=4 value=0x4*/ {4,1},
|
||
|
/*h(174)=4 OUTREG=XED_REG_TMM4 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=3 value=0x3*/ {3,1},
|
||
|
/*h(175)=5 OUTREG=XED_REG_TMM5 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=2 value=0x2*/ {2,1},
|
||
|
/*h(176)=6 OUTREG=XED_REG_TMM6 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=1 value=0x1*/ {1,1},
|
||
|
/*h(177)=7 OUTREG=XED_REG_TMM7 -> FB VEXDEST3=1 value=0x1 FB VEXDEST210=0 value=0x0*/ {0,1}
|
||
|
};
|
||
|
xed_uint64_t key = 0;
|
||
|
xed_uint64_t hidx = 0;
|
||
|
xed3_operand_set_outreg(xes,arg_reg);
|
||
|
key = xed_enc_lu_OUTREG(xes);
|
||
|
hidx = key - 170;
|
||
|
if(hidx <= 7) {
|
||
|
xed3_operand_set_vexdest210(xes,lu_table[hidx].vexdest210);
|
||
|
xed3_operand_set_vexdest3(xes,lu_table[hidx].vexdest3);
|
||
|
return 1;
|
||
|
}
|
||
|
else{
|
||
|
return 0;
|
||
|
}
|
||
|
}
|
||
|
xed_uint_t xed_encode_nonterminal_SEGMENT_DEFAULT_ENCODE_EMIT(xed_encoder_request_t* xes)
|
||
|
{
|
||
|
/* SEGMENT_DEFAULT_ENCODE()::
|
||
|
BASE0=@ -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_SP EASZ=1 -> FB DEFAULT_SEG=1 value=0x1
|
||
|
BASE0=XED_REG_ESP EASZ=2 -> FB DEFAULT_SEG=1 value=0x1
|
||
|
BASE0=XED_REG_RSP EASZ=3 -> FB DEFAULT_SEG=1 value=0x1
|
||
|
BASE0=XED_REG_BP EASZ=1 -> FB DEFAULT_SEG=1 value=0x1
|
||
|
BASE0=XED_REG_EBP EASZ=2 -> FB DEFAULT_SEG=1 value=0x1
|
||
|
BASE0=XED_REG_RBP EASZ=3 -> FB DEFAULT_SEG=1 value=0x1
|
||
|
BASE0=XED_REG_AX EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_EAX EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_RAX EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_CX EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_ECX EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_RCX EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_DX EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_EDX EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_RDX EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_BX EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_EBX EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_RBX EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_SI EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_ESI EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_RSI EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_DI EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_EDI EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_RDI EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R8W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R8D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R8 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R9W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R9D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R9 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R10W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R10D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R10 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R11W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R11D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R11 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R12W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R12D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R12 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R13W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R13D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R13 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R14W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R14D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R14 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R15W EASZ=1 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R15D EASZ=2 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_R15 EASZ=3 -> FB DEFAULT_SEG=0 value=0x0
|
||
|
BASE0=XED_REG_EIP EASZ=2 -> nothing
|
||
|
BASE0=XED_REG_RIP EASZ=3 -> nothing
|
||
|
*/
|
||
|
xed_uint_t okay=1;
|
||
|
return 1;
|
||
|
(void) okay;
|
||
|
(void) xes;
|
||
|
}
|
||
|
xed_uint_t xed_encode_nonterminal_SEGMENT_ENCODE_EMIT(xed_encoder_request_t* xes)
|
||
|
{
|
||
|
/* SEGMENT_ENCODE()::
|
||
|
DEFAULT_SEG=1 SEG0=@ -> FB SEG_OVD=0 value=0x0
|
||
|
DEFAULT_SEG=1 SEG0=XED_REG_CS -> FB SEG_OVD=1 value=0x1
|
||
|
DEFAULT_SEG=1 SEG0=XED_REG_DS -> FB SEG_OVD=2 value=0x2
|
||
|
DEFAULT_SEG=1 SEG0=XED_REG_SS -> FB SEG_OVD=0 value=0x0
|
||
|
DEFAULT_SEG=1 SEG0=XED_REG_ES -> FB SEG_OVD=3 value=0x3
|
||
|
DEFAULT_SEG=1 SEG0=XED_REG_FS -> FB SEG_OVD=4 value=0x4
|
||
|
DEFAULT_SEG=1 SEG0=XED_REG_GS -> FB SEG_OVD=5 value=0x5
|
||
|
DEFAULT_SEG=0 SEG0=@ -> FB SEG_OVD=0 value=0x0
|
||
|
DEFAULT_SEG=0 SEG0=XED_REG_CS -> FB SEG_OVD=1 value=0x1
|
||
|
DEFAULT_SEG=0 SEG0=XED_REG_DS -> FB SEG_OVD=0 value=0x0
|
||
|
DEFAULT_SEG=0 SEG0=XED_REG_SS -> FB SEG_OVD=6 value=0x6
|
||
|
DEFAULT_SEG=0 SEG0=XED_REG_ES -> FB SEG_OVD=3 value=0x3
|
||
|
DEFAULT_SEG=0 SEG0=XED_REG_FS -> FB SEG_OVD=4 value=0x4
|
||
|
DEFAULT_SEG=0 SEG0=XED_REG_GS -> FB SEG_OVD=5 value=0x5
|
||
|
*/
|
||
|
xed_uint_t okay=1;
|
||
|
return 1;
|
||
|
(void) okay;
|
||
|
(void) xes;
|
||
|
}
|
||
|
xed_uint_t xed_encode_nonterminal_SIB_REQUIRED_ENCODE_BIND(xed_encoder_request_t* xes)
|
||
|
{
|
||
|
/* SIB_REQUIRED_ENCODE()::
|
||
|
EASZ=3 BASE0=@ DISP_WIDTH=32 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 BASE0=@ DISP_WIDTH=32 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RAX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RBX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RCX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RDX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RSP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RBP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RSI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RDI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R8 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R9 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R10 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R11 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R12 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R13 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R14 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R15 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_SP EASZ=1 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_ESP EASZ=2 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_RSP EASZ=3 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_R12W EASZ=1 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_R12D EASZ=2 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_R12 EASZ=3 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EAX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EBX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_ECX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EDX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_ESP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EBP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_ESI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EDI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EAX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EBX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_ECX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EDX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_ESP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EBP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_ESI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EDI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R8D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R9D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R10D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R11D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R12D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R13D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R14D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R15D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=0 -> nothing
|
||
|
EASZ=2 MODE=1 -> nothing
|
||
|
*/
|
||
|
xed_uint_t okay=1;
|
||
|
xed_uint_t conditions_satisfied=0;
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_base0(xes) == XED_REG_INVALID) &&
|
||
|
(xed3_operand_get_disp_width(xes) == 32);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_base0(xes) == XED_REG_INVALID) &&
|
||
|
(xed3_operand_get_disp_width(xes) == 32);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_RAX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_RBX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_RCX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_RDX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_RSP);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_RBP);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_RSI);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_RDI);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R8);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R9);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R10);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R11);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R12);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R13);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R14);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 3) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R15);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) != 1) &&
|
||
|
(xed3_operand_get_base0(xes) == XED_REG_SP) &&
|
||
|
(xed3_operand_get_easz(xes) == 1);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) != 1) &&
|
||
|
(xed3_operand_get_base0(xes) == XED_REG_ESP) &&
|
||
|
(xed3_operand_get_easz(xes) == 2);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) != 1) &&
|
||
|
(xed3_operand_get_base0(xes) == XED_REG_RSP) &&
|
||
|
(xed3_operand_get_easz(xes) == 3);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) != 1) &&
|
||
|
(xed3_operand_get_base0(xes) == XED_REG_R12W) &&
|
||
|
(xed3_operand_get_easz(xes) == 1);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) != 1) &&
|
||
|
(xed3_operand_get_base0(xes) == XED_REG_R12D) &&
|
||
|
(xed3_operand_get_easz(xes) == 2);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) != 1) &&
|
||
|
(xed3_operand_get_base0(xes) == XED_REG_R12) &&
|
||
|
(xed3_operand_get_easz(xes) == 3);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EAX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EBX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_ECX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EDX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_ESP);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EBP);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_ESI);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EDI);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EAX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EBX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_ECX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EDX);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_ESP);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EBP);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_ESI);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_EDI);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R8D);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R9D);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R10D);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R11D);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R12D);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R13D);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R14D);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 2) &&
|
||
|
(xed3_operand_get_index(xes) == XED_REG_R15D);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
xed3_operand_set_need_sib(xes,1);
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 0);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
return 1; /* nothing */
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = (xed3_operand_get_easz(xes) == 2) &&
|
||
|
(xed3_operand_get_mode(xes) == 1);
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
return 1; /* nothing */
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
conditions_satisfied = 1;
|
||
|
if (conditions_satisfied) {
|
||
|
okay=1;
|
||
|
/* FIXME action code not done yet for return 1*/
|
||
|
if (okay) return 1;
|
||
|
}
|
||
|
return 0; /*pacify the compiler*/
|
||
|
(void) okay;
|
||
|
(void) xes;
|
||
|
(void) conditions_satisfied;
|
||
|
}
|
||
|
xed_uint_t xed_encode_nonterminal_SIB_REQUIRED_ENCODE_EMIT(xed_encoder_request_t* xes)
|
||
|
{
|
||
|
/* SIB_REQUIRED_ENCODE()::
|
||
|
EASZ=3 BASE0=@ DISP_WIDTH=32 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 BASE0=@ DISP_WIDTH=32 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RAX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RBX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RCX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RDX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RSP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RBP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RSI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_RDI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R8 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R9 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R10 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R11 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R12 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R13 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R14 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=3 INDEX=XED_REG_R15 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_SP EASZ=1 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_ESP EASZ=2 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_RSP EASZ=3 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_R12W EASZ=1 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_R12D EASZ=2 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ!=1 BASE0=XED_REG_R12 EASZ=3 -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EAX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EBX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_ECX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EDX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_ESP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EBP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_ESI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=1 INDEX=XED_REG_EDI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EAX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EBX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_ECX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EDX -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_ESP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EBP -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_ESI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_EDI -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R8D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R9D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R10D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R11D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R12D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R13D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R14D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=2 INDEX=XED_REG_R15D -> FB NEED_SIB=1 value=0x1
|
||
|
EASZ=2 MODE=0 -> nothing
|
||
|
EASZ=2 MODE=1 -> nothing
|
||
|
*/
|
||
|
xed_uint_t okay=1;
|
||
|
return 1;
|
||
|
(void) okay;
|
||
|
(void) xes;
|
||
|
}
|
||
|
xed_uint_t xed_encode_nonterminal_SIBBASE_ENCODE_EMIT(xed_encoder_request_t* xes)
|
||
|
{
|
||
|
/* SIBBASE_ENCODE()::
|
||
|
NEED_SIB=1 -> nt NT[SIBBASE_ENCODE_SIB1]
|
||
|
NEED_SIB=0 -> nothing
|
||
|
*/
|
||
|
xed_uint_t okay=1;
|
||
|
unsigned int iform = xed_encoder_request_iforms(xes)->x_SIBBASE_ENCODE;
|
||
|
/* 2 */ if (iform==2) {
|
||
|
xed_encode_nonterminal_SIBBASE_ENCODE_SIB1_EMIT(xes);
|
||
|
if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
|
||
|
return okay;
|
||
|
}
|
||
|
/* 1 */ if (1) { /* nothing */
|
||
|
if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
|
||
|
return okay;
|
||
|
}
|
||
|
if (1) { /*otherwise*/
|
||
|
if (xed3_operand_get_error(xes) != XED_ERROR_NONE) okay=0;
|
||
|
return okay;
|
||
|
}
|
||
|
return 0; /*pacify the compiler*/
|
||
|
(void) okay;
|
||
|
(void) xes;
|
||
|
(void) iform;
|
||
|
}
|