/// @file xed-operand-width-enum.c // This file was automatically generated. // Do not edit this file. #include #include #include "xed-operand-width-enum.h" typedef struct { const char* name; xed_operand_width_enum_t value; } name_table_xed_operand_width_enum_t; static const name_table_xed_operand_width_enum_t name_array_xed_operand_width_enum_t[] = { {"INVALID", XED_OPERAND_WIDTH_INVALID}, {"ASZ", XED_OPERAND_WIDTH_ASZ}, {"SSZ", XED_OPERAND_WIDTH_SSZ}, {"PSEUDO", XED_OPERAND_WIDTH_PSEUDO}, {"PSEUDOX87", XED_OPERAND_WIDTH_PSEUDOX87}, {"A16", XED_OPERAND_WIDTH_A16}, {"A32", XED_OPERAND_WIDTH_A32}, {"B", XED_OPERAND_WIDTH_B}, {"D", XED_OPERAND_WIDTH_D}, {"I8", XED_OPERAND_WIDTH_I8}, {"U8", XED_OPERAND_WIDTH_U8}, {"I16", XED_OPERAND_WIDTH_I16}, {"U16", XED_OPERAND_WIDTH_U16}, {"I32", XED_OPERAND_WIDTH_I32}, {"U32", XED_OPERAND_WIDTH_U32}, {"I64", XED_OPERAND_WIDTH_I64}, {"U64", XED_OPERAND_WIDTH_U64}, {"F16", XED_OPERAND_WIDTH_F16}, {"F32", XED_OPERAND_WIDTH_F32}, {"F64", XED_OPERAND_WIDTH_F64}, {"DQ", XED_OPERAND_WIDTH_DQ}, {"XUB", XED_OPERAND_WIDTH_XUB}, {"XUW", XED_OPERAND_WIDTH_XUW}, {"XUD", XED_OPERAND_WIDTH_XUD}, {"XUQ", XED_OPERAND_WIDTH_XUQ}, {"X128", XED_OPERAND_WIDTH_X128}, {"XB", XED_OPERAND_WIDTH_XB}, {"XW", XED_OPERAND_WIDTH_XW}, {"XD", XED_OPERAND_WIDTH_XD}, {"XQ", XED_OPERAND_WIDTH_XQ}, {"ZB", XED_OPERAND_WIDTH_ZB}, {"ZW", XED_OPERAND_WIDTH_ZW}, {"ZD", XED_OPERAND_WIDTH_ZD}, {"ZQ", XED_OPERAND_WIDTH_ZQ}, {"MB", XED_OPERAND_WIDTH_MB}, {"MW", XED_OPERAND_WIDTH_MW}, {"MD", XED_OPERAND_WIDTH_MD}, {"MQ", XED_OPERAND_WIDTH_MQ}, {"M64INT", XED_OPERAND_WIDTH_M64INT}, {"M64REAL", XED_OPERAND_WIDTH_M64REAL}, {"MEM108", XED_OPERAND_WIDTH_MEM108}, {"MEM14", XED_OPERAND_WIDTH_MEM14}, {"MEM16", XED_OPERAND_WIDTH_MEM16}, {"MEM16INT", XED_OPERAND_WIDTH_MEM16INT}, {"MEM28", XED_OPERAND_WIDTH_MEM28}, {"MEM32INT", XED_OPERAND_WIDTH_MEM32INT}, {"MEM32REAL", XED_OPERAND_WIDTH_MEM32REAL}, {"MEM80DEC", XED_OPERAND_WIDTH_MEM80DEC}, {"MEM80REAL", XED_OPERAND_WIDTH_MEM80REAL}, {"F80", XED_OPERAND_WIDTH_F80}, {"MEM94", XED_OPERAND_WIDTH_MEM94}, {"MFPXENV", XED_OPERAND_WIDTH_MFPXENV}, {"MXSAVE", XED_OPERAND_WIDTH_MXSAVE}, {"MPREFETCH", XED_OPERAND_WIDTH_MPREFETCH}, {"P", XED_OPERAND_WIDTH_P}, {"P2", XED_OPERAND_WIDTH_P2}, {"PD", XED_OPERAND_WIDTH_PD}, {"PS", XED_OPERAND_WIDTH_PS}, {"PI", XED_OPERAND_WIDTH_PI}, {"Q", XED_OPERAND_WIDTH_Q}, {"S", XED_OPERAND_WIDTH_S}, {"S64", XED_OPERAND_WIDTH_S64}, {"SD", XED_OPERAND_WIDTH_SD}, {"SI", XED_OPERAND_WIDTH_SI}, {"SS", XED_OPERAND_WIDTH_SS}, {"V", XED_OPERAND_WIDTH_V}, {"Y", XED_OPERAND_WIDTH_Y}, {"W", XED_OPERAND_WIDTH_W}, {"Z", XED_OPERAND_WIDTH_Z}, {"SPW8", XED_OPERAND_WIDTH_SPW8}, {"SPW", XED_OPERAND_WIDTH_SPW}, {"SPW5", XED_OPERAND_WIDTH_SPW5}, {"SPW3", XED_OPERAND_WIDTH_SPW3}, {"SPW2", XED_OPERAND_WIDTH_SPW2}, {"I1", XED_OPERAND_WIDTH_I1}, {"I2", XED_OPERAND_WIDTH_I2}, {"I3", XED_OPERAND_WIDTH_I3}, {"I4", XED_OPERAND_WIDTH_I4}, {"I5", XED_OPERAND_WIDTH_I5}, {"I6", XED_OPERAND_WIDTH_I6}, {"I7", XED_OPERAND_WIDTH_I7}, {"VAR", XED_OPERAND_WIDTH_VAR}, {"BND32", XED_OPERAND_WIDTH_BND32}, {"BND64", XED_OPERAND_WIDTH_BND64}, {"PMMSZ16", XED_OPERAND_WIDTH_PMMSZ16}, {"PMMSZ32", XED_OPERAND_WIDTH_PMMSZ32}, {"QQ", XED_OPERAND_WIDTH_QQ}, {"YUB", XED_OPERAND_WIDTH_YUB}, {"YUW", XED_OPERAND_WIDTH_YUW}, {"YUD", XED_OPERAND_WIDTH_YUD}, {"YUQ", XED_OPERAND_WIDTH_YUQ}, {"Y128", XED_OPERAND_WIDTH_Y128}, {"YB", XED_OPERAND_WIDTH_YB}, {"YW", XED_OPERAND_WIDTH_YW}, {"YD", XED_OPERAND_WIDTH_YD}, {"YQ", XED_OPERAND_WIDTH_YQ}, {"YPS", XED_OPERAND_WIDTH_YPS}, {"YPD", XED_OPERAND_WIDTH_YPD}, {"ZBF16", XED_OPERAND_WIDTH_ZBF16}, {"VV", XED_OPERAND_WIDTH_VV}, {"ZV", XED_OPERAND_WIDTH_ZV}, {"WRD", XED_OPERAND_WIDTH_WRD}, {"MSKW", XED_OPERAND_WIDTH_MSKW}, {"ZMSKW", XED_OPERAND_WIDTH_ZMSKW}, {"ZF32", XED_OPERAND_WIDTH_ZF32}, {"ZF64", XED_OPERAND_WIDTH_ZF64}, {"ZUB", XED_OPERAND_WIDTH_ZUB}, {"ZUW", XED_OPERAND_WIDTH_ZUW}, {"ZUD", XED_OPERAND_WIDTH_ZUD}, {"ZUQ", XED_OPERAND_WIDTH_ZUQ}, {"ZI8", XED_OPERAND_WIDTH_ZI8}, {"ZI16", XED_OPERAND_WIDTH_ZI16}, {"ZI32", XED_OPERAND_WIDTH_ZI32}, {"ZI64", XED_OPERAND_WIDTH_ZI64}, {"ZU8", XED_OPERAND_WIDTH_ZU8}, {"ZU16", XED_OPERAND_WIDTH_ZU16}, {"ZU32", XED_OPERAND_WIDTH_ZU32}, {"ZU64", XED_OPERAND_WIDTH_ZU64}, {"ZU128", XED_OPERAND_WIDTH_ZU128}, {"M384", XED_OPERAND_WIDTH_M384}, {"M512", XED_OPERAND_WIDTH_M512}, {"PTR", XED_OPERAND_WIDTH_PTR}, {"TMEMROW", XED_OPERAND_WIDTH_TMEMROW}, {"TMEMCOL", XED_OPERAND_WIDTH_TMEMCOL}, {"TV", XED_OPERAND_WIDTH_TV}, {"ZF16", XED_OPERAND_WIDTH_ZF16}, {"Z2F16", XED_OPERAND_WIDTH_Z2F16}, {"LAST", XED_OPERAND_WIDTH_LAST}, {0, XED_OPERAND_WIDTH_LAST}, }; xed_operand_width_enum_t str2xed_operand_width_enum_t(const char* s) { const name_table_xed_operand_width_enum_t* p = name_array_xed_operand_width_enum_t; while( p->name ) { if (strcmp(p->name,s) == 0) { return p->value; } p++; } return XED_OPERAND_WIDTH_INVALID; } const char* xed_operand_width_enum_t2str(const xed_operand_width_enum_t p) { xed_operand_width_enum_t type_idx = p; if ( p > XED_OPERAND_WIDTH_LAST) type_idx = XED_OPERAND_WIDTH_LAST; return name_array_xed_operand_width_enum_t[type_idx].name; } xed_operand_width_enum_t xed_operand_width_enum_t_last(void) { return XED_OPERAND_WIDTH_LAST; } /* Here is a skeleton switch statement embedded in a comment switch(p) { case XED_OPERAND_WIDTH_INVALID: case XED_OPERAND_WIDTH_ASZ: case XED_OPERAND_WIDTH_SSZ: case XED_OPERAND_WIDTH_PSEUDO: case XED_OPERAND_WIDTH_PSEUDOX87: case XED_OPERAND_WIDTH_A16: case XED_OPERAND_WIDTH_A32: case XED_OPERAND_WIDTH_B: case XED_OPERAND_WIDTH_D: case XED_OPERAND_WIDTH_I8: case XED_OPERAND_WIDTH_U8: case XED_OPERAND_WIDTH_I16: case XED_OPERAND_WIDTH_U16: case XED_OPERAND_WIDTH_I32: case XED_OPERAND_WIDTH_U32: case XED_OPERAND_WIDTH_I64: case XED_OPERAND_WIDTH_U64: case XED_OPERAND_WIDTH_F16: case XED_OPERAND_WIDTH_F32: case XED_OPERAND_WIDTH_F64: case XED_OPERAND_WIDTH_DQ: case XED_OPERAND_WIDTH_XUB: case XED_OPERAND_WIDTH_XUW: case XED_OPERAND_WIDTH_XUD: case XED_OPERAND_WIDTH_XUQ: case XED_OPERAND_WIDTH_X128: case XED_OPERAND_WIDTH_XB: case XED_OPERAND_WIDTH_XW: case XED_OPERAND_WIDTH_XD: case XED_OPERAND_WIDTH_XQ: case XED_OPERAND_WIDTH_ZB: case XED_OPERAND_WIDTH_ZW: case XED_OPERAND_WIDTH_ZD: case XED_OPERAND_WIDTH_ZQ: case XED_OPERAND_WIDTH_MB: case XED_OPERAND_WIDTH_MW: case XED_OPERAND_WIDTH_MD: case XED_OPERAND_WIDTH_MQ: case XED_OPERAND_WIDTH_M64INT: case XED_OPERAND_WIDTH_M64REAL: case XED_OPERAND_WIDTH_MEM108: case XED_OPERAND_WIDTH_MEM14: case XED_OPERAND_WIDTH_MEM16: case XED_OPERAND_WIDTH_MEM16INT: case XED_OPERAND_WIDTH_MEM28: case XED_OPERAND_WIDTH_MEM32INT: case XED_OPERAND_WIDTH_MEM32REAL: case XED_OPERAND_WIDTH_MEM80DEC: case XED_OPERAND_WIDTH_MEM80REAL: case XED_OPERAND_WIDTH_F80: case XED_OPERAND_WIDTH_MEM94: case XED_OPERAND_WIDTH_MFPXENV: case XED_OPERAND_WIDTH_MXSAVE: case XED_OPERAND_WIDTH_MPREFETCH: case XED_OPERAND_WIDTH_P: case XED_OPERAND_WIDTH_P2: case XED_OPERAND_WIDTH_PD: case XED_OPERAND_WIDTH_PS: case XED_OPERAND_WIDTH_PI: case XED_OPERAND_WIDTH_Q: case XED_OPERAND_WIDTH_S: case XED_OPERAND_WIDTH_S64: case XED_OPERAND_WIDTH_SD: case XED_OPERAND_WIDTH_SI: case XED_OPERAND_WIDTH_SS: case XED_OPERAND_WIDTH_V: case XED_OPERAND_WIDTH_Y: case XED_OPERAND_WIDTH_W: case XED_OPERAND_WIDTH_Z: case XED_OPERAND_WIDTH_SPW8: case XED_OPERAND_WIDTH_SPW: case XED_OPERAND_WIDTH_SPW5: case XED_OPERAND_WIDTH_SPW3: case XED_OPERAND_WIDTH_SPW2: case XED_OPERAND_WIDTH_I1: case XED_OPERAND_WIDTH_I2: case XED_OPERAND_WIDTH_I3: case XED_OPERAND_WIDTH_I4: case XED_OPERAND_WIDTH_I5: case XED_OPERAND_WIDTH_I6: case XED_OPERAND_WIDTH_I7: case XED_OPERAND_WIDTH_VAR: case XED_OPERAND_WIDTH_BND32: case XED_OPERAND_WIDTH_BND64: case XED_OPERAND_WIDTH_PMMSZ16: case XED_OPERAND_WIDTH_PMMSZ32: case XED_OPERAND_WIDTH_QQ: case XED_OPERAND_WIDTH_YUB: case XED_OPERAND_WIDTH_YUW: case XED_OPERAND_WIDTH_YUD: case XED_OPERAND_WIDTH_YUQ: case XED_OPERAND_WIDTH_Y128: case XED_OPERAND_WIDTH_YB: case XED_OPERAND_WIDTH_YW: case XED_OPERAND_WIDTH_YD: case XED_OPERAND_WIDTH_YQ: case XED_OPERAND_WIDTH_YPS: case XED_OPERAND_WIDTH_YPD: case XED_OPERAND_WIDTH_ZBF16: case XED_OPERAND_WIDTH_VV: case XED_OPERAND_WIDTH_ZV: case XED_OPERAND_WIDTH_WRD: case XED_OPERAND_WIDTH_MSKW: case XED_OPERAND_WIDTH_ZMSKW: case XED_OPERAND_WIDTH_ZF32: case XED_OPERAND_WIDTH_ZF64: case XED_OPERAND_WIDTH_ZUB: case XED_OPERAND_WIDTH_ZUW: case XED_OPERAND_WIDTH_ZUD: case XED_OPERAND_WIDTH_ZUQ: case XED_OPERAND_WIDTH_ZI8: case XED_OPERAND_WIDTH_ZI16: case XED_OPERAND_WIDTH_ZI32: case XED_OPERAND_WIDTH_ZI64: case XED_OPERAND_WIDTH_ZU8: case XED_OPERAND_WIDTH_ZU16: case XED_OPERAND_WIDTH_ZU32: case XED_OPERAND_WIDTH_ZU64: case XED_OPERAND_WIDTH_ZU128: case XED_OPERAND_WIDTH_M384: case XED_OPERAND_WIDTH_M512: case XED_OPERAND_WIDTH_PTR: case XED_OPERAND_WIDTH_TMEMROW: case XED_OPERAND_WIDTH_TMEMCOL: case XED_OPERAND_WIDTH_TV: case XED_OPERAND_WIDTH_ZF16: case XED_OPERAND_WIDTH_Z2F16: case XED_OPERAND_WIDTH_LAST: default: xed_assert(0); } */