###FILE: C:/$Fanta/IntelXED/xed/datafiles/xed-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL
# This file is for defining sets of extensions implemented by various chips
#
# The first column is a chip name. It will become the source for the enum xed_chip_t XED_CHIP_*
# The rest of the columns are ISA extensions that that CHIP implements
# ALL_OF(x) is a macro that refers to the set defined previously for some chip x.
# NOT(y) is a macro that removes a specific ISA extension (processed last)

I86:       I86 LAHF
I86FP:     I86 LAHF      X87

I186:      ALL_OF(I86)  I186
     # BOUND, ENTER, INS/INSB/INSW, LEAVE, OUTS/OUTSB/OUTSW, POPA, PUSHA
I186FP:   ALL_OF(I186)   X87

I286REAL:  ALL_OF(I186)     I286REAL X87
I286:      ALL_OF(I286REAL) I286PROTECTED
     # ARPL, CLTS, LAR, LGDT, LIDT, LLDT, LMSW,
     #  LOADALL(undoc), LSL, LTR, SGDT, SIDT,SLDT, SMSW, STR,VERR,VERW
I2186FP:   ALL_OF(I286) X87

# 386 did not add any instr  to real mode
I386REAL:  ALL_OF(I286REAL)
I386:      ALL_OF(I386REAL)  ALL_OF(I286) I386
     # BSF, BSR, BT, BTC, BTR,BTS, CDQ, CMPSD,CWDE, INSD, IRET*, JECXZ,
     # LFS, LGS,LSS, LOADALL(undoc), LODSD, LOOP, MOVSD
     # MOVSX, OUTSD, POPAD POPFD, PUSHAD PUSHD PUSHFD, SCASD
     # SETcc* SHLD, SHRD, STOSD
I386FP:    ALL_OF(I386)  X87

I486REAL:  ALL_OF(I386REAL)  I486REAL             # BSWAP, CMPXCHG, CPUID, INVD, INVLPG, RSM,WBINVD,XADD
I486:      ALL_OF(I486REAL)  ALL_OF(I386) I486     X87         # RSM

PENTIUMREAL:    ALL_OF(I486REAL)     PENTIUMREAL  # CMPXCHG8B, RDMSR, RDTSC, WRMSR
PENTIUM:        ALL_OF(PENTIUMREAL) ALL_OF(I486)
# Quark is PENTIUM ISA, but not Pentium implementation.
QUARK:          ALL_OF(PENTIUM)

PENTIUMMMXREAL: ALL_OF(PENTIUMREAL)    RDPMC     # P55C++  RDPMC
PENTIUMMMX:     ALL_OF(PENTIUMMMXREAL) ALL_OF(PENTIUM) PENTIUMMMX   # P55C++

ALLREAL:  ALL_OF(PENTIUMMMXREAL)

# P6, PentiumPro, PPRO:
# The SSE_PREFETCH were on P6 as fat NOPs, but XED only recognizes them on >=PENTIUM3
PENTIUMPRO: ALL_OF(PENTIUM) PPRO PPRO_UD0_SHORT CMOV FCMOV RDPMC FAT_NOP PREFETCH_NOP     # NO MMX (Orig P6)
    # FCMOV*, CMOV*, RDPMC, SYSCALL, SYSENTER, SYSEXIT,SYSRET, UD2, F[U]COMI[P]
    # note conflict with PENTIUM2 addition of SYSENTER/SYSEXIT


PENTIUM2:   ALL_OF(PENTIUM)  PENTIUMMMX  PPRO CMOV FCMOV FAT_NOP RDPMC PREFETCH_NOP FXSAVE
    # FXSAVE/FXRSTOR, SYSENTER,SYSEXIT P6

# we keep SSEMXCSR separate from SSE to accommodate chip-check for KNC
#  which only implements LDMXCSR/STMXCSR from SSE.
# The SSE_PREFETCH came in as NOPs on P6/PPRO.  innaccuracy...
PENTIUM3:   ALL_OF(PENTIUM2)  SSE  SSEMXCSR SSE_PREFETCH   # SSE(incl. ldmxcsr/stmxcsr) (KNI)

# SSE2MMX is a several purely mmx instructions that came with SSE2 (PADDQ, PSUBQ, PMULUDQ).
# They are really part of SSE2.
PENTIUM4:     ALL_OF(PENTIUM3) NOT(PPRO_UD0_SHORT) PPRO_UD0_LONG SSE2 SSE2MMX CLFSH PAUSE

# MONITOR is (MONITOR and MWAIT) instructions
# SSE3X87 is two x87 instructions that came with SSE3.
P4PRESCOTT:   ALL_OF(PENTIUM4) SSE3 SSE3X87 MONITOR LONGMODE CMPXCHG16B  FXSAVE64

# Made a chip for the P4's that omit LAHF in 64b mode
P4PRESCOTT_NOLAHF:  ALL_OF(P4PRESCOTT)  NOT(LAHF)

P4PRESCOTT_VTX:  ALL_OF(P4PRESCOTT)  VTX

# SSSE3MMX is a a bunch of purely mmx instructions that came with SSSE3.
# They are really part of SSSE3. The 3DNOW_PREFETCH instr were nops.
# previously listed as CORE2
MEROM:       ALL_OF(P4PRESCOTT)  VTX SSSE3 SSSE3MMX SMX 3DNOW_PREFETCH

PENRYN:      ALL_OF(MEROM)     SSE4
PENRYN_E:    ALL_OF(PENRYN)    XSAVE
NEHALEM:     ALL_OF(PENRYN)    SSE42 POPCNT RDTSCP
WESTMERE:    ALL_OF(NEHALEM)    AES PCLMULQDQ

# ATOM
BONNELL:  ALL_OF(MEROM)     MOVBE  NOT(SMX) NOT(PPRO_UD0_LONG) PPRO_UD0_SHORT
SALTWELL: ALL_OF(BONNELL)

# PREFETCHW semantics added to PREFETCHW opcode but not subject
# to chip-check because of prior implementation as NOP.
SILVERMONT:    ALL_OF(WESTMERE)  MOVBE RDRAND PREFETCHW VMFUNC NOT(PPRO_UD0_LONG) PPRO_UD0_SHORT





###FILE: C:/$Fanta/IntelXED/xed/datafiles/via/xed-via-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

#  VIA CENTAUR CHIPS???
#VIA:  ALL_OF(P4PRESCOTT) VIA_PADLOCK_RNG VIA_PADLOCK_AES VIA_PADLOCK_SHA
VIA:  VIA_PADLOCK_RNG VIA_PADLOCK_AES VIA_PADLOCK_SHA VIA_PADLOCK_MONTMUL



###FILE: C:/$Fanta/IntelXED/xed/datafiles/amd/xed-amd-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2020 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL


# This is based mostly on my read of the wikpedia page:
#  https://en.wikipedia.org/wiki/Template:AMD_x86_CPU_features

# FIXME: need a proper baseline for AMD_K10 as a starting point. I
#  used WESTMERE to avoid TSX/RTM.

# FIXME: not sure when LZCNT entered the picture

# FIXME: guessing about F16C and RDWRFSGS

AMD_K10: ALL_OF(WESTMERE) PREFETCHW 3DNOW 3DNOW_PREFETCH SSE4A AMD SVM PREFETCH_NOP LZCNT


AMD_BULLDOZER: ALL_OF(AMD_K10) \
    NOT(3DNOW)   \
    FMA4 LWP XOP \
    AVX AVXAES XSAVE XSAVEOPT F16C RDWRFSGS

AMD_PILEDRIVER: ALL_OF(AMD_BULLDOZER) TBM FMA

AMD_ZEN: ALL_OF(AMD_PILEDRIVER) \
    NOT(FMA4) \
    NOT(LWP) \
    NOT(XOP) \
    AVX2 AVX2GATHER \
    BMI2 MOVBE ADOX_ADCX  SHA \
    RDRAND RDSEED \
    SMAP XSAVEC XSAVES CLFLUSHOPT CLZERO

AMD_ZENPLUS: ALL_OF(AMD_ZEN)

# Guessing about MONITORX
AMD_ZEN2: ALL_OF(AMD_ZENPLUS) \
 WBNOINVD CLWB RDPID RDPRU MCOMMIT \
 MONITORX

# Guessing
AMD_FUTURE: ALL_OF(AMD_ZEN2) \
    SNP \
    AMD_INVLPGB




###FILE: C:/$Fanta/IntelXED/xed/datafiles/glm/glm-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL


GOLDMONT:  ALL_OF(SILVERMONT) MPX SHA RDSEED RDWRFSGS \
                              XSAVE XSAVEOPT XSAVEC XSAVES SMAP \
                              CLFLUSHOPT

GOLDMONT_PLUS:  ALL_OF(GOLDMONT) PTWRITE RDPID SGX
# and UMIP but not instr for that


###FILE: C:/$Fanta/IntelXED/xed/datafiles/tremont/tremont-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2020 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

TREMONT: ALL_OF(GOLDMONT_PLUS)  CLWB GFNI  NOT(SGX)

SNOW_RIDGE: ALL_OF(TREMONT) WAITPKG MOVDIR CLDEMOTE NOT(SGX)


###FILE: C:/$Fanta/IntelXED/xed/datafiles/avx/avx-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL
SANDYBRIDGE: ALL_OF(WESTMERE)      AVX AVXAES XSAVE XSAVEOPT


###FILE: C:/$Fanta/IntelXED/xed/datafiles/ivbavx/ivb-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL
IVYBRIDGE: ALL_OF(SANDYBRIDGE)  RDRAND F16C RDWRFSGS


###FILE: C:/$Fanta/IntelXED/xed/datafiles/hsw/hsw-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL
HASWELL: ALL_OF(IVYBRIDGE)   FMA BMI1 BMI2 LZCNT AVX2 AVX2GATHER INVPCID MOVBE VMFUNC RTM





###FILE: C:/$Fanta/IntelXED/xed/datafiles/bdw/bdw-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

# PREFETCHW semantics added to PREFETCHW opcode but not subject
# to chip-check because of prior implementation as NOP
BROADWELL: ALL_OF(HASWELL)  ADOX_ADCX RDSEED SMAP PREFETCHW



###FILE: C:/$Fanta/IntelXED/xed/datafiles/skl/skl-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

SKYLAKE:   ALL_OF(BROADWELL)  MPX XSAVEC XSAVES SGX CLFLUSHOPT

COMET_LAKE: ALL_OF(SKYLAKE) PKU


###FILE: C:/$Fanta/IntelXED/xed/datafiles/skx/skx-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL


SKYLAKE_SERVER: ALL_OF(SKYLAKE)  PKU \
              CLWB \
              AVX512F_512        \
              AVX512F_128        \
              AVX512F_128N       \
              AVX512F_256        \
              AVX512F_KOP        \
              AVX512F_SCALAR     \
              AVX512BW_128       \
              AVX512BW_128N      \
              AVX512BW_256       \
              AVX512BW_512       \
              AVX512BW_KOP       \
              AVX512CD_128       \
              AVX512CD_256       \
              AVX512CD_512       \
              AVX512DQ_128       \
              AVX512DQ_128N      \
              AVX512DQ_256       \
              AVX512DQ_512       \
              AVX512DQ_KOP       \
              AVX512DQ_SCALAR




###FILE: C:/$Fanta/IntelXED/xed/datafiles/clx/clx-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

# Cascade Lake (CLX) based on Coffee Lake CPU.
#    Coffee Lake has same ISA as SKX.

CASCADE_LAKE: ALL_OF(SKYLAKE_SERVER) \
         AVX512_VNNI_128 \
         AVX512_VNNI_256 \
         AVX512_VNNI_512


###FILE: C:/$Fanta/IntelXED/xed/datafiles/cpx/cooper-lake-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL



COOPER_LAKE: ALL_OF(CASCADE_LAKE) \
         AVX512_BF16_128 \
         AVX512_BF16_256 \
         AVX512_BF16_512


###FILE: C:/$Fanta/IntelXED/xed/datafiles/knl/knl-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

# No HSW INVPCID, RTM, VMFUNC
# No BDW SMAP
KNL: ALL_OF(IVYBRIDGE) \
       AVX512F_SCALAR  \
       AVX512F_KOP     \
       AVX512F_512     \
       AVX512F_128N    \
       AVX512CD_512    \
       AVX512ER_512    \
       AVX512ER_SCALAR \
       AVX512PF_512    \
       PREFETCHWT1     \
       ADOX_ADCX RDSEED FMA BMI1 BMI2 LZCNT AVX2 AVX2GATHER  MOVBE


###FILE: C:/$Fanta/IntelXED/xed/datafiles/knm/knm-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

# VMFUNC was partially implmented on KNL but VMX was disabled.
KNM: ALL_OF(KNL)   VMFUNC \
        AVX512_4VNNIW_512 \
        AVX512_4FMAPS_512 \
        AVX512_4FMAPS_SCALAR \
        AVX512_VPOPCNTDQ_512


###FILE: C:/$Fanta/IntelXED/xed/datafiles/cnl/cnl-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL


# CANNONLAKE does not have CLWB
CANNONLAKE: ALL_OF(SKYLAKE_SERVER) SHA    \
            NOT(CLWB) \
            AVX512_IFMA_128 \
            AVX512_IFMA_256 \
            AVX512_IFMA_512 \
            AVX512_VBMI_128 \
            AVX512_VBMI_256 \
            AVX512_VBMI_512


###FILE: C:/$Fanta/IntelXED/xed/datafiles/icl/icl-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

# NOT(HLE) but no HLE instr support.
ICE_LAKE: \
         ALL_OF(SKYLAKE_SERVER) \
         NOT(CLWB)              \
         NOT(MPX)               \
         RDPID                  \
         SHA                    \
         AVX512_IFMA_128        \
         AVX512_IFMA_256        \
         AVX512_IFMA_512        \
         AVX512_VBMI_128        \
         AVX512_VBMI_256        \
         AVX512_VBMI_512        \
         AVX512_VBMI2_128       \
         AVX512_VBMI2_256       \
         AVX512_VBMI2_512       \
         AVX512_BITALG_512      \
         AVX512_BITALG_256      \
         AVX512_BITALG_128      \
         AVX512_VPOPCNTDQ_128   \
         AVX512_VPOPCNTDQ_256   \
         AVX512_VPOPCNTDQ_512   \
         AVX512_GFNI_128        \
         AVX512_GFNI_256        \
         AVX512_GFNI_512        \
         AVX_GFNI               \
         GFNI                   \
         AVX512_VAES_128        \
         AVX512_VAES_256        \
         AVX512_VAES_512        \
         VAES                   \
         AVX512_VPCLMULQDQ_128  \
         AVX512_VPCLMULQDQ_256  \
         AVX512_VPCLMULQDQ_512  \
         VPCLMULQDQ             \
         AVX512_VNNI_128        \
         AVX512_VNNI_256        \
         AVX512_VNNI_512


ICE_LAKE_SERVER:          \
         ALL_OF(ICE_LAKE) \
         CLWB             \
         SGX_ENCLV        \
         PCONFIG          \
         WBNOINVD


###FILE: C:/$Fanta/IntelXED/xed/datafiles/tgl/tgl-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2020 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

TIGER_LAKE:                  \
     ALL_OF(ICE_LAKE_SERVER) \
     KEYLOCKER               \
     KEYLOCKER_WIDE          \
     CET                     \
     MOVDIR                  \
     AVX512_VP2INTERSECT_128 \
     AVX512_VP2INTERSECT_256 \
     AVX512_VP2INTERSECT_512






###FILE: C:/$Fanta/IntelXED/xed/datafiles/adl/adl-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2020 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL


# MKTME has no new instr
ALDER_LAKE:             \
     ALL_OF(SNOW_RIDGE) \
     NOT(SGX_ENCLV)     \
     NOT(MPX)           \
     KEYLOCKER          \
     KEYLOCKER_WIDE     \
     CET                \
     PCONFIG            \
     INVPCID            \
     SERIALIZE          \
     AVX                \
     AVX_VNNI           \
     VPCLMULQDQ         \
     VAES               \
     F16C               \
     AVXAES             \
     PKU                \
     FMA                \
     BMI1               \
     BMI2               \
     AVX2               \
     AVX_GFNI           \
     AVX2GATHER         \
     ADOX_ADCX          \
     LZCNT              \
     WBNOINVD           \
     HRESET








###FILE: C:/$Fanta/IntelXED/xed/datafiles/spr/spr-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2020 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL


SAPPHIRE_RAPIDS:         \
     ALL_OF(TIGER_LAKE)  \
     NOT(KEYLOCKER)      \
     NOT(KEYLOCKER_WIDE) \
     UINTR               \
     PTWRITE             \
     CLDEMOTE            \
     ENQCMD              \
     SERIALIZE           \
     TSX_LDTRK           \
     WAITPKG             \
     AVX512_BF16_128     \
     AVX512_BF16_256     \
     AVX512_BF16_512     \
     AVX_VNNI            \
     AMX_TILE            \
     AMX_INT8            \
     AMX_BF16            \
     TDX                 \
     AVX512_BF16_128     \
     AVX512_BF16_256     \
     AVX512_BF16_512     \
     AVX512_FP16_128N    \
     AVX512_FP16_128     \
     AVX512_FP16_256     \
     AVX512_FP16_512     \
     AVX512_FP16_SCALAR




###FILE: C:/$Fanta/IntelXED/xed/datafiles/future/future-chips.txt

#BEGIN_LEGAL
#
#Copyright (c) 2019 Intel Corporation
#
#  Licensed under the Apache License, Version 2.0 (the "License");
#  you may not use this file except in compliance with the License.
#  You may obtain a copy of the License at
#
#      http://www.apache.org/licenses/LICENSE-2.0
#
#  Unless required by applicable law or agreed to in writing, software
#  distributed under the License is distributed on an "AS IS" BASIS,
#  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
#  See the License for the specific language governing permissions and
#  limitations under the License.
#
#END_LEGAL

# This is intentionally *completely* inaccurate but Intel is not
# saying which chips will have these instructions publicly at this
# time and I had to put the new instructions on some chip so I made
# somethign up.

FUTURE:                    \
   ALL_OF(SAPPHIRE_RAPIDS) \
   TDX