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159 lines
4.0 KiB
159 lines
4.0 KiB
/// @file xed-operand-storage.h
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// This file was automatically generated.
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// Do not edit this file.
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#if !defined(XED_OPERAND_STORAGE_H)
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# define XED_OPERAND_STORAGE_H
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/*BEGIN_LEGAL
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Copyright (c) 2021 Intel Corporation
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Licensed under the Apache License, Version 2.0 (the "License");
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you may not use this file except in compliance with the License.
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You may obtain a copy of the License at
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http://www.apache.org/licenses/LICENSE-2.0
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Unless required by applicable law or agreed to in writing, software
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distributed under the License is distributed on an "AS IS" BASIS,
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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See the License for the specific language governing permissions and
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limitations under the License.
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END_LEGAL */
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#include "xed-chip-enum.h"
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#include "xed-error-enum.h"
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#include "xed-iclass-enum.h"
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#include "xed-reg-enum.h"
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#include "xed-operand-element-type-enum.h"
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typedef struct xed_operand_storage_s {
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xed_uint8_t agen;
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xed_uint8_t amd3dnow;
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xed_uint8_t asz;
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xed_uint8_t bcrc;
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xed_uint8_t cet;
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xed_uint8_t cldemote;
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xed_uint8_t df32;
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xed_uint8_t df64;
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xed_uint8_t dummy;
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xed_uint8_t encoder_preferred;
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xed_uint8_t encode_force;
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xed_uint8_t has_sib;
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xed_uint8_t ild_f2;
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xed_uint8_t ild_f3;
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xed_uint8_t imm0;
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xed_uint8_t imm0signed;
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xed_uint8_t imm1;
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xed_uint8_t lock;
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xed_uint8_t lzcnt;
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xed_uint8_t mem0;
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xed_uint8_t mem1;
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xed_uint8_t modep5;
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xed_uint8_t modep55c;
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xed_uint8_t mode_first_prefix;
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xed_uint8_t mode_short_ud0;
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xed_uint8_t mpxmode;
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xed_uint8_t must_use_evex;
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xed_uint8_t needrex;
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xed_uint8_t need_sib;
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xed_uint8_t norex;
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xed_uint8_t no_scale_disp8;
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xed_uint8_t osz;
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xed_uint8_t out_of_bytes;
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xed_uint8_t p4;
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xed_uint8_t prefix66;
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xed_uint8_t ptr;
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xed_uint8_t realmode;
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xed_uint8_t relbr;
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xed_uint8_t rex;
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xed_uint8_t rexb;
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xed_uint8_t rexr;
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xed_uint8_t rexrr;
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xed_uint8_t rexw;
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xed_uint8_t rexx;
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xed_uint8_t sae;
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xed_uint8_t tzcnt;
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xed_uint8_t ubit;
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xed_uint8_t using_default_segment0;
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xed_uint8_t using_default_segment1;
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xed_uint8_t vexdest3;
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xed_uint8_t vexdest4;
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xed_uint8_t vex_c4;
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xed_uint8_t wbnoinvd;
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xed_uint8_t zeroing;
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xed_uint8_t default_seg;
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xed_uint8_t easz;
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xed_uint8_t eosz;
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xed_uint8_t first_f2f3;
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xed_uint8_t has_modrm;
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xed_uint8_t last_f2f3;
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xed_uint8_t llrc;
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xed_uint8_t mod;
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xed_uint8_t mode;
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xed_uint8_t rep;
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xed_uint8_t sibscale;
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xed_uint8_t smode;
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xed_uint8_t vex_prefix;
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xed_uint8_t vl;
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xed_uint8_t hint;
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xed_uint8_t mask;
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xed_uint8_t reg;
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xed_uint8_t rm;
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xed_uint8_t roundc;
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xed_uint8_t seg_ovd;
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xed_uint8_t sibbase;
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xed_uint8_t sibindex;
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xed_uint8_t srm;
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xed_uint8_t vexdest210;
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xed_uint8_t vexvalid;
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xed_uint8_t error;
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xed_uint8_t esrc;
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xed_uint8_t map;
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xed_uint8_t nelem;
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xed_uint8_t scale;
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xed_uint8_t bcast;
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xed_uint8_t need_memdisp;
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xed_uint8_t chip;
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xed_uint8_t brdisp_width;
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xed_uint8_t disp_width;
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xed_uint8_t ild_seg;
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xed_uint8_t imm1_bytes;
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xed_uint8_t imm_width;
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xed_uint8_t max_bytes;
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xed_uint8_t modrm_byte;
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xed_uint8_t nominal_opcode;
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xed_uint8_t nprefixes;
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xed_uint8_t nrexes;
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xed_uint8_t nseg_prefixes;
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xed_uint8_t pos_disp;
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xed_uint8_t pos_imm;
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xed_uint8_t pos_imm1;
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xed_uint8_t pos_modrm;
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xed_uint8_t pos_nominal_opcode;
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xed_uint8_t pos_sib;
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xed_uint8_t uimm1;
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xed_uint16_t base0;
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xed_uint16_t base1;
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xed_uint16_t element_size;
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xed_uint16_t index;
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xed_uint16_t outreg;
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xed_uint16_t reg0;
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xed_uint16_t reg1;
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xed_uint16_t reg2;
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xed_uint16_t reg3;
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xed_uint16_t reg4;
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xed_uint16_t reg5;
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xed_uint16_t reg6;
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xed_uint16_t reg7;
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xed_uint16_t reg8;
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xed_uint16_t reg9;
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xed_uint16_t seg0;
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xed_uint16_t seg1;
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xed_uint16_t iclass;
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xed_uint16_t mem_width;
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xed_uint64_t disp;
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xed_uint64_t uimm0;
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} xed_operand_storage_t;
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#endif
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