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# @file xed-reg-enum.txt
# This file was automatically generated.
# Do not edit this file.
#BEGIN_LEGAL
#
#Copyright (c) 2021 Intel Corporation
#
# Licensed under the Apache License, Version 2.0 (the "License");
# you may not use this file except in compliance with the License.
# You may obtain a copy of the License at
#
# http://www.apache.org/licenses/LICENSE-2.0
#
# Unless required by applicable law or agreed to in writing, software
# distributed under the License is distributed on an "AS IS" BASIS,
# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
# See the License for the specific language governing permissions and
# limitations under the License.
#
#END_LEGAL
namespace XED
cfn xed-reg-enum.c
hfn xed-reg-enum.h
typename xed_reg_enum_t
prefix XED_REG_
stream_ifdef XED_PRINT
proto_prefix XED_DLL_EXPORT
extra_header xed-common-hdrs.h
BNDCFGU
BNDCFG_FIRST
BNDCFG_LAST
BNDSTATUS
BNDSTAT_FIRST
BNDSTAT_LAST
BND0
BOUND_FIRST
BND1
BND2
BND3
BOUND_LAST
CR0
CR_FIRST
CR1
CR2
CR3
CR4
CR5
CR6
CR7
CR8
CR9
CR10
CR11
CR12
CR13
CR14
CR15
CR_LAST
DR0
DR_FIRST
DR1
DR2
DR3
DR4
DR5
DR6
DR7
DR_LAST
FLAGS
FLAGS_FIRST
EFLAGS
RFLAGS
FLAGS_LAST
AX
GPR16_FIRST
CX
DX
BX
SP
BP
SI
DI
R8W
R9W
R10W
R11W
R12W
R13W
R14W
R15W
GPR16_LAST
EAX
GPR32_FIRST
ECX
EDX
EBX
ESP
EBP
ESI
EDI
R8D
R9D
R10D
R11D
R12D
R13D
R14D
R15D
GPR32_LAST
RAX
GPR64_FIRST
RCX
RDX
RBX
RSP
RBP
RSI
RDI
R8
R9
R10
R11
R12
R13
R14
R15
GPR64_LAST
AL
GPR8_FIRST
CL
DL
BL
SPL
BPL
SIL
DIL
R8B
R9B
R10B
R11B
R12B
R13B
R14B
R15B
GPR8_LAST
AH
GPR8H_FIRST
CH
DH
BH
GPR8H_LAST
INVALID
INVALID_FIRST
ERROR
INVALID_LAST
RIP
IP_FIRST
EIP
IP
IP_LAST
K0
MASK_FIRST
K1
K2
K3
K4
K5
K6
K7
MASK_LAST
MMX0
MMX_FIRST
MMX1
MMX2
MMX3
MMX4
MMX5
MMX6
MMX7
MMX_LAST
SSP
MSR_FIRST
IA32_U_CET
MSR_LAST
MXCSR
MXCSR_FIRST
MXCSR_LAST
STACKPUSH
PSEUDO_FIRST
STACKPOP
GDTR
LDTR
IDTR
TR
TSC
TSCAUX
MSRS
FSBASE
GSBASE
TILECONFIG
PSEUDO_LAST
X87CONTROL
PSEUDOX87_FIRST
X87STATUS
X87TAG
X87PUSH
X87POP
X87POP2
X87OPCODE
X87LASTCS
X87LASTIP
X87LASTDS
X87LASTDP
PSEUDOX87_LAST
ES
SR_FIRST
CS
SS
DS
FS
GS
SR_LAST
TMP0
TMP_FIRST
TMP1
TMP2
TMP3
TMP4
TMP5
TMP6
TMP7
TMP8
TMP9
TMP10
TMP11
TMP12
TMP13
TMP14
TMP15
TMP_LAST
TMM0
TREG_FIRST
TMM1
TMM2
TMM3
TMM4
TMM5
TMM6
TMM7
TREG_LAST
UIF
UIF_FIRST
UIF_LAST
ST0
X87_FIRST
ST1
ST2
ST3
ST4
ST5
ST6
ST7
X87_LAST
XCR0
XCR_FIRST
XCR_LAST
XMM0
XMM_FIRST
XMM1
XMM2
XMM3
XMM4
XMM5
XMM6
XMM7
XMM8
XMM9
XMM10
XMM11
XMM12
XMM13
XMM14
XMM15
XMM16
XMM17
XMM18
XMM19
XMM20
XMM21
XMM22
XMM23
XMM24
XMM25
XMM26
XMM27
XMM28
XMM29
XMM30
XMM31
XMM_LAST
YMM0
YMM_FIRST
YMM1
YMM2
YMM3
YMM4
YMM5
YMM6
YMM7
YMM8
YMM9
YMM10
YMM11
YMM12
YMM13
YMM14
YMM15
YMM16
YMM17
YMM18
YMM19
YMM20
YMM21
YMM22
YMM23
YMM24
YMM25
YMM26
YMM27
YMM28
YMM29
YMM30
YMM31
YMM_LAST
ZMM0
ZMM_FIRST
ZMM1
ZMM2
ZMM3
ZMM4
ZMM5
ZMM6
ZMM7
ZMM8
ZMM9
ZMM10
ZMM11
ZMM12
ZMM13
ZMM14
ZMM15
ZMM16
ZMM17
ZMM18
ZMM19
ZMM20
ZMM21
ZMM22
ZMM23
ZMM24
ZMM25
ZMM26
ZMM27
ZMM28
ZMM29
ZMM30
ZMM31
ZMM_LAST