You can not select more than 25 topics
Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
411 lines
13 KiB
411 lines
13 KiB
/* BEGIN_LEGAL
|
|
|
|
Copyright (c) 2021 Intel Corporation
|
|
|
|
Licensed under the Apache License, Version 2.0 (the "License");
|
|
you may not use this file except in compliance with the License.
|
|
You may obtain a copy of the License at
|
|
|
|
http://www.apache.org/licenses/LICENSE-2.0
|
|
|
|
Unless required by applicable law or agreed to in writing, software
|
|
distributed under the License is distributed on an "AS IS" BASIS,
|
|
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
|
See the License for the specific language governing permissions and
|
|
limitations under the License.
|
|
|
|
END_LEGAL */
|
|
/// @file xed-isa-set-enum.h
|
|
|
|
// This file was automatically generated.
|
|
// Do not edit this file.
|
|
|
|
#if !defined(XED_ISA_SET_ENUM_H)
|
|
# define XED_ISA_SET_ENUM_H
|
|
#include "xed-common-hdrs.h"
|
|
#define XED_ISA_SET_INVALID_DEFINED 1
|
|
#define XED_ISA_SET_3DNOW_DEFINED 1
|
|
#define XED_ISA_SET_3DNOW_PREFETCH_DEFINED 1
|
|
#define XED_ISA_SET_ADOX_ADCX_DEFINED 1
|
|
#define XED_ISA_SET_AES_DEFINED 1
|
|
#define XED_ISA_SET_AMD_DEFINED 1
|
|
#define XED_ISA_SET_AMD_INVLPGB_DEFINED 1
|
|
#define XED_ISA_SET_AMX_BF16_DEFINED 1
|
|
#define XED_ISA_SET_AMX_INT8_DEFINED 1
|
|
#define XED_ISA_SET_AMX_TILE_DEFINED 1
|
|
#define XED_ISA_SET_AVX_DEFINED 1
|
|
#define XED_ISA_SET_AVX2_DEFINED 1
|
|
#define XED_ISA_SET_AVX2GATHER_DEFINED 1
|
|
#define XED_ISA_SET_AVX512BW_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512BW_128N_DEFINED 1
|
|
#define XED_ISA_SET_AVX512BW_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512BW_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512BW_KOP_DEFINED 1
|
|
#define XED_ISA_SET_AVX512CD_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512CD_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512CD_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512DQ_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512DQ_128N_DEFINED 1
|
|
#define XED_ISA_SET_AVX512DQ_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512DQ_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512DQ_KOP_DEFINED 1
|
|
#define XED_ISA_SET_AVX512DQ_SCALAR_DEFINED 1
|
|
#define XED_ISA_SET_AVX512ER_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512ER_SCALAR_DEFINED 1
|
|
#define XED_ISA_SET_AVX512F_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512F_128N_DEFINED 1
|
|
#define XED_ISA_SET_AVX512F_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512F_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512F_KOP_DEFINED 1
|
|
#define XED_ISA_SET_AVX512F_SCALAR_DEFINED 1
|
|
#define XED_ISA_SET_AVX512PF_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_4FMAPS_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_4FMAPS_SCALAR_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_4VNNIW_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_BF16_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_BF16_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_BF16_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_BITALG_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_BITALG_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_BITALG_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_FP16_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_FP16_128N_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_FP16_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_FP16_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_FP16_SCALAR_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_GFNI_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_GFNI_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_GFNI_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_IFMA_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_IFMA_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_IFMA_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VAES_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VAES_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VAES_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VBMI2_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VBMI2_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VBMI2_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VBMI_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VBMI_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VBMI_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VNNI_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VNNI_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VNNI_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VP2INTERSECT_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VP2INTERSECT_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VP2INTERSECT_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VPCLMULQDQ_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VPCLMULQDQ_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VPCLMULQDQ_512_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VPOPCNTDQ_128_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VPOPCNTDQ_256_DEFINED 1
|
|
#define XED_ISA_SET_AVX512_VPOPCNTDQ_512_DEFINED 1
|
|
#define XED_ISA_SET_AVXAES_DEFINED 1
|
|
#define XED_ISA_SET_AVX_GFNI_DEFINED 1
|
|
#define XED_ISA_SET_AVX_VNNI_DEFINED 1
|
|
#define XED_ISA_SET_BMI1_DEFINED 1
|
|
#define XED_ISA_SET_BMI2_DEFINED 1
|
|
#define XED_ISA_SET_CET_DEFINED 1
|
|
#define XED_ISA_SET_CLDEMOTE_DEFINED 1
|
|
#define XED_ISA_SET_CLFLUSHOPT_DEFINED 1
|
|
#define XED_ISA_SET_CLFSH_DEFINED 1
|
|
#define XED_ISA_SET_CLWB_DEFINED 1
|
|
#define XED_ISA_SET_CLZERO_DEFINED 1
|
|
#define XED_ISA_SET_CMOV_DEFINED 1
|
|
#define XED_ISA_SET_CMPXCHG16B_DEFINED 1
|
|
#define XED_ISA_SET_ENQCMD_DEFINED 1
|
|
#define XED_ISA_SET_F16C_DEFINED 1
|
|
#define XED_ISA_SET_FAT_NOP_DEFINED 1
|
|
#define XED_ISA_SET_FCMOV_DEFINED 1
|
|
#define XED_ISA_SET_FMA_DEFINED 1
|
|
#define XED_ISA_SET_FMA4_DEFINED 1
|
|
#define XED_ISA_SET_FXSAVE_DEFINED 1
|
|
#define XED_ISA_SET_FXSAVE64_DEFINED 1
|
|
#define XED_ISA_SET_GFNI_DEFINED 1
|
|
#define XED_ISA_SET_HRESET_DEFINED 1
|
|
#define XED_ISA_SET_I186_DEFINED 1
|
|
#define XED_ISA_SET_I286PROTECTED_DEFINED 1
|
|
#define XED_ISA_SET_I286REAL_DEFINED 1
|
|
#define XED_ISA_SET_I386_DEFINED 1
|
|
#define XED_ISA_SET_I486_DEFINED 1
|
|
#define XED_ISA_SET_I486REAL_DEFINED 1
|
|
#define XED_ISA_SET_I86_DEFINED 1
|
|
#define XED_ISA_SET_INVPCID_DEFINED 1
|
|
#define XED_ISA_SET_KEYLOCKER_DEFINED 1
|
|
#define XED_ISA_SET_KEYLOCKER_WIDE_DEFINED 1
|
|
#define XED_ISA_SET_LAHF_DEFINED 1
|
|
#define XED_ISA_SET_LONGMODE_DEFINED 1
|
|
#define XED_ISA_SET_LWP_DEFINED 1
|
|
#define XED_ISA_SET_LZCNT_DEFINED 1
|
|
#define XED_ISA_SET_MCOMMIT_DEFINED 1
|
|
#define XED_ISA_SET_MONITOR_DEFINED 1
|
|
#define XED_ISA_SET_MONITORX_DEFINED 1
|
|
#define XED_ISA_SET_MOVBE_DEFINED 1
|
|
#define XED_ISA_SET_MOVDIR_DEFINED 1
|
|
#define XED_ISA_SET_MPX_DEFINED 1
|
|
#define XED_ISA_SET_PAUSE_DEFINED 1
|
|
#define XED_ISA_SET_PCLMULQDQ_DEFINED 1
|
|
#define XED_ISA_SET_PCONFIG_DEFINED 1
|
|
#define XED_ISA_SET_PENTIUMMMX_DEFINED 1
|
|
#define XED_ISA_SET_PENTIUMREAL_DEFINED 1
|
|
#define XED_ISA_SET_PKU_DEFINED 1
|
|
#define XED_ISA_SET_POPCNT_DEFINED 1
|
|
#define XED_ISA_SET_PPRO_DEFINED 1
|
|
#define XED_ISA_SET_PPRO_UD0_LONG_DEFINED 1
|
|
#define XED_ISA_SET_PPRO_UD0_SHORT_DEFINED 1
|
|
#define XED_ISA_SET_PREFETCHW_DEFINED 1
|
|
#define XED_ISA_SET_PREFETCHWT1_DEFINED 1
|
|
#define XED_ISA_SET_PREFETCH_NOP_DEFINED 1
|
|
#define XED_ISA_SET_PTWRITE_DEFINED 1
|
|
#define XED_ISA_SET_RDPID_DEFINED 1
|
|
#define XED_ISA_SET_RDPMC_DEFINED 1
|
|
#define XED_ISA_SET_RDPRU_DEFINED 1
|
|
#define XED_ISA_SET_RDRAND_DEFINED 1
|
|
#define XED_ISA_SET_RDSEED_DEFINED 1
|
|
#define XED_ISA_SET_RDTSCP_DEFINED 1
|
|
#define XED_ISA_SET_RDWRFSGS_DEFINED 1
|
|
#define XED_ISA_SET_RTM_DEFINED 1
|
|
#define XED_ISA_SET_SERIALIZE_DEFINED 1
|
|
#define XED_ISA_SET_SGX_DEFINED 1
|
|
#define XED_ISA_SET_SGX_ENCLV_DEFINED 1
|
|
#define XED_ISA_SET_SHA_DEFINED 1
|
|
#define XED_ISA_SET_SMAP_DEFINED 1
|
|
#define XED_ISA_SET_SMX_DEFINED 1
|
|
#define XED_ISA_SET_SNP_DEFINED 1
|
|
#define XED_ISA_SET_SSE_DEFINED 1
|
|
#define XED_ISA_SET_SSE2_DEFINED 1
|
|
#define XED_ISA_SET_SSE2MMX_DEFINED 1
|
|
#define XED_ISA_SET_SSE3_DEFINED 1
|
|
#define XED_ISA_SET_SSE3X87_DEFINED 1
|
|
#define XED_ISA_SET_SSE4_DEFINED 1
|
|
#define XED_ISA_SET_SSE42_DEFINED 1
|
|
#define XED_ISA_SET_SSE4A_DEFINED 1
|
|
#define XED_ISA_SET_SSEMXCSR_DEFINED 1
|
|
#define XED_ISA_SET_SSE_PREFETCH_DEFINED 1
|
|
#define XED_ISA_SET_SSSE3_DEFINED 1
|
|
#define XED_ISA_SET_SSSE3MMX_DEFINED 1
|
|
#define XED_ISA_SET_SVM_DEFINED 1
|
|
#define XED_ISA_SET_TBM_DEFINED 1
|
|
#define XED_ISA_SET_TDX_DEFINED 1
|
|
#define XED_ISA_SET_TSX_LDTRK_DEFINED 1
|
|
#define XED_ISA_SET_UINTR_DEFINED 1
|
|
#define XED_ISA_SET_VAES_DEFINED 1
|
|
#define XED_ISA_SET_VIA_PADLOCK_AES_DEFINED 1
|
|
#define XED_ISA_SET_VIA_PADLOCK_MONTMUL_DEFINED 1
|
|
#define XED_ISA_SET_VIA_PADLOCK_RNG_DEFINED 1
|
|
#define XED_ISA_SET_VIA_PADLOCK_SHA_DEFINED 1
|
|
#define XED_ISA_SET_VMFUNC_DEFINED 1
|
|
#define XED_ISA_SET_VPCLMULQDQ_DEFINED 1
|
|
#define XED_ISA_SET_VTX_DEFINED 1
|
|
#define XED_ISA_SET_WAITPKG_DEFINED 1
|
|
#define XED_ISA_SET_WBNOINVD_DEFINED 1
|
|
#define XED_ISA_SET_X87_DEFINED 1
|
|
#define XED_ISA_SET_XOP_DEFINED 1
|
|
#define XED_ISA_SET_XSAVE_DEFINED 1
|
|
#define XED_ISA_SET_XSAVEC_DEFINED 1
|
|
#define XED_ISA_SET_XSAVEOPT_DEFINED 1
|
|
#define XED_ISA_SET_XSAVES_DEFINED 1
|
|
#define XED_ISA_SET_LAST_DEFINED 1
|
|
typedef enum {
|
|
XED_ISA_SET_INVALID,
|
|
XED_ISA_SET_3DNOW,
|
|
XED_ISA_SET_3DNOW_PREFETCH,
|
|
XED_ISA_SET_ADOX_ADCX,
|
|
XED_ISA_SET_AES,
|
|
XED_ISA_SET_AMD,
|
|
XED_ISA_SET_AMD_INVLPGB,
|
|
XED_ISA_SET_AMX_BF16,
|
|
XED_ISA_SET_AMX_INT8,
|
|
XED_ISA_SET_AMX_TILE,
|
|
XED_ISA_SET_AVX,
|
|
XED_ISA_SET_AVX2,
|
|
XED_ISA_SET_AVX2GATHER,
|
|
XED_ISA_SET_AVX512BW_128,
|
|
XED_ISA_SET_AVX512BW_128N,
|
|
XED_ISA_SET_AVX512BW_256,
|
|
XED_ISA_SET_AVX512BW_512,
|
|
XED_ISA_SET_AVX512BW_KOP,
|
|
XED_ISA_SET_AVX512CD_128,
|
|
XED_ISA_SET_AVX512CD_256,
|
|
XED_ISA_SET_AVX512CD_512,
|
|
XED_ISA_SET_AVX512DQ_128,
|
|
XED_ISA_SET_AVX512DQ_128N,
|
|
XED_ISA_SET_AVX512DQ_256,
|
|
XED_ISA_SET_AVX512DQ_512,
|
|
XED_ISA_SET_AVX512DQ_KOP,
|
|
XED_ISA_SET_AVX512DQ_SCALAR,
|
|
XED_ISA_SET_AVX512ER_512,
|
|
XED_ISA_SET_AVX512ER_SCALAR,
|
|
XED_ISA_SET_AVX512F_128,
|
|
XED_ISA_SET_AVX512F_128N,
|
|
XED_ISA_SET_AVX512F_256,
|
|
XED_ISA_SET_AVX512F_512,
|
|
XED_ISA_SET_AVX512F_KOP,
|
|
XED_ISA_SET_AVX512F_SCALAR,
|
|
XED_ISA_SET_AVX512PF_512,
|
|
XED_ISA_SET_AVX512_4FMAPS_512,
|
|
XED_ISA_SET_AVX512_4FMAPS_SCALAR,
|
|
XED_ISA_SET_AVX512_4VNNIW_512,
|
|
XED_ISA_SET_AVX512_BF16_128,
|
|
XED_ISA_SET_AVX512_BF16_256,
|
|
XED_ISA_SET_AVX512_BF16_512,
|
|
XED_ISA_SET_AVX512_BITALG_128,
|
|
XED_ISA_SET_AVX512_BITALG_256,
|
|
XED_ISA_SET_AVX512_BITALG_512,
|
|
XED_ISA_SET_AVX512_FP16_128,
|
|
XED_ISA_SET_AVX512_FP16_128N,
|
|
XED_ISA_SET_AVX512_FP16_256,
|
|
XED_ISA_SET_AVX512_FP16_512,
|
|
XED_ISA_SET_AVX512_FP16_SCALAR,
|
|
XED_ISA_SET_AVX512_GFNI_128,
|
|
XED_ISA_SET_AVX512_GFNI_256,
|
|
XED_ISA_SET_AVX512_GFNI_512,
|
|
XED_ISA_SET_AVX512_IFMA_128,
|
|
XED_ISA_SET_AVX512_IFMA_256,
|
|
XED_ISA_SET_AVX512_IFMA_512,
|
|
XED_ISA_SET_AVX512_VAES_128,
|
|
XED_ISA_SET_AVX512_VAES_256,
|
|
XED_ISA_SET_AVX512_VAES_512,
|
|
XED_ISA_SET_AVX512_VBMI2_128,
|
|
XED_ISA_SET_AVX512_VBMI2_256,
|
|
XED_ISA_SET_AVX512_VBMI2_512,
|
|
XED_ISA_SET_AVX512_VBMI_128,
|
|
XED_ISA_SET_AVX512_VBMI_256,
|
|
XED_ISA_SET_AVX512_VBMI_512,
|
|
XED_ISA_SET_AVX512_VNNI_128,
|
|
XED_ISA_SET_AVX512_VNNI_256,
|
|
XED_ISA_SET_AVX512_VNNI_512,
|
|
XED_ISA_SET_AVX512_VP2INTERSECT_128,
|
|
XED_ISA_SET_AVX512_VP2INTERSECT_256,
|
|
XED_ISA_SET_AVX512_VP2INTERSECT_512,
|
|
XED_ISA_SET_AVX512_VPCLMULQDQ_128,
|
|
XED_ISA_SET_AVX512_VPCLMULQDQ_256,
|
|
XED_ISA_SET_AVX512_VPCLMULQDQ_512,
|
|
XED_ISA_SET_AVX512_VPOPCNTDQ_128,
|
|
XED_ISA_SET_AVX512_VPOPCNTDQ_256,
|
|
XED_ISA_SET_AVX512_VPOPCNTDQ_512,
|
|
XED_ISA_SET_AVXAES,
|
|
XED_ISA_SET_AVX_GFNI,
|
|
XED_ISA_SET_AVX_VNNI,
|
|
XED_ISA_SET_BMI1,
|
|
XED_ISA_SET_BMI2,
|
|
XED_ISA_SET_CET,
|
|
XED_ISA_SET_CLDEMOTE,
|
|
XED_ISA_SET_CLFLUSHOPT,
|
|
XED_ISA_SET_CLFSH,
|
|
XED_ISA_SET_CLWB,
|
|
XED_ISA_SET_CLZERO,
|
|
XED_ISA_SET_CMOV,
|
|
XED_ISA_SET_CMPXCHG16B,
|
|
XED_ISA_SET_ENQCMD,
|
|
XED_ISA_SET_F16C,
|
|
XED_ISA_SET_FAT_NOP,
|
|
XED_ISA_SET_FCMOV,
|
|
XED_ISA_SET_FMA,
|
|
XED_ISA_SET_FMA4,
|
|
XED_ISA_SET_FXSAVE,
|
|
XED_ISA_SET_FXSAVE64,
|
|
XED_ISA_SET_GFNI,
|
|
XED_ISA_SET_HRESET,
|
|
XED_ISA_SET_I186,
|
|
XED_ISA_SET_I286PROTECTED,
|
|
XED_ISA_SET_I286REAL,
|
|
XED_ISA_SET_I386,
|
|
XED_ISA_SET_I486,
|
|
XED_ISA_SET_I486REAL,
|
|
XED_ISA_SET_I86,
|
|
XED_ISA_SET_INVPCID,
|
|
XED_ISA_SET_KEYLOCKER,
|
|
XED_ISA_SET_KEYLOCKER_WIDE,
|
|
XED_ISA_SET_LAHF,
|
|
XED_ISA_SET_LONGMODE,
|
|
XED_ISA_SET_LWP,
|
|
XED_ISA_SET_LZCNT,
|
|
XED_ISA_SET_MCOMMIT,
|
|
XED_ISA_SET_MONITOR,
|
|
XED_ISA_SET_MONITORX,
|
|
XED_ISA_SET_MOVBE,
|
|
XED_ISA_SET_MOVDIR,
|
|
XED_ISA_SET_MPX,
|
|
XED_ISA_SET_PAUSE,
|
|
XED_ISA_SET_PCLMULQDQ,
|
|
XED_ISA_SET_PCONFIG,
|
|
XED_ISA_SET_PENTIUMMMX,
|
|
XED_ISA_SET_PENTIUMREAL,
|
|
XED_ISA_SET_PKU,
|
|
XED_ISA_SET_POPCNT,
|
|
XED_ISA_SET_PPRO,
|
|
XED_ISA_SET_PPRO_UD0_LONG,
|
|
XED_ISA_SET_PPRO_UD0_SHORT,
|
|
XED_ISA_SET_PREFETCHW,
|
|
XED_ISA_SET_PREFETCHWT1,
|
|
XED_ISA_SET_PREFETCH_NOP,
|
|
XED_ISA_SET_PTWRITE,
|
|
XED_ISA_SET_RDPID,
|
|
XED_ISA_SET_RDPMC,
|
|
XED_ISA_SET_RDPRU,
|
|
XED_ISA_SET_RDRAND,
|
|
XED_ISA_SET_RDSEED,
|
|
XED_ISA_SET_RDTSCP,
|
|
XED_ISA_SET_RDWRFSGS,
|
|
XED_ISA_SET_RTM,
|
|
XED_ISA_SET_SERIALIZE,
|
|
XED_ISA_SET_SGX,
|
|
XED_ISA_SET_SGX_ENCLV,
|
|
XED_ISA_SET_SHA,
|
|
XED_ISA_SET_SMAP,
|
|
XED_ISA_SET_SMX,
|
|
XED_ISA_SET_SNP,
|
|
XED_ISA_SET_SSE,
|
|
XED_ISA_SET_SSE2,
|
|
XED_ISA_SET_SSE2MMX,
|
|
XED_ISA_SET_SSE3,
|
|
XED_ISA_SET_SSE3X87,
|
|
XED_ISA_SET_SSE4,
|
|
XED_ISA_SET_SSE42,
|
|
XED_ISA_SET_SSE4A,
|
|
XED_ISA_SET_SSEMXCSR,
|
|
XED_ISA_SET_SSE_PREFETCH,
|
|
XED_ISA_SET_SSSE3,
|
|
XED_ISA_SET_SSSE3MMX,
|
|
XED_ISA_SET_SVM,
|
|
XED_ISA_SET_TBM,
|
|
XED_ISA_SET_TDX,
|
|
XED_ISA_SET_TSX_LDTRK,
|
|
XED_ISA_SET_UINTR,
|
|
XED_ISA_SET_VAES,
|
|
XED_ISA_SET_VIA_PADLOCK_AES,
|
|
XED_ISA_SET_VIA_PADLOCK_MONTMUL,
|
|
XED_ISA_SET_VIA_PADLOCK_RNG,
|
|
XED_ISA_SET_VIA_PADLOCK_SHA,
|
|
XED_ISA_SET_VMFUNC,
|
|
XED_ISA_SET_VPCLMULQDQ,
|
|
XED_ISA_SET_VTX,
|
|
XED_ISA_SET_WAITPKG,
|
|
XED_ISA_SET_WBNOINVD,
|
|
XED_ISA_SET_X87,
|
|
XED_ISA_SET_XOP,
|
|
XED_ISA_SET_XSAVE,
|
|
XED_ISA_SET_XSAVEC,
|
|
XED_ISA_SET_XSAVEOPT,
|
|
XED_ISA_SET_XSAVES,
|
|
XED_ISA_SET_LAST
|
|
} xed_isa_set_enum_t;
|
|
|
|
/// This converts strings to #xed_isa_set_enum_t types.
|
|
/// @param s A C-string.
|
|
/// @return #xed_isa_set_enum_t
|
|
/// @ingroup ENUM
|
|
XED_DLL_EXPORT xed_isa_set_enum_t str2xed_isa_set_enum_t(const char* s);
|
|
/// This converts strings to #xed_isa_set_enum_t types.
|
|
/// @param p An enumeration element of type xed_isa_set_enum_t.
|
|
/// @return string
|
|
/// @ingroup ENUM
|
|
XED_DLL_EXPORT const char* xed_isa_set_enum_t2str(const xed_isa_set_enum_t p);
|
|
|
|
/// Returns the last element of the enumeration
|
|
/// @return xed_isa_set_enum_t The last element of the enumeration.
|
|
/// @ingroup ENUM
|
|
XED_DLL_EXPORT xed_isa_set_enum_t xed_isa_set_enum_t_last(void);
|
|
#endif
|